1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/net/phy/marvell.c
5 * Driver for Marvell PHYs
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/phy.h>
31 #include <linux/marvell_phy.h>
36 #include <linux/uaccess.h>
38 #define MII_MARVELL_PHY_PAGE 22
39 #define MII_MARVELL_COPPER_PAGE 0x00
40 #define MII_MARVELL_FIBER_PAGE 0x01
41 #define MII_MARVELL_MSCR_PAGE 0x02
42 #define MII_MARVELL_LED_PAGE 0x03
43 #define MII_MARVELL_MISC_TEST_PAGE 0x06
44 #define MII_MARVELL_WOL_PAGE 0x11
46 #define MII_M1011_IEVENT 0x13
47 #define MII_M1011_IEVENT_CLEAR 0x0000
49 #define MII_M1011_IMASK 0x12
50 #define MII_M1011_IMASK_INIT 0x6400
51 #define MII_M1011_IMASK_CLEAR 0x0000
53 #define MII_M1011_PHY_SCR 0x10
54 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
55 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
56 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
57 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
58 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
59 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
61 #define MII_M1111_PHY_LED_CONTROL 0x18
62 #define MII_M1111_PHY_LED_DIRECT 0x4100
63 #define MII_M1111_PHY_LED_COMBINE 0x411c
64 #define MII_M1111_PHY_EXT_CR 0x14
65 #define MII_M1111_RGMII_RX_DELAY BIT(7)
66 #define MII_M1111_RGMII_TX_DELAY BIT(1)
67 #define MII_M1111_PHY_EXT_SR 0x1b
69 #define MII_M1111_HWCFG_MODE_MASK 0xf
70 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
71 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
72 #define MII_M1111_HWCFG_MODE_RTBI 0x7
73 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
74 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
75 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
76 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
78 #define MII_88E1121_PHY_MSCR_REG 21
79 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
80 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
81 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
83 #define MII_88E1121_MISC_TEST 0x1a
84 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
85 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
86 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
87 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
88 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
89 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
91 #define MII_88E1510_TEMP_SENSOR 0x1b
92 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
94 #define MII_88E6390_MISC_TEST 0x1b
95 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
96 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
97 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
98 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
99 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
101 #define MII_88E6390_TEMP_SENSOR 0x1c
102 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
103 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
105 #define MII_88E1318S_PHY_MSCR1_REG 16
106 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
108 /* Copper Specific Interrupt Enable Register */
109 #define MII_88E1318S_PHY_CSIER 0x12
110 /* WOL Event Interrupt Enable */
111 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
113 /* LED Timer Control Register */
114 #define MII_88E1318S_PHY_LED_TCR 0x12
115 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
116 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
117 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
119 /* Magic Packet MAC address registers */
120 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
121 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
122 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
124 #define MII_88E1318S_PHY_WOL_CTRL 0x10
125 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
126 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
128 #define MII_PHY_LED_CTRL 16
129 #define MII_88E1121_PHY_LED_DEF 0x0030
130 #define MII_88E1510_PHY_LED_DEF 0x1177
132 #define MII_M1011_PHY_STATUS 0x11
133 #define MII_M1011_PHY_STATUS_1000 0x8000
134 #define MII_M1011_PHY_STATUS_100 0x4000
135 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
136 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
137 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
138 #define MII_M1011_PHY_STATUS_LINK 0x0400
140 #define MII_88E3016_PHY_SPEC_CTRL 0x10
141 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
142 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
144 #define MII_88E1510_GEN_CTRL_REG_1 0x14
145 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
146 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
147 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
149 #define LPA_FIBER_1000HALF 0x40
150 #define LPA_FIBER_1000FULL 0x20
152 #define LPA_PAUSE_FIBER 0x180
153 #define LPA_PAUSE_ASYM_FIBER 0x100
155 #define ADVERTISE_FIBER_1000HALF 0x40
156 #define ADVERTISE_FIBER_1000FULL 0x20
158 #define ADVERTISE_PAUSE_FIBER 0x180
159 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
161 #define REGISTER_LINK_STATUS 0x400
162 #define NB_FIBER_STATS 1
164 MODULE_DESCRIPTION("Marvell PHY driver");
165 MODULE_AUTHOR("Andy Fleming");
166 MODULE_LICENSE("GPL");
168 struct marvell_hw_stat {
175 static struct marvell_hw_stat marvell_hw_stats[] = {
176 { "phy_receive_errors_copper", 0, 21, 16},
177 { "phy_idle_errors", 0, 10, 8 },
178 { "phy_receive_errors_fiber", 1, 21, 16},
181 struct marvell_priv {
182 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
184 struct device *hwmon_dev;
187 static int marvell_read_page(struct phy_device *phydev)
189 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
192 static int marvell_write_page(struct phy_device *phydev, int page)
194 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
197 static int marvell_set_page(struct phy_device *phydev, int page)
199 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
202 static int marvell_ack_interrupt(struct phy_device *phydev)
206 /* Clear the interrupts by reading the reg */
207 err = phy_read(phydev, MII_M1011_IEVENT);
215 static int marvell_config_intr(struct phy_device *phydev)
219 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
220 err = phy_write(phydev, MII_M1011_IMASK,
221 MII_M1011_IMASK_INIT);
223 err = phy_write(phydev, MII_M1011_IMASK,
224 MII_M1011_IMASK_CLEAR);
229 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
235 /* get the current settings */
236 reg = phy_read(phydev, MII_M1011_PHY_SCR);
241 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
244 val |= MII_M1011_PHY_SCR_MDI;
247 val |= MII_M1011_PHY_SCR_MDI_X;
249 case ETH_TP_MDI_AUTO:
250 case ETH_TP_MDI_INVALID:
252 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
257 /* Set the new polarity value in the register */
258 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
266 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
271 reg = phy_read(phydev, MII_M1011_PHY_SCR);
275 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
276 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
278 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
280 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
283 static int marvell_config_aneg(struct phy_device *phydev)
288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
294 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
295 MII_M1111_PHY_LED_DIRECT);
299 err = genphy_config_aneg(phydev);
303 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
304 /* A write to speed/duplex bits (that is performed by
305 * genphy_config_aneg() call above) must be followed by
306 * a software reset. Otherwise, the write has no effect.
308 err = genphy_soft_reset(phydev);
316 static int m88e1101_config_aneg(struct phy_device *phydev)
320 /* This Marvell PHY has an errata which requires
321 * that certain registers get written in order
322 * to restart autonegotiation
324 err = genphy_soft_reset(phydev);
328 err = phy_write(phydev, 0x1d, 0x1f);
332 err = phy_write(phydev, 0x1e, 0x200c);
336 err = phy_write(phydev, 0x1d, 0x5);
340 err = phy_write(phydev, 0x1e, 0);
344 err = phy_write(phydev, 0x1e, 0x100);
348 return marvell_config_aneg(phydev);
351 #ifdef CONFIG_OF_MDIO
352 /* Set and/or override some configuration registers based on the
353 * marvell,reg-init property stored in the of_node for the phydev.
355 * marvell,reg-init = <reg-page reg mask value>,...;
357 * There may be one or more sets of <reg-page reg mask value>:
359 * reg-page: which register bank to use.
361 * mask: if non-zero, ANDed with existing register value.
362 * value: ORed with the masked value and written to the regiser.
365 static int marvell_of_reg_init(struct phy_device *phydev)
368 int len, i, saved_page, current_page, ret = 0;
370 if (!phydev->mdio.dev.of_node)
373 paddr = of_get_property(phydev->mdio.dev.of_node,
374 "marvell,reg-init", &len);
375 if (!paddr || len < (4 * sizeof(*paddr)))
378 saved_page = phy_save_page(phydev);
381 current_page = saved_page;
383 len /= sizeof(*paddr);
384 for (i = 0; i < len - 3; i += 4) {
385 u16 page = be32_to_cpup(paddr + i);
386 u16 reg = be32_to_cpup(paddr + i + 1);
387 u16 mask = be32_to_cpup(paddr + i + 2);
388 u16 val_bits = be32_to_cpup(paddr + i + 3);
391 if (page != current_page) {
393 ret = marvell_write_page(phydev, page);
400 val = __phy_read(phydev, reg);
409 ret = __phy_write(phydev, reg, val);
414 return phy_restore_page(phydev, saved_page, ret);
417 static int marvell_of_reg_init(struct phy_device *phydev)
421 #endif /* CONFIG_OF_MDIO */
423 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
427 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
428 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
429 MII_88E1121_PHY_MSCR_TX_DELAY;
430 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
431 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
432 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
433 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
437 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
438 MII_88E1121_PHY_MSCR_REG,
439 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
442 static int m88e1121_config_aneg(struct phy_device *phydev)
447 if (phy_interface_is_rgmii(phydev)) {
448 err = m88e1121_config_aneg_rgmii_delays(phydev);
453 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
459 err = genphy_config_aneg(phydev);
463 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
464 /* A software reset is used to ensure a "commit" of the
467 err = genphy_soft_reset(phydev);
475 static int m88e1318_config_aneg(struct phy_device *phydev)
479 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
480 MII_88E1318S_PHY_MSCR1_REG,
481 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
485 return m88e1121_config_aneg(phydev);
489 * linkmode_adv_to_fiber_adv_t
490 * @advertise: the linkmode advertisement settings
492 * A small helper function that translates linkmode advertisement
493 * settings to phy autonegotiation advertisements for the MII_ADV
494 * register for fiber link.
496 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
500 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
501 result |= ADVERTISE_FIBER_1000HALF;
502 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
503 result |= ADVERTISE_FIBER_1000FULL;
505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
506 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
507 result |= LPA_PAUSE_ASYM_FIBER;
508 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
509 result |= (ADVERTISE_PAUSE_FIBER
510 & (~ADVERTISE_PAUSE_ASYM_FIBER));
516 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
517 * @phydev: target phy_device struct
519 * Description: If auto-negotiation is enabled, we configure the
520 * advertising, and then restart auto-negotiation. If it is not
521 * enabled, then we write the BMCR. Adapted for fiber link in
522 * some Marvell's devices.
524 static int marvell_config_aneg_fiber(struct phy_device *phydev)
530 if (phydev->autoneg != AUTONEG_ENABLE)
531 return genphy_setup_forced(phydev);
533 /* Only allow advertising what this PHY supports */
534 linkmode_and(phydev->advertising, phydev->advertising,
537 /* Setup fiber advertisement */
538 adv = phy_read(phydev, MII_ADVERTISE);
543 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
545 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
548 err = phy_write(phydev, MII_ADVERTISE, adv);
556 /* Advertisement hasn't changed, but maybe aneg was never on to
557 * begin with? Or maybe phy was isolated?
559 int ctl = phy_read(phydev, MII_BMCR);
564 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
565 changed = 1; /* do restart aneg */
568 /* Only restart aneg if we are advertising something different
569 * than we were before.
572 changed = genphy_restart_aneg(phydev);
577 static int m88e1510_config_aneg(struct phy_device *phydev)
581 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
585 /* Configure the copper link first */
586 err = m88e1318_config_aneg(phydev);
590 /* Do not touch the fiber page if we're in copper->sgmii mode */
591 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
594 /* Then the fiber link */
595 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
599 err = marvell_config_aneg_fiber(phydev);
603 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
606 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
610 static void marvell_config_led(struct phy_device *phydev)
615 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
616 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
617 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
618 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
619 def_config = MII_88E1121_PHY_LED_DEF;
621 /* Default PHY LED config:
622 * LED[0] .. 1000Mbps Link
623 * LED[1] .. 100Mbps Link
624 * LED[2] .. Blink, Activity
626 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
627 def_config = MII_88E1510_PHY_LED_DEF;
633 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
636 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
639 static int marvell_config_init(struct phy_device *phydev)
641 /* Set defalut LED */
642 marvell_config_led(phydev);
644 /* Set registers from marvell,reg-init DT property */
645 return marvell_of_reg_init(phydev);
648 static int m88e1116r_config_init(struct phy_device *phydev)
652 err = genphy_soft_reset(phydev);
658 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
662 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
666 err = marvell_set_downshift(phydev, true, 8);
670 if (phy_interface_is_rgmii(phydev)) {
671 err = m88e1121_config_aneg_rgmii_delays(phydev);
676 err = genphy_soft_reset(phydev);
680 return marvell_config_init(phydev);
683 static int m88e3016_config_init(struct phy_device *phydev)
687 /* Enable Scrambler and Auto-Crossover */
688 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
689 MII_88E3016_DISABLE_SCRAMBLER,
690 MII_88E3016_AUTO_MDIX_CROSSOVER);
694 return marvell_config_init(phydev);
697 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
699 int fibre_copper_auto)
701 if (fibre_copper_auto)
702 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
704 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
705 MII_M1111_HWCFG_MODE_MASK |
706 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
707 MII_M1111_HWCFG_FIBER_COPPER_RES,
711 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
715 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
716 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
717 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
718 delay = MII_M1111_RGMII_RX_DELAY;
719 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
720 delay = MII_M1111_RGMII_TX_DELAY;
725 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
726 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
730 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
735 err = m88e1111_config_init_rgmii_delays(phydev);
739 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
743 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
745 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
746 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
748 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
750 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
753 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
757 err = m88e1111_config_init_hwcfg_mode(
759 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
760 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
764 /* make sure copper is selected */
765 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
768 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
772 err = m88e1111_config_init_rgmii_delays(phydev);
776 err = m88e1111_config_init_hwcfg_mode(
778 MII_M1111_HWCFG_MODE_RTBI,
779 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
784 err = genphy_soft_reset(phydev);
788 return m88e1111_config_init_hwcfg_mode(
790 MII_M1111_HWCFG_MODE_RTBI,
791 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
794 static int m88e1111_config_init(struct phy_device *phydev)
798 if (phy_interface_is_rgmii(phydev)) {
799 err = m88e1111_config_init_rgmii(phydev);
804 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
805 err = m88e1111_config_init_sgmii(phydev);
810 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
811 err = m88e1111_config_init_rtbi(phydev);
816 err = marvell_of_reg_init(phydev);
820 return genphy_soft_reset(phydev);
823 static int m88e1318_config_init(struct phy_device *phydev)
825 if (phy_interrupt_is_valid(phydev)) {
826 int err = phy_modify_paged(
827 phydev, MII_MARVELL_LED_PAGE,
828 MII_88E1318S_PHY_LED_TCR,
829 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
830 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
831 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
836 return marvell_config_init(phydev);
839 static int m88e1510_config_init(struct phy_device *phydev)
843 /* SGMII-to-Copper mode initialization */
844 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
846 err = marvell_set_page(phydev, 18);
850 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
851 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
852 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
853 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
857 /* PHY reset is necessary after changing MODE[2:0] */
858 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
859 MII_88E1510_GEN_CTRL_REG_1_RESET);
863 /* Reset page selection */
864 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
869 return m88e1318_config_init(phydev);
872 static int m88e1118_config_aneg(struct phy_device *phydev)
876 err = genphy_soft_reset(phydev);
880 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
884 err = genphy_config_aneg(phydev);
888 static int m88e1118_config_init(struct phy_device *phydev)
893 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
897 /* Enable 1000 Mbit */
898 err = phy_write(phydev, 0x15, 0x1070);
903 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
907 /* Adjust LED Control */
908 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
909 err = phy_write(phydev, 0x10, 0x1100);
911 err = phy_write(phydev, 0x10, 0x021e);
915 err = marvell_of_reg_init(phydev);
920 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
924 return genphy_soft_reset(phydev);
927 static int m88e1149_config_init(struct phy_device *phydev)
932 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
936 /* Enable 1000 Mbit */
937 err = phy_write(phydev, 0x15, 0x1048);
941 err = marvell_of_reg_init(phydev);
946 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
950 return genphy_soft_reset(phydev);
953 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
957 err = m88e1111_config_init_rgmii_delays(phydev);
961 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
962 err = phy_write(phydev, 0x1d, 0x0012);
966 err = phy_modify(phydev, 0x1e, 0x0fc0,
967 2 << 9 | /* 36 ohm */
968 2 << 6); /* 39 ohm */
972 err = phy_write(phydev, 0x1d, 0x3);
976 err = phy_write(phydev, 0x1e, 0x8000);
981 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
983 return m88e1111_config_init_hwcfg_mode(
984 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
985 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
988 static int m88e1145_config_init(struct phy_device *phydev)
992 /* Take care of errata E0 & E1 */
993 err = phy_write(phydev, 0x1d, 0x001b);
997 err = phy_write(phydev, 0x1e, 0x418f);
1001 err = phy_write(phydev, 0x1d, 0x0016);
1005 err = phy_write(phydev, 0x1e, 0xa2da);
1009 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1010 err = m88e1145_config_init_rgmii(phydev);
1015 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1016 err = m88e1145_config_init_sgmii(phydev);
1021 err = marvell_of_reg_init(phydev);
1028 /* The VOD can be out of specification on link up. Poke an
1029 * undocumented register, in an undocumented page, with a magic value
1032 static int m88e6390_errata(struct phy_device *phydev)
1036 err = phy_write(phydev, MII_BMCR,
1037 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1041 usleep_range(300, 400);
1043 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1047 return genphy_soft_reset(phydev);
1050 static int m88e6390_config_aneg(struct phy_device *phydev)
1054 err = m88e6390_errata(phydev);
1058 return m88e1510_config_aneg(phydev);
1062 * fiber_lpa_mod_linkmode_lpa_t
1063 * @advertising: the linkmode advertisement settings
1064 * @lpa: value of the MII_LPA register for fiber link
1066 * A small helper function that translates MII_LPA bits to linkmode LP
1067 * advertisement settings. Other bits in advertising are left
1070 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1072 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1073 advertising, lpa & LPA_FIBER_1000HALF);
1075 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1076 advertising, lpa & LPA_FIBER_1000FULL);
1080 * marvell_update_link - update link status in real time in @phydev
1081 * @phydev: target phy_device struct
1083 * Description: Update the value in phydev->link to reflect the
1084 * current link value.
1086 static int marvell_update_link(struct phy_device *phydev, int fiber)
1090 /* Use the generic register for copper link, or specific
1091 * register for fiber case
1094 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1098 if ((status & REGISTER_LINK_STATUS) == 0)
1103 return genphy_update_link(phydev);
1109 static int marvell_read_status_page_an(struct phy_device *phydev,
1116 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1120 lpa = phy_read(phydev, MII_LPA);
1124 lpagb = phy_read(phydev, MII_STAT1000);
1128 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1129 phydev->duplex = DUPLEX_FULL;
1131 phydev->duplex = DUPLEX_HALF;
1133 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1135 phydev->asym_pause = 0;
1138 case MII_M1011_PHY_STATUS_1000:
1139 phydev->speed = SPEED_1000;
1142 case MII_M1011_PHY_STATUS_100:
1143 phydev->speed = SPEED_100;
1147 phydev->speed = SPEED_10;
1152 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
1153 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb);
1155 if (phydev->duplex == DUPLEX_FULL) {
1156 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1157 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1160 /* The fiber link is only 1000M capable */
1161 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1163 if (phydev->duplex == DUPLEX_FULL) {
1164 if (!(lpa & LPA_PAUSE_FIBER)) {
1166 phydev->asym_pause = 0;
1167 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1169 phydev->asym_pause = 1;
1172 phydev->asym_pause = 0;
1179 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1181 int bmcr = phy_read(phydev, MII_BMCR);
1186 if (bmcr & BMCR_FULLDPLX)
1187 phydev->duplex = DUPLEX_FULL;
1189 phydev->duplex = DUPLEX_HALF;
1191 if (bmcr & BMCR_SPEED1000)
1192 phydev->speed = SPEED_1000;
1193 else if (bmcr & BMCR_SPEED100)
1194 phydev->speed = SPEED_100;
1196 phydev->speed = SPEED_10;
1199 phydev->asym_pause = 0;
1200 linkmode_zero(phydev->lp_advertising);
1205 /* marvell_read_status_page
1208 * Check the link, then figure out the current state
1209 * by comparing what we advertise with what the link partner
1210 * advertises. Start by checking the gigabit possibilities,
1211 * then move on to 10/100.
1213 static int marvell_read_status_page(struct phy_device *phydev, int page)
1218 /* Detect and update the link, but return if there
1221 if (page == MII_MARVELL_FIBER_PAGE)
1226 err = marvell_update_link(phydev, fiber);
1230 if (phydev->autoneg == AUTONEG_ENABLE)
1231 err = marvell_read_status_page_an(phydev, fiber);
1233 err = marvell_read_status_page_fixed(phydev);
1238 /* marvell_read_status
1240 * Some Marvell's phys have two modes: fiber and copper.
1241 * Both need status checked.
1243 * First, check the fiber link and status.
1244 * If the fiber link is down, check the copper link and status which
1245 * will be the default value if both link are down.
1247 static int marvell_read_status(struct phy_device *phydev)
1251 /* Check the fiber mode first */
1252 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1253 phydev->supported) &&
1254 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1255 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1259 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1263 /* If the fiber link is up, it is the selected and
1264 * used link. In this case, we need to stay in the
1265 * fiber page. Please to be careful about that, avoid
1266 * to restore Copper page in other functions which
1267 * could break the behaviour for some fiber phy like
1273 /* If fiber link is down, check and save copper mode state */
1274 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1279 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1282 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1288 * Some Marvell's phys have two modes: fiber and copper.
1289 * Both need to be suspended
1291 static int marvell_suspend(struct phy_device *phydev)
1295 /* Suspend the fiber mode first */
1296 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1297 phydev->supported)) {
1298 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1302 /* With the page set, use the generic suspend */
1303 err = genphy_suspend(phydev);
1307 /* Then, the copper link */
1308 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1313 /* With the page set, use the generic suspend */
1314 return genphy_suspend(phydev);
1317 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1323 * Some Marvell's phys have two modes: fiber and copper.
1324 * Both need to be resumed
1326 static int marvell_resume(struct phy_device *phydev)
1330 /* Resume the fiber mode first */
1331 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1332 phydev->supported)) {
1333 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1337 /* With the page set, use the generic resume */
1338 err = genphy_resume(phydev);
1342 /* Then, the copper link */
1343 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1348 /* With the page set, use the generic resume */
1349 return genphy_resume(phydev);
1352 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1356 static int marvell_aneg_done(struct phy_device *phydev)
1358 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1360 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1363 static int m88e1121_did_interrupt(struct phy_device *phydev)
1367 imask = phy_read(phydev, MII_M1011_IEVENT);
1369 if (imask & MII_M1011_IMASK_INIT)
1375 static void m88e1318_get_wol(struct phy_device *phydev,
1376 struct ethtool_wolinfo *wol)
1378 int oldpage, ret = 0;
1380 wol->supported = WAKE_MAGIC;
1383 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1387 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1388 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1389 wol->wolopts |= WAKE_MAGIC;
1392 phy_restore_page(phydev, oldpage, ret);
1395 static int m88e1318_set_wol(struct phy_device *phydev,
1396 struct ethtool_wolinfo *wol)
1398 int err = 0, oldpage;
1400 oldpage = phy_save_page(phydev);
1404 if (wol->wolopts & WAKE_MAGIC) {
1405 /* Explicitly switch to page 0x00, just to be sure */
1406 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1410 /* If WOL event happened once, the LED[2] interrupt pin
1411 * will not be cleared unless we reading the interrupt status
1412 * register. If interrupts are in use, the normal interrupt
1413 * handling will clear the WOL event. Clear the WOL event
1414 * before enabling it if !phy_interrupt_is_valid()
1416 if (!phy_interrupt_is_valid(phydev))
1417 __phy_read(phydev, MII_M1011_IEVENT);
1419 /* Enable the WOL interrupt */
1420 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1421 MII_88E1318S_PHY_CSIER_WOL_EIE);
1425 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1429 /* Setup LED[2] as interrupt pin (active low) */
1430 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1431 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1432 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1433 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1437 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1441 /* Store the device address for the magic packet */
1442 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1443 ((phydev->attached_dev->dev_addr[5] << 8) |
1444 phydev->attached_dev->dev_addr[4]));
1447 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1448 ((phydev->attached_dev->dev_addr[3] << 8) |
1449 phydev->attached_dev->dev_addr[2]));
1452 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1453 ((phydev->attached_dev->dev_addr[1] << 8) |
1454 phydev->attached_dev->dev_addr[0]));
1458 /* Clear WOL status and enable magic packet matching */
1459 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1460 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1461 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1465 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1469 /* Clear WOL status and disable magic packet matching */
1470 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1471 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1472 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1478 return phy_restore_page(phydev, oldpage, err);
1481 static int marvell_get_sset_count(struct phy_device *phydev)
1483 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1485 return ARRAY_SIZE(marvell_hw_stats);
1487 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1490 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1492 int count = marvell_get_sset_count(phydev);
1495 for (i = 0; i < count; i++) {
1496 strlcpy(data + i * ETH_GSTRING_LEN,
1497 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1501 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1503 struct marvell_hw_stat stat = marvell_hw_stats[i];
1504 struct marvell_priv *priv = phydev->priv;
1508 val = phy_read_paged(phydev, stat.page, stat.reg);
1512 val = val & ((1 << stat.bits) - 1);
1513 priv->stats[i] += val;
1514 ret = priv->stats[i];
1520 static void marvell_get_stats(struct phy_device *phydev,
1521 struct ethtool_stats *stats, u64 *data)
1523 int count = marvell_get_sset_count(phydev);
1526 for (i = 0; i < count; i++)
1527 data[i] = marvell_get_stat(phydev, i);
1531 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1539 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1543 /* Enable temperature sensor */
1544 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1548 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1549 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1553 /* Wait for temperature to stabilize */
1554 usleep_range(10000, 12000);
1556 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1562 /* Disable temperature sensor */
1563 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1564 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1568 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1571 return phy_restore_page(phydev, oldpage, ret);
1574 static int m88e1121_hwmon_read(struct device *dev,
1575 enum hwmon_sensor_types type,
1576 u32 attr, int channel, long *temp)
1578 struct phy_device *phydev = dev_get_drvdata(dev);
1582 case hwmon_temp_input:
1583 err = m88e1121_get_temp(phydev, temp);
1592 static umode_t m88e1121_hwmon_is_visible(const void *data,
1593 enum hwmon_sensor_types type,
1594 u32 attr, int channel)
1596 if (type != hwmon_temp)
1600 case hwmon_temp_input:
1607 static u32 m88e1121_hwmon_chip_config[] = {
1608 HWMON_C_REGISTER_TZ,
1612 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1614 .config = m88e1121_hwmon_chip_config,
1617 static u32 m88e1121_hwmon_temp_config[] = {
1622 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1624 .config = m88e1121_hwmon_temp_config,
1627 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1628 &m88e1121_hwmon_chip,
1629 &m88e1121_hwmon_temp,
1633 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1634 .is_visible = m88e1121_hwmon_is_visible,
1635 .read = m88e1121_hwmon_read,
1638 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1639 .ops = &m88e1121_hwmon_hwmon_ops,
1640 .info = m88e1121_hwmon_info,
1643 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1649 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1650 MII_88E1510_TEMP_SENSOR);
1654 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1659 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1665 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1666 MII_88E1121_MISC_TEST);
1670 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1671 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1678 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1681 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1683 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1684 MII_88E1121_MISC_TEST,
1685 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1686 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1689 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1695 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1696 MII_88E1121_MISC_TEST);
1700 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1705 static int m88e1510_hwmon_read(struct device *dev,
1706 enum hwmon_sensor_types type,
1707 u32 attr, int channel, long *temp)
1709 struct phy_device *phydev = dev_get_drvdata(dev);
1713 case hwmon_temp_input:
1714 err = m88e1510_get_temp(phydev, temp);
1716 case hwmon_temp_crit:
1717 err = m88e1510_get_temp_critical(phydev, temp);
1719 case hwmon_temp_max_alarm:
1720 err = m88e1510_get_temp_alarm(phydev, temp);
1729 static int m88e1510_hwmon_write(struct device *dev,
1730 enum hwmon_sensor_types type,
1731 u32 attr, int channel, long temp)
1733 struct phy_device *phydev = dev_get_drvdata(dev);
1737 case hwmon_temp_crit:
1738 err = m88e1510_set_temp_critical(phydev, temp);
1746 static umode_t m88e1510_hwmon_is_visible(const void *data,
1747 enum hwmon_sensor_types type,
1748 u32 attr, int channel)
1750 if (type != hwmon_temp)
1754 case hwmon_temp_input:
1755 case hwmon_temp_max_alarm:
1757 case hwmon_temp_crit:
1764 static u32 m88e1510_hwmon_temp_config[] = {
1765 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1769 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1771 .config = m88e1510_hwmon_temp_config,
1774 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1775 &m88e1121_hwmon_chip,
1776 &m88e1510_hwmon_temp,
1780 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1781 .is_visible = m88e1510_hwmon_is_visible,
1782 .read = m88e1510_hwmon_read,
1783 .write = m88e1510_hwmon_write,
1786 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1787 .ops = &m88e1510_hwmon_hwmon_ops,
1788 .info = m88e1510_hwmon_info,
1791 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1800 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1804 /* Enable temperature sensor */
1805 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1809 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1810 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1811 MII_88E6390_MISC_TEST_SAMPLE_1S;
1813 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1817 /* Wait for temperature to stabilize */
1818 usleep_range(10000, 12000);
1820 /* Reading the temperature sense has an errata. You need to read
1821 * a number of times and take an average.
1823 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1824 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1827 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1830 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1831 *temp = (sum - 75) * 1000;
1833 /* Disable temperature sensor */
1834 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1838 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1839 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1841 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1844 phy_restore_page(phydev, oldpage, ret);
1849 static int m88e6390_hwmon_read(struct device *dev,
1850 enum hwmon_sensor_types type,
1851 u32 attr, int channel, long *temp)
1853 struct phy_device *phydev = dev_get_drvdata(dev);
1857 case hwmon_temp_input:
1858 err = m88e6390_get_temp(phydev, temp);
1867 static umode_t m88e6390_hwmon_is_visible(const void *data,
1868 enum hwmon_sensor_types type,
1869 u32 attr, int channel)
1871 if (type != hwmon_temp)
1875 case hwmon_temp_input:
1882 static u32 m88e6390_hwmon_temp_config[] = {
1887 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1889 .config = m88e6390_hwmon_temp_config,
1892 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1893 &m88e1121_hwmon_chip,
1894 &m88e6390_hwmon_temp,
1898 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1899 .is_visible = m88e6390_hwmon_is_visible,
1900 .read = m88e6390_hwmon_read,
1903 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1904 .ops = &m88e6390_hwmon_hwmon_ops,
1905 .info = m88e6390_hwmon_info,
1908 static int marvell_hwmon_name(struct phy_device *phydev)
1910 struct marvell_priv *priv = phydev->priv;
1911 struct device *dev = &phydev->mdio.dev;
1912 const char *devname = dev_name(dev);
1913 size_t len = strlen(devname);
1916 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1917 if (!priv->hwmon_name)
1920 for (i = j = 0; i < len && devname[i]; i++) {
1921 if (isalnum(devname[i]))
1922 priv->hwmon_name[j++] = devname[i];
1928 static int marvell_hwmon_probe(struct phy_device *phydev,
1929 const struct hwmon_chip_info *chip)
1931 struct marvell_priv *priv = phydev->priv;
1932 struct device *dev = &phydev->mdio.dev;
1935 err = marvell_hwmon_name(phydev);
1939 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1940 dev, priv->hwmon_name, phydev, chip, NULL);
1942 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1945 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1947 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1950 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1952 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1955 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1957 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1960 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1965 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1970 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1976 static int marvell_probe(struct phy_device *phydev)
1978 struct marvell_priv *priv;
1980 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1984 phydev->priv = priv;
1989 static int m88e1121_probe(struct phy_device *phydev)
1993 err = marvell_probe(phydev);
1997 return m88e1121_hwmon_probe(phydev);
2000 static int m88e1510_probe(struct phy_device *phydev)
2004 err = marvell_probe(phydev);
2008 return m88e1510_hwmon_probe(phydev);
2011 static int m88e6390_probe(struct phy_device *phydev)
2015 err = marvell_probe(phydev);
2019 return m88e6390_hwmon_probe(phydev);
2022 static struct phy_driver marvell_drivers[] = {
2024 .phy_id = MARVELL_PHY_ID_88E1101,
2025 .phy_id_mask = MARVELL_PHY_ID_MASK,
2026 .name = "Marvell 88E1101",
2027 .features = PHY_GBIT_FEATURES,
2028 .probe = marvell_probe,
2029 .config_init = &marvell_config_init,
2030 .config_aneg = &m88e1101_config_aneg,
2031 .ack_interrupt = &marvell_ack_interrupt,
2032 .config_intr = &marvell_config_intr,
2033 .resume = &genphy_resume,
2034 .suspend = &genphy_suspend,
2035 .read_page = marvell_read_page,
2036 .write_page = marvell_write_page,
2037 .get_sset_count = marvell_get_sset_count,
2038 .get_strings = marvell_get_strings,
2039 .get_stats = marvell_get_stats,
2042 .phy_id = MARVELL_PHY_ID_88E1112,
2043 .phy_id_mask = MARVELL_PHY_ID_MASK,
2044 .name = "Marvell 88E1112",
2045 .features = PHY_GBIT_FEATURES,
2046 .probe = marvell_probe,
2047 .config_init = &m88e1111_config_init,
2048 .config_aneg = &marvell_config_aneg,
2049 .ack_interrupt = &marvell_ack_interrupt,
2050 .config_intr = &marvell_config_intr,
2051 .resume = &genphy_resume,
2052 .suspend = &genphy_suspend,
2053 .read_page = marvell_read_page,
2054 .write_page = marvell_write_page,
2055 .get_sset_count = marvell_get_sset_count,
2056 .get_strings = marvell_get_strings,
2057 .get_stats = marvell_get_stats,
2060 .phy_id = MARVELL_PHY_ID_88E1111,
2061 .phy_id_mask = MARVELL_PHY_ID_MASK,
2062 .name = "Marvell 88E1111",
2063 .features = PHY_GBIT_FEATURES,
2064 .probe = marvell_probe,
2065 .config_init = &m88e1111_config_init,
2066 .config_aneg = &marvell_config_aneg,
2067 .read_status = &marvell_read_status,
2068 .ack_interrupt = &marvell_ack_interrupt,
2069 .config_intr = &marvell_config_intr,
2070 .resume = &genphy_resume,
2071 .suspend = &genphy_suspend,
2072 .read_page = marvell_read_page,
2073 .write_page = marvell_write_page,
2074 .get_sset_count = marvell_get_sset_count,
2075 .get_strings = marvell_get_strings,
2076 .get_stats = marvell_get_stats,
2079 .phy_id = MARVELL_PHY_ID_88E1118,
2080 .phy_id_mask = MARVELL_PHY_ID_MASK,
2081 .name = "Marvell 88E1118",
2082 .features = PHY_GBIT_FEATURES,
2083 .probe = marvell_probe,
2084 .config_init = &m88e1118_config_init,
2085 .config_aneg = &m88e1118_config_aneg,
2086 .ack_interrupt = &marvell_ack_interrupt,
2087 .config_intr = &marvell_config_intr,
2088 .resume = &genphy_resume,
2089 .suspend = &genphy_suspend,
2090 .read_page = marvell_read_page,
2091 .write_page = marvell_write_page,
2092 .get_sset_count = marvell_get_sset_count,
2093 .get_strings = marvell_get_strings,
2094 .get_stats = marvell_get_stats,
2097 .phy_id = MARVELL_PHY_ID_88E1121R,
2098 .phy_id_mask = MARVELL_PHY_ID_MASK,
2099 .name = "Marvell 88E1121R",
2100 .features = PHY_GBIT_FEATURES,
2101 .probe = &m88e1121_probe,
2102 .config_init = &marvell_config_init,
2103 .config_aneg = &m88e1121_config_aneg,
2104 .read_status = &marvell_read_status,
2105 .ack_interrupt = &marvell_ack_interrupt,
2106 .config_intr = &marvell_config_intr,
2107 .did_interrupt = &m88e1121_did_interrupt,
2108 .resume = &genphy_resume,
2109 .suspend = &genphy_suspend,
2110 .read_page = marvell_read_page,
2111 .write_page = marvell_write_page,
2112 .get_sset_count = marvell_get_sset_count,
2113 .get_strings = marvell_get_strings,
2114 .get_stats = marvell_get_stats,
2117 .phy_id = MARVELL_PHY_ID_88E1318S,
2118 .phy_id_mask = MARVELL_PHY_ID_MASK,
2119 .name = "Marvell 88E1318S",
2120 .features = PHY_GBIT_FEATURES,
2121 .probe = marvell_probe,
2122 .config_init = &m88e1318_config_init,
2123 .config_aneg = &m88e1318_config_aneg,
2124 .read_status = &marvell_read_status,
2125 .ack_interrupt = &marvell_ack_interrupt,
2126 .config_intr = &marvell_config_intr,
2127 .did_interrupt = &m88e1121_did_interrupt,
2128 .get_wol = &m88e1318_get_wol,
2129 .set_wol = &m88e1318_set_wol,
2130 .resume = &genphy_resume,
2131 .suspend = &genphy_suspend,
2132 .read_page = marvell_read_page,
2133 .write_page = marvell_write_page,
2134 .get_sset_count = marvell_get_sset_count,
2135 .get_strings = marvell_get_strings,
2136 .get_stats = marvell_get_stats,
2139 .phy_id = MARVELL_PHY_ID_88E1145,
2140 .phy_id_mask = MARVELL_PHY_ID_MASK,
2141 .name = "Marvell 88E1145",
2142 .features = PHY_GBIT_FEATURES,
2143 .probe = marvell_probe,
2144 .config_init = &m88e1145_config_init,
2145 .config_aneg = &m88e1101_config_aneg,
2146 .read_status = &genphy_read_status,
2147 .ack_interrupt = &marvell_ack_interrupt,
2148 .config_intr = &marvell_config_intr,
2149 .resume = &genphy_resume,
2150 .suspend = &genphy_suspend,
2151 .read_page = marvell_read_page,
2152 .write_page = marvell_write_page,
2153 .get_sset_count = marvell_get_sset_count,
2154 .get_strings = marvell_get_strings,
2155 .get_stats = marvell_get_stats,
2158 .phy_id = MARVELL_PHY_ID_88E1149R,
2159 .phy_id_mask = MARVELL_PHY_ID_MASK,
2160 .name = "Marvell 88E1149R",
2161 .features = PHY_GBIT_FEATURES,
2162 .probe = marvell_probe,
2163 .config_init = &m88e1149_config_init,
2164 .config_aneg = &m88e1118_config_aneg,
2165 .ack_interrupt = &marvell_ack_interrupt,
2166 .config_intr = &marvell_config_intr,
2167 .resume = &genphy_resume,
2168 .suspend = &genphy_suspend,
2169 .read_page = marvell_read_page,
2170 .write_page = marvell_write_page,
2171 .get_sset_count = marvell_get_sset_count,
2172 .get_strings = marvell_get_strings,
2173 .get_stats = marvell_get_stats,
2176 .phy_id = MARVELL_PHY_ID_88E1240,
2177 .phy_id_mask = MARVELL_PHY_ID_MASK,
2178 .name = "Marvell 88E1240",
2179 .features = PHY_GBIT_FEATURES,
2180 .probe = marvell_probe,
2181 .config_init = &m88e1111_config_init,
2182 .config_aneg = &marvell_config_aneg,
2183 .ack_interrupt = &marvell_ack_interrupt,
2184 .config_intr = &marvell_config_intr,
2185 .resume = &genphy_resume,
2186 .suspend = &genphy_suspend,
2187 .read_page = marvell_read_page,
2188 .write_page = marvell_write_page,
2189 .get_sset_count = marvell_get_sset_count,
2190 .get_strings = marvell_get_strings,
2191 .get_stats = marvell_get_stats,
2194 .phy_id = MARVELL_PHY_ID_88E1116R,
2195 .phy_id_mask = MARVELL_PHY_ID_MASK,
2196 .name = "Marvell 88E1116R",
2197 .features = PHY_GBIT_FEATURES,
2198 .probe = marvell_probe,
2199 .config_init = &m88e1116r_config_init,
2200 .ack_interrupt = &marvell_ack_interrupt,
2201 .config_intr = &marvell_config_intr,
2202 .resume = &genphy_resume,
2203 .suspend = &genphy_suspend,
2204 .read_page = marvell_read_page,
2205 .write_page = marvell_write_page,
2206 .get_sset_count = marvell_get_sset_count,
2207 .get_strings = marvell_get_strings,
2208 .get_stats = marvell_get_stats,
2211 .phy_id = MARVELL_PHY_ID_88E1510,
2212 .phy_id_mask = MARVELL_PHY_ID_MASK,
2213 .name = "Marvell 88E1510",
2214 .features = PHY_GBIT_FIBRE_FEATURES,
2215 .probe = &m88e1510_probe,
2216 .config_init = &m88e1510_config_init,
2217 .config_aneg = &m88e1510_config_aneg,
2218 .read_status = &marvell_read_status,
2219 .ack_interrupt = &marvell_ack_interrupt,
2220 .config_intr = &marvell_config_intr,
2221 .did_interrupt = &m88e1121_did_interrupt,
2222 .get_wol = &m88e1318_get_wol,
2223 .set_wol = &m88e1318_set_wol,
2224 .resume = &marvell_resume,
2225 .suspend = &marvell_suspend,
2226 .read_page = marvell_read_page,
2227 .write_page = marvell_write_page,
2228 .get_sset_count = marvell_get_sset_count,
2229 .get_strings = marvell_get_strings,
2230 .get_stats = marvell_get_stats,
2231 .set_loopback = genphy_loopback,
2234 .phy_id = MARVELL_PHY_ID_88E1540,
2235 .phy_id_mask = MARVELL_PHY_ID_MASK,
2236 .name = "Marvell 88E1540",
2237 .features = PHY_GBIT_FEATURES,
2238 .probe = m88e1510_probe,
2239 .config_init = &marvell_config_init,
2240 .config_aneg = &m88e1510_config_aneg,
2241 .read_status = &marvell_read_status,
2242 .ack_interrupt = &marvell_ack_interrupt,
2243 .config_intr = &marvell_config_intr,
2244 .did_interrupt = &m88e1121_did_interrupt,
2245 .resume = &genphy_resume,
2246 .suspend = &genphy_suspend,
2247 .read_page = marvell_read_page,
2248 .write_page = marvell_write_page,
2249 .get_sset_count = marvell_get_sset_count,
2250 .get_strings = marvell_get_strings,
2251 .get_stats = marvell_get_stats,
2254 .phy_id = MARVELL_PHY_ID_88E1545,
2255 .phy_id_mask = MARVELL_PHY_ID_MASK,
2256 .name = "Marvell 88E1545",
2257 .probe = m88e1510_probe,
2258 .features = PHY_GBIT_FEATURES,
2259 .config_init = &marvell_config_init,
2260 .config_aneg = &m88e1510_config_aneg,
2261 .read_status = &marvell_read_status,
2262 .ack_interrupt = &marvell_ack_interrupt,
2263 .config_intr = &marvell_config_intr,
2264 .did_interrupt = &m88e1121_did_interrupt,
2265 .resume = &genphy_resume,
2266 .suspend = &genphy_suspend,
2267 .read_page = marvell_read_page,
2268 .write_page = marvell_write_page,
2269 .get_sset_count = marvell_get_sset_count,
2270 .get_strings = marvell_get_strings,
2271 .get_stats = marvell_get_stats,
2274 .phy_id = MARVELL_PHY_ID_88E3016,
2275 .phy_id_mask = MARVELL_PHY_ID_MASK,
2276 .name = "Marvell 88E3016",
2277 .features = PHY_BASIC_FEATURES,
2278 .probe = marvell_probe,
2279 .config_init = &m88e3016_config_init,
2280 .aneg_done = &marvell_aneg_done,
2281 .read_status = &marvell_read_status,
2282 .ack_interrupt = &marvell_ack_interrupt,
2283 .config_intr = &marvell_config_intr,
2284 .did_interrupt = &m88e1121_did_interrupt,
2285 .resume = &genphy_resume,
2286 .suspend = &genphy_suspend,
2287 .read_page = marvell_read_page,
2288 .write_page = marvell_write_page,
2289 .get_sset_count = marvell_get_sset_count,
2290 .get_strings = marvell_get_strings,
2291 .get_stats = marvell_get_stats,
2294 .phy_id = MARVELL_PHY_ID_88E6390,
2295 .phy_id_mask = MARVELL_PHY_ID_MASK,
2296 .name = "Marvell 88E6390",
2297 .features = PHY_GBIT_FEATURES,
2298 .probe = m88e6390_probe,
2299 .config_init = &marvell_config_init,
2300 .config_aneg = &m88e6390_config_aneg,
2301 .read_status = &marvell_read_status,
2302 .ack_interrupt = &marvell_ack_interrupt,
2303 .config_intr = &marvell_config_intr,
2304 .did_interrupt = &m88e1121_did_interrupt,
2305 .resume = &genphy_resume,
2306 .suspend = &genphy_suspend,
2307 .read_page = marvell_read_page,
2308 .write_page = marvell_write_page,
2309 .get_sset_count = marvell_get_sset_count,
2310 .get_strings = marvell_get_strings,
2311 .get_stats = marvell_get_stats,
2315 module_phy_driver(marvell_drivers);
2317 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2318 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2319 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2320 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2321 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2322 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2323 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2324 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2325 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2326 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2327 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2328 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2329 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2330 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2331 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2332 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2336 MODULE_DEVICE_TABLE(mdio, marvell_tbl);