2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
41 #include <linux/uaccess.h>
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
133 #define MII_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135 #define MII_88E1510_PHY_LED_DEF 0x1177
137 #define MII_M1011_PHY_STATUS 0x11
138 #define MII_M1011_PHY_STATUS_1000 0x8000
139 #define MII_M1011_PHY_STATUS_100 0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
143 #define MII_M1011_PHY_STATUS_LINK 0x0400
145 #define MII_88E3016_PHY_SPEC_CTRL 0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
149 #define MII_88E1510_GEN_CTRL_REG_1 0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
154 #define LPA_FIBER_1000HALF 0x40
155 #define LPA_FIBER_1000FULL 0x20
157 #define LPA_PAUSE_FIBER 0x180
158 #define LPA_PAUSE_ASYM_FIBER 0x100
160 #define ADVERTISE_FIBER_1000HALF 0x40
161 #define ADVERTISE_FIBER_1000FULL 0x20
163 #define ADVERTISE_PAUSE_FIBER 0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
166 #define REGISTER_LINK_STATUS 0x400
167 #define NB_FIBER_STATS 1
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
173 struct marvell_hw_stat {
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 { "phy_receive_errors_copper", 0, 21, 16},
182 { "phy_idle_errors", 0, 10, 8 },
183 { "phy_receive_errors_fiber", 1, 21, 16},
186 struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
189 struct device *hwmon_dev;
192 static int marvell_read_page(struct phy_device *phydev)
194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
197 static int marvell_write_page(struct phy_device *phydev, int page)
199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
202 static int marvell_set_page(struct phy_device *phydev, int page)
204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
207 static int marvell_ack_interrupt(struct phy_device *phydev)
211 /* Clear the interrupts by reading the reg */
212 err = phy_read(phydev, MII_M1011_IEVENT);
220 static int marvell_config_intr(struct phy_device *phydev)
224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 err = phy_write(phydev, MII_M1011_IMASK,
226 MII_M1011_IMASK_INIT);
228 err = phy_write(phydev, MII_M1011_IMASK,
229 MII_M1011_IMASK_CLEAR);
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
240 /* get the current settings */
241 reg = phy_read(phydev, MII_M1011_PHY_SCR);
246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
249 val |= MII_M1011_PHY_SCR_MDI;
252 val |= MII_M1011_PHY_SCR_MDI_X;
254 case ETH_TP_MDI_AUTO:
255 case ETH_TP_MDI_INVALID:
257 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
262 /* Set the new polarity value in the register */
263 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
276 reg = phy_read(phydev, MII_M1011_PHY_SCR);
280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
285 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
288 static int marvell_config_aneg(struct phy_device *phydev)
293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
300 MII_M1111_PHY_LED_DIRECT);
304 err = genphy_config_aneg(phydev);
308 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
309 /* A write to speed/duplex bits (that is performed by
310 * genphy_config_aneg() call above) must be followed by
311 * a software reset. Otherwise, the write has no effect.
313 err = genphy_soft_reset(phydev);
321 static int m88e1101_config_aneg(struct phy_device *phydev)
325 /* This Marvell PHY has an errata which requires
326 * that certain registers get written in order
327 * to restart autonegotiation
329 err = genphy_soft_reset(phydev);
333 err = phy_write(phydev, 0x1d, 0x1f);
337 err = phy_write(phydev, 0x1e, 0x200c);
341 err = phy_write(phydev, 0x1d, 0x5);
345 err = phy_write(phydev, 0x1e, 0);
349 err = phy_write(phydev, 0x1e, 0x100);
353 return marvell_config_aneg(phydev);
356 #ifdef CONFIG_OF_MDIO
357 /* Set and/or override some configuration registers based on the
358 * marvell,reg-init property stored in the of_node for the phydev.
360 * marvell,reg-init = <reg-page reg mask value>,...;
362 * There may be one or more sets of <reg-page reg mask value>:
364 * reg-page: which register bank to use.
366 * mask: if non-zero, ANDed with existing register value.
367 * value: ORed with the masked value and written to the regiser.
370 static int marvell_of_reg_init(struct phy_device *phydev)
373 int len, i, saved_page, current_page, ret = 0;
375 if (!phydev->mdio.dev.of_node)
378 paddr = of_get_property(phydev->mdio.dev.of_node,
379 "marvell,reg-init", &len);
380 if (!paddr || len < (4 * sizeof(*paddr)))
383 saved_page = phy_save_page(phydev);
386 current_page = saved_page;
388 len /= sizeof(*paddr);
389 for (i = 0; i < len - 3; i += 4) {
390 u16 page = be32_to_cpup(paddr + i);
391 u16 reg = be32_to_cpup(paddr + i + 1);
392 u16 mask = be32_to_cpup(paddr + i + 2);
393 u16 val_bits = be32_to_cpup(paddr + i + 3);
396 if (page != current_page) {
398 ret = marvell_write_page(phydev, page);
405 val = __phy_read(phydev, reg);
414 ret = __phy_write(phydev, reg, val);
419 return phy_restore_page(phydev, saved_page, ret);
422 static int marvell_of_reg_init(struct phy_device *phydev)
426 #endif /* CONFIG_OF_MDIO */
428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
434 MII_88E1121_PHY_MSCR_TX_DELAY;
435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
443 MII_88E1121_PHY_MSCR_REG,
444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
447 static int m88e1121_config_aneg(struct phy_device *phydev)
452 if (phy_interface_is_rgmii(phydev)) {
453 err = m88e1121_config_aneg_rgmii_delays(phydev);
458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
464 err = genphy_config_aneg(phydev);
468 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
469 /* A software reset is used to ensure a "commit" of the
472 err = genphy_soft_reset(phydev);
480 static int m88e1318_config_aneg(struct phy_device *phydev)
484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
485 MII_88E1318S_PHY_MSCR1_REG,
486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
490 return m88e1121_config_aneg(phydev);
494 * linkmode_adv_to_fiber_adv_t
495 * @advertise: the linkmode advertisement settings
497 * A small helper function that translates linkmode advertisement
498 * settings to phy autonegotiation advertisements for the MII_ADV
499 * register for fiber link.
501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
506 result |= ADVERTISE_FIBER_1000HALF;
507 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
508 result |= ADVERTISE_FIBER_1000FULL;
510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
511 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
512 result |= LPA_PAUSE_ASYM_FIBER;
513 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
514 result |= (ADVERTISE_PAUSE_FIBER
515 & (~ADVERTISE_PAUSE_ASYM_FIBER));
521 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
522 * @phydev: target phy_device struct
524 * Description: If auto-negotiation is enabled, we configure the
525 * advertising, and then restart auto-negotiation. If it is not
526 * enabled, then we write the BMCR. Adapted for fiber link in
527 * some Marvell's devices.
529 static int marvell_config_aneg_fiber(struct phy_device *phydev)
535 if (phydev->autoneg != AUTONEG_ENABLE)
536 return genphy_setup_forced(phydev);
538 /* Only allow advertising what this PHY supports */
539 linkmode_and(phydev->advertising, phydev->advertising,
542 /* Setup fiber advertisement */
543 adv = phy_read(phydev, MII_ADVERTISE);
548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
550 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
553 err = phy_write(phydev, MII_ADVERTISE, adv);
561 /* Advertisement hasn't changed, but maybe aneg was never on to
562 * begin with? Or maybe phy was isolated?
564 int ctl = phy_read(phydev, MII_BMCR);
569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
570 changed = 1; /* do restart aneg */
573 /* Only restart aneg if we are advertising something different
574 * than we were before.
577 changed = genphy_restart_aneg(phydev);
582 static int m88e1510_config_aneg(struct phy_device *phydev)
586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
590 /* Configure the copper link first */
591 err = m88e1318_config_aneg(phydev);
595 /* Do not touch the fiber page if we're in copper->sgmii mode */
596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
599 /* Then the fiber link */
600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
604 err = marvell_config_aneg_fiber(phydev);
608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
615 static void marvell_config_led(struct phy_device *phydev)
620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
624 def_config = MII_88E1121_PHY_LED_DEF;
626 /* Default PHY LED config:
627 * LED[0] .. 1000Mbps Link
628 * LED[1] .. 100Mbps Link
629 * LED[2] .. Blink, Activity
631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
632 def_config = MII_88E1510_PHY_LED_DEF;
638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
641 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
644 static int marvell_config_init(struct phy_device *phydev)
646 /* Set defalut LED */
647 marvell_config_led(phydev);
649 /* Set registers from marvell,reg-init DT property */
650 return marvell_of_reg_init(phydev);
653 static int m88e1116r_config_init(struct phy_device *phydev)
657 err = genphy_soft_reset(phydev);
663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
671 err = marvell_set_downshift(phydev, true, 8);
675 if (phy_interface_is_rgmii(phydev)) {
676 err = m88e1121_config_aneg_rgmii_delays(phydev);
681 err = genphy_soft_reset(phydev);
685 return marvell_config_init(phydev);
688 static int m88e3016_config_init(struct phy_device *phydev)
692 /* Enable Scrambler and Auto-Crossover */
693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
694 MII_88E3016_DISABLE_SCRAMBLER,
695 MII_88E3016_AUTO_MDIX_CROSSOVER);
699 return marvell_config_init(phydev);
702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
704 int fibre_copper_auto)
706 if (fibre_copper_auto)
707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
710 MII_M1111_HWCFG_MODE_MASK |
711 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
712 MII_M1111_HWCFG_FIBER_COPPER_RES,
716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
723 delay = MII_M1111_RGMII_RX_DELAY;
724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
725 delay = MII_M1111_RGMII_TX_DELAY;
730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
735 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
740 err = m88e1111_config_init_rgmii_delays(phydev);
744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
748 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
758 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
762 err = m88e1111_config_init_hwcfg_mode(
764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
765 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
769 /* make sure copper is selected */
770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
773 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
777 err = m88e1111_config_init_rgmii_delays(phydev);
781 err = m88e1111_config_init_hwcfg_mode(
783 MII_M1111_HWCFG_MODE_RTBI,
784 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
789 err = genphy_soft_reset(phydev);
793 return m88e1111_config_init_hwcfg_mode(
795 MII_M1111_HWCFG_MODE_RTBI,
796 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
799 static int m88e1111_config_init(struct phy_device *phydev)
803 if (phy_interface_is_rgmii(phydev)) {
804 err = m88e1111_config_init_rgmii(phydev);
809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
810 err = m88e1111_config_init_sgmii(phydev);
815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
816 err = m88e1111_config_init_rtbi(phydev);
821 err = marvell_of_reg_init(phydev);
825 return genphy_soft_reset(phydev);
828 static int m88e1318_config_init(struct phy_device *phydev)
830 if (phy_interrupt_is_valid(phydev)) {
831 int err = phy_modify_paged(
832 phydev, MII_MARVELL_LED_PAGE,
833 MII_88E1318S_PHY_LED_TCR,
834 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
841 return marvell_config_init(phydev);
844 static int m88e1510_config_init(struct phy_device *phydev)
848 /* SGMII-to-Copper mode initialization */
849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
852 err = marvell_set_page(phydev, 18);
856 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
857 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
858 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
859 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
863 /* PHY reset is necessary after changing MODE[2:0] */
864 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
865 MII_88E1510_GEN_CTRL_REG_1_RESET);
869 /* Reset page selection */
870 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
874 /* There appears to be a bug in the 88e1512 when used in
875 * SGMII to copper mode, where the AN advertisement register
876 * clears the pause bits each time a negotiation occurs.
877 * This means we can never be truely sure what was advertised,
878 * so disable Pause support.
880 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
882 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
884 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
885 phydev->advertising);
886 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
887 phydev->advertising);
890 return m88e1318_config_init(phydev);
893 static int m88e1118_config_aneg(struct phy_device *phydev)
897 err = genphy_soft_reset(phydev);
901 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
905 err = genphy_config_aneg(phydev);
909 static int m88e1118_config_init(struct phy_device *phydev)
914 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
918 /* Enable 1000 Mbit */
919 err = phy_write(phydev, 0x15, 0x1070);
924 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
928 /* Adjust LED Control */
929 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
930 err = phy_write(phydev, 0x10, 0x1100);
932 err = phy_write(phydev, 0x10, 0x021e);
936 err = marvell_of_reg_init(phydev);
941 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
945 return genphy_soft_reset(phydev);
948 static int m88e1149_config_init(struct phy_device *phydev)
953 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
957 /* Enable 1000 Mbit */
958 err = phy_write(phydev, 0x15, 0x1048);
962 err = marvell_of_reg_init(phydev);
967 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
971 return genphy_soft_reset(phydev);
974 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
978 err = m88e1111_config_init_rgmii_delays(phydev);
982 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
983 err = phy_write(phydev, 0x1d, 0x0012);
987 err = phy_modify(phydev, 0x1e, 0x0fc0,
988 2 << 9 | /* 36 ohm */
989 2 << 6); /* 39 ohm */
993 err = phy_write(phydev, 0x1d, 0x3);
997 err = phy_write(phydev, 0x1e, 0x8000);
1002 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1004 return m88e1111_config_init_hwcfg_mode(
1005 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1006 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1009 static int m88e1145_config_init(struct phy_device *phydev)
1013 /* Take care of errata E0 & E1 */
1014 err = phy_write(phydev, 0x1d, 0x001b);
1018 err = phy_write(phydev, 0x1e, 0x418f);
1022 err = phy_write(phydev, 0x1d, 0x0016);
1026 err = phy_write(phydev, 0x1e, 0xa2da);
1030 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1031 err = m88e1145_config_init_rgmii(phydev);
1036 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1037 err = m88e1145_config_init_sgmii(phydev);
1042 err = marvell_of_reg_init(phydev);
1050 * fiber_lpa_mod_linkmode_lpa_t
1051 * @advertising: the linkmode advertisement settings
1052 * @lpa: value of the MII_LPA register for fiber link
1054 * A small helper function that translates MII_LPA bits to linkmode LP
1055 * advertisement settings. Other bits in advertising are left
1058 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1060 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1061 advertising, lpa & LPA_FIBER_1000HALF);
1063 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1064 advertising, lpa & LPA_FIBER_1000FULL);
1068 * marvell_update_link - update link status in real time in @phydev
1069 * @phydev: target phy_device struct
1071 * Description: Update the value in phydev->link to reflect the
1072 * current link value.
1074 static int marvell_update_link(struct phy_device *phydev, int fiber)
1078 /* Use the generic register for copper link, or specific
1079 * register for fiber case
1082 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1086 if ((status & REGISTER_LINK_STATUS) == 0)
1091 return genphy_update_link(phydev);
1097 static int marvell_read_status_page_an(struct phy_device *phydev,
1104 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1108 lpa = phy_read(phydev, MII_LPA);
1112 lpagb = phy_read(phydev, MII_STAT1000);
1116 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1117 phydev->duplex = DUPLEX_FULL;
1119 phydev->duplex = DUPLEX_HALF;
1121 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1123 phydev->asym_pause = 0;
1126 case MII_M1011_PHY_STATUS_1000:
1127 phydev->speed = SPEED_1000;
1130 case MII_M1011_PHY_STATUS_100:
1131 phydev->speed = SPEED_100;
1135 phydev->speed = SPEED_10;
1140 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
1141 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb);
1143 if (phydev->duplex == DUPLEX_FULL) {
1144 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1145 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1148 /* The fiber link is only 1000M capable */
1149 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1151 if (phydev->duplex == DUPLEX_FULL) {
1152 if (!(lpa & LPA_PAUSE_FIBER)) {
1154 phydev->asym_pause = 0;
1155 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1157 phydev->asym_pause = 1;
1160 phydev->asym_pause = 0;
1167 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1169 int bmcr = phy_read(phydev, MII_BMCR);
1174 if (bmcr & BMCR_FULLDPLX)
1175 phydev->duplex = DUPLEX_FULL;
1177 phydev->duplex = DUPLEX_HALF;
1179 if (bmcr & BMCR_SPEED1000)
1180 phydev->speed = SPEED_1000;
1181 else if (bmcr & BMCR_SPEED100)
1182 phydev->speed = SPEED_100;
1184 phydev->speed = SPEED_10;
1187 phydev->asym_pause = 0;
1188 linkmode_zero(phydev->lp_advertising);
1193 /* marvell_read_status_page
1196 * Check the link, then figure out the current state
1197 * by comparing what we advertise with what the link partner
1198 * advertises. Start by checking the gigabit possibilities,
1199 * then move on to 10/100.
1201 static int marvell_read_status_page(struct phy_device *phydev, int page)
1206 /* Detect and update the link, but return if there
1209 if (page == MII_MARVELL_FIBER_PAGE)
1214 err = marvell_update_link(phydev, fiber);
1218 if (phydev->autoneg == AUTONEG_ENABLE)
1219 err = marvell_read_status_page_an(phydev, fiber);
1221 err = marvell_read_status_page_fixed(phydev);
1226 /* marvell_read_status
1228 * Some Marvell's phys have two modes: fiber and copper.
1229 * Both need status checked.
1231 * First, check the fiber link and status.
1232 * If the fiber link is down, check the copper link and status which
1233 * will be the default value if both link are down.
1235 static int marvell_read_status(struct phy_device *phydev)
1239 /* Check the fiber mode first */
1240 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1241 phydev->supported) &&
1242 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1243 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1247 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1251 /* If the fiber link is up, it is the selected and
1252 * used link. In this case, we need to stay in the
1253 * fiber page. Please to be careful about that, avoid
1254 * to restore Copper page in other functions which
1255 * could break the behaviour for some fiber phy like
1261 /* If fiber link is down, check and save copper mode state */
1262 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1267 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1270 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1276 * Some Marvell's phys have two modes: fiber and copper.
1277 * Both need to be suspended
1279 static int marvell_suspend(struct phy_device *phydev)
1283 /* Suspend the fiber mode first */
1284 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1285 phydev->supported)) {
1286 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1290 /* With the page set, use the generic suspend */
1291 err = genphy_suspend(phydev);
1295 /* Then, the copper link */
1296 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1301 /* With the page set, use the generic suspend */
1302 return genphy_suspend(phydev);
1305 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1311 * Some Marvell's phys have two modes: fiber and copper.
1312 * Both need to be resumed
1314 static int marvell_resume(struct phy_device *phydev)
1318 /* Resume the fiber mode first */
1319 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1320 phydev->supported)) {
1321 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1325 /* With the page set, use the generic resume */
1326 err = genphy_resume(phydev);
1330 /* Then, the copper link */
1331 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1336 /* With the page set, use the generic resume */
1337 return genphy_resume(phydev);
1340 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1344 static int marvell_aneg_done(struct phy_device *phydev)
1346 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1348 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1351 static int m88e1121_did_interrupt(struct phy_device *phydev)
1355 imask = phy_read(phydev, MII_M1011_IEVENT);
1357 if (imask & MII_M1011_IMASK_INIT)
1363 static void m88e1318_get_wol(struct phy_device *phydev,
1364 struct ethtool_wolinfo *wol)
1366 int oldpage, ret = 0;
1368 wol->supported = WAKE_MAGIC;
1371 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1375 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1376 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1377 wol->wolopts |= WAKE_MAGIC;
1380 phy_restore_page(phydev, oldpage, ret);
1383 static int m88e1318_set_wol(struct phy_device *phydev,
1384 struct ethtool_wolinfo *wol)
1386 int err = 0, oldpage;
1388 oldpage = phy_save_page(phydev);
1392 if (wol->wolopts & WAKE_MAGIC) {
1393 /* Explicitly switch to page 0x00, just to be sure */
1394 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1398 /* If WOL event happened once, the LED[2] interrupt pin
1399 * will not be cleared unless we reading the interrupt status
1400 * register. If interrupts are in use, the normal interrupt
1401 * handling will clear the WOL event. Clear the WOL event
1402 * before enabling it if !phy_interrupt_is_valid()
1404 if (!phy_interrupt_is_valid(phydev))
1405 phy_read(phydev, MII_M1011_IEVENT);
1407 /* Enable the WOL interrupt */
1408 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1409 MII_88E1318S_PHY_CSIER_WOL_EIE);
1413 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1417 /* Setup LED[2] as interrupt pin (active low) */
1418 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1419 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1420 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1421 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1425 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1429 /* Store the device address for the magic packet */
1430 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1431 ((phydev->attached_dev->dev_addr[5] << 8) |
1432 phydev->attached_dev->dev_addr[4]));
1435 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1436 ((phydev->attached_dev->dev_addr[3] << 8) |
1437 phydev->attached_dev->dev_addr[2]));
1440 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1441 ((phydev->attached_dev->dev_addr[1] << 8) |
1442 phydev->attached_dev->dev_addr[0]));
1446 /* Clear WOL status and enable magic packet matching */
1447 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1448 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1449 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1453 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1457 /* Clear WOL status and disable magic packet matching */
1458 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1459 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1460 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1466 return phy_restore_page(phydev, oldpage, err);
1469 static int marvell_get_sset_count(struct phy_device *phydev)
1471 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1473 return ARRAY_SIZE(marvell_hw_stats);
1475 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1478 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1482 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1483 strlcpy(data + i * ETH_GSTRING_LEN,
1484 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1488 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1490 struct marvell_hw_stat stat = marvell_hw_stats[i];
1491 struct marvell_priv *priv = phydev->priv;
1495 val = phy_read_paged(phydev, stat.page, stat.reg);
1499 val = val & ((1 << stat.bits) - 1);
1500 priv->stats[i] += val;
1501 ret = priv->stats[i];
1507 static void marvell_get_stats(struct phy_device *phydev,
1508 struct ethtool_stats *stats, u64 *data)
1512 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1513 data[i] = marvell_get_stat(phydev, i);
1517 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1525 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1529 /* Enable temperature sensor */
1530 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1534 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1535 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1539 /* Wait for temperature to stabilize */
1540 usleep_range(10000, 12000);
1542 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1548 /* Disable temperature sensor */
1549 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1550 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1554 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1557 return phy_restore_page(phydev, oldpage, ret);
1560 static int m88e1121_hwmon_read(struct device *dev,
1561 enum hwmon_sensor_types type,
1562 u32 attr, int channel, long *temp)
1564 struct phy_device *phydev = dev_get_drvdata(dev);
1568 case hwmon_temp_input:
1569 err = m88e1121_get_temp(phydev, temp);
1578 static umode_t m88e1121_hwmon_is_visible(const void *data,
1579 enum hwmon_sensor_types type,
1580 u32 attr, int channel)
1582 if (type != hwmon_temp)
1586 case hwmon_temp_input:
1593 static u32 m88e1121_hwmon_chip_config[] = {
1594 HWMON_C_REGISTER_TZ,
1598 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1600 .config = m88e1121_hwmon_chip_config,
1603 static u32 m88e1121_hwmon_temp_config[] = {
1608 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1610 .config = m88e1121_hwmon_temp_config,
1613 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1614 &m88e1121_hwmon_chip,
1615 &m88e1121_hwmon_temp,
1619 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1620 .is_visible = m88e1121_hwmon_is_visible,
1621 .read = m88e1121_hwmon_read,
1624 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1625 .ops = &m88e1121_hwmon_hwmon_ops,
1626 .info = m88e1121_hwmon_info,
1629 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1635 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1636 MII_88E1510_TEMP_SENSOR);
1640 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1645 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1651 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1652 MII_88E1121_MISC_TEST);
1656 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1657 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1664 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1667 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1669 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1670 MII_88E1121_MISC_TEST,
1671 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1672 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1675 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1681 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1682 MII_88E1121_MISC_TEST);
1686 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1691 static int m88e1510_hwmon_read(struct device *dev,
1692 enum hwmon_sensor_types type,
1693 u32 attr, int channel, long *temp)
1695 struct phy_device *phydev = dev_get_drvdata(dev);
1699 case hwmon_temp_input:
1700 err = m88e1510_get_temp(phydev, temp);
1702 case hwmon_temp_crit:
1703 err = m88e1510_get_temp_critical(phydev, temp);
1705 case hwmon_temp_max_alarm:
1706 err = m88e1510_get_temp_alarm(phydev, temp);
1715 static int m88e1510_hwmon_write(struct device *dev,
1716 enum hwmon_sensor_types type,
1717 u32 attr, int channel, long temp)
1719 struct phy_device *phydev = dev_get_drvdata(dev);
1723 case hwmon_temp_crit:
1724 err = m88e1510_set_temp_critical(phydev, temp);
1732 static umode_t m88e1510_hwmon_is_visible(const void *data,
1733 enum hwmon_sensor_types type,
1734 u32 attr, int channel)
1736 if (type != hwmon_temp)
1740 case hwmon_temp_input:
1741 case hwmon_temp_max_alarm:
1743 case hwmon_temp_crit:
1750 static u32 m88e1510_hwmon_temp_config[] = {
1751 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1755 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1757 .config = m88e1510_hwmon_temp_config,
1760 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1761 &m88e1121_hwmon_chip,
1762 &m88e1510_hwmon_temp,
1766 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1767 .is_visible = m88e1510_hwmon_is_visible,
1768 .read = m88e1510_hwmon_read,
1769 .write = m88e1510_hwmon_write,
1772 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1773 .ops = &m88e1510_hwmon_hwmon_ops,
1774 .info = m88e1510_hwmon_info,
1777 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1786 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1790 /* Enable temperature sensor */
1791 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1795 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1796 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1797 MII_88E6390_MISC_TEST_SAMPLE_1S;
1799 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1803 /* Wait for temperature to stabilize */
1804 usleep_range(10000, 12000);
1806 /* Reading the temperature sense has an errata. You need to read
1807 * a number of times and take an average.
1809 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1810 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1813 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1816 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1817 *temp = (sum - 75) * 1000;
1819 /* Disable temperature sensor */
1820 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1824 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1825 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1827 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1830 phy_restore_page(phydev, oldpage, ret);
1835 static int m88e6390_hwmon_read(struct device *dev,
1836 enum hwmon_sensor_types type,
1837 u32 attr, int channel, long *temp)
1839 struct phy_device *phydev = dev_get_drvdata(dev);
1843 case hwmon_temp_input:
1844 err = m88e6390_get_temp(phydev, temp);
1853 static umode_t m88e6390_hwmon_is_visible(const void *data,
1854 enum hwmon_sensor_types type,
1855 u32 attr, int channel)
1857 if (type != hwmon_temp)
1861 case hwmon_temp_input:
1868 static u32 m88e6390_hwmon_temp_config[] = {
1873 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1875 .config = m88e6390_hwmon_temp_config,
1878 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1879 &m88e1121_hwmon_chip,
1880 &m88e6390_hwmon_temp,
1884 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1885 .is_visible = m88e6390_hwmon_is_visible,
1886 .read = m88e6390_hwmon_read,
1889 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1890 .ops = &m88e6390_hwmon_hwmon_ops,
1891 .info = m88e6390_hwmon_info,
1894 static int marvell_hwmon_name(struct phy_device *phydev)
1896 struct marvell_priv *priv = phydev->priv;
1897 struct device *dev = &phydev->mdio.dev;
1898 const char *devname = dev_name(dev);
1899 size_t len = strlen(devname);
1902 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1903 if (!priv->hwmon_name)
1906 for (i = j = 0; i < len && devname[i]; i++) {
1907 if (isalnum(devname[i]))
1908 priv->hwmon_name[j++] = devname[i];
1914 static int marvell_hwmon_probe(struct phy_device *phydev,
1915 const struct hwmon_chip_info *chip)
1917 struct marvell_priv *priv = phydev->priv;
1918 struct device *dev = &phydev->mdio.dev;
1921 err = marvell_hwmon_name(phydev);
1925 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1926 dev, priv->hwmon_name, phydev, chip, NULL);
1928 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1931 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1933 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1936 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1938 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1941 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1943 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1946 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1951 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1956 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1962 static int marvell_probe(struct phy_device *phydev)
1964 struct marvell_priv *priv;
1966 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1970 phydev->priv = priv;
1975 static int m88e1121_probe(struct phy_device *phydev)
1979 err = marvell_probe(phydev);
1983 return m88e1121_hwmon_probe(phydev);
1986 static int m88e1510_probe(struct phy_device *phydev)
1990 err = marvell_probe(phydev);
1994 return m88e1510_hwmon_probe(phydev);
1997 static int m88e6390_probe(struct phy_device *phydev)
2001 err = marvell_probe(phydev);
2005 return m88e6390_hwmon_probe(phydev);
2008 static struct phy_driver marvell_drivers[] = {
2010 .phy_id = MARVELL_PHY_ID_88E1101,
2011 .phy_id_mask = MARVELL_PHY_ID_MASK,
2012 .name = "Marvell 88E1101",
2013 .features = PHY_GBIT_FEATURES,
2014 .probe = marvell_probe,
2015 .config_init = &marvell_config_init,
2016 .config_aneg = &m88e1101_config_aneg,
2017 .ack_interrupt = &marvell_ack_interrupt,
2018 .config_intr = &marvell_config_intr,
2019 .resume = &genphy_resume,
2020 .suspend = &genphy_suspend,
2021 .read_page = marvell_read_page,
2022 .write_page = marvell_write_page,
2023 .get_sset_count = marvell_get_sset_count,
2024 .get_strings = marvell_get_strings,
2025 .get_stats = marvell_get_stats,
2028 .phy_id = MARVELL_PHY_ID_88E1112,
2029 .phy_id_mask = MARVELL_PHY_ID_MASK,
2030 .name = "Marvell 88E1112",
2031 .features = PHY_GBIT_FEATURES,
2032 .probe = marvell_probe,
2033 .config_init = &m88e1111_config_init,
2034 .config_aneg = &marvell_config_aneg,
2035 .ack_interrupt = &marvell_ack_interrupt,
2036 .config_intr = &marvell_config_intr,
2037 .resume = &genphy_resume,
2038 .suspend = &genphy_suspend,
2039 .read_page = marvell_read_page,
2040 .write_page = marvell_write_page,
2041 .get_sset_count = marvell_get_sset_count,
2042 .get_strings = marvell_get_strings,
2043 .get_stats = marvell_get_stats,
2046 .phy_id = MARVELL_PHY_ID_88E1111,
2047 .phy_id_mask = MARVELL_PHY_ID_MASK,
2048 .name = "Marvell 88E1111",
2049 .features = PHY_GBIT_FEATURES,
2050 .probe = marvell_probe,
2051 .config_init = &m88e1111_config_init,
2052 .config_aneg = &marvell_config_aneg,
2053 .read_status = &marvell_read_status,
2054 .ack_interrupt = &marvell_ack_interrupt,
2055 .config_intr = &marvell_config_intr,
2056 .resume = &genphy_resume,
2057 .suspend = &genphy_suspend,
2058 .read_page = marvell_read_page,
2059 .write_page = marvell_write_page,
2060 .get_sset_count = marvell_get_sset_count,
2061 .get_strings = marvell_get_strings,
2062 .get_stats = marvell_get_stats,
2065 .phy_id = MARVELL_PHY_ID_88E1118,
2066 .phy_id_mask = MARVELL_PHY_ID_MASK,
2067 .name = "Marvell 88E1118",
2068 .features = PHY_GBIT_FEATURES,
2069 .probe = marvell_probe,
2070 .config_init = &m88e1118_config_init,
2071 .config_aneg = &m88e1118_config_aneg,
2072 .ack_interrupt = &marvell_ack_interrupt,
2073 .config_intr = &marvell_config_intr,
2074 .resume = &genphy_resume,
2075 .suspend = &genphy_suspend,
2076 .read_page = marvell_read_page,
2077 .write_page = marvell_write_page,
2078 .get_sset_count = marvell_get_sset_count,
2079 .get_strings = marvell_get_strings,
2080 .get_stats = marvell_get_stats,
2083 .phy_id = MARVELL_PHY_ID_88E1121R,
2084 .phy_id_mask = MARVELL_PHY_ID_MASK,
2085 .name = "Marvell 88E1121R",
2086 .features = PHY_GBIT_FEATURES,
2087 .probe = &m88e1121_probe,
2088 .config_init = &marvell_config_init,
2089 .config_aneg = &m88e1121_config_aneg,
2090 .read_status = &marvell_read_status,
2091 .ack_interrupt = &marvell_ack_interrupt,
2092 .config_intr = &marvell_config_intr,
2093 .did_interrupt = &m88e1121_did_interrupt,
2094 .resume = &genphy_resume,
2095 .suspend = &genphy_suspend,
2096 .read_page = marvell_read_page,
2097 .write_page = marvell_write_page,
2098 .get_sset_count = marvell_get_sset_count,
2099 .get_strings = marvell_get_strings,
2100 .get_stats = marvell_get_stats,
2103 .phy_id = MARVELL_PHY_ID_88E1318S,
2104 .phy_id_mask = MARVELL_PHY_ID_MASK,
2105 .name = "Marvell 88E1318S",
2106 .features = PHY_GBIT_FEATURES,
2107 .probe = marvell_probe,
2108 .config_init = &m88e1318_config_init,
2109 .config_aneg = &m88e1318_config_aneg,
2110 .read_status = &marvell_read_status,
2111 .ack_interrupt = &marvell_ack_interrupt,
2112 .config_intr = &marvell_config_intr,
2113 .did_interrupt = &m88e1121_did_interrupt,
2114 .get_wol = &m88e1318_get_wol,
2115 .set_wol = &m88e1318_set_wol,
2116 .resume = &genphy_resume,
2117 .suspend = &genphy_suspend,
2118 .read_page = marvell_read_page,
2119 .write_page = marvell_write_page,
2120 .get_sset_count = marvell_get_sset_count,
2121 .get_strings = marvell_get_strings,
2122 .get_stats = marvell_get_stats,
2125 .phy_id = MARVELL_PHY_ID_88E1145,
2126 .phy_id_mask = MARVELL_PHY_ID_MASK,
2127 .name = "Marvell 88E1145",
2128 .features = PHY_GBIT_FEATURES,
2129 .probe = marvell_probe,
2130 .config_init = &m88e1145_config_init,
2131 .config_aneg = &m88e1101_config_aneg,
2132 .read_status = &genphy_read_status,
2133 .ack_interrupt = &marvell_ack_interrupt,
2134 .config_intr = &marvell_config_intr,
2135 .resume = &genphy_resume,
2136 .suspend = &genphy_suspend,
2137 .read_page = marvell_read_page,
2138 .write_page = marvell_write_page,
2139 .get_sset_count = marvell_get_sset_count,
2140 .get_strings = marvell_get_strings,
2141 .get_stats = marvell_get_stats,
2144 .phy_id = MARVELL_PHY_ID_88E1149R,
2145 .phy_id_mask = MARVELL_PHY_ID_MASK,
2146 .name = "Marvell 88E1149R",
2147 .features = PHY_GBIT_FEATURES,
2148 .probe = marvell_probe,
2149 .config_init = &m88e1149_config_init,
2150 .config_aneg = &m88e1118_config_aneg,
2151 .ack_interrupt = &marvell_ack_interrupt,
2152 .config_intr = &marvell_config_intr,
2153 .resume = &genphy_resume,
2154 .suspend = &genphy_suspend,
2155 .read_page = marvell_read_page,
2156 .write_page = marvell_write_page,
2157 .get_sset_count = marvell_get_sset_count,
2158 .get_strings = marvell_get_strings,
2159 .get_stats = marvell_get_stats,
2162 .phy_id = MARVELL_PHY_ID_88E1240,
2163 .phy_id_mask = MARVELL_PHY_ID_MASK,
2164 .name = "Marvell 88E1240",
2165 .features = PHY_GBIT_FEATURES,
2166 .probe = marvell_probe,
2167 .config_init = &m88e1111_config_init,
2168 .config_aneg = &marvell_config_aneg,
2169 .ack_interrupt = &marvell_ack_interrupt,
2170 .config_intr = &marvell_config_intr,
2171 .resume = &genphy_resume,
2172 .suspend = &genphy_suspend,
2173 .read_page = marvell_read_page,
2174 .write_page = marvell_write_page,
2175 .get_sset_count = marvell_get_sset_count,
2176 .get_strings = marvell_get_strings,
2177 .get_stats = marvell_get_stats,
2180 .phy_id = MARVELL_PHY_ID_88E1116R,
2181 .phy_id_mask = MARVELL_PHY_ID_MASK,
2182 .name = "Marvell 88E1116R",
2183 .features = PHY_GBIT_FEATURES,
2184 .probe = marvell_probe,
2185 .config_init = &m88e1116r_config_init,
2186 .ack_interrupt = &marvell_ack_interrupt,
2187 .config_intr = &marvell_config_intr,
2188 .resume = &genphy_resume,
2189 .suspend = &genphy_suspend,
2190 .read_page = marvell_read_page,
2191 .write_page = marvell_write_page,
2192 .get_sset_count = marvell_get_sset_count,
2193 .get_strings = marvell_get_strings,
2194 .get_stats = marvell_get_stats,
2197 .phy_id = MARVELL_PHY_ID_88E1510,
2198 .phy_id_mask = MARVELL_PHY_ID_MASK,
2199 .name = "Marvell 88E1510",
2200 .features = PHY_GBIT_FIBRE_FEATURES,
2201 .probe = &m88e1510_probe,
2202 .config_init = &m88e1510_config_init,
2203 .config_aneg = &m88e1510_config_aneg,
2204 .read_status = &marvell_read_status,
2205 .ack_interrupt = &marvell_ack_interrupt,
2206 .config_intr = &marvell_config_intr,
2207 .did_interrupt = &m88e1121_did_interrupt,
2208 .get_wol = &m88e1318_get_wol,
2209 .set_wol = &m88e1318_set_wol,
2210 .resume = &marvell_resume,
2211 .suspend = &marvell_suspend,
2212 .read_page = marvell_read_page,
2213 .write_page = marvell_write_page,
2214 .get_sset_count = marvell_get_sset_count,
2215 .get_strings = marvell_get_strings,
2216 .get_stats = marvell_get_stats,
2217 .set_loopback = genphy_loopback,
2220 .phy_id = MARVELL_PHY_ID_88E1540,
2221 .phy_id_mask = MARVELL_PHY_ID_MASK,
2222 .name = "Marvell 88E1540",
2223 .features = PHY_GBIT_FEATURES,
2224 .probe = m88e1510_probe,
2225 .config_init = &marvell_config_init,
2226 .config_aneg = &m88e1510_config_aneg,
2227 .read_status = &marvell_read_status,
2228 .ack_interrupt = &marvell_ack_interrupt,
2229 .config_intr = &marvell_config_intr,
2230 .did_interrupt = &m88e1121_did_interrupt,
2231 .resume = &genphy_resume,
2232 .suspend = &genphy_suspend,
2233 .read_page = marvell_read_page,
2234 .write_page = marvell_write_page,
2235 .get_sset_count = marvell_get_sset_count,
2236 .get_strings = marvell_get_strings,
2237 .get_stats = marvell_get_stats,
2240 .phy_id = MARVELL_PHY_ID_88E1545,
2241 .phy_id_mask = MARVELL_PHY_ID_MASK,
2242 .name = "Marvell 88E1545",
2243 .probe = m88e1510_probe,
2244 .features = PHY_GBIT_FEATURES,
2245 .config_init = &marvell_config_init,
2246 .config_aneg = &m88e1510_config_aneg,
2247 .read_status = &marvell_read_status,
2248 .ack_interrupt = &marvell_ack_interrupt,
2249 .config_intr = &marvell_config_intr,
2250 .did_interrupt = &m88e1121_did_interrupt,
2251 .resume = &genphy_resume,
2252 .suspend = &genphy_suspend,
2253 .read_page = marvell_read_page,
2254 .write_page = marvell_write_page,
2255 .get_sset_count = marvell_get_sset_count,
2256 .get_strings = marvell_get_strings,
2257 .get_stats = marvell_get_stats,
2260 .phy_id = MARVELL_PHY_ID_88E3016,
2261 .phy_id_mask = MARVELL_PHY_ID_MASK,
2262 .name = "Marvell 88E3016",
2263 .features = PHY_BASIC_FEATURES,
2264 .probe = marvell_probe,
2265 .config_init = &m88e3016_config_init,
2266 .aneg_done = &marvell_aneg_done,
2267 .read_status = &marvell_read_status,
2268 .ack_interrupt = &marvell_ack_interrupt,
2269 .config_intr = &marvell_config_intr,
2270 .did_interrupt = &m88e1121_did_interrupt,
2271 .resume = &genphy_resume,
2272 .suspend = &genphy_suspend,
2273 .read_page = marvell_read_page,
2274 .write_page = marvell_write_page,
2275 .get_sset_count = marvell_get_sset_count,
2276 .get_strings = marvell_get_strings,
2277 .get_stats = marvell_get_stats,
2280 .phy_id = MARVELL_PHY_ID_88E6390,
2281 .phy_id_mask = MARVELL_PHY_ID_MASK,
2282 .name = "Marvell 88E6390",
2283 .features = PHY_GBIT_FEATURES,
2284 .probe = m88e6390_probe,
2285 .config_init = &marvell_config_init,
2286 .config_aneg = &m88e1510_config_aneg,
2287 .read_status = &marvell_read_status,
2288 .ack_interrupt = &marvell_ack_interrupt,
2289 .config_intr = &marvell_config_intr,
2290 .did_interrupt = &m88e1121_did_interrupt,
2291 .resume = &genphy_resume,
2292 .suspend = &genphy_suspend,
2293 .read_page = marvell_read_page,
2294 .write_page = marvell_write_page,
2295 .get_sset_count = marvell_get_sset_count,
2296 .get_strings = marvell_get_strings,
2297 .get_stats = marvell_get_stats,
2301 module_phy_driver(marvell_drivers);
2303 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2304 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2305 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2306 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2307 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2308 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2309 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2310 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2311 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2312 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2313 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2314 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2315 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2316 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2317 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2318 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2322 MODULE_DEVICE_TABLE(mdio, marvell_tbl);