2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
41 #include <linux/uaccess.h>
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
99 #define MII_88E1318S_PHY_MSCR1_REG 16
100 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
102 /* Copper Specific Interrupt Enable Register */
103 #define MII_88E1318S_PHY_CSIER 0x12
104 /* WOL Event Interrupt Enable */
105 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
107 /* LED Timer Control Register */
108 #define MII_88E1318S_PHY_LED_TCR 0x12
109 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
113 /* Magic Packet MAC address registers */
114 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
118 #define MII_88E1318S_PHY_WOL_CTRL 0x10
119 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
122 #define MII_88E1121_PHY_LED_CTRL 16
123 #define MII_88E1121_PHY_LED_DEF 0x0030
125 #define MII_M1011_PHY_STATUS 0x11
126 #define MII_M1011_PHY_STATUS_1000 0x8000
127 #define MII_M1011_PHY_STATUS_100 0x4000
128 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131 #define MII_M1011_PHY_STATUS_LINK 0x0400
133 #define MII_88E3016_PHY_SPEC_CTRL 0x10
134 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
137 #define MII_88E1510_GEN_CTRL_REG_1 0x14
138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
142 #define LPA_FIBER_1000HALF 0x40
143 #define LPA_FIBER_1000FULL 0x20
145 #define LPA_PAUSE_FIBER 0x180
146 #define LPA_PAUSE_ASYM_FIBER 0x100
148 #define ADVERTISE_FIBER_1000HALF 0x40
149 #define ADVERTISE_FIBER_1000FULL 0x20
151 #define ADVERTISE_PAUSE_FIBER 0x180
152 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
154 #define REGISTER_LINK_STATUS 0x400
155 #define NB_FIBER_STATS 1
157 MODULE_DESCRIPTION("Marvell PHY driver");
158 MODULE_AUTHOR("Andy Fleming");
159 MODULE_LICENSE("GPL");
161 struct marvell_hw_stat {
168 static struct marvell_hw_stat marvell_hw_stats[] = {
169 { "phy_receive_errors_copper", 0, 21, 16},
170 { "phy_idle_errors", 0, 10, 8 },
171 { "phy_receive_errors_fiber", 1, 21, 16},
174 struct marvell_priv {
175 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
177 struct device *hwmon_dev;
180 static int marvell_get_page(struct phy_device *phydev)
182 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
185 static int marvell_set_page(struct phy_device *phydev, int page)
187 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
190 static int marvell_get_set_page(struct phy_device *phydev, int page)
192 int oldpage = marvell_get_page(phydev);
198 return marvell_set_page(phydev, page);
203 static int marvell_ack_interrupt(struct phy_device *phydev)
207 /* Clear the interrupts by reading the reg */
208 err = phy_read(phydev, MII_M1011_IEVENT);
216 static int marvell_config_intr(struct phy_device *phydev)
220 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
221 err = phy_write(phydev, MII_M1011_IMASK,
222 MII_M1011_IMASK_INIT);
224 err = phy_write(phydev, MII_M1011_IMASK,
225 MII_M1011_IMASK_CLEAR);
230 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
236 /* get the current settings */
237 reg = phy_read(phydev, MII_M1011_PHY_SCR);
242 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
245 val |= MII_M1011_PHY_SCR_MDI;
248 val |= MII_M1011_PHY_SCR_MDI_X;
250 case ETH_TP_MDI_AUTO:
251 case ETH_TP_MDI_INVALID:
253 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
258 /* Set the new polarity value in the register */
259 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
267 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
272 reg = phy_read(phydev, MII_M1011_PHY_SCR);
276 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
277 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
279 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
281 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
284 static int marvell_config_aneg(struct phy_device *phydev)
288 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
292 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
293 MII_M1111_PHY_LED_DIRECT);
297 err = genphy_config_aneg(phydev);
301 if (phydev->autoneg != AUTONEG_ENABLE) {
302 /* A write to speed/duplex bits (that is performed by
303 * genphy_config_aneg() call above) must be followed by
304 * a software reset. Otherwise, the write has no effect.
306 err = genphy_soft_reset(phydev);
314 static int m88e1101_config_aneg(struct phy_device *phydev)
318 /* This Marvell PHY has an errata which requires
319 * that certain registers get written in order
320 * to restart autonegotiation
322 err = genphy_soft_reset(phydev);
326 err = phy_write(phydev, 0x1d, 0x1f);
330 err = phy_write(phydev, 0x1e, 0x200c);
334 err = phy_write(phydev, 0x1d, 0x5);
338 err = phy_write(phydev, 0x1e, 0);
342 err = phy_write(phydev, 0x1e, 0x100);
346 return marvell_config_aneg(phydev);
349 static int m88e1111_config_aneg(struct phy_device *phydev)
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
357 err = genphy_soft_reset(phydev);
359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
364 MII_M1111_PHY_LED_DIRECT);
368 err = genphy_config_aneg(phydev);
372 if (phydev->autoneg != AUTONEG_ENABLE) {
373 /* A write to speed/duplex bits (that is performed by
374 * genphy_config_aneg() call above) must be followed by
375 * a software reset. Otherwise, the write has no effect.
377 err = genphy_soft_reset(phydev);
385 #ifdef CONFIG_OF_MDIO
386 /* Set and/or override some configuration registers based on the
387 * marvell,reg-init property stored in the of_node for the phydev.
389 * marvell,reg-init = <reg-page reg mask value>,...;
391 * There may be one or more sets of <reg-page reg mask value>:
393 * reg-page: which register bank to use.
395 * mask: if non-zero, ANDed with existing register value.
396 * value: ORed with the masked value and written to the regiser.
399 static int marvell_of_reg_init(struct phy_device *phydev)
402 int len, i, saved_page, current_page, ret;
404 if (!phydev->mdio.dev.of_node)
407 paddr = of_get_property(phydev->mdio.dev.of_node,
408 "marvell,reg-init", &len);
409 if (!paddr || len < (4 * sizeof(*paddr)))
412 saved_page = marvell_get_page(phydev);
415 current_page = saved_page;
418 len /= sizeof(*paddr);
419 for (i = 0; i < len - 3; i += 4) {
420 u16 page = be32_to_cpup(paddr + i);
421 u16 reg = be32_to_cpup(paddr + i + 1);
422 u16 mask = be32_to_cpup(paddr + i + 2);
423 u16 val_bits = be32_to_cpup(paddr + i + 3);
426 if (page != current_page) {
428 ret = marvell_set_page(phydev, page);
435 val = phy_read(phydev, reg);
444 ret = phy_write(phydev, reg, val);
449 if (current_page != saved_page) {
450 i = marvell_set_page(phydev, saved_page);
457 static int marvell_of_reg_init(struct phy_device *phydev)
461 #endif /* CONFIG_OF_MDIO */
463 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
465 int err, oldpage, mscr;
467 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
471 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
477 mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
479 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
480 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
481 MII_88E1121_PHY_MSCR_TX_DELAY);
482 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
483 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
485 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
487 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
490 marvell_set_page(phydev, oldpage);
495 static int m88e1121_config_aneg(struct phy_device *phydev)
499 if (phy_interface_is_rgmii(phydev)) {
500 err = m88e1121_config_aneg_rgmii_delays(phydev);
505 err = genphy_soft_reset(phydev);
509 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
513 return genphy_config_aneg(phydev);
516 static int m88e1318_config_aneg(struct phy_device *phydev)
518 int err, oldpage, mscr;
520 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
524 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
525 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
527 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
531 err = marvell_set_page(phydev, oldpage);
535 return m88e1121_config_aneg(phydev);
539 * ethtool_adv_to_fiber_adv_t
540 * @ethadv: the ethtool advertisement settings
542 * A small helper function that translates ethtool advertisement
543 * settings to phy autonegotiation advertisements for the
544 * MII_ADV register for fiber link.
546 static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
550 if (ethadv & ADVERTISED_1000baseT_Half)
551 result |= ADVERTISE_FIBER_1000HALF;
552 if (ethadv & ADVERTISED_1000baseT_Full)
553 result |= ADVERTISE_FIBER_1000FULL;
555 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
556 result |= LPA_PAUSE_ASYM_FIBER;
557 else if (ethadv & ADVERTISE_PAUSE_CAP)
558 result |= (ADVERTISE_PAUSE_FIBER
559 & (~ADVERTISE_PAUSE_ASYM_FIBER));
565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
566 * @phydev: target phy_device struct
568 * Description: If auto-negotiation is enabled, we configure the
569 * advertising, and then restart auto-negotiation. If it is not
570 * enabled, then we write the BMCR. Adapted for fiber link in
571 * some Marvell's devices.
573 static int marvell_config_aneg_fiber(struct phy_device *phydev)
580 if (phydev->autoneg != AUTONEG_ENABLE)
581 return genphy_setup_forced(phydev);
583 /* Only allow advertising what this PHY supports */
584 phydev->advertising &= phydev->supported;
585 advertise = phydev->advertising;
587 /* Setup fiber advertisement */
588 adv = phy_read(phydev, MII_ADVERTISE);
593 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
595 adv |= ethtool_adv_to_fiber_adv_t(advertise);
598 err = phy_write(phydev, MII_ADVERTISE, adv);
606 /* Advertisement hasn't changed, but maybe aneg was never on to
607 * begin with? Or maybe phy was isolated?
609 int ctl = phy_read(phydev, MII_BMCR);
614 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
615 changed = 1; /* do restart aneg */
618 /* Only restart aneg if we are advertising something different
619 * than we were before.
622 changed = genphy_restart_aneg(phydev);
627 static int m88e1510_config_aneg(struct phy_device *phydev)
631 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
635 /* Configure the copper link first */
636 err = m88e1318_config_aneg(phydev);
640 /* Then the fiber link */
641 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
645 err = marvell_config_aneg_fiber(phydev);
649 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
652 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
656 static int marvell_config_init(struct phy_device *phydev)
658 /* Set registers from marvell,reg-init DT property */
659 return marvell_of_reg_init(phydev);
662 static int m88e1116r_config_init(struct phy_device *phydev)
666 err = genphy_soft_reset(phydev);
672 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
676 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
680 err = marvell_set_downshift(phydev, true, 8);
684 if (phy_interface_is_rgmii(phydev)) {
685 err = m88e1121_config_aneg_rgmii_delays(phydev);
690 err = genphy_soft_reset(phydev);
694 return marvell_config_init(phydev);
697 static int m88e3016_config_init(struct phy_device *phydev)
701 /* Enable Scrambler and Auto-Crossover */
702 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
706 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
707 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
709 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
713 return marvell_config_init(phydev);
716 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
718 int fibre_copper_auto)
722 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
726 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
727 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
728 MII_M1111_HWCFG_FIBER_COPPER_RES);
731 if (fibre_copper_auto)
732 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
734 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
737 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
741 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
745 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
746 temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
747 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
748 temp &= ~MII_M1111_RGMII_TX_DELAY;
749 temp |= MII_M1111_RGMII_RX_DELAY;
750 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
751 temp &= ~MII_M1111_RGMII_RX_DELAY;
752 temp |= MII_M1111_RGMII_TX_DELAY;
755 return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
758 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
763 err = m88e1111_config_init_rgmii_delays(phydev);
767 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
771 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
773 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
774 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
776 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
778 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
781 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
785 err = m88e1111_config_init_hwcfg_mode(
787 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
788 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
792 /* make sure copper is selected */
793 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
796 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
800 err = m88e1111_config_init_rgmii_delays(phydev);
804 err = m88e1111_config_init_hwcfg_mode(
806 MII_M1111_HWCFG_MODE_RTBI,
807 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
812 err = genphy_soft_reset(phydev);
816 return m88e1111_config_init_hwcfg_mode(
818 MII_M1111_HWCFG_MODE_RTBI,
819 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
822 static int m88e1111_config_init(struct phy_device *phydev)
826 if (phy_interface_is_rgmii(phydev)) {
827 err = m88e1111_config_init_rgmii(phydev);
832 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
833 err = m88e1111_config_init_sgmii(phydev);
838 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
839 err = m88e1111_config_init_rtbi(phydev);
844 err = marvell_of_reg_init(phydev);
848 return genphy_soft_reset(phydev);
851 static int m88e1121_config_init(struct phy_device *phydev)
855 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
859 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
860 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
861 MII_88E1121_PHY_LED_DEF);
865 marvell_set_page(phydev, oldpage);
867 /* Set marvell,reg-init configuration from device tree */
868 return marvell_config_init(phydev);
871 static int m88e1510_config_init(struct phy_device *phydev)
876 /* SGMII-to-Copper mode initialization */
877 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
879 err = marvell_set_page(phydev, 18);
883 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
884 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
885 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
886 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
887 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
891 /* PHY reset is necessary after changing MODE[2:0] */
892 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
893 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
897 /* Reset page selection */
898 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
903 return m88e1121_config_init(phydev);
906 static int m88e1118_config_aneg(struct phy_device *phydev)
910 err = genphy_soft_reset(phydev);
914 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
918 err = genphy_config_aneg(phydev);
922 static int m88e1118_config_init(struct phy_device *phydev)
927 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
931 /* Enable 1000 Mbit */
932 err = phy_write(phydev, 0x15, 0x1070);
937 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
941 /* Adjust LED Control */
942 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
943 err = phy_write(phydev, 0x10, 0x1100);
945 err = phy_write(phydev, 0x10, 0x021e);
949 err = marvell_of_reg_init(phydev);
954 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
958 return genphy_soft_reset(phydev);
961 static int m88e1149_config_init(struct phy_device *phydev)
966 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
970 /* Enable 1000 Mbit */
971 err = phy_write(phydev, 0x15, 0x1048);
975 err = marvell_of_reg_init(phydev);
980 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
984 return genphy_soft_reset(phydev);
987 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
992 err = m88e1111_config_init_rgmii_delays(phydev);
996 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
997 err = phy_write(phydev, 0x1d, 0x0012);
1001 temp = phy_read(phydev, 0x1e);
1006 temp |= 2 << 9; /* 36 ohm */
1007 temp |= 2 << 6; /* 39 ohm */
1009 err = phy_write(phydev, 0x1e, temp);
1013 err = phy_write(phydev, 0x1d, 0x3);
1017 err = phy_write(phydev, 0x1e, 0x8000);
1022 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1024 return m88e1111_config_init_hwcfg_mode(
1025 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1026 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1029 static int m88e1145_config_init(struct phy_device *phydev)
1033 /* Take care of errata E0 & E1 */
1034 err = phy_write(phydev, 0x1d, 0x001b);
1038 err = phy_write(phydev, 0x1e, 0x418f);
1042 err = phy_write(phydev, 0x1d, 0x0016);
1046 err = phy_write(phydev, 0x1e, 0xa2da);
1050 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1051 err = m88e1145_config_init_rgmii(phydev);
1056 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1057 err = m88e1145_config_init_sgmii(phydev);
1062 err = marvell_of_reg_init(phydev);
1070 * fiber_lpa_to_ethtool_lpa_t
1071 * @lpa: value of the MII_LPA register for fiber link
1073 * A small helper function that translates MII_LPA
1074 * bits to ethtool LP advertisement settings.
1076 static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1080 if (lpa & LPA_FIBER_1000HALF)
1081 result |= ADVERTISED_1000baseT_Half;
1082 if (lpa & LPA_FIBER_1000FULL)
1083 result |= ADVERTISED_1000baseT_Full;
1089 * marvell_update_link - update link status in real time in @phydev
1090 * @phydev: target phy_device struct
1092 * Description: Update the value in phydev->link to reflect the
1093 * current link value.
1095 static int marvell_update_link(struct phy_device *phydev, int fiber)
1099 /* Use the generic register for copper link, or specific
1100 * register for fiber case
1103 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1107 if ((status & REGISTER_LINK_STATUS) == 0)
1112 return genphy_update_link(phydev);
1118 static int marvell_read_status_page_an(struct phy_device *phydev,
1125 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1129 lpa = phy_read(phydev, MII_LPA);
1133 lpagb = phy_read(phydev, MII_STAT1000);
1137 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1138 phydev->duplex = DUPLEX_FULL;
1140 phydev->duplex = DUPLEX_HALF;
1142 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1144 phydev->asym_pause = 0;
1147 case MII_M1011_PHY_STATUS_1000:
1148 phydev->speed = SPEED_1000;
1151 case MII_M1011_PHY_STATUS_100:
1152 phydev->speed = SPEED_100;
1156 phydev->speed = SPEED_10;
1161 phydev->lp_advertising =
1162 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1163 mii_lpa_to_ethtool_lpa_t(lpa);
1165 if (phydev->duplex == DUPLEX_FULL) {
1166 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1167 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1170 /* The fiber link is only 1000M capable */
1171 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1173 if (phydev->duplex == DUPLEX_FULL) {
1174 if (!(lpa & LPA_PAUSE_FIBER)) {
1176 phydev->asym_pause = 0;
1177 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1179 phydev->asym_pause = 1;
1182 phydev->asym_pause = 0;
1189 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1191 int bmcr = phy_read(phydev, MII_BMCR);
1196 if (bmcr & BMCR_FULLDPLX)
1197 phydev->duplex = DUPLEX_FULL;
1199 phydev->duplex = DUPLEX_HALF;
1201 if (bmcr & BMCR_SPEED1000)
1202 phydev->speed = SPEED_1000;
1203 else if (bmcr & BMCR_SPEED100)
1204 phydev->speed = SPEED_100;
1206 phydev->speed = SPEED_10;
1209 phydev->asym_pause = 0;
1210 phydev->lp_advertising = 0;
1215 /* marvell_read_status_page
1218 * Check the link, then figure out the current state
1219 * by comparing what we advertise with what the link partner
1220 * advertises. Start by checking the gigabit possibilities,
1221 * then move on to 10/100.
1223 static int marvell_read_status_page(struct phy_device *phydev, int page)
1228 /* Detect and update the link, but return if there
1231 if (page == MII_MARVELL_FIBER_PAGE)
1236 err = marvell_update_link(phydev, fiber);
1240 if (phydev->autoneg == AUTONEG_ENABLE)
1241 err = marvell_read_status_page_an(phydev, fiber);
1243 err = marvell_read_status_page_fixed(phydev);
1248 /* marvell_read_status
1250 * Some Marvell's phys have two modes: fiber and copper.
1251 * Both need status checked.
1253 * First, check the fiber link and status.
1254 * If the fiber link is down, check the copper link and status which
1255 * will be the default value if both link are down.
1257 static int marvell_read_status(struct phy_device *phydev)
1261 /* Check the fiber mode first */
1262 if (phydev->supported & SUPPORTED_FIBRE &&
1263 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1264 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1268 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1272 /* If the fiber link is up, it is the selected and
1273 * used link. In this case, we need to stay in the
1274 * fiber page. Please to be careful about that, avoid
1275 * to restore Copper page in other functions which
1276 * could break the behaviour for some fiber phy like
1282 /* If fiber link is down, check and save copper mode state */
1283 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1288 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1291 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1297 * Some Marvell's phys have two modes: fiber and copper.
1298 * Both need to be suspended
1300 static int marvell_suspend(struct phy_device *phydev)
1304 /* Suspend the fiber mode first */
1305 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1306 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1310 /* With the page set, use the generic suspend */
1311 err = genphy_suspend(phydev);
1315 /* Then, the copper link */
1316 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1321 /* With the page set, use the generic suspend */
1322 return genphy_suspend(phydev);
1325 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1331 * Some Marvell's phys have two modes: fiber and copper.
1332 * Both need to be resumed
1334 static int marvell_resume(struct phy_device *phydev)
1338 /* Resume the fiber mode first */
1339 if (!(phydev->supported & SUPPORTED_FIBRE)) {
1340 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1344 /* With the page set, use the generic resume */
1345 err = genphy_resume(phydev);
1349 /* Then, the copper link */
1350 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1355 /* With the page set, use the generic resume */
1356 return genphy_resume(phydev);
1359 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1363 static int marvell_aneg_done(struct phy_device *phydev)
1365 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1367 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1370 static int m88e1121_did_interrupt(struct phy_device *phydev)
1374 imask = phy_read(phydev, MII_M1011_IEVENT);
1376 if (imask & MII_M1011_IMASK_INIT)
1382 static void m88e1318_get_wol(struct phy_device *phydev,
1383 struct ethtool_wolinfo *wol)
1385 wol->supported = WAKE_MAGIC;
1388 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
1391 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1392 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1393 wol->wolopts |= WAKE_MAGIC;
1395 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
1399 static int m88e1318_set_wol(struct phy_device *phydev,
1400 struct ethtool_wolinfo *wol)
1402 int err, oldpage, temp;
1404 oldpage = marvell_get_page(phydev);
1406 if (wol->wolopts & WAKE_MAGIC) {
1407 /* Explicitly switch to page 0x00, just to be sure */
1408 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1412 /* Enable the WOL interrupt */
1413 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1414 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1415 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1419 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1423 /* Setup LED[2] as interrupt pin (active low) */
1424 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1425 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1426 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1427 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1428 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1432 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
1436 /* Store the device address for the magic packet */
1437 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1438 ((phydev->attached_dev->dev_addr[5] << 8) |
1439 phydev->attached_dev->dev_addr[4]));
1442 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1443 ((phydev->attached_dev->dev_addr[3] << 8) |
1444 phydev->attached_dev->dev_addr[2]));
1447 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1448 ((phydev->attached_dev->dev_addr[1] << 8) |
1449 phydev->attached_dev->dev_addr[0]));
1453 /* Clear WOL status and enable magic packet matching */
1454 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1455 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1456 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1457 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1461 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
1465 /* Clear WOL status and disable magic packet matching */
1466 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1467 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1468 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1469 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1474 err = marvell_set_page(phydev, oldpage);
1481 static int marvell_get_sset_count(struct phy_device *phydev)
1483 if (phydev->supported & SUPPORTED_FIBRE)
1484 return ARRAY_SIZE(marvell_hw_stats);
1486 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1489 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1493 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1494 memcpy(data + i * ETH_GSTRING_LEN,
1495 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1500 #define UINT64_MAX (u64)(~((u64)0))
1502 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1504 struct marvell_hw_stat stat = marvell_hw_stats[i];
1505 struct marvell_priv *priv = phydev->priv;
1509 oldpage = marvell_get_set_page(phydev, stat.page);
1513 val = phy_read(phydev, stat.reg);
1517 val = val & ((1 << stat.bits) - 1);
1518 priv->stats[i] += val;
1519 ret = priv->stats[i];
1522 marvell_set_page(phydev, oldpage);
1527 static void marvell_get_stats(struct phy_device *phydev,
1528 struct ethtool_stats *stats, u64 *data)
1532 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1533 data[i] = marvell_get_stat(phydev, i);
1537 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1545 mutex_lock(&phydev->lock);
1547 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1549 mutex_unlock(&phydev->lock);
1553 /* Enable temperature sensor */
1554 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1558 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1559 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1563 /* Wait for temperature to stabilize */
1564 usleep_range(10000, 12000);
1566 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1572 /* Disable temperature sensor */
1573 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1574 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1578 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1581 marvell_set_page(phydev, oldpage);
1582 mutex_unlock(&phydev->lock);
1587 static int m88e1121_hwmon_read(struct device *dev,
1588 enum hwmon_sensor_types type,
1589 u32 attr, int channel, long *temp)
1591 struct phy_device *phydev = dev_get_drvdata(dev);
1595 case hwmon_temp_input:
1596 err = m88e1121_get_temp(phydev, temp);
1605 static umode_t m88e1121_hwmon_is_visible(const void *data,
1606 enum hwmon_sensor_types type,
1607 u32 attr, int channel)
1609 if (type != hwmon_temp)
1613 case hwmon_temp_input:
1620 static u32 m88e1121_hwmon_chip_config[] = {
1621 HWMON_C_REGISTER_TZ,
1625 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1627 .config = m88e1121_hwmon_chip_config,
1630 static u32 m88e1121_hwmon_temp_config[] = {
1635 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1637 .config = m88e1121_hwmon_temp_config,
1640 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1641 &m88e1121_hwmon_chip,
1642 &m88e1121_hwmon_temp,
1646 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1647 .is_visible = m88e1121_hwmon_is_visible,
1648 .read = m88e1121_hwmon_read,
1651 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1652 .ops = &m88e1121_hwmon_hwmon_ops,
1653 .info = m88e1121_hwmon_info,
1656 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1663 mutex_lock(&phydev->lock);
1665 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1667 mutex_unlock(&phydev->lock);
1671 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1675 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1678 marvell_set_page(phydev, oldpage);
1679 mutex_unlock(&phydev->lock);
1684 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1691 mutex_lock(&phydev->lock);
1693 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1695 mutex_unlock(&phydev->lock);
1699 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1703 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1704 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1709 marvell_set_page(phydev, oldpage);
1710 mutex_unlock(&phydev->lock);
1715 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1720 mutex_lock(&phydev->lock);
1722 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1724 mutex_unlock(&phydev->lock);
1728 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1733 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1734 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1735 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1736 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1739 marvell_set_page(phydev, oldpage);
1740 mutex_unlock(&phydev->lock);
1745 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1752 mutex_lock(&phydev->lock);
1754 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1756 mutex_unlock(&phydev->lock);
1760 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1763 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1766 marvell_set_page(phydev, oldpage);
1767 mutex_unlock(&phydev->lock);
1772 static int m88e1510_hwmon_read(struct device *dev,
1773 enum hwmon_sensor_types type,
1774 u32 attr, int channel, long *temp)
1776 struct phy_device *phydev = dev_get_drvdata(dev);
1780 case hwmon_temp_input:
1781 err = m88e1510_get_temp(phydev, temp);
1783 case hwmon_temp_crit:
1784 err = m88e1510_get_temp_critical(phydev, temp);
1786 case hwmon_temp_max_alarm:
1787 err = m88e1510_get_temp_alarm(phydev, temp);
1796 static int m88e1510_hwmon_write(struct device *dev,
1797 enum hwmon_sensor_types type,
1798 u32 attr, int channel, long temp)
1800 struct phy_device *phydev = dev_get_drvdata(dev);
1804 case hwmon_temp_crit:
1805 err = m88e1510_set_temp_critical(phydev, temp);
1813 static umode_t m88e1510_hwmon_is_visible(const void *data,
1814 enum hwmon_sensor_types type,
1815 u32 attr, int channel)
1817 if (type != hwmon_temp)
1821 case hwmon_temp_input:
1822 case hwmon_temp_max_alarm:
1824 case hwmon_temp_crit:
1831 static u32 m88e1510_hwmon_temp_config[] = {
1832 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1836 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1838 .config = m88e1510_hwmon_temp_config,
1841 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1842 &m88e1121_hwmon_chip,
1843 &m88e1510_hwmon_temp,
1847 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1848 .is_visible = m88e1510_hwmon_is_visible,
1849 .read = m88e1510_hwmon_read,
1850 .write = m88e1510_hwmon_write,
1853 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1854 .ops = &m88e1510_hwmon_hwmon_ops,
1855 .info = m88e1510_hwmon_info,
1858 static int marvell_hwmon_name(struct phy_device *phydev)
1860 struct marvell_priv *priv = phydev->priv;
1861 struct device *dev = &phydev->mdio.dev;
1862 const char *devname = dev_name(dev);
1863 size_t len = strlen(devname);
1866 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1867 if (!priv->hwmon_name)
1870 for (i = j = 0; i < len && devname[i]; i++) {
1871 if (isalnum(devname[i]))
1872 priv->hwmon_name[j++] = devname[i];
1878 static int marvell_hwmon_probe(struct phy_device *phydev,
1879 const struct hwmon_chip_info *chip)
1881 struct marvell_priv *priv = phydev->priv;
1882 struct device *dev = &phydev->mdio.dev;
1885 err = marvell_hwmon_name(phydev);
1889 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1890 dev, priv->hwmon_name, phydev, chip, NULL);
1892 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1895 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1897 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1900 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1902 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1905 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1910 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1916 static int marvell_probe(struct phy_device *phydev)
1918 struct marvell_priv *priv;
1920 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1924 phydev->priv = priv;
1929 static int m88e1121_probe(struct phy_device *phydev)
1933 err = marvell_probe(phydev);
1937 return m88e1121_hwmon_probe(phydev);
1940 static int m88e1510_probe(struct phy_device *phydev)
1944 err = marvell_probe(phydev);
1948 return m88e1510_hwmon_probe(phydev);
1951 static struct phy_driver marvell_drivers[] = {
1953 .phy_id = MARVELL_PHY_ID_88E1101,
1954 .phy_id_mask = MARVELL_PHY_ID_MASK,
1955 .name = "Marvell 88E1101",
1956 .features = PHY_GBIT_FEATURES,
1957 .flags = PHY_HAS_INTERRUPT,
1958 .probe = marvell_probe,
1959 .config_init = &marvell_config_init,
1960 .config_aneg = &m88e1101_config_aneg,
1961 .read_status = &genphy_read_status,
1962 .ack_interrupt = &marvell_ack_interrupt,
1963 .config_intr = &marvell_config_intr,
1964 .resume = &genphy_resume,
1965 .suspend = &genphy_suspend,
1966 .get_sset_count = marvell_get_sset_count,
1967 .get_strings = marvell_get_strings,
1968 .get_stats = marvell_get_stats,
1971 .phy_id = MARVELL_PHY_ID_88E1112,
1972 .phy_id_mask = MARVELL_PHY_ID_MASK,
1973 .name = "Marvell 88E1112",
1974 .features = PHY_GBIT_FEATURES,
1975 .flags = PHY_HAS_INTERRUPT,
1976 .probe = marvell_probe,
1977 .config_init = &m88e1111_config_init,
1978 .config_aneg = &marvell_config_aneg,
1979 .read_status = &genphy_read_status,
1980 .ack_interrupt = &marvell_ack_interrupt,
1981 .config_intr = &marvell_config_intr,
1982 .resume = &genphy_resume,
1983 .suspend = &genphy_suspend,
1984 .get_sset_count = marvell_get_sset_count,
1985 .get_strings = marvell_get_strings,
1986 .get_stats = marvell_get_stats,
1989 .phy_id = MARVELL_PHY_ID_88E1111,
1990 .phy_id_mask = MARVELL_PHY_ID_MASK,
1991 .name = "Marvell 88E1111",
1992 .features = PHY_GBIT_FEATURES,
1993 .flags = PHY_HAS_INTERRUPT,
1994 .probe = marvell_probe,
1995 .config_init = &m88e1111_config_init,
1996 .config_aneg = &m88e1111_config_aneg,
1997 .read_status = &marvell_read_status,
1998 .ack_interrupt = &marvell_ack_interrupt,
1999 .config_intr = &marvell_config_intr,
2000 .resume = &genphy_resume,
2001 .suspend = &genphy_suspend,
2002 .get_sset_count = marvell_get_sset_count,
2003 .get_strings = marvell_get_strings,
2004 .get_stats = marvell_get_stats,
2007 .phy_id = MARVELL_PHY_ID_88E1118,
2008 .phy_id_mask = MARVELL_PHY_ID_MASK,
2009 .name = "Marvell 88E1118",
2010 .features = PHY_GBIT_FEATURES,
2011 .flags = PHY_HAS_INTERRUPT,
2012 .probe = marvell_probe,
2013 .config_init = &m88e1118_config_init,
2014 .config_aneg = &m88e1118_config_aneg,
2015 .read_status = &genphy_read_status,
2016 .ack_interrupt = &marvell_ack_interrupt,
2017 .config_intr = &marvell_config_intr,
2018 .resume = &genphy_resume,
2019 .suspend = &genphy_suspend,
2020 .get_sset_count = marvell_get_sset_count,
2021 .get_strings = marvell_get_strings,
2022 .get_stats = marvell_get_stats,
2025 .phy_id = MARVELL_PHY_ID_88E1121R,
2026 .phy_id_mask = MARVELL_PHY_ID_MASK,
2027 .name = "Marvell 88E1121R",
2028 .features = PHY_GBIT_FEATURES,
2029 .flags = PHY_HAS_INTERRUPT,
2030 .probe = &m88e1121_probe,
2031 .config_init = &m88e1121_config_init,
2032 .config_aneg = &m88e1121_config_aneg,
2033 .read_status = &marvell_read_status,
2034 .ack_interrupt = &marvell_ack_interrupt,
2035 .config_intr = &marvell_config_intr,
2036 .did_interrupt = &m88e1121_did_interrupt,
2037 .resume = &genphy_resume,
2038 .suspend = &genphy_suspend,
2039 .get_sset_count = marvell_get_sset_count,
2040 .get_strings = marvell_get_strings,
2041 .get_stats = marvell_get_stats,
2044 .phy_id = MARVELL_PHY_ID_88E1318S,
2045 .phy_id_mask = MARVELL_PHY_ID_MASK,
2046 .name = "Marvell 88E1318S",
2047 .features = PHY_GBIT_FEATURES,
2048 .flags = PHY_HAS_INTERRUPT,
2049 .probe = marvell_probe,
2050 .config_init = &m88e1121_config_init,
2051 .config_aneg = &m88e1318_config_aneg,
2052 .read_status = &marvell_read_status,
2053 .ack_interrupt = &marvell_ack_interrupt,
2054 .config_intr = &marvell_config_intr,
2055 .did_interrupt = &m88e1121_did_interrupt,
2056 .get_wol = &m88e1318_get_wol,
2057 .set_wol = &m88e1318_set_wol,
2058 .resume = &genphy_resume,
2059 .suspend = &genphy_suspend,
2060 .get_sset_count = marvell_get_sset_count,
2061 .get_strings = marvell_get_strings,
2062 .get_stats = marvell_get_stats,
2065 .phy_id = MARVELL_PHY_ID_88E1145,
2066 .phy_id_mask = MARVELL_PHY_ID_MASK,
2067 .name = "Marvell 88E1145",
2068 .features = PHY_GBIT_FEATURES,
2069 .flags = PHY_HAS_INTERRUPT,
2070 .probe = marvell_probe,
2071 .config_init = &m88e1145_config_init,
2072 .config_aneg = &marvell_config_aneg,
2073 .read_status = &genphy_read_status,
2074 .ack_interrupt = &marvell_ack_interrupt,
2075 .config_intr = &marvell_config_intr,
2076 .resume = &genphy_resume,
2077 .suspend = &genphy_suspend,
2078 .get_sset_count = marvell_get_sset_count,
2079 .get_strings = marvell_get_strings,
2080 .get_stats = marvell_get_stats,
2083 .phy_id = MARVELL_PHY_ID_88E1149R,
2084 .phy_id_mask = MARVELL_PHY_ID_MASK,
2085 .name = "Marvell 88E1149R",
2086 .features = PHY_GBIT_FEATURES,
2087 .flags = PHY_HAS_INTERRUPT,
2088 .probe = marvell_probe,
2089 .config_init = &m88e1149_config_init,
2090 .config_aneg = &m88e1118_config_aneg,
2091 .read_status = &genphy_read_status,
2092 .ack_interrupt = &marvell_ack_interrupt,
2093 .config_intr = &marvell_config_intr,
2094 .resume = &genphy_resume,
2095 .suspend = &genphy_suspend,
2096 .get_sset_count = marvell_get_sset_count,
2097 .get_strings = marvell_get_strings,
2098 .get_stats = marvell_get_stats,
2101 .phy_id = MARVELL_PHY_ID_88E1240,
2102 .phy_id_mask = MARVELL_PHY_ID_MASK,
2103 .name = "Marvell 88E1240",
2104 .features = PHY_GBIT_FEATURES,
2105 .flags = PHY_HAS_INTERRUPT,
2106 .probe = marvell_probe,
2107 .config_init = &m88e1111_config_init,
2108 .config_aneg = &marvell_config_aneg,
2109 .read_status = &genphy_read_status,
2110 .ack_interrupt = &marvell_ack_interrupt,
2111 .config_intr = &marvell_config_intr,
2112 .resume = &genphy_resume,
2113 .suspend = &genphy_suspend,
2114 .get_sset_count = marvell_get_sset_count,
2115 .get_strings = marvell_get_strings,
2116 .get_stats = marvell_get_stats,
2119 .phy_id = MARVELL_PHY_ID_88E1116R,
2120 .phy_id_mask = MARVELL_PHY_ID_MASK,
2121 .name = "Marvell 88E1116R",
2122 .features = PHY_GBIT_FEATURES,
2123 .flags = PHY_HAS_INTERRUPT,
2124 .probe = marvell_probe,
2125 .config_init = &m88e1116r_config_init,
2126 .config_aneg = &genphy_config_aneg,
2127 .read_status = &genphy_read_status,
2128 .ack_interrupt = &marvell_ack_interrupt,
2129 .config_intr = &marvell_config_intr,
2130 .resume = &genphy_resume,
2131 .suspend = &genphy_suspend,
2132 .get_sset_count = marvell_get_sset_count,
2133 .get_strings = marvell_get_strings,
2134 .get_stats = marvell_get_stats,
2137 .phy_id = MARVELL_PHY_ID_88E1510,
2138 .phy_id_mask = MARVELL_PHY_ID_MASK,
2139 .name = "Marvell 88E1510",
2140 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2141 .flags = PHY_HAS_INTERRUPT,
2142 .probe = &m88e1510_probe,
2143 .config_init = &m88e1510_config_init,
2144 .config_aneg = &m88e1510_config_aneg,
2145 .read_status = &marvell_read_status,
2146 .ack_interrupt = &marvell_ack_interrupt,
2147 .config_intr = &marvell_config_intr,
2148 .did_interrupt = &m88e1121_did_interrupt,
2149 .get_wol = &m88e1318_get_wol,
2150 .set_wol = &m88e1318_set_wol,
2151 .resume = &marvell_resume,
2152 .suspend = &marvell_suspend,
2153 .get_sset_count = marvell_get_sset_count,
2154 .get_strings = marvell_get_strings,
2155 .get_stats = marvell_get_stats,
2156 .set_loopback = genphy_loopback,
2159 .phy_id = MARVELL_PHY_ID_88E1540,
2160 .phy_id_mask = MARVELL_PHY_ID_MASK,
2161 .name = "Marvell 88E1540",
2162 .features = PHY_GBIT_FEATURES,
2163 .flags = PHY_HAS_INTERRUPT,
2164 .probe = m88e1510_probe,
2165 .config_init = &marvell_config_init,
2166 .config_aneg = &m88e1510_config_aneg,
2167 .read_status = &marvell_read_status,
2168 .ack_interrupt = &marvell_ack_interrupt,
2169 .config_intr = &marvell_config_intr,
2170 .did_interrupt = &m88e1121_did_interrupt,
2171 .resume = &genphy_resume,
2172 .suspend = &genphy_suspend,
2173 .get_sset_count = marvell_get_sset_count,
2174 .get_strings = marvell_get_strings,
2175 .get_stats = marvell_get_stats,
2178 .phy_id = MARVELL_PHY_ID_88E1545,
2179 .phy_id_mask = MARVELL_PHY_ID_MASK,
2180 .name = "Marvell 88E1545",
2181 .probe = m88e1510_probe,
2182 .features = PHY_GBIT_FEATURES,
2183 .flags = PHY_HAS_INTERRUPT,
2184 .config_init = &marvell_config_init,
2185 .config_aneg = &m88e1510_config_aneg,
2186 .read_status = &marvell_read_status,
2187 .ack_interrupt = &marvell_ack_interrupt,
2188 .config_intr = &marvell_config_intr,
2189 .did_interrupt = &m88e1121_did_interrupt,
2190 .resume = &genphy_resume,
2191 .suspend = &genphy_suspend,
2192 .get_sset_count = marvell_get_sset_count,
2193 .get_strings = marvell_get_strings,
2194 .get_stats = marvell_get_stats,
2197 .phy_id = MARVELL_PHY_ID_88E3016,
2198 .phy_id_mask = MARVELL_PHY_ID_MASK,
2199 .name = "Marvell 88E3016",
2200 .features = PHY_BASIC_FEATURES,
2201 .flags = PHY_HAS_INTERRUPT,
2202 .probe = marvell_probe,
2203 .config_aneg = &genphy_config_aneg,
2204 .config_init = &m88e3016_config_init,
2205 .aneg_done = &marvell_aneg_done,
2206 .read_status = &marvell_read_status,
2207 .ack_interrupt = &marvell_ack_interrupt,
2208 .config_intr = &marvell_config_intr,
2209 .did_interrupt = &m88e1121_did_interrupt,
2210 .resume = &genphy_resume,
2211 .suspend = &genphy_suspend,
2212 .get_sset_count = marvell_get_sset_count,
2213 .get_strings = marvell_get_strings,
2214 .get_stats = marvell_get_stats,
2217 .phy_id = MARVELL_PHY_ID_88E6390,
2218 .phy_id_mask = MARVELL_PHY_ID_MASK,
2219 .name = "Marvell 88E6390",
2220 .features = PHY_GBIT_FEATURES,
2221 .flags = PHY_HAS_INTERRUPT,
2222 .probe = m88e1510_probe,
2223 .config_init = &marvell_config_init,
2224 .config_aneg = &m88e1510_config_aneg,
2225 .read_status = &marvell_read_status,
2226 .ack_interrupt = &marvell_ack_interrupt,
2227 .config_intr = &marvell_config_intr,
2228 .did_interrupt = &m88e1121_did_interrupt,
2229 .resume = &genphy_resume,
2230 .suspend = &genphy_suspend,
2231 .get_sset_count = marvell_get_sset_count,
2232 .get_strings = marvell_get_strings,
2233 .get_stats = marvell_get_stats,
2237 module_phy_driver(marvell_drivers);
2239 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2240 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2241 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2242 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2243 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2244 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2245 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2246 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2247 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2248 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2249 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2250 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2251 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2252 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2253 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2254 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2258 MODULE_DEVICE_TABLE(mdio, marvell_tbl);