1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 This contains the functions to handle the platform driver.
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
11 #include <linux/platform_device.h>
12 #include <linux/module.h>
15 #include <linux/of_net.h>
16 #include <linux/of_device.h>
17 #include <linux/of_mdio.h>
20 #include "stmmac_platform.h"
25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
26 * @mcast_bins: Multicast filtering bins
28 * this function validates the number of Multicast filtering bins specified
29 * by the configuration through the device tree. The Synopsys GMAC supports
30 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
31 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
32 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
33 * invalid and will cause the filtering algorithm to use Multicast
36 static int dwmac1000_validate_mcast_bins(int mcast_bins)
47 pr_info("Hash table entries set to unexpected value %d",
55 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
56 * @ucast_entries: number of Unicast address entries
58 * This function validates the number of Unicast address entries supported
59 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
60 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
61 * logic. This function validates a valid, supported configuration is
62 * selected, and defaults to 1 Unicast address if an unsupported
63 * configuration is selected.
65 static int dwmac1000_validate_ucast_entries(int ucast_entries)
67 int x = ucast_entries;
76 pr_info("Unicast table entries set to unexpected value %d\n",
84 * stmmac_axi_setup - parse DT parameters for programming the AXI register
85 * @pdev: platform device
87 * if required, from device-tree the AXI internal register can be tuned
88 * by using platform parameters.
90 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
92 struct device_node *np;
93 struct stmmac_axi *axi;
95 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
99 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
102 return ERR_PTR(-ENOMEM);
105 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
106 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
107 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
108 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
109 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
110 axi->axi_rb = of_property_read_bool(np, "snps,axi_rb");
112 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
113 axi->axi_wr_osr_lmt = 1;
114 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
115 axi->axi_rd_osr_lmt = 1;
116 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
123 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
124 * @pdev: platform device
126 static int stmmac_mtl_setup(struct platform_device *pdev,
127 struct plat_stmmacenet_data *plat)
129 struct device_node *q_node;
130 struct device_node *rx_node;
131 struct device_node *tx_node;
135 /* For backwards-compatibility with device trees that don't have any
136 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
137 * to one RX and TX queues each.
139 plat->rx_queues_to_use = 1;
140 plat->tx_queues_to_use = 1;
142 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
143 * to always set this, otherwise Queue will be classified as AVB
144 * (because MTL_QUEUE_AVB = 0).
146 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
147 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
149 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
153 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
155 of_node_put(rx_node);
159 /* Processing RX queues common config */
160 if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
161 &plat->rx_queues_to_use))
162 plat->rx_queues_to_use = 1;
164 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
165 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
166 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
167 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
169 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
171 /* Processing individual RX queue config */
172 for_each_child_of_node(rx_node, q_node) {
173 if (queue >= plat->rx_queues_to_use)
176 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
177 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
178 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
179 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
181 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
183 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
184 &plat->rx_queues_cfg[queue].chan))
185 plat->rx_queues_cfg[queue].chan = queue;
186 /* TODO: Dynamic mapping to be included in the future */
188 if (of_property_read_u32(q_node, "snps,priority",
189 &plat->rx_queues_cfg[queue].prio)) {
190 plat->rx_queues_cfg[queue].prio = 0;
191 plat->rx_queues_cfg[queue].use_prio = false;
193 plat->rx_queues_cfg[queue].use_prio = true;
196 /* RX queue specific packet type routing */
197 if (of_property_read_bool(q_node, "snps,route-avcp"))
198 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
199 else if (of_property_read_bool(q_node, "snps,route-ptp"))
200 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
201 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
202 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
203 else if (of_property_read_bool(q_node, "snps,route-up"))
204 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
205 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
206 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
208 plat->rx_queues_cfg[queue].pkt_route = 0x0;
212 if (queue != plat->rx_queues_to_use) {
214 dev_err(&pdev->dev, "Not all RX queues were configured\n");
218 /* Processing TX queues common config */
219 if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
220 &plat->tx_queues_to_use))
221 plat->tx_queues_to_use = 1;
223 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
224 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
225 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
226 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
227 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
228 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
229 else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
230 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
232 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
236 /* Processing individual TX queue config */
237 for_each_child_of_node(tx_node, q_node) {
238 if (queue >= plat->tx_queues_to_use)
241 if (of_property_read_u32(q_node, "snps,weight",
242 &plat->tx_queues_cfg[queue].weight))
243 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
245 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
246 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
247 } else if (of_property_read_bool(q_node,
248 "snps,avb-algorithm")) {
249 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
251 /* Credit Base Shaper parameters used by AVB */
252 if (of_property_read_u32(q_node, "snps,send_slope",
253 &plat->tx_queues_cfg[queue].send_slope))
254 plat->tx_queues_cfg[queue].send_slope = 0x0;
255 if (of_property_read_u32(q_node, "snps,idle_slope",
256 &plat->tx_queues_cfg[queue].idle_slope))
257 plat->tx_queues_cfg[queue].idle_slope = 0x0;
258 if (of_property_read_u32(q_node, "snps,high_credit",
259 &plat->tx_queues_cfg[queue].high_credit))
260 plat->tx_queues_cfg[queue].high_credit = 0x0;
261 if (of_property_read_u32(q_node, "snps,low_credit",
262 &plat->tx_queues_cfg[queue].low_credit))
263 plat->tx_queues_cfg[queue].low_credit = 0x0;
265 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
268 if (of_property_read_u32(q_node, "snps,priority",
269 &plat->tx_queues_cfg[queue].prio)) {
270 plat->tx_queues_cfg[queue].prio = 0;
271 plat->tx_queues_cfg[queue].use_prio = false;
273 plat->tx_queues_cfg[queue].use_prio = true;
278 if (queue != plat->tx_queues_to_use) {
280 dev_err(&pdev->dev, "Not all TX queues were configured\n");
285 of_node_put(rx_node);
286 of_node_put(tx_node);
293 * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
294 * @plat: driver data platform structure
295 * @np: device tree node
296 * @dev: device pointer
298 * The mdio bus will be allocated in case of a phy transceiver is on board;
299 * it will be NULL if the fixed-link is configured.
300 * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
301 * in any case (for DSA, mdio must be registered even if fixed-link).
302 * The table below sums the supported configurations:
303 * -------------------------------
305 * -------------------------------
307 * -------------------------------
309 * -------------------------------
313 * -------------------------------
315 * It returns 0 in case of success otherwise -ENODEV.
317 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
318 struct device_node *np, struct device *dev)
321 static const struct of_device_id need_mdio_ids[] = {
322 { .compatible = "snps,dwc-qos-ethernet-4.10" },
326 if (of_match_node(need_mdio_ids, np)) {
327 plat->mdio_node = of_get_child_by_name(np, "mdio");
330 * If snps,dwmac-mdio is passed from DT, always register
333 for_each_child_of_node(np, plat->mdio_node) {
334 if (of_device_is_compatible(plat->mdio_node,
340 if (plat->mdio_node) {
341 dev_dbg(dev, "Found MDIO subnode\n");
346 plat->mdio_bus_data =
347 devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
353 * stmmac_probe_config_dt - parse device-tree driver parameters
354 * @pdev: platform_device structure
355 * @mac: MAC address to use
357 * this function is to read the driver parameters from device-tree and
358 * set some private fields that will be used by the main at runtime.
360 struct plat_stmmacenet_data *
361 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
363 struct device_node *np = pdev->dev.of_node;
364 struct plat_stmmacenet_data *plat;
365 struct stmmac_dma_cfg *dma_cfg;
368 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
370 return ERR_PTR(-ENOMEM);
372 *mac = of_get_mac_address(np);
373 plat->interface = of_get_phy_mode(np);
375 /* Some wrapper drivers still rely on phy_node. Let's save it while
376 * they are not converted to phylink. */
377 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
379 /* PHYLINK automatically parses the phy-handle property */
380 plat->phylink_node = np;
382 /* Get max speed of operation from device tree */
383 if (of_property_read_u32(np, "max-speed", &plat->max_speed))
384 plat->max_speed = -1;
386 plat->bus_id = of_alias_get_id(np, "ethernet");
387 if (plat->bus_id < 0)
390 /* Default to phy auto-detection */
393 /* Default to get clk_csr from stmmac_clk_crs_set(),
394 * or get clk_csr from device tree.
397 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
399 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
400 * and warn of its use. Remove this when phy node support is added.
402 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
403 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
405 /* To Configure PHY by using all device-tree supported properties */
406 rc = stmmac_dt_phy(plat, np, &pdev->dev);
410 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
412 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
414 plat->force_sf_dma_mode =
415 of_property_read_bool(np, "snps,force_sf_dma_mode");
417 plat->en_tx_lpi_clockgating =
418 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
420 /* Set the maxmtu to a default of JUMBO_LEN in case the
421 * parameter is not present in the device tree.
423 plat->maxmtu = JUMBO_LEN;
425 /* Set default value for multicast hash bins */
426 plat->multicast_filter_bins = HASH_TABLE_SIZE;
428 /* Set default value for unicast filter entries */
429 plat->unicast_filter_entries = 1;
432 * Currently only the properties needed on SPEAr600
433 * are provided. All other properties should be added
434 * once needed on other platforms.
436 if (of_device_is_compatible(np, "st,spear600-gmac") ||
437 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
438 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
439 of_device_is_compatible(np, "snps,dwmac")) {
440 /* Note that the max-frame-size parameter as defined in the
441 * ePAPR v1.1 spec is defined as max-frame-size, it's
442 * actually used as the IEEE definition of MAC Client
443 * data, or MTU. The ePAPR specification is confusing as
444 * the definition is max-frame-size, but usage examples
447 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
448 of_property_read_u32(np, "snps,multicast-filter-bins",
449 &plat->multicast_filter_bins);
450 of_property_read_u32(np, "snps,perfect-filter-entries",
451 &plat->unicast_filter_entries);
452 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
453 plat->unicast_filter_entries);
454 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
455 plat->multicast_filter_bins);
460 if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
461 of_device_is_compatible(np, "snps,dwmac-4.10a") ||
462 of_device_is_compatible(np, "snps,dwmac-4.20a")) {
466 plat->tso_en = of_property_read_bool(np, "snps,tso");
469 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
470 of_device_is_compatible(np, "snps,dwmac-3.710")) {
472 plat->bugged_jumbo = 1;
473 plat->force_sf_dma_mode = 1;
476 if (of_device_is_compatible(np, "snps,dwxgmac")) {
479 plat->tso_en = of_property_read_bool(np, "snps,tso");
482 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
485 stmmac_remove_config_dt(pdev, plat);
486 return ERR_PTR(-ENOMEM);
488 plat->dma_cfg = dma_cfg;
490 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
492 dma_cfg->pbl = DEFAULT_DMA_PBL;
493 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
494 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
495 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
497 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
498 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
499 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
501 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
502 if (plat->force_thresh_dma_mode) {
503 plat->force_sf_dma_mode = 0;
504 pr_warn("force_sf_dma_mode is ignored if force_thresh_dma_mode is set.");
507 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
509 plat->axi = stmmac_axi_setup(pdev);
511 rc = stmmac_mtl_setup(pdev, plat);
513 stmmac_remove_config_dt(pdev, plat);
518 plat->stmmac_clk = devm_clk_get(&pdev->dev,
519 STMMAC_RESOURCE_NAME);
520 if (IS_ERR(plat->stmmac_clk)) {
521 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
522 plat->stmmac_clk = NULL;
524 clk_prepare_enable(plat->stmmac_clk);
526 plat->pclk = devm_clk_get(&pdev->dev, "pclk");
527 if (IS_ERR(plat->pclk)) {
528 if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
533 clk_prepare_enable(plat->pclk);
535 /* Fall-back to main clock in case of no PTP ref is passed */
536 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
537 if (IS_ERR(plat->clk_ptp_ref)) {
538 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
539 plat->clk_ptp_ref = NULL;
540 dev_warn(&pdev->dev, "PTP uses main clock\n");
542 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
543 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
546 plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
547 STMMAC_RESOURCE_NAME);
548 if (IS_ERR(plat->stmmac_rst)) {
549 if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
552 dev_info(&pdev->dev, "no reset control found\n");
553 plat->stmmac_rst = NULL;
559 clk_disable_unprepare(plat->pclk);
561 clk_disable_unprepare(plat->stmmac_clk);
563 return ERR_PTR(-EPROBE_DEFER);
567 * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
568 * @pdev: platform_device structure
569 * @plat: driver data platform structure
571 * Release resources claimed by stmmac_probe_config_dt().
573 void stmmac_remove_config_dt(struct platform_device *pdev,
574 struct plat_stmmacenet_data *plat)
576 of_node_put(plat->phy_node);
577 of_node_put(plat->mdio_node);
580 struct plat_stmmacenet_data *
581 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
583 return ERR_PTR(-EINVAL);
586 void stmmac_remove_config_dt(struct platform_device *pdev,
587 struct plat_stmmacenet_data *plat)
590 #endif /* CONFIG_OF */
591 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
592 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
594 int stmmac_get_platform_resources(struct platform_device *pdev,
595 struct stmmac_resources *stmmac_res)
597 struct resource *res;
599 memset(stmmac_res, 0, sizeof(*stmmac_res));
601 /* Get IRQ information early to have an ability to ask for deferred
602 * probe if needed before we went too far with resource allocation.
604 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
605 if (stmmac_res->irq < 0) {
606 if (stmmac_res->irq != -EPROBE_DEFER) {
608 "MAC IRQ configuration information not found\n");
610 return stmmac_res->irq;
613 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
614 * The external wake up irq can be passed through the platform code
615 * named as "eth_wake_irq"
617 * In case the wake up interrupt is not passed from the platform
618 * so the driver will continue to use the mac irq (ndev->irq)
620 stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
621 if (stmmac_res->wol_irq < 0) {
622 if (stmmac_res->wol_irq == -EPROBE_DEFER)
623 return -EPROBE_DEFER;
624 stmmac_res->wol_irq = stmmac_res->irq;
627 stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
628 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
629 return -EPROBE_DEFER;
631 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
632 stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res);
634 return PTR_ERR_OR_ZERO(stmmac_res->addr);
636 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
639 * stmmac_pltfr_remove
640 * @pdev: platform device pointer
641 * Description: this function calls the main to free the net resources
642 * and calls the platforms hook and release the resources (e.g. mem).
644 int stmmac_pltfr_remove(struct platform_device *pdev)
646 struct net_device *ndev = platform_get_drvdata(pdev);
647 struct stmmac_priv *priv = netdev_priv(ndev);
648 struct plat_stmmacenet_data *plat = priv->plat;
649 int ret = stmmac_dvr_remove(&pdev->dev);
652 plat->exit(pdev, plat->bsp_priv);
654 stmmac_remove_config_dt(pdev, plat);
658 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
660 #ifdef CONFIG_PM_SLEEP
662 * stmmac_pltfr_suspend
663 * @dev: device pointer
664 * Description: this function is invoked when suspend the driver and it direcly
665 * call the main suspend function and then, if required, on some platform, it
666 * can call an exit helper.
668 static int stmmac_pltfr_suspend(struct device *dev)
671 struct net_device *ndev = dev_get_drvdata(dev);
672 struct stmmac_priv *priv = netdev_priv(ndev);
673 struct platform_device *pdev = to_platform_device(dev);
675 ret = stmmac_suspend(dev);
676 if (priv->plat->exit)
677 priv->plat->exit(pdev, priv->plat->bsp_priv);
683 * stmmac_pltfr_resume
684 * @dev: device pointer
685 * Description: this function is invoked when resume the driver before calling
686 * the main resume function, on some platforms, it can call own init helper
689 static int stmmac_pltfr_resume(struct device *dev)
691 struct net_device *ndev = dev_get_drvdata(dev);
692 struct stmmac_priv *priv = netdev_priv(ndev);
693 struct platform_device *pdev = to_platform_device(dev);
695 if (priv->plat->init)
696 priv->plat->init(pdev, priv->plat->bsp_priv);
698 return stmmac_resume(dev);
700 #endif /* CONFIG_PM_SLEEP */
702 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
703 stmmac_pltfr_resume);
704 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
706 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
707 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
708 MODULE_LICENSE("GPL");