1 /*******************************************************************************
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 The full GNU General Public License is included in this distribution in
16 the file called "COPYING".
18 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
19 *******************************************************************************/
21 #include <linux/etherdevice.h>
22 #include <linux/ethtool.h>
23 #include <linux/interrupt.h>
24 #include <linux/mii.h>
25 #include <linux/phy.h>
26 #include <linux/net_tstamp.h>
30 #include "dwmac_dma.h"
32 #define REG_SPACE_SIZE 0x1060
33 #define MAC100_ETHTOOL_NAME "st_mac100"
34 #define GMAC_ETHTOOL_NAME "st_gmac"
36 #define ETHTOOL_DMA_OFFSET 55
39 char stat_string[ETH_GSTRING_LEN];
44 #define STMMAC_STAT(m) \
45 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \
46 offsetof(struct stmmac_priv, xstats.m)}
48 static const struct stmmac_stats stmmac_gstrings_stats[] = {
50 STMMAC_STAT(tx_underflow),
51 STMMAC_STAT(tx_carrier),
52 STMMAC_STAT(tx_losscarrier),
53 STMMAC_STAT(vlan_tag),
54 STMMAC_STAT(tx_deferred),
56 STMMAC_STAT(tx_jabber),
57 STMMAC_STAT(tx_frame_flushed),
58 STMMAC_STAT(tx_payload_error),
59 STMMAC_STAT(tx_ip_header_error),
62 STMMAC_STAT(sa_filter_fail),
63 STMMAC_STAT(overflow_error),
64 STMMAC_STAT(ipc_csum_error),
65 STMMAC_STAT(rx_collision),
66 STMMAC_STAT(rx_crc_errors),
67 STMMAC_STAT(dribbling_bit),
68 STMMAC_STAT(rx_length),
70 STMMAC_STAT(rx_multicast),
71 STMMAC_STAT(rx_gmac_overflow),
72 STMMAC_STAT(rx_watchdog),
73 STMMAC_STAT(da_rx_filter_fail),
74 STMMAC_STAT(sa_rx_filter_fail),
75 STMMAC_STAT(rx_missed_cntr),
76 STMMAC_STAT(rx_overflow_cntr),
78 /* Tx/Rx IRQ error info */
79 STMMAC_STAT(tx_undeflow_irq),
80 STMMAC_STAT(tx_process_stopped_irq),
81 STMMAC_STAT(tx_jabber_irq),
82 STMMAC_STAT(rx_overflow_irq),
83 STMMAC_STAT(rx_buf_unav_irq),
84 STMMAC_STAT(rx_process_stopped_irq),
85 STMMAC_STAT(rx_watchdog_irq),
86 STMMAC_STAT(tx_early_irq),
87 STMMAC_STAT(fatal_bus_error_irq),
88 /* Tx/Rx IRQ Events */
89 STMMAC_STAT(rx_early_irq),
90 STMMAC_STAT(threshold),
91 STMMAC_STAT(tx_pkt_n),
92 STMMAC_STAT(rx_pkt_n),
93 STMMAC_STAT(normal_irq_n),
94 STMMAC_STAT(rx_normal_irq_n),
95 STMMAC_STAT(napi_poll),
96 STMMAC_STAT(tx_normal_irq_n),
97 STMMAC_STAT(tx_clean),
98 STMMAC_STAT(tx_set_ic_bit),
99 STMMAC_STAT(irq_receive_pmt_irq_n),
101 STMMAC_STAT(mmc_tx_irq_n),
102 STMMAC_STAT(mmc_rx_irq_n),
103 STMMAC_STAT(mmc_rx_csum_offload_irq_n),
105 STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
106 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
107 STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
108 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
109 STMMAC_STAT(phy_eee_wakeup_error_n),
110 /* Extended RDES status */
111 STMMAC_STAT(ip_hdr_err),
112 STMMAC_STAT(ip_payload_err),
113 STMMAC_STAT(ip_csum_bypassed),
114 STMMAC_STAT(ipv4_pkt_rcvd),
115 STMMAC_STAT(ipv6_pkt_rcvd),
116 STMMAC_STAT(no_ptp_rx_msg_type_ext),
117 STMMAC_STAT(ptp_rx_msg_type_sync),
118 STMMAC_STAT(ptp_rx_msg_type_follow_up),
119 STMMAC_STAT(ptp_rx_msg_type_delay_req),
120 STMMAC_STAT(ptp_rx_msg_type_delay_resp),
121 STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
122 STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
123 STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
124 STMMAC_STAT(ptp_rx_msg_type_announce),
125 STMMAC_STAT(ptp_rx_msg_type_management),
126 STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
127 STMMAC_STAT(ptp_frame_type),
128 STMMAC_STAT(ptp_ver),
129 STMMAC_STAT(timestamp_dropped),
130 STMMAC_STAT(av_pkt_rcvd),
131 STMMAC_STAT(av_tagged_pkt_rcvd),
132 STMMAC_STAT(vlan_tag_priority_val),
133 STMMAC_STAT(l3_filter_match),
134 STMMAC_STAT(l4_filter_match),
135 STMMAC_STAT(l3_l4_filter_no_match),
137 STMMAC_STAT(irq_pcs_ane_n),
138 STMMAC_STAT(irq_pcs_link_n),
139 STMMAC_STAT(irq_rgmii_n),
141 STMMAC_STAT(mtl_tx_status_fifo_full),
142 STMMAC_STAT(mtl_tx_fifo_not_empty),
143 STMMAC_STAT(mmtl_fifo_ctrl),
144 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
145 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
146 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
147 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
148 STMMAC_STAT(mac_tx_in_pause),
149 STMMAC_STAT(mac_tx_frame_ctrl_xfer),
150 STMMAC_STAT(mac_tx_frame_ctrl_idle),
151 STMMAC_STAT(mac_tx_frame_ctrl_wait),
152 STMMAC_STAT(mac_tx_frame_ctrl_pause),
153 STMMAC_STAT(mac_gmii_tx_proto_engine),
154 STMMAC_STAT(mtl_rx_fifo_fill_level_full),
155 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
156 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
157 STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
158 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
159 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
160 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
161 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
162 STMMAC_STAT(mtl_rx_fifo_ctrl_active),
163 STMMAC_STAT(mac_rx_frame_ctrl_fifo),
164 STMMAC_STAT(mac_gmii_rx_proto_engine),
166 STMMAC_STAT(tx_tso_frames),
167 STMMAC_STAT(tx_tso_nfrags),
169 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
171 /* HW MAC Management counters (if supported) */
172 #define STMMAC_MMC_STAT(m) \
173 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \
174 offsetof(struct stmmac_priv, mmc.m)}
176 static const struct stmmac_stats stmmac_mmc[] = {
177 STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
178 STMMAC_MMC_STAT(mmc_tx_framecount_gb),
179 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
180 STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
181 STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
182 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
183 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
184 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
185 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
186 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
187 STMMAC_MMC_STAT(mmc_tx_unicast_gb),
188 STMMAC_MMC_STAT(mmc_tx_multicast_gb),
189 STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
190 STMMAC_MMC_STAT(mmc_tx_underflow_error),
191 STMMAC_MMC_STAT(mmc_tx_singlecol_g),
192 STMMAC_MMC_STAT(mmc_tx_multicol_g),
193 STMMAC_MMC_STAT(mmc_tx_deferred),
194 STMMAC_MMC_STAT(mmc_tx_latecol),
195 STMMAC_MMC_STAT(mmc_tx_exesscol),
196 STMMAC_MMC_STAT(mmc_tx_carrier_error),
197 STMMAC_MMC_STAT(mmc_tx_octetcount_g),
198 STMMAC_MMC_STAT(mmc_tx_framecount_g),
199 STMMAC_MMC_STAT(mmc_tx_excessdef),
200 STMMAC_MMC_STAT(mmc_tx_pause_frame),
201 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
202 STMMAC_MMC_STAT(mmc_rx_framecount_gb),
203 STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
204 STMMAC_MMC_STAT(mmc_rx_octetcount_g),
205 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
206 STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
207 STMMAC_MMC_STAT(mmc_rx_crc_error),
208 STMMAC_MMC_STAT(mmc_rx_align_error),
209 STMMAC_MMC_STAT(mmc_rx_run_error),
210 STMMAC_MMC_STAT(mmc_rx_jabber_error),
211 STMMAC_MMC_STAT(mmc_rx_undersize_g),
212 STMMAC_MMC_STAT(mmc_rx_oversize_g),
213 STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
214 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
215 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
216 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
217 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
218 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
219 STMMAC_MMC_STAT(mmc_rx_unicast_g),
220 STMMAC_MMC_STAT(mmc_rx_length_error),
221 STMMAC_MMC_STAT(mmc_rx_autofrangetype),
222 STMMAC_MMC_STAT(mmc_rx_pause_frames),
223 STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
224 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
225 STMMAC_MMC_STAT(mmc_rx_watchdog_error),
226 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
227 STMMAC_MMC_STAT(mmc_rx_ipc_intr),
228 STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
229 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
230 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
231 STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
232 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
233 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
234 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
235 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
236 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
237 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
238 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
239 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
240 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
241 STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
242 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
243 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
244 STMMAC_MMC_STAT(mmc_rx_udp_gd),
245 STMMAC_MMC_STAT(mmc_rx_udp_err),
246 STMMAC_MMC_STAT(mmc_rx_tcp_gd),
247 STMMAC_MMC_STAT(mmc_rx_tcp_err),
248 STMMAC_MMC_STAT(mmc_rx_icmp_gd),
249 STMMAC_MMC_STAT(mmc_rx_icmp_err),
250 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
251 STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
252 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
253 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
254 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
255 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
257 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
259 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
260 struct ethtool_drvinfo *info)
262 struct stmmac_priv *priv = netdev_priv(dev);
264 if (priv->plat->has_gmac || priv->plat->has_gmac4)
265 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
267 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
268 sizeof(info->driver));
270 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
273 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
274 struct ethtool_link_ksettings *cmd)
276 struct stmmac_priv *priv = netdev_priv(dev);
277 struct phy_device *phy = dev->phydev;
279 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
280 priv->hw->pcs & STMMAC_PCS_SGMII) {
281 struct rgmii_adv adv;
282 u32 supported, advertising, lp_advertising;
284 if (!priv->xstats.pcs_link) {
285 cmd->base.speed = SPEED_UNKNOWN;
286 cmd->base.duplex = DUPLEX_UNKNOWN;
289 cmd->base.duplex = priv->xstats.pcs_duplex;
291 cmd->base.speed = priv->xstats.pcs_speed;
293 /* Get and convert ADV/LP_ADV from the HW AN registers */
294 if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
295 return -EOPNOTSUPP; /* should never happen indeed */
297 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
299 ethtool_convert_link_mode_to_legacy_u32(
300 &supported, cmd->link_modes.supported);
301 ethtool_convert_link_mode_to_legacy_u32(
302 &advertising, cmd->link_modes.advertising);
303 ethtool_convert_link_mode_to_legacy_u32(
304 &lp_advertising, cmd->link_modes.lp_advertising);
306 if (adv.pause & STMMAC_PCS_PAUSE)
307 advertising |= ADVERTISED_Pause;
308 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
309 advertising |= ADVERTISED_Asym_Pause;
310 if (adv.lp_pause & STMMAC_PCS_PAUSE)
311 lp_advertising |= ADVERTISED_Pause;
312 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
313 lp_advertising |= ADVERTISED_Asym_Pause;
315 /* Reg49[3] always set because ANE is always supported */
316 cmd->base.autoneg = ADVERTISED_Autoneg;
317 supported |= SUPPORTED_Autoneg;
318 advertising |= ADVERTISED_Autoneg;
319 lp_advertising |= ADVERTISED_Autoneg;
322 supported |= (SUPPORTED_1000baseT_Full |
323 SUPPORTED_100baseT_Full |
324 SUPPORTED_10baseT_Full);
325 advertising |= (ADVERTISED_1000baseT_Full |
326 ADVERTISED_100baseT_Full |
327 ADVERTISED_10baseT_Full);
329 supported |= (SUPPORTED_1000baseT_Half |
330 SUPPORTED_100baseT_Half |
331 SUPPORTED_10baseT_Half);
332 advertising |= (ADVERTISED_1000baseT_Half |
333 ADVERTISED_100baseT_Half |
334 ADVERTISED_10baseT_Half);
337 lp_advertising |= (ADVERTISED_1000baseT_Full |
338 ADVERTISED_100baseT_Full |
339 ADVERTISED_10baseT_Full);
341 lp_advertising |= (ADVERTISED_1000baseT_Half |
342 ADVERTISED_100baseT_Half |
343 ADVERTISED_10baseT_Half);
344 cmd->base.port = PORT_OTHER;
346 ethtool_convert_legacy_u32_to_link_mode(
347 cmd->link_modes.supported, supported);
348 ethtool_convert_legacy_u32_to_link_mode(
349 cmd->link_modes.advertising, advertising);
350 ethtool_convert_legacy_u32_to_link_mode(
351 cmd->link_modes.lp_advertising, lp_advertising);
357 pr_err("%s: %s: PHY is not registered\n",
358 __func__, dev->name);
361 if (!netif_running(dev)) {
362 pr_err("%s: interface is disabled: we cannot track "
363 "link speed / duplex setting\n", dev->name);
366 phy_ethtool_ksettings_get(phy, cmd);
371 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
372 const struct ethtool_link_ksettings *cmd)
374 struct stmmac_priv *priv = netdev_priv(dev);
375 struct phy_device *phy = dev->phydev;
378 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
379 priv->hw->pcs & STMMAC_PCS_SGMII) {
380 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
382 /* Only support ANE */
383 if (cmd->base.autoneg != AUTONEG_ENABLE)
386 mask &= (ADVERTISED_1000baseT_Half |
387 ADVERTISED_1000baseT_Full |
388 ADVERTISED_100baseT_Half |
389 ADVERTISED_100baseT_Full |
390 ADVERTISED_10baseT_Half |
391 ADVERTISED_10baseT_Full);
393 mutex_lock(&priv->lock);
394 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
395 mutex_unlock(&priv->lock);
400 rc = phy_ethtool_ksettings_set(phy, cmd);
405 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
407 struct stmmac_priv *priv = netdev_priv(dev);
408 return priv->msg_enable;
411 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
413 struct stmmac_priv *priv = netdev_priv(dev);
414 priv->msg_enable = level;
418 static int stmmac_check_if_running(struct net_device *dev)
420 if (!netif_running(dev))
425 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
427 return REG_SPACE_SIZE;
430 static void stmmac_ethtool_gregs(struct net_device *dev,
431 struct ethtool_regs *regs, void *space)
433 u32 *reg_space = (u32 *) space;
435 struct stmmac_priv *priv = netdev_priv(dev);
437 memset(reg_space, 0x0, REG_SPACE_SIZE);
439 stmmac_dump_mac_regs(priv, priv->hw, reg_space);
440 stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
441 /* Copy DMA registers to where ethtool expects them */
442 memcpy(®_space[ETHTOOL_DMA_OFFSET], ®_space[DMA_BUS_MODE / 4],
443 NUM_DWMAC1000_DMA_REGS * 4);
447 stmmac_get_pauseparam(struct net_device *netdev,
448 struct ethtool_pauseparam *pause)
450 struct stmmac_priv *priv = netdev_priv(netdev);
451 struct rgmii_adv adv_lp;
456 if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
461 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
462 netdev->phydev->supported) ||
463 linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
464 netdev->phydev->supported))
468 pause->autoneg = netdev->phydev->autoneg;
470 if (priv->flow_ctrl & FLOW_RX)
472 if (priv->flow_ctrl & FLOW_TX)
478 stmmac_set_pauseparam(struct net_device *netdev,
479 struct ethtool_pauseparam *pause)
481 struct stmmac_priv *priv = netdev_priv(netdev);
482 u32 tx_cnt = priv->plat->tx_queues_to_use;
483 struct phy_device *phy = netdev->phydev;
484 int new_pause = FLOW_OFF;
485 struct rgmii_adv adv_lp;
487 if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
492 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
494 linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
500 new_pause |= FLOW_RX;
502 new_pause |= FLOW_TX;
504 priv->flow_ctrl = new_pause;
505 phy->autoneg = pause->autoneg;
508 if (netif_running(netdev))
509 return phy_start_aneg(phy);
512 stmmac_flow_ctrl(priv, priv->hw, phy->duplex, priv->flow_ctrl,
513 priv->pause, tx_cnt);
517 static void stmmac_get_ethtool_stats(struct net_device *dev,
518 struct ethtool_stats *dummy, u64 *data)
520 struct stmmac_priv *priv = netdev_priv(dev);
521 u32 rx_queues_count = priv->plat->rx_queues_to_use;
522 u32 tx_queues_count = priv->plat->tx_queues_to_use;
526 if (priv->dma_cap.asp) {
527 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
528 if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
534 /* Update the DMA HW counters for dwmac10/100 */
535 ret = stmmac_dma_diagnostic_fr(priv, &dev->stats, (void *) &priv->xstats,
538 /* If supported, for new GMAC chips expose the MMC counters */
539 if (priv->dma_cap.rmon) {
540 dwmac_mmc_read(priv->mmcaddr, &priv->mmc);
542 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
544 p = (char *)priv + stmmac_mmc[i].stat_offset;
546 data[j++] = (stmmac_mmc[i].sizeof_stat ==
547 sizeof(u64)) ? (*(u64 *)p) :
551 if (priv->eee_enabled) {
552 int val = phy_get_eee_err(dev->phydev);
554 priv->xstats.phy_eee_wakeup_error_n = val;
557 if (priv->synopsys_id >= DWMAC_CORE_3_50)
558 stmmac_mac_debug(priv, priv->ioaddr,
559 (void *)&priv->xstats,
560 rx_queues_count, tx_queues_count);
562 for (i = 0; i < STMMAC_STATS_LEN; i++) {
563 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
564 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
565 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
569 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
571 struct stmmac_priv *priv = netdev_priv(netdev);
572 int i, len, safety_len = 0;
576 len = STMMAC_STATS_LEN;
578 if (priv->dma_cap.rmon)
579 len += STMMAC_MMC_STATS_LEN;
580 if (priv->dma_cap.asp) {
581 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
582 if (!stmmac_safety_feat_dump(priv,
597 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
601 struct stmmac_priv *priv = netdev_priv(dev);
605 if (priv->dma_cap.asp) {
606 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
608 if (!stmmac_safety_feat_dump(priv,
611 memcpy(p, desc, ETH_GSTRING_LEN);
612 p += ETH_GSTRING_LEN;
616 if (priv->dma_cap.rmon)
617 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
618 memcpy(p, stmmac_mmc[i].stat_string,
620 p += ETH_GSTRING_LEN;
622 for (i = 0; i < STMMAC_STATS_LEN; i++) {
623 memcpy(p, stmmac_gstrings_stats[i].stat_string,
625 p += ETH_GSTRING_LEN;
634 /* Currently only support WOL through Magic packet. */
635 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
637 struct stmmac_priv *priv = netdev_priv(dev);
639 mutex_lock(&priv->lock);
640 if (device_can_wakeup(priv->device)) {
641 wol->supported = WAKE_MAGIC | WAKE_UCAST;
642 wol->wolopts = priv->wolopts;
644 mutex_unlock(&priv->lock);
647 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
649 struct stmmac_priv *priv = netdev_priv(dev);
650 u32 support = WAKE_MAGIC | WAKE_UCAST;
652 /* By default almost all GMAC devices support the WoL via
653 * magic frame but we can disable it if the HW capability
654 * register shows no support for pmt_magic_frame. */
655 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
656 wol->wolopts &= ~WAKE_MAGIC;
658 if (!device_can_wakeup(priv->device))
661 if (wol->wolopts & ~support)
665 pr_info("stmmac: wakeup enable\n");
666 device_set_wakeup_enable(priv->device, 1);
667 enable_irq_wake(priv->wol_irq);
669 device_set_wakeup_enable(priv->device, 0);
670 disable_irq_wake(priv->wol_irq);
673 mutex_lock(&priv->lock);
674 priv->wolopts = wol->wolopts;
675 mutex_unlock(&priv->lock);
680 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
681 struct ethtool_eee *edata)
683 struct stmmac_priv *priv = netdev_priv(dev);
685 if (!priv->dma_cap.eee)
688 edata->eee_enabled = priv->eee_enabled;
689 edata->eee_active = priv->eee_active;
690 edata->tx_lpi_timer = priv->tx_lpi_timer;
692 return phy_ethtool_get_eee(dev->phydev, edata);
695 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
696 struct ethtool_eee *edata)
698 struct stmmac_priv *priv = netdev_priv(dev);
700 priv->eee_enabled = edata->eee_enabled;
702 if (!priv->eee_enabled)
703 stmmac_disable_eee_mode(priv);
705 /* We are asking for enabling the EEE but it is safe
706 * to verify all by invoking the eee_init function.
707 * In case of failure it will return an error.
709 priv->eee_enabled = stmmac_eee_init(priv);
710 if (!priv->eee_enabled)
713 /* Do not change tx_lpi_timer in case of failure */
714 priv->tx_lpi_timer = edata->tx_lpi_timer;
717 return phy_ethtool_set_eee(dev->phydev, edata);
720 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
722 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
725 clk = priv->plat->clk_ref_rate;
730 return (usec * (clk / 1000000)) / 256;
733 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
735 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
738 clk = priv->plat->clk_ref_rate;
743 return (riwt * 256) / (clk / 1000000);
746 static int stmmac_get_coalesce(struct net_device *dev,
747 struct ethtool_coalesce *ec)
749 struct stmmac_priv *priv = netdev_priv(dev);
751 ec->tx_coalesce_usecs = priv->tx_coal_timer;
752 ec->tx_max_coalesced_frames = priv->tx_coal_frames;
755 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
760 static int stmmac_set_coalesce(struct net_device *dev,
761 struct ethtool_coalesce *ec)
763 struct stmmac_priv *priv = netdev_priv(dev);
764 u32 rx_cnt = priv->plat->rx_queues_to_use;
765 unsigned int rx_riwt;
767 /* Check not supported parameters */
768 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) ||
769 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) ||
770 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) ||
771 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) ||
772 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) ||
773 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) ||
774 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) ||
775 (ec->rx_max_coalesced_frames_high) ||
776 (ec->tx_max_coalesced_frames_irq) ||
777 (ec->stats_block_coalesce_usecs) ||
778 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval))
781 if (ec->rx_coalesce_usecs == 0)
784 if ((ec->tx_coalesce_usecs == 0) &&
785 (ec->tx_max_coalesced_frames == 0))
788 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
789 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
792 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
794 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
796 else if (!priv->use_riwt)
799 /* Only copy relevant parameters, ignore all others. */
800 priv->tx_coal_frames = ec->tx_max_coalesced_frames;
801 priv->tx_coal_timer = ec->tx_coalesce_usecs;
802 priv->rx_riwt = rx_riwt;
803 stmmac_rx_watchdog(priv, priv->ioaddr, priv->rx_riwt, rx_cnt);
808 static int stmmac_get_ts_info(struct net_device *dev,
809 struct ethtool_ts_info *info)
811 struct stmmac_priv *priv = netdev_priv(dev);
813 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
815 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
816 SOF_TIMESTAMPING_TX_HARDWARE |
817 SOF_TIMESTAMPING_RX_SOFTWARE |
818 SOF_TIMESTAMPING_RX_HARDWARE |
819 SOF_TIMESTAMPING_SOFTWARE |
820 SOF_TIMESTAMPING_RAW_HARDWARE;
823 info->phc_index = ptp_clock_index(priv->ptp_clock);
825 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
827 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
828 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
829 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
830 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
831 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
832 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
833 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
834 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
835 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
836 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
837 (1 << HWTSTAMP_FILTER_ALL));
840 return ethtool_op_get_ts_info(dev, info);
843 static int stmmac_get_tunable(struct net_device *dev,
844 const struct ethtool_tunable *tuna, void *data)
846 struct stmmac_priv *priv = netdev_priv(dev);
850 case ETHTOOL_RX_COPYBREAK:
851 *(u32 *)data = priv->rx_copybreak;
861 static int stmmac_set_tunable(struct net_device *dev,
862 const struct ethtool_tunable *tuna,
865 struct stmmac_priv *priv = netdev_priv(dev);
869 case ETHTOOL_RX_COPYBREAK:
870 priv->rx_copybreak = *(u32 *)data;
880 static const struct ethtool_ops stmmac_ethtool_ops = {
881 .begin = stmmac_check_if_running,
882 .get_drvinfo = stmmac_ethtool_getdrvinfo,
883 .get_msglevel = stmmac_ethtool_getmsglevel,
884 .set_msglevel = stmmac_ethtool_setmsglevel,
885 .get_regs = stmmac_ethtool_gregs,
886 .get_regs_len = stmmac_ethtool_get_regs_len,
887 .get_link = ethtool_op_get_link,
888 .nway_reset = phy_ethtool_nway_reset,
889 .get_pauseparam = stmmac_get_pauseparam,
890 .set_pauseparam = stmmac_set_pauseparam,
891 .get_ethtool_stats = stmmac_get_ethtool_stats,
892 .get_strings = stmmac_get_strings,
893 .get_wol = stmmac_get_wol,
894 .set_wol = stmmac_set_wol,
895 .get_eee = stmmac_ethtool_op_get_eee,
896 .set_eee = stmmac_ethtool_op_set_eee,
897 .get_sset_count = stmmac_get_sset_count,
898 .get_ts_info = stmmac_get_ts_info,
899 .get_coalesce = stmmac_get_coalesce,
900 .set_coalesce = stmmac_set_coalesce,
901 .get_tunable = stmmac_get_tunable,
902 .set_tunable = stmmac_set_tunable,
903 .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
904 .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
907 void stmmac_set_ethtool_ops(struct net_device *netdev)
909 netdev->ethtool_ops = &stmmac_ethtool_ops;