1 /*******************************************************************************
2 STMMAC Common Header File
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 The full GNU General Public License is included in this distribution in
16 the file called "COPYING".
18 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
19 *******************************************************************************/
24 #include <linux/etherdevice.h>
25 #include <linux/netdevice.h>
26 #include <linux/stmmac.h>
27 #include <linux/phy.h>
28 #include <linux/module.h>
29 #if IS_ENABLED(CONFIG_VLAN_8021Q)
30 #define STMMAC_VLAN_TAG_USED
31 #include <linux/if_vlan.h>
38 /* Synopsys Core versions */
39 #define DWMAC_CORE_3_40 0x34
40 #define DWMAC_CORE_3_50 0x35
41 #define DWMAC_CORE_4_00 0x40
42 #define DWMAC_CORE_5_00 0x50
43 #define DWMAC_CORE_5_10 0x51
44 #define STMMAC_CHAN0 0 /* Always supported and default for all chips */
46 /* These need to be power of two, and >= 4 */
47 #define DMA_TX_SIZE 512
48 #define DMA_RX_SIZE 512
49 #define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1))
51 #undef FRAME_FILTER_DEBUG
52 /* #define FRAME_FILTER_DEBUG */
54 /* Extra statistic and debug information exposed by ethtool */
55 struct stmmac_extra_stats {
57 unsigned long tx_underflow ____cacheline_aligned;
58 unsigned long tx_carrier;
59 unsigned long tx_losscarrier;
60 unsigned long vlan_tag;
61 unsigned long tx_deferred;
62 unsigned long tx_vlan;
63 unsigned long tx_jabber;
64 unsigned long tx_frame_flushed;
65 unsigned long tx_payload_error;
66 unsigned long tx_ip_header_error;
68 unsigned long rx_desc;
69 unsigned long sa_filter_fail;
70 unsigned long overflow_error;
71 unsigned long ipc_csum_error;
72 unsigned long rx_collision;
73 unsigned long rx_crc_errors;
74 unsigned long dribbling_bit;
75 unsigned long rx_length;
77 unsigned long rx_multicast;
78 unsigned long rx_gmac_overflow;
79 unsigned long rx_watchdog;
80 unsigned long da_rx_filter_fail;
81 unsigned long sa_rx_filter_fail;
82 unsigned long rx_missed_cntr;
83 unsigned long rx_overflow_cntr;
84 unsigned long rx_vlan;
85 /* Tx/Rx IRQ error info */
86 unsigned long tx_undeflow_irq;
87 unsigned long tx_process_stopped_irq;
88 unsigned long tx_jabber_irq;
89 unsigned long rx_overflow_irq;
90 unsigned long rx_buf_unav_irq;
91 unsigned long rx_process_stopped_irq;
92 unsigned long rx_watchdog_irq;
93 unsigned long tx_early_irq;
94 unsigned long fatal_bus_error_irq;
95 /* Tx/Rx IRQ Events */
96 unsigned long rx_early_irq;
97 unsigned long threshold;
98 unsigned long tx_pkt_n;
99 unsigned long rx_pkt_n;
100 unsigned long normal_irq_n;
101 unsigned long rx_normal_irq_n;
102 unsigned long napi_poll;
103 unsigned long tx_normal_irq_n;
104 unsigned long tx_clean;
105 unsigned long tx_set_ic_bit;
106 unsigned long irq_receive_pmt_irq_n;
108 unsigned long mmc_tx_irq_n;
109 unsigned long mmc_rx_irq_n;
110 unsigned long mmc_rx_csum_offload_irq_n;
112 unsigned long irq_tx_path_in_lpi_mode_n;
113 unsigned long irq_tx_path_exit_lpi_mode_n;
114 unsigned long irq_rx_path_in_lpi_mode_n;
115 unsigned long irq_rx_path_exit_lpi_mode_n;
116 unsigned long phy_eee_wakeup_error_n;
117 /* Extended RDES status */
118 unsigned long ip_hdr_err;
119 unsigned long ip_payload_err;
120 unsigned long ip_csum_bypassed;
121 unsigned long ipv4_pkt_rcvd;
122 unsigned long ipv6_pkt_rcvd;
123 unsigned long no_ptp_rx_msg_type_ext;
124 unsigned long ptp_rx_msg_type_sync;
125 unsigned long ptp_rx_msg_type_follow_up;
126 unsigned long ptp_rx_msg_type_delay_req;
127 unsigned long ptp_rx_msg_type_delay_resp;
128 unsigned long ptp_rx_msg_type_pdelay_req;
129 unsigned long ptp_rx_msg_type_pdelay_resp;
130 unsigned long ptp_rx_msg_type_pdelay_follow_up;
131 unsigned long ptp_rx_msg_type_announce;
132 unsigned long ptp_rx_msg_type_management;
133 unsigned long ptp_rx_msg_pkt_reserved_type;
134 unsigned long ptp_frame_type;
135 unsigned long ptp_ver;
136 unsigned long timestamp_dropped;
137 unsigned long av_pkt_rcvd;
138 unsigned long av_tagged_pkt_rcvd;
139 unsigned long vlan_tag_priority_val;
140 unsigned long l3_filter_match;
141 unsigned long l4_filter_match;
142 unsigned long l3_l4_filter_no_match;
144 unsigned long irq_pcs_ane_n;
145 unsigned long irq_pcs_link_n;
146 unsigned long irq_rgmii_n;
147 unsigned long pcs_link;
148 unsigned long pcs_duplex;
149 unsigned long pcs_speed;
151 unsigned long mtl_tx_status_fifo_full;
152 unsigned long mtl_tx_fifo_not_empty;
153 unsigned long mmtl_fifo_ctrl;
154 unsigned long mtl_tx_fifo_read_ctrl_write;
155 unsigned long mtl_tx_fifo_read_ctrl_wait;
156 unsigned long mtl_tx_fifo_read_ctrl_read;
157 unsigned long mtl_tx_fifo_read_ctrl_idle;
158 unsigned long mac_tx_in_pause;
159 unsigned long mac_tx_frame_ctrl_xfer;
160 unsigned long mac_tx_frame_ctrl_idle;
161 unsigned long mac_tx_frame_ctrl_wait;
162 unsigned long mac_tx_frame_ctrl_pause;
163 unsigned long mac_gmii_tx_proto_engine;
164 unsigned long mtl_rx_fifo_fill_level_full;
165 unsigned long mtl_rx_fifo_fill_above_thresh;
166 unsigned long mtl_rx_fifo_fill_below_thresh;
167 unsigned long mtl_rx_fifo_fill_level_empty;
168 unsigned long mtl_rx_fifo_read_ctrl_flush;
169 unsigned long mtl_rx_fifo_read_ctrl_read_data;
170 unsigned long mtl_rx_fifo_read_ctrl_status;
171 unsigned long mtl_rx_fifo_read_ctrl_idle;
172 unsigned long mtl_rx_fifo_ctrl_active;
173 unsigned long mac_rx_frame_ctrl_fifo;
174 unsigned long mac_gmii_rx_proto_engine;
176 unsigned long tx_tso_frames;
177 unsigned long tx_tso_nfrags;
180 /* Safety Feature statistics exposed by ethtool */
181 struct stmmac_safety_stats {
182 unsigned long mac_errors[32];
183 unsigned long mtl_errors[32];
184 unsigned long dma_errors[32];
187 /* Number of fields in Safety Stats */
188 #define STMMAC_SAFETY_FEAT_SIZE \
189 (sizeof(struct stmmac_safety_stats) / sizeof(unsigned long))
191 /* CSR Frequency Access Defines*/
192 #define CSR_F_35M 35000000
193 #define CSR_F_60M 60000000
194 #define CSR_F_100M 100000000
195 #define CSR_F_150M 150000000
196 #define CSR_F_250M 250000000
197 #define CSR_F_300M 300000000
199 #define MAC_CSR_H_FRQ_MASK 0x20
201 #define HASH_TABLE_SIZE 64
202 #define PAUSE_TIME 0xffff
204 /* Flow Control defines */
208 #define FLOW_AUTO (FLOW_TX | FLOW_RX)
211 #define STMMAC_PCS_RGMII (1 << 0)
212 #define STMMAC_PCS_SGMII (1 << 1)
213 #define STMMAC_PCS_TBI (1 << 2)
214 #define STMMAC_PCS_RTBI (1 << 3)
216 #define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
218 /* DAM HW feature register fields */
219 #define DMA_HW_FEAT_MIISEL 0x00000001 /* 10/100 Mbps Support */
220 #define DMA_HW_FEAT_GMIISEL 0x00000002 /* 1000 Mbps Support */
221 #define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */
222 #define DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */
223 #define DMA_HW_FEAT_HASHSEL 0x00000010 /* HASH Filter */
224 #define DMA_HW_FEAT_ADDMAC 0x00000020 /* Multiple MAC Addr Reg */
225 #define DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */
226 #define DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */
227 #define DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */
228 #define DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */
229 #define DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */
230 #define DMA_HW_FEAT_MMCSEL 0x00000800 /* RMON Module */
231 #define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 */
232 #define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 PTPv2 */
233 #define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */
234 #define DMA_HW_FEAT_AVSEL 0x00008000 /* AV Feature */
235 #define DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */
236 #define DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP COE (Type 1) in Rx */
237 #define DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP COE (Type 2) in Rx */
238 #define DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */
239 #define DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. additional Rx Channels */
240 #define DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. additional Tx Channels */
241 #define DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate Descriptor */
242 /* Timestamping with Internal System Time */
243 #define DMA_HW_FEAT_INTTSEN 0x02000000
244 #define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */
245 #define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN */
246 #define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY iface */
247 #define DEFAULT_DMA_PBL 8
249 /* PCS status and mask defines */
250 #define PCS_ANE_IRQ BIT(2) /* PCS Auto-Negotiation */
251 #define PCS_LINK_IRQ BIT(1) /* PCS Link */
252 #define PCS_RGSMIIIS_IRQ BIT(0) /* RGMII or SMII Interrupt */
254 /* Max/Min RI Watchdog Timer count value */
255 #define MAX_DMA_RIWT 0xff
256 #define MIN_DMA_RIWT 0x20
257 /* Tx coalesce parameters */
258 #define STMMAC_COAL_TX_TIMER 40000
259 #define STMMAC_MAX_COAL_TX_TICK 100000
260 #define STMMAC_TX_MAX_FRAMES 256
261 #define STMMAC_TX_FRAMES 64
265 PACKET_AVCPQ = 0x1, /* AV Untagged Control packets */
266 PACKET_PTPQ = 0x2, /* PTP Packets */
267 PACKET_DCBCPQ = 0x3, /* DCB Control Packets */
268 PACKET_UPQ = 0x4, /* Untagged Packets */
269 PACKET_MCBCQ = 0x5, /* Multicast & Broadcast Packets */
273 enum rx_frame_status {
283 enum tx_frame_status {
290 enum dma_irq_status {
292 tx_hard_error_bump_tc = 0x2,
297 /* EEE and LPI defines */
298 #define CORE_IRQ_TX_PATH_IN_LPI_MODE (1 << 0)
299 #define CORE_IRQ_TX_PATH_EXIT_LPI_MODE (1 << 1)
300 #define CORE_IRQ_RX_PATH_IN_LPI_MODE (1 << 2)
301 #define CORE_IRQ_RX_PATH_EXIT_LPI_MODE (1 << 3)
303 #define CORE_IRQ_MTL_RX_OVERFLOW BIT(8)
305 /* Physical Coding Sublayer */
309 unsigned int lp_pause;
310 unsigned int lp_duplex;
313 #define STMMAC_PCS_PAUSE 1
314 #define STMMAC_PCS_ASYM_PAUSE 2
316 /* DMA HW capabilities */
317 struct dma_features {
318 unsigned int mbps_10_100;
319 unsigned int mbps_1000;
320 unsigned int half_duplex;
321 unsigned int hash_filter;
322 unsigned int multi_addr;
324 unsigned int sma_mdio;
325 unsigned int pmt_remote_wake_up;
326 unsigned int pmt_magic_frame;
329 unsigned int time_stamp;
331 unsigned int atime_stamp;
332 /* 802.3az - Energy-Efficient Ethernet (EEE) */
339 unsigned int rx_coe_type1;
340 unsigned int rx_coe_type2;
341 unsigned int rxfifo_over_2048;
342 /* TX and RX number of channels */
343 unsigned int number_rx_channel;
344 unsigned int number_tx_channel;
345 /* TX and RX number of queues */
346 unsigned int number_rx_queues;
347 unsigned int number_tx_queues;
348 /* Alternate (enhanced) DESC mode */
349 unsigned int enh_desc;
350 /* TX and RX FIFO sizes */
351 unsigned int tx_fifo_size;
352 unsigned int rx_fifo_size;
353 /* Automotive Safety Package */
357 /* GMAC TX FIFO is 8K, Rx FIFO is 16K */
358 #define BUF_SIZE_16KiB 16384
359 #define BUF_SIZE_8KiB 8192
360 #define BUF_SIZE_4KiB 4096
361 #define BUF_SIZE_2KiB 2048
363 /* Power Down and WOL */
364 #define PMT_NOT_SUPPORTED 0
365 #define PMT_SUPPORTED 1
367 /* Common MAC defines */
368 #define MAC_CTRL_REG 0x00000000 /* MAC Control */
369 #define MAC_ENABLE_TX 0x00000008 /* Transmitter Enable */
370 #define MAC_ENABLE_RX 0x00000004 /* Receiver Enable */
372 /* Default LPI timers */
373 #define STMMAC_DEFAULT_LIT_LS 0x3E8
374 #define STMMAC_DEFAULT_TWT_LS 0x1E
376 #define STMMAC_CHAIN_MODE 0x1
377 #define STMMAC_RING_MODE 0x2
379 #define JUMBO_LEN 9000
381 extern const struct stmmac_desc_ops enh_desc_ops;
382 extern const struct stmmac_desc_ops ndesc_ops;
384 struct mac_device_info;
386 extern const struct stmmac_hwtimestamp stmmac_ptp;
387 extern const struct stmmac_mode_ops dwmac4_ring_mode_ops;
398 unsigned int addr; /* MII Address */
399 unsigned int data; /* MII Data */
400 unsigned int addr_shift; /* MII address shift */
401 unsigned int reg_shift; /* MII reg shift */
402 unsigned int addr_mask; /* MII address mask */
403 unsigned int reg_mask; /* MII reg mask */
404 unsigned int clk_csr_shift;
405 unsigned int clk_csr_mask;
408 struct mac_device_info {
409 const struct stmmac_ops *mac;
410 const struct stmmac_desc_ops *desc;
411 const struct stmmac_dma_ops *dma;
412 const struct stmmac_mode_ops *mode;
413 const struct stmmac_hwtimestamp *ptp;
414 struct mii_regs mii; /* MII register Addresses */
415 struct mac_link link;
416 void __iomem *pcsr; /* vpointer to device CSRs */
417 int multicast_filter_bins;
418 int unicast_filter_entries;
420 unsigned int rx_csum;
426 struct stmmac_rx_routing {
431 struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr, int mcbins,
432 int perfect_uc_entries,
434 struct mac_device_info *dwmac100_setup(void __iomem *ioaddr, int *synopsys_id);
435 struct mac_device_info *dwmac4_setup(void __iomem *ioaddr, int mcbins,
436 int perfect_uc_entries, int *synopsys_id);
438 void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
439 unsigned int high, unsigned int low);
440 void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
441 unsigned int high, unsigned int low);
442 void stmmac_set_mac(void __iomem *ioaddr, bool enable);
444 void stmmac_dwmac4_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
445 unsigned int high, unsigned int low);
446 void stmmac_dwmac4_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
447 unsigned int high, unsigned int low);
448 void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool enable);
450 void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
452 extern const struct stmmac_mode_ops ring_mode_ops;
453 extern const struct stmmac_mode_ops chain_mode_ops;
454 extern const struct stmmac_desc_ops dwmac4_desc_ops;
457 * stmmac_get_synopsys_id - return the SYINID.
458 * @priv: driver private structure
459 * Description: this simple function is to decode and return the SYINID
460 * starting from the HW core register.
462 static inline u32 stmmac_get_synopsys_id(u32 hwid)
464 /* Check Synopsys Id (not available on old chips) */
466 u32 uid = ((hwid & 0x0000ff00) >> 8);
467 u32 synid = (hwid & 0x000000ff);
469 pr_info("stmmac - user ID: 0x%x, Synopsys ID: 0x%x\n",
476 #endif /* __COMMON_H__ */