1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35 #include <linux/crc32.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
64 #define SMSC_CHIPNAME "smsc911x"
65 #define SMSC_MDIONAME "smsc911x-mdio"
66 #define SMSC_DRV_VERSION "2008-10-21"
68 MODULE_LICENSE("GPL");
69 MODULE_VERSION(SMSC_DRV_VERSION);
70 MODULE_ALIAS("platform:smsc911x");
73 static int debug = 16;
78 module_param(debug, int, 0);
79 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
85 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
86 void (*rx_readfifo)(struct smsc911x_data *pdata,
87 unsigned int *buf, unsigned int wordcount);
88 void (*tx_writefifo)(struct smsc911x_data *pdata,
89 unsigned int *buf, unsigned int wordcount);
92 #define SMSC911X_NUM_SUPPLIES 2
94 struct smsc911x_data {
99 /* used to decide which workarounds apply */
100 unsigned int generation;
102 /* device configuration (copied from platform_data during probe) */
103 struct smsc911x_platform_config config;
105 /* This needs to be acquired before calling any of below:
106 * smsc911x_mac_read(), smsc911x_mac_write()
110 /* spinlock to ensure register accesses are serialised */
113 struct phy_device *phy_dev;
114 struct mii_bus *mii_bus;
115 int phy_irq[PHY_MAX_ADDR];
116 unsigned int using_extphy;
121 unsigned int gpio_setting;
122 unsigned int gpio_orig_setting;
123 struct net_device *dev;
124 struct napi_struct napi;
126 unsigned int software_irq_signal;
128 #ifdef USE_PHY_WORK_AROUND
129 #define MIN_PACKET_SIZE (64)
130 char loopback_tx_pkt[MIN_PACKET_SIZE];
131 char loopback_rx_pkt[MIN_PACKET_SIZE];
132 unsigned int resetcount;
135 /* Members for Multicast filter workaround */
136 unsigned int multicast_update_pending;
137 unsigned int set_bits_mask;
138 unsigned int clear_bits_mask;
142 /* register access functions */
143 const struct smsc911x_ops *ops;
146 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
149 /* Easy access to information */
150 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
152 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
154 if (pdata->config.flags & SMSC911X_USE_32BIT)
155 return readl(pdata->ioaddr + reg);
157 if (pdata->config.flags & SMSC911X_USE_16BIT)
158 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
159 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
166 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
168 if (pdata->config.flags & SMSC911X_USE_32BIT)
169 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
171 if (pdata->config.flags & SMSC911X_USE_16BIT)
172 return (readw(pdata->ioaddr +
173 __smsc_shift(pdata, reg)) & 0xFFFF) |
174 ((readw(pdata->ioaddr +
175 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
181 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
186 spin_lock_irqsave(&pdata->dev_lock, flags);
187 data = pdata->ops->reg_read(pdata, reg);
188 spin_unlock_irqrestore(&pdata->dev_lock, flags);
193 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
196 if (pdata->config.flags & SMSC911X_USE_32BIT) {
197 writel(val, pdata->ioaddr + reg);
201 if (pdata->config.flags & SMSC911X_USE_16BIT) {
202 writew(val & 0xFFFF, pdata->ioaddr + reg);
203 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
211 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
213 if (pdata->config.flags & SMSC911X_USE_32BIT) {
214 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
218 if (pdata->config.flags & SMSC911X_USE_16BIT) {
220 pdata->ioaddr + __smsc_shift(pdata, reg));
221 writew((val >> 16) & 0xFFFF,
222 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
229 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
234 spin_lock_irqsave(&pdata->dev_lock, flags);
235 pdata->ops->reg_write(pdata, reg, val);
236 spin_unlock_irqrestore(&pdata->dev_lock, flags);
239 /* Writes a packet to the TX_DATA_FIFO */
241 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
242 unsigned int wordcount)
246 spin_lock_irqsave(&pdata->dev_lock, flags);
248 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
250 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
255 if (pdata->config.flags & SMSC911X_USE_32BIT) {
256 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
260 if (pdata->config.flags & SMSC911X_USE_16BIT) {
262 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
268 spin_unlock_irqrestore(&pdata->dev_lock, flags);
271 /* Writes a packet to the TX_DATA_FIFO - shifted version */
273 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
274 unsigned int wordcount)
278 spin_lock_irqsave(&pdata->dev_lock, flags);
280 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
282 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
287 if (pdata->config.flags & SMSC911X_USE_32BIT) {
288 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
289 TX_DATA_FIFO), buf, wordcount);
293 if (pdata->config.flags & SMSC911X_USE_16BIT) {
295 __smsc911x_reg_write_shift(pdata,
296 TX_DATA_FIFO, *buf++);
302 spin_unlock_irqrestore(&pdata->dev_lock, flags);
305 /* Reads a packet out of the RX_DATA_FIFO */
307 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
308 unsigned int wordcount)
312 spin_lock_irqsave(&pdata->dev_lock, flags);
314 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
316 *buf++ = swab32(__smsc911x_reg_read(pdata,
321 if (pdata->config.flags & SMSC911X_USE_32BIT) {
322 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
326 if (pdata->config.flags & SMSC911X_USE_16BIT) {
328 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
334 spin_unlock_irqrestore(&pdata->dev_lock, flags);
337 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
339 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
340 unsigned int wordcount)
344 spin_lock_irqsave(&pdata->dev_lock, flags);
346 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
348 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
353 if (pdata->config.flags & SMSC911X_USE_32BIT) {
354 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
355 RX_DATA_FIFO), buf, wordcount);
359 if (pdata->config.flags & SMSC911X_USE_16BIT) {
361 *buf++ = __smsc911x_reg_read_shift(pdata,
368 spin_unlock_irqrestore(&pdata->dev_lock, flags);
372 * enable resources, currently just regulators.
374 static int smsc911x_enable_resources(struct platform_device *pdev)
376 struct net_device *ndev = platform_get_drvdata(pdev);
377 struct smsc911x_data *pdata = netdev_priv(ndev);
380 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
383 netdev_err(ndev, "failed to enable regulators %d\n",
389 * disable resources, currently just regulators.
391 static int smsc911x_disable_resources(struct platform_device *pdev)
393 struct net_device *ndev = platform_get_drvdata(pdev);
394 struct smsc911x_data *pdata = netdev_priv(ndev);
397 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
403 * Request resources, currently just regulators.
405 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
406 * these are not always-on we need to request regulators to be turned on
407 * before we can try to access the device registers.
409 static int smsc911x_request_resources(struct platform_device *pdev)
411 struct net_device *ndev = platform_get_drvdata(pdev);
412 struct smsc911x_data *pdata = netdev_priv(ndev);
415 /* Request regulators */
416 pdata->supplies[0].supply = "vdd33a";
417 pdata->supplies[1].supply = "vddvario";
418 ret = regulator_bulk_get(&pdev->dev,
419 ARRAY_SIZE(pdata->supplies),
422 netdev_err(ndev, "couldn't get regulators %d\n",
428 * Free resources, currently just regulators.
431 static void smsc911x_free_resources(struct platform_device *pdev)
433 struct net_device *ndev = platform_get_drvdata(pdev);
434 struct smsc911x_data *pdata = netdev_priv(ndev);
436 /* Free regulators */
437 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
441 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
442 * and smsc911x_mac_write, so assumes mac_lock is held */
443 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
448 SMSC_ASSERT_MAC_LOCK(pdata);
450 for (i = 0; i < 40; i++) {
451 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
452 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
455 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
456 "MAC_CSR_CMD: 0x%08X", val);
460 /* Fetches a MAC register value. Assumes mac_lock is acquired */
461 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
465 SMSC_ASSERT_MAC_LOCK(pdata);
467 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
468 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
469 SMSC_WARN(pdata, hw, "MAC busy at entry");
473 /* Send the MAC cmd */
474 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
475 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
477 /* Workaround for hardware read-after-write restriction */
478 temp = smsc911x_reg_read(pdata, BYTE_TEST);
480 /* Wait for the read to complete */
481 if (likely(smsc911x_mac_complete(pdata) == 0))
482 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
484 SMSC_WARN(pdata, hw, "MAC busy after read");
488 /* Set a mac register, mac_lock must be acquired before calling */
489 static void smsc911x_mac_write(struct smsc911x_data *pdata,
490 unsigned int offset, u32 val)
494 SMSC_ASSERT_MAC_LOCK(pdata);
496 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
497 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
499 "smsc911x_mac_write failed, MAC busy at entry");
503 /* Send data to write */
504 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
506 /* Write the actual data */
507 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
508 MAC_CSR_CMD_CSR_BUSY_));
510 /* Workaround for hardware read-after-write restriction */
511 temp = smsc911x_reg_read(pdata, BYTE_TEST);
513 /* Wait for the write to complete */
514 if (likely(smsc911x_mac_complete(pdata) == 0))
517 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
520 /* Get a phy register */
521 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
523 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
528 spin_lock_irqsave(&pdata->mac_lock, flags);
530 /* Confirm MII not busy */
531 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
532 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
537 /* Set the address, index & direction (read from PHY) */
538 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
539 smsc911x_mac_write(pdata, MII_ACC, addr);
541 /* Wait for read to complete w/ timeout */
542 for (i = 0; i < 100; i++)
543 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
544 reg = smsc911x_mac_read(pdata, MII_DATA);
548 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
552 spin_unlock_irqrestore(&pdata->mac_lock, flags);
556 /* Set a phy register */
557 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
560 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
565 spin_lock_irqsave(&pdata->mac_lock, flags);
567 /* Confirm MII not busy */
568 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
569 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
574 /* Put the data to write in the MAC */
575 smsc911x_mac_write(pdata, MII_DATA, val);
577 /* Set the address, index & direction (write to PHY) */
578 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
580 smsc911x_mac_write(pdata, MII_ACC, addr);
582 /* Wait for write to complete w/ timeout */
583 for (i = 0; i < 100; i++)
584 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
589 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
593 spin_unlock_irqrestore(&pdata->mac_lock, flags);
597 /* Switch to external phy. Assumes tx and rx are stopped. */
598 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
600 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
602 /* Disable phy clocks to the MAC */
603 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
604 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
605 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
606 udelay(10); /* Enough time for clocks to stop */
608 /* Switch to external phy */
609 hwcfg |= HW_CFG_EXT_PHY_EN_;
610 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
612 /* Enable phy clocks to the MAC */
613 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
614 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
615 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
616 udelay(10); /* Enough time for clocks to restart */
618 hwcfg |= HW_CFG_SMI_SEL_;
619 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
622 /* Autodetects and enables external phy if present on supported chips.
623 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
624 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
625 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
627 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
629 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
630 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
631 pdata->using_extphy = 0;
632 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
633 SMSC_TRACE(pdata, hw, "Forcing external PHY");
634 smsc911x_phy_enable_external(pdata);
635 pdata->using_extphy = 1;
636 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
637 SMSC_TRACE(pdata, hw,
638 "HW_CFG EXT_PHY_DET set, using external PHY");
639 smsc911x_phy_enable_external(pdata);
640 pdata->using_extphy = 1;
642 SMSC_TRACE(pdata, hw,
643 "HW_CFG EXT_PHY_DET clear, using internal PHY");
644 pdata->using_extphy = 0;
648 /* Fetches a tx status out of the status fifo */
649 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
651 unsigned int result =
652 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
655 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
660 /* Fetches the next rx status */
661 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
663 unsigned int result =
664 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
667 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
672 #ifdef USE_PHY_WORK_AROUND
673 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
680 for (tries = 0; tries < 10; tries++) {
681 unsigned int txcmd_a;
682 unsigned int txcmd_b;
684 unsigned int pktlength;
687 /* Zero-out rx packet memory */
688 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
690 /* Write tx packet to 118 */
691 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
692 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
693 txcmd_a |= MIN_PACKET_SIZE;
695 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
697 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
698 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
700 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
701 wrsz = MIN_PACKET_SIZE + 3;
702 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
705 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
707 /* Wait till transmit is done */
711 status = smsc911x_tx_get_txstatus(pdata);
712 } while ((i--) && (!status));
716 "Failed to transmit during loopback test");
719 if (status & TX_STS_ES_) {
721 "Transmit encountered errors during loopback test");
725 /* Wait till receive is done */
729 status = smsc911x_rx_get_rxstatus(pdata);
730 } while ((i--) && (!status));
734 "Failed to receive during loopback test");
737 if (status & RX_STS_ES_) {
739 "Receive encountered errors during loopback test");
743 pktlength = ((status & 0x3FFF0000UL) >> 16);
744 bufp = (ulong)pdata->loopback_rx_pkt;
745 rdsz = pktlength + 3;
746 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
749 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
751 if (pktlength != (MIN_PACKET_SIZE + 4)) {
752 SMSC_WARN(pdata, hw, "Unexpected packet size "
753 "during loop back test, size=%d, will retry",
758 for (j = 0; j < MIN_PACKET_SIZE; j++) {
759 if (pdata->loopback_tx_pkt[j]
760 != pdata->loopback_rx_pkt[j]) {
766 SMSC_TRACE(pdata, hw, "Successfully verified "
770 SMSC_WARN(pdata, hw, "Data mismatch "
771 "during loop back test, will retry");
779 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
781 struct phy_device *phy_dev = pdata->phy_dev;
783 unsigned int i = 100000;
786 BUG_ON(!phy_dev->bus);
788 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
789 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
792 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
794 } while ((i--) && (temp & BMCR_RESET));
796 if (temp & BMCR_RESET) {
797 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
800 /* Extra delay required because the phy may not be completed with
801 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
802 * enough delay but using 1ms here to be safe */
808 static int smsc911x_phy_loopbacktest(struct net_device *dev)
810 struct smsc911x_data *pdata = netdev_priv(dev);
811 struct phy_device *phy_dev = pdata->phy_dev;
816 /* Initialise tx packet using broadcast destination address */
817 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
819 /* Use incrementing source address */
820 for (i = 6; i < 12; i++)
821 pdata->loopback_tx_pkt[i] = (char)i;
823 /* Set length type field */
824 pdata->loopback_tx_pkt[12] = 0x00;
825 pdata->loopback_tx_pkt[13] = 0x00;
827 for (i = 14; i < MIN_PACKET_SIZE; i++)
828 pdata->loopback_tx_pkt[i] = (char)i;
830 val = smsc911x_reg_read(pdata, HW_CFG);
831 val &= HW_CFG_TX_FIF_SZ_;
833 smsc911x_reg_write(pdata, HW_CFG, val);
835 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
836 smsc911x_reg_write(pdata, RX_CFG,
837 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
839 for (i = 0; i < 10; i++) {
840 /* Set PHY to 10/FD, no ANEG, and loopback mode */
841 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
842 BMCR_LOOPBACK | BMCR_FULLDPLX);
844 /* Enable MAC tx/rx, FD */
845 spin_lock_irqsave(&pdata->mac_lock, flags);
846 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
847 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
848 spin_unlock_irqrestore(&pdata->mac_lock, flags);
850 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
857 spin_lock_irqsave(&pdata->mac_lock, flags);
858 smsc911x_mac_write(pdata, MAC_CR, 0);
859 spin_unlock_irqrestore(&pdata->mac_lock, flags);
861 smsc911x_phy_reset(pdata);
865 spin_lock_irqsave(&pdata->mac_lock, flags);
866 smsc911x_mac_write(pdata, MAC_CR, 0);
867 spin_unlock_irqrestore(&pdata->mac_lock, flags);
869 /* Cancel PHY loopback mode */
870 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
872 smsc911x_reg_write(pdata, TX_CFG, 0);
873 smsc911x_reg_write(pdata, RX_CFG, 0);
877 #endif /* USE_PHY_WORK_AROUND */
879 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
881 struct phy_device *phy_dev = pdata->phy_dev;
882 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
886 if (phy_dev->duplex == DUPLEX_FULL) {
887 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
888 u16 rmtadv = phy_read(phy_dev, MII_LPA);
889 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
891 if (cap & FLOW_CTRL_RX)
896 if (cap & FLOW_CTRL_TX)
901 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
902 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
903 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
905 SMSC_TRACE(pdata, hw, "half duplex");
910 spin_lock_irqsave(&pdata->mac_lock, flags);
911 smsc911x_mac_write(pdata, FLOW, flow);
912 spin_unlock_irqrestore(&pdata->mac_lock, flags);
914 smsc911x_reg_write(pdata, AFC_CFG, afc);
917 /* Update link mode if anything has changed. Called periodically when the
918 * PHY is in polling mode, even if nothing has changed. */
919 static void smsc911x_phy_adjust_link(struct net_device *dev)
921 struct smsc911x_data *pdata = netdev_priv(dev);
922 struct phy_device *phy_dev = pdata->phy_dev;
926 if (phy_dev->duplex != pdata->last_duplex) {
928 SMSC_TRACE(pdata, hw, "duplex state has changed");
930 spin_lock_irqsave(&pdata->mac_lock, flags);
931 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
932 if (phy_dev->duplex) {
933 SMSC_TRACE(pdata, hw,
934 "configuring for full duplex mode");
935 mac_cr |= MAC_CR_FDPX_;
937 SMSC_TRACE(pdata, hw,
938 "configuring for half duplex mode");
939 mac_cr &= ~MAC_CR_FDPX_;
941 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
942 spin_unlock_irqrestore(&pdata->mac_lock, flags);
944 smsc911x_phy_update_flowcontrol(pdata);
945 pdata->last_duplex = phy_dev->duplex;
948 carrier = netif_carrier_ok(dev);
949 if (carrier != pdata->last_carrier) {
950 SMSC_TRACE(pdata, hw, "carrier state has changed");
952 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
953 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
954 (!pdata->using_extphy)) {
955 /* Restore original GPIO configuration */
956 pdata->gpio_setting = pdata->gpio_orig_setting;
957 smsc911x_reg_write(pdata, GPIO_CFG,
958 pdata->gpio_setting);
961 SMSC_TRACE(pdata, hw, "configuring for no carrier");
962 /* Check global setting that LED1
963 * usage is 10/100 indicator */
964 pdata->gpio_setting = smsc911x_reg_read(pdata,
966 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
967 (!pdata->using_extphy)) {
968 /* Force 10/100 LED off, after saving
969 * original GPIO configuration */
970 pdata->gpio_orig_setting = pdata->gpio_setting;
972 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
973 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
976 smsc911x_reg_write(pdata, GPIO_CFG,
977 pdata->gpio_setting);
980 pdata->last_carrier = carrier;
984 static int smsc911x_mii_probe(struct net_device *dev)
986 struct smsc911x_data *pdata = netdev_priv(dev);
987 struct phy_device *phydev = NULL;
990 /* find the first phy */
991 phydev = phy_find_first(pdata->mii_bus);
993 netdev_err(dev, "no PHY found\n");
997 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
998 phydev->addr, phydev->phy_id);
1000 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1001 pdata->config.phy_interface);
1004 netdev_err(dev, "Could not attach to PHY\n");
1009 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1010 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1012 /* mask with MAC supported features */
1013 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1014 SUPPORTED_Asym_Pause);
1015 phydev->advertising = phydev->supported;
1017 pdata->phy_dev = phydev;
1018 pdata->last_duplex = -1;
1019 pdata->last_carrier = -1;
1021 #ifdef USE_PHY_WORK_AROUND
1022 if (smsc911x_phy_loopbacktest(dev) < 0) {
1023 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1026 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1027 #endif /* USE_PHY_WORK_AROUND */
1029 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1033 static int smsc911x_mii_init(struct platform_device *pdev,
1034 struct net_device *dev)
1036 struct smsc911x_data *pdata = netdev_priv(dev);
1037 int err = -ENXIO, i;
1039 pdata->mii_bus = mdiobus_alloc();
1040 if (!pdata->mii_bus) {
1045 pdata->mii_bus->name = SMSC_MDIONAME;
1046 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1047 pdev->name, pdev->id);
1048 pdata->mii_bus->priv = pdata;
1049 pdata->mii_bus->read = smsc911x_mii_read;
1050 pdata->mii_bus->write = smsc911x_mii_write;
1051 pdata->mii_bus->irq = pdata->phy_irq;
1052 for (i = 0; i < PHY_MAX_ADDR; ++i)
1053 pdata->mii_bus->irq[i] = PHY_POLL;
1055 pdata->mii_bus->parent = &pdev->dev;
1057 switch (pdata->idrev & 0xFFFF0000) {
1062 /* External PHY supported, try to autodetect */
1063 smsc911x_phy_initialise_external(pdata);
1066 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1067 "using internal PHY");
1068 pdata->using_extphy = 0;
1072 if (!pdata->using_extphy) {
1073 /* Mask all PHYs except ID 1 (internal) */
1074 pdata->mii_bus->phy_mask = ~(1 << 1);
1077 if (mdiobus_register(pdata->mii_bus)) {
1078 SMSC_WARN(pdata, probe, "Error registering mii bus");
1079 goto err_out_free_bus_2;
1082 if (smsc911x_mii_probe(dev) < 0) {
1083 SMSC_WARN(pdata, probe, "Error registering mii bus");
1084 goto err_out_unregister_bus_3;
1089 err_out_unregister_bus_3:
1090 mdiobus_unregister(pdata->mii_bus);
1092 mdiobus_free(pdata->mii_bus);
1097 /* Gets the number of tx statuses in the fifo */
1098 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1100 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1101 & TX_FIFO_INF_TSUSED_) >> 16;
1104 /* Reads tx statuses and increments counters where necessary */
1105 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1107 struct smsc911x_data *pdata = netdev_priv(dev);
1108 unsigned int tx_stat;
1110 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1111 if (unlikely(tx_stat & 0x80000000)) {
1112 /* In this driver the packet tag is used as the packet
1113 * length. Since a packet length can never reach the
1114 * size of 0x8000, this bit is reserved. It is worth
1115 * noting that the "reserved bit" in the warning above
1116 * does not reference a hardware defined reserved bit
1117 * but rather a driver defined one.
1119 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1121 if (unlikely(tx_stat & TX_STS_ES_)) {
1122 dev->stats.tx_errors++;
1124 dev->stats.tx_packets++;
1125 dev->stats.tx_bytes += (tx_stat >> 16);
1127 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1128 dev->stats.collisions += 16;
1129 dev->stats.tx_aborted_errors += 1;
1131 dev->stats.collisions +=
1132 ((tx_stat >> 3) & 0xF);
1134 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1135 dev->stats.tx_carrier_errors += 1;
1136 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1137 dev->stats.collisions++;
1138 dev->stats.tx_aborted_errors++;
1144 /* Increments the Rx error counters */
1146 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1150 if (unlikely(rxstat & RX_STS_ES_)) {
1151 dev->stats.rx_errors++;
1152 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1153 dev->stats.rx_crc_errors++;
1157 if (likely(!crc_err)) {
1158 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1159 (rxstat & RX_STS_LENGTH_ERR_)))
1160 dev->stats.rx_length_errors++;
1161 if (rxstat & RX_STS_MCAST_)
1162 dev->stats.multicast++;
1166 /* Quickly dumps bad packets */
1168 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1170 if (likely(pktwords >= 4)) {
1171 unsigned int timeout = 500;
1173 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1176 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1177 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1179 if (unlikely(timeout == 0))
1180 SMSC_WARN(pdata, hw, "Timed out waiting for "
1181 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1185 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1189 /* NAPI poll function */
1190 static int smsc911x_poll(struct napi_struct *napi, int budget)
1192 struct smsc911x_data *pdata =
1193 container_of(napi, struct smsc911x_data, napi);
1194 struct net_device *dev = pdata->dev;
1197 while (npackets < budget) {
1198 unsigned int pktlength;
1199 unsigned int pktwords;
1200 struct sk_buff *skb;
1201 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1205 /* We processed all packets available. Tell NAPI it can
1206 * stop polling then re-enable rx interrupts */
1207 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1208 napi_complete(napi);
1209 temp = smsc911x_reg_read(pdata, INT_EN);
1210 temp |= INT_EN_RSFL_EN_;
1211 smsc911x_reg_write(pdata, INT_EN, temp);
1215 /* Count packet for NAPI scheduling, even if it has an error.
1216 * Error packets still require cycles to discard */
1219 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1220 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1221 smsc911x_rx_counterrors(dev, rxstat);
1223 if (unlikely(rxstat & RX_STS_ES_)) {
1224 SMSC_WARN(pdata, rx_err,
1225 "Discarding packet with error bit set");
1226 /* Packet has an error, discard it and continue with
1228 smsc911x_rx_fastforward(pdata, pktwords);
1229 dev->stats.rx_dropped++;
1233 skb = netdev_alloc_skb(dev, pktwords << 2);
1234 if (unlikely(!skb)) {
1235 SMSC_WARN(pdata, rx_err,
1236 "Unable to allocate skb for rx packet");
1237 /* Drop the packet and stop this polling iteration */
1238 smsc911x_rx_fastforward(pdata, pktwords);
1239 dev->stats.rx_dropped++;
1243 pdata->ops->rx_readfifo(pdata,
1244 (unsigned int *)skb->data, pktwords);
1246 /* Align IP on 16B boundary */
1247 skb_reserve(skb, NET_IP_ALIGN);
1248 skb_put(skb, pktlength - 4);
1249 skb->protocol = eth_type_trans(skb, dev);
1250 skb_checksum_none_assert(skb);
1251 netif_receive_skb(skb);
1253 /* Update counters */
1254 dev->stats.rx_packets++;
1255 dev->stats.rx_bytes += (pktlength - 4);
1258 /* Return total received packets */
1262 /* Returns hash bit number for given MAC address
1264 * 01 00 5E 00 00 01 -> returns bit number 31 */
1265 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1267 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1270 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1272 /* Performs the multicast & mac_cr update. This is called when
1273 * safe on the current hardware, and with the mac_lock held */
1274 unsigned int mac_cr;
1276 SMSC_ASSERT_MAC_LOCK(pdata);
1278 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1279 mac_cr |= pdata->set_bits_mask;
1280 mac_cr &= ~(pdata->clear_bits_mask);
1281 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1282 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1283 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1284 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1285 mac_cr, pdata->hashhi, pdata->hashlo);
1288 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1290 unsigned int mac_cr;
1292 /* This function is only called for older LAN911x devices
1293 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1294 * be modified during Rx - newer devices immediately update the
1297 * This is called from interrupt context */
1299 spin_lock(&pdata->mac_lock);
1301 /* Check Rx has stopped */
1302 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1303 SMSC_WARN(pdata, drv, "Rx not stopped");
1305 /* Perform the update - safe to do now Rx has stopped */
1306 smsc911x_rx_multicast_update(pdata);
1309 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1310 mac_cr |= MAC_CR_RXEN_;
1311 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1313 pdata->multicast_update_pending = 0;
1315 spin_unlock(&pdata->mac_lock);
1318 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1322 if (!pdata->phy_dev)
1325 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1328 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1333 * If energy is detected the PHY is already awake so is not necessary
1334 * to disable the energy detect power-down mode.
1336 if ((rc & MII_LAN83C185_EDPWRDOWN) &&
1337 !(rc & MII_LAN83C185_ENERGYON)) {
1338 /* Disable energy detect mode for this SMSC Transceivers */
1339 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1340 rc & (~MII_LAN83C185_EDPWRDOWN));
1343 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1353 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1357 if (!pdata->phy_dev)
1360 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1363 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1367 /* Only enable if energy detect mode is already disabled */
1368 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1370 /* Enable energy detect mode for this SMSC Transceivers */
1371 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1372 rc | MII_LAN83C185_EDPWRDOWN);
1375 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1384 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1386 unsigned int timeout;
1391 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1392 * are initialized in a Energy Detect Power-Down mode that prevents
1393 * the MAC chip to be software reseted. So we have to wakeup the PHY
1396 if (pdata->generation == 4) {
1397 ret = smsc911x_phy_disable_energy_detect(pdata);
1400 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1405 /* Reset the LAN911x */
1406 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1410 temp = smsc911x_reg_read(pdata, HW_CFG);
1411 } while ((--timeout) && (temp & HW_CFG_SRST_));
1413 if (unlikely(temp & HW_CFG_SRST_)) {
1414 SMSC_WARN(pdata, drv, "Failed to complete reset");
1418 if (pdata->generation == 4) {
1419 ret = smsc911x_phy_enable_energy_detect(pdata);
1422 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1430 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1432 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1434 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1435 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1436 (dev_addr[1] << 8) | dev_addr[0];
1438 SMSC_ASSERT_MAC_LOCK(pdata);
1440 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1441 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1444 static void smsc911x_disable_irq_chip(struct net_device *dev)
1446 struct smsc911x_data *pdata = netdev_priv(dev);
1448 smsc911x_reg_write(pdata, INT_EN, 0);
1449 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1452 static int smsc911x_open(struct net_device *dev)
1454 struct smsc911x_data *pdata = netdev_priv(dev);
1455 unsigned int timeout;
1457 unsigned int intcfg;
1459 /* if the phy is not yet registered, retry later*/
1460 if (!pdata->phy_dev) {
1461 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1465 /* Reset the LAN911x */
1466 if (smsc911x_soft_reset(pdata)) {
1467 SMSC_WARN(pdata, hw, "soft reset failed");
1471 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1472 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1474 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1475 spin_lock_irq(&pdata->mac_lock);
1476 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1477 spin_unlock_irq(&pdata->mac_lock);
1479 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1481 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1486 if (unlikely(timeout == 0))
1487 SMSC_WARN(pdata, ifup,
1488 "Timed out waiting for EEPROM busy bit to clear");
1490 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1492 /* The soft reset above cleared the device's MAC address,
1493 * restore it from local copy (set in probe) */
1494 spin_lock_irq(&pdata->mac_lock);
1495 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1496 spin_unlock_irq(&pdata->mac_lock);
1498 /* Initialise irqs, but leave all sources disabled */
1499 smsc911x_disable_irq_chip(dev);
1501 /* Set interrupt deassertion to 100uS */
1502 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1504 if (pdata->config.irq_polarity) {
1505 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1506 intcfg |= INT_CFG_IRQ_POL_;
1508 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1511 if (pdata->config.irq_type) {
1512 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1513 intcfg |= INT_CFG_IRQ_TYPE_;
1515 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1518 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1520 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1521 pdata->software_irq_signal = 0;
1524 temp = smsc911x_reg_read(pdata, INT_EN);
1525 temp |= INT_EN_SW_INT_EN_;
1526 smsc911x_reg_write(pdata, INT_EN, temp);
1530 if (pdata->software_irq_signal)
1535 if (!pdata->software_irq_signal) {
1536 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1540 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1543 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1544 (unsigned long)pdata->ioaddr, dev->irq);
1546 /* Reset the last known duplex and carrier */
1547 pdata->last_duplex = -1;
1548 pdata->last_carrier = -1;
1550 /* Bring the PHY up */
1551 phy_start(pdata->phy_dev);
1553 temp = smsc911x_reg_read(pdata, HW_CFG);
1554 /* Preserve TX FIFO size and external PHY configuration */
1555 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1557 smsc911x_reg_write(pdata, HW_CFG, temp);
1559 temp = smsc911x_reg_read(pdata, FIFO_INT);
1560 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1561 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1562 smsc911x_reg_write(pdata, FIFO_INT, temp);
1564 /* set RX Data offset to 2 bytes for alignment */
1565 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1567 /* enable NAPI polling before enabling RX interrupts */
1568 napi_enable(&pdata->napi);
1570 temp = smsc911x_reg_read(pdata, INT_EN);
1571 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1572 smsc911x_reg_write(pdata, INT_EN, temp);
1574 spin_lock_irq(&pdata->mac_lock);
1575 temp = smsc911x_mac_read(pdata, MAC_CR);
1576 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1577 smsc911x_mac_write(pdata, MAC_CR, temp);
1578 spin_unlock_irq(&pdata->mac_lock);
1580 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1582 netif_start_queue(dev);
1586 /* Entry point for stopping the interface */
1587 static int smsc911x_stop(struct net_device *dev)
1589 struct smsc911x_data *pdata = netdev_priv(dev);
1592 /* Disable all device interrupts */
1593 temp = smsc911x_reg_read(pdata, INT_CFG);
1594 temp &= ~INT_CFG_IRQ_EN_;
1595 smsc911x_reg_write(pdata, INT_CFG, temp);
1597 /* Stop Tx and Rx polling */
1598 netif_stop_queue(dev);
1599 napi_disable(&pdata->napi);
1601 /* At this point all Rx and Tx activity is stopped */
1602 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1603 smsc911x_tx_update_txcounters(dev);
1605 /* Bring the PHY down */
1607 phy_stop(pdata->phy_dev);
1609 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1613 /* Entry point for transmitting a packet */
1614 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1616 struct smsc911x_data *pdata = netdev_priv(dev);
1617 unsigned int freespace;
1618 unsigned int tx_cmd_a;
1619 unsigned int tx_cmd_b;
1624 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1626 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1627 SMSC_WARN(pdata, tx_err,
1628 "Tx data fifo low, space available: %d", freespace);
1630 /* Word alignment adjustment */
1631 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1632 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1633 tx_cmd_a |= (unsigned int)skb->len;
1635 tx_cmd_b = ((unsigned int)skb->len) << 16;
1636 tx_cmd_b |= (unsigned int)skb->len;
1638 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1639 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1641 bufp = (ulong)skb->data & (~0x3);
1642 wrsz = (u32)skb->len + 3;
1643 wrsz += (u32)((ulong)skb->data & 0x3);
1646 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1647 freespace -= (skb->len + 32);
1648 skb_tx_timestamp(skb);
1651 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1652 smsc911x_tx_update_txcounters(dev);
1654 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1655 netif_stop_queue(dev);
1656 temp = smsc911x_reg_read(pdata, FIFO_INT);
1659 smsc911x_reg_write(pdata, FIFO_INT, temp);
1662 return NETDEV_TX_OK;
1665 /* Entry point for getting status counters */
1666 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1668 struct smsc911x_data *pdata = netdev_priv(dev);
1669 smsc911x_tx_update_txcounters(dev);
1670 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1674 /* Entry point for setting addressing modes */
1675 static void smsc911x_set_multicast_list(struct net_device *dev)
1677 struct smsc911x_data *pdata = netdev_priv(dev);
1678 unsigned long flags;
1680 if (dev->flags & IFF_PROMISC) {
1681 /* Enabling promiscuous mode */
1682 pdata->set_bits_mask = MAC_CR_PRMS_;
1683 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1686 } else if (dev->flags & IFF_ALLMULTI) {
1687 /* Enabling all multicast mode */
1688 pdata->set_bits_mask = MAC_CR_MCPAS_;
1689 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1692 } else if (!netdev_mc_empty(dev)) {
1693 /* Enabling specific multicast addresses */
1694 unsigned int hash_high = 0;
1695 unsigned int hash_low = 0;
1696 struct netdev_hw_addr *ha;
1698 pdata->set_bits_mask = MAC_CR_HPFILT_;
1699 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1701 netdev_for_each_mc_addr(ha, dev) {
1702 unsigned int bitnum = smsc911x_hash(ha->addr);
1703 unsigned int mask = 0x01 << (bitnum & 0x1F);
1711 pdata->hashhi = hash_high;
1712 pdata->hashlo = hash_low;
1714 /* Enabling local MAC address only */
1715 pdata->set_bits_mask = 0;
1716 pdata->clear_bits_mask =
1717 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1722 spin_lock_irqsave(&pdata->mac_lock, flags);
1724 if (pdata->generation <= 1) {
1725 /* Older hardware revision - cannot change these flags while
1727 if (!pdata->multicast_update_pending) {
1729 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1730 pdata->multicast_update_pending = 1;
1732 /* Request the hardware to stop, then perform the
1733 * update when we get an RX_STOP interrupt */
1734 temp = smsc911x_mac_read(pdata, MAC_CR);
1735 temp &= ~(MAC_CR_RXEN_);
1736 smsc911x_mac_write(pdata, MAC_CR, temp);
1738 /* There is another update pending, this should now
1739 * use the newer values */
1742 /* Newer hardware revision - can write immediately */
1743 smsc911x_rx_multicast_update(pdata);
1746 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1749 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1751 struct net_device *dev = dev_id;
1752 struct smsc911x_data *pdata = netdev_priv(dev);
1753 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1754 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1755 int serviced = IRQ_NONE;
1758 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1759 temp = smsc911x_reg_read(pdata, INT_EN);
1760 temp &= (~INT_EN_SW_INT_EN_);
1761 smsc911x_reg_write(pdata, INT_EN, temp);
1762 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1763 pdata->software_irq_signal = 1;
1765 serviced = IRQ_HANDLED;
1768 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1769 /* Called when there is a multicast update scheduled and
1770 * it is now safe to complete the update */
1771 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1772 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1773 if (pdata->multicast_update_pending)
1774 smsc911x_rx_multicast_update_workaround(pdata);
1775 serviced = IRQ_HANDLED;
1778 if (intsts & inten & INT_STS_TDFA_) {
1779 temp = smsc911x_reg_read(pdata, FIFO_INT);
1780 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1781 smsc911x_reg_write(pdata, FIFO_INT, temp);
1782 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1783 netif_wake_queue(dev);
1784 serviced = IRQ_HANDLED;
1787 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1788 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1789 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1790 serviced = IRQ_HANDLED;
1793 if (likely(intsts & inten & INT_STS_RSFL_)) {
1794 if (likely(napi_schedule_prep(&pdata->napi))) {
1795 /* Disable Rx interrupts */
1796 temp = smsc911x_reg_read(pdata, INT_EN);
1797 temp &= (~INT_EN_RSFL_EN_);
1798 smsc911x_reg_write(pdata, INT_EN, temp);
1799 /* Schedule a NAPI poll */
1800 __napi_schedule(&pdata->napi);
1802 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1804 serviced = IRQ_HANDLED;
1810 #ifdef CONFIG_NET_POLL_CONTROLLER
1811 static void smsc911x_poll_controller(struct net_device *dev)
1813 disable_irq(dev->irq);
1814 smsc911x_irqhandler(0, dev);
1815 enable_irq(dev->irq);
1817 #endif /* CONFIG_NET_POLL_CONTROLLER */
1819 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1821 struct smsc911x_data *pdata = netdev_priv(dev);
1822 struct sockaddr *addr = p;
1824 /* On older hardware revisions we cannot change the mac address
1825 * registers while receiving data. Newer devices can safely change
1826 * this at any time. */
1827 if (pdata->generation <= 1 && netif_running(dev))
1830 if (!is_valid_ether_addr(addr->sa_data))
1831 return -EADDRNOTAVAIL;
1833 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1835 spin_lock_irq(&pdata->mac_lock);
1836 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1837 spin_unlock_irq(&pdata->mac_lock);
1839 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1844 /* Standard ioctls for mii-tool */
1845 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1847 struct smsc911x_data *pdata = netdev_priv(dev);
1849 if (!netif_running(dev) || !pdata->phy_dev)
1852 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1856 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1858 struct smsc911x_data *pdata = netdev_priv(dev);
1862 return phy_ethtool_gset(pdata->phy_dev, cmd);
1866 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1868 struct smsc911x_data *pdata = netdev_priv(dev);
1870 return phy_ethtool_sset(pdata->phy_dev, cmd);
1873 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1874 struct ethtool_drvinfo *info)
1876 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1877 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1878 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1879 sizeof(info->bus_info));
1882 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1884 struct smsc911x_data *pdata = netdev_priv(dev);
1886 return phy_start_aneg(pdata->phy_dev);
1889 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1891 struct smsc911x_data *pdata = netdev_priv(dev);
1892 return pdata->msg_enable;
1895 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1897 struct smsc911x_data *pdata = netdev_priv(dev);
1898 pdata->msg_enable = level;
1901 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1903 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1908 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1911 struct smsc911x_data *pdata = netdev_priv(dev);
1912 struct phy_device *phy_dev = pdata->phy_dev;
1913 unsigned long flags;
1918 regs->version = pdata->idrev;
1919 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1920 data[j++] = smsc911x_reg_read(pdata, i);
1922 for (i = MAC_CR; i <= WUCSR; i++) {
1923 spin_lock_irqsave(&pdata->mac_lock, flags);
1924 data[j++] = smsc911x_mac_read(pdata, i);
1925 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1928 for (i = 0; i <= 31; i++)
1929 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1932 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1934 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1935 temp &= ~GPIO_CFG_EEPR_EN_;
1936 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1940 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1945 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1946 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1947 SMSC_WARN(pdata, drv, "Busy at start");
1951 e2cmd = op | E2P_CMD_EPC_BUSY_;
1952 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1956 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1957 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1960 SMSC_TRACE(pdata, drv, "TIMED OUT");
1964 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1965 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1972 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1973 u8 address, u8 *data)
1975 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1978 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1979 ret = smsc911x_eeprom_send_cmd(pdata, op);
1982 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1987 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1988 u8 address, u8 data)
1990 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1994 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1995 ret = smsc911x_eeprom_send_cmd(pdata, op);
1998 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1999 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2001 /* Workaround for hardware read-after-write restriction */
2002 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2004 ret = smsc911x_eeprom_send_cmd(pdata, op);
2010 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2012 return SMSC911X_EEPROM_SIZE;
2015 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2016 struct ethtool_eeprom *eeprom, u8 *data)
2018 struct smsc911x_data *pdata = netdev_priv(dev);
2019 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2023 smsc911x_eeprom_enable_access(pdata);
2025 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2026 for (i = 0; i < len; i++) {
2027 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2034 memcpy(data, &eeprom_data[eeprom->offset], len);
2039 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2040 struct ethtool_eeprom *eeprom, u8 *data)
2043 struct smsc911x_data *pdata = netdev_priv(dev);
2045 smsc911x_eeprom_enable_access(pdata);
2046 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2047 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2048 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2050 /* Single byte write, according to man page */
2056 static const struct ethtool_ops smsc911x_ethtool_ops = {
2057 .get_settings = smsc911x_ethtool_getsettings,
2058 .set_settings = smsc911x_ethtool_setsettings,
2059 .get_link = ethtool_op_get_link,
2060 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2061 .nway_reset = smsc911x_ethtool_nwayreset,
2062 .get_msglevel = smsc911x_ethtool_getmsglevel,
2063 .set_msglevel = smsc911x_ethtool_setmsglevel,
2064 .get_regs_len = smsc911x_ethtool_getregslen,
2065 .get_regs = smsc911x_ethtool_getregs,
2066 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2067 .get_eeprom = smsc911x_ethtool_get_eeprom,
2068 .set_eeprom = smsc911x_ethtool_set_eeprom,
2069 .get_ts_info = ethtool_op_get_ts_info,
2072 static const struct net_device_ops smsc911x_netdev_ops = {
2073 .ndo_open = smsc911x_open,
2074 .ndo_stop = smsc911x_stop,
2075 .ndo_start_xmit = smsc911x_hard_start_xmit,
2076 .ndo_get_stats = smsc911x_get_stats,
2077 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2078 .ndo_do_ioctl = smsc911x_do_ioctl,
2079 .ndo_change_mtu = eth_change_mtu,
2080 .ndo_validate_addr = eth_validate_addr,
2081 .ndo_set_mac_address = smsc911x_set_mac_address,
2082 #ifdef CONFIG_NET_POLL_CONTROLLER
2083 .ndo_poll_controller = smsc911x_poll_controller,
2087 /* copies the current mac address from hardware to dev->dev_addr */
2088 static void smsc911x_read_mac_address(struct net_device *dev)
2090 struct smsc911x_data *pdata = netdev_priv(dev);
2091 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2092 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2094 dev->dev_addr[0] = (u8)(mac_low32);
2095 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2096 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2097 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2098 dev->dev_addr[4] = (u8)(mac_high16);
2099 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2102 /* Initializing private device structures, only called from probe */
2103 static int smsc911x_init(struct net_device *dev)
2105 struct smsc911x_data *pdata = netdev_priv(dev);
2106 unsigned int byte_test, mask;
2107 unsigned int to = 100;
2109 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2110 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2111 (unsigned long)pdata->ioaddr);
2112 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2113 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2115 spin_lock_init(&pdata->dev_lock);
2116 spin_lock_init(&pdata->mac_lock);
2118 if (pdata->ioaddr == 0) {
2119 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2124 * poll the READY bit in PMT_CTRL. Any other access to the device is
2125 * forbidden while this bit isn't set. Try for 100ms
2127 * Note that this test is done before the WORD_SWAP register is
2128 * programmed. So in some configurations the READY bit is at 16 before
2129 * WORD_SWAP is written to. This issue is worked around by waiting
2130 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2132 * SMSC has confirmed that checking bit 16 (marked as reserved in
2133 * the datasheet) is fine since these bits "will either never be set
2134 * or can only go high after READY does (so also indicate the device
2138 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2139 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2143 pr_err("Device not READY in 100ms aborting\n");
2147 /* Check byte ordering */
2148 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2149 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2150 if (byte_test == 0x43218765) {
2151 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2152 "applying WORD_SWAP");
2153 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2155 /* 1 dummy read of BYTE_TEST is needed after a write to
2156 * WORD_SWAP before its contents are valid */
2157 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2159 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2162 if (byte_test != 0x87654321) {
2163 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2164 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2165 SMSC_WARN(pdata, probe,
2166 "top 16 bits equal to bottom 16 bits");
2167 SMSC_TRACE(pdata, probe,
2168 "This may mean the chip is set "
2169 "for 32 bit while the bus is reading 16 bit");
2174 /* Default generation to zero (all workarounds apply) */
2175 pdata->generation = 0;
2177 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2178 switch (pdata->idrev & 0xFFFF0000) {
2184 /* LAN911[5678] family */
2185 pdata->generation = pdata->idrev & 0x0000FFFF;
2192 /* LAN921[5678] family */
2193 pdata->generation = 3;
2200 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2201 pdata->generation = 4;
2205 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2210 SMSC_TRACE(pdata, probe,
2211 "LAN911x identified, idrev: 0x%08X, generation: %d",
2212 pdata->idrev, pdata->generation);
2214 if (pdata->generation == 0)
2215 SMSC_WARN(pdata, probe,
2216 "This driver is not intended for this chip revision");
2218 /* workaround for platforms without an eeprom, where the mac address
2219 * is stored elsewhere and set by the bootloader. This saves the
2220 * mac address before resetting the device */
2221 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2222 spin_lock_irq(&pdata->mac_lock);
2223 smsc911x_read_mac_address(dev);
2224 spin_unlock_irq(&pdata->mac_lock);
2227 /* Reset the LAN911x */
2228 if (smsc911x_soft_reset(pdata))
2232 dev->flags |= IFF_MULTICAST;
2233 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2234 dev->netdev_ops = &smsc911x_netdev_ops;
2235 dev->ethtool_ops = &smsc911x_ethtool_ops;
2240 static int smsc911x_drv_remove(struct platform_device *pdev)
2242 struct net_device *dev;
2243 struct smsc911x_data *pdata;
2244 struct resource *res;
2246 dev = platform_get_drvdata(pdev);
2248 pdata = netdev_priv(dev);
2250 BUG_ON(!pdata->ioaddr);
2251 BUG_ON(!pdata->phy_dev);
2253 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2255 phy_disconnect(pdata->phy_dev);
2256 pdata->phy_dev = NULL;
2257 mdiobus_unregister(pdata->mii_bus);
2258 mdiobus_free(pdata->mii_bus);
2260 platform_set_drvdata(pdev, NULL);
2261 unregister_netdev(dev);
2262 free_irq(dev->irq, dev);
2263 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2266 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2268 release_mem_region(res->start, resource_size(res));
2270 iounmap(pdata->ioaddr);
2272 (void)smsc911x_disable_resources(pdev);
2273 smsc911x_free_resources(pdev);
2280 /* standard register acces */
2281 static const struct smsc911x_ops standard_smsc911x_ops = {
2282 .reg_read = __smsc911x_reg_read,
2283 .reg_write = __smsc911x_reg_write,
2284 .rx_readfifo = smsc911x_rx_readfifo,
2285 .tx_writefifo = smsc911x_tx_writefifo,
2288 /* shifted register access */
2289 static const struct smsc911x_ops shifted_smsc911x_ops = {
2290 .reg_read = __smsc911x_reg_read_shift,
2291 .reg_write = __smsc911x_reg_write_shift,
2292 .rx_readfifo = smsc911x_rx_readfifo_shift,
2293 .tx_writefifo = smsc911x_tx_writefifo_shift,
2297 static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config,
2298 struct device_node *np)
2306 config->phy_interface = of_get_phy_mode(np);
2308 mac = of_get_mac_address(np);
2310 memcpy(config->mac, mac, ETH_ALEN);
2312 of_property_read_u32(np, "reg-shift", &config->shift);
2314 of_property_read_u32(np, "reg-io-width", &width);
2316 config->flags |= SMSC911X_USE_32BIT;
2318 config->flags |= SMSC911X_USE_16BIT;
2320 if (of_get_property(np, "smsc,irq-active-high", NULL))
2321 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2323 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2324 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2326 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2327 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2329 if (of_get_property(np, "smsc,force-external-phy", NULL))
2330 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2332 if (of_get_property(np, "smsc,save-mac-address", NULL))
2333 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2338 static inline int smsc911x_probe_config_dt(
2339 struct smsc911x_platform_config *config,
2340 struct device_node *np)
2344 #endif /* CONFIG_OF */
2346 static int smsc911x_drv_probe(struct platform_device *pdev)
2348 struct device_node *np = pdev->dev.of_node;
2349 struct net_device *dev;
2350 struct smsc911x_data *pdata;
2351 struct smsc911x_platform_config *config = pdev->dev.platform_data;
2352 struct resource *res, *irq_res;
2353 unsigned int intcfg = 0;
2354 int res_size, irq_flags;
2357 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2359 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2362 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2364 pr_warn("Could not allocate resource\n");
2368 res_size = resource_size(res);
2370 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2372 pr_warn("Could not allocate irq resource\n");
2377 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2382 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2385 goto out_release_io_1;
2388 SET_NETDEV_DEV(dev, &pdev->dev);
2390 pdata = netdev_priv(dev);
2391 dev->irq = irq_res->start;
2392 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2393 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2396 pdata->msg_enable = ((1 << debug) - 1);
2398 platform_set_drvdata(pdev, dev);
2400 retval = smsc911x_request_resources(pdev);
2402 goto out_request_resources_fail;
2404 retval = smsc911x_enable_resources(pdev);
2406 goto out_enable_resources_fail;
2408 if (pdata->ioaddr == NULL) {
2409 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2411 goto out_disable_resources;
2414 retval = smsc911x_probe_config_dt(&pdata->config, np);
2415 if (retval && config) {
2416 /* copy config parameters across to pdata */
2417 memcpy(&pdata->config, config, sizeof(pdata->config));
2422 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2423 goto out_disable_resources;
2426 /* assume standard, non-shifted, access to HW registers */
2427 pdata->ops = &standard_smsc911x_ops;
2428 /* apply the right access if shifting is needed */
2429 if (pdata->config.shift)
2430 pdata->ops = &shifted_smsc911x_ops;
2432 retval = smsc911x_init(dev);
2434 goto out_disable_resources;
2436 /* configure irq polarity and type before connecting isr */
2437 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2438 intcfg |= INT_CFG_IRQ_POL_;
2440 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2441 intcfg |= INT_CFG_IRQ_TYPE_;
2443 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2445 /* Ensure interrupts are globally disabled before connecting ISR */
2446 smsc911x_disable_irq_chip(dev);
2448 retval = request_irq(dev->irq, smsc911x_irqhandler,
2449 irq_flags | IRQF_SHARED, dev->name, dev);
2451 SMSC_WARN(pdata, probe,
2452 "Unable to claim requested irq: %d", dev->irq);
2453 goto out_disable_resources;
2456 retval = register_netdev(dev);
2458 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2461 SMSC_TRACE(pdata, probe,
2462 "Network interface: \"%s\"", dev->name);
2465 retval = smsc911x_mii_init(pdev, dev);
2467 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2468 goto out_unregister_netdev_5;
2471 spin_lock_irq(&pdata->mac_lock);
2473 /* Check if mac address has been specified when bringing interface up */
2474 if (is_valid_ether_addr(dev->dev_addr)) {
2475 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2476 SMSC_TRACE(pdata, probe,
2477 "MAC Address is specified by configuration");
2478 } else if (is_valid_ether_addr(pdata->config.mac)) {
2479 memcpy(dev->dev_addr, pdata->config.mac, 6);
2480 SMSC_TRACE(pdata, probe,
2481 "MAC Address specified by platform data");
2483 /* Try reading mac address from device. if EEPROM is present
2484 * it will already have been set */
2487 if (is_valid_ether_addr(dev->dev_addr)) {
2488 /* eeprom values are valid so use them */
2489 SMSC_TRACE(pdata, probe,
2490 "Mac Address is read from LAN911x EEPROM");
2492 /* eeprom values are invalid, generate random MAC */
2493 eth_hw_addr_random(dev);
2494 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2495 SMSC_TRACE(pdata, probe,
2496 "MAC Address is set to eth_random_addr");
2500 spin_unlock_irq(&pdata->mac_lock);
2502 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2506 out_unregister_netdev_5:
2507 unregister_netdev(dev);
2509 free_irq(dev->irq, dev);
2510 out_disable_resources:
2511 (void)smsc911x_disable_resources(pdev);
2512 out_enable_resources_fail:
2513 smsc911x_free_resources(pdev);
2514 out_request_resources_fail:
2515 platform_set_drvdata(pdev, NULL);
2516 iounmap(pdata->ioaddr);
2519 release_mem_region(res->start, resource_size(res));
2525 /* This implementation assumes the devices remains powered on its VDDVARIO
2526 * pins during suspend. */
2528 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2530 static int smsc911x_suspend(struct device *dev)
2532 struct net_device *ndev = dev_get_drvdata(dev);
2533 struct smsc911x_data *pdata = netdev_priv(ndev);
2535 /* enable wake on LAN, energy detection and the external PME
2537 smsc911x_reg_write(pdata, PMT_CTRL,
2538 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2539 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2544 static int smsc911x_resume(struct device *dev)
2546 struct net_device *ndev = dev_get_drvdata(dev);
2547 struct smsc911x_data *pdata = netdev_priv(ndev);
2548 unsigned int to = 100;
2550 /* Note 3.11 from the datasheet:
2551 * "When the LAN9220 is in a power saving state, a write of any
2552 * data to the BYTE_TEST register will wake-up the device."
2554 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2556 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2557 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2559 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2562 return (to == 0) ? -EIO : 0;
2565 static const struct dev_pm_ops smsc911x_pm_ops = {
2566 .suspend = smsc911x_suspend,
2567 .resume = smsc911x_resume,
2570 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2573 #define SMSC911X_PM_OPS NULL
2577 static const struct of_device_id smsc911x_dt_ids[] = {
2578 { .compatible = "smsc,lan9115", },
2581 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2584 static struct platform_driver smsc911x_driver = {
2585 .probe = smsc911x_drv_probe,
2586 .remove = smsc911x_drv_remove,
2588 .name = SMSC_CHIPNAME,
2589 .owner = THIS_MODULE,
2590 .pm = SMSC911X_PM_OPS,
2591 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2595 /* Entry point for loading the module */
2596 static int __init smsc911x_init_module(void)
2599 return platform_driver_register(&smsc911x_driver);
2602 /* entry point for unloading the module */
2603 static void __exit smsc911x_cleanup_module(void)
2605 platform_driver_unregister(&smsc911x_driver);
2608 module_init(smsc911x_init_module);
2609 module_exit(smsc911x_cleanup_module);