1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
6 * Copyright (C) 1996 by Erik Stahlman
7 * Copyright (C) 2001 Standard Microsystems Corporation
8 * Developed by Simple Network Magic Corporation
9 * Copyright (C) 2003 Monta Vista Software, Inc.
10 * Unified SMC91x driver by Nicolas Pitre
13 * io = for the base address
15 * nowait = 0 for normal wait states, 1 eliminates additional wait states
18 * Erik Stahlman <erik@vt.edu>
20 * hardware multicast code:
21 * Peter Cammaert <pc@denkart.be>
24 * Daris A Nevil <dnevil@snmc.com>
25 * Nicolas Pitre <nico@fluxnic.net>
26 * Russell King <rmk@arm.linux.org.uk>
29 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
30 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
31 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
32 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
33 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
34 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
35 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
36 * more bus abstraction, big cleanup, etc.
37 * 29/09/03 Russell King - add driver model support
39 * - convert to use generic MII interface
40 * - add link up/down notification
41 * - don't try to handle full negotiation in
43 * - clean up (and fix stack overrun) in PHY
44 * MII read/write functions
45 * 22/09/04 Nicolas Pitre big update (see commit log for details)
47 static const char version[] =
48 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>";
56 #include <linux/module.h>
57 #include <linux/kernel.h>
58 #include <linux/sched.h>
59 #include <linux/delay.h>
60 #include <linux/interrupt.h>
61 #include <linux/irq.h>
62 #include <linux/errno.h>
63 #include <linux/ioport.h>
64 #include <linux/crc32.h>
65 #include <linux/platform_device.h>
66 #include <linux/spinlock.h>
67 #include <linux/ethtool.h>
68 #include <linux/mii.h>
69 #include <linux/workqueue.h>
71 #include <linux/of_device.h>
72 #include <linux/of_gpio.h>
74 #include <linux/netdevice.h>
75 #include <linux/etherdevice.h>
76 #include <linux/skbuff.h>
82 #if defined(CONFIG_ASSABET_NEPONSET)
83 #include <mach/assabet.h>
84 #include <mach/neponset.h>
90 static int nowait = SMC_NOWAIT;
91 module_param(nowait, int, 0400);
92 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
95 * Transmit timeout, default 5 seconds.
97 static int watchdog = 1000;
98 module_param(watchdog, int, 0400);
99 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
101 MODULE_LICENSE("GPL");
102 MODULE_ALIAS("platform:smc91x");
105 * The internal workings of the driver. If you are changing anything
106 * here with the SMC stuff, you should have the datasheet and know
107 * what you are doing.
109 #define CARDNAME "smc91x"
112 * Use power-down feature of the chip
117 * Wait time for memory to be free. This probably shouldn't be
118 * tuned that much, as waiting for this means nothing else happens
121 #define MEMORY_WAIT_TIME 16
124 * The maximum number of processing loops allowed for each call to the
127 #define MAX_IRQ_LOOPS 8
130 * This selects whether TX packets are sent one by one to the SMC91x internal
131 * memory and throttled until transmission completes. This may prevent
132 * RX overruns a litle by keeping much of the memory free for RX packets
133 * but to the expense of reduced TX throughput and increased IRQ overhead.
134 * Note this is not a cure for a too slow data bus or too high IRQ latency.
136 #define THROTTLE_TX_PKTS 0
139 * The MII clock high/low times. 2x this number gives the MII clock period
140 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
144 #define DBG(n, dev, fmt, ...) \
146 if (SMC_DEBUG >= (n)) \
147 netdev_dbg(dev, fmt, ##__VA_ARGS__); \
150 #define PRINTK(dev, fmt, ...) \
153 netdev_info(dev, fmt, ##__VA_ARGS__); \
155 netdev_dbg(dev, fmt, ##__VA_ARGS__); \
159 static void PRINT_PKT(u_char *buf, int length)
166 remainder = length % 16;
168 for (i = 0; i < lines ; i ++) {
171 for (cur = 0; cur < 8; cur++) {
175 pr_cont("%02x%02x ", a, b);
180 for (i = 0; i < remainder/2 ; i++) {
184 pr_cont("%02x%02x ", a, b);
189 static inline void PRINT_PKT(u_char *buf, int length) { }
193 /* this enables an interrupt in the interrupt mask register */
194 #define SMC_ENABLE_INT(lp, x) do { \
195 unsigned char mask; \
196 unsigned long smc_enable_flags; \
197 spin_lock_irqsave(&lp->lock, smc_enable_flags); \
198 mask = SMC_GET_INT_MASK(lp); \
200 SMC_SET_INT_MASK(lp, mask); \
201 spin_unlock_irqrestore(&lp->lock, smc_enable_flags); \
204 /* this disables an interrupt from the interrupt mask register */
205 #define SMC_DISABLE_INT(lp, x) do { \
206 unsigned char mask; \
207 unsigned long smc_disable_flags; \
208 spin_lock_irqsave(&lp->lock, smc_disable_flags); \
209 mask = SMC_GET_INT_MASK(lp); \
211 SMC_SET_INT_MASK(lp, mask); \
212 spin_unlock_irqrestore(&lp->lock, smc_disable_flags); \
216 * Wait while MMU is busy. This is usually in the order of a few nanosecs
217 * if at all, but let's avoid deadlocking the system if the hardware
218 * decides to go south.
220 #define SMC_WAIT_MMU_BUSY(lp) do { \
221 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
222 unsigned long timeout = jiffies + 2; \
223 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
224 if (time_after(jiffies, timeout)) { \
225 netdev_dbg(dev, "timeout %s line %d\n", \
226 __FILE__, __LINE__); \
236 * this does a soft reset on the device
238 static void smc_reset(struct net_device *dev)
240 struct smc_local *lp = netdev_priv(dev);
241 void __iomem *ioaddr = lp->base;
242 unsigned int ctl, cfg;
243 struct sk_buff *pending_skb;
245 DBG(2, dev, "%s\n", __func__);
247 /* Disable all interrupts, block TX tasklet */
248 spin_lock_irq(&lp->lock);
249 SMC_SELECT_BANK(lp, 2);
250 SMC_SET_INT_MASK(lp, 0);
251 pending_skb = lp->pending_tx_skb;
252 lp->pending_tx_skb = NULL;
253 spin_unlock_irq(&lp->lock);
255 /* free any pending tx skb */
257 dev_kfree_skb(pending_skb);
258 dev->stats.tx_errors++;
259 dev->stats.tx_aborted_errors++;
263 * This resets the registers mostly to defaults, but doesn't
264 * affect EEPROM. That seems unnecessary
266 SMC_SELECT_BANK(lp, 0);
267 SMC_SET_RCR(lp, RCR_SOFTRST);
270 * Setup the Configuration Register
271 * This is necessary because the CONFIG_REG is not affected
274 SMC_SELECT_BANK(lp, 1);
276 cfg = CONFIG_DEFAULT;
279 * Setup for fast accesses if requested. If the card/system
280 * can't handle it then there will be no recovery except for
281 * a hard reset or power cycle
283 if (lp->cfg.flags & SMC91X_NOWAIT)
284 cfg |= CONFIG_NO_WAIT;
287 * Release from possible power-down state
288 * Configuration register is not affected by Soft Reset
290 cfg |= CONFIG_EPH_POWER_EN;
292 SMC_SET_CONFIG(lp, cfg);
294 /* this should pause enough for the chip to be happy */
296 * elaborate? What does the chip _need_? --jgarzik
298 * This seems to be undocumented, but something the original
299 * driver(s) have always done. Suspect undocumented timing
300 * info/determined empirically. --rmk
304 /* Disable transmit and receive functionality */
305 SMC_SELECT_BANK(lp, 0);
306 SMC_SET_RCR(lp, RCR_CLEAR);
307 SMC_SET_TCR(lp, TCR_CLEAR);
309 SMC_SELECT_BANK(lp, 1);
310 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
313 * Set the control register to automatically release successfully
314 * transmitted packets, to make the best use out of our limited
317 if(!THROTTLE_TX_PKTS)
318 ctl |= CTL_AUTO_RELEASE;
320 ctl &= ~CTL_AUTO_RELEASE;
321 SMC_SET_CTL(lp, ctl);
324 SMC_SELECT_BANK(lp, 2);
325 SMC_SET_MMU_CMD(lp, MC_RESET);
326 SMC_WAIT_MMU_BUSY(lp);
330 * Enable Interrupts, Receive, and Transmit
332 static void smc_enable(struct net_device *dev)
334 struct smc_local *lp = netdev_priv(dev);
335 void __iomem *ioaddr = lp->base;
338 DBG(2, dev, "%s\n", __func__);
340 /* see the header file for options in TCR/RCR DEFAULT */
341 SMC_SELECT_BANK(lp, 0);
342 SMC_SET_TCR(lp, lp->tcr_cur_mode);
343 SMC_SET_RCR(lp, lp->rcr_cur_mode);
345 SMC_SELECT_BANK(lp, 1);
346 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
348 /* now, enable interrupts */
349 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
350 if (lp->version >= (CHIP_91100 << 4))
352 SMC_SELECT_BANK(lp, 2);
353 SMC_SET_INT_MASK(lp, mask);
356 * From this point the register bank must _NOT_ be switched away
357 * to something else than bank 2 without proper locking against
358 * races with any tasklet or interrupt handlers until smc_shutdown()
359 * or smc_reset() is called.
364 * this puts the device in an inactive state
366 static void smc_shutdown(struct net_device *dev)
368 struct smc_local *lp = netdev_priv(dev);
369 void __iomem *ioaddr = lp->base;
370 struct sk_buff *pending_skb;
372 DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
374 /* no more interrupts for me */
375 spin_lock_irq(&lp->lock);
376 SMC_SELECT_BANK(lp, 2);
377 SMC_SET_INT_MASK(lp, 0);
378 pending_skb = lp->pending_tx_skb;
379 lp->pending_tx_skb = NULL;
380 spin_unlock_irq(&lp->lock);
382 dev_kfree_skb(pending_skb);
384 /* and tell the card to stay away from that nasty outside world */
385 SMC_SELECT_BANK(lp, 0);
386 SMC_SET_RCR(lp, RCR_CLEAR);
387 SMC_SET_TCR(lp, TCR_CLEAR);
390 /* finally, shut the chip down */
391 SMC_SELECT_BANK(lp, 1);
392 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
397 * This is the procedure to handle the receipt of a packet.
399 static inline void smc_rcv(struct net_device *dev)
401 struct smc_local *lp = netdev_priv(dev);
402 void __iomem *ioaddr = lp->base;
403 unsigned int packet_number, status, packet_len;
405 DBG(3, dev, "%s\n", __func__);
407 packet_number = SMC_GET_RXFIFO(lp);
408 if (unlikely(packet_number & RXFIFO_REMPTY)) {
409 PRINTK(dev, "smc_rcv with nothing on FIFO.\n");
413 /* read from start of packet */
414 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
416 /* First two words are status and packet length */
417 SMC_GET_PKT_HDR(lp, status, packet_len);
418 packet_len &= 0x07ff; /* mask off top bits */
419 DBG(2, dev, "RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
420 packet_number, status, packet_len, packet_len);
423 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
424 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
425 /* accept VLAN packets */
426 status &= ~RS_TOOLONG;
429 if (packet_len < 6) {
430 /* bloody hardware */
431 netdev_err(dev, "fubar (rxlen %u status %x\n",
433 status |= RS_TOOSHORT;
435 SMC_WAIT_MMU_BUSY(lp);
436 SMC_SET_MMU_CMD(lp, MC_RELEASE);
437 dev->stats.rx_errors++;
438 if (status & RS_ALGNERR)
439 dev->stats.rx_frame_errors++;
440 if (status & (RS_TOOSHORT | RS_TOOLONG))
441 dev->stats.rx_length_errors++;
442 if (status & RS_BADCRC)
443 dev->stats.rx_crc_errors++;
447 unsigned int data_len;
449 /* set multicast stats */
450 if (status & RS_MULTICAST)
451 dev->stats.multicast++;
454 * Actual payload is packet_len - 6 (or 5 if odd byte).
455 * We want skb_reserve(2) and the final ctrl word
456 * (2 bytes, possibly containing the payload odd byte).
457 * Furthermore, we add 2 bytes to allow rounding up to
458 * multiple of 4 bytes on 32 bit buses.
459 * Hence packet_len - 6 + 2 + 2 + 2.
461 skb = netdev_alloc_skb(dev, packet_len);
462 if (unlikely(skb == NULL)) {
463 SMC_WAIT_MMU_BUSY(lp);
464 SMC_SET_MMU_CMD(lp, MC_RELEASE);
465 dev->stats.rx_dropped++;
469 /* Align IP header to 32 bits */
472 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
473 if (lp->version == 0x90)
474 status |= RS_ODDFRAME;
477 * If odd length: packet_len - 5,
478 * otherwise packet_len - 6.
479 * With the trailing ctrl byte it's packet_len - 4.
481 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
482 data = skb_put(skb, data_len);
483 SMC_PULL_DATA(lp, data, packet_len - 4);
485 SMC_WAIT_MMU_BUSY(lp);
486 SMC_SET_MMU_CMD(lp, MC_RELEASE);
488 PRINT_PKT(data, packet_len - 4);
490 skb->protocol = eth_type_trans(skb, dev);
492 dev->stats.rx_packets++;
493 dev->stats.rx_bytes += data_len;
499 * On SMP we have the following problem:
501 * A = smc_hardware_send_pkt()
502 * B = smc_hard_start_xmit()
503 * C = smc_interrupt()
505 * A and B can never be executed simultaneously. However, at least on UP,
506 * it is possible (and even desirable) for C to interrupt execution of
507 * A or B in order to have better RX reliability and avoid overruns.
508 * C, just like A and B, must have exclusive access to the chip and
509 * each of them must lock against any other concurrent access.
510 * Unfortunately this is not possible to have C suspend execution of A or
511 * B taking place on another CPU. On UP this is no an issue since A and B
512 * are run from softirq context and C from hard IRQ context, and there is
513 * no other CPU where concurrent access can happen.
514 * If ever there is a way to force at least B and C to always be executed
515 * on the same CPU then we could use read/write locks to protect against
516 * any other concurrent access and C would always interrupt B. But life
517 * isn't that easy in a SMP world...
519 #define smc_special_trylock(lock, flags) \
522 local_irq_save(flags); \
523 __ret = spin_trylock(lock); \
525 local_irq_restore(flags); \
528 #define smc_special_lock(lock, flags) spin_lock_irqsave(lock, flags)
529 #define smc_special_unlock(lock, flags) spin_unlock_irqrestore(lock, flags)
531 #define smc_special_trylock(lock, flags) ((void)flags, true)
532 #define smc_special_lock(lock, flags) do { flags = 0; } while (0)
533 #define smc_special_unlock(lock, flags) do { flags = 0; } while (0)
537 * This is called to actually send a packet to the chip.
539 static void smc_hardware_send_pkt(unsigned long data)
541 struct net_device *dev = (struct net_device *)data;
542 struct smc_local *lp = netdev_priv(dev);
543 void __iomem *ioaddr = lp->base;
545 unsigned int packet_no, len;
549 DBG(3, dev, "%s\n", __func__);
551 if (!smc_special_trylock(&lp->lock, flags)) {
552 netif_stop_queue(dev);
553 tasklet_schedule(&lp->tx_task);
557 skb = lp->pending_tx_skb;
558 if (unlikely(!skb)) {
559 smc_special_unlock(&lp->lock, flags);
562 lp->pending_tx_skb = NULL;
564 packet_no = SMC_GET_AR(lp);
565 if (unlikely(packet_no & AR_FAILED)) {
566 netdev_err(dev, "Memory allocation failed.\n");
567 dev->stats.tx_errors++;
568 dev->stats.tx_fifo_errors++;
569 smc_special_unlock(&lp->lock, flags);
573 /* point to the beginning of the packet */
574 SMC_SET_PN(lp, packet_no);
575 SMC_SET_PTR(lp, PTR_AUTOINC);
579 DBG(2, dev, "TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
580 packet_no, len, len, buf);
584 * Send the packet length (+6 for status words, length, and ctl.
585 * The card will pad to 64 bytes with zeroes if packet is too small.
587 SMC_PUT_PKT_HDR(lp, 0, len + 6);
589 /* send the actual data */
590 SMC_PUSH_DATA(lp, buf, len & ~1);
592 /* Send final ctl word with the last byte if there is one */
593 SMC_outw(lp, ((len & 1) ? (0x2000 | buf[len - 1]) : 0), ioaddr,
597 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
598 * have the effect of having at most one packet queued for TX
599 * in the chip's memory at all time.
601 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
602 * when memory allocation (MC_ALLOC) does not succeed right away.
604 if (THROTTLE_TX_PKTS)
605 netif_stop_queue(dev);
607 /* queue the packet for TX */
608 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
609 smc_special_unlock(&lp->lock, flags);
611 netif_trans_update(dev);
612 dev->stats.tx_packets++;
613 dev->stats.tx_bytes += len;
615 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
617 done: if (!THROTTLE_TX_PKTS)
618 netif_wake_queue(dev);
620 dev_consume_skb_any(skb);
624 * Since I am not sure if I will have enough room in the chip's ram
625 * to store the packet, I call this routine which either sends it
626 * now, or set the card to generates an interrupt when ready
630 smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
632 struct smc_local *lp = netdev_priv(dev);
633 void __iomem *ioaddr = lp->base;
634 unsigned int numPages, poll_count, status;
637 DBG(3, dev, "%s\n", __func__);
639 BUG_ON(lp->pending_tx_skb != NULL);
642 * The MMU wants the number of pages to be the number of 256 bytes
643 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
645 * The 91C111 ignores the size bits, but earlier models don't.
647 * Pkt size for allocating is data length +6 (for additional status
648 * words, length and ctl)
650 * If odd size then last byte is included in ctl word.
652 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
653 if (unlikely(numPages > 7)) {
654 netdev_warn(dev, "Far too big packet error.\n");
655 dev->stats.tx_errors++;
656 dev->stats.tx_dropped++;
657 dev_kfree_skb_any(skb);
661 smc_special_lock(&lp->lock, flags);
663 /* now, try to allocate the memory */
664 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
667 * Poll the chip for a short amount of time in case the
668 * allocation succeeds quickly.
670 poll_count = MEMORY_WAIT_TIME;
672 status = SMC_GET_INT(lp);
673 if (status & IM_ALLOC_INT) {
674 SMC_ACK_INT(lp, IM_ALLOC_INT);
677 } while (--poll_count);
679 smc_special_unlock(&lp->lock, flags);
681 lp->pending_tx_skb = skb;
683 /* oh well, wait until the chip finds memory later */
684 netif_stop_queue(dev);
685 DBG(2, dev, "TX memory allocation deferred.\n");
686 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
689 * Allocation succeeded: push packet to the chip's own memory
692 smc_hardware_send_pkt((unsigned long)dev);
699 * This handles a TX interrupt, which is only called when:
700 * - a TX error occurred, or
701 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
703 static void smc_tx(struct net_device *dev)
705 struct smc_local *lp = netdev_priv(dev);
706 void __iomem *ioaddr = lp->base;
707 unsigned int saved_packet, packet_no, tx_status, pkt_len;
709 DBG(3, dev, "%s\n", __func__);
711 /* If the TX FIFO is empty then nothing to do */
712 packet_no = SMC_GET_TXFIFO(lp);
713 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
714 PRINTK(dev, "smc_tx with nothing on FIFO.\n");
718 /* select packet to read from */
719 saved_packet = SMC_GET_PN(lp);
720 SMC_SET_PN(lp, packet_no);
722 /* read the first word (status word) from this packet */
723 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
724 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
725 DBG(2, dev, "TX STATUS 0x%04x PNR 0x%02x\n",
726 tx_status, packet_no);
728 if (!(tx_status & ES_TX_SUC))
729 dev->stats.tx_errors++;
731 if (tx_status & ES_LOSTCARR)
732 dev->stats.tx_carrier_errors++;
734 if (tx_status & (ES_LATCOL | ES_16COL)) {
735 PRINTK(dev, "%s occurred on last xmit\n",
736 (tx_status & ES_LATCOL) ?
737 "late collision" : "too many collisions");
738 dev->stats.tx_window_errors++;
739 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
740 netdev_info(dev, "unexpectedly large number of bad collisions. Please check duplex setting.\n");
744 /* kill the packet */
745 SMC_WAIT_MMU_BUSY(lp);
746 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
748 /* Don't restore Packet Number Reg until busy bit is cleared */
749 SMC_WAIT_MMU_BUSY(lp);
750 SMC_SET_PN(lp, saved_packet);
752 /* re-enable transmit */
753 SMC_SELECT_BANK(lp, 0);
754 SMC_SET_TCR(lp, lp->tcr_cur_mode);
755 SMC_SELECT_BANK(lp, 2);
759 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
761 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
763 struct smc_local *lp = netdev_priv(dev);
764 void __iomem *ioaddr = lp->base;
765 unsigned int mii_reg, mask;
767 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
770 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
776 SMC_SET_MII(lp, mii_reg);
778 SMC_SET_MII(lp, mii_reg | MII_MCLK);
783 static unsigned int smc_mii_in(struct net_device *dev, int bits)
785 struct smc_local *lp = netdev_priv(dev);
786 void __iomem *ioaddr = lp->base;
787 unsigned int mii_reg, mask, val;
789 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
790 SMC_SET_MII(lp, mii_reg);
792 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
793 if (SMC_GET_MII(lp) & MII_MDI)
796 SMC_SET_MII(lp, mii_reg);
798 SMC_SET_MII(lp, mii_reg | MII_MCLK);
806 * Reads a register from the MII Management serial interface
808 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
810 struct smc_local *lp = netdev_priv(dev);
811 void __iomem *ioaddr = lp->base;
812 unsigned int phydata;
814 SMC_SELECT_BANK(lp, 3);
817 smc_mii_out(dev, 0xffffffff, 32);
819 /* Start code (01) + read (10) + phyaddr + phyreg */
820 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
822 /* Turnaround (2bits) + phydata */
823 phydata = smc_mii_in(dev, 18);
825 /* Return to idle state */
826 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
828 DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
829 __func__, phyaddr, phyreg, phydata);
831 SMC_SELECT_BANK(lp, 2);
836 * Writes a register to the MII Management serial interface
838 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
841 struct smc_local *lp = netdev_priv(dev);
842 void __iomem *ioaddr = lp->base;
844 SMC_SELECT_BANK(lp, 3);
847 smc_mii_out(dev, 0xffffffff, 32);
849 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
850 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
852 /* Return to idle state */
853 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
855 DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
856 __func__, phyaddr, phyreg, phydata);
858 SMC_SELECT_BANK(lp, 2);
862 * Finds and reports the PHY address
864 static void smc_phy_detect(struct net_device *dev)
866 struct smc_local *lp = netdev_priv(dev);
869 DBG(2, dev, "%s\n", __func__);
874 * Scan all 32 PHY addresses if necessary, starting at
875 * PHY#1 to PHY#31, and then PHY#0 last.
877 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
878 unsigned int id1, id2;
880 /* Read the PHY identifiers */
881 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
882 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
884 DBG(3, dev, "phy_id1=0x%x, phy_id2=0x%x\n",
887 /* Make sure it is a valid identifier */
888 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
889 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
890 /* Save the PHY's address */
891 lp->mii.phy_id = phyaddr & 31;
892 lp->phy_type = id1 << 16 | id2;
899 * Sets the PHY to a configuration as determined by the user
901 static int smc_phy_fixed(struct net_device *dev)
903 struct smc_local *lp = netdev_priv(dev);
904 void __iomem *ioaddr = lp->base;
905 int phyaddr = lp->mii.phy_id;
908 DBG(3, dev, "%s\n", __func__);
910 /* Enter Link Disable state */
911 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
912 cfg1 |= PHY_CFG1_LNKDIS;
913 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
916 * Set our fixed capabilities
917 * Disable auto-negotiation
922 bmcr |= BMCR_FULLDPLX;
924 if (lp->ctl_rspeed == 100)
925 bmcr |= BMCR_SPEED100;
927 /* Write our capabilities to the phy control register */
928 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
930 /* Re-Configure the Receive/Phy Control register */
931 SMC_SELECT_BANK(lp, 0);
932 SMC_SET_RPC(lp, lp->rpc_cur_mode);
933 SMC_SELECT_BANK(lp, 2);
939 * smc_phy_reset - reset the phy
943 * Issue a software reset for the specified PHY and
944 * wait up to 100ms for the reset to complete. We should
945 * not access the PHY for 50ms after issuing the reset.
947 * The time to wait appears to be dependent on the PHY.
949 * Must be called with lp->lock locked.
951 static int smc_phy_reset(struct net_device *dev, int phy)
953 struct smc_local *lp = netdev_priv(dev);
957 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
959 for (timeout = 2; timeout; timeout--) {
960 spin_unlock_irq(&lp->lock);
962 spin_lock_irq(&lp->lock);
964 bmcr = smc_phy_read(dev, phy, MII_BMCR);
965 if (!(bmcr & BMCR_RESET))
969 return bmcr & BMCR_RESET;
973 * smc_phy_powerdown - powerdown phy
976 * Power down the specified PHY
978 static void smc_phy_powerdown(struct net_device *dev)
980 struct smc_local *lp = netdev_priv(dev);
982 int phy = lp->mii.phy_id;
984 if (lp->phy_type == 0)
987 /* We need to ensure that no calls to smc_phy_configure are
990 cancel_work_sync(&lp->phy_configure);
992 bmcr = smc_phy_read(dev, phy, MII_BMCR);
993 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
997 * smc_phy_check_media - check the media status and adjust TCR
999 * @init: set true for initialisation
1001 * Select duplex mode depending on negotiation state. This
1002 * also updates our carrier state.
1004 static void smc_phy_check_media(struct net_device *dev, int init)
1006 struct smc_local *lp = netdev_priv(dev);
1007 void __iomem *ioaddr = lp->base;
1009 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1010 /* duplex state has changed */
1011 if (lp->mii.full_duplex) {
1012 lp->tcr_cur_mode |= TCR_SWFDUP;
1014 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1017 SMC_SELECT_BANK(lp, 0);
1018 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1023 * Configures the specified PHY through the MII management interface
1024 * using Autonegotiation.
1025 * Calls smc_phy_fixed() if the user has requested a certain config.
1026 * If RPC ANEG bit is set, the media selection is dependent purely on
1027 * the selection by the MII (either in the MII BMCR reg or the result
1028 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1029 * is controlled by the RPC SPEED and RPC DPLX bits.
1031 static void smc_phy_configure(struct work_struct *work)
1033 struct smc_local *lp =
1034 container_of(work, struct smc_local, phy_configure);
1035 struct net_device *dev = lp->dev;
1036 void __iomem *ioaddr = lp->base;
1037 int phyaddr = lp->mii.phy_id;
1038 int my_phy_caps; /* My PHY capabilities */
1039 int my_ad_caps; /* My Advertised capabilities */
1042 DBG(3, dev, "smc_program_phy()\n");
1044 spin_lock_irq(&lp->lock);
1047 * We should not be called if phy_type is zero.
1049 if (lp->phy_type == 0)
1050 goto smc_phy_configure_exit;
1052 if (smc_phy_reset(dev, phyaddr)) {
1053 netdev_info(dev, "PHY reset timed out\n");
1054 goto smc_phy_configure_exit;
1058 * Enable PHY Interrupts (for register 18)
1059 * Interrupts listed here are disabled
1061 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1062 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1063 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1064 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1066 /* Configure the Receive/Phy Control register */
1067 SMC_SELECT_BANK(lp, 0);
1068 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1070 /* If the user requested no auto neg, then go set his request */
1071 if (lp->mii.force_media) {
1073 goto smc_phy_configure_exit;
1076 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1077 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1079 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1080 netdev_info(dev, "Auto negotiation NOT supported\n");
1082 goto smc_phy_configure_exit;
1085 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1087 if (my_phy_caps & BMSR_100BASE4)
1088 my_ad_caps |= ADVERTISE_100BASE4;
1089 if (my_phy_caps & BMSR_100FULL)
1090 my_ad_caps |= ADVERTISE_100FULL;
1091 if (my_phy_caps & BMSR_100HALF)
1092 my_ad_caps |= ADVERTISE_100HALF;
1093 if (my_phy_caps & BMSR_10FULL)
1094 my_ad_caps |= ADVERTISE_10FULL;
1095 if (my_phy_caps & BMSR_10HALF)
1096 my_ad_caps |= ADVERTISE_10HALF;
1098 /* Disable capabilities not selected by our user */
1099 if (lp->ctl_rspeed != 100)
1100 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1102 if (!lp->ctl_rfduplx)
1103 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1105 /* Update our Auto-Neg Advertisement Register */
1106 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1107 lp->mii.advertising = my_ad_caps;
1110 * Read the register back. Without this, it appears that when
1111 * auto-negotiation is restarted, sometimes it isn't ready and
1112 * the link does not come up.
1114 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1116 DBG(2, dev, "phy caps=%x\n", my_phy_caps);
1117 DBG(2, dev, "phy advertised caps=%x\n", my_ad_caps);
1119 /* Restart auto-negotiation process in order to advertise my caps */
1120 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1122 smc_phy_check_media(dev, 1);
1124 smc_phy_configure_exit:
1125 SMC_SELECT_BANK(lp, 2);
1126 spin_unlock_irq(&lp->lock);
1132 * Purpose: Handle interrupts relating to PHY register 18. This is
1133 * called from the "hard" interrupt handler under our private spinlock.
1135 static void smc_phy_interrupt(struct net_device *dev)
1137 struct smc_local *lp = netdev_priv(dev);
1138 int phyaddr = lp->mii.phy_id;
1141 DBG(2, dev, "%s\n", __func__);
1143 if (lp->phy_type == 0)
1147 smc_phy_check_media(dev, 0);
1149 /* Read PHY Register 18, Status Output */
1150 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1151 if ((phy18 & PHY_INT_INT) == 0)
1156 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1158 static void smc_10bt_check_media(struct net_device *dev, int init)
1160 struct smc_local *lp = netdev_priv(dev);
1161 void __iomem *ioaddr = lp->base;
1162 unsigned int old_carrier, new_carrier;
1164 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1166 SMC_SELECT_BANK(lp, 0);
1167 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1168 SMC_SELECT_BANK(lp, 2);
1170 if (init || (old_carrier != new_carrier)) {
1172 netif_carrier_off(dev);
1174 netif_carrier_on(dev);
1176 if (netif_msg_link(lp))
1177 netdev_info(dev, "link %s\n",
1178 new_carrier ? "up" : "down");
1182 static void smc_eph_interrupt(struct net_device *dev)
1184 struct smc_local *lp = netdev_priv(dev);
1185 void __iomem *ioaddr = lp->base;
1188 smc_10bt_check_media(dev, 0);
1190 SMC_SELECT_BANK(lp, 1);
1191 ctl = SMC_GET_CTL(lp);
1192 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1193 SMC_SET_CTL(lp, ctl);
1194 SMC_SELECT_BANK(lp, 2);
1198 * This is the main routine of the driver, to handle the device when
1199 * it needs some attention.
1201 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1203 struct net_device *dev = dev_id;
1204 struct smc_local *lp = netdev_priv(dev);
1205 void __iomem *ioaddr = lp->base;
1206 int status, mask, timeout, card_stats;
1209 DBG(3, dev, "%s\n", __func__);
1211 spin_lock(&lp->lock);
1213 /* A preamble may be used when there is a potential race
1214 * between the interruptible transmit functions and this
1216 SMC_INTERRUPT_PREAMBLE;
1218 saved_pointer = SMC_GET_PTR(lp);
1219 mask = SMC_GET_INT_MASK(lp);
1220 SMC_SET_INT_MASK(lp, 0);
1222 /* set a timeout value, so I don't stay here forever */
1223 timeout = MAX_IRQ_LOOPS;
1226 status = SMC_GET_INT(lp);
1228 DBG(2, dev, "INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1230 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1231 meminfo = SMC_GET_MIR(lp);
1232 SMC_SELECT_BANK(lp, 2); meminfo; }),
1239 if (status & IM_TX_INT) {
1240 /* do this before RX as it will free memory quickly */
1241 DBG(3, dev, "TX int\n");
1243 SMC_ACK_INT(lp, IM_TX_INT);
1244 if (THROTTLE_TX_PKTS)
1245 netif_wake_queue(dev);
1246 } else if (status & IM_RCV_INT) {
1247 DBG(3, dev, "RX irq\n");
1249 } else if (status & IM_ALLOC_INT) {
1250 DBG(3, dev, "Allocation irq\n");
1251 tasklet_hi_schedule(&lp->tx_task);
1252 mask &= ~IM_ALLOC_INT;
1253 } else if (status & IM_TX_EMPTY_INT) {
1254 DBG(3, dev, "TX empty\n");
1255 mask &= ~IM_TX_EMPTY_INT;
1258 SMC_SELECT_BANK(lp, 0);
1259 card_stats = SMC_GET_COUNTER(lp);
1260 SMC_SELECT_BANK(lp, 2);
1262 /* single collisions */
1263 dev->stats.collisions += card_stats & 0xF;
1266 /* multiple collisions */
1267 dev->stats.collisions += card_stats & 0xF;
1268 } else if (status & IM_RX_OVRN_INT) {
1269 DBG(1, dev, "RX overrun (EPH_ST 0x%04x)\n",
1270 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1271 eph_st = SMC_GET_EPH_STATUS(lp);
1272 SMC_SELECT_BANK(lp, 2); eph_st; }));
1273 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1274 dev->stats.rx_errors++;
1275 dev->stats.rx_fifo_errors++;
1276 } else if (status & IM_EPH_INT) {
1277 smc_eph_interrupt(dev);
1278 } else if (status & IM_MDINT) {
1279 SMC_ACK_INT(lp, IM_MDINT);
1280 smc_phy_interrupt(dev);
1281 } else if (status & IM_ERCV_INT) {
1282 SMC_ACK_INT(lp, IM_ERCV_INT);
1283 PRINTK(dev, "UNSUPPORTED: ERCV INTERRUPT\n");
1285 } while (--timeout);
1287 /* restore register states */
1288 SMC_SET_PTR(lp, saved_pointer);
1289 SMC_SET_INT_MASK(lp, mask);
1290 spin_unlock(&lp->lock);
1292 #ifndef CONFIG_NET_POLL_CONTROLLER
1293 if (timeout == MAX_IRQ_LOOPS)
1294 PRINTK(dev, "spurious interrupt (mask = 0x%02x)\n",
1297 DBG(3, dev, "Interrupt done (%d loops)\n",
1298 MAX_IRQ_LOOPS - timeout);
1301 * We return IRQ_HANDLED unconditionally here even if there was
1302 * nothing to do. There is a possibility that a packet might
1303 * get enqueued into the chip right after TX_EMPTY_INT is raised
1304 * but just before the CPU acknowledges the IRQ.
1305 * Better take an unneeded IRQ in some occasions than complexifying
1306 * the code for all cases.
1311 #ifdef CONFIG_NET_POLL_CONTROLLER
1313 * Polling receive - used by netconsole and other diagnostic tools
1314 * to allow network i/o with interrupts disabled.
1316 static void smc_poll_controller(struct net_device *dev)
1318 disable_irq(dev->irq);
1319 smc_interrupt(dev->irq, dev);
1320 enable_irq(dev->irq);
1324 /* Our watchdog timed out. Called by the networking layer */
1325 static void smc_timeout(struct net_device *dev)
1327 struct smc_local *lp = netdev_priv(dev);
1328 void __iomem *ioaddr = lp->base;
1329 int status, mask, eph_st, meminfo, fifo;
1331 DBG(2, dev, "%s\n", __func__);
1333 spin_lock_irq(&lp->lock);
1334 status = SMC_GET_INT(lp);
1335 mask = SMC_GET_INT_MASK(lp);
1336 fifo = SMC_GET_FIFO(lp);
1337 SMC_SELECT_BANK(lp, 0);
1338 eph_st = SMC_GET_EPH_STATUS(lp);
1339 meminfo = SMC_GET_MIR(lp);
1340 SMC_SELECT_BANK(lp, 2);
1341 spin_unlock_irq(&lp->lock);
1342 PRINTK(dev, "TX timeout (INT 0x%02x INTMASK 0x%02x MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1343 status, mask, meminfo, fifo, eph_st);
1349 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1350 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1351 * which calls schedule(). Hence we use a work queue.
1353 if (lp->phy_type != 0)
1354 schedule_work(&lp->phy_configure);
1356 /* We can accept TX packets again */
1357 netif_trans_update(dev); /* prevent tx timeout */
1358 netif_wake_queue(dev);
1362 * This routine will, depending on the values passed to it,
1363 * either make it accept multicast packets, go into
1364 * promiscuous mode (for TCPDUMP and cousins) or accept
1365 * a select set of multicast packets
1367 static void smc_set_multicast_list(struct net_device *dev)
1369 struct smc_local *lp = netdev_priv(dev);
1370 void __iomem *ioaddr = lp->base;
1371 unsigned char multicast_table[8];
1372 int update_multicast = 0;
1374 DBG(2, dev, "%s\n", __func__);
1376 if (dev->flags & IFF_PROMISC) {
1377 DBG(2, dev, "RCR_PRMS\n");
1378 lp->rcr_cur_mode |= RCR_PRMS;
1381 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1382 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1383 when promiscuous mode is turned on.
1387 * Here, I am setting this to accept all multicast packets.
1388 * I don't need to zero the multicast table, because the flag is
1389 * checked before the table is
1391 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1392 DBG(2, dev, "RCR_ALMUL\n");
1393 lp->rcr_cur_mode |= RCR_ALMUL;
1397 * This sets the internal hardware table to filter out unwanted
1398 * multicast packets before they take up memory.
1400 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1401 * address are the offset into the table. If that bit is 1, then the
1402 * multicast packet is accepted. Otherwise, it's dropped silently.
1404 * To use the 6 bits as an offset into the table, the high 3 bits are
1405 * the number of the 8 bit register, while the low 3 bits are the bit
1406 * within that register.
1408 else if (!netdev_mc_empty(dev)) {
1409 struct netdev_hw_addr *ha;
1411 /* table for flipping the order of 3 bits */
1412 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1414 /* start with a table of all zeros: reject all */
1415 memset(multicast_table, 0, sizeof(multicast_table));
1417 netdev_for_each_mc_addr(ha, dev) {
1420 /* only use the low order bits */
1421 position = crc32_le(~0, ha->addr, 6) & 0x3f;
1423 /* do some messy swapping to put the bit in the right spot */
1424 multicast_table[invert3[position&7]] |=
1425 (1<<invert3[(position>>3)&7]);
1428 /* be sure I get rid of flags I might have set */
1429 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1431 /* now, the table can be loaded into the chipset */
1432 update_multicast = 1;
1434 DBG(2, dev, "~(RCR_PRMS|RCR_ALMUL)\n");
1435 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1438 * since I'm disabling all multicast entirely, I need to
1439 * clear the multicast list
1441 memset(multicast_table, 0, sizeof(multicast_table));
1442 update_multicast = 1;
1445 spin_lock_irq(&lp->lock);
1446 SMC_SELECT_BANK(lp, 0);
1447 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1448 if (update_multicast) {
1449 SMC_SELECT_BANK(lp, 3);
1450 SMC_SET_MCAST(lp, multicast_table);
1452 SMC_SELECT_BANK(lp, 2);
1453 spin_unlock_irq(&lp->lock);
1458 * Open and Initialize the board
1460 * Set up everything, reset the card, etc..
1463 smc_open(struct net_device *dev)
1465 struct smc_local *lp = netdev_priv(dev);
1467 DBG(2, dev, "%s\n", __func__);
1469 /* Setup the default Register Modes */
1470 lp->tcr_cur_mode = TCR_DEFAULT;
1471 lp->rcr_cur_mode = RCR_DEFAULT;
1472 lp->rpc_cur_mode = RPC_DEFAULT |
1473 lp->cfg.leda << RPC_LSXA_SHFT |
1474 lp->cfg.ledb << RPC_LSXB_SHFT;
1477 * If we are not using a MII interface, we need to
1478 * monitor our own carrier signal to detect faults.
1480 if (lp->phy_type == 0)
1481 lp->tcr_cur_mode |= TCR_MON_CSN;
1483 /* reset the hardware */
1487 /* Configure the PHY, initialize the link state */
1488 if (lp->phy_type != 0)
1489 smc_phy_configure(&lp->phy_configure);
1491 spin_lock_irq(&lp->lock);
1492 smc_10bt_check_media(dev, 1);
1493 spin_unlock_irq(&lp->lock);
1496 netif_start_queue(dev);
1503 * this makes the board clean up everything that it can
1504 * and not talk to the outside world. Caused by
1505 * an 'ifconfig ethX down'
1507 static int smc_close(struct net_device *dev)
1509 struct smc_local *lp = netdev_priv(dev);
1511 DBG(2, dev, "%s\n", __func__);
1513 netif_stop_queue(dev);
1514 netif_carrier_off(dev);
1516 /* clear everything */
1518 tasklet_kill(&lp->tx_task);
1519 smc_phy_powerdown(dev);
1527 smc_ethtool_get_link_ksettings(struct net_device *dev,
1528 struct ethtool_link_ksettings *cmd)
1530 struct smc_local *lp = netdev_priv(dev);
1532 if (lp->phy_type != 0) {
1533 spin_lock_irq(&lp->lock);
1534 mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1535 spin_unlock_irq(&lp->lock);
1537 u32 supported = SUPPORTED_10baseT_Half |
1538 SUPPORTED_10baseT_Full |
1539 SUPPORTED_TP | SUPPORTED_AUI;
1541 if (lp->ctl_rspeed == 10)
1542 cmd->base.speed = SPEED_10;
1543 else if (lp->ctl_rspeed == 100)
1544 cmd->base.speed = SPEED_100;
1546 cmd->base.autoneg = AUTONEG_DISABLE;
1548 cmd->base.duplex = lp->tcr_cur_mode & TCR_SWFDUP ?
1549 DUPLEX_FULL : DUPLEX_HALF;
1551 ethtool_convert_legacy_u32_to_link_mode(
1552 cmd->link_modes.supported, supported);
1559 smc_ethtool_set_link_ksettings(struct net_device *dev,
1560 const struct ethtool_link_ksettings *cmd)
1562 struct smc_local *lp = netdev_priv(dev);
1565 if (lp->phy_type != 0) {
1566 spin_lock_irq(&lp->lock);
1567 ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1568 spin_unlock_irq(&lp->lock);
1570 if (cmd->base.autoneg != AUTONEG_DISABLE ||
1571 cmd->base.speed != SPEED_10 ||
1572 (cmd->base.duplex != DUPLEX_HALF &&
1573 cmd->base.duplex != DUPLEX_FULL) ||
1574 (cmd->base.port != PORT_TP && cmd->base.port != PORT_AUI))
1577 // lp->port = cmd->base.port;
1578 lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1580 // if (netif_running(dev))
1581 // smc_set_port(dev);
1590 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1592 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1593 strlcpy(info->version, version, sizeof(info->version));
1594 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1595 sizeof(info->bus_info));
1598 static int smc_ethtool_nwayreset(struct net_device *dev)
1600 struct smc_local *lp = netdev_priv(dev);
1603 if (lp->phy_type != 0) {
1604 spin_lock_irq(&lp->lock);
1605 ret = mii_nway_restart(&lp->mii);
1606 spin_unlock_irq(&lp->lock);
1612 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1614 struct smc_local *lp = netdev_priv(dev);
1615 return lp->msg_enable;
1618 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1620 struct smc_local *lp = netdev_priv(dev);
1621 lp->msg_enable = level;
1624 static int smc_write_eeprom_word(struct net_device *dev, u16 addr, u16 word)
1627 struct smc_local *lp = netdev_priv(dev);
1628 void __iomem *ioaddr = lp->base;
1630 spin_lock_irq(&lp->lock);
1631 /* load word into GP register */
1632 SMC_SELECT_BANK(lp, 1);
1633 SMC_SET_GP(lp, word);
1634 /* set the address to put the data in EEPROM */
1635 SMC_SELECT_BANK(lp, 2);
1636 SMC_SET_PTR(lp, addr);
1637 /* tell it to write */
1638 SMC_SELECT_BANK(lp, 1);
1639 ctl = SMC_GET_CTL(lp);
1640 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1641 /* wait for it to finish */
1644 } while (SMC_GET_CTL(lp) & CTL_STORE);
1646 SMC_SET_CTL(lp, ctl);
1647 SMC_SELECT_BANK(lp, 2);
1648 spin_unlock_irq(&lp->lock);
1652 static int smc_read_eeprom_word(struct net_device *dev, u16 addr, u16 *word)
1655 struct smc_local *lp = netdev_priv(dev);
1656 void __iomem *ioaddr = lp->base;
1658 spin_lock_irq(&lp->lock);
1659 /* set the EEPROM address to get the data from */
1660 SMC_SELECT_BANK(lp, 2);
1661 SMC_SET_PTR(lp, addr | PTR_READ);
1662 /* tell it to load */
1663 SMC_SELECT_BANK(lp, 1);
1664 SMC_SET_GP(lp, 0xffff); /* init to known */
1665 ctl = SMC_GET_CTL(lp);
1666 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1667 /* wait for it to finish */
1670 } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1671 /* read word from GP register */
1672 *word = SMC_GET_GP(lp);
1674 SMC_SET_CTL(lp, ctl);
1675 SMC_SELECT_BANK(lp, 2);
1676 spin_unlock_irq(&lp->lock);
1680 static int smc_ethtool_geteeprom_len(struct net_device *dev)
1685 static int smc_ethtool_geteeprom(struct net_device *dev,
1686 struct ethtool_eeprom *eeprom, u8 *data)
1691 DBG(1, dev, "Reading %d bytes at %d(0x%x)\n",
1692 eeprom->len, eeprom->offset, eeprom->offset);
1693 imax = smc_ethtool_geteeprom_len(dev);
1694 for (i = 0; i < eeprom->len; i += 2) {
1697 int offset = i + eeprom->offset;
1700 ret = smc_read_eeprom_word(dev, offset >> 1, &wbuf);
1703 DBG(2, dev, "Read 0x%x from 0x%x\n", wbuf, offset >> 1);
1704 data[i] = (wbuf >> 8) & 0xff;
1705 data[i+1] = wbuf & 0xff;
1710 static int smc_ethtool_seteeprom(struct net_device *dev,
1711 struct ethtool_eeprom *eeprom, u8 *data)
1716 DBG(1, dev, "Writing %d bytes to %d(0x%x)\n",
1717 eeprom->len, eeprom->offset, eeprom->offset);
1718 imax = smc_ethtool_geteeprom_len(dev);
1719 for (i = 0; i < eeprom->len; i += 2) {
1722 int offset = i + eeprom->offset;
1725 wbuf = (data[i] << 8) | data[i + 1];
1726 DBG(2, dev, "Writing 0x%x to 0x%x\n", wbuf, offset >> 1);
1727 ret = smc_write_eeprom_word(dev, offset >> 1, wbuf);
1735 static const struct ethtool_ops smc_ethtool_ops = {
1736 .get_drvinfo = smc_ethtool_getdrvinfo,
1738 .get_msglevel = smc_ethtool_getmsglevel,
1739 .set_msglevel = smc_ethtool_setmsglevel,
1740 .nway_reset = smc_ethtool_nwayreset,
1741 .get_link = ethtool_op_get_link,
1742 .get_eeprom_len = smc_ethtool_geteeprom_len,
1743 .get_eeprom = smc_ethtool_geteeprom,
1744 .set_eeprom = smc_ethtool_seteeprom,
1745 .get_link_ksettings = smc_ethtool_get_link_ksettings,
1746 .set_link_ksettings = smc_ethtool_set_link_ksettings,
1749 static const struct net_device_ops smc_netdev_ops = {
1750 .ndo_open = smc_open,
1751 .ndo_stop = smc_close,
1752 .ndo_start_xmit = smc_hard_start_xmit,
1753 .ndo_tx_timeout = smc_timeout,
1754 .ndo_set_rx_mode = smc_set_multicast_list,
1755 .ndo_validate_addr = eth_validate_addr,
1756 .ndo_set_mac_address = eth_mac_addr,
1757 #ifdef CONFIG_NET_POLL_CONTROLLER
1758 .ndo_poll_controller = smc_poll_controller,
1765 * This routine has a simple purpose -- make the SMC chip generate an
1766 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1769 * does this still work?
1771 * I just deleted auto_irq.c, since it was never built...
1774 static int smc_findirq(struct smc_local *lp)
1776 void __iomem *ioaddr = lp->base;
1778 unsigned long cookie;
1780 DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1782 cookie = probe_irq_on();
1785 * What I try to do here is trigger an ALLOC_INT. This is done
1786 * by allocating a small chunk of memory, which will give an interrupt
1789 /* enable ALLOCation interrupts ONLY */
1790 SMC_SELECT_BANK(lp, 2);
1791 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1794 * Allocate 512 bytes of memory. Note that the chip was just
1795 * reset so all the memory is available
1797 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1800 * Wait until positive that the interrupt has been generated
1805 int_status = SMC_GET_INT(lp);
1806 if (int_status & IM_ALLOC_INT)
1807 break; /* got the interrupt */
1808 } while (--timeout);
1811 * there is really nothing that I can do here if timeout fails,
1812 * as autoirq_report will return a 0 anyway, which is what I
1813 * want in this case. Plus, the clean up is needed in both
1817 /* and disable all interrupts again */
1818 SMC_SET_INT_MASK(lp, 0);
1820 /* and return what I found */
1821 return probe_irq_off(cookie);
1825 * Function: smc_probe(unsigned long ioaddr)
1828 * Tests to see if a given ioaddr points to an SMC91x chip.
1829 * Returns a 0 on success
1832 * (1) see if the high byte of BANK_SELECT is 0x33
1833 * (2) compare the ioaddr with the base register's address
1834 * (3) see if I recognize the chip ID in the appropriate register
1836 * Here I do typical initialization tasks.
1838 * o Initialize the structure if needed
1839 * o print out my vanity message if not done so already
1840 * o print out what type of hardware is detected
1841 * o print out the ethernet address
1843 * o set up my private data
1844 * o configure the dev structure with my subroutines
1845 * o actually GRAB the irq.
1848 static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
1849 unsigned long irq_flags)
1851 struct smc_local *lp = netdev_priv(dev);
1853 unsigned int val, revision_register;
1854 const char *version_string;
1856 DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
1858 /* First, see if the high byte is 0x33 */
1859 val = SMC_CURRENT_BANK(lp);
1860 DBG(2, dev, "%s: bank signature probe returned 0x%04x\n",
1862 if ((val & 0xFF00) != 0x3300) {
1863 if ((val & 0xFF) == 0x33) {
1865 "%s: Detected possible byte-swapped interface at IOADDR %p\n",
1873 * The above MIGHT indicate a device, but I need to write to
1874 * further test this.
1876 SMC_SELECT_BANK(lp, 0);
1877 val = SMC_CURRENT_BANK(lp);
1878 if ((val & 0xFF00) != 0x3300) {
1884 * well, we've already written once, so hopefully another
1885 * time won't hurt. This time, I need to switch the bank
1886 * register to bank 1, so I can access the base address
1889 SMC_SELECT_BANK(lp, 1);
1890 val = SMC_GET_BASE(lp);
1891 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1892 if (((unsigned long)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1893 netdev_warn(dev, "%s: IOADDR %p doesn't match configuration (%x).\n",
1894 CARDNAME, ioaddr, val);
1898 * check if the revision register is something that I
1899 * recognize. These might need to be added to later,
1900 * as future revisions could be added.
1902 SMC_SELECT_BANK(lp, 3);
1903 revision_register = SMC_GET_REV(lp);
1904 DBG(2, dev, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1905 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1906 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1907 /* I don't recognize this chip, so... */
1908 netdev_warn(dev, "%s: IO %p: Unrecognized revision register 0x%04x, Contact author.\n",
1909 CARDNAME, ioaddr, revision_register);
1915 /* At this point I'll assume that the chip is an SMC91x. */
1916 pr_info_once("%s\n", version);
1918 /* fill in some of the fields */
1919 dev->base_addr = (unsigned long)ioaddr;
1921 lp->version = revision_register & 0xff;
1922 spin_lock_init(&lp->lock);
1924 /* Get the MAC address */
1925 SMC_SELECT_BANK(lp, 1);
1926 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1928 /* now, reset the chip, and put it into a known state */
1932 * If dev->irq is 0, then the device has to be banged on to see
1935 * This banging doesn't always detect the IRQ, for unknown reasons.
1936 * a workaround is to reset the chip and try again.
1938 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1939 * be what is requested on the command line. I don't do that, mostly
1940 * because the card that I have uses a non-standard method of accessing
1941 * the IRQs, and because this _should_ work in most configurations.
1943 * Specifying an IRQ is done with the assumption that the user knows
1944 * what (s)he is doing. No checking is done!!!!
1951 dev->irq = smc_findirq(lp);
1954 /* kick the card and try again */
1958 if (dev->irq == 0) {
1959 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1963 dev->irq = irq_canonicalize(dev->irq);
1965 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1966 dev->netdev_ops = &smc_netdev_ops;
1967 dev->ethtool_ops = &smc_ethtool_ops;
1969 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1970 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1972 lp->mii.phy_id_mask = 0x1f;
1973 lp->mii.reg_num_mask = 0x1f;
1974 lp->mii.force_media = 0;
1975 lp->mii.full_duplex = 0;
1977 lp->mii.mdio_read = smc_phy_read;
1978 lp->mii.mdio_write = smc_phy_write;
1981 * Locate the phy, if any.
1983 if (lp->version >= (CHIP_91100 << 4))
1984 smc_phy_detect(dev);
1986 /* then shut everything down to save power */
1988 smc_phy_powerdown(dev);
1990 /* Set default parameters */
1991 lp->msg_enable = NETIF_MSG_LINK;
1992 lp->ctl_rfduplx = 0;
1993 lp->ctl_rspeed = 10;
1995 if (lp->version >= (CHIP_91100 << 4)) {
1996 lp->ctl_rfduplx = 1;
1997 lp->ctl_rspeed = 100;
2001 retval = request_irq(dev->irq, smc_interrupt, irq_flags, dev->name, dev);
2005 #ifdef CONFIG_ARCH_PXA
2006 # ifdef SMC_USE_PXA_DMA
2007 lp->cfg.flags |= SMC91X_USE_DMA;
2009 if (lp->cfg.flags & SMC91X_USE_DMA) {
2010 dma_cap_mask_t mask;
2013 dma_cap_set(DMA_SLAVE, mask);
2014 lp->dma_chan = dma_request_channel(mask, NULL, NULL);
2018 retval = register_netdev(dev);
2020 /* now, print out the card info, in a short format.. */
2021 netdev_info(dev, "%s (rev %d) at %p IRQ %d",
2022 version_string, revision_register & 0x0f,
2023 lp->base, dev->irq);
2026 pr_cont(" DMA %p", lp->dma_chan);
2029 lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2030 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2032 if (!is_valid_ether_addr(dev->dev_addr)) {
2033 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2035 /* Print the Ethernet address */
2036 netdev_info(dev, "Ethernet addr: %pM\n",
2040 if (lp->phy_type == 0) {
2041 PRINTK(dev, "No PHY found\n");
2042 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2043 PRINTK(dev, "PHY LAN83C183 (LAN91C111 Internal)\n");
2044 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2045 PRINTK(dev, "PHY LAN83C180\n");
2050 #ifdef CONFIG_ARCH_PXA
2051 if (retval && lp->dma_chan)
2052 dma_release_channel(lp->dma_chan);
2057 static int smc_enable_device(struct platform_device *pdev)
2059 struct net_device *ndev = platform_get_drvdata(pdev);
2060 struct smc_local *lp = netdev_priv(ndev);
2061 unsigned long flags;
2062 unsigned char ecor, ecsr;
2064 struct resource * res;
2066 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2071 * Map the attribute space. This is overkill, but clean.
2073 addr = ioremap(res->start, ATTRIB_SIZE);
2078 * Reset the device. We must disable IRQs around this
2079 * since a reset causes the IRQ line become active.
2081 local_irq_save(flags);
2082 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2083 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2084 readb(addr + (ECOR << SMC_IO_SHIFT));
2087 * Wait 100us for the chip to reset.
2092 * The device will ignore all writes to the enable bit while
2093 * reset is asserted, even if the reset bit is cleared in the
2094 * same write. Must clear reset first, then enable the device.
2096 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2097 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2100 * Set the appropriate byte/word mode.
2102 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2105 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2106 local_irq_restore(flags);
2111 * Wait for the chip to wake up. We could poll the control
2112 * register in the main register space, but that isn't mapped
2113 * yet. We know this is going to take 750us.
2120 static int smc_request_attrib(struct platform_device *pdev,
2121 struct net_device *ndev)
2123 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2124 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2129 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2135 static void smc_release_attrib(struct platform_device *pdev,
2136 struct net_device *ndev)
2138 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2139 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2142 release_mem_region(res->start, ATTRIB_SIZE);
2145 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2147 if (SMC_CAN_USE_DATACS) {
2148 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2149 struct smc_local *lp = netdev_priv(ndev);
2154 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2155 netdev_info(ndev, "%s: failed to request datacs memory region.\n",
2160 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2164 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2166 if (SMC_CAN_USE_DATACS) {
2167 struct smc_local *lp = netdev_priv(ndev);
2168 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2171 iounmap(lp->datacs);
2176 release_mem_region(res->start, SMC_DATA_EXTENT);
2180 static const struct acpi_device_id smc91x_acpi_match[] = {
2184 MODULE_DEVICE_TABLE(acpi, smc91x_acpi_match);
2186 #if IS_BUILTIN(CONFIG_OF)
2187 static const struct of_device_id smc91x_match[] = {
2188 { .compatible = "smsc,lan91c94", },
2189 { .compatible = "smsc,lan91c111", },
2192 MODULE_DEVICE_TABLE(of, smc91x_match);
2195 * of_try_set_control_gpio - configure a gpio if it exists
2197 static int try_toggle_control_gpio(struct device *dev,
2198 struct gpio_desc **desc,
2199 const char *name, int index,
2200 int value, unsigned int nsdelay)
2202 struct gpio_desc *gpio = *desc;
2203 enum gpiod_flags flags = value ? GPIOD_OUT_LOW : GPIOD_OUT_HIGH;
2205 gpio = devm_gpiod_get_index_optional(dev, name, index, flags);
2207 return PTR_ERR(gpio);
2211 usleep_range(nsdelay, 2 * nsdelay);
2212 gpiod_set_value_cansleep(gpio, value);
2223 * dev->base_addr == 0, try to find all possible locations
2224 * dev->base_addr > 0x1ff, this is the address to check
2225 * dev->base_addr == <anything else>, return failure code
2228 * 0 --> there is a device
2229 * anything else, error
2231 static int smc_drv_probe(struct platform_device *pdev)
2233 struct smc91x_platdata *pd = dev_get_platdata(&pdev->dev);
2234 const struct of_device_id *match = NULL;
2235 struct smc_local *lp;
2236 struct net_device *ndev;
2237 struct resource *res;
2238 unsigned int __iomem *addr;
2239 unsigned long irq_flags = SMC_IRQ_FLAGS;
2240 unsigned long irq_resflags;
2243 ndev = alloc_etherdev(sizeof(struct smc_local));
2248 SET_NETDEV_DEV(ndev, &pdev->dev);
2250 /* get configuration from platform data, only allow use of
2251 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2254 lp = netdev_priv(ndev);
2258 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2259 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2261 if (!SMC_8BIT(lp) && !SMC_16BIT(lp)) {
2263 "at least one of 8-bit or 16-bit access support is required.\n");
2265 goto out_free_netdev;
2269 #if IS_BUILTIN(CONFIG_OF)
2270 match = of_match_device(of_match_ptr(smc91x_match), &pdev->dev);
2274 /* Optional pwrdwn GPIO configured? */
2275 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2276 "power", 0, 0, 100);
2281 * Optional reset GPIO configured? Minimum 100 ns reset needed
2282 * according to LAN91C96 datasheet page 14.
2284 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2285 "reset", 0, 0, 100);
2290 * Need to wait for optional EEPROM to load, max 750 us according
2291 * to LAN91C96 datasheet page 55.
2294 usleep_range(750, 1000);
2296 /* Combination of IO widths supported, default to 16-bit */
2297 if (!device_property_read_u32(&pdev->dev, "reg-io-width",
2300 lp->cfg.flags |= SMC91X_USE_8BIT;
2301 if ((val == 0) || (val & 2))
2302 lp->cfg.flags |= SMC91X_USE_16BIT;
2304 lp->cfg.flags |= SMC91X_USE_32BIT;
2306 lp->cfg.flags |= SMC91X_USE_16BIT;
2308 if (!device_property_read_u32(&pdev->dev, "reg-shift",
2311 lp->cfg.pxa_u16_align4 =
2312 device_property_read_bool(&pdev->dev, "pxa-u16-align4");
2316 if (!pd && !match) {
2317 lp->cfg.flags |= (SMC_CAN_USE_8BIT) ? SMC91X_USE_8BIT : 0;
2318 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2319 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2320 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2323 if (!lp->cfg.leda && !lp->cfg.ledb) {
2324 lp->cfg.leda = RPC_LSA_DEFAULT;
2325 lp->cfg.ledb = RPC_LSB_DEFAULT;
2328 ndev->dma = (unsigned char)-1;
2330 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2332 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2335 goto out_free_netdev;
2339 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2341 goto out_free_netdev;
2344 ndev->irq = platform_get_irq(pdev, 0);
2345 if (ndev->irq < 0) {
2347 goto out_release_io;
2350 * If this platform does not specify any special irqflags, or if
2351 * the resource supplies a trigger, override the irqflags with
2352 * the trigger flags from the resource.
2354 irq_resflags = irqd_get_trigger_type(irq_get_irq_data(ndev->irq));
2355 if (irq_flags == -1 || irq_resflags & IRQF_TRIGGER_MASK)
2356 irq_flags = irq_resflags & IRQF_TRIGGER_MASK;
2358 ret = smc_request_attrib(pdev, ndev);
2360 goto out_release_io;
2361 #if defined(CONFIG_ASSABET_NEPONSET)
2362 if (machine_is_assabet() && machine_has_neponset())
2363 neponset_ncr_set(NCR_ENET_OSC_EN);
2365 platform_set_drvdata(pdev, ndev);
2366 ret = smc_enable_device(pdev);
2368 goto out_release_attrib;
2370 addr = ioremap(res->start, SMC_IO_EXTENT);
2373 goto out_release_attrib;
2376 #ifdef CONFIG_ARCH_PXA
2378 struct smc_local *lp = netdev_priv(ndev);
2379 lp->device = &pdev->dev;
2380 lp->physaddr = res->start;
2385 ret = smc_probe(ndev, addr, irq_flags);
2389 smc_request_datacs(pdev, ndev);
2396 smc_release_attrib(pdev, ndev);
2398 release_mem_region(res->start, SMC_IO_EXTENT);
2402 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2407 static int smc_drv_remove(struct platform_device *pdev)
2409 struct net_device *ndev = platform_get_drvdata(pdev);
2410 struct smc_local *lp = netdev_priv(ndev);
2411 struct resource *res;
2413 unregister_netdev(ndev);
2415 free_irq(ndev->irq, ndev);
2417 #ifdef CONFIG_ARCH_PXA
2419 dma_release_channel(lp->dma_chan);
2423 smc_release_datacs(pdev,ndev);
2424 smc_release_attrib(pdev,ndev);
2426 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2428 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2429 release_mem_region(res->start, SMC_IO_EXTENT);
2436 static int smc_drv_suspend(struct device *dev)
2438 struct net_device *ndev = dev_get_drvdata(dev);
2441 if (netif_running(ndev)) {
2442 netif_device_detach(ndev);
2444 smc_phy_powerdown(ndev);
2450 static int smc_drv_resume(struct device *dev)
2452 struct platform_device *pdev = to_platform_device(dev);
2453 struct net_device *ndev = platform_get_drvdata(pdev);
2456 struct smc_local *lp = netdev_priv(ndev);
2457 smc_enable_device(pdev);
2458 if (netif_running(ndev)) {
2461 if (lp->phy_type != 0)
2462 smc_phy_configure(&lp->phy_configure);
2463 netif_device_attach(ndev);
2469 static const struct dev_pm_ops smc_drv_pm_ops = {
2470 .suspend = smc_drv_suspend,
2471 .resume = smc_drv_resume,
2474 static struct platform_driver smc_driver = {
2475 .probe = smc_drv_probe,
2476 .remove = smc_drv_remove,
2479 .pm = &smc_drv_pm_ops,
2480 .of_match_table = of_match_ptr(smc91x_match),
2481 .acpi_match_table = smc91x_acpi_match,
2485 module_platform_driver(smc_driver);