drivers/net/ethernet/renesas/rswitch.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Renesas Ethernet Switch device driver
   3  *
   4  * Copyright (C) 2022 Renesas Electronics Corporation
   5  */
   6
   7 #ifndef __RSWITCH_H__
   8 #define __RSWITCH_H__
   9
  10 #include <linux/platform_device.h>
  11 #include "rcar_gen4_ptp.h"
  12
  13 #define RSWITCH_MAX_NUM_QUEUES  128
  14
  15 #define RSWITCH_NUM_PORTS       3
  16
  17 #define TX_RING_SIZE            1024
  18 #define RX_RING_SIZE            1024
  19
  20 #define PKT_BUF_SZ              1584
  21 #define RSWITCH_ALIGN           128
  22 #define RSWITCH_MAX_CTAG_PCP    7
  23
  24 #define RSWITCH_TIMEOUT_US      100000
  25
  26 #define RSWITCH_TOP_OFFSET      0x00008000
  27 #define RSWITCH_COMA_OFFSET     0x00009000
  28 #define RSWITCH_ETHA_OFFSET     0x0000a000      /* with RMAC */
  29 #define RSWITCH_ETHA_SIZE       0x00002000      /* with RMAC */
  30 #define RSWITCH_GWCA0_OFFSET    0x00010000
  31 #define RSWITCH_GWCA1_OFFSET    0x00012000
  32
  33 /* TODO: hardcoded ETHA/GWCA settings for now */
  34 #define GWCA_IRQ_RESOURCE_NAME  "gwca0_rxtx%d"
  35 #define GWCA_IRQ_NAME           "rswitch: gwca0_rxtx%d"
  36 #define GWCA_NUM_IRQS           8
  37 #define GWCA_INDEX              0
  38 #define AGENT_INDEX_GWCA        3
  39 #define GWRO                    RSWITCH_GWCA0_OFFSET
  40
  41 #define FWRO    0
  42 #define TPRO    RSWITCH_TOP_OFFSET
  43 #define CARO    RSWITCH_COMA_OFFSET
  44 #define TARO    0
  45 #define RMRO    0x1000
  46 enum rswitch_reg {
  47         FWGC            = FWRO + 0x0000,
  48         FWTTC0          = FWRO + 0x0010,
  49         FWTTC1          = FWRO + 0x0014,
  50         FWLBMC          = FWRO + 0x0018,
  51         FWCEPTC         = FWRO + 0x0020,
  52         FWCEPRC0        = FWRO + 0x0024,
  53         FWCEPRC1        = FWRO + 0x0028,
  54         FWCEPRC2        = FWRO + 0x002c,
  55         FWCLPTC         = FWRO + 0x0030,
  56         FWCLPRC         = FWRO + 0x0034,
  57         FWCMPTC         = FWRO + 0x0040,
  58         FWEMPTC         = FWRO + 0x0044,
  59         FWSDMPTC        = FWRO + 0x0050,
  60         FWSDMPVC        = FWRO + 0x0054,
  61         FWLBWMC0        = FWRO + 0x0080,
  62         FWPC00          = FWRO + 0x0100,
  63         FWPC10          = FWRO + 0x0104,
  64         FWPC20          = FWRO + 0x0108,
  65         FWCTGC00        = FWRO + 0x0400,
  66         FWCTGC10        = FWRO + 0x0404,
  67         FWCTTC00        = FWRO + 0x0408,
  68         FWCTTC10        = FWRO + 0x040c,
  69         FWCTTC200       = FWRO + 0x0410,
  70         FWCTSC00        = FWRO + 0x0420,
  71         FWCTSC10        = FWRO + 0x0424,
  72         FWCTSC20        = FWRO + 0x0428,
  73         FWCTSC30        = FWRO + 0x042c,
  74         FWCTSC40        = FWRO + 0x0430,
  75         FWTWBFC0        = FWRO + 0x1000,
  76         FWTWBFVC0       = FWRO + 0x1004,
  77         FWTHBFC0        = FWRO + 0x1400,
  78         FWTHBFV0C0      = FWRO + 0x1404,
  79         FWTHBFV1C0      = FWRO + 0x1408,
  80         FWFOBFC0        = FWRO + 0x1800,
  81         FWFOBFV0C0      = FWRO + 0x1804,
  82         FWFOBFV1C0      = FWRO + 0x1808,
  83         FWRFC0          = FWRO + 0x1c00,
  84         FWRFVC0         = FWRO + 0x1c04,
  85         FWCFC0          = FWRO + 0x2000,
  86         FWCFMC00        = FWRO + 0x2004,
  87         FWIP4SC         = FWRO + 0x4008,
  88         FWIP6SC         = FWRO + 0x4018,
  89         FWIP6OC         = FWRO + 0x401c,
  90         FWL2SC          = FWRO + 0x4020,
  91         FWSFHEC         = FWRO + 0x4030,
  92         FWSHCR0         = FWRO + 0x4040,
  93         FWSHCR1         = FWRO + 0x4044,
  94         FWSHCR2         = FWRO + 0x4048,
  95         FWSHCR3         = FWRO + 0x404c,
  96         FWSHCR4         = FWRO + 0x4050,
  97         FWSHCR5         = FWRO + 0x4054,
  98         FWSHCR6         = FWRO + 0x4058,
  99         FWSHCR7         = FWRO + 0x405c,
 100         FWSHCR8         = FWRO + 0x4060,
 101         FWSHCR9         = FWRO + 0x4064,
 102         FWSHCR10        = FWRO + 0x4068,
 103         FWSHCR11        = FWRO + 0x406c,
 104         FWSHCR12        = FWRO + 0x4070,
 105         FWSHCR13        = FWRO + 0x4074,
 106         FWSHCRR         = FWRO + 0x4078,
 107         FWLTHHEC        = FWRO + 0x4090,
 108         FWLTHHC         = FWRO + 0x4094,
 109         FWLTHTL0        = FWRO + 0x40a0,
 110         FWLTHTL1        = FWRO + 0x40a4,
 111         FWLTHTL2        = FWRO + 0x40a8,
 112         FWLTHTL3        = FWRO + 0x40ac,
 113         FWLTHTL4        = FWRO + 0x40b0,
 114         FWLTHTL5        = FWRO + 0x40b4,
 115         FWLTHTL6        = FWRO + 0x40b8,
 116         FWLTHTL7        = FWRO + 0x40bc,
 117         FWLTHTL80       = FWRO + 0x40c0,
 118         FWLTHTL9        = FWRO + 0x40d0,
 119         FWLTHTLR        = FWRO + 0x40d4,
 120         FWLTHTIM        = FWRO + 0x40e0,
 121         FWLTHTEM        = FWRO + 0x40e4,
 122         FWLTHTS0        = FWRO + 0x4100,
 123         FWLTHTS1        = FWRO + 0x4104,
 124         FWLTHTS2        = FWRO + 0x4108,
 125         FWLTHTS3        = FWRO + 0x410c,
 126         FWLTHTS4        = FWRO + 0x4110,
 127         FWLTHTSR0       = FWRO + 0x4120,
 128         FWLTHTSR1       = FWRO + 0x4124,
 129         FWLTHTSR2       = FWRO + 0x4128,
 130         FWLTHTSR3       = FWRO + 0x412c,
 131         FWLTHTSR40      = FWRO + 0x4130,
 132         FWLTHTSR5       = FWRO + 0x4140,
 133         FWLTHTR         = FWRO + 0x4150,
 134         FWLTHTRR0       = FWRO + 0x4154,
 135         FWLTHTRR1       = FWRO + 0x4158,
 136         FWLTHTRR2       = FWRO + 0x415c,
 137         FWLTHTRR3       = FWRO + 0x4160,
 138         FWLTHTRR4       = FWRO + 0x4164,
 139         FWLTHTRR5       = FWRO + 0x4168,
 140         FWLTHTRR6       = FWRO + 0x416c,
 141         FWLTHTRR7       = FWRO + 0x4170,
 142         FWLTHTRR8       = FWRO + 0x4174,
 143         FWLTHTRR9       = FWRO + 0x4180,
 144         FWLTHTRR10      = FWRO + 0x4190,
 145         FWIPHEC         = FWRO + 0x4214,
 146         FWIPHC          = FWRO + 0x4218,
 147         FWIPTL0         = FWRO + 0x4220,
 148         FWIPTL1         = FWRO + 0x4224,
 149         FWIPTL2         = FWRO + 0x4228,
 150         FWIPTL3         = FWRO + 0x422c,
 151         FWIPTL4         = FWRO + 0x4230,
 152         FWIPTL5         = FWRO + 0x4234,
 153         FWIPTL6         = FWRO + 0x4238,
 154         FWIPTL7         = FWRO + 0x4240,
 155         FWIPTL8         = FWRO + 0x4250,
 156         FWIPTLR         = FWRO + 0x4254,
 157         FWIPTIM         = FWRO + 0x4260,
 158         FWIPTEM         = FWRO + 0x4264,
 159         FWIPTS0         = FWRO + 0x4270,
 160         FWIPTS1         = FWRO + 0x4274,
 161         FWIPTS2         = FWRO + 0x4278,
 162         FWIPTS3         = FWRO + 0x427c,
 163         FWIPTS4         = FWRO + 0x4280,
 164         FWIPTSR0        = FWRO + 0x4284,
 165         FWIPTSR1        = FWRO + 0x4288,
 166         FWIPTSR2        = FWRO + 0x428c,
 167         FWIPTSR3        = FWRO + 0x4290,
 168         FWIPTSR4        = FWRO + 0x42a0,
 169         FWIPTR          = FWRO + 0x42b0,
 170         FWIPTRR0        = FWRO + 0x42b4,
 171         FWIPTRR1        = FWRO + 0x42b8,
 172         FWIPTRR2        = FWRO + 0x42bc,
 173         FWIPTRR3        = FWRO + 0x42c0,
 174         FWIPTRR4        = FWRO + 0x42c4,
 175         FWIPTRR5        = FWRO + 0x42c8,
 176         FWIPTRR6        = FWRO + 0x42cc,
 177         FWIPTRR7        = FWRO + 0x42d0,
 178         FWIPTRR8        = FWRO + 0x42e0,
 179         FWIPTRR9        = FWRO + 0x42f0,
 180         FWIPHLEC        = FWRO + 0x4300,
 181         FWIPAGUSPC      = FWRO + 0x4500,
 182         FWIPAGC         = FWRO + 0x4504,
 183         FWIPAGM0        = FWRO + 0x4510,
 184         FWIPAGM1        = FWRO + 0x4514,
 185         FWIPAGM2        = FWRO + 0x4518,
 186         FWIPAGM3        = FWRO + 0x451c,
 187         FWIPAGM4        = FWRO + 0x4520,
 188         FWMACHEC        = FWRO + 0x4620,
 189         FWMACHC         = FWRO + 0x4624,
 190         FWMACTL0        = FWRO + 0x4630,
 191         FWMACTL1        = FWRO + 0x4634,
 192         FWMACTL2        = FWRO + 0x4638,
 193         FWMACTL3        = FWRO + 0x463c,
 194         FWMACTL4        = FWRO + 0x4640,
 195         FWMACTL5        = FWRO + 0x4650,
 196         FWMACTLR        = FWRO + 0x4654,
 197         FWMACTIM        = FWRO + 0x4660,
 198         FWMACTEM        = FWRO + 0x4664,
 199         FWMACTS0        = FWRO + 0x4670,
 200         FWMACTS1        = FWRO + 0x4674,
 201         FWMACTSR0       = FWRO + 0x4678,
 202         FWMACTSR1       = FWRO + 0x467c,
 203         FWMACTSR2       = FWRO + 0x4680,
 204         FWMACTSR3       = FWRO + 0x4690,
 205         FWMACTR         = FWRO + 0x46a0,
 206         FWMACTRR0       = FWRO + 0x46a4,
 207         FWMACTRR1       = FWRO + 0x46a8,
 208         FWMACTRR2       = FWRO + 0x46ac,
 209         FWMACTRR3       = FWRO + 0x46b0,
 210         FWMACTRR4       = FWRO + 0x46b4,
 211         FWMACTRR5       = FWRO + 0x46c0,
 212         FWMACTRR6       = FWRO + 0x46d0,
 213         FWMACHLEC       = FWRO + 0x4700,
 214         FWMACAGUSPC     = FWRO + 0x4880,
 215         FWMACAGC        = FWRO + 0x4884,
 216         FWMACAGM0       = FWRO + 0x4888,
 217         FWMACAGM1       = FWRO + 0x488c,
 218         FWVLANTEC       = FWRO + 0x4900,
 219         FWVLANTL0       = FWRO + 0x4910,
 220         FWVLANTL1       = FWRO + 0x4914,
 221         FWVLANTL2       = FWRO + 0x4918,
 222         FWVLANTL3       = FWRO + 0x4920,
 223         FWVLANTL4       = FWRO + 0x4930,
 224         FWVLANTLR       = FWRO + 0x4934,
 225         FWVLANTIM       = FWRO + 0x4940,
 226         FWVLANTEM       = FWRO + 0x4944,
 227         FWVLANTS        = FWRO + 0x4950,
 228         FWVLANTSR0      = FWRO + 0x4954,
 229         FWVLANTSR1      = FWRO + 0x4958,
 230         FWVLANTSR2      = FWRO + 0x4960,
 231         FWVLANTSR3      = FWRO + 0x4970,
 232         FWPBFC0         = FWRO + 0x4a00,
 233         FWPBFCSDC00     = FWRO + 0x4a04,
 234         FWL23URL0       = FWRO + 0x4e00,
 235         FWL23URL1       = FWRO + 0x4e04,
 236         FWL23URL2       = FWRO + 0x4e08,
 237         FWL23URL3       = FWRO + 0x4e0c,
 238         FWL23URLR       = FWRO + 0x4e10,
 239         FWL23UTIM       = FWRO + 0x4e20,
 240         FWL23URR        = FWRO + 0x4e30,
 241         FWL23URRR0      = FWRO + 0x4e34,
 242         FWL23URRR1      = FWRO + 0x4e38,
 243         FWL23URRR2      = FWRO + 0x4e3c,
 244         FWL23URRR3      = FWRO + 0x4e40,
 245         FWL23URMC0      = FWRO + 0x4f00,
 246         FWPMFGC0        = FWRO + 0x5000,
 247         FWPGFC0         = FWRO + 0x5100,
 248         FWPGFIGSC0      = FWRO + 0x5104,
 249         FWPGFENC0       = FWRO + 0x5108,
 250         FWPGFENM0       = FWRO + 0x510c,
 251         FWPGFCSTC00     = FWRO + 0x5110,
 252         FWPGFCSTC10     = FWRO + 0x5114,
 253         FWPGFCSTM00     = FWRO + 0x5118,
 254         FWPGFCSTM10     = FWRO + 0x511c,
 255         FWPGFCTC0       = FWRO + 0x5120,
 256         FWPGFCTM0       = FWRO + 0x5124,
 257         FWPGFHCC0       = FWRO + 0x5128,
 258         FWPGFSM0        = FWRO + 0x512c,
 259         FWPGFGC0        = FWRO + 0x5130,
 260         FWPGFGL0        = FWRO + 0x5500,
 261         FWPGFGL1        = FWRO + 0x5504,
 262         FWPGFGLR        = FWRO + 0x5518,
 263         FWPGFGR         = FWRO + 0x5510,
 264         FWPGFGRR0       = FWRO + 0x5514,
 265         FWPGFGRR1       = FWRO + 0x5518,
 266         FWPGFRIM        = FWRO + 0x5520,
 267         FWPMTRFC0       = FWRO + 0x5600,
 268         FWPMTRCBSC0     = FWRO + 0x5604,
 269         FWPMTRC0RC0     = FWRO + 0x5608,
 270         FWPMTREBSC0     = FWRO + 0x560c,
 271         FWPMTREIRC0     = FWRO + 0x5610,
 272         FWPMTRFM0       = FWRO + 0x5614,
 273         FWFTL0          = FWRO + 0x6000,
 274         FWFTL1          = FWRO + 0x6004,
 275         FWFTLR          = FWRO + 0x6008,
 276         FWFTOC          = FWRO + 0x6010,
 277         FWFTOPC         = FWRO + 0x6014,
 278         FWFTIM          = FWRO + 0x6020,
 279         FWFTR           = FWRO + 0x6030,
 280         FWFTRR0         = FWRO + 0x6034,
 281         FWFTRR1         = FWRO + 0x6038,
 282         FWFTRR2         = FWRO + 0x603c,
 283         FWSEQNGC0       = FWRO + 0x6100,
 284         FWSEQNGM0       = FWRO + 0x6104,
 285         FWSEQNRC        = FWRO + 0x6200,
 286         FWCTFDCN0       = FWRO + 0x6300,
 287         FWLTHFDCN0      = FWRO + 0x6304,
 288         FWIPFDCN0       = FWRO + 0x6308,
 289         FWLTWFDCN0      = FWRO + 0x630c,
 290         FWPBFDCN0       = FWRO + 0x6310,
 291         FWMHLCN0        = FWRO + 0x6314,
 292         FWIHLCN0        = FWRO + 0x6318,
 293         FWICRDCN0       = FWRO + 0x6500,
 294         FWWMRDCN0       = FWRO + 0x6504,
 295         FWCTRDCN0       = FWRO + 0x6508,
 296         FWLTHRDCN0      = FWRO + 0x650c,
 297         FWIPRDCN0       = FWRO + 0x6510,
 298         FWLTWRDCN0      = FWRO + 0x6514,
 299         FWPBRDCN0       = FWRO + 0x6518,
 300         FWPMFDCN0       = FWRO + 0x6700,
 301         FWPGFDCN0       = FWRO + 0x6780,
 302         FWPMGDCN0       = FWRO + 0x6800,
 303         FWPMYDCN0       = FWRO + 0x6804,
 304         FWPMRDCN0       = FWRO + 0x6808,
 305         FWFRPPCN0       = FWRO + 0x6a00,
 306         FWFRDPCN0       = FWRO + 0x6a04,
 307         FWEIS00         = FWRO + 0x7900,
 308         FWEIE00         = FWRO + 0x7904,
 309         FWEID00         = FWRO + 0x7908,
 310         FWEIS1          = FWRO + 0x7a00,
 311         FWEIE1          = FWRO + 0x7a04,
 312         FWEID1          = FWRO + 0x7a08,
 313         FWEIS2          = FWRO + 0x7a10,
 314         FWEIE2          = FWRO + 0x7a14,
 315         FWEID2          = FWRO + 0x7a18,
 316         FWEIS3          = FWRO + 0x7a20,
 317         FWEIE3          = FWRO + 0x7a24,
 318         FWEID3          = FWRO + 0x7a28,
 319         FWEIS4          = FWRO + 0x7a30,
 320         FWEIE4          = FWRO + 0x7a34,
 321         FWEID4          = FWRO + 0x7a38,
 322         FWEIS5          = FWRO + 0x7a40,
 323         FWEIE5          = FWRO + 0x7a44,
 324         FWEID5          = FWRO + 0x7a48,
 325         FWEIS60         = FWRO + 0x7a50,
 326         FWEIE60         = FWRO + 0x7a54,
 327         FWEID60         = FWRO + 0x7a58,
 328         FWEIS61         = FWRO + 0x7a60,
 329         FWEIE61         = FWRO + 0x7a64,
 330         FWEID61         = FWRO + 0x7a68,
 331         FWEIS62         = FWRO + 0x7a70,
 332         FWEIE62         = FWRO + 0x7a74,
 333         FWEID62         = FWRO + 0x7a78,
 334         FWEIS63         = FWRO + 0x7a80,
 335         FWEIE63         = FWRO + 0x7a84,
 336         FWEID63         = FWRO + 0x7a88,
 337         FWEIS70         = FWRO + 0x7a90,
 338         FWEIE70         = FWRO + 0x7A94,
 339         FWEID70         = FWRO + 0x7a98,
 340         FWEIS71         = FWRO + 0x7aa0,
 341         FWEIE71         = FWRO + 0x7aa4,
 342         FWEID71         = FWRO + 0x7aa8,
 343         FWEIS72         = FWRO + 0x7ab0,
 344         FWEIE72         = FWRO + 0x7ab4,
 345         FWEID72         = FWRO + 0x7ab8,
 346         FWEIS73         = FWRO + 0x7ac0,
 347         FWEIE73         = FWRO + 0x7ac4,
 348         FWEID73         = FWRO + 0x7ac8,
 349         FWEIS80         = FWRO + 0x7ad0,
 350         FWEIE80         = FWRO + 0x7ad4,
 351         FWEID80         = FWRO + 0x7ad8,
 352         FWEIS81         = FWRO + 0x7ae0,
 353         FWEIE81         = FWRO + 0x7ae4,
 354         FWEID81         = FWRO + 0x7ae8,
 355         FWEIS82         = FWRO + 0x7af0,
 356         FWEIE82         = FWRO + 0x7af4,
 357         FWEID82         = FWRO + 0x7af8,
 358         FWEIS83         = FWRO + 0x7b00,
 359         FWEIE83         = FWRO + 0x7b04,
 360         FWEID83         = FWRO + 0x7b08,
 361         FWMIS0          = FWRO + 0x7c00,
 362         FWMIE0          = FWRO + 0x7c04,
 363         FWMID0          = FWRO + 0x7c08,
 364         FWSCR0          = FWRO + 0x7d00,
 365         FWSCR1          = FWRO + 0x7d04,
 366         FWSCR2          = FWRO + 0x7d08,
 367         FWSCR3          = FWRO + 0x7d0c,
 368         FWSCR4          = FWRO + 0x7d10,
 369         FWSCR5          = FWRO + 0x7d14,
 370         FWSCR6          = FWRO + 0x7d18,
 371         FWSCR7          = FWRO + 0x7d1c,
 372         FWSCR8          = FWRO + 0x7d20,
 373         FWSCR9          = FWRO + 0x7d24,
 374         FWSCR10         = FWRO + 0x7d28,
 375         FWSCR11         = FWRO + 0x7d2c,
 376         FWSCR12         = FWRO + 0x7d30,
 377         FWSCR13         = FWRO + 0x7d34,
 378         FWSCR14         = FWRO + 0x7d38,
 379         FWSCR15         = FWRO + 0x7d3c,
 380         FWSCR16         = FWRO + 0x7d40,
 381         FWSCR17         = FWRO + 0x7d44,
 382         FWSCR18         = FWRO + 0x7d48,
 383         FWSCR19         = FWRO + 0x7d4c,
 384         FWSCR20         = FWRO + 0x7d50,
 385         FWSCR21         = FWRO + 0x7d54,
 386         FWSCR22         = FWRO + 0x7d58,
 387         FWSCR23         = FWRO + 0x7d5c,
 388         FWSCR24         = FWRO + 0x7d60,
 389         FWSCR25         = FWRO + 0x7d64,
 390         FWSCR26         = FWRO + 0x7d68,
 391         FWSCR27         = FWRO + 0x7d6c,
 392         FWSCR28         = FWRO + 0x7d70,
 393         FWSCR29         = FWRO + 0x7d74,
 394         FWSCR30         = FWRO + 0x7d78,
 395         FWSCR31         = FWRO + 0x7d7c,
 396         FWSCR32         = FWRO + 0x7d80,
 397         FWSCR33         = FWRO + 0x7d84,
 398         FWSCR34         = FWRO + 0x7d88,
 399         FWSCR35         = FWRO + 0x7d8c,
 400         FWSCR36         = FWRO + 0x7d90,
 401         FWSCR37         = FWRO + 0x7d94,
 402         FWSCR38         = FWRO + 0x7d98,
 403         FWSCR39         = FWRO + 0x7d9c,
 404         FWSCR40         = FWRO + 0x7da0,
 405         FWSCR41         = FWRO + 0x7da4,
 406         FWSCR42         = FWRO + 0x7da8,
 407         FWSCR43         = FWRO + 0x7dac,
 408         FWSCR44         = FWRO + 0x7db0,
 409         FWSCR45         = FWRO + 0x7db4,
 410         FWSCR46         = FWRO + 0x7db8,
 411
 412         TPEMIMC0        = TPRO + 0x0000,
 413         TPEMIMC1        = TPRO + 0x0004,
 414         TPEMIMC2        = TPRO + 0x0008,
 415         TPEMIMC3        = TPRO + 0x000c,
 416         TPEMIMC4        = TPRO + 0x0010,
 417         TPEMIMC5        = TPRO + 0x0014,
 418         TPEMIMC60       = TPRO + 0x0080,
 419         TPEMIMC70       = TPRO + 0x0100,
 420         TSIM            = TPRO + 0x0700,
 421         TFIM            = TPRO + 0x0704,
 422         TCIM            = TPRO + 0x0708,
 423         TGIM0           = TPRO + 0x0710,
 424         TGIM1           = TPRO + 0x0714,
 425         TEIM0           = TPRO + 0x0720,
 426         TEIM1           = TPRO + 0x0724,
 427         TEIM2           = TPRO + 0x0728,
 428
 429         RIPV            = CARO + 0x0000,
 430         RRC             = CARO + 0x0004,
 431         RCEC            = CARO + 0x0008,
 432         RCDC            = CARO + 0x000c,
 433         RSSIS           = CARO + 0x0010,
 434         RSSIE           = CARO + 0x0014,
 435         RSSID           = CARO + 0x0018,
 436         CABPIBWMC       = CARO + 0x0020,
 437         CABPWMLC        = CARO + 0x0040,
 438         CABPPFLC0       = CARO + 0x0050,
 439         CABPPWMLC0      = CARO + 0x0060,
 440         CABPPPFLC00     = CARO + 0x00a0,
 441         CABPULC         = CARO + 0x0100,
 442         CABPIRM         = CARO + 0x0140,
 443         CABPPCM         = CARO + 0x0144,
 444         CABPLCM         = CARO + 0x0148,
 445         CABPCPM         = CARO + 0x0180,
 446         CABPMCPM        = CARO + 0x0200,
 447         CARDNM          = CARO + 0x0280,
 448         CARDMNM         = CARO + 0x0284,
 449         CARDCN          = CARO + 0x0290,
 450         CAEIS0          = CARO + 0x0300,
 451         CAEIE0          = CARO + 0x0304,
 452         CAEID0          = CARO + 0x0308,
 453         CAEIS1          = CARO + 0x0310,
 454         CAEIE1          = CARO + 0x0314,
 455         CAEID1          = CARO + 0x0318,
 456         CAMIS0          = CARO + 0x0340,
 457         CAMIE0          = CARO + 0x0344,
 458         CAMID0          = CARO + 0x0348,
 459         CAMIS1          = CARO + 0x0350,
 460         CAMIE1          = CARO + 0x0354,
 461         CAMID1          = CARO + 0x0358,
 462         CASCR           = CARO + 0x0380,
 463
 464         EAMC            = TARO + 0x0000,
 465         EAMS            = TARO + 0x0004,
 466         EAIRC           = TARO + 0x0010,
 467         EATDQSC         = TARO + 0x0014,
 468         EATDQC          = TARO + 0x0018,
 469         EATDQAC         = TARO + 0x001c,
 470         EATPEC          = TARO + 0x0020,
 471         EATMFSC0        = TARO + 0x0040,
 472         EATDQDC0        = TARO + 0x0060,
 473         EATDQM0         = TARO + 0x0080,
 474         EATDQMLM0       = TARO + 0x00a0,
 475         EACTQC          = TARO + 0x0100,
 476         EACTDQDC        = TARO + 0x0104,
 477         EACTDQM         = TARO + 0x0108,
 478         EACTDQMLM       = TARO + 0x010c,
 479         EAVCC           = TARO + 0x0130,
 480         EAVTC           = TARO + 0x0134,
 481         EATTFC          = TARO + 0x0138,
 482         EACAEC          = TARO + 0x0200,
 483         EACC            = TARO + 0x0204,
 484         EACAIVC0        = TARO + 0x0220,
 485         EACAULC0        = TARO + 0x0240,
 486         EACOEM          = TARO + 0x0260,
 487         EACOIVM0        = TARO + 0x0280,
 488         EACOULM0        = TARO + 0x02a0,
 489         EACGSM          = TARO + 0x02c0,
 490         EATASC          = TARO + 0x0300,
 491         EATASENC0       = TARO + 0x0320,
 492         EATASCTENC      = TARO + 0x0340,
 493         EATASENM0       = TARO + 0x0360,
 494         EATASCTENM      = TARO + 0x0380,
 495         EATASCSTC0      = TARO + 0x03a0,
 496         EATASCSTC1      = TARO + 0x03a4,
 497         EATASCSTM0      = TARO + 0x03a8,
 498         EATASCSTM1      = TARO + 0x03ac,
 499         EATASCTC        = TARO + 0x03b0,
 500         EATASCTM        = TARO + 0x03b4,
 501         EATASGL0        = TARO + 0x03c0,
 502         EATASGL1        = TARO + 0x03c4,
 503         EATASGLR        = TARO + 0x03c8,
 504         EATASGR         = TARO + 0x03d0,
 505         EATASGRR        = TARO + 0x03d4,
 506         EATASHCC        = TARO + 0x03e0,
 507         EATASRIRM       = TARO + 0x03e4,
 508         EATASSM         = TARO + 0x03e8,
 509         EAUSMFSECN      = TARO + 0x0400,
 510         EATFECN         = TARO + 0x0404,
 511         EAFSECN         = TARO + 0x0408,
 512         EADQOECN        = TARO + 0x040c,
 513         EADQSECN        = TARO + 0x0410,
 514         EACKSECN        = TARO + 0x0414,
 515         EAEIS0          = TARO + 0x0500,
 516         EAEIE0          = TARO + 0x0504,
 517         EAEID0          = TARO + 0x0508,
 518         EAEIS1          = TARO + 0x0510,
 519         EAEIE1          = TARO + 0x0514,
 520         EAEID1          = TARO + 0x0518,
 521         EAEIS2          = TARO + 0x0520,
 522         EAEIE2          = TARO + 0x0524,
 523         EAEID2          = TARO + 0x0528,
 524         EASCR           = TARO + 0x0580,
 525
 526         MPSM            = RMRO + 0x0000,
 527         MPIC            = RMRO + 0x0004,
 528         MPIM            = RMRO + 0x0008,
 529         MIOC            = RMRO + 0x0010,
 530         MIOM            = RMRO + 0x0014,
 531         MXMS            = RMRO + 0x0018,
 532         MTFFC           = RMRO + 0x0020,
 533         MTPFC           = RMRO + 0x0024,
 534         MTPFC2          = RMRO + 0x0028,
 535         MTPFC30         = RMRO + 0x0030,
 536         MTATC0          = RMRO + 0x0050,
 537         MTIM            = RMRO + 0x0060,
 538         MRGC            = RMRO + 0x0080,
 539         MRMAC0          = RMRO + 0x0084,
 540         MRMAC1          = RMRO + 0x0088,
 541         MRAFC           = RMRO + 0x008c,
 542         MRSCE           = RMRO + 0x0090,
 543         MRSCP           = RMRO + 0x0094,
 544         MRSCC           = RMRO + 0x0098,
 545         MRFSCE          = RMRO + 0x009c,
 546         MRFSCP          = RMRO + 0x00a0,
 547         MTRC            = RMRO + 0x00a4,
 548         MRIM            = RMRO + 0x00a8,
 549         MRPFM           = RMRO + 0x00ac,
 550         MPFC0           = RMRO + 0x0100,
 551         MLVC            = RMRO + 0x0180,
 552         MEEEC           = RMRO + 0x0184,
 553         MLBC            = RMRO + 0x0188,
 554         MXGMIIC         = RMRO + 0x0190,
 555         MPCH            = RMRO + 0x0194,
 556         MANC            = RMRO + 0x0198,
 557         MANM            = RMRO + 0x019c,
 558         MPLCA1          = RMRO + 0x01a0,
 559         MPLCA2          = RMRO + 0x01a4,
 560         MPLCA3          = RMRO + 0x01a8,
 561         MPLCA4          = RMRO + 0x01ac,
 562         MPLCAM          = RMRO + 0x01b0,
 563         MHDC1           = RMRO + 0x01c0,
 564         MHDC2           = RMRO + 0x01c4,
 565         MEIS            = RMRO + 0x0200,
 566         MEIE            = RMRO + 0x0204,
 567         MEID            = RMRO + 0x0208,
 568         MMIS0           = RMRO + 0x0210,
 569         MMIE0           = RMRO + 0x0214,
 570         MMID0           = RMRO + 0x0218,
 571         MMIS1           = RMRO + 0x0220,
 572         MMIE1           = RMRO + 0x0224,
 573         MMID1           = RMRO + 0x0228,
 574         MMIS2           = RMRO + 0x0230,
 575         MMIE2           = RMRO + 0x0234,
 576         MMID2           = RMRO + 0x0238,
 577         MMPFTCT         = RMRO + 0x0300,
 578         MAPFTCT         = RMRO + 0x0304,
 579         MPFRCT          = RMRO + 0x0308,
 580         MFCICT          = RMRO + 0x030c,
 581         MEEECT          = RMRO + 0x0310,
 582         MMPCFTCT0       = RMRO + 0x0320,
 583         MAPCFTCT0       = RMRO + 0x0330,
 584         MPCFRCT0        = RMRO + 0x0340,
 585         MHDCC           = RMRO + 0x0350,
 586         MROVFC          = RMRO + 0x0354,
 587         MRHCRCEC        = RMRO + 0x0358,
 588         MRXBCE          = RMRO + 0x0400,
 589         MRXBCP          = RMRO + 0x0404,
 590         MRGFCE          = RMRO + 0x0408,
 591         MRGFCP          = RMRO + 0x040c,
 592         MRBFC           = RMRO + 0x0410,
 593         MRMFC           = RMRO + 0x0414,
 594         MRUFC           = RMRO + 0x0418,
 595         MRPEFC          = RMRO + 0x041c,
 596         MRNEFC          = RMRO + 0x0420,
 597         MRFMEFC         = RMRO + 0x0424,
 598         MRFFMEFC        = RMRO + 0x0428,
 599         MRCFCEFC        = RMRO + 0x042c,
 600         MRFCEFC         = RMRO + 0x0430,
 601         MRRCFEFC        = RMRO + 0x0434,
 602         MRUEFC          = RMRO + 0x043c,
 603         MROEFC          = RMRO + 0x0440,
 604         MRBOEC          = RMRO + 0x0444,
 605         MTXBCE          = RMRO + 0x0500,
 606         MTXBCP          = RMRO + 0x0504,
 607         MTGFCE          = RMRO + 0x0508,
 608         MTGFCP          = RMRO + 0x050c,
 609         MTBFC           = RMRO + 0x0510,
 610         MTMFC           = RMRO + 0x0514,
 611         MTUFC           = RMRO + 0x0518,
 612         MTEFC           = RMRO + 0x051c,
 613
 614         GWMC            = GWRO + 0x0000,
 615         GWMS            = GWRO + 0x0004,
 616         GWIRC           = GWRO + 0x0010,
 617         GWRDQSC         = GWRO + 0x0014,
 618         GWRDQC          = GWRO + 0x0018,
 619         GWRDQAC         = GWRO + 0x001c,
 620         GWRGC           = GWRO + 0x0020,
 621         GWRMFSC0        = GWRO + 0x0040,
 622         GWRDQDC0        = GWRO + 0x0060,
 623         GWRDQM0         = GWRO + 0x0080,
 624         GWRDQMLM0       = GWRO + 0x00a0,
 625         GWMTIRM         = GWRO + 0x0100,
 626         GWMSTLS         = GWRO + 0x0104,
 627         GWMSTLR         = GWRO + 0x0108,
 628         GWMSTSS         = GWRO + 0x010c,
 629         GWMSTSR         = GWRO + 0x0110,
 630         GWMAC0          = GWRO + 0x0120,
 631         GWMAC1          = GWRO + 0x0124,
 632         GWVCC           = GWRO + 0x0130,
 633         GWVTC           = GWRO + 0x0134,
 634         GWTTFC          = GWRO + 0x0138,
 635         GWTDCAC00       = GWRO + 0x0140,
 636         GWTDCAC10       = GWRO + 0x0144,
 637         GWTSDCC0        = GWRO + 0x0160,
 638         GWTNM           = GWRO + 0x0180,
 639         GWTMNM          = GWRO + 0x0184,
 640         GWAC            = GWRO + 0x0190,
 641         GWDCBAC0        = GWRO + 0x0194,
 642         GWDCBAC1        = GWRO + 0x0198,
 643         GWIICBSC        = GWRO + 0x019c,
 644         GWMDNC          = GWRO + 0x01a0,
 645         GWTRC0          = GWRO + 0x0200,
 646         GWTPC0          = GWRO + 0x0300,
 647         GWARIRM         = GWRO + 0x0380,
 648         GWDCC0          = GWRO + 0x0400,
 649         GWAARSS         = GWRO + 0x0800,
 650         GWAARSR0        = GWRO + 0x0804,
 651         GWAARSR1        = GWRO + 0x0808,
 652         GWIDAUAS0       = GWRO + 0x0840,
 653         GWIDASM0        = GWRO + 0x0880,
 654         GWIDASAM00      = GWRO + 0x0900,
 655         GWIDASAM10      = GWRO + 0x0904,
 656         GWIDACAM00      = GWRO + 0x0980,
 657         GWIDACAM10      = GWRO + 0x0984,
 658         GWGRLC          = GWRO + 0x0a00,
 659         GWGRLULC        = GWRO + 0x0a04,
 660         GWRLIVC0        = GWRO + 0x0a80,
 661         GWRLULC0        = GWRO + 0x0a84,
 662         GWIDPC          = GWRO + 0x0b00,
 663         GWIDC0          = GWRO + 0x0c00,
 664         GWDIS0          = GWRO + 0x1100,
 665         GWDIE0          = GWRO + 0x1104,
 666         GWDID0          = GWRO + 0x1108,
 667         GWTSDIS         = GWRO + 0x1180,
 668         GWTSDIE         = GWRO + 0x1184,
 669         GWTSDID         = GWRO + 0x1188,
 670         GWEIS0          = GWRO + 0x1190,
 671         GWEIE0          = GWRO + 0x1194,
 672         GWEID0          = GWRO + 0x1198,
 673         GWEIS1          = GWRO + 0x11a0,
 674         GWEIE1          = GWRO + 0x11a4,
 675         GWEID1          = GWRO + 0x11a8,
 676         GWEIS20         = GWRO + 0x1200,
 677         GWEIE20         = GWRO + 0x1204,
 678         GWEID20         = GWRO + 0x1208,
 679         GWEIS3          = GWRO + 0x1280,
 680         GWEIE3          = GWRO + 0x1284,
 681         GWEID3          = GWRO + 0x1288,
 682         GWEIS4          = GWRO + 0x1290,
 683         GWEIE4          = GWRO + 0x1294,
 684         GWEID4          = GWRO + 0x1298,
 685         GWEIS5          = GWRO + 0x12a0,
 686         GWEIE5          = GWRO + 0x12a4,
 687         GWEID5          = GWRO + 0x12a8,
 688         GWSCR0          = GWRO + 0x1800,
 689         GWSCR1          = GWRO + 0x1900,
 690 };
 691
 692 /* ETHA/RMAC */
 693 enum rswitch_etha_mode {
 694         EAMC_OPC_RESET,
 695         EAMC_OPC_DISABLE,
 696         EAMC_OPC_CONFIG,
 697         EAMC_OPC_OPERATION,
 698 };
 699
 700 #define EAMS_OPS_MASK           EAMC_OPC_OPERATION
 701
 702 #define EAVCC_VEM_SC_TAG        (0x3 << 16)
 703
 704 #define MPIC_PIS_MII            0x00
 705 #define MPIC_PIS_GMII           0x02
 706 #define MPIC_PIS_XGMII          0x04
 707 #define MPIC_LSC_SHIFT          3
 708 #define MPIC_LSC_100M           (1 << MPIC_LSC_SHIFT)
 709 #define MPIC_LSC_1G             (2 << MPIC_LSC_SHIFT)
 710 #define MPIC_LSC_2_5G           (3 << MPIC_LSC_SHIFT)
 711
 712 #define MDIO_READ_C45           0x03
 713 #define MDIO_WRITE_C45          0x01
 714
 715 #define MPSM_PSME               BIT(0)
 716 #define MPSM_MFF_C45            BIT(2)
 717 #define MPSM_PRD_SHIFT          16
 718 #define MPSM_PRD_MASK           GENMASK(31, MPSM_PRD_SHIFT)
 719
 720 /* Completion flags */
 721 #define MMIS1_PAACS             BIT(2) /* Address */
 722 #define MMIS1_PWACS             BIT(1) /* Write */
 723 #define MMIS1_PRACS             BIT(0) /* Read */
 724 #define MMIS1_CLEAR_FLAGS       0xf
 725
 726 #define MPIC_PSMCS_SHIFT        16
 727 #define MPIC_PSMCS_MASK         GENMASK(22, MPIC_PSMCS_SHIFT)
 728 #define MPIC_PSMCS(val)         ((val) << MPIC_PSMCS_SHIFT)
 729
 730 #define MPIC_PSMHT_SHIFT        24
 731 #define MPIC_PSMHT_MASK         GENMASK(26, MPIC_PSMHT_SHIFT)
 732 #define MPIC_PSMHT(val)         ((val) << MPIC_PSMHT_SHIFT)
 733
 734 #define MLVC_PLV                BIT(16)
 735
 736 /* GWCA */
 737 enum rswitch_gwca_mode {
 738         GWMC_OPC_RESET,
 739         GWMC_OPC_DISABLE,
 740         GWMC_OPC_CONFIG,
 741         GWMC_OPC_OPERATION,
 742 };
 743
 744 #define GWMS_OPS_MASK           GWMC_OPC_OPERATION
 745
 746 #define GWMTIRM_MTIOG           BIT(0)
 747 #define GWMTIRM_MTR             BIT(1)
 748
 749 #define GWVCC_VEM_SC_TAG        (0x3 << 16)
 750
 751 #define GWARIRM_ARIOG           BIT(0)
 752 #define GWARIRM_ARR             BIT(1)
 753
 754 #define GWDCC_BALR              BIT(24)
 755 #define GWDCC_DQT               BIT(11)
 756 #define GWDCC_ETS               BIT(9)
 757 #define GWDCC_EDE               BIT(8)
 758
 759 #define GWTRC(queue)            (GWTRC0 + (queue) / 32 * 4)
 760 #define GWDCC_OFFS(queue)       (GWDCC0 + (queue) * 4)
 761
 762 #define GWDIS(i)                (GWDIS0 + (i) * 0x10)
 763 #define GWDIE(i)                (GWDIE0 + (i) * 0x10)
 764 #define GWDID(i)                (GWDID0 + (i) * 0x10)
 765
 766 /* COMA */
 767 #define RRC_RR                  BIT(0)
 768 #define RRC_RR_CLR              0
 769 #define RCEC_ACE_DEFAULT        (BIT(0) | BIT(AGENT_INDEX_GWCA))
 770 #define RCEC_RCE                BIT(16)
 771 #define RCDC_RCD                BIT(16)
 772
 773 #define CABPIRM_BPIOG           BIT(0)
 774 #define CABPIRM_BPR             BIT(1)
 775
 776 /* MFWD */
 777 #define FWPC0_LTHTA             BIT(0)
 778 #define FWPC0_IP4UE             BIT(3)
 779 #define FWPC0_IP4TE             BIT(4)
 780 #define FWPC0_IP4OE             BIT(5)
 781 #define FWPC0_L2SE              BIT(9)
 782 #define FWPC0_IP4EA             BIT(10)
 783 #define FWPC0_IPDSA             BIT(12)
 784 #define FWPC0_IPHLA             BIT(18)
 785 #define FWPC0_MACSDA            BIT(20)
 786 #define FWPC0_MACHLA            BIT(26)
 787 #define FWPC0_MACHMA            BIT(27)
 788 #define FWPC0_VLANSA            BIT(28)
 789
 790 #define FWPC0(i)                (FWPC00 + (i) * 0x10)
 791 #define FWPC0_DEFAULT           (FWPC0_LTHTA | FWPC0_IP4UE | FWPC0_IP4TE | \
 792                                  FWPC0_IP4OE | FWPC0_L2SE | FWPC0_IP4EA | \
 793                                  FWPC0_IPDSA | FWPC0_IPHLA | FWPC0_MACSDA | \
 794                                  FWPC0_MACHLA | FWPC0_MACHMA | FWPC0_VLANSA)
 795 #define FWPC1(i)                (FWPC10 + (i) * 0x10)
 796 #define FWPC1_DDE               BIT(0)
 797
 798 #define FWPBFC(i)               (FWPBFC0 + (i) * 0x10)
 799
 800 #define FWPBFCSDC(j, i)         (FWPBFCSDC00 + (i) * 0x10 + (j) * 0x04)
 801
 802 /* TOP */
 803 #define TPEMIMC7(queue)         (TPEMIMC70 + (queue) * 4)
 804
 805 /* Descriptors */
 806 enum RX_DS_CC_BIT {
 807         RX_DS   = 0x0fff, /* Data size */
 808         RX_TR   = 0x1000, /* Truncation indication */
 809         RX_EI   = 0x2000, /* Error indication */
 810         RX_PS   = 0xc000, /* Padding selection */
 811 };
 812
 813 enum TX_DS_TAGL_BIT {
 814         TX_DS   = 0x0fff, /* Data size */
 815         TX_TAGL = 0xf000, /* Frame tag LSBs */
 816 };
 817
 818 enum DIE_DT {
 819         /* Frame data */
 820         DT_FSINGLE      = 0x80,
 821         DT_FSTART       = 0x90,
 822         DT_FMID         = 0xa0,
 823         DT_FEND         = 0xb8,
 824
 825         /* Chain control */
 826         DT_LEMPTY       = 0xc0,
 827         DT_EEMPTY       = 0xd0,
 828         DT_LINKFIX      = 0x00,
 829         DT_LINK         = 0xe0,
 830         DT_EOS          = 0xf0,
 831         /* HW/SW arbitration */
 832         DT_FEMPTY       = 0x40,
 833         DT_FEMPTY_IS    = 0x10,
 834         DT_FEMPTY_IC    = 0x20,
 835         DT_FEMPTY_ND    = 0x38,
 836         DT_FEMPTY_START = 0x50,
 837         DT_FEMPTY_MID   = 0x60,
 838         DT_FEMPTY_END   = 0x70,
 839
 840         DT_MASK         = 0xf0,
 841         DIE             = 0x08, /* Descriptor Interrupt Enable */
 842 };
 843
 844 /* Both transmission and reception */
 845 #define INFO1_FMT               BIT(2)
 846 #define INFO1_TXC               BIT(3)
 847
 848 /* For transmission */
 849 #define INFO1_TSUN(val)         ((u64)(val) << 8ULL)
 850 #define INFO1_CSD0(index)       ((u64)(index) << 32ULL)
 851 #define INFO1_CSD1(index)       ((u64)(index) << 40ULL)
 852 #define INFO1_DV(port_vector)   ((u64)(port_vector) << 48ULL)
 853
 854 /* For reception */
 855 #define INFO1_SPN(port)         ((u64)(port) << 36ULL)
 856
 857 struct rswitch_desc {
 858         __le16 info_ds; /* Descriptor size */
 859         u8 die_dt;      /* Descriptor interrupt enable and type */
 860         __u8  dptrh;    /* Descriptor pointer MSB */
 861         __le32 dptrl;   /* Descriptor pointer LSW */
 862 } __packed;
 863
 864 struct rswitch_ts_desc {
 865         struct rswitch_desc desc;
 866         __le32 ts_nsec;
 867         __le32 ts_sec;
 868 } __packed;
 869
 870 struct rswitch_ext_desc {
 871         struct rswitch_desc desc;
 872         __le64 info1;
 873 } __packed;
 874
 875 struct rswitch_ext_ts_desc {
 876         struct rswitch_desc desc;
 877         __le64 info1;
 878         __le32 ts_nsec;
 879         __le32 ts_sec;
 880 } __packed;
 881
 882 struct rswitch_etha {
 883         int index;
 884         void __iomem *addr;
 885         void __iomem *coma_addr;
 886         bool external_phy;
 887         struct mii_bus *mii;
 888         phy_interface_t phy_interface;
 889         u8 mac_addr[MAX_ADDR_LEN];
 890         int link;
 891         int speed;
 892
 893         /* This hardware could not be initialized twice so that marked
 894          * this flag to avoid multiple initialization.
 895          */
 896         bool operated;
 897 };
 898
 899 /* The datasheet said descriptor "chain" and/or "queue". For consistency of
 900  * name, this driver calls "queue".
 901  */
 902 struct rswitch_gwca_queue {
 903         int index;
 904         bool dir_tx;
 905         bool gptp;
 906         union {
 907                 struct rswitch_ext_desc *ring;
 908                 struct rswitch_ext_ts_desc *ts_ring;
 909         };
 910         dma_addr_t ring_dma;
 911         int ring_size;
 912         int cur;
 913         int dirty;
 914         struct sk_buff **skbs;
 915
 916         struct net_device *ndev;        /* queue to ndev for irq */
 917 };
 918
 919 #define RSWITCH_NUM_IRQ_REGS    (RSWITCH_MAX_NUM_QUEUES / BITS_PER_TYPE(u32))
 920 struct rswitch_gwca {
 921         int index;
 922         struct rswitch_gwca_queue *queues;
 923         int num_queues;
 924         DECLARE_BITMAP(used, RSWITCH_MAX_NUM_QUEUES);
 925         u32 tx_irq_bits[RSWITCH_NUM_IRQ_REGS];
 926         u32 rx_irq_bits[RSWITCH_NUM_IRQ_REGS];
 927         int speed;
 928 };
 929
 930 #define NUM_QUEUES_PER_NDEV     2
 931 struct rswitch_device {
 932         struct rswitch_private *priv;
 933         struct net_device *ndev;
 934         struct napi_struct napi;
 935         struct phylink *phylink;
 936         struct phylink_config phylink_config;
 937         void __iomem *addr;
 938         struct rswitch_gwca_queue *tx_queue;
 939         struct rswitch_gwca_queue *rx_queue;
 940         u8 ts_tag;
 941
 942         int port;
 943         struct rswitch_etha *etha;
 944 };
 945
 946 struct rswitch_mfwd_mac_table_entry {
 947         int queue_index;
 948         unsigned char addr[MAX_ADDR_LEN];
 949 };
 950
 951 struct rswitch_mfwd {
 952         struct rswitch_mac_table_entry *mac_table_entries;
 953         int num_mac_table_entries;
 954 };
 955
 956 struct rswitch_private {
 957         struct platform_device *pdev;
 958         void __iomem *addr;
 959         struct rcar_gen4_ptp_private *ptp_priv;
 960         struct rswitch_desc *linkfix_table;
 961         dma_addr_t linkfix_table_dma;
 962         u32 linkfix_table_size;
 963
 964         struct rswitch_device *rdev[RSWITCH_NUM_PORTS];
 965
 966         struct rswitch_gwca gwca;
 967         struct rswitch_etha etha[RSWITCH_NUM_PORTS];
 968         struct rswitch_mfwd mfwd;
 969
 970         bool gwca_halt;
 971 };
 972
 973 #endif  /* #ifndef __RSWITCH_H__ */