2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 struct crb_addr_pair {
16 #define QLCNIC_MAX_CRB_XFORM 60
17 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
19 #define crb_addr_transform(name) \
20 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
21 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
23 #define QLCNIC_ADDR_ERROR (0xffffffff)
26 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
28 static void crb_addr_transform_setup(void)
30 crb_addr_transform(XDMA);
31 crb_addr_transform(TIMR);
32 crb_addr_transform(SRE);
33 crb_addr_transform(SQN3);
34 crb_addr_transform(SQN2);
35 crb_addr_transform(SQN1);
36 crb_addr_transform(SQN0);
37 crb_addr_transform(SQS3);
38 crb_addr_transform(SQS2);
39 crb_addr_transform(SQS1);
40 crb_addr_transform(SQS0);
41 crb_addr_transform(RPMX7);
42 crb_addr_transform(RPMX6);
43 crb_addr_transform(RPMX5);
44 crb_addr_transform(RPMX4);
45 crb_addr_transform(RPMX3);
46 crb_addr_transform(RPMX2);
47 crb_addr_transform(RPMX1);
48 crb_addr_transform(RPMX0);
49 crb_addr_transform(ROMUSB);
50 crb_addr_transform(SN);
51 crb_addr_transform(QMN);
52 crb_addr_transform(QMS);
53 crb_addr_transform(PGNI);
54 crb_addr_transform(PGND);
55 crb_addr_transform(PGN3);
56 crb_addr_transform(PGN2);
57 crb_addr_transform(PGN1);
58 crb_addr_transform(PGN0);
59 crb_addr_transform(PGSI);
60 crb_addr_transform(PGSD);
61 crb_addr_transform(PGS3);
62 crb_addr_transform(PGS2);
63 crb_addr_transform(PGS1);
64 crb_addr_transform(PGS0);
65 crb_addr_transform(PS);
66 crb_addr_transform(PH);
67 crb_addr_transform(NIU);
68 crb_addr_transform(I2Q);
69 crb_addr_transform(EG);
70 crb_addr_transform(MN);
71 crb_addr_transform(MS);
72 crb_addr_transform(CAS2);
73 crb_addr_transform(CAS1);
74 crb_addr_transform(CAS0);
75 crb_addr_transform(CAM);
76 crb_addr_transform(C2C1);
77 crb_addr_transform(C2C0);
78 crb_addr_transform(SMB);
79 crb_addr_transform(OCM0);
80 crb_addr_transform(I2C0);
83 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
85 struct qlcnic_recv_context *recv_ctx;
86 struct qlcnic_host_rds_ring *rds_ring;
87 struct qlcnic_rx_buffer *rx_buf;
90 recv_ctx = adapter->recv_ctx;
91 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
92 rds_ring = &recv_ctx->rds_rings[ring];
93 for (i = 0; i < rds_ring->num_desc; ++i) {
94 rx_buf = &(rds_ring->rx_buf_arr[i]);
95 if (rx_buf->skb == NULL)
98 pci_unmap_single(adapter->pdev,
103 dev_kfree_skb_any(rx_buf->skb);
108 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
110 struct qlcnic_recv_context *recv_ctx;
111 struct qlcnic_host_rds_ring *rds_ring;
112 struct qlcnic_rx_buffer *rx_buf;
115 recv_ctx = adapter->recv_ctx;
116 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
117 rds_ring = &recv_ctx->rds_rings[ring];
119 INIT_LIST_HEAD(&rds_ring->free_list);
121 rx_buf = rds_ring->rx_buf_arr;
122 for (i = 0; i < rds_ring->num_desc; i++) {
123 list_add_tail(&rx_buf->list,
124 &rds_ring->free_list);
130 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
131 struct qlcnic_host_tx_ring *tx_ring)
133 struct qlcnic_cmd_buffer *cmd_buf;
134 struct qlcnic_skb_frag *buffrag;
137 spin_lock(&tx_ring->tx_clean_lock);
139 cmd_buf = tx_ring->cmd_buf_arr;
140 for (i = 0; i < tx_ring->num_desc; i++) {
141 buffrag = cmd_buf->frag_array;
143 pci_unmap_single(adapter->pdev, buffrag->dma,
144 buffrag->length, PCI_DMA_TODEVICE);
147 for (j = 1; j < cmd_buf->frag_count; j++) {
150 pci_unmap_page(adapter->pdev, buffrag->dma,
157 dev_kfree_skb_any(cmd_buf->skb);
163 spin_unlock(&tx_ring->tx_clean_lock);
166 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
168 struct qlcnic_recv_context *recv_ctx;
169 struct qlcnic_host_rds_ring *rds_ring;
172 recv_ctx = adapter->recv_ctx;
174 if (recv_ctx->rds_rings == NULL)
177 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
178 rds_ring = &recv_ctx->rds_rings[ring];
179 vfree(rds_ring->rx_buf_arr);
180 rds_ring->rx_buf_arr = NULL;
182 kfree(recv_ctx->rds_rings);
185 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
187 struct qlcnic_recv_context *recv_ctx;
188 struct qlcnic_host_rds_ring *rds_ring;
189 struct qlcnic_host_sds_ring *sds_ring;
190 struct qlcnic_rx_buffer *rx_buf;
193 recv_ctx = adapter->recv_ctx;
195 rds_ring = kcalloc(adapter->max_rds_rings,
196 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
197 if (rds_ring == NULL)
200 recv_ctx->rds_rings = rds_ring;
202 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
203 rds_ring = &recv_ctx->rds_rings[ring];
205 case RCV_RING_NORMAL:
206 rds_ring->num_desc = adapter->num_rxd;
207 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
208 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
212 rds_ring->num_desc = adapter->num_jumbo_rxd;
214 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
216 if (adapter->ahw->capabilities &
217 QLCNIC_FW_CAPABILITY_HW_LRO)
218 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
221 rds_ring->dma_size + NET_IP_ALIGN;
224 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
225 if (rds_ring->rx_buf_arr == NULL)
228 INIT_LIST_HEAD(&rds_ring->free_list);
230 * Now go through all of them, set reference handles
231 * and put them in the queues.
233 rx_buf = rds_ring->rx_buf_arr;
234 for (i = 0; i < rds_ring->num_desc; i++) {
235 list_add_tail(&rx_buf->list,
236 &rds_ring->free_list);
237 rx_buf->ref_handle = i;
240 spin_lock_init(&rds_ring->lock);
243 for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
244 sds_ring = &recv_ctx->sds_rings[ring];
245 sds_ring->irq = adapter->msix_entries[ring].vector;
246 sds_ring->adapter = adapter;
247 sds_ring->num_desc = adapter->num_rxd;
248 if (qlcnic_82xx_check(adapter)) {
249 if (qlcnic_check_multi_tx(adapter) &&
250 !adapter->ahw->diag_test)
251 sds_ring->tx_ring = &adapter->tx_ring[ring];
253 sds_ring->tx_ring = &adapter->tx_ring[0];
255 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
256 INIT_LIST_HEAD(&sds_ring->free_list[i]);
262 qlcnic_free_sw_resources(adapter);
267 * Utility to translate from internal Phantom CRB address
268 * to external PCI CRB address.
270 static u32 qlcnic_decode_crb_addr(u32 addr)
273 u32 base_addr, offset, pci_base;
275 crb_addr_transform_setup();
277 pci_base = QLCNIC_ADDR_ERROR;
278 base_addr = addr & 0xfff00000;
279 offset = addr & 0x000fffff;
281 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
282 if (crb_addr_xform[i] == base_addr) {
287 if (pci_base == QLCNIC_ADDR_ERROR)
290 return pci_base + offset;
293 #define QLCNIC_MAX_ROM_WAIT_USEC 100
295 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
303 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
305 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
306 dev_err(&adapter->pdev->dev,
307 "Timeout reached waiting for rom done");
315 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
321 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
322 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
323 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
324 if (qlcnic_wait_rom_done(adapter)) {
325 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
328 /* reset abyte_cnt and dummy_byte_cnt */
329 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
331 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
333 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
339 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
340 u8 *bytes, size_t size)
345 for (addridx = addr; addridx < (addr + size); addridx += 4) {
347 ret = do_rom_fast_read(adapter, addridx, &v);
350 *(__le32 *)bytes = cpu_to_le32(v);
358 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
359 u8 *bytes, size_t size)
363 ret = qlcnic_rom_lock(adapter);
367 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
369 qlcnic_rom_unlock(adapter);
373 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
377 if (qlcnic_rom_lock(adapter) != 0)
380 ret = do_rom_fast_read(adapter, addr, valp);
381 qlcnic_rom_unlock(adapter);
385 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
388 int i, n, init_delay;
389 struct crb_addr_pair *buf;
392 struct pci_dev *pdev = adapter->pdev;
394 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
395 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
397 /* Halt all the indiviual PEGs and other blocks */
398 /* disable all I2Q */
399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
402 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
403 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
404 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
406 /* disable all niu interrupts */
407 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
408 /* disable xge rx/tx */
409 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
410 /* disable xg1 rx/tx */
411 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
412 /* disable sideband mac */
413 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
414 /* disable ap0 mac */
415 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
416 /* disable ap1 mac */
417 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
420 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
423 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
426 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
432 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
433 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
434 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
438 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
439 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
440 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
443 qlcnic_rom_unlock(adapter);
444 /* big hammer don't reset CAM block on reset */
445 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
447 /* Init HW CRB block */
448 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
449 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
450 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
453 offset = n & 0xffffU;
454 n = (n >> 16) & 0xffffU;
457 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
461 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
465 for (i = 0; i < n; i++) {
466 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
467 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
476 for (i = 0; i < n; i++) {
478 off = qlcnic_decode_crb_addr(buf[i].addr);
479 if (off == QLCNIC_ADDR_ERROR) {
480 dev_err(&pdev->dev, "CRB init value out of range %x\n",
484 off += QLCNIC_PCI_CRBSPACE;
489 /* skipping cold reboot MAGIC */
490 if (off == QLCNIC_CAM_RAM(0x1fc))
492 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
494 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
496 if (off == (ROMUSB_GLB + 0xa8))
498 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
500 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
502 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
504 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
506 /* skip the function enable register */
507 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
509 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
511 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
515 /* After writing this register, HW needs time for CRB */
516 /* to quiet down (else crb_window returns 0xffffffff) */
517 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
520 QLCWR32(adapter, off, buf[i].data);
526 /* Initialize protocol process engine */
527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
537 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
538 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
539 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
542 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
543 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
548 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
551 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
554 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
557 case PHAN_INITIALIZE_COMPLETE:
558 case PHAN_INITIALIZE_ACK:
560 case PHAN_INITIALIZE_FAILED:
566 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
570 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
571 PHAN_INITIALIZE_FAILED);
574 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
575 "complete, state: 0x%x.\n", val);
580 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
583 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
586 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
588 if (val == PHAN_PEG_RCV_INITIALIZED)
591 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
596 dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
597 "complete, state: 0x%x.\n", val);
605 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
609 err = qlcnic_cmd_peg_ready(adapter);
613 err = qlcnic_receive_peg_ready(adapter);
617 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
623 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
628 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
629 val = QLC_DEV_GET_DRV(val, adapter->portnum);
630 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
631 dev_err(&adapter->pdev->dev,
632 "Not an Ethernet NIC func=%u\n", val);
635 adapter->ahw->physical_port = (val >> 2);
636 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
637 timeo = QLCNIC_INIT_TIMEOUT_SECS;
639 adapter->dev_init_timeo = timeo;
641 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
642 timeo = QLCNIC_RESET_TIMEOUT_SECS;
644 adapter->reset_ack_timeo = timeo;
649 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
650 struct qlcnic_flt_entry *region_entry)
652 struct qlcnic_flt_header flt_hdr;
653 struct qlcnic_flt_entry *flt_entry;
657 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
658 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
660 sizeof(struct qlcnic_flt_header));
662 dev_warn(&adapter->pdev->dev,
663 "error reading flash layout header\n");
667 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
668 flt_entry = vzalloc(entry_size);
669 if (flt_entry == NULL)
672 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
673 sizeof(struct qlcnic_flt_header),
674 (u8 *)flt_entry, entry_size);
676 dev_warn(&adapter->pdev->dev,
677 "error reading flash layout entries\n");
681 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
682 if (flt_entry[i].region == region)
686 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
687 dev_warn(&adapter->pdev->dev,
688 "region=%x not found in %d regions\n", region, i);
692 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
700 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
702 struct qlcnic_flt_entry fw_entry;
703 u32 ver = -1, min_ver;
706 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
707 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
710 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
714 /* 0-4:-signature, 4-8:-fw version */
715 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
718 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
721 ver = QLCNIC_DECODE_VERSION(ver);
722 min_ver = QLCNIC_MIN_FW_VERSION;
725 dev_err(&adapter->pdev->dev,
726 "firmware version %d.%d.%d unsupported."
727 "Min supported version %d.%d.%d\n",
728 _major(ver), _minor(ver), _build(ver),
729 _major(min_ver), _minor(min_ver), _build(min_ver));
737 qlcnic_has_mn(struct qlcnic_adapter *adapter)
742 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
745 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
752 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
755 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
756 entries = le32_to_cpu(directory->num_entries);
758 for (i = 0; i < entries; i++) {
760 u32 offs = le32_to_cpu(directory->findex) +
761 i * le32_to_cpu(directory->entry_size);
762 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
764 if (tab_type == section)
765 return (struct uni_table_desc *) &unirom[offs];
771 #define FILEHEADER_SIZE (14 * 4)
774 qlcnic_validate_header(struct qlcnic_adapter *adapter)
776 const u8 *unirom = adapter->fw->data;
777 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
778 u32 entries, entry_size, tab_size, fw_file_size;
780 fw_file_size = adapter->fw->size;
782 if (fw_file_size < FILEHEADER_SIZE)
785 entries = le32_to_cpu(directory->num_entries);
786 entry_size = le32_to_cpu(directory->entry_size);
787 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
789 if (fw_file_size < tab_size)
796 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
798 struct uni_table_desc *tab_desc;
799 struct uni_data_desc *descr;
800 u32 offs, tab_size, data_size, idx;
801 const u8 *unirom = adapter->fw->data;
804 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
805 QLCNIC_UNI_BOOTLD_IDX_OFF);
806 idx = le32_to_cpu(temp);
807 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
812 tab_size = le32_to_cpu(tab_desc->findex) +
813 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
815 if (adapter->fw->size < tab_size)
818 offs = le32_to_cpu(tab_desc->findex) +
819 le32_to_cpu(tab_desc->entry_size) * idx;
820 descr = (struct uni_data_desc *)&unirom[offs];
822 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
824 if (adapter->fw->size < data_size)
831 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
833 struct uni_table_desc *tab_desc;
834 struct uni_data_desc *descr;
835 const u8 *unirom = adapter->fw->data;
836 u32 offs, tab_size, data_size, idx;
839 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
840 QLCNIC_UNI_FIRMWARE_IDX_OFF);
841 idx = le32_to_cpu(temp);
842 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
847 tab_size = le32_to_cpu(tab_desc->findex) +
848 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
850 if (adapter->fw->size < tab_size)
853 offs = le32_to_cpu(tab_desc->findex) +
854 le32_to_cpu(tab_desc->entry_size) * idx;
855 descr = (struct uni_data_desc *)&unirom[offs];
856 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
858 if (adapter->fw->size < data_size)
865 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
867 struct uni_table_desc *ptab_descr;
868 const u8 *unirom = adapter->fw->data;
869 int mn_present = qlcnic_has_mn(adapter);
870 u32 entries, entry_size, tab_size, i;
873 ptab_descr = qlcnic_get_table_desc(unirom,
874 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
878 entries = le32_to_cpu(ptab_descr->num_entries);
879 entry_size = le32_to_cpu(ptab_descr->entry_size);
880 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
882 if (adapter->fw->size < tab_size)
886 for (i = 0; i < entries; i++) {
888 u32 flags, file_chiprev, offs;
889 u8 chiprev = adapter->ahw->revision_id;
892 offs = le32_to_cpu(ptab_descr->findex) +
893 i * le32_to_cpu(ptab_descr->entry_size);
894 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
895 flags = le32_to_cpu(temp);
896 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
897 file_chiprev = le32_to_cpu(temp);
899 flagbit = mn_present ? 1 : 2;
901 if ((chiprev == file_chiprev) &&
902 ((1ULL << flagbit) & flags)) {
903 adapter->file_prd_off = offs;
915 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
917 if (qlcnic_validate_header(adapter)) {
918 dev_err(&adapter->pdev->dev,
919 "unified image: header validation failed\n");
923 if (qlcnic_validate_product_offs(adapter)) {
924 dev_err(&adapter->pdev->dev,
925 "unified image: product validation failed\n");
929 if (qlcnic_validate_bootld(adapter)) {
930 dev_err(&adapter->pdev->dev,
931 "unified image: bootld validation failed\n");
935 if (qlcnic_validate_fw(adapter)) {
936 dev_err(&adapter->pdev->dev,
937 "unified image: firmware validation failed\n");
945 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
946 u32 section, u32 idx_offset)
948 const u8 *unirom = adapter->fw->data;
949 struct uni_table_desc *tab_desc;
953 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
954 idx = le32_to_cpu(temp);
956 tab_desc = qlcnic_get_table_desc(unirom, section);
958 if (tab_desc == NULL)
961 offs = le32_to_cpu(tab_desc->findex) +
962 le32_to_cpu(tab_desc->entry_size) * idx;
964 return (struct uni_data_desc *)&unirom[offs];
968 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
970 u32 offs = QLCNIC_BOOTLD_START;
971 struct uni_data_desc *data_desc;
973 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
974 QLCNIC_UNI_BOOTLD_IDX_OFF);
976 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
977 offs = le32_to_cpu(data_desc->findex);
979 return (u8 *)&adapter->fw->data[offs];
983 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
985 u32 offs = QLCNIC_IMAGE_START;
986 struct uni_data_desc *data_desc;
988 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
989 QLCNIC_UNI_FIRMWARE_IDX_OFF);
990 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
991 offs = le32_to_cpu(data_desc->findex);
993 return (u8 *)&adapter->fw->data[offs];
996 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
998 struct uni_data_desc *data_desc;
999 const u8 *unirom = adapter->fw->data;
1001 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1002 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1004 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
1005 return le32_to_cpu(data_desc->size);
1007 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1010 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1012 struct uni_data_desc *fw_data_desc;
1013 const struct firmware *fw = adapter->fw;
1014 u32 major, minor, sub;
1015 __le32 version_offset;
1019 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1020 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1021 return le32_to_cpu(version_offset);
1024 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1025 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1026 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1027 le32_to_cpu(fw_data_desc->size) - 17;
1029 for (i = 0; i < 12; i++) {
1030 if (!strncmp(&ver_str[i], "REV=", 4)) {
1031 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1032 &major, &minor, &sub);
1036 return major + (minor << 8) + (sub << 16);
1043 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1045 const struct firmware *fw = adapter->fw;
1046 u32 bios_ver, prd_off = adapter->file_prd_off;
1050 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1051 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1052 return le32_to_cpu(*(__le32 *)version_offset);
1055 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1056 bios_ver = le32_to_cpu(temp);
1058 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1061 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1063 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1064 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1066 qlcnic_pcie_sem_unlock(adapter, 2);
1070 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1072 u32 heartbeat, ret = -EIO;
1073 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1075 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1076 QLCNIC_PEG_ALIVE_COUNTER);
1079 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1080 heartbeat = QLC_SHARED_REG_RD32(adapter,
1081 QLCNIC_PEG_ALIVE_COUNTER);
1082 if (heartbeat != adapter->heartbeat) {
1083 ret = QLCNIC_RCODE_SUCCESS;
1086 } while (--retries);
1092 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1094 if ((adapter->flags & QLCNIC_FW_HANG) ||
1095 qlcnic_check_fw_hearbeat(adapter)) {
1096 qlcnic_rom_lock_recovery(adapter);
1100 if (adapter->need_fw_reset)
1109 static const char *fw_name[] = {
1110 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1111 QLCNIC_FLASH_ROMIMAGE_NAME,
1115 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1118 u32 i, flashaddr, size;
1119 const struct firmware *fw = adapter->fw;
1120 struct pci_dev *pdev = adapter->pdev;
1122 dev_info(&pdev->dev, "loading firmware from %s\n",
1123 fw_name[adapter->ahw->fw_type]);
1128 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1130 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1131 flashaddr = QLCNIC_BOOTLD_START;
1133 for (i = 0; i < size; i++) {
1134 data = le64_to_cpu(ptr64[i]);
1136 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1142 size = qlcnic_get_fw_size(adapter) / 8;
1144 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1145 flashaddr = QLCNIC_IMAGE_START;
1147 for (i = 0; i < size; i++) {
1148 data = le64_to_cpu(ptr64[i]);
1150 if (qlcnic_pci_mem_write_2M(adapter,
1157 size = qlcnic_get_fw_size(adapter) % 8;
1159 data = le64_to_cpu(ptr64[i]);
1161 if (qlcnic_pci_mem_write_2M(adapter,
1170 struct qlcnic_flt_entry bootld_entry;
1172 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1175 size = bootld_entry.size / 8;
1176 flashaddr = bootld_entry.start_addr;
1178 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1179 flashaddr = QLCNIC_BOOTLD_START;
1180 dev_info(&pdev->dev,
1181 "using legacy method to get flash fw region");
1184 for (i = 0; i < size; i++) {
1185 if (qlcnic_rom_fast_read(adapter,
1186 flashaddr, (int *)&lo) != 0)
1188 if (qlcnic_rom_fast_read(adapter,
1189 flashaddr + 4, (int *)&hi) != 0)
1192 data = (((u64)hi << 32) | lo);
1194 if (qlcnic_pci_mem_write_2M(adapter,
1203 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1204 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1209 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1212 u32 ver, bios, min_size;
1213 struct pci_dev *pdev = adapter->pdev;
1214 const struct firmware *fw = adapter->fw;
1215 u8 fw_type = adapter->ahw->fw_type;
1217 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1218 if (qlcnic_validate_unified_romimage(adapter))
1221 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1223 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1224 if (val != QLCNIC_BDINFO_MAGIC)
1227 min_size = QLCNIC_FW_MIN_SIZE;
1230 if (fw->size < min_size)
1233 val = qlcnic_get_fw_version(adapter);
1234 ver = QLCNIC_DECODE_VERSION(val);
1236 if (ver < QLCNIC_MIN_FW_VERSION) {
1238 "%s: firmware version %d.%d.%d unsupported\n",
1239 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1243 val = qlcnic_get_bios_version(adapter);
1244 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1246 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1251 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1256 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1260 switch (adapter->ahw->fw_type) {
1261 case QLCNIC_UNKNOWN_ROMIMAGE:
1262 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1265 case QLCNIC_UNIFIED_ROMIMAGE:
1267 fw_type = QLCNIC_FLASH_ROMIMAGE;
1271 adapter->ahw->fw_type = fw_type;
1276 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1278 struct pci_dev *pdev = adapter->pdev;
1281 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1284 qlcnic_get_next_fwtype(adapter);
1286 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1289 rc = request_firmware(&adapter->fw,
1290 fw_name[adapter->ahw->fw_type],
1295 rc = qlcnic_validate_firmware(adapter);
1297 release_firmware(adapter->fw);
1306 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1308 release_firmware(adapter->fw);