2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
10 static int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
14 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
15 if (adapter->npars[i].pci_func == pci_func)
23 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
29 /* give atleast 1ms for firmware to respond */
32 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
33 return QLCNIC_CDRP_RSP_TIMEOUT;
35 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
36 } while (!QLCNIC_CDRP_IS_RSP(rsp));
42 qlcnic_issue_cmd(struct qlcnic_adapter *adapter, struct qlcnic_cmd_args *cmd)
46 struct pci_dev *pdev = adapter->pdev;
47 struct qlcnic_hardware_context *ahw = adapter->ahw;
49 signature = QLCNIC_CDRP_SIGNATURE_MAKE(ahw->pci_func,
50 adapter->ahw->fw_hal_version);
52 /* Acquire semaphore before accessing CRB */
53 if (qlcnic_api_lock(adapter)) {
54 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
58 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
59 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, cmd->req.arg1);
60 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, cmd->req.arg2);
61 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, cmd->req.arg3);
62 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
63 QLCNIC_CDRP_FORM_CMD(cmd->req.cmd));
65 rsp = qlcnic_poll_rsp(adapter);
67 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
68 dev_err(&pdev->dev, "CDRP response timeout.\n");
69 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
70 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
71 cmd->rsp.cmd = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
72 switch (cmd->rsp.cmd) {
73 case QLCNIC_RCODE_INVALID_ARGS:
74 dev_err(&pdev->dev, "CDRP invalid args: 0x%x.\n",
77 case QLCNIC_RCODE_NOT_SUPPORTED:
78 case QLCNIC_RCODE_NOT_IMPL:
80 "CDRP command not supported: 0x%x.\n",
83 case QLCNIC_RCODE_NOT_PERMITTED:
85 "CDRP requested action not permitted: 0x%x.\n",
88 case QLCNIC_RCODE_INVALID:
90 "CDRP invalid or unknown cmd received: 0x%x.\n",
93 case QLCNIC_RCODE_TIMEOUT:
94 dev_err(&pdev->dev, "CDRP command timeout: 0x%x.\n",
98 dev_err(&pdev->dev, "CDRP command failed: 0x%x.\n",
101 } else if (rsp == QLCNIC_CDRP_RSP_OK) {
102 cmd->rsp.cmd = QLCNIC_RCODE_SUCCESS;
104 cmd->rsp.arg2 = QLCRD32(adapter,
105 QLCNIC_ARG2_CRB_OFFSET);
107 cmd->rsp.arg3 = QLCRD32(adapter,
108 QLCNIC_ARG3_CRB_OFFSET);
111 cmd->rsp.arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
113 /* Release semaphore */
114 qlcnic_api_unlock(adapter);
118 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u32 temp_size)
121 int count = temp_size / sizeof(uint32_t);
123 sum += *temp_buffer++;
125 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
129 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
133 u32 temp_size, version, csum, *template;
135 struct qlcnic_cmd_args cmd;
136 struct qlcnic_hardware_context *ahw;
137 struct qlcnic_dump_template_hdr *tmpl_hdr;
138 dma_addr_t tmp_addr_t = 0;
141 memset(&cmd, 0, sizeof(cmd));
142 cmd.req.cmd = QLCNIC_CDRP_CMD_TEMP_SIZE;
143 memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
144 qlcnic_issue_cmd(adapter, &cmd);
145 if (cmd.rsp.cmd != QLCNIC_RCODE_SUCCESS) {
146 dev_info(&adapter->pdev->dev,
147 "Can't get template size %d\n", cmd.rsp.cmd);
151 temp_size = cmd.rsp.arg2;
152 version = cmd.rsp.arg3;
153 dev_info(&adapter->pdev->dev,
154 "minidump template version = 0x%x", version);
158 tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
159 &tmp_addr_t, GFP_KERNEL);
161 dev_err(&adapter->pdev->dev,
162 "Can't get memory for FW dump template\n");
165 memset(&cmd.rsp, 0, sizeof(struct _cdrp_cmd));
166 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_TEMP_HDR;
167 cmd.req.arg1 = LSD(tmp_addr_t);
168 cmd.req.arg2 = MSD(tmp_addr_t);
169 cmd.req.arg3 = temp_size;
170 qlcnic_issue_cmd(adapter, &cmd);
173 if (err != QLCNIC_RCODE_SUCCESS) {
174 dev_err(&adapter->pdev->dev,
175 "Failed to get mini dump template header %d\n", err);
179 ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
180 if (!ahw->fw_dump.tmpl_hdr) {
185 template = (u32 *) ahw->fw_dump.tmpl_hdr;
186 for (i = 0; i < temp_size/sizeof(u32); i++)
187 *template++ = __le32_to_cpu(*tmp_buf++);
189 csum = qlcnic_temp_checksum((u32 *)ahw->fw_dump.tmpl_hdr, temp_size);
191 dev_err(&adapter->pdev->dev,
192 "Template header checksum validation failed\n");
197 tmpl_hdr = ahw->fw_dump.tmpl_hdr;
198 tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
199 ahw->fw_dump.enable = 1;
201 dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
206 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
208 struct qlcnic_cmd_args cmd;
209 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
211 memset(&cmd, 0, sizeof(cmd));
212 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_MTU;
213 cmd.req.arg1 = recv_ctx->context_id;
216 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
217 qlcnic_issue_cmd(adapter, &cmd);
219 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
228 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
231 struct qlcnic_hostrq_rx_ctx *prq;
232 struct qlcnic_cardrsp_rx_ctx *prsp;
233 struct qlcnic_hostrq_rds_ring *prq_rds;
234 struct qlcnic_hostrq_sds_ring *prq_sds;
235 struct qlcnic_cardrsp_rds_ring *prsp_rds;
236 struct qlcnic_cardrsp_sds_ring *prsp_sds;
237 struct qlcnic_host_rds_ring *rds_ring;
238 struct qlcnic_host_sds_ring *sds_ring;
239 struct qlcnic_cmd_args cmd;
241 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
244 u8 i, nrds_rings, nsds_rings;
245 size_t rq_size, rsp_size;
246 u32 cap, reg, val, reg2;
250 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
252 nrds_rings = adapter->max_rds_rings;
253 nsds_rings = adapter->max_sds_rings;
256 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
259 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
262 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
263 &hostrq_phys_addr, GFP_KERNEL);
268 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
269 &cardrsp_phys_addr, GFP_KERNEL);
276 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
278 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
279 | QLCNIC_CAP0_VALIDOFF);
280 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
282 if (adapter->flags & QLCNIC_FW_LRO_MSS_CAP)
283 cap |= QLCNIC_CAP0_LRO_MSS;
285 temp = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
286 prq->valid_field_offset = cpu_to_le16(temp);
287 prq->txrx_sds_binding = nsds_rings - 1;
289 prq->capabilities[0] = cpu_to_le32(cap);
290 prq->host_int_crb_mode =
291 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
292 prq->host_rds_crb_mode =
293 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
295 prq->num_rds_rings = cpu_to_le16(nrds_rings);
296 prq->num_sds_rings = cpu_to_le16(nsds_rings);
297 prq->rds_ring_offset = 0;
299 val = le32_to_cpu(prq->rds_ring_offset) +
300 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
301 prq->sds_ring_offset = cpu_to_le32(val);
303 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
304 le32_to_cpu(prq->rds_ring_offset));
306 for (i = 0; i < nrds_rings; i++) {
308 rds_ring = &recv_ctx->rds_rings[i];
309 rds_ring->producer = 0;
311 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
312 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
313 prq_rds[i].ring_kind = cpu_to_le32(i);
314 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
317 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
318 le32_to_cpu(prq->sds_ring_offset));
320 for (i = 0; i < nsds_rings; i++) {
322 sds_ring = &recv_ctx->sds_rings[i];
323 sds_ring->consumer = 0;
324 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
326 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
327 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
328 prq_sds[i].msi_index = cpu_to_le16(i);
331 phys_addr = hostrq_phys_addr;
332 memset(&cmd, 0, sizeof(cmd));
333 cmd.req.arg1 = (u32) (phys_addr >> 32);
334 cmd.req.arg2 = (u32) (phys_addr & 0xffffffff);
335 cmd.req.arg3 = rq_size;
336 cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_RX_CTX;
337 qlcnic_issue_cmd(adapter, &cmd);
340 dev_err(&adapter->pdev->dev,
341 "Failed to create rx ctx in firmware%d\n", err);
346 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
347 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
349 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
350 rds_ring = &recv_ctx->rds_rings[i];
352 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
353 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
356 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
357 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
359 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
360 sds_ring = &recv_ctx->sds_rings[i];
362 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
363 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
365 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
366 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
369 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
370 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
371 recv_ctx->virt_port = prsp->virt_port;
374 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
377 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
382 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
384 struct qlcnic_cmd_args cmd;
385 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
387 memset(&cmd, 0, sizeof(cmd));
388 cmd.req.arg1 = recv_ctx->context_id;
389 cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
391 cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_RX_CTX;
392 qlcnic_issue_cmd(adapter, &cmd);
394 dev_err(&adapter->pdev->dev,
395 "Failed to destroy rx ctx in firmware\n");
397 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
401 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
403 struct qlcnic_hostrq_tx_ctx *prq;
404 struct qlcnic_hostrq_cds_ring *prq_cds;
405 struct qlcnic_cardrsp_tx_ctx *prsp;
406 void *rq_addr, *rsp_addr;
407 size_t rq_size, rsp_size;
409 struct qlcnic_cmd_args cmd;
412 dma_addr_t rq_phys_addr, rsp_phys_addr;
413 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
415 /* reset host resources */
416 tx_ring->producer = 0;
417 tx_ring->sw_consumer = 0;
418 *(tx_ring->hw_consumer) = 0;
420 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
421 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
422 &rq_phys_addr, GFP_KERNEL);
426 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
427 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
428 &rsp_phys_addr, GFP_KERNEL);
434 memset(rq_addr, 0, rq_size);
437 memset(rsp_addr, 0, rsp_size);
440 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
442 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
444 prq->capabilities[0] = cpu_to_le32(temp);
446 prq->host_int_crb_mode =
447 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
449 prq->interrupt_ctl = 0;
451 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
453 prq_cds = &prq->cds_ring;
455 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
456 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
458 phys_addr = rq_phys_addr;
459 memset(&cmd, 0, sizeof(cmd));
460 cmd.req.arg1 = (u32)(phys_addr >> 32);
461 cmd.req.arg2 = ((u32)phys_addr & 0xffffffff);
462 cmd.req.arg3 = rq_size;
463 cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_TX_CTX;
464 qlcnic_issue_cmd(adapter, &cmd);
467 if (err == QLCNIC_RCODE_SUCCESS) {
468 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
469 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
471 adapter->tx_ring->ctx_id = le16_to_cpu(prsp->context_id);
473 dev_err(&adapter->pdev->dev,
474 "Failed to create tx ctx in firmware%d\n", err);
478 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
482 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
488 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
490 struct qlcnic_cmd_args cmd;
492 memset(&cmd, 0, sizeof(cmd));
493 cmd.req.arg1 = adapter->tx_ring->ctx_id;
494 cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
496 cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_TX_CTX;
497 qlcnic_issue_cmd(adapter, &cmd);
499 dev_err(&adapter->pdev->dev,
500 "Failed to destroy tx ctx in firmware\n");
504 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
506 struct qlcnic_cmd_args cmd;
508 memset(&cmd, 0, sizeof(cmd));
509 cmd.req.arg1 = config;
510 cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIG_PORT;
511 qlcnic_issue_cmd(adapter, &cmd);
516 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
521 struct qlcnic_recv_context *recv_ctx;
522 struct qlcnic_host_rds_ring *rds_ring;
523 struct qlcnic_host_sds_ring *sds_ring;
524 struct qlcnic_host_tx_ring *tx_ring;
526 struct pci_dev *pdev = adapter->pdev;
528 recv_ctx = adapter->recv_ctx;
529 tx_ring = adapter->tx_ring;
531 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
532 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
533 if (tx_ring->hw_consumer == NULL) {
534 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
539 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
540 &tx_ring->phys_addr, GFP_KERNEL);
543 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
548 tx_ring->desc_head = addr;
550 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
551 rds_ring = &recv_ctx->rds_rings[ring];
552 addr = dma_alloc_coherent(&adapter->pdev->dev,
553 RCV_DESC_RINGSIZE(rds_ring),
554 &rds_ring->phys_addr, GFP_KERNEL);
557 "failed to allocate rds ring [%d]\n", ring);
561 rds_ring->desc_head = addr;
565 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
566 sds_ring = &recv_ctx->sds_rings[ring];
568 addr = dma_alloc_coherent(&adapter->pdev->dev,
569 STATUS_DESC_RINGSIZE(sds_ring),
570 &sds_ring->phys_addr, GFP_KERNEL);
573 "failed to allocate sds ring [%d]\n", ring);
577 sds_ring->desc_head = addr;
583 qlcnic_free_hw_resources(adapter);
588 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
592 if (adapter->flags & QLCNIC_NEED_FLR) {
593 pci_reset_function(adapter->pdev);
594 adapter->flags &= ~QLCNIC_NEED_FLR;
597 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
601 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
603 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
607 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
611 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
613 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
614 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
615 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
617 /* Allow dma queues to drain after context reset */
622 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
624 struct qlcnic_recv_context *recv_ctx;
625 struct qlcnic_host_rds_ring *rds_ring;
626 struct qlcnic_host_sds_ring *sds_ring;
627 struct qlcnic_host_tx_ring *tx_ring;
630 recv_ctx = adapter->recv_ctx;
632 tx_ring = adapter->tx_ring;
633 if (tx_ring->hw_consumer != NULL) {
634 dma_free_coherent(&adapter->pdev->dev,
636 tx_ring->hw_consumer,
637 tx_ring->hw_cons_phys_addr);
638 tx_ring->hw_consumer = NULL;
641 if (tx_ring->desc_head != NULL) {
642 dma_free_coherent(&adapter->pdev->dev,
643 TX_DESC_RINGSIZE(tx_ring),
644 tx_ring->desc_head, tx_ring->phys_addr);
645 tx_ring->desc_head = NULL;
648 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
649 rds_ring = &recv_ctx->rds_rings[ring];
651 if (rds_ring->desc_head != NULL) {
652 dma_free_coherent(&adapter->pdev->dev,
653 RCV_DESC_RINGSIZE(rds_ring),
655 rds_ring->phys_addr);
656 rds_ring->desc_head = NULL;
660 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
661 sds_ring = &recv_ctx->sds_rings[ring];
663 if (sds_ring->desc_head != NULL) {
664 dma_free_coherent(&adapter->pdev->dev,
665 STATUS_DESC_RINGSIZE(sds_ring),
667 sds_ring->phys_addr);
668 sds_ring->desc_head = NULL;
674 /* Get MAC address of a NIC partition */
675 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
678 struct qlcnic_cmd_args cmd;
680 memset(&cmd, 0, sizeof(cmd));
681 cmd.req.arg1 = adapter->ahw->pci_func | BIT_8;
682 cmd.req.cmd = QLCNIC_CDRP_CMD_MAC_ADDRESS;
683 cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
684 qlcnic_issue_cmd(adapter, &cmd);
687 if (err == QLCNIC_RCODE_SUCCESS)
688 qlcnic_fetch_mac(cmd.rsp.arg1, cmd.rsp.arg2, 0, mac);
690 dev_err(&adapter->pdev->dev,
691 "Failed to get mac address%d\n", err);
698 /* Get info of a NIC partition */
699 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
700 struct qlcnic_info *npar_info, u8 func_id)
703 dma_addr_t nic_dma_t;
704 struct qlcnic_info_le *nic_info;
706 struct qlcnic_cmd_args cmd;
707 size_t nic_size = sizeof(struct qlcnic_info_le);
709 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
710 &nic_dma_t, GFP_KERNEL);
713 memset(nic_info_addr, 0, nic_size);
715 nic_info = nic_info_addr;
716 memset(&cmd, 0, sizeof(cmd));
717 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_NIC_INFO;
718 cmd.req.arg1 = MSD(nic_dma_t);
719 cmd.req.arg2 = LSD(nic_dma_t);
720 cmd.req.arg3 = (func_id << 16 | nic_size);
721 qlcnic_issue_cmd(adapter, &cmd);
724 if (err == QLCNIC_RCODE_SUCCESS) {
725 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
726 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
727 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
728 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
729 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
730 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
731 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
732 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
733 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
734 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
736 dev_info(&adapter->pdev->dev,
737 "phy port: %d switch_mode: %d,\n"
738 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
739 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
740 npar_info->phys_port, npar_info->switch_mode,
741 npar_info->max_tx_ques, npar_info->max_rx_ques,
742 npar_info->min_tx_bw, npar_info->max_tx_bw,
743 npar_info->max_mtu, npar_info->capabilities);
745 dev_err(&adapter->pdev->dev,
746 "Failed to get nic info%d\n", err);
750 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
755 /* Configure a NIC partition */
756 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
759 dma_addr_t nic_dma_t;
761 struct qlcnic_cmd_args cmd;
762 struct qlcnic_info_le *nic_info;
763 size_t nic_size = sizeof(struct qlcnic_info_le);
765 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
768 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
769 &nic_dma_t, GFP_KERNEL);
773 memset(nic_info_addr, 0, nic_size);
774 nic_info = nic_info_addr;
776 nic_info->pci_func = cpu_to_le16(nic->pci_func);
777 nic_info->op_mode = cpu_to_le16(nic->op_mode);
778 nic_info->phys_port = cpu_to_le16(nic->phys_port);
779 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
780 nic_info->capabilities = cpu_to_le32(nic->capabilities);
781 nic_info->max_mac_filters = nic->max_mac_filters;
782 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
783 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
784 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
785 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
787 memset(&cmd, 0, sizeof(cmd));
788 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_NIC_INFO;
789 cmd.req.arg1 = MSD(nic_dma_t);
790 cmd.req.arg2 = LSD(nic_dma_t);
791 cmd.req.arg3 = ((nic->pci_func << 16) | nic_size);
792 qlcnic_issue_cmd(adapter, &cmd);
795 if (err != QLCNIC_RCODE_SUCCESS) {
796 dev_err(&adapter->pdev->dev,
797 "Failed to set nic info%d\n", err);
801 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
806 /* Get PCI Info of a partition */
807 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
808 struct qlcnic_pci_info *pci_info)
811 struct qlcnic_cmd_args cmd;
812 dma_addr_t pci_info_dma_t;
813 struct qlcnic_pci_info_le *npar;
815 size_t npar_size = sizeof(struct qlcnic_pci_info_le);
816 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
818 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
819 &pci_info_dma_t, GFP_KERNEL);
822 memset(pci_info_addr, 0, pci_size);
824 npar = pci_info_addr;
825 memset(&cmd, 0, sizeof(cmd));
826 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_PCI_INFO;
827 cmd.req.arg1 = MSD(pci_info_dma_t);
828 cmd.req.arg2 = LSD(pci_info_dma_t);
829 cmd.req.arg3 = pci_size;
830 qlcnic_issue_cmd(adapter, &cmd);
833 adapter->ahw->act_pci_func = 0;
834 if (err == QLCNIC_RCODE_SUCCESS) {
835 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
836 pci_info->id = le16_to_cpu(npar->id);
837 pci_info->active = le16_to_cpu(npar->active);
838 pci_info->type = le16_to_cpu(npar->type);
839 if (pci_info->type == QLCNIC_TYPE_NIC)
840 adapter->ahw->act_pci_func++;
841 pci_info->default_port =
842 le16_to_cpu(npar->default_port);
843 pci_info->tx_min_bw =
844 le16_to_cpu(npar->tx_min_bw);
845 pci_info->tx_max_bw =
846 le16_to_cpu(npar->tx_max_bw);
847 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
850 dev_err(&adapter->pdev->dev,
851 "Failed to get PCI Info%d\n", err);
855 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
860 /* Configure eSwitch for port mirroring */
861 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
862 u8 enable_mirroring, u8 pci_func)
866 struct qlcnic_cmd_args cmd;
868 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC ||
869 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
872 arg1 = id | (enable_mirroring ? BIT_4 : 0);
873 arg1 |= pci_func << 8;
875 memset(&cmd, 0, sizeof(cmd));
876 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_PORTMIRRORING;
878 qlcnic_issue_cmd(adapter, &cmd);
881 if (err != QLCNIC_RCODE_SUCCESS) {
882 dev_err(&adapter->pdev->dev,
883 "Failed to configure port mirroring%d on eswitch:%d\n",
886 dev_info(&adapter->pdev->dev,
887 "Configured eSwitch %d for port mirroring:%d\n",
894 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
895 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
897 size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
898 struct qlcnic_esw_stats_le *stats;
899 dma_addr_t stats_dma_t;
902 struct qlcnic_cmd_args cmd;
905 if (esw_stats == NULL)
908 if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) &&
909 (func != adapter->ahw->pci_func)) {
910 dev_err(&adapter->pdev->dev,
911 "Not privilege to query stats for func=%d", func);
915 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
916 &stats_dma_t, GFP_KERNEL);
918 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
921 memset(stats_addr, 0, stats_size);
923 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
924 arg1 |= rx_tx << 15 | stats_size << 16;
926 memset(&cmd, 0, sizeof(cmd));
927 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
929 cmd.req.arg2 = MSD(stats_dma_t);
930 cmd.req.arg3 = LSD(stats_dma_t);
931 qlcnic_issue_cmd(adapter, &cmd);
936 esw_stats->context_id = le16_to_cpu(stats->context_id);
937 esw_stats->version = le16_to_cpu(stats->version);
938 esw_stats->size = le16_to_cpu(stats->size);
939 esw_stats->multicast_frames =
940 le64_to_cpu(stats->multicast_frames);
941 esw_stats->broadcast_frames =
942 le64_to_cpu(stats->broadcast_frames);
943 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
944 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
945 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
946 esw_stats->errors = le64_to_cpu(stats->errors);
947 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
950 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
955 /* This routine will retrieve the MAC statistics from firmware */
956 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
957 struct qlcnic_mac_statistics *mac_stats)
959 struct qlcnic_mac_statistics_le *stats;
960 struct qlcnic_cmd_args cmd;
961 size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
962 dma_addr_t stats_dma_t;
966 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
967 &stats_dma_t, GFP_KERNEL);
969 dev_err(&adapter->pdev->dev,
970 "%s: Unable to allocate memory.\n", __func__);
973 memset(stats_addr, 0, stats_size);
974 memset(&cmd, 0, sizeof(cmd));
975 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_MAC_STATS;
976 cmd.req.arg1 = stats_size << 16;
977 cmd.req.arg2 = MSD(stats_dma_t);
978 cmd.req.arg3 = LSD(stats_dma_t);
980 qlcnic_issue_cmd(adapter, &cmd);
985 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
986 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
987 mac_stats->mac_tx_mcast_pkts =
988 le64_to_cpu(stats->mac_tx_mcast_pkts);
989 mac_stats->mac_tx_bcast_pkts =
990 le64_to_cpu(stats->mac_tx_bcast_pkts);
991 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
992 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
993 mac_stats->mac_rx_mcast_pkts =
994 le64_to_cpu(stats->mac_rx_mcast_pkts);
995 mac_stats->mac_rx_length_error =
996 le64_to_cpu(stats->mac_rx_length_error);
997 mac_stats->mac_rx_length_small =
998 le64_to_cpu(stats->mac_rx_length_small);
999 mac_stats->mac_rx_length_large =
1000 le64_to_cpu(stats->mac_rx_length_large);
1001 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
1002 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
1003 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
1006 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1011 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1012 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1014 struct __qlcnic_esw_statistics port_stats;
1018 if (esw_stats == NULL)
1020 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1022 if (adapter->npars == NULL)
1025 memset(esw_stats, 0, sizeof(u64));
1026 esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1027 esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1028 esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1029 esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1030 esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1031 esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1032 esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
1033 esw_stats->context_id = eswitch;
1035 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
1036 if (adapter->npars[i].phy_port != eswitch)
1039 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1040 if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func,
1041 rx_tx, &port_stats))
1044 esw_stats->size = port_stats.size;
1045 esw_stats->version = port_stats.version;
1046 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1047 port_stats.unicast_frames);
1048 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1049 port_stats.multicast_frames);
1050 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1051 port_stats.broadcast_frames);
1052 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1053 port_stats.dropped_frames);
1054 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1056 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1057 port_stats.local_frames);
1058 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1059 port_stats.numbytes);
1065 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1066 const u8 port, const u8 rx_tx)
1070 struct qlcnic_cmd_args cmd;
1072 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1075 if (func_esw == QLCNIC_STATS_PORT) {
1076 if (port >= QLCNIC_MAX_PCI_FUNC)
1078 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1079 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1085 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1088 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1089 arg1 |= BIT_14 | rx_tx << 15;
1091 memset(&cmd, 0, sizeof(cmd));
1092 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
1093 cmd.req.arg1 = arg1;
1094 qlcnic_issue_cmd(adapter, &cmd);
1098 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
1099 "rx_ctx=%d\n", func_esw, port, rx_tx);
1104 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1105 u32 *arg1, u32 *arg2)
1108 struct qlcnic_cmd_args cmd;
1110 pci_func = (*arg1 >> 8);
1112 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG;
1113 cmd.req.arg1 = *arg1;
1114 cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
1115 qlcnic_issue_cmd(adapter, &cmd);
1116 *arg1 = cmd.rsp.arg1;
1117 *arg2 = cmd.rsp.arg2;
1120 if (err == QLCNIC_RCODE_SUCCESS) {
1121 dev_info(&adapter->pdev->dev,
1122 "eSwitch port config for pci func %d\n", pci_func);
1124 dev_err(&adapter->pdev->dev,
1125 "Failed to get eswitch port config for pci func %d\n",
1130 /* Configure eSwitch port
1131 op_mode = 0 for setting default port behavior
1132 op_mode = 1 for setting vlan id
1133 op_mode = 2 for deleting vlan id
1134 op_type = 0 for vlan_id
1135 op_type = 1 for port vlan_id
1137 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1138 struct qlcnic_esw_func_cfg *esw_cfg)
1140 int err = -EIO, index;
1142 struct qlcnic_cmd_args cmd;
1145 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1147 pci_func = esw_cfg->pci_func;
1148 index = qlcnic_is_valid_nic_func(adapter, pci_func);
1151 arg1 = (adapter->npars[index].phy_port & BIT_0);
1152 arg1 |= (pci_func << 8);
1154 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1156 arg1 &= ~(0x0ff << 8);
1157 arg1 |= (pci_func << 8);
1158 arg1 &= ~(BIT_2 | BIT_3);
1159 switch (esw_cfg->op_mode) {
1160 case QLCNIC_PORT_DEFAULTS:
1161 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1162 arg2 |= (BIT_0 | BIT_1);
1163 if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1164 arg2 |= (BIT_2 | BIT_3);
1165 if (!(esw_cfg->discard_tagged))
1167 if (!(esw_cfg->promisc_mode))
1169 if (!(esw_cfg->mac_override))
1171 if (!(esw_cfg->mac_anti_spoof))
1173 if (!(esw_cfg->offload_flags & BIT_0))
1174 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1175 if (!(esw_cfg->offload_flags & BIT_1))
1177 if (!(esw_cfg->offload_flags & BIT_2))
1180 case QLCNIC_ADD_VLAN:
1181 arg1 |= (BIT_2 | BIT_5);
1182 arg1 |= (esw_cfg->vlan_id << 16);
1184 case QLCNIC_DEL_VLAN:
1185 arg1 |= (BIT_3 | BIT_5);
1186 arg1 &= ~(0x0ffff << 16);
1192 memset(&cmd, 0, sizeof(cmd));
1193 cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH;
1194 cmd.req.arg1 = arg1;
1195 cmd.req.arg2 = arg2;
1196 qlcnic_issue_cmd(adapter, &cmd);
1199 if (err != QLCNIC_RCODE_SUCCESS) {
1200 dev_err(&adapter->pdev->dev,
1201 "Failed to configure eswitch pci func %d\n", pci_func);
1203 dev_info(&adapter->pdev->dev,
1204 "Configured eSwitch for pci func %d\n", pci_func);
1211 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1212 struct qlcnic_esw_func_cfg *esw_cfg)
1218 if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) {
1219 index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func);
1222 phy_port = adapter->npars[index].phy_port;
1224 phy_port = adapter->ahw->physical_port;
1227 arg1 |= (esw_cfg->pci_func << 8);
1228 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1231 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1232 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1233 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1234 esw_cfg->mac_override = !!(arg1 & BIT_7);
1235 esw_cfg->vlan_id = LSW(arg1 >> 16);
1236 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1237 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);