2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
10 static int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
14 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
15 if (adapter->npars[i].pci_func == pci_func)
23 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
29 /* give atleast 1ms for firmware to respond */
32 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
33 return QLCNIC_CDRP_RSP_TIMEOUT;
35 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
36 } while (!QLCNIC_CDRP_IS_RSP(rsp));
42 qlcnic_issue_cmd(struct qlcnic_adapter *adapter, struct qlcnic_cmd_args *cmd)
46 struct pci_dev *pdev = adapter->pdev;
47 struct qlcnic_hardware_context *ahw = adapter->ahw;
49 signature = QLCNIC_CDRP_SIGNATURE_MAKE(ahw->pci_func,
50 adapter->ahw->fw_hal_version);
52 /* Acquire semaphore before accessing CRB */
53 if (qlcnic_api_lock(adapter)) {
54 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
58 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
59 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, cmd->req.arg1);
60 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, cmd->req.arg2);
61 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, cmd->req.arg3);
62 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
63 QLCNIC_CDRP_FORM_CMD(cmd->req.cmd));
65 rsp = qlcnic_poll_rsp(adapter);
67 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
68 dev_err(&pdev->dev, "CDRP response timeout.\n");
69 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
70 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
71 cmd->rsp.cmd = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
72 switch (cmd->rsp.cmd) {
73 case QLCNIC_RCODE_INVALID_ARGS:
74 dev_err(&pdev->dev, "CDRP invalid args: 0x%x.\n",
77 case QLCNIC_RCODE_NOT_SUPPORTED:
78 case QLCNIC_RCODE_NOT_IMPL:
80 "CDRP command not supported: 0x%x.\n",
83 case QLCNIC_RCODE_NOT_PERMITTED:
85 "CDRP requested action not permitted: 0x%x.\n",
88 case QLCNIC_RCODE_INVALID:
90 "CDRP invalid or unknown cmd received: 0x%x.\n",
93 case QLCNIC_RCODE_TIMEOUT:
94 dev_err(&pdev->dev, "CDRP command timeout: 0x%x.\n",
98 dev_err(&pdev->dev, "CDRP command failed: 0x%x.\n",
101 } else if (rsp == QLCNIC_CDRP_RSP_OK) {
102 cmd->rsp.cmd = QLCNIC_RCODE_SUCCESS;
104 cmd->rsp.arg2 = QLCRD32(adapter,
105 QLCNIC_ARG2_CRB_OFFSET);
107 cmd->rsp.arg3 = QLCRD32(adapter,
108 QLCNIC_ARG3_CRB_OFFSET);
111 cmd->rsp.arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
113 /* Release semaphore */
114 qlcnic_api_unlock(adapter);
118 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u32 temp_size)
121 int count = temp_size / sizeof(uint32_t);
123 sum += *temp_buffer++;
125 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
129 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
133 u32 temp_size, version, csum, *template;
135 struct qlcnic_cmd_args cmd;
136 struct qlcnic_hardware_context *ahw;
137 struct qlcnic_dump_template_hdr *tmpl_hdr, *tmp_tmpl;
138 dma_addr_t tmp_addr_t = 0;
141 memset(&cmd, 0, sizeof(cmd));
142 cmd.req.cmd = QLCNIC_CDRP_CMD_TEMP_SIZE;
143 memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
144 qlcnic_issue_cmd(adapter, &cmd);
145 if (cmd.rsp.cmd != QLCNIC_RCODE_SUCCESS) {
146 dev_info(&adapter->pdev->dev,
147 "Can't get template size %d\n", cmd.rsp.cmd);
151 temp_size = cmd.rsp.arg2;
152 version = cmd.rsp.arg3;
156 tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
157 &tmp_addr_t, GFP_KERNEL);
159 dev_err(&adapter->pdev->dev,
160 "Can't get memory for FW dump template\n");
163 memset(&cmd.rsp, 0, sizeof(struct _cdrp_cmd));
164 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_TEMP_HDR;
165 cmd.req.arg1 = LSD(tmp_addr_t);
166 cmd.req.arg2 = MSD(tmp_addr_t);
167 cmd.req.arg3 = temp_size;
168 qlcnic_issue_cmd(adapter, &cmd);
171 if (err != QLCNIC_RCODE_SUCCESS) {
172 dev_err(&adapter->pdev->dev,
173 "Failed to get mini dump template header %d\n", err);
178 ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
179 if (!ahw->fw_dump.tmpl_hdr) {
184 template = (u32 *) ahw->fw_dump.tmpl_hdr;
185 for (i = 0; i < temp_size/sizeof(u32); i++)
186 *template++ = __le32_to_cpu(*tmp_buf++);
188 csum = qlcnic_temp_checksum((u32 *)ahw->fw_dump.tmpl_hdr, temp_size);
190 dev_err(&adapter->pdev->dev,
191 "Template header checksum validation failed\n");
196 tmpl_hdr = ahw->fw_dump.tmpl_hdr;
197 tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
198 ahw->fw_dump.enable = 1;
200 dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
205 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
207 struct qlcnic_cmd_args cmd;
208 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
210 memset(&cmd, 0, sizeof(cmd));
211 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_MTU;
212 cmd.req.arg1 = recv_ctx->context_id;
215 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
216 qlcnic_issue_cmd(adapter, &cmd);
218 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
227 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
230 struct qlcnic_hostrq_rx_ctx *prq;
231 struct qlcnic_cardrsp_rx_ctx *prsp;
232 struct qlcnic_hostrq_rds_ring *prq_rds;
233 struct qlcnic_hostrq_sds_ring *prq_sds;
234 struct qlcnic_cardrsp_rds_ring *prsp_rds;
235 struct qlcnic_cardrsp_sds_ring *prsp_sds;
236 struct qlcnic_host_rds_ring *rds_ring;
237 struct qlcnic_host_sds_ring *sds_ring;
238 struct qlcnic_cmd_args cmd;
240 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
243 u8 i, nrds_rings, nsds_rings;
244 size_t rq_size, rsp_size;
245 u32 cap, reg, val, reg2;
249 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
251 nrds_rings = adapter->max_rds_rings;
252 nsds_rings = adapter->max_sds_rings;
255 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
258 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
261 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
262 &hostrq_phys_addr, GFP_KERNEL);
267 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
268 &cardrsp_phys_addr, GFP_KERNEL);
275 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
277 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
278 | QLCNIC_CAP0_VALIDOFF);
279 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
281 if (adapter->flags & QLCNIC_FW_LRO_MSS_CAP)
282 cap |= QLCNIC_CAP0_LRO_MSS;
284 temp = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
285 prq->valid_field_offset = cpu_to_le16(temp);
286 prq->txrx_sds_binding = nsds_rings - 1;
288 prq->capabilities[0] = cpu_to_le32(cap);
289 prq->host_int_crb_mode =
290 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
291 prq->host_rds_crb_mode =
292 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
294 prq->num_rds_rings = cpu_to_le16(nrds_rings);
295 prq->num_sds_rings = cpu_to_le16(nsds_rings);
296 prq->rds_ring_offset = 0;
298 val = le32_to_cpu(prq->rds_ring_offset) +
299 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
300 prq->sds_ring_offset = cpu_to_le32(val);
302 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
303 le32_to_cpu(prq->rds_ring_offset));
305 for (i = 0; i < nrds_rings; i++) {
307 rds_ring = &recv_ctx->rds_rings[i];
308 rds_ring->producer = 0;
310 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
311 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
312 prq_rds[i].ring_kind = cpu_to_le32(i);
313 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
316 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
317 le32_to_cpu(prq->sds_ring_offset));
319 for (i = 0; i < nsds_rings; i++) {
321 sds_ring = &recv_ctx->sds_rings[i];
322 sds_ring->consumer = 0;
323 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
325 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
326 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
327 prq_sds[i].msi_index = cpu_to_le16(i);
330 phys_addr = hostrq_phys_addr;
331 memset(&cmd, 0, sizeof(cmd));
332 cmd.req.arg1 = (u32) (phys_addr >> 32);
333 cmd.req.arg2 = (u32) (phys_addr & 0xffffffff);
334 cmd.req.arg3 = rq_size;
335 cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_RX_CTX;
336 qlcnic_issue_cmd(adapter, &cmd);
339 dev_err(&adapter->pdev->dev,
340 "Failed to create rx ctx in firmware%d\n", err);
345 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
346 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
348 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
349 rds_ring = &recv_ctx->rds_rings[i];
351 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
352 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
355 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
356 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
358 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
359 sds_ring = &recv_ctx->sds_rings[i];
361 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
362 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
364 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
365 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
368 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
369 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
370 recv_ctx->virt_port = prsp->virt_port;
373 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
376 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
381 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
383 struct qlcnic_cmd_args cmd;
384 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
386 memset(&cmd, 0, sizeof(cmd));
387 cmd.req.arg1 = recv_ctx->context_id;
388 cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
390 cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_RX_CTX;
391 qlcnic_issue_cmd(adapter, &cmd);
393 dev_err(&adapter->pdev->dev,
394 "Failed to destroy rx ctx in firmware\n");
396 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
400 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
402 struct qlcnic_hostrq_tx_ctx *prq;
403 struct qlcnic_hostrq_cds_ring *prq_cds;
404 struct qlcnic_cardrsp_tx_ctx *prsp;
405 void *rq_addr, *rsp_addr;
406 size_t rq_size, rsp_size;
408 struct qlcnic_cmd_args cmd;
411 dma_addr_t rq_phys_addr, rsp_phys_addr;
412 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
414 /* reset host resources */
415 tx_ring->producer = 0;
416 tx_ring->sw_consumer = 0;
417 *(tx_ring->hw_consumer) = 0;
419 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
420 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
421 &rq_phys_addr, GFP_KERNEL);
425 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
426 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
427 &rsp_phys_addr, GFP_KERNEL);
433 memset(rq_addr, 0, rq_size);
436 memset(rsp_addr, 0, rsp_size);
439 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
441 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
443 prq->capabilities[0] = cpu_to_le32(temp);
445 prq->host_int_crb_mode =
446 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
448 prq->interrupt_ctl = 0;
450 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
452 prq_cds = &prq->cds_ring;
454 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
455 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
457 phys_addr = rq_phys_addr;
458 memset(&cmd, 0, sizeof(cmd));
459 cmd.req.arg1 = (u32)(phys_addr >> 32);
460 cmd.req.arg2 = ((u32)phys_addr & 0xffffffff);
461 cmd.req.arg3 = rq_size;
462 cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_TX_CTX;
463 qlcnic_issue_cmd(adapter, &cmd);
466 if (err == QLCNIC_RCODE_SUCCESS) {
467 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
468 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
470 adapter->tx_ring->ctx_id = le16_to_cpu(prsp->context_id);
472 dev_err(&adapter->pdev->dev,
473 "Failed to create tx ctx in firmware%d\n", err);
477 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
481 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
487 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
489 struct qlcnic_cmd_args cmd;
491 memset(&cmd, 0, sizeof(cmd));
492 cmd.req.arg1 = adapter->tx_ring->ctx_id;
493 cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
495 cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_TX_CTX;
496 qlcnic_issue_cmd(adapter, &cmd);
498 dev_err(&adapter->pdev->dev,
499 "Failed to destroy tx ctx in firmware\n");
503 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
505 struct qlcnic_cmd_args cmd;
507 memset(&cmd, 0, sizeof(cmd));
508 cmd.req.arg1 = config;
509 cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIG_PORT;
510 qlcnic_issue_cmd(adapter, &cmd);
515 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
520 struct qlcnic_recv_context *recv_ctx;
521 struct qlcnic_host_rds_ring *rds_ring;
522 struct qlcnic_host_sds_ring *sds_ring;
523 struct qlcnic_host_tx_ring *tx_ring;
525 struct pci_dev *pdev = adapter->pdev;
527 recv_ctx = adapter->recv_ctx;
528 tx_ring = adapter->tx_ring;
530 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
531 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
532 if (tx_ring->hw_consumer == NULL) {
533 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
538 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
539 &tx_ring->phys_addr, GFP_KERNEL);
542 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
547 tx_ring->desc_head = addr;
549 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
550 rds_ring = &recv_ctx->rds_rings[ring];
551 addr = dma_alloc_coherent(&adapter->pdev->dev,
552 RCV_DESC_RINGSIZE(rds_ring),
553 &rds_ring->phys_addr, GFP_KERNEL);
556 "failed to allocate rds ring [%d]\n", ring);
560 rds_ring->desc_head = addr;
564 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
565 sds_ring = &recv_ctx->sds_rings[ring];
567 addr = dma_alloc_coherent(&adapter->pdev->dev,
568 STATUS_DESC_RINGSIZE(sds_ring),
569 &sds_ring->phys_addr, GFP_KERNEL);
572 "failed to allocate sds ring [%d]\n", ring);
576 sds_ring->desc_head = addr;
582 qlcnic_free_hw_resources(adapter);
587 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
591 if (adapter->flags & QLCNIC_NEED_FLR) {
592 pci_reset_function(adapter->pdev);
593 adapter->flags &= ~QLCNIC_NEED_FLR;
596 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
600 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
602 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
606 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
610 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
612 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
613 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
614 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
616 /* Allow dma queues to drain after context reset */
621 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
623 struct qlcnic_recv_context *recv_ctx;
624 struct qlcnic_host_rds_ring *rds_ring;
625 struct qlcnic_host_sds_ring *sds_ring;
626 struct qlcnic_host_tx_ring *tx_ring;
629 recv_ctx = adapter->recv_ctx;
631 tx_ring = adapter->tx_ring;
632 if (tx_ring->hw_consumer != NULL) {
633 dma_free_coherent(&adapter->pdev->dev,
635 tx_ring->hw_consumer,
636 tx_ring->hw_cons_phys_addr);
637 tx_ring->hw_consumer = NULL;
640 if (tx_ring->desc_head != NULL) {
641 dma_free_coherent(&adapter->pdev->dev,
642 TX_DESC_RINGSIZE(tx_ring),
643 tx_ring->desc_head, tx_ring->phys_addr);
644 tx_ring->desc_head = NULL;
647 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
648 rds_ring = &recv_ctx->rds_rings[ring];
650 if (rds_ring->desc_head != NULL) {
651 dma_free_coherent(&adapter->pdev->dev,
652 RCV_DESC_RINGSIZE(rds_ring),
654 rds_ring->phys_addr);
655 rds_ring->desc_head = NULL;
659 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
660 sds_ring = &recv_ctx->sds_rings[ring];
662 if (sds_ring->desc_head != NULL) {
663 dma_free_coherent(&adapter->pdev->dev,
664 STATUS_DESC_RINGSIZE(sds_ring),
666 sds_ring->phys_addr);
667 sds_ring->desc_head = NULL;
673 /* Get MAC address of a NIC partition */
674 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
677 struct qlcnic_cmd_args cmd;
679 memset(&cmd, 0, sizeof(cmd));
680 cmd.req.arg1 = adapter->ahw->pci_func | BIT_8;
681 cmd.req.cmd = QLCNIC_CDRP_CMD_MAC_ADDRESS;
682 cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
683 qlcnic_issue_cmd(adapter, &cmd);
686 if (err == QLCNIC_RCODE_SUCCESS)
687 qlcnic_fetch_mac(cmd.rsp.arg1, cmd.rsp.arg2, 0, mac);
689 dev_err(&adapter->pdev->dev,
690 "Failed to get mac address%d\n", err);
697 /* Get info of a NIC partition */
698 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
699 struct qlcnic_info *npar_info, u8 func_id)
702 dma_addr_t nic_dma_t;
703 struct qlcnic_info_le *nic_info;
705 struct qlcnic_cmd_args cmd;
706 size_t nic_size = sizeof(struct qlcnic_info_le);
708 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
709 &nic_dma_t, GFP_KERNEL);
712 memset(nic_info_addr, 0, nic_size);
714 nic_info = nic_info_addr;
715 memset(&cmd, 0, sizeof(cmd));
716 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_NIC_INFO;
717 cmd.req.arg1 = MSD(nic_dma_t);
718 cmd.req.arg2 = LSD(nic_dma_t);
719 cmd.req.arg3 = (func_id << 16 | nic_size);
720 qlcnic_issue_cmd(adapter, &cmd);
723 if (err == QLCNIC_RCODE_SUCCESS) {
724 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
725 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
726 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
727 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
728 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
729 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
730 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
731 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
732 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
733 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
735 dev_info(&adapter->pdev->dev,
736 "phy port: %d switch_mode: %d,\n"
737 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
738 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
739 npar_info->phys_port, npar_info->switch_mode,
740 npar_info->max_tx_ques, npar_info->max_rx_ques,
741 npar_info->min_tx_bw, npar_info->max_tx_bw,
742 npar_info->max_mtu, npar_info->capabilities);
744 dev_err(&adapter->pdev->dev,
745 "Failed to get nic info%d\n", err);
749 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
754 /* Configure a NIC partition */
755 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
758 dma_addr_t nic_dma_t;
760 struct qlcnic_cmd_args cmd;
761 struct qlcnic_info_le *nic_info;
762 size_t nic_size = sizeof(struct qlcnic_info_le);
764 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
767 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
768 &nic_dma_t, GFP_KERNEL);
772 memset(nic_info_addr, 0, nic_size);
773 nic_info = nic_info_addr;
775 nic_info->pci_func = cpu_to_le16(nic->pci_func);
776 nic_info->op_mode = cpu_to_le16(nic->op_mode);
777 nic_info->phys_port = cpu_to_le16(nic->phys_port);
778 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
779 nic_info->capabilities = cpu_to_le32(nic->capabilities);
780 nic_info->max_mac_filters = nic->max_mac_filters;
781 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
782 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
783 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
784 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
786 memset(&cmd, 0, sizeof(cmd));
787 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_NIC_INFO;
788 cmd.req.arg1 = MSD(nic_dma_t);
789 cmd.req.arg2 = LSD(nic_dma_t);
790 cmd.req.arg3 = ((nic->pci_func << 16) | nic_size);
791 qlcnic_issue_cmd(adapter, &cmd);
794 if (err != QLCNIC_RCODE_SUCCESS) {
795 dev_err(&adapter->pdev->dev,
796 "Failed to set nic info%d\n", err);
800 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
805 /* Get PCI Info of a partition */
806 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
807 struct qlcnic_pci_info *pci_info)
810 struct qlcnic_cmd_args cmd;
811 dma_addr_t pci_info_dma_t;
812 struct qlcnic_pci_info_le *npar;
814 size_t npar_size = sizeof(struct qlcnic_pci_info_le);
815 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
817 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
818 &pci_info_dma_t, GFP_KERNEL);
821 memset(pci_info_addr, 0, pci_size);
823 npar = pci_info_addr;
824 memset(&cmd, 0, sizeof(cmd));
825 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_PCI_INFO;
826 cmd.req.arg1 = MSD(pci_info_dma_t);
827 cmd.req.arg2 = LSD(pci_info_dma_t);
828 cmd.req.arg3 = pci_size;
829 qlcnic_issue_cmd(adapter, &cmd);
832 adapter->ahw->act_pci_func = 0;
833 if (err == QLCNIC_RCODE_SUCCESS) {
834 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
835 pci_info->id = le16_to_cpu(npar->id);
836 pci_info->active = le16_to_cpu(npar->active);
837 pci_info->type = le16_to_cpu(npar->type);
838 if (pci_info->type == QLCNIC_TYPE_NIC)
839 adapter->ahw->act_pci_func++;
840 pci_info->default_port =
841 le16_to_cpu(npar->default_port);
842 pci_info->tx_min_bw =
843 le16_to_cpu(npar->tx_min_bw);
844 pci_info->tx_max_bw =
845 le16_to_cpu(npar->tx_max_bw);
846 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
849 dev_err(&adapter->pdev->dev,
850 "Failed to get PCI Info%d\n", err);
854 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
859 /* Configure eSwitch for port mirroring */
860 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
861 u8 enable_mirroring, u8 pci_func)
865 struct qlcnic_cmd_args cmd;
867 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC ||
868 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
871 arg1 = id | (enable_mirroring ? BIT_4 : 0);
872 arg1 |= pci_func << 8;
874 memset(&cmd, 0, sizeof(cmd));
875 cmd.req.cmd = QLCNIC_CDRP_CMD_SET_PORTMIRRORING;
877 qlcnic_issue_cmd(adapter, &cmd);
880 if (err != QLCNIC_RCODE_SUCCESS) {
881 dev_err(&adapter->pdev->dev,
882 "Failed to configure port mirroring%d on eswitch:%d\n",
885 dev_info(&adapter->pdev->dev,
886 "Configured eSwitch %d for port mirroring:%d\n",
893 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
894 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
896 size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
897 struct qlcnic_esw_stats_le *stats;
898 dma_addr_t stats_dma_t;
901 struct qlcnic_cmd_args cmd;
904 if (esw_stats == NULL)
907 if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) &&
908 (func != adapter->ahw->pci_func)) {
909 dev_err(&adapter->pdev->dev,
910 "Not privilege to query stats for func=%d", func);
914 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
915 &stats_dma_t, GFP_KERNEL);
917 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
920 memset(stats_addr, 0, stats_size);
922 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
923 arg1 |= rx_tx << 15 | stats_size << 16;
925 memset(&cmd, 0, sizeof(cmd));
926 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
928 cmd.req.arg2 = MSD(stats_dma_t);
929 cmd.req.arg3 = LSD(stats_dma_t);
930 qlcnic_issue_cmd(adapter, &cmd);
935 esw_stats->context_id = le16_to_cpu(stats->context_id);
936 esw_stats->version = le16_to_cpu(stats->version);
937 esw_stats->size = le16_to_cpu(stats->size);
938 esw_stats->multicast_frames =
939 le64_to_cpu(stats->multicast_frames);
940 esw_stats->broadcast_frames =
941 le64_to_cpu(stats->broadcast_frames);
942 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
943 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
944 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
945 esw_stats->errors = le64_to_cpu(stats->errors);
946 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
949 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
954 /* This routine will retrieve the MAC statistics from firmware */
955 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
956 struct qlcnic_mac_statistics *mac_stats)
958 struct qlcnic_mac_statistics_le *stats;
959 struct qlcnic_cmd_args cmd;
960 size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
961 dma_addr_t stats_dma_t;
965 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
966 &stats_dma_t, GFP_KERNEL);
968 dev_err(&adapter->pdev->dev,
969 "%s: Unable to allocate memory.\n", __func__);
972 memset(stats_addr, 0, stats_size);
973 memset(&cmd, 0, sizeof(cmd));
974 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_MAC_STATS;
975 cmd.req.arg1 = stats_size << 16;
976 cmd.req.arg2 = MSD(stats_dma_t);
977 cmd.req.arg3 = LSD(stats_dma_t);
979 qlcnic_issue_cmd(adapter, &cmd);
984 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
985 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
986 mac_stats->mac_tx_mcast_pkts =
987 le64_to_cpu(stats->mac_tx_mcast_pkts);
988 mac_stats->mac_tx_bcast_pkts =
989 le64_to_cpu(stats->mac_tx_bcast_pkts);
990 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
991 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
992 mac_stats->mac_rx_mcast_pkts =
993 le64_to_cpu(stats->mac_rx_mcast_pkts);
994 mac_stats->mac_rx_length_error =
995 le64_to_cpu(stats->mac_rx_length_error);
996 mac_stats->mac_rx_length_small =
997 le64_to_cpu(stats->mac_rx_length_small);
998 mac_stats->mac_rx_length_large =
999 le64_to_cpu(stats->mac_rx_length_large);
1000 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
1001 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
1002 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
1005 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1010 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1011 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1013 struct __qlcnic_esw_statistics port_stats;
1017 if (esw_stats == NULL)
1019 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1021 if (adapter->npars == NULL)
1024 memset(esw_stats, 0, sizeof(u64));
1025 esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1026 esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1027 esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1028 esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1029 esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1030 esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1031 esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
1032 esw_stats->context_id = eswitch;
1034 for (i = 0; i < adapter->ahw->act_pci_func; i++) {
1035 if (adapter->npars[i].phy_port != eswitch)
1038 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1039 if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func,
1040 rx_tx, &port_stats))
1043 esw_stats->size = port_stats.size;
1044 esw_stats->version = port_stats.version;
1045 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1046 port_stats.unicast_frames);
1047 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1048 port_stats.multicast_frames);
1049 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1050 port_stats.broadcast_frames);
1051 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1052 port_stats.dropped_frames);
1053 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1055 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1056 port_stats.local_frames);
1057 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1058 port_stats.numbytes);
1064 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1065 const u8 port, const u8 rx_tx)
1069 struct qlcnic_cmd_args cmd;
1071 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1074 if (func_esw == QLCNIC_STATS_PORT) {
1075 if (port >= QLCNIC_MAX_PCI_FUNC)
1077 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1078 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1084 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1087 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1088 arg1 |= BIT_14 | rx_tx << 15;
1090 memset(&cmd, 0, sizeof(cmd));
1091 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
1092 cmd.req.arg1 = arg1;
1093 qlcnic_issue_cmd(adapter, &cmd);
1097 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
1098 "rx_ctx=%d\n", func_esw, port, rx_tx);
1103 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1104 u32 *arg1, u32 *arg2)
1107 struct qlcnic_cmd_args cmd;
1109 pci_func = (*arg1 >> 8);
1111 cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG;
1112 cmd.req.arg1 = *arg1;
1113 cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
1114 qlcnic_issue_cmd(adapter, &cmd);
1115 *arg1 = cmd.rsp.arg1;
1116 *arg2 = cmd.rsp.arg2;
1119 if (err == QLCNIC_RCODE_SUCCESS) {
1120 dev_info(&adapter->pdev->dev,
1121 "eSwitch port config for pci func %d\n", pci_func);
1123 dev_err(&adapter->pdev->dev,
1124 "Failed to get eswitch port config for pci func %d\n",
1129 /* Configure eSwitch port
1130 op_mode = 0 for setting default port behavior
1131 op_mode = 1 for setting vlan id
1132 op_mode = 2 for deleting vlan id
1133 op_type = 0 for vlan_id
1134 op_type = 1 for port vlan_id
1136 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1137 struct qlcnic_esw_func_cfg *esw_cfg)
1139 int err = -EIO, index;
1141 struct qlcnic_cmd_args cmd;
1144 if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1146 pci_func = esw_cfg->pci_func;
1147 index = qlcnic_is_valid_nic_func(adapter, pci_func);
1150 arg1 = (adapter->npars[index].phy_port & BIT_0);
1151 arg1 |= (pci_func << 8);
1153 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1155 arg1 &= ~(0x0ff << 8);
1156 arg1 |= (pci_func << 8);
1157 arg1 &= ~(BIT_2 | BIT_3);
1158 switch (esw_cfg->op_mode) {
1159 case QLCNIC_PORT_DEFAULTS:
1160 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1161 arg2 |= (BIT_0 | BIT_1);
1162 if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1163 arg2 |= (BIT_2 | BIT_3);
1164 if (!(esw_cfg->discard_tagged))
1166 if (!(esw_cfg->promisc_mode))
1168 if (!(esw_cfg->mac_override))
1170 if (!(esw_cfg->mac_anti_spoof))
1172 if (!(esw_cfg->offload_flags & BIT_0))
1173 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1174 if (!(esw_cfg->offload_flags & BIT_1))
1176 if (!(esw_cfg->offload_flags & BIT_2))
1179 case QLCNIC_ADD_VLAN:
1180 arg1 |= (BIT_2 | BIT_5);
1181 arg1 |= (esw_cfg->vlan_id << 16);
1183 case QLCNIC_DEL_VLAN:
1184 arg1 |= (BIT_3 | BIT_5);
1185 arg1 &= ~(0x0ffff << 16);
1191 memset(&cmd, 0, sizeof(cmd));
1192 cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH;
1193 cmd.req.arg1 = arg1;
1194 cmd.req.arg2 = arg2;
1195 qlcnic_issue_cmd(adapter, &cmd);
1198 if (err != QLCNIC_RCODE_SUCCESS) {
1199 dev_err(&adapter->pdev->dev,
1200 "Failed to configure eswitch pci func %d\n", pci_func);
1202 dev_info(&adapter->pdev->dev,
1203 "Configured eSwitch for pci func %d\n", pci_func);
1210 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1211 struct qlcnic_esw_func_cfg *esw_cfg)
1217 if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) {
1218 index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func);
1221 phy_port = adapter->npars[index].phy_port;
1223 phy_port = adapter->ahw->physical_port;
1226 arg1 |= (esw_cfg->pci_func << 8);
1227 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1230 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1231 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1232 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1233 esw_cfg->mac_override = !!(arg1 & BIT_7);
1234 esw_cfg->vlan_id = LSW(arg1 >> 16);
1235 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1236 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);