drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c)  2009-2010 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic.h"
   9
  10 static u32
  11 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
  12 {
  13         u32 rsp;
  14         int timeout = 0;
  15
  16         do {
  17                 /* give atleast 1ms for firmware to respond */
  18                 mdelay(1);
  19
  20                 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
  21                         return QLCNIC_CDRP_RSP_TIMEOUT;
  22
  23                 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
  24         } while (!QLCNIC_CDRP_IS_RSP(rsp));
  25
  26         return rsp;
  27 }
  28
  29 void
  30 qlcnic_issue_cmd(struct qlcnic_adapter *adapter, struct qlcnic_cmd_args *cmd)
  31 {
  32         u32 rsp;
  33         u32 signature;
  34         struct pci_dev *pdev = adapter->pdev;
  35         struct qlcnic_hardware_context *ahw = adapter->ahw;
  36
  37         signature = QLCNIC_CDRP_SIGNATURE_MAKE(ahw->pci_func,
  38                 adapter->fw_hal_version);
  39
  40         /* Acquire semaphore before accessing CRB */
  41         if (qlcnic_api_lock(adapter)) {
  42                 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
  43                 return;
  44         }
  45
  46         QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
  47         QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, cmd->req.arg1);
  48         QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, cmd->req.arg2);
  49         QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, cmd->req.arg3);
  50         QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
  51                 QLCNIC_CDRP_FORM_CMD(cmd->req.cmd));
  52
  53         rsp = qlcnic_poll_rsp(adapter);
  54
  55         if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
  56                 dev_err(&pdev->dev, "CDRP response timeout.\n");
  57                 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
  58         } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
  59                 cmd->rsp.cmd = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
  60                 switch (cmd->rsp.cmd) {
  61                 case QLCNIC_RCODE_INVALID_ARGS:
  62                         dev_err(&pdev->dev, "CDRP invalid args: 0x%x.\n",
  63                                 cmd->rsp.cmd);
  64                         break;
  65                 case QLCNIC_RCODE_NOT_SUPPORTED:
  66                 case QLCNIC_RCODE_NOT_IMPL:
  67                         dev_err(&pdev->dev,
  68                                 "CDRP command not supported: 0x%x.\n",
  69                                 cmd->rsp.cmd);
  70                         break;
  71                 case QLCNIC_RCODE_NOT_PERMITTED:
  72                         dev_err(&pdev->dev,
  73                                 "CDRP requested action not permitted: 0x%x.\n",
  74                                 cmd->rsp.cmd);
  75                         break;
  76                 case QLCNIC_RCODE_INVALID:
  77                         dev_err(&pdev->dev,
  78                                 "CDRP invalid or unknown cmd received: 0x%x.\n",
  79                                 cmd->rsp.cmd);
  80                         break;
  81                 case QLCNIC_RCODE_TIMEOUT:
  82                         dev_err(&pdev->dev, "CDRP command timeout: 0x%x.\n",
  83                                 cmd->rsp.cmd);
  84                         break;
  85                 default:
  86                         dev_err(&pdev->dev, "CDRP command failed: 0x%x.\n",
  87                                 cmd->rsp.cmd);
  88                 }
  89         } else if (rsp == QLCNIC_CDRP_RSP_OK) {
  90                 cmd->rsp.cmd = QLCNIC_RCODE_SUCCESS;
  91                 if (cmd->rsp.arg2)
  92                         cmd->rsp.arg2 = QLCRD32(adapter,
  93                                 QLCNIC_ARG2_CRB_OFFSET);
  94                 if (cmd->rsp.arg3)
  95                         cmd->rsp.arg3 = QLCRD32(adapter,
  96                                 QLCNIC_ARG3_CRB_OFFSET);
  97         }
  98         if (cmd->rsp.arg1)
  99                 cmd->rsp.arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
 100
 101         /* Release semaphore */
 102         qlcnic_api_unlock(adapter);
 103
 104 }
 105
 106 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u32 temp_size)
 107 {
 108         uint64_t sum = 0;
 109         int count = temp_size / sizeof(uint32_t);
 110         while (count-- > 0)
 111                 sum += *temp_buffer++;
 112         while (sum >> 32)
 113                 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
 114         return ~sum;
 115 }
 116
 117 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
 118 {
 119         int err, i;
 120         void *tmp_addr;
 121         u32 temp_size, version, csum, *template;
 122         __le32 *tmp_buf;
 123         struct qlcnic_cmd_args cmd;
 124         struct qlcnic_hardware_context *ahw;
 125         struct qlcnic_dump_template_hdr *tmpl_hdr, *tmp_tmpl;
 126         dma_addr_t tmp_addr_t = 0;
 127
 128         ahw = adapter->ahw;
 129         memset(&cmd, 0, sizeof(cmd));
 130         cmd.req.cmd = QLCNIC_CDRP_CMD_TEMP_SIZE;
 131         memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
 132         qlcnic_issue_cmd(adapter, &cmd);
 133         if (cmd.rsp.cmd != QLCNIC_RCODE_SUCCESS) {
 134                 dev_info(&adapter->pdev->dev,
 135                         "Can't get template size %d\n", cmd.rsp.cmd);
 136                 err = -EIO;
 137                 return err;
 138         }
 139         temp_size = cmd.rsp.arg2;
 140         version = cmd.rsp.arg3;
 141         if (!temp_size)
 142                 return -EIO;
 143
 144         tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
 145                         &tmp_addr_t, GFP_KERNEL);
 146         if (!tmp_addr) {
 147                 dev_err(&adapter->pdev->dev,
 148                         "Can't get memory for FW dump template\n");
 149                 return -ENOMEM;
 150         }
 151         memset(&cmd.rsp, 0, sizeof(struct _cdrp_cmd));
 152         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_TEMP_HDR;
 153         cmd.req.arg1 = LSD(tmp_addr_t);
 154         cmd.req.arg2 = MSD(tmp_addr_t);
 155         cmd.req.arg3 = temp_size;
 156         qlcnic_issue_cmd(adapter, &cmd);
 157
 158         err = cmd.rsp.cmd;
 159         if (err != QLCNIC_RCODE_SUCCESS) {
 160                 dev_err(&adapter->pdev->dev,
 161                         "Failed to get mini dump template header %d\n", err);
 162                 err = -EIO;
 163                 goto error;
 164         }
 165         tmp_tmpl = tmp_addr;
 166         ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
 167         if (!ahw->fw_dump.tmpl_hdr) {
 168                 err = -EIO;
 169                 goto error;
 170         }
 171         tmp_buf = tmp_addr;
 172         template = (u32 *) ahw->fw_dump.tmpl_hdr;
 173         for (i = 0; i < temp_size/sizeof(u32); i++)
 174                 *template++ = __le32_to_cpu(*tmp_buf++);
 175
 176         csum = qlcnic_temp_checksum((u32 *)ahw->fw_dump.tmpl_hdr, temp_size);
 177         if (csum) {
 178                 dev_err(&adapter->pdev->dev,
 179                         "Template header checksum validation failed\n");
 180                 err = -EIO;
 181                 goto error;
 182         }
 183
 184         tmpl_hdr = ahw->fw_dump.tmpl_hdr;
 185         tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
 186         ahw->fw_dump.enable = 1;
 187 error:
 188         dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
 189         return err;
 190 }
 191
 192 int
 193 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
 194 {
 195         struct qlcnic_cmd_args cmd;
 196         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
 197
 198         memset(&cmd, 0, sizeof(cmd));
 199         cmd.req.cmd = QLCNIC_CDRP_CMD_SET_MTU;
 200         cmd.req.arg1 = recv_ctx->context_id;
 201         cmd.req.arg2 = mtu;
 202         cmd.req.arg3 = 0;
 203         if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
 204                 qlcnic_issue_cmd(adapter, &cmd);
 205                 if (cmd.rsp.cmd) {
 206                         dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
 207                         return -EIO;
 208                 }
 209         }
 210
 211         return 0;
 212 }
 213
 214 static int
 215 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
 216 {
 217         void *addr;
 218         struct qlcnic_hostrq_rx_ctx *prq;
 219         struct qlcnic_cardrsp_rx_ctx *prsp;
 220         struct qlcnic_hostrq_rds_ring *prq_rds;
 221         struct qlcnic_hostrq_sds_ring *prq_sds;
 222         struct qlcnic_cardrsp_rds_ring *prsp_rds;
 223         struct qlcnic_cardrsp_sds_ring *prsp_sds;
 224         struct qlcnic_host_rds_ring *rds_ring;
 225         struct qlcnic_host_sds_ring *sds_ring;
 226         struct qlcnic_cmd_args cmd;
 227
 228         dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
 229         u64 phys_addr;
 230
 231         u8 i, nrds_rings, nsds_rings;
 232         size_t rq_size, rsp_size;
 233         u32 cap, reg, val, reg2;
 234         int err;
 235         u16 temp;
 236
 237         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
 238
 239         nrds_rings = adapter->max_rds_rings;
 240         nsds_rings = adapter->max_sds_rings;
 241
 242         rq_size =
 243                 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
 244                                                 nsds_rings);
 245         rsp_size =
 246                 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
 247                                                 nsds_rings);
 248
 249         addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
 250                         &hostrq_phys_addr, GFP_KERNEL);
 251         if (addr == NULL)
 252                 return -ENOMEM;
 253         prq = addr;
 254
 255         addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
 256                         &cardrsp_phys_addr, GFP_KERNEL);
 257         if (addr == NULL) {
 258                 err = -ENOMEM;
 259                 goto out_free_rq;
 260         }
 261         prsp = addr;
 262
 263         prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
 264
 265         cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
 266                                                 | QLCNIC_CAP0_VALIDOFF);
 267         cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
 268
 269         if (adapter->flags & QLCNIC_FW_LRO_MSS_CAP)
 270                 cap |= QLCNIC_CAP0_LRO_MSS;
 271
 272         temp = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
 273         prq->valid_field_offset = cpu_to_le16(temp);
 274         prq->txrx_sds_binding = nsds_rings - 1;
 275
 276         prq->capabilities[0] = cpu_to_le32(cap);
 277         prq->host_int_crb_mode =
 278                 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
 279         prq->host_rds_crb_mode =
 280                 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
 281
 282         prq->num_rds_rings = cpu_to_le16(nrds_rings);
 283         prq->num_sds_rings = cpu_to_le16(nsds_rings);
 284         prq->rds_ring_offset = 0;
 285
 286         val = le32_to_cpu(prq->rds_ring_offset) +
 287                 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
 288         prq->sds_ring_offset = cpu_to_le32(val);
 289
 290         prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
 291                         le32_to_cpu(prq->rds_ring_offset));
 292
 293         for (i = 0; i < nrds_rings; i++) {
 294
 295                 rds_ring = &recv_ctx->rds_rings[i];
 296                 rds_ring->producer = 0;
 297
 298                 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
 299                 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
 300                 prq_rds[i].ring_kind = cpu_to_le32(i);
 301                 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
 302         }
 303
 304         prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
 305                         le32_to_cpu(prq->sds_ring_offset));
 306
 307         for (i = 0; i < nsds_rings; i++) {
 308
 309                 sds_ring = &recv_ctx->sds_rings[i];
 310                 sds_ring->consumer = 0;
 311                 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
 312
 313                 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
 314                 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
 315                 prq_sds[i].msi_index = cpu_to_le16(i);
 316         }
 317
 318         phys_addr = hostrq_phys_addr;
 319         memset(&cmd, 0, sizeof(cmd));
 320         cmd.req.arg1 = (u32) (phys_addr >> 32);
 321         cmd.req.arg2 = (u32) (phys_addr & 0xffffffff);
 322         cmd.req.arg3 = rq_size;
 323         cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_RX_CTX;
 324         qlcnic_issue_cmd(adapter, &cmd);
 325         err = cmd.rsp.cmd;
 326         if (err) {
 327                 dev_err(&adapter->pdev->dev,
 328                         "Failed to create rx ctx in firmware%d\n", err);
 329                 goto out_free_rsp;
 330         }
 331
 332
 333         prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
 334                          &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
 335
 336         for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
 337                 rds_ring = &recv_ctx->rds_rings[i];
 338
 339                 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
 340                 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
 341         }
 342
 343         prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
 344                         &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
 345
 346         for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
 347                 sds_ring = &recv_ctx->sds_rings[i];
 348
 349                 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
 350                 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
 351
 352                 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
 353                 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
 354         }
 355
 356         recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
 357         recv_ctx->context_id = le16_to_cpu(prsp->context_id);
 358         recv_ctx->virt_port = prsp->virt_port;
 359
 360 out_free_rsp:
 361         dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
 362                 cardrsp_phys_addr);
 363 out_free_rq:
 364         dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
 365         return err;
 366 }
 367
 368 static void
 369 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
 370 {
 371         struct qlcnic_cmd_args cmd;
 372         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
 373
 374         memset(&cmd, 0, sizeof(cmd));
 375         cmd.req.arg1 = recv_ctx->context_id;
 376         cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
 377         cmd.req.arg3 = 0;
 378         cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_RX_CTX;
 379         qlcnic_issue_cmd(adapter, &cmd);
 380         if (cmd.rsp.cmd)
 381                 dev_err(&adapter->pdev->dev,
 382                         "Failed to destroy rx ctx in firmware\n");
 383
 384         recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
 385 }
 386
 387 static int
 388 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
 389 {
 390         struct qlcnic_hostrq_tx_ctx     *prq;
 391         struct qlcnic_hostrq_cds_ring   *prq_cds;
 392         struct qlcnic_cardrsp_tx_ctx    *prsp;
 393         void    *rq_addr, *rsp_addr;
 394         size_t  rq_size, rsp_size;
 395         u32     temp;
 396         struct qlcnic_cmd_args cmd;
 397         int     err;
 398         u64     phys_addr;
 399         dma_addr_t      rq_phys_addr, rsp_phys_addr;
 400         struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
 401
 402         /* reset host resources */
 403         tx_ring->producer = 0;
 404         tx_ring->sw_consumer = 0;
 405         *(tx_ring->hw_consumer) = 0;
 406
 407         rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
 408         rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
 409                         &rq_phys_addr, GFP_KERNEL);
 410         if (!rq_addr)
 411                 return -ENOMEM;
 412
 413         rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
 414         rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
 415                         &rsp_phys_addr, GFP_KERNEL);
 416         if (!rsp_addr) {
 417                 err = -ENOMEM;
 418                 goto out_free_rq;
 419         }
 420
 421         memset(rq_addr, 0, rq_size);
 422         prq = rq_addr;
 423
 424         memset(rsp_addr, 0, rsp_size);
 425         prsp = rsp_addr;
 426
 427         prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
 428
 429         temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
 430                                         QLCNIC_CAP0_LSO);
 431         prq->capabilities[0] = cpu_to_le32(temp);
 432
 433         prq->host_int_crb_mode =
 434                 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
 435
 436         prq->interrupt_ctl = 0;
 437         prq->msi_index = 0;
 438         prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
 439
 440         prq_cds = &prq->cds_ring;
 441
 442         prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
 443         prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
 444
 445         phys_addr = rq_phys_addr;
 446         memset(&cmd, 0, sizeof(cmd));
 447         cmd.req.arg1 = (u32)(phys_addr >> 32);
 448         cmd.req.arg2 = ((u32)phys_addr & 0xffffffff);
 449         cmd.req.arg3 = rq_size;
 450         cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_TX_CTX;
 451         qlcnic_issue_cmd(adapter, &cmd);
 452         err = cmd.rsp.cmd;
 453
 454         if (err == QLCNIC_RCODE_SUCCESS) {
 455                 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
 456                 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
 457
 458                 adapter->tx_context_id =
 459                         le16_to_cpu(prsp->context_id);
 460         } else {
 461                 dev_err(&adapter->pdev->dev,
 462                         "Failed to create tx ctx in firmware%d\n", err);
 463                 err = -EIO;
 464         }
 465
 466         dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
 467                 rsp_phys_addr);
 468
 469 out_free_rq:
 470         dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
 471
 472         return err;
 473 }
 474
 475 static void
 476 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
 477 {
 478         struct qlcnic_cmd_args cmd;
 479
 480         memset(&cmd, 0, sizeof(cmd));
 481         cmd.req.arg1 = adapter->tx_context_id;
 482         cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
 483         cmd.req.arg3 = 0;
 484         cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_TX_CTX;
 485         qlcnic_issue_cmd(adapter, &cmd);
 486         if (cmd.rsp.cmd)
 487                 dev_err(&adapter->pdev->dev,
 488                         "Failed to destroy tx ctx in firmware\n");
 489 }
 490
 491 int
 492 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
 493 {
 494         struct qlcnic_cmd_args cmd;
 495
 496         memset(&cmd, 0, sizeof(cmd));
 497         cmd.req.arg1 = config;
 498         cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIG_PORT;
 499         qlcnic_issue_cmd(adapter, &cmd);
 500
 501         return cmd.rsp.cmd;
 502 }
 503
 504 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
 505 {
 506         void *addr;
 507         int err;
 508         int ring;
 509         struct qlcnic_recv_context *recv_ctx;
 510         struct qlcnic_host_rds_ring *rds_ring;
 511         struct qlcnic_host_sds_ring *sds_ring;
 512         struct qlcnic_host_tx_ring *tx_ring;
 513
 514         struct pci_dev *pdev = adapter->pdev;
 515
 516         recv_ctx = adapter->recv_ctx;
 517         tx_ring = adapter->tx_ring;
 518
 519         tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
 520                 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
 521         if (tx_ring->hw_consumer == NULL) {
 522                 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
 523                 return -ENOMEM;
 524         }
 525
 526         /* cmd desc ring */
 527         addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
 528                         &tx_ring->phys_addr, GFP_KERNEL);
 529
 530         if (addr == NULL) {
 531                 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
 532                 err = -ENOMEM;
 533                 goto err_out_free;
 534         }
 535
 536         tx_ring->desc_head = addr;
 537
 538         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 539                 rds_ring = &recv_ctx->rds_rings[ring];
 540                 addr = dma_alloc_coherent(&adapter->pdev->dev,
 541                                 RCV_DESC_RINGSIZE(rds_ring),
 542                                 &rds_ring->phys_addr, GFP_KERNEL);
 543                 if (addr == NULL) {
 544                         dev_err(&pdev->dev,
 545                                 "failed to allocate rds ring [%d]\n", ring);
 546                         err = -ENOMEM;
 547                         goto err_out_free;
 548                 }
 549                 rds_ring->desc_head = addr;
 550
 551         }
 552
 553         for (ring = 0; ring < adapter->max_sds_rings; ring++) {
 554                 sds_ring = &recv_ctx->sds_rings[ring];
 555
 556                 addr = dma_alloc_coherent(&adapter->pdev->dev,
 557                                 STATUS_DESC_RINGSIZE(sds_ring),
 558                                 &sds_ring->phys_addr, GFP_KERNEL);
 559                 if (addr == NULL) {
 560                         dev_err(&pdev->dev,
 561                                 "failed to allocate sds ring [%d]\n", ring);
 562                         err = -ENOMEM;
 563                         goto err_out_free;
 564                 }
 565                 sds_ring->desc_head = addr;
 566         }
 567
 568         return 0;
 569
 570 err_out_free:
 571         qlcnic_free_hw_resources(adapter);
 572         return err;
 573 }
 574
 575
 576 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
 577 {
 578         int err;
 579
 580         if (adapter->flags & QLCNIC_NEED_FLR) {
 581                 pci_reset_function(adapter->pdev);
 582                 adapter->flags &= ~QLCNIC_NEED_FLR;
 583         }
 584
 585         err = qlcnic_fw_cmd_create_rx_ctx(adapter);
 586         if (err)
 587                 return err;
 588
 589         err = qlcnic_fw_cmd_create_tx_ctx(adapter);
 590         if (err) {
 591                 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
 592                 return err;
 593         }
 594
 595         set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
 596         return 0;
 597 }
 598
 599 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
 600 {
 601         if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
 602                 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
 603                 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
 604
 605                 /* Allow dma queues to drain after context reset */
 606                 mdelay(20);
 607         }
 608 }
 609
 610 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
 611 {
 612         struct qlcnic_recv_context *recv_ctx;
 613         struct qlcnic_host_rds_ring *rds_ring;
 614         struct qlcnic_host_sds_ring *sds_ring;
 615         struct qlcnic_host_tx_ring *tx_ring;
 616         int ring;
 617
 618         recv_ctx = adapter->recv_ctx;
 619
 620         tx_ring = adapter->tx_ring;
 621         if (tx_ring->hw_consumer != NULL) {
 622                 dma_free_coherent(&adapter->pdev->dev,
 623                                 sizeof(u32),
 624                                 tx_ring->hw_consumer,
 625                                 tx_ring->hw_cons_phys_addr);
 626                 tx_ring->hw_consumer = NULL;
 627         }
 628
 629         if (tx_ring->desc_head != NULL) {
 630                 dma_free_coherent(&adapter->pdev->dev,
 631                                 TX_DESC_RINGSIZE(tx_ring),
 632                                 tx_ring->desc_head, tx_ring->phys_addr);
 633                 tx_ring->desc_head = NULL;
 634         }
 635
 636         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 637                 rds_ring = &recv_ctx->rds_rings[ring];
 638
 639                 if (rds_ring->desc_head != NULL) {
 640                         dma_free_coherent(&adapter->pdev->dev,
 641                                         RCV_DESC_RINGSIZE(rds_ring),
 642                                         rds_ring->desc_head,
 643                                         rds_ring->phys_addr);
 644                         rds_ring->desc_head = NULL;
 645                 }
 646         }
 647
 648         for (ring = 0; ring < adapter->max_sds_rings; ring++) {
 649                 sds_ring = &recv_ctx->sds_rings[ring];
 650
 651                 if (sds_ring->desc_head != NULL) {
 652                         dma_free_coherent(&adapter->pdev->dev,
 653                                 STATUS_DESC_RINGSIZE(sds_ring),
 654                                 sds_ring->desc_head,
 655                                 sds_ring->phys_addr);
 656                         sds_ring->desc_head = NULL;
 657                 }
 658         }
 659 }
 660
 661
 662 /* Get MAC address of a NIC partition */
 663 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
 664 {
 665         int err;
 666         struct qlcnic_cmd_args cmd;
 667
 668         memset(&cmd, 0, sizeof(cmd));
 669         cmd.req.arg1 = adapter->ahw->pci_func | BIT_8;
 670         cmd.req.cmd = QLCNIC_CDRP_CMD_MAC_ADDRESS;
 671         cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
 672         qlcnic_issue_cmd(adapter, &cmd);
 673         err = cmd.rsp.cmd;
 674
 675         if (err == QLCNIC_RCODE_SUCCESS)
 676                 qlcnic_fetch_mac(cmd.rsp.arg1, cmd.rsp.arg2, 0, mac);
 677         else {
 678                 dev_err(&adapter->pdev->dev,
 679                         "Failed to get mac address%d\n", err);
 680                 err = -EIO;
 681         }
 682
 683         return err;
 684 }
 685
 686 /* Get info of a NIC partition */
 687 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
 688                                 struct qlcnic_info *npar_info, u8 func_id)
 689 {
 690         int     err;
 691         dma_addr_t nic_dma_t;
 692         struct qlcnic_info_le *nic_info;
 693         void *nic_info_addr;
 694         struct qlcnic_cmd_args cmd;
 695         size_t  nic_size = sizeof(struct qlcnic_info_le);
 696
 697         nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
 698                                 &nic_dma_t, GFP_KERNEL);
 699         if (!nic_info_addr)
 700                 return -ENOMEM;
 701         memset(nic_info_addr, 0, nic_size);
 702
 703         nic_info = nic_info_addr;
 704         memset(&cmd, 0, sizeof(cmd));
 705         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_NIC_INFO;
 706         cmd.req.arg1 = MSD(nic_dma_t);
 707         cmd.req.arg2 = LSD(nic_dma_t);
 708         cmd.req.arg3 = (func_id << 16 | nic_size);
 709         qlcnic_issue_cmd(adapter, &cmd);
 710         err = cmd.rsp.cmd;
 711
 712         if (err == QLCNIC_RCODE_SUCCESS) {
 713                 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
 714                 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
 715                 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
 716                 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
 717                 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
 718                 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
 719                 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
 720                 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
 721                 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
 722                 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
 723
 724                 dev_info(&adapter->pdev->dev,
 725                         "phy port: %d switch_mode: %d,\n"
 726                         "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
 727                         "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
 728                         npar_info->phys_port, npar_info->switch_mode,
 729                         npar_info->max_tx_ques, npar_info->max_rx_ques,
 730                         npar_info->min_tx_bw, npar_info->max_tx_bw,
 731                         npar_info->max_mtu, npar_info->capabilities);
 732         } else {
 733                 dev_err(&adapter->pdev->dev,
 734                         "Failed to get nic info%d\n", err);
 735                 err = -EIO;
 736         }
 737
 738         dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
 739                 nic_dma_t);
 740         return err;
 741 }
 742
 743 /* Configure a NIC partition */
 744 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
 745 {
 746         int err = -EIO;
 747         dma_addr_t nic_dma_t;
 748         void *nic_info_addr;
 749         struct qlcnic_cmd_args cmd;
 750         struct qlcnic_info_le *nic_info;
 751         size_t nic_size = sizeof(struct qlcnic_info_le);
 752
 753         if (adapter->op_mode != QLCNIC_MGMT_FUNC)
 754                 return err;
 755
 756         nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
 757                         &nic_dma_t, GFP_KERNEL);
 758         if (!nic_info_addr)
 759                 return -ENOMEM;
 760
 761         memset(nic_info_addr, 0, nic_size);
 762         nic_info = nic_info_addr;
 763
 764         nic_info->pci_func = cpu_to_le16(nic->pci_func);
 765         nic_info->op_mode = cpu_to_le16(nic->op_mode);
 766         nic_info->phys_port = cpu_to_le16(nic->phys_port);
 767         nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
 768         nic_info->capabilities = cpu_to_le32(nic->capabilities);
 769         nic_info->max_mac_filters = nic->max_mac_filters;
 770         nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
 771         nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
 772         nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
 773         nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
 774
 775         memset(&cmd, 0, sizeof(cmd));
 776         cmd.req.cmd = QLCNIC_CDRP_CMD_SET_NIC_INFO;
 777         cmd.req.arg1 = MSD(nic_dma_t);
 778         cmd.req.arg2 = LSD(nic_dma_t);
 779         cmd.req.arg3 = ((nic->pci_func << 16) | nic_size);
 780         qlcnic_issue_cmd(adapter, &cmd);
 781         err = cmd.rsp.cmd;
 782
 783         if (err != QLCNIC_RCODE_SUCCESS) {
 784                 dev_err(&adapter->pdev->dev,
 785                         "Failed to set nic info%d\n", err);
 786                 err = -EIO;
 787         }
 788
 789         dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
 790                 nic_dma_t);
 791         return err;
 792 }
 793
 794 /* Get PCI Info of a partition */
 795 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
 796                                 struct qlcnic_pci_info *pci_info)
 797 {
 798         int err = 0, i;
 799         struct qlcnic_cmd_args cmd;
 800         dma_addr_t pci_info_dma_t;
 801         struct qlcnic_pci_info_le *npar;
 802         void *pci_info_addr;
 803         size_t npar_size = sizeof(struct qlcnic_pci_info_le);
 804         size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
 805
 806         pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
 807                         &pci_info_dma_t, GFP_KERNEL);
 808         if (!pci_info_addr)
 809                 return -ENOMEM;
 810         memset(pci_info_addr, 0, pci_size);
 811
 812         npar = pci_info_addr;
 813         memset(&cmd, 0, sizeof(cmd));
 814         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_PCI_INFO;
 815         cmd.req.arg1 = MSD(pci_info_dma_t);
 816         cmd.req.arg2 = LSD(pci_info_dma_t);
 817         cmd.req.arg3 = pci_size;
 818         qlcnic_issue_cmd(adapter, &cmd);
 819         err = cmd.rsp.cmd;
 820
 821         if (err == QLCNIC_RCODE_SUCCESS) {
 822                 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
 823                         pci_info->id = le16_to_cpu(npar->id);
 824                         pci_info->active = le16_to_cpu(npar->active);
 825                         pci_info->type = le16_to_cpu(npar->type);
 826                         pci_info->default_port =
 827                                 le16_to_cpu(npar->default_port);
 828                         pci_info->tx_min_bw =
 829                                 le16_to_cpu(npar->tx_min_bw);
 830                         pci_info->tx_max_bw =
 831                                 le16_to_cpu(npar->tx_max_bw);
 832                         memcpy(pci_info->mac, npar->mac, ETH_ALEN);
 833                 }
 834         } else {
 835                 dev_err(&adapter->pdev->dev,
 836                         "Failed to get PCI Info%d\n", err);
 837                 err = -EIO;
 838         }
 839
 840         dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
 841                 pci_info_dma_t);
 842         return err;
 843 }
 844
 845 /* Configure eSwitch for port mirroring */
 846 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
 847                                 u8 enable_mirroring, u8 pci_func)
 848 {
 849         int err = -EIO;
 850         u32 arg1;
 851         struct qlcnic_cmd_args cmd;
 852
 853         if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
 854                 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
 855                 return err;
 856
 857         arg1 = id | (enable_mirroring ? BIT_4 : 0);
 858         arg1 |= pci_func << 8;
 859
 860         memset(&cmd, 0, sizeof(cmd));
 861         cmd.req.cmd = QLCNIC_CDRP_CMD_SET_PORTMIRRORING;
 862         cmd.req.arg1 = arg1;
 863         qlcnic_issue_cmd(adapter, &cmd);
 864         err = cmd.rsp.cmd;
 865
 866         if (err != QLCNIC_RCODE_SUCCESS) {
 867                 dev_err(&adapter->pdev->dev,
 868                         "Failed to configure port mirroring%d on eswitch:%d\n",
 869                         pci_func, id);
 870         } else {
 871                 dev_info(&adapter->pdev->dev,
 872                         "Configured eSwitch %d for port mirroring:%d\n",
 873                         id, pci_func);
 874         }
 875
 876         return err;
 877 }
 878
 879 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
 880                 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
 881
 882         size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
 883         struct qlcnic_esw_stats_le *stats;
 884         dma_addr_t stats_dma_t;
 885         void *stats_addr;
 886         u32 arg1;
 887         struct qlcnic_cmd_args cmd;
 888         int err;
 889
 890         if (esw_stats == NULL)
 891                 return -ENOMEM;
 892
 893         if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
 894             func != adapter->ahw->pci_func) {
 895                 dev_err(&adapter->pdev->dev,
 896                         "Not privilege to query stats for func=%d", func);
 897                 return -EIO;
 898         }
 899
 900         stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
 901                         &stats_dma_t, GFP_KERNEL);
 902         if (!stats_addr) {
 903                 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
 904                 return -ENOMEM;
 905         }
 906         memset(stats_addr, 0, stats_size);
 907
 908         arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
 909         arg1 |= rx_tx << 15 | stats_size << 16;
 910
 911         memset(&cmd, 0, sizeof(cmd));
 912         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
 913         cmd.req.arg1 = arg1;
 914         cmd.req.arg2 = MSD(stats_dma_t);
 915         cmd.req.arg3 = LSD(stats_dma_t);
 916         qlcnic_issue_cmd(adapter, &cmd);
 917         err = cmd.rsp.cmd;
 918
 919         if (!err) {
 920                 stats = stats_addr;
 921                 esw_stats->context_id = le16_to_cpu(stats->context_id);
 922                 esw_stats->version = le16_to_cpu(stats->version);
 923                 esw_stats->size = le16_to_cpu(stats->size);
 924                 esw_stats->multicast_frames =
 925                                 le64_to_cpu(stats->multicast_frames);
 926                 esw_stats->broadcast_frames =
 927                                 le64_to_cpu(stats->broadcast_frames);
 928                 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
 929                 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
 930                 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
 931                 esw_stats->errors = le64_to_cpu(stats->errors);
 932                 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
 933         }
 934
 935         dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
 936                 stats_dma_t);
 937         return err;
 938 }
 939
 940 /* This routine will retrieve the MAC statistics from firmware */
 941 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
 942                 struct qlcnic_mac_statistics *mac_stats)
 943 {
 944         struct qlcnic_mac_statistics_le *stats;
 945         struct qlcnic_cmd_args cmd;
 946         size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
 947         dma_addr_t stats_dma_t;
 948         void *stats_addr;
 949         int err;
 950
 951         stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
 952                         &stats_dma_t, GFP_KERNEL);
 953         if (!stats_addr) {
 954                 dev_err(&adapter->pdev->dev,
 955                         "%s: Unable to allocate memory.\n", __func__);
 956                 return -ENOMEM;
 957         }
 958         memset(stats_addr, 0, stats_size);
 959         memset(&cmd, 0, sizeof(cmd));
 960         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_MAC_STATS;
 961         cmd.req.arg1 = stats_size << 16;
 962         cmd.req.arg2 = MSD(stats_dma_t);
 963         cmd.req.arg3 = LSD(stats_dma_t);
 964
 965         qlcnic_issue_cmd(adapter, &cmd);
 966         err = cmd.rsp.cmd;
 967
 968         if (!err) {
 969                 stats = stats_addr;
 970                 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
 971                 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
 972                 mac_stats->mac_tx_mcast_pkts =
 973                                         le64_to_cpu(stats->mac_tx_mcast_pkts);
 974                 mac_stats->mac_tx_bcast_pkts =
 975                                         le64_to_cpu(stats->mac_tx_bcast_pkts);
 976                 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
 977                 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
 978                 mac_stats->mac_rx_mcast_pkts =
 979                                         le64_to_cpu(stats->mac_rx_mcast_pkts);
 980                 mac_stats->mac_rx_length_error =
 981                                 le64_to_cpu(stats->mac_rx_length_error);
 982                 mac_stats->mac_rx_length_small =
 983                                 le64_to_cpu(stats->mac_rx_length_small);
 984                 mac_stats->mac_rx_length_large =
 985                                 le64_to_cpu(stats->mac_rx_length_large);
 986                 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
 987                 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
 988                 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
 989         }
 990
 991         dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
 992                 stats_dma_t);
 993         return err;
 994 }
 995
 996 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
 997                 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
 998
 999         struct __qlcnic_esw_statistics port_stats;
1000         u8 i;
1001         int ret = -EIO;
1002
1003         if (esw_stats == NULL)
1004                 return -ENOMEM;
1005         if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1006                 return -EIO;
1007         if (adapter->npars == NULL)
1008                 return -EIO;
1009
1010         memset(esw_stats, 0, sizeof(u64));
1011         esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1012         esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1013         esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1014         esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1015         esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1016         esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1017         esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
1018         esw_stats->context_id = eswitch;
1019
1020         for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
1021                 if (adapter->npars[i].phy_port != eswitch)
1022                         continue;
1023
1024                 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1025                 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
1026                         continue;
1027
1028                 esw_stats->size = port_stats.size;
1029                 esw_stats->version = port_stats.version;
1030                 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1031                                                 port_stats.unicast_frames);
1032                 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1033                                                 port_stats.multicast_frames);
1034                 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1035                                                 port_stats.broadcast_frames);
1036                 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1037                                                 port_stats.dropped_frames);
1038                 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1039                                                 port_stats.errors);
1040                 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1041                                                 port_stats.local_frames);
1042                 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1043                                                 port_stats.numbytes);
1044                 ret = 0;
1045         }
1046         return ret;
1047 }
1048
1049 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1050                 const u8 port, const u8 rx_tx)
1051 {
1052
1053         u32 arg1;
1054         struct qlcnic_cmd_args cmd;
1055
1056         if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1057                 return -EIO;
1058
1059         if (func_esw == QLCNIC_STATS_PORT) {
1060                 if (port >= QLCNIC_MAX_PCI_FUNC)
1061                         goto err_ret;
1062         } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1063                 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1064                         goto err_ret;
1065         } else {
1066                 goto err_ret;
1067         }
1068
1069         if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1070                 goto err_ret;
1071
1072         arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1073         arg1 |= BIT_14 | rx_tx << 15;
1074
1075         memset(&cmd, 0, sizeof(cmd));
1076         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
1077         cmd.req.arg1 = arg1;
1078         qlcnic_issue_cmd(adapter, &cmd);
1079         return cmd.rsp.cmd;
1080
1081 err_ret:
1082         dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
1083                 "rx_ctx=%d\n", func_esw, port, rx_tx);
1084         return -EIO;
1085 }
1086
1087 static int
1088 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1089                                         u32 *arg1, u32 *arg2)
1090 {
1091         int err = -EIO;
1092         struct qlcnic_cmd_args cmd;
1093         u8 pci_func;
1094         pci_func = (*arg1 >> 8);
1095
1096         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG;
1097         cmd.req.arg1 = *arg1;
1098         cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
1099         qlcnic_issue_cmd(adapter, &cmd);
1100         *arg1 = cmd.rsp.arg1;
1101         *arg2 = cmd.rsp.arg2;
1102         err = cmd.rsp.cmd;
1103
1104         if (err == QLCNIC_RCODE_SUCCESS) {
1105                 dev_info(&adapter->pdev->dev,
1106                         "eSwitch port config for pci func %d\n", pci_func);
1107         } else {
1108                 dev_err(&adapter->pdev->dev,
1109                         "Failed to get eswitch port config for pci func %d\n",
1110                                                                 pci_func);
1111         }
1112         return err;
1113 }
1114 /* Configure eSwitch port
1115 op_mode = 0 for setting default port behavior
1116 op_mode = 1 for setting  vlan id
1117 op_mode = 2 for deleting vlan id
1118 op_type = 0 for vlan_id
1119 op_type = 1 for port vlan_id
1120 */
1121 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1122                 struct qlcnic_esw_func_cfg *esw_cfg)
1123 {
1124         int err = -EIO;
1125         u32 arg1, arg2 = 0;
1126         struct qlcnic_cmd_args cmd;
1127         u8 pci_func;
1128
1129         if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1130                 return err;
1131         pci_func = esw_cfg->pci_func;
1132         arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
1133         arg1 |= (pci_func << 8);
1134
1135         if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1136                 return err;
1137         arg1 &= ~(0x0ff << 8);
1138         arg1 |= (pci_func << 8);
1139         arg1 &= ~(BIT_2 | BIT_3);
1140         switch (esw_cfg->op_mode) {
1141         case QLCNIC_PORT_DEFAULTS:
1142                 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1143                 arg2 |= (BIT_0 | BIT_1);
1144                 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1145                         arg2 |= (BIT_2 | BIT_3);
1146                 if (!(esw_cfg->discard_tagged))
1147                         arg1 &= ~BIT_4;
1148                 if (!(esw_cfg->promisc_mode))
1149                         arg1 &= ~BIT_6;
1150                 if (!(esw_cfg->mac_override))
1151                         arg1 &= ~BIT_7;
1152                 if (!(esw_cfg->mac_anti_spoof))
1153                         arg2 &= ~BIT_0;
1154                 if (!(esw_cfg->offload_flags & BIT_0))
1155                         arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1156                 if (!(esw_cfg->offload_flags & BIT_1))
1157                         arg2 &= ~BIT_2;
1158                 if (!(esw_cfg->offload_flags & BIT_2))
1159                         arg2 &= ~BIT_3;
1160                 break;
1161         case QLCNIC_ADD_VLAN:
1162                         arg1 |= (BIT_2 | BIT_5);
1163                         arg1 |= (esw_cfg->vlan_id << 16);
1164                         break;
1165         case QLCNIC_DEL_VLAN:
1166                         arg1 |= (BIT_3 | BIT_5);
1167                         arg1 &= ~(0x0ffff << 16);
1168                         break;
1169         default:
1170                 return err;
1171         }
1172
1173         memset(&cmd, 0, sizeof(cmd));
1174         cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH;
1175         cmd.req.arg1 = arg1;
1176         cmd.req.arg2 = arg2;
1177         qlcnic_issue_cmd(adapter, &cmd);
1178
1179         err = cmd.rsp.cmd;
1180         if (err != QLCNIC_RCODE_SUCCESS) {
1181                 dev_err(&adapter->pdev->dev,
1182                         "Failed to configure eswitch pci func %d\n", pci_func);
1183         } else {
1184                 dev_info(&adapter->pdev->dev,
1185                         "Configured eSwitch for pci func %d\n", pci_func);
1186         }
1187
1188         return err;
1189 }
1190
1191 int
1192 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1193                         struct qlcnic_esw_func_cfg *esw_cfg)
1194 {
1195         u32 arg1, arg2;
1196         u8 phy_port;
1197         if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1198                 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1199         else
1200                 phy_port = adapter->physical_port;
1201         arg1 = phy_port;
1202         arg1 |= (esw_cfg->pci_func << 8);
1203         if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1204                 return -EIO;
1205
1206         esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1207         esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1208         esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1209         esw_cfg->mac_override = !!(arg1 & BIT_7);
1210         esw_cfg->vlan_id = LSW(arg1 >> 16);
1211         esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1212         esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1213
1214         return 0;
1215 }