2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23 #include <linux/ethtool.h>
24 #include <linux/mii.h>
25 #include <linux/timer.h>
27 #include <linux/vmalloc.h>
30 #include <asm/byteorder.h>
31 #include <linux/bitops.h>
32 #include <linux/if_vlan.h>
34 #include "qlcnic_hdr.h"
35 #include "qlcnic_hw.h"
36 #include "qlcnic_83xx_hw.h"
37 #include "qlcnic_dcb.h"
39 #define _QLCNIC_LINUX_MAJOR 5
40 #define _QLCNIC_LINUX_MINOR 3
41 #define _QLCNIC_LINUX_SUBVERSION 54
42 #define QLCNIC_LINUX_VERSIONID "5.3.54"
43 #define QLCNIC_DRV_IDC_VER 0x01
44 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
45 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
47 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
48 #define _major(v) (((v) >> 24) & 0xff)
49 #define _minor(v) (((v) >> 16) & 0xff)
50 #define _build(v) ((v) & 0xffff)
52 /* version in image has weird encoding:
55 * 31:16 - build (little endian)
57 #define QLCNIC_DECODE_VERSION(v) \
58 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
60 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
61 #define QLCNIC_NUM_FLASH_SECTORS (64)
62 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
63 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
64 * QLCNIC_FLASH_SECTOR_SIZE)
66 #define RCV_DESC_RINGSIZE(rds_ring) \
67 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
68 #define RCV_BUFF_RINGSIZE(rds_ring) \
69 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
70 #define STATUS_DESC_RINGSIZE(sds_ring) \
71 (sizeof(struct status_desc) * (sds_ring)->num_desc)
72 #define TX_BUFF_RINGSIZE(tx_ring) \
73 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
74 #define TX_DESC_RINGSIZE(tx_ring) \
75 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
77 #define QLCNIC_P3P_A0 0x50
78 #define QLCNIC_P3P_C0 0x58
80 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
82 #define FIRST_PAGE_GROUP_START 0
83 #define FIRST_PAGE_GROUP_END 0x100000
85 #define P3P_MAX_MTU (9600)
86 #define P3P_MIN_MTU (68)
87 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
89 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
90 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
91 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
92 #define QLCNIC_LRO_BUFFER_EXTRA 2048
95 #define QLCNIC_MAX_FRAGS_PER_TX 14
96 #define MAX_TSO_HEADER_DESC 2
97 #define MGMT_CMD_DESC_RESV 4
98 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
100 #define QLCNIC_MAX_TX_TIMEOUTS 2
102 /* Driver will use 1 Tx ring in INT-x/MSI/SRIOV mode. */
103 #define QLCNIC_SINGLE_RING 1
104 #define QLCNIC_DEF_SDS_RINGS 4
105 #define QLCNIC_DEF_TX_RINGS 4
106 #define QLCNIC_MAX_VNIC_TX_RINGS 4
107 #define QLCNIC_MAX_VNIC_SDS_RINGS 4
109 enum qlcnic_queue_type {
114 /* Operational mode for driver */
115 #define QLCNIC_VNIC_MODE 0xFF
116 #define QLCNIC_DEFAULT_MODE 0x0
118 /* Virtual NIC function count */
119 #define QLC_DEFAULT_VNIC_COUNT 8
120 #define QLC_84XX_VNIC_COUNT 16
123 * Following are the states of the Phantom. Phantom will set them and
124 * Host will read to check if the fields are correct.
126 #define PHAN_INITIALIZE_FAILED 0xffff
127 #define PHAN_INITIALIZE_COMPLETE 0xff01
129 /* Host writes the following to notify that it has done the init-handshake */
130 #define PHAN_INITIALIZE_ACK 0xf00f
131 #define PHAN_PEG_RCV_INITIALIZED 0xff01
133 #define NUM_RCV_DESC_RINGS 3
135 #define RCV_RING_NORMAL 0
136 #define RCV_RING_JUMBO 1
138 #define MIN_CMD_DESCRIPTORS 64
139 #define MIN_RCV_DESCRIPTORS 64
140 #define MIN_JUMBO_DESCRIPTORS 32
142 #define MAX_CMD_DESCRIPTORS 1024
143 #define MAX_RCV_DESCRIPTORS_1G 4096
144 #define MAX_RCV_DESCRIPTORS_10G 8192
145 #define MAX_RCV_DESCRIPTORS_VF 2048
146 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
147 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
149 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
150 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
151 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
152 #define MAX_RDS_RINGS 2
154 #define get_next_index(index, length) \
155 (((index) + 1) & ((length) - 1))
158 * Following data structures describe the descriptors that will be used.
159 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
160 * we are doing LSO (above the 1500 size packet) only.
162 struct cmd_desc_type0 {
163 u8 tcp_hdr_offset; /* For LSO only */
164 u8 ip_hdr_offset; /* For LSO only */
165 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
166 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
170 __le16 reference_handle;
172 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
173 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
174 __le16 conn_id; /* IPSec offoad only */
179 __le16 buffer_length[4];
183 u8 eth_addr[ETH_ALEN];
186 } __attribute__ ((aligned(64)));
188 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
190 __le16 reference_handle;
192 __le32 buffer_length; /* allocated buffer length (usually 2K) */
197 __le64 status_desc_data[2];
198 } __attribute__ ((aligned(16)));
200 /* UNIFIED ROMIMAGE */
201 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
202 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
203 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
204 #define QLCNIC_UNI_DIR_SECT_FW 0x7
207 #define QLCNIC_UNI_CHIP_REV_OFF 10
208 #define QLCNIC_UNI_FLAGS_OFF 11
209 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
210 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
211 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
213 struct uni_table_desc{
220 struct uni_data_desc{
226 /* Flash Defines and Structures */
227 #define QLCNIC_FLT_LOCATION 0x3F1000
228 #define QLCNIC_FDT_LOCATION 0x3F0000
229 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
230 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
231 #define QLCNIC_BOOTLD_REGION 0X72
232 struct qlcnic_flt_header {
239 struct qlcnic_flt_entry {
249 /* Flash Descriptor Table */
263 u8 write_enable_bits;
264 u8 write_statusreg_cmd;
265 u8 unprotected_sec_cmd;
270 u32 write_enable_data;
272 u8 write_disable_bits;
276 u8 protected_sec_cmd;
279 /* Magic number to let user know flash is programmed */
280 #define QLCNIC_BDINFO_MAGIC 0x12345678
282 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
283 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
284 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
285 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
286 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
287 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
288 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
289 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
290 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
291 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
292 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
293 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
294 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
295 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
297 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
299 /* Flash memory map */
300 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
301 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
302 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
303 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
305 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
306 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
307 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
308 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
310 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
311 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
313 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
314 #define QLCNIC_UNIFIED_ROMIMAGE 0
315 #define QLCNIC_FLASH_ROMIMAGE 1
316 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
318 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
319 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
321 extern char qlcnic_driver_name[];
323 extern int qlcnic_use_msi;
324 extern int qlcnic_use_msi_x;
325 extern int qlcnic_auto_fw_reset;
326 extern int qlcnic_load_fw_file;
328 /* Number of status descriptors to handle per interrupt */
329 #define MAX_STATUS_HANDLE (64)
332 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
333 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
335 struct qlcnic_skb_frag {
340 /* Following defines are for the state of the buffers */
341 #define QLCNIC_BUFFER_FREE 0
342 #define QLCNIC_BUFFER_BUSY 1
345 * There will be one qlcnic_buffer per skb packet. These will be
346 * used to save the dma info for pci_unmap_page()
348 struct qlcnic_cmd_buffer {
350 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
354 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
355 struct qlcnic_rx_buffer {
358 struct list_head list;
363 #define QLCNIC_GBE 0x01
364 #define QLCNIC_XGBE 0x02
367 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
368 * adjusted based on configured MTU.
370 #define QLCNIC_INTR_COAL_TYPE_RX 1
371 #define QLCNIC_INTR_COAL_TYPE_TX 2
372 #define QLCNIC_INTR_COAL_TYPE_RX_TX 3
374 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
375 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
377 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
378 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
380 #define QLCNIC_INTR_DEFAULT 0x04
381 #define QLCNIC_CONFIG_INTR_COALESCE 3
382 #define QLCNIC_DEV_INFO_SIZE 2
384 struct qlcnic_nic_intr_coalesce {
395 struct qlcnic_dump_template_hdr {
412 struct qlcnic_fw_dump {
413 u8 clr; /* flag to indicate if dump is cleared */
414 bool enable; /* enable/disable dump */
415 u32 size; /* total size of the dump */
416 void *data; /* dump data area */
417 struct qlcnic_dump_template_hdr *tmpl_hdr;
418 dma_addr_t phys_addr;
424 * One hardware_context{} per adapter
425 * contains interrupt info as well shared hardware info.
427 struct qlcnic_hardware_context {
428 void __iomem *pci_base0;
429 void __iomem *ocm_win_crb;
431 unsigned long pci_len0;
434 struct mutex mem_lock;
476 u32 extra_capability[3];
481 struct qlcnic_hardware_ops *hw_ops;
482 struct qlcnic_nic_intr_coalesce coal;
483 struct qlcnic_fw_dump fw_dump;
484 struct qlcnic_fdt fdt;
485 struct qlc_83xx_reset reset;
486 struct qlc_83xx_idc idc;
487 struct qlc_83xx_fw_info *fw_info;
488 struct qlcnic_intrpt_config *intr_tbl;
489 struct qlcnic_sriov *sriov;
492 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
494 struct qlcnic_mailbox *mailbox;
496 u8 phys_port_id[ETH_ALEN];
500 struct qlcnic_adapter_stats {
514 u64 skb_alloc_failure;
516 u64 rx_dma_map_error;
517 u64 tx_dma_map_error;
519 u64 mac_filter_limit_overrun;
523 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
524 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
526 struct qlcnic_host_rds_ring {
527 void __iomem *crb_rcv_producer;
528 struct rcv_desc *desc_head;
529 struct qlcnic_rx_buffer *rx_buf_arr;
535 struct list_head free_list;
537 dma_addr_t phys_addr;
538 } ____cacheline_internodealigned_in_smp;
540 struct qlcnic_host_sds_ring {
543 void __iomem *crb_sts_consumer;
545 struct qlcnic_host_tx_ring *tx_ring;
546 struct status_desc *desc_head;
547 struct qlcnic_adapter *adapter;
548 struct napi_struct napi;
549 struct list_head free_list[NUM_RCV_DESC_RINGS];
551 void __iomem *crb_intr_mask;
554 dma_addr_t phys_addr;
555 char name[IFNAMSIZ + 12];
556 } ____cacheline_internodealigned_in_smp;
558 struct qlcnic_tx_queue_stats {
566 struct qlcnic_host_tx_ring {
568 void __iomem *crb_intr_mask;
569 char name[IFNAMSIZ + 12];
577 struct qlcnic_tx_queue_stats tx_stats;
579 void __iomem *crb_cmd_producer;
580 struct cmd_desc_type0 *desc_head;
581 struct qlcnic_adapter *adapter;
582 struct napi_struct napi;
583 struct qlcnic_cmd_buffer *cmd_buf_arr;
586 dma_addr_t phys_addr;
587 dma_addr_t hw_cons_phys_addr;
588 struct netdev_queue *txq;
589 /* Lock to protect Tx descriptors cleanup */
590 spinlock_t tx_clean_lock;
591 } ____cacheline_internodealigned_in_smp;
594 * Receive context. There is one such structure per instance of the
595 * receive processing. Any state information that is relevant to
596 * the receive, and is must be in this structure. The global data may be
599 struct qlcnic_recv_context {
600 struct qlcnic_host_rds_ring *rds_rings;
601 struct qlcnic_host_sds_ring *sds_rings;
607 /* HW context creation */
609 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
611 #define QLCNIC_CDRP_CMD_BIT 0x80000000
614 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
615 * in the crb QLCNIC_CDRP_CRB_OFFSET.
617 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
618 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
620 #define QLCNIC_CDRP_RSP_OK 0x00000001
621 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
622 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
625 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
626 * the crb QLCNIC_CDRP_CRB_OFFSET.
628 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
630 #define QLCNIC_RCODE_SUCCESS 0
631 #define QLCNIC_RCODE_INVALID_ARGS 6
632 #define QLCNIC_RCODE_NOT_SUPPORTED 9
633 #define QLCNIC_RCODE_NOT_PERMITTED 10
634 #define QLCNIC_RCODE_NOT_IMPL 15
635 #define QLCNIC_RCODE_INVALID 16
636 #define QLCNIC_RCODE_TIMEOUT 17
637 #define QLCNIC_DESTROY_CTX_RESET 0
640 * Capabilities Announced
642 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
643 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
644 #define QLCNIC_CAP0_LSO (1 << 6)
645 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
646 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
647 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
648 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
649 #define QLCNIC_CAP0_TX_MULTI (1 << 22)
654 #define QLCNIC_HOST_CTX_STATE_FREED 0
655 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
661 struct qlcnic_hostrq_sds_ring {
662 __le64 host_phys_addr; /* Ring base addr */
663 __le32 ring_size; /* Ring entries */
665 __le16 rsvd; /* Padding */
668 struct qlcnic_hostrq_rds_ring {
669 __le64 host_phys_addr; /* Ring base addr */
670 __le64 buff_size; /* Packet buffer size */
671 __le32 ring_size; /* Ring entries */
672 __le32 ring_kind; /* Class of ring */
675 struct qlcnic_hostrq_rx_ctx {
676 __le64 host_rsp_dma_addr; /* Response dma'd here */
677 __le32 capabilities[4]; /* Flag bit vector */
678 __le32 host_int_crb_mode; /* Interrupt crb usage */
679 __le32 host_rds_crb_mode; /* RDS crb usage */
680 /* These ring offsets are relative to data[0] below */
681 __le32 rds_ring_offset; /* Offset to RDS config */
682 __le32 sds_ring_offset; /* Offset to SDS config */
683 __le16 num_rds_rings; /* Count of RDS rings */
684 __le16 num_sds_rings; /* Count of SDS rings */
685 __le16 valid_field_offset;
688 u8 reserved[128]; /* reserve space for future expansion*/
689 /* MUST BE 64-bit aligned.
690 The following is packed:
692 - N hostrq_sds_rings */
696 struct qlcnic_cardrsp_rds_ring{
697 __le32 host_producer_crb; /* Crb to use */
698 __le32 rsvd1; /* Padding */
701 struct qlcnic_cardrsp_sds_ring {
702 __le32 host_consumer_crb; /* Crb to use */
703 __le32 interrupt_crb; /* Crb to use */
706 struct qlcnic_cardrsp_rx_ctx {
707 /* These ring offsets are relative to data[0] below */
708 __le32 rds_ring_offset; /* Offset to RDS config */
709 __le32 sds_ring_offset; /* Offset to SDS config */
710 __le32 host_ctx_state; /* Starting State */
711 __le32 num_fn_per_port; /* How many PCI fn share the port */
712 __le16 num_rds_rings; /* Count of RDS rings */
713 __le16 num_sds_rings; /* Count of SDS rings */
714 __le16 context_id; /* Handle for context */
715 u8 phys_port; /* Physical id of port */
716 u8 virt_port; /* Virtual/Logical id of port */
717 u8 reserved[128]; /* save space for future expansion */
718 /* MUST BE 64-bit aligned.
719 The following is packed:
720 - N cardrsp_rds_rings
721 - N cardrs_sds_rings */
725 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
726 (sizeof(HOSTRQ_RX) + \
727 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
728 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
730 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
731 (sizeof(CARDRSP_RX) + \
732 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
733 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
739 struct qlcnic_hostrq_cds_ring {
740 __le64 host_phys_addr; /* Ring base addr */
741 __le32 ring_size; /* Ring entries */
742 __le32 rsvd; /* Padding */
745 struct qlcnic_hostrq_tx_ctx {
746 __le64 host_rsp_dma_addr; /* Response dma'd here */
747 __le64 cmd_cons_dma_addr; /* */
748 __le64 dummy_dma_addr; /* */
749 __le32 capabilities[4]; /* Flag bit vector */
750 __le32 host_int_crb_mode; /* Interrupt crb usage */
751 __le32 rsvd1; /* Padding */
752 __le16 rsvd2; /* Padding */
753 __le16 interrupt_ctl;
755 __le16 rsvd3; /* Padding */
756 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
757 u8 reserved[128]; /* future expansion */
760 struct qlcnic_cardrsp_cds_ring {
761 __le32 host_producer_crb; /* Crb to use */
762 __le32 interrupt_crb; /* Crb to use */
765 struct qlcnic_cardrsp_tx_ctx {
766 __le32 host_ctx_state; /* Starting state */
767 __le16 context_id; /* Handle for context */
768 u8 phys_port; /* Physical id of port */
769 u8 virt_port; /* Virtual/Logical id of port */
770 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
771 u8 reserved[128]; /* future expansion */
774 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
775 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
779 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
780 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
781 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
782 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
784 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
785 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
786 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
787 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
788 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
793 #define MC_COUNT_P3P 38
795 #define QLCNIC_MAC_NOOP 0
796 #define QLCNIC_MAC_ADD 1
797 #define QLCNIC_MAC_DEL 2
798 #define QLCNIC_MAC_VLAN_ADD 3
799 #define QLCNIC_MAC_VLAN_DEL 4
801 struct qlcnic_mac_vlan_list {
802 struct list_head list;
803 uint8_t mac_addr[ETH_ALEN+2];
808 #define NO_MAC_LEARN 0
809 #define DRV_MAC_LEARN 1
810 #define FDB_MAC_LEARN 2
812 #define QLCNIC_HOST_REQUEST 0x13
813 #define QLCNIC_REQUEST 0x14
815 #define QLCNIC_MAC_EVENT 0x1
817 #define QLCNIC_IP_UP 2
818 #define QLCNIC_IP_DOWN 3
820 #define QLCNIC_ILB_MODE 0x1
821 #define QLCNIC_ELB_MODE 0x2
822 #define QLCNIC_LB_MODE_MASK 0x3
824 #define QLCNIC_LINKEVENT 0x1
825 #define QLCNIC_LB_RESPONSE 0x2
826 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
827 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
830 * Driver --> Firmware
832 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
833 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
834 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
835 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
836 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
837 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
839 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
840 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
841 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
842 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
845 * Firmware --> Driver
848 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
849 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
850 #define QLCNIC_C2H_OPCODE_GET_DCB_AEN 0x90
852 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
853 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
854 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
856 #define QLCNIC_LRO_REQUEST_CLEANUP 4
858 /* Capabilites received */
859 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
860 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
861 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
862 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
863 #define QLCNIC_FW_CAPABILITY_2_MULTI_TX BIT_4
864 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
865 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
867 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
868 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
869 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
870 #define QLCNIC_FW_CAPABILITY_2_BEACON BIT_7
871 #define QLCNIC_FW_CAPABILITY_2_PER_PORT_ESWITCH_CFG BIT_9
874 #define LINKEVENT_MODULE_NOT_PRESENT 1
875 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
876 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
877 #define LINKEVENT_MODULE_OPTICAL_LRM 4
878 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
879 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
880 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
881 #define LINKEVENT_MODULE_TWINAX 8
883 #define LINKSPEED_10GBPS 10000
884 #define LINKSPEED_1GBPS 1000
885 #define LINKSPEED_100MBPS 100
886 #define LINKSPEED_10MBPS 10
888 #define LINKSPEED_ENCODED_10MBPS 0
889 #define LINKSPEED_ENCODED_100MBPS 1
890 #define LINKSPEED_ENCODED_1GBPS 2
892 #define LINKEVENT_AUTONEG_DISABLED 0
893 #define LINKEVENT_AUTONEG_ENABLED 1
895 #define LINKEVENT_HALF_DUPLEX 0
896 #define LINKEVENT_FULL_DUPLEX 1
898 #define LINKEVENT_LINKSPEED_MBPS 0
899 #define LINKEVENT_LINKSPEED_ENCODED 1
901 /* firmware response header:
902 * 63:58 - message type
906 * 47:40 - completion id
911 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
912 ((msg_hdr >> 32) & 0xFF)
914 struct qlcnic_fw_msg {
924 struct qlcnic_nic_req {
930 struct qlcnic_mac_req {
936 struct qlcnic_vlan_req {
941 struct qlcnic_ipaddr {
946 #define QLCNIC_MSI_ENABLED 0x02
947 #define QLCNIC_MSIX_ENABLED 0x04
948 #define QLCNIC_LRO_ENABLED 0x01
949 #define QLCNIC_LRO_DISABLED 0x00
950 #define QLCNIC_BRIDGE_ENABLED 0X10
951 #define QLCNIC_DIAG_ENABLED 0x20
952 #define QLCNIC_ESWITCH_ENABLED 0x40
953 #define QLCNIC_ADAPTER_INITIALIZED 0x80
954 #define QLCNIC_TAGGING_ENABLED 0x100
955 #define QLCNIC_MACSPOOF 0x200
956 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
957 #define QLCNIC_PROMISC_DISABLED 0x800
958 #define QLCNIC_NEED_FLR 0x1000
959 #define QLCNIC_FW_RESET_OWNER 0x2000
960 #define QLCNIC_FW_HANG 0x4000
961 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
962 #define QLCNIC_TX_INTR_SHARED 0x10000
963 #define QLCNIC_APP_CHANGED_FLAGS 0x20000
964 #define QLCNIC_HAS_PHYS_PORT_ID 0x40000
966 #define QLCNIC_IS_MSI_FAMILY(adapter) \
967 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
968 #define QLCNIC_IS_TSO_CAPABLE(adapter) \
969 ((adapter)->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
971 #define QLCNIC_BEACON_EANBLE 0xC
972 #define QLCNIC_BEACON_DISABLE 0xD
974 #define QLCNIC_BEACON_ON 2
975 #define QLCNIC_BEACON_OFF 0
977 #define QLCNIC_MSIX_TBL_SPACE 8192
978 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
979 #define QLCNIC_MSIX_TBL_PGSIZE 4096
981 #define QLCNIC_ADAPTER_UP_MAGIC 777
983 #define __QLCNIC_FW_ATTACHED 0
984 #define __QLCNIC_DEV_UP 1
985 #define __QLCNIC_RESETTING 2
986 #define __QLCNIC_START_FW 4
987 #define __QLCNIC_AER 5
988 #define __QLCNIC_DIAG_RES_ALLOC 6
989 #define __QLCNIC_LED_ENABLE 7
990 #define __QLCNIC_ELB_INPROGRESS 8
991 #define __QLCNIC_MULTI_TX_UNIQUE 9
992 #define __QLCNIC_SRIOV_ENABLE 10
993 #define __QLCNIC_SRIOV_CAPABLE 11
994 #define __QLCNIC_MBX_POLL_ENABLE 12
995 #define __QLCNIC_DIAG_MODE 13
996 #define __QLCNIC_MAINTENANCE_MODE 16
998 #define QLCNIC_INTERRUPT_TEST 1
999 #define QLCNIC_LOOPBACK_TEST 2
1000 #define QLCNIC_LED_TEST 3
1002 #define QLCNIC_FILTER_AGE 80
1003 #define QLCNIC_READD_AGE 20
1004 #define QLCNIC_LB_MAX_FILTERS 64
1005 #define QLCNIC_LB_BUCKET_SIZE 32
1006 #define QLCNIC_ILB_MAX_RCV_LOOP 10
1008 struct qlcnic_filter {
1009 struct hlist_node fnode;
1012 unsigned long ftime;
1015 struct qlcnic_filter_hash {
1016 struct hlist_head *fhead;
1022 /* Mailbox specific data structures */
1023 struct qlcnic_mailbox {
1024 struct workqueue_struct *work_q;
1025 struct qlcnic_adapter *adapter;
1026 struct qlcnic_mbx_ops *ops;
1027 struct work_struct work;
1028 struct completion completion;
1029 struct list_head cmd_q;
1030 unsigned long status;
1031 spinlock_t queue_lock; /* Mailbox queue lock */
1032 spinlock_t aen_lock; /* Mailbox response/AEN lock */
1033 atomic_t rsp_status;
1037 struct qlcnic_adapter {
1038 struct qlcnic_hardware_context *ahw;
1039 struct qlcnic_recv_context *recv_ctx;
1040 struct qlcnic_host_tx_ring *tx_ring;
1041 struct net_device *netdev;
1042 struct pci_dev *pdev;
1044 unsigned long state;
1055 u8 max_sds_rings; /* max sds rings supported by adapter */
1056 u8 max_tx_rings; /* max tx rings supported by adapter */
1058 u8 drv_tx_rings; /* max tx rings supported by driver */
1059 u8 drv_sds_rings; /* max sds rings supported by driver */
1081 u8 mac_addr[ETH_ALEN];
1087 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1089 struct qlcnic_npar_info *npars;
1090 struct qlcnic_eswitch *eswitch;
1091 struct qlcnic_nic_template *nic_ops;
1093 struct qlcnic_adapter_stats stats;
1094 struct list_head mac_list;
1096 void __iomem *tgt_mask_reg;
1097 void __iomem *tgt_status_reg;
1098 void __iomem *crb_int_state_reg;
1099 void __iomem *isr_int_vec;
1101 struct msix_entry *msix_entries;
1102 struct workqueue_struct *qlcnic_wq;
1103 struct delayed_work fw_work;
1104 struct delayed_work idc_aen_work;
1105 struct delayed_work mbx_poll_work;
1106 struct qlcnic_dcb *dcb;
1108 struct qlcnic_filter_hash fhash;
1109 struct qlcnic_filter_hash rx_fhash;
1110 struct list_head vf_mc_list;
1112 spinlock_t mac_learn_lock;
1113 /* spinlock for catching rcv filters for eswitch traffic */
1114 spinlock_t rx_mac_learn_lock;
1115 u32 file_prd_off; /*File fw product offset*/
1118 const struct firmware *fw;
1121 struct qlcnic_info_le {
1123 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1125 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1127 __le32 capabilities;
1137 __le16 max_bw_reg_offset;
1138 __le16 max_linkspeed_reg_offset;
1142 __le16 max_tx_mac_filters;
1143 __le16 max_rx_mcast_mac_filters;
1144 __le16 max_rx_ucast_mac_filters;
1145 __le16 max_rx_ip_addr;
1146 __le16 max_rx_lro_flow;
1147 __le16 max_rx_status_rings;
1148 __le16 max_rx_buf_rings;
1149 __le16 max_tx_vlan_keys;
1151 u8 total_rss_engines;
1153 __le16 linkstate_reg_offset;
1155 __le16 max_local_ipv6_addrs;
1156 __le16 max_remote_ipv6_addrs;
1160 struct qlcnic_info {
1173 u16 max_bw_reg_offset;
1174 u16 max_linkspeed_reg_offset;
1178 u16 max_tx_mac_filters;
1179 u16 max_rx_mcast_mac_filters;
1180 u16 max_rx_ucast_mac_filters;
1182 u16 max_rx_lro_flow;
1183 u16 max_rx_status_rings;
1184 u16 max_rx_buf_rings;
1185 u16 max_tx_vlan_keys;
1187 u8 total_rss_engines;
1189 u16 linkstate_reg_offset;
1191 u16 max_local_ipv6_addrs;
1192 u16 max_remote_ipv6_addrs;
1195 struct qlcnic_pci_info_le {
1196 __le16 id; /* pci function id */
1197 __le16 active; /* 1 = Enabled */
1198 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1199 __le16 default_port; /* default port number */
1201 __le16 tx_min_bw; /* Multiple of 100mbpc */
1203 __le16 reserved1[2];
1211 struct qlcnic_pci_info {
1222 struct qlcnic_npar_info {
1223 bool eswitch_status;
1241 struct qlcnic_eswitch {
1245 u8 active_ucast_filters;
1246 u8 max_ucast_filters;
1247 u8 max_active_vlans;
1250 #define QLCNIC_SWITCH_ENABLE BIT_1
1251 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1252 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1253 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1257 /* Return codes for Error handling */
1258 #define QL_STATUS_INVALID_PARAM -1
1260 #define MAX_BW 100 /* % of link speed */
1261 #define MAX_VLAN_ID 4095
1262 #define MIN_VLAN_ID 2
1263 #define DEFAULT_MAC_LEARN 1
1265 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1266 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1268 struct qlcnic_pci_func_cfg {
1275 u8 def_mac_addr[ETH_ALEN];
1278 struct qlcnic_npar_func_cfg {
1289 struct qlcnic_pm_func_cfg {
1296 struct qlcnic_esw_func_cfg {
1310 #define QLCNIC_STATS_VERSION 1
1311 #define QLCNIC_STATS_PORT 1
1312 #define QLCNIC_STATS_ESWITCH 2
1313 #define QLCNIC_QUERY_RX_COUNTER 0
1314 #define QLCNIC_QUERY_TX_COUNTER 1
1315 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1316 #define QLCNIC_FILL_STATS(VAL1) \
1317 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1318 #define QLCNIC_MAC_STATS 1
1319 #define QLCNIC_ESW_STATS 2
1321 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1323 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1324 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1326 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1327 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1331 struct qlcnic_mac_statistics_le {
1332 __le64 mac_tx_frames;
1333 __le64 mac_tx_bytes;
1334 __le64 mac_tx_mcast_pkts;
1335 __le64 mac_tx_bcast_pkts;
1336 __le64 mac_tx_pause_cnt;
1337 __le64 mac_tx_ctrl_pkt;
1338 __le64 mac_tx_lt_64b_pkts;
1339 __le64 mac_tx_lt_127b_pkts;
1340 __le64 mac_tx_lt_255b_pkts;
1341 __le64 mac_tx_lt_511b_pkts;
1342 __le64 mac_tx_lt_1023b_pkts;
1343 __le64 mac_tx_lt_1518b_pkts;
1344 __le64 mac_tx_gt_1518b_pkts;
1347 __le64 mac_rx_frames;
1348 __le64 mac_rx_bytes;
1349 __le64 mac_rx_mcast_pkts;
1350 __le64 mac_rx_bcast_pkts;
1351 __le64 mac_rx_pause_cnt;
1352 __le64 mac_rx_ctrl_pkt;
1353 __le64 mac_rx_lt_64b_pkts;
1354 __le64 mac_rx_lt_127b_pkts;
1355 __le64 mac_rx_lt_255b_pkts;
1356 __le64 mac_rx_lt_511b_pkts;
1357 __le64 mac_rx_lt_1023b_pkts;
1358 __le64 mac_rx_lt_1518b_pkts;
1359 __le64 mac_rx_gt_1518b_pkts;
1362 __le64 mac_rx_length_error;
1363 __le64 mac_rx_length_small;
1364 __le64 mac_rx_length_large;
1365 __le64 mac_rx_jabber;
1366 __le64 mac_rx_dropped;
1367 __le64 mac_rx_crc_error;
1368 __le64 mac_align_error;
1371 struct qlcnic_mac_statistics {
1374 u64 mac_tx_mcast_pkts;
1375 u64 mac_tx_bcast_pkts;
1376 u64 mac_tx_pause_cnt;
1377 u64 mac_tx_ctrl_pkt;
1378 u64 mac_tx_lt_64b_pkts;
1379 u64 mac_tx_lt_127b_pkts;
1380 u64 mac_tx_lt_255b_pkts;
1381 u64 mac_tx_lt_511b_pkts;
1382 u64 mac_tx_lt_1023b_pkts;
1383 u64 mac_tx_lt_1518b_pkts;
1384 u64 mac_tx_gt_1518b_pkts;
1388 u64 mac_rx_mcast_pkts;
1389 u64 mac_rx_bcast_pkts;
1390 u64 mac_rx_pause_cnt;
1391 u64 mac_rx_ctrl_pkt;
1392 u64 mac_rx_lt_64b_pkts;
1393 u64 mac_rx_lt_127b_pkts;
1394 u64 mac_rx_lt_255b_pkts;
1395 u64 mac_rx_lt_511b_pkts;
1396 u64 mac_rx_lt_1023b_pkts;
1397 u64 mac_rx_lt_1518b_pkts;
1398 u64 mac_rx_gt_1518b_pkts;
1400 u64 mac_rx_length_error;
1401 u64 mac_rx_length_small;
1402 u64 mac_rx_length_large;
1405 u64 mac_rx_crc_error;
1406 u64 mac_align_error;
1409 struct qlcnic_esw_stats_le {
1414 __le64 unicast_frames;
1415 __le64 multicast_frames;
1416 __le64 broadcast_frames;
1417 __le64 dropped_frames;
1419 __le64 local_frames;
1424 struct __qlcnic_esw_statistics {
1430 u64 multicast_frames;
1431 u64 broadcast_frames;
1439 struct qlcnic_esw_statistics {
1440 struct __qlcnic_esw_statistics rx;
1441 struct __qlcnic_esw_statistics tx;
1444 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1445 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1446 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1447 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1448 #define QLCNIC_SET_QUIESCENT 0xadd00010
1449 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1456 struct qlcnic_cmd_args {
1457 struct completion completion;
1458 struct list_head list;
1459 struct _cdrp_cmd req;
1460 struct _cdrp_cmd rsp;
1461 atomic_t rsp_status;
1468 u32 *hdr; /* Back channel message header */
1469 u32 *pay; /* Back channel message payload */
1473 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1474 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1475 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1476 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1478 #define ADDR_IN_RANGE(addr, low, high) \
1479 (((addr) < (high)) && ((addr) >= (low)))
1481 #define QLCRD32(adapter, off, err) \
1482 (adapter->ahw->hw_ops->read_reg)(adapter, off, err)
1484 #define QLCWR32(adapter, off, val) \
1485 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1487 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1488 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1490 #define qlcnic_rom_lock(a) \
1491 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1492 #define qlcnic_rom_unlock(a) \
1493 qlcnic_pcie_sem_unlock((a), 2)
1494 #define qlcnic_phy_lock(a) \
1495 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1496 #define qlcnic_phy_unlock(a) \
1497 qlcnic_pcie_sem_unlock((a), 3)
1498 #define qlcnic_sw_lock(a) \
1499 qlcnic_pcie_sem_lock((a), 6, 0)
1500 #define qlcnic_sw_unlock(a) \
1501 qlcnic_pcie_sem_unlock((a), 6)
1502 #define crb_win_lock(a) \
1503 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1504 #define crb_win_unlock(a) \
1505 qlcnic_pcie_sem_unlock((a), 7)
1507 #define __QLCNIC_MAX_LED_RATE 0xf
1508 #define __QLCNIC_MAX_LED_STATE 0x2
1510 #define MAX_CTL_CHECK 1000
1512 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1513 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1514 int qlcnic_dump_fw(struct qlcnic_adapter *);
1515 int qlcnic_enable_fw_dump_state(struct qlcnic_adapter *);
1516 bool qlcnic_check_fw_dump_state(struct qlcnic_adapter *);
1518 /* Functions from qlcnic_init.c */
1519 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1520 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1521 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1522 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1523 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1524 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1525 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1526 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1528 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1529 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1530 u8 *bytes, size_t size);
1531 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1532 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1534 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1536 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1537 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1539 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1540 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1542 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1543 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1544 void qlcnic_release_tx_buffers(struct qlcnic_adapter *,
1545 struct qlcnic_host_tx_ring *);
1547 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1548 void qlcnic_watchdog_task(struct work_struct *work);
1549 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1550 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1551 void qlcnic_set_multi(struct net_device *netdev);
1552 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16);
1553 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1554 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1555 int qlcnic_82xx_read_phys_port_id(struct qlcnic_adapter *);
1557 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1558 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *, u32);
1559 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1560 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1561 netdev_features_t features);
1562 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1563 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1564 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1566 /* Functions from qlcnic_ethtool.c */
1567 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1568 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1570 /* Functions from qlcnic_main.c */
1571 int qlcnic_reset_context(struct qlcnic_adapter *);
1572 void qlcnic_diag_free_res(struct net_device *netdev, int);
1573 int qlcnic_diag_alloc_res(struct net_device *netdev, int);
1574 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *, struct net_device *);
1575 void qlcnic_set_tx_ring_count(struct qlcnic_adapter *, u8);
1576 void qlcnic_set_sds_ring_count(struct qlcnic_adapter *, u8);
1577 int qlcnic_setup_rings(struct qlcnic_adapter *, u8, u8);
1578 int qlcnic_validate_rings(struct qlcnic_adapter *, __u32, int);
1579 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1580 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1581 void qlcnic_set_drv_version(struct qlcnic_adapter *);
1583 /* eSwitch management functions */
1584 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1585 struct qlcnic_esw_func_cfg *);
1587 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1588 struct qlcnic_esw_func_cfg *);
1589 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1590 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1591 struct __qlcnic_esw_statistics *);
1592 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1593 struct __qlcnic_esw_statistics *);
1594 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1595 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1597 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1599 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1600 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1601 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1602 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1603 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1604 void qlcnic_dump_mbx(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1606 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1607 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1608 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1609 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1611 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1612 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1613 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1614 struct qlcnic_esw_func_cfg *);
1615 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1616 struct qlcnic_esw_func_cfg *);
1618 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1619 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1620 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1621 void qlcnic_detach(struct qlcnic_adapter *);
1622 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1623 int qlcnic_attach(struct qlcnic_adapter *);
1624 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1625 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1627 int qlcnic_check_temp(struct qlcnic_adapter *);
1628 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1629 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1630 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1631 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1632 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1633 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1634 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1635 void qlcnic_set_netdev_features(struct qlcnic_adapter *,
1636 struct qlcnic_esw_func_cfg *);
1637 void qlcnic_sriov_vf_schedule_multi(struct net_device *);
1638 int qlcnic_is_valid_nic_func(struct qlcnic_adapter *, u8);
1639 int qlcnic_get_pci_func_type(struct qlcnic_adapter *, u16, u16 *, u16 *,
1643 * QLOGIC Board information
1646 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1647 struct qlcnic_board_info {
1648 unsigned short vendor;
1649 unsigned short device;
1650 unsigned short sub_vendor;
1651 unsigned short sub_device;
1652 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1655 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1657 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1658 return tx_ring->sw_consumer - tx_ring->producer;
1660 return tx_ring->sw_consumer + tx_ring->num_desc -
1664 static inline int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter,
1665 struct net_device *netdev)
1669 netdev->num_tx_queues = adapter->drv_tx_rings;
1670 netdev->real_num_tx_queues = adapter->drv_tx_rings;
1672 err = netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings);
1674 dev_err(&adapter->pdev->dev, "failed to set %d Tx queues\n",
1675 adapter->drv_tx_rings);
1677 dev_info(&adapter->pdev->dev, "Set %d Tx queues\n",
1678 adapter->drv_tx_rings);
1683 struct qlcnic_nic_template {
1684 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1685 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1686 int (*start_firmware) (struct qlcnic_adapter *);
1687 int (*init_driver) (struct qlcnic_adapter *);
1688 void (*request_reset) (struct qlcnic_adapter *, u32);
1689 void (*cancel_idc_work) (struct qlcnic_adapter *);
1690 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1691 void (*napi_del)(struct qlcnic_adapter *);
1692 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1693 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1694 int (*shutdown)(struct pci_dev *);
1695 int (*resume)(struct qlcnic_adapter *);
1698 struct qlcnic_mbx_ops {
1699 int (*enqueue_cmd) (struct qlcnic_adapter *,
1700 struct qlcnic_cmd_args *, unsigned long *);
1701 void (*dequeue_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1702 void (*decode_resp) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1703 void (*encode_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1704 void (*nofity_fw) (struct qlcnic_adapter *, u8);
1707 int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *);
1708 void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *);
1709 void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx);
1710 void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx);
1711 void qlcnic_update_stats(struct qlcnic_adapter *);
1713 /* Adapter hardware abstraction */
1714 struct qlcnic_hardware_ops {
1715 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1716 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1717 int (*read_reg) (struct qlcnic_adapter *, ulong, int *);
1718 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1719 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1720 int (*get_mac_address) (struct qlcnic_adapter *, u8 *, u8);
1721 int (*setup_intr) (struct qlcnic_adapter *);
1722 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1723 struct qlcnic_adapter *, u32);
1724 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1725 void (*get_func_no) (struct qlcnic_adapter *);
1726 int (*api_lock) (struct qlcnic_adapter *);
1727 void (*api_unlock) (struct qlcnic_adapter *);
1728 void (*add_sysfs) (struct qlcnic_adapter *);
1729 void (*remove_sysfs) (struct qlcnic_adapter *);
1730 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1731 int (*create_rx_ctx) (struct qlcnic_adapter *);
1732 int (*create_tx_ctx) (struct qlcnic_adapter *,
1733 struct qlcnic_host_tx_ring *, int);
1734 void (*del_rx_ctx) (struct qlcnic_adapter *);
1735 void (*del_tx_ctx) (struct qlcnic_adapter *,
1736 struct qlcnic_host_tx_ring *);
1737 int (*setup_link_event) (struct qlcnic_adapter *, int);
1738 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1739 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1740 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1741 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1742 void (*napi_enable) (struct qlcnic_adapter *);
1743 void (*napi_disable) (struct qlcnic_adapter *);
1744 int (*config_intr_coal) (struct qlcnic_adapter *,
1745 struct ethtool_coalesce *);
1746 int (*config_rss) (struct qlcnic_adapter *, int);
1747 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1748 int (*config_loopback) (struct qlcnic_adapter *, u8);
1749 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1750 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1751 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1752 int (*get_board_info) (struct qlcnic_adapter *);
1753 void (*set_mac_filter_count) (struct qlcnic_adapter *);
1754 void (*free_mac_list) (struct qlcnic_adapter *);
1755 int (*read_phys_port_id) (struct qlcnic_adapter *);
1756 pci_ers_result_t (*io_error_detected) (struct pci_dev *,
1757 pci_channel_state_t);
1758 pci_ers_result_t (*io_slot_reset) (struct pci_dev *);
1759 void (*io_resume) (struct pci_dev *);
1760 void (*get_beacon_state)(struct qlcnic_adapter *);
1761 void (*enable_sds_intr) (struct qlcnic_adapter *,
1762 struct qlcnic_host_sds_ring *);
1763 void (*disable_sds_intr) (struct qlcnic_adapter *,
1764 struct qlcnic_host_sds_ring *);
1765 void (*enable_tx_intr) (struct qlcnic_adapter *,
1766 struct qlcnic_host_tx_ring *);
1767 void (*disable_tx_intr) (struct qlcnic_adapter *,
1768 struct qlcnic_host_tx_ring *);
1771 extern struct qlcnic_nic_template qlcnic_vf_ops;
1773 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1775 return adapter->nic_ops->start_firmware(adapter);
1778 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1779 loff_t offset, size_t size)
1781 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1784 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1785 loff_t offset, size_t size)
1787 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1790 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1791 ulong off, u32 data)
1793 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1796 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1797 u8 *mac, u8 function)
1799 return adapter->ahw->hw_ops->get_mac_address(adapter, mac, function);
1802 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter)
1804 return adapter->ahw->hw_ops->setup_intr(adapter);
1807 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1808 struct qlcnic_adapter *adapter, u32 arg)
1810 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1813 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1814 struct qlcnic_cmd_args *cmd)
1816 if (adapter->ahw->hw_ops->mbx_cmd)
1817 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1822 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1824 adapter->ahw->hw_ops->get_func_no(adapter);
1827 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1829 return adapter->ahw->hw_ops->api_lock(adapter);
1832 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1834 adapter->ahw->hw_ops->api_unlock(adapter);
1837 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1839 if (adapter->ahw->hw_ops->add_sysfs)
1840 adapter->ahw->hw_ops->add_sysfs(adapter);
1843 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1845 if (adapter->ahw->hw_ops->remove_sysfs)
1846 adapter->ahw->hw_ops->remove_sysfs(adapter);
1850 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1852 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1855 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1857 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1860 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1861 struct qlcnic_host_tx_ring *ptr,
1864 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1867 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1869 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1872 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1873 struct qlcnic_host_tx_ring *ptr)
1875 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1878 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1881 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1884 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1885 struct qlcnic_info *info, u8 id)
1887 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1890 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1891 struct qlcnic_pci_info *info)
1893 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1896 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1897 struct qlcnic_info *info)
1899 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1902 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1903 u8 *addr, u16 id, u8 cmd)
1905 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1908 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1909 struct net_device *netdev)
1911 return adapter->nic_ops->napi_add(adapter, netdev);
1914 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1916 adapter->nic_ops->napi_del(adapter);
1919 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1921 adapter->ahw->hw_ops->napi_enable(adapter);
1924 static inline int __qlcnic_shutdown(struct pci_dev *pdev)
1926 struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1928 return adapter->nic_ops->shutdown(pdev);
1931 static inline int __qlcnic_resume(struct qlcnic_adapter *adapter)
1933 return adapter->nic_ops->resume(adapter);
1936 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
1938 adapter->ahw->hw_ops->napi_disable(adapter);
1941 static inline int qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter,
1942 struct ethtool_coalesce *ethcoal)
1944 return adapter->ahw->hw_ops->config_intr_coal(adapter, ethcoal);
1947 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
1949 return adapter->ahw->hw_ops->config_rss(adapter, enable);
1952 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
1955 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
1958 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1960 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1963 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1965 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
1968 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
1971 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
1974 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
1977 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
1980 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
1982 return adapter->ahw->hw_ops->get_board_info(adapter);
1985 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
1987 return adapter->ahw->hw_ops->free_mac_list(adapter);
1990 static inline void qlcnic_set_mac_filter_count(struct qlcnic_adapter *adapter)
1992 if (adapter->ahw->hw_ops->set_mac_filter_count)
1993 adapter->ahw->hw_ops->set_mac_filter_count(adapter);
1996 static inline void qlcnic_get_beacon_state(struct qlcnic_adapter *adapter)
1998 adapter->ahw->hw_ops->get_beacon_state(adapter);
2001 static inline void qlcnic_read_phys_port_id(struct qlcnic_adapter *adapter)
2003 if (adapter->ahw->hw_ops->read_phys_port_id)
2004 adapter->ahw->hw_ops->read_phys_port_id(adapter);
2007 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
2010 if (adapter->nic_ops->request_reset)
2011 adapter->nic_ops->request_reset(adapter, key);
2014 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
2016 if (adapter->nic_ops->cancel_idc_work)
2017 adapter->nic_ops->cancel_idc_work(adapter);
2020 static inline irqreturn_t
2021 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
2023 return adapter->nic_ops->clear_legacy_intr(adapter);
2026 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
2029 return adapter->nic_ops->config_led(adapter, state, rate);
2032 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
2035 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
2038 static inline bool qlcnic_check_multi_tx(struct qlcnic_adapter *adapter)
2040 return test_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2044 qlcnic_82xx_enable_tx_intr(struct qlcnic_adapter *adapter,
2045 struct qlcnic_host_tx_ring *tx_ring)
2047 if (qlcnic_check_multi_tx(adapter) &&
2048 !adapter->ahw->diag_test)
2049 writel(0x0, tx_ring->crb_intr_mask);
2053 qlcnic_82xx_disable_tx_intr(struct qlcnic_adapter *adapter,
2054 struct qlcnic_host_tx_ring *tx_ring)
2056 if (qlcnic_check_multi_tx(adapter) &&
2057 !adapter->ahw->diag_test)
2058 writel(1, tx_ring->crb_intr_mask);
2062 qlcnic_83xx_enable_tx_intr(struct qlcnic_adapter *adapter,
2063 struct qlcnic_host_tx_ring *tx_ring)
2065 writel(0, tx_ring->crb_intr_mask);
2069 qlcnic_83xx_disable_tx_intr(struct qlcnic_adapter *adapter,
2070 struct qlcnic_host_tx_ring *tx_ring)
2072 writel(1, tx_ring->crb_intr_mask);
2075 /* Enable MSI-x and INT-x interrupts */
2077 qlcnic_83xx_enable_sds_intr(struct qlcnic_adapter *adapter,
2078 struct qlcnic_host_sds_ring *sds_ring)
2080 writel(0, sds_ring->crb_intr_mask);
2083 /* Disable MSI-x and INT-x interrupts */
2085 qlcnic_83xx_disable_sds_intr(struct qlcnic_adapter *adapter,
2086 struct qlcnic_host_sds_ring *sds_ring)
2088 writel(1, sds_ring->crb_intr_mask);
2091 static inline void qlcnic_disable_multi_tx(struct qlcnic_adapter *adapter)
2093 test_and_clear_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2094 adapter->drv_tx_rings = QLCNIC_SINGLE_RING;
2097 /* When operating in a muti tx mode, driver needs to write 0x1
2098 * to src register, instead of 0x0 to disable receiving interrupt.
2101 qlcnic_82xx_disable_sds_intr(struct qlcnic_adapter *adapter,
2102 struct qlcnic_host_sds_ring *sds_ring)
2104 if (qlcnic_check_multi_tx(adapter) &&
2105 !adapter->ahw->diag_test &&
2106 (adapter->flags & QLCNIC_MSIX_ENABLED))
2107 writel(0x1, sds_ring->crb_intr_mask);
2109 writel(0, sds_ring->crb_intr_mask);
2112 static inline void qlcnic_enable_sds_intr(struct qlcnic_adapter *adapter,
2113 struct qlcnic_host_sds_ring *sds_ring)
2115 if (adapter->ahw->hw_ops->enable_sds_intr)
2116 adapter->ahw->hw_ops->enable_sds_intr(adapter, sds_ring);
2120 qlcnic_disable_sds_intr(struct qlcnic_adapter *adapter,
2121 struct qlcnic_host_sds_ring *sds_ring)
2123 if (adapter->ahw->hw_ops->disable_sds_intr)
2124 adapter->ahw->hw_ops->disable_sds_intr(adapter, sds_ring);
2127 static inline void qlcnic_enable_tx_intr(struct qlcnic_adapter *adapter,
2128 struct qlcnic_host_tx_ring *tx_ring)
2130 if (adapter->ahw->hw_ops->enable_tx_intr)
2131 adapter->ahw->hw_ops->enable_tx_intr(adapter, tx_ring);
2134 static inline void qlcnic_disable_tx_intr(struct qlcnic_adapter *adapter,
2135 struct qlcnic_host_tx_ring *tx_ring)
2137 if (adapter->ahw->hw_ops->disable_tx_intr)
2138 adapter->ahw->hw_ops->disable_tx_intr(adapter, tx_ring);
2141 /* When operating in a muti tx mode, driver needs to write 0x0
2142 * to src register, instead of 0x1 to enable receiving interrupts.
2145 qlcnic_82xx_enable_sds_intr(struct qlcnic_adapter *adapter,
2146 struct qlcnic_host_sds_ring *sds_ring)
2148 if (qlcnic_check_multi_tx(adapter) &&
2149 !adapter->ahw->diag_test &&
2150 (adapter->flags & QLCNIC_MSIX_ENABLED))
2151 writel(0, sds_ring->crb_intr_mask);
2153 writel(0x1, sds_ring->crb_intr_mask);
2155 if (!QLCNIC_IS_MSI_FAMILY(adapter))
2156 writel(0xfbff, adapter->tgt_mask_reg);
2159 static inline int qlcnic_get_diag_lock(struct qlcnic_adapter *adapter)
2161 return test_and_set_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2164 static inline void qlcnic_release_diag_lock(struct qlcnic_adapter *adapter)
2166 clear_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2169 static inline int qlcnic_check_diag_status(struct qlcnic_adapter *adapter)
2171 return test_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2174 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
2175 extern const struct ethtool_ops qlcnic_ethtool_ops;
2176 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
2178 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
2179 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
2180 printk(KERN_INFO "%s: %s: " _fmt, \
2181 dev_name(&adapter->pdev->dev), \
2182 __func__, ##_args); \
2185 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
2186 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
2187 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
2188 #define PCI_DEVICE_ID_QLOGIC_QLE844X 0x8040
2189 #define PCI_DEVICE_ID_QLOGIC_VF_QLE844X 0x8440
2191 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
2193 unsigned short device = adapter->pdev->device;
2194 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
2197 static inline bool qlcnic_84xx_check(struct qlcnic_adapter *adapter)
2199 unsigned short device = adapter->pdev->device;
2201 return ((device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2202 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2205 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
2207 unsigned short device = adapter->pdev->device;
2210 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
2211 (device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2212 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X) ||
2213 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X)) ? true : false;
2218 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
2220 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
2223 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
2225 unsigned short device = adapter->pdev->device;
2228 status = ((device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2229 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2234 static inline bool qlcnic_83xx_pf_check(struct qlcnic_adapter *adapter)
2236 unsigned short device = adapter->pdev->device;
2238 return (device == PCI_DEVICE_ID_QLOGIC_QLE834X) ? true : false;
2241 static inline bool qlcnic_83xx_vf_check(struct qlcnic_adapter *adapter)
2243 unsigned short device = adapter->pdev->device;
2245 return (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ? true : false;
2248 static inline u32 qlcnic_get_vnic_func_count(struct qlcnic_adapter *adapter)
2250 if (qlcnic_84xx_check(adapter))
2251 return QLC_84XX_VNIC_COUNT;
2253 return QLC_DEFAULT_VNIC_COUNT;
2255 #endif /* __QLCNIC_H_ */