1 // SPDX-License-Identifier: GPL-2.0+
3 #include "lan966x_main.h"
5 #define DWRR_COST_BIT_WIDTH BIT(5)
7 static u32 lan966x_ets_hw_cost(u32 w_min, u32 weight)
11 /* Round half up: Multiply with 16 before division,
12 * add 8 and divide result with 16 again
14 res = (((DWRR_COST_BIT_WIDTH << 4) * w_min / weight) + 8) >> 4;
15 return max_t(u32, 1, res) - 1;
18 int lan966x_ets_add(struct lan966x_port *port,
19 struct tc_ets_qopt_offload *qopt)
21 struct tc_ets_qopt_offload_replace_params *params;
22 struct lan966x *lan966x = port->lan966x;
29 if (qopt->parent != TC_H_ROOT)
32 params = &qopt->replace_params;
33 if (params->bands != NUM_PRIO_QUEUES)
36 for (i = 0; i < params->bands; ++i) {
37 /* In the switch the DWRR is always on the lowest consecutive
38 * priorities. Due to this, the first priority must map to the
41 if (params->priomap[i] != (7 - i))
44 if (params->quanta[i] && params->weights[i] == 0)
48 se_idx = SE_IDX_PORT + port->chip_port;
50 /* Find minimum weight */
51 for (i = 0; i < params->bands; ++i) {
52 if (params->quanta[i] == 0)
55 w_min = min(w_min, params->weights[i]);
58 for (i = 0; i < params->bands; ++i) {
59 if (params->quanta[i] == 0)
64 lan_wr(lan966x_ets_hw_cost(w_min, params->weights[i]),
65 lan966x, QSYS_SE_DWRR_CFG(se_idx, 7 - i));
68 lan_rmw(QSYS_SE_CFG_SE_DWRR_CNT_SET(count) |
69 QSYS_SE_CFG_SE_RR_ENA_SET(0),
70 QSYS_SE_CFG_SE_DWRR_CNT |
71 QSYS_SE_CFG_SE_RR_ENA,
72 lan966x, QSYS_SE_CFG(se_idx));
77 int lan966x_ets_del(struct lan966x_port *port,
78 struct tc_ets_qopt_offload *qopt)
80 struct lan966x *lan966x = port->lan966x;
84 se_idx = SE_IDX_PORT + port->chip_port;
86 for (i = 0; i < NUM_PRIO_QUEUES; ++i)
87 lan_wr(0, lan966x, QSYS_SE_DWRR_CFG(se_idx, i));
89 lan_rmw(QSYS_SE_CFG_SE_DWRR_CNT_SET(0) |
90 QSYS_SE_CFG_SE_RR_ENA_SET(0),
91 QSYS_SE_CFG_SE_DWRR_CNT |
92 QSYS_SE_CFG_SE_RR_ENA,
93 lan966x, QSYS_SE_CFG(se_idx));