2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include "mlx5_core.h"
39 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod,
40 u16 vport, u32 *out, int outlen)
43 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)];
45 memset(in, 0, sizeof(in));
47 MLX5_SET(query_vport_state_in, in, opcode,
48 MLX5_CMD_OP_QUERY_VPORT_STATE);
49 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
50 MLX5_SET(query_vport_state_in, in, vport_number, vport);
52 MLX5_SET(query_vport_state_in, in, other_vport, 1);
54 err = mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, outlen);
56 mlx5_core_warn(mdev, "MLX5_CMD_OP_QUERY_VPORT_STATE failed\n");
61 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
63 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
65 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
67 return MLX5_GET(query_vport_state_out, out, state);
69 EXPORT_SYMBOL_GPL(mlx5_query_vport_state);
71 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
73 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
75 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
77 return MLX5_GET(query_vport_state_out, out, admin_state);
79 EXPORT_SYMBOL_GPL(mlx5_query_vport_admin_state);
81 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
84 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)];
85 u32 out[MLX5_ST_SZ_DW(modify_vport_state_out)];
88 memset(in, 0, sizeof(in));
90 MLX5_SET(modify_vport_state_in, in, opcode,
91 MLX5_CMD_OP_MODIFY_VPORT_STATE);
92 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
93 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
96 MLX5_SET(modify_vport_state_in, in, other_vport, 1);
98 MLX5_SET(modify_vport_state_in, in, admin_state, state);
100 err = mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out,
103 mlx5_core_warn(mdev, "MLX5_CMD_OP_MODIFY_VPORT_STATE failed\n");
107 EXPORT_SYMBOL_GPL(mlx5_modify_vport_admin_state);
109 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
110 u32 *out, int outlen)
112 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)];
114 memset(in, 0, sizeof(in));
116 MLX5_SET(query_nic_vport_context_in, in, opcode,
117 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
119 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
121 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
123 return mlx5_cmd_exec_check_status(mdev, in, sizeof(in), out, outlen);
126 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
129 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
131 MLX5_SET(modify_nic_vport_context_in, in, opcode,
132 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
134 memset(out, 0, sizeof(out));
135 return mlx5_cmd_exec_check_status(mdev, in, inlen, out, sizeof(out));
138 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
142 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
146 out = mlx5_vzalloc(outlen);
150 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
151 nic_vport_context.permanent_address);
153 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
155 ether_addr_copy(addr, &out_addr[2]);
160 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
162 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
166 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
171 in = mlx5_vzalloc(inlen);
173 mlx5_core_warn(mdev, "failed to allocate inbox\n");
177 MLX5_SET(modify_nic_vport_context_in, in,
178 field_select.permanent_address, 1);
179 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
182 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
184 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
185 in, nic_vport_context);
186 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
189 ether_addr_copy(&perm_mac[2], addr);
191 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
197 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
199 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
201 enum mlx5_list_type list_type,
202 u8 addr_list[][ETH_ALEN],
205 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)];
214 req_list_size = *list_size;
216 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
217 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
218 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
220 if (req_list_size > max_list_size) {
221 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
222 req_list_size, max_list_size);
223 req_list_size = max_list_size;
226 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
227 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
229 memset(in, 0, sizeof(in));
230 out = kzalloc(out_sz, GFP_KERNEL);
234 MLX5_SET(query_nic_vport_context_in, in, opcode,
235 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
236 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
237 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
240 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
242 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, out_sz);
246 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
248 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
251 *list_size = req_list_size;
252 for (i = 0; i < req_list_size; i++) {
253 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
255 current_uc_mac_address[i]) + 2;
256 ether_addr_copy(addr_list[i], mac_addr);
262 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
264 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
265 enum mlx5_list_type list_type,
266 u8 addr_list[][ETH_ALEN],
269 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
277 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
278 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
279 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
281 if (list_size > max_list_size)
284 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
285 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
287 memset(out, 0, sizeof(out));
288 in = kzalloc(in_sz, GFP_KERNEL);
292 MLX5_SET(modify_nic_vport_context_in, in, opcode,
293 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
294 MLX5_SET(modify_nic_vport_context_in, in,
295 field_select.addresses_list, 1);
297 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
300 MLX5_SET(nic_vport_context, nic_vport_ctx,
301 allowed_list_type, list_type);
302 MLX5_SET(nic_vport_context, nic_vport_ctx,
303 allowed_list_size, list_size);
305 for (i = 0; i < list_size; i++) {
306 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
308 current_uc_mac_address[i]) + 2;
309 ether_addr_copy(curr_mac, addr_list[i]);
312 err = mlx5_cmd_exec_check_status(dev, in, in_sz, out, sizeof(out));
316 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
318 int mlx5_query_nic_vport_vlans(struct mlx5_core_dev *dev,
323 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)];
332 req_list_size = *size;
333 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
334 if (req_list_size > max_list_size) {
335 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max list size\n",
336 req_list_size, max_list_size);
337 req_list_size = max_list_size;
340 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
341 req_list_size * MLX5_ST_SZ_BYTES(vlan_layout);
343 memset(in, 0, sizeof(in));
344 out = kzalloc(out_sz, GFP_KERNEL);
348 MLX5_SET(query_nic_vport_context_in, in, opcode,
349 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
350 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type,
351 MLX5_NVPRT_LIST_TYPE_VLAN);
352 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
355 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
357 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, out_sz);
361 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
363 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
366 *size = req_list_size;
367 for (i = 0; i < req_list_size; i++) {
368 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
370 current_uc_mac_address[i]);
371 vlans[i] = MLX5_GET(vlan_layout, vlan_addr, vlan);
377 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_vlans);
379 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
383 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
391 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
393 if (list_size > max_list_size)
396 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
397 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
399 memset(out, 0, sizeof(out));
400 in = kzalloc(in_sz, GFP_KERNEL);
404 MLX5_SET(modify_nic_vport_context_in, in, opcode,
405 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
406 MLX5_SET(modify_nic_vport_context_in, in,
407 field_select.addresses_list, 1);
409 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
412 MLX5_SET(nic_vport_context, nic_vport_ctx,
413 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
414 MLX5_SET(nic_vport_context, nic_vport_ctx,
415 allowed_list_size, list_size);
417 for (i = 0; i < list_size; i++) {
418 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
420 current_uc_mac_address[i]);
421 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
424 err = mlx5_cmd_exec_check_status(dev, in, in_sz, out, sizeof(out));
428 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
430 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
431 u64 *system_image_guid)
434 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
436 out = mlx5_vzalloc(outlen);
440 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
442 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
443 nic_vport_context.system_image_guid);
449 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
451 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
454 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
456 out = mlx5_vzalloc(outlen);
460 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
462 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
463 nic_vport_context.node_guid);
469 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
471 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
475 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
477 out = mlx5_vzalloc(outlen);
481 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
483 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
484 nic_vport_context.qkey_violation_counter);
490 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
492 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
493 u8 port_num, u16 vf_num, u16 gid_index,
496 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
497 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
498 int is_group_manager;
506 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
507 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
508 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
509 vf_num, gid_index, tbsz);
511 if (gid_index > tbsz && gid_index != 0xffff)
514 if (gid_index == 0xffff)
519 out_sz += nout * sizeof(*gid);
521 in = kzalloc(in_sz, GFP_KERNEL);
522 out = kzalloc(out_sz, GFP_KERNEL);
528 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
530 if (is_group_manager) {
531 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
532 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
538 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
540 if (MLX5_CAP_GEN(dev, num_ports) == 2)
541 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
543 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
547 err = mlx5_cmd_status_to_err_v2(out);
551 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
552 gid->global.subnet_prefix = tmp->global.subnet_prefix;
553 gid->global.interface_id = tmp->global.interface_id;
560 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
562 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
563 u8 port_num, u16 vf_num, u16 pkey_index,
566 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
567 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
568 int is_group_manager;
577 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
579 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
580 if (pkey_index > tbsz && pkey_index != 0xffff)
583 if (pkey_index == 0xffff)
588 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
590 in = kzalloc(in_sz, GFP_KERNEL);
591 out = kzalloc(out_sz, GFP_KERNEL);
597 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
599 if (is_group_manager) {
600 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
601 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
607 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
609 if (MLX5_CAP_GEN(dev, num_ports) == 2)
610 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
612 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
616 err = mlx5_cmd_status_to_err_v2(out);
620 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
621 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
622 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
629 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
631 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
632 u8 other_vport, u8 port_num,
634 struct mlx5_hca_vport_context *rep)
636 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
637 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)];
638 int is_group_manager;
643 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
645 memset(in, 0, sizeof(in));
646 out = kzalloc(out_sz, GFP_KERNEL);
650 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
653 if (is_group_manager) {
654 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
655 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
662 if (MLX5_CAP_GEN(dev, num_ports) == 2)
663 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
665 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
668 err = mlx5_cmd_status_to_err_v2(out);
672 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
673 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
674 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
675 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
676 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
677 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
678 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
679 port_physical_state);
680 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
681 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
682 port_physical_state);
683 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
684 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
685 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
686 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
687 cap_mask1_field_select);
688 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
689 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
690 cap_mask2_field_select);
691 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
692 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
694 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
695 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
697 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
698 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
699 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
700 qkey_violation_counter);
701 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
702 pkey_violation_counter);
703 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
704 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
711 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
713 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
716 struct mlx5_hca_vport_context *rep;
719 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
723 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
725 *sys_image_guid = rep->sys_image_guid;
730 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
732 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
735 struct mlx5_hca_vport_context *rep;
738 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
742 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
744 *node_guid = rep->node_guid;
749 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
751 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
758 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
761 out = kzalloc(outlen, GFP_KERNEL);
765 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
769 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
770 nic_vport_context.promisc_uc);
771 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
772 nic_vport_context.promisc_mc);
773 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
774 nic_vport_context.promisc_all);
780 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
782 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
788 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
791 in = mlx5_vzalloc(inlen);
793 mlx5_core_err(mdev, "failed to allocate inbox\n");
797 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
798 MLX5_SET(modify_nic_vport_context_in, in,
799 nic_vport_context.promisc_uc, promisc_uc);
800 MLX5_SET(modify_nic_vport_context_in, in,
801 nic_vport_context.promisc_mc, promisc_mc);
802 MLX5_SET(modify_nic_vport_context_in, in,
803 nic_vport_context.promisc_all, promisc_all);
805 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
811 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
813 enum mlx5_vport_roce_state {
814 MLX5_VPORT_ROCE_DISABLED = 0,
815 MLX5_VPORT_ROCE_ENABLED = 1,
818 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
819 enum mlx5_vport_roce_state state)
822 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
825 in = mlx5_vzalloc(inlen);
827 mlx5_core_warn(mdev, "failed to allocate inbox\n");
831 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
832 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
835 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
842 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
844 return mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
846 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
848 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
850 return mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
852 EXPORT_SYMBOL_GPL(mlx5_nic_vport_disable_roce);
854 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
855 int vf, u8 port_num, void *out,
858 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
859 int is_group_manager;
863 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
864 in = mlx5_vzalloc(in_sz);
870 MLX5_SET(query_vport_counter_in, in, opcode,
871 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
873 if (is_group_manager) {
874 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
875 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
881 if (MLX5_CAP_GEN(dev, num_ports) == 2)
882 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
884 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
887 err = mlx5_cmd_status_to_err_v2(out);
893 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
895 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
896 u8 other_vport, u8 port_num,
898 struct mlx5_hca_vport_context *req)
900 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
901 u8 out[MLX5_ST_SZ_BYTES(modify_hca_vport_context_out)];
902 int is_group_manager;
907 mlx5_core_dbg(dev, "vf %d\n", vf);
908 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
909 in = kzalloc(in_sz, GFP_KERNEL);
913 memset(out, 0, sizeof(out));
914 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
916 if (is_group_manager) {
917 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
918 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
925 if (MLX5_CAP_GEN(dev, num_ports) > 1)
926 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
928 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
929 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
930 MLX5_SET(hca_vport_context, ctx, sm_virt_aware, req->sm_virt_aware);
931 MLX5_SET(hca_vport_context, ctx, has_smi, req->has_smi);
932 MLX5_SET(hca_vport_context, ctx, has_raw, req->has_raw);
933 MLX5_SET(hca_vport_context, ctx, vport_state_policy, req->policy);
934 MLX5_SET(hca_vport_context, ctx, port_physical_state, req->phys_state);
935 MLX5_SET(hca_vport_context, ctx, vport_state, req->vport_state);
936 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
937 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
938 MLX5_SET(hca_vport_context, ctx, cap_mask1, req->cap_mask1);
939 MLX5_SET(hca_vport_context, ctx, cap_mask1_field_select, req->cap_mask1_perm);
940 MLX5_SET(hca_vport_context, ctx, cap_mask2, req->cap_mask2);
941 MLX5_SET(hca_vport_context, ctx, cap_mask2_field_select, req->cap_mask2_perm);
942 MLX5_SET(hca_vport_context, ctx, lid, req->lid);
943 MLX5_SET(hca_vport_context, ctx, init_type_reply, req->init_type_reply);
944 MLX5_SET(hca_vport_context, ctx, lmc, req->lmc);
945 MLX5_SET(hca_vport_context, ctx, subnet_timeout, req->subnet_timeout);
946 MLX5_SET(hca_vport_context, ctx, sm_lid, req->sm_lid);
947 MLX5_SET(hca_vport_context, ctx, sm_sl, req->sm_sl);
948 MLX5_SET(hca_vport_context, ctx, qkey_violation_counter, req->qkey_violation_counter);
949 MLX5_SET(hca_vport_context, ctx, pkey_violation_counter, req->pkey_violation_counter);
950 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
954 err = mlx5_cmd_status_to_err_v2(out);
960 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);