2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
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6 * General Public License (GPL) Version 2, available from the file
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33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/io-mapping.h>
36 #include <linux/mlx5/driver.h>
37 #include <linux/mlx5/cmd.h>
38 #include "mlx5_core.h"
42 NUM_LOW_LAT_UUARS = 4,
45 int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn)
47 u32 out[MLX5_ST_SZ_DW(alloc_uar_out)] = {0};
48 u32 in[MLX5_ST_SZ_DW(alloc_uar_in)] = {0};
51 MLX5_SET(alloc_uar_in, in, opcode, MLX5_CMD_OP_ALLOC_UAR);
52 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
54 *uarn = MLX5_GET(alloc_uar_out, out, uar);
57 EXPORT_SYMBOL(mlx5_cmd_alloc_uar);
59 int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn)
61 u32 out[MLX5_ST_SZ_DW(dealloc_uar_out)] = {0};
62 u32 in[MLX5_ST_SZ_DW(dealloc_uar_in)] = {0};
64 MLX5_SET(dealloc_uar_in, in, opcode, MLX5_CMD_OP_DEALLOC_UAR);
65 MLX5_SET(dealloc_uar_in, in, uar, uarn);
66 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
68 EXPORT_SYMBOL(mlx5_cmd_free_uar);
70 static int need_uuar_lock(int uuarn)
72 int tot_uuars = NUM_DRIVER_UARS * MLX5_BF_REGS_PER_PAGE;
74 if (uuarn == 0 || tot_uuars - NUM_LOW_LAT_UUARS)
80 int mlx5_alloc_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari)
82 int tot_uuars = NUM_DRIVER_UARS * MLX5_BF_REGS_PER_PAGE;
88 uuari->num_uars = NUM_DRIVER_UARS;
89 uuari->num_low_latency_uuars = NUM_LOW_LAT_UUARS;
91 mutex_init(&uuari->lock);
92 uuari->uars = kcalloc(uuari->num_uars, sizeof(*uuari->uars), GFP_KERNEL);
96 uuari->bfs = kcalloc(tot_uuars, sizeof(*uuari->bfs), GFP_KERNEL);
102 uuari->bitmap = kcalloc(BITS_TO_LONGS(tot_uuars), sizeof(*uuari->bitmap),
104 if (!uuari->bitmap) {
109 uuari->count = kcalloc(tot_uuars, sizeof(*uuari->count), GFP_KERNEL);
115 for (i = 0; i < uuari->num_uars; i++) {
116 err = mlx5_cmd_alloc_uar(dev, &uuari->uars[i].index);
120 addr = dev->iseg_base + ((phys_addr_t)(uuari->uars[i].index) << PAGE_SHIFT);
121 uuari->uars[i].map = ioremap(addr, PAGE_SIZE);
122 if (!uuari->uars[i].map) {
123 mlx5_cmd_free_uar(dev, uuari->uars[i].index);
127 mlx5_core_dbg(dev, "allocated uar index 0x%x, mmaped at %p\n",
128 uuari->uars[i].index, uuari->uars[i].map);
131 for (i = 0; i < tot_uuars; i++) {
134 bf->buf_size = (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) / 2;
135 bf->uar = &uuari->uars[i / MLX5_BF_REGS_PER_PAGE];
136 bf->regreg = uuari->uars[i / MLX5_BF_REGS_PER_PAGE].map;
137 bf->reg = NULL; /* Add WC support */
138 bf->offset = (i % MLX5_BF_REGS_PER_PAGE) *
139 (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) +
141 bf->need_lock = need_uuar_lock(i);
142 spin_lock_init(&bf->lock);
143 spin_lock_init(&bf->lock32);
150 for (i--; i >= 0; i--) {
151 iounmap(uuari->uars[i].map);
152 mlx5_cmd_free_uar(dev, uuari->uars[i].index);
157 kfree(uuari->bitmap);
167 int mlx5_free_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari)
169 int i = uuari->num_uars;
171 for (i--; i >= 0; i--) {
172 iounmap(uuari->uars[i].map);
173 mlx5_cmd_free_uar(dev, uuari->uars[i].index);
177 kfree(uuari->bitmap);
184 int mlx5_alloc_map_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar,
188 phys_addr_t uar_bar_start;
191 err = mlx5_cmd_alloc_uar(mdev, &uar->index);
193 mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err);
197 uar_bar_start = pci_resource_start(mdev->pdev, 0);
198 pfn = (uar_bar_start >> PAGE_SHIFT) + uar->index;
201 uar->bf_map = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
203 mlx5_core_warn(mdev, "ioremap_wc() failed\n");
204 uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
209 uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
217 mlx5_core_warn(mdev, "ioremap() failed\n");
219 mlx5_cmd_free_uar(mdev, uar->index);
223 EXPORT_SYMBOL(mlx5_alloc_map_uar);
225 void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar)
230 iounmap(uar->bf_map);
231 mlx5_cmd_free_uar(mdev, uar->index);
233 EXPORT_SYMBOL(mlx5_unmap_free_uar);