1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
7 #include <linux/mlx5/driver.h>
9 #define MLX5_MAX_IRQ_NAME (32)
10 /* max irq_index is 2047, so four chars */
11 #define MLX5_MAX_IRQ_IDX_CHARS (4)
12 #define MLX5_EQ_REFS_PER_IRQ (2)
17 struct mlx5_irq_pool {
18 char name[MLX5_MAX_IRQ_NAME - MLX5_MAX_IRQ_IDX_CHARS];
19 struct xa_limit xa_num_irqs;
20 struct mutex lock; /* sync IRQs creations */
25 struct mlx5_core_dev *dev;
28 struct mlx5_irq_pool *mlx5_irq_pool_get(struct mlx5_core_dev *dev);
29 static inline bool mlx5_irq_pool_is_sf_pool(struct mlx5_irq_pool *pool)
31 return !strncmp("mlx5_sf", pool->name, strlen("mlx5_sf"));
34 struct mlx5_irq *mlx5_irq_alloc(struct mlx5_irq_pool *pool, int i,
35 struct irq_affinity_desc *af_desc,
36 struct cpu_rmap **rmap);
37 int mlx5_irq_get_locked(struct mlx5_irq *irq);
38 int mlx5_irq_read_locked(struct mlx5_irq *irq);
39 int mlx5_irq_put(struct mlx5_irq *irq);
41 #endif /* __PCI_IRQ_H__ */