2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
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15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #ifndef __MLX5_FPGA_CONN_H__
35 #define __MLX5_FPGA_CONN_H__
37 #include <linux/mlx5/cq.h>
38 #include <linux/mlx5/qp.h>
40 #include "fpga/core.h"
44 struct mlx5_fpga_conn {
45 struct mlx5_fpga_device *fdev;
47 void (*recv_cb)(void *cb_arg, struct mlx5_fpga_dma_buf *buf);
51 u32 fpga_qpc[MLX5_ST_SZ_DW(fpga_qpc)];
57 struct mlx5_wq_ctrl wq_ctrl;
58 struct mlx5_core_cq mcq;
59 struct tasklet_struct tasklet;
67 struct mlx5_wq_ctrl wq_ctrl;
68 struct mlx5_core_qp mqp;
70 spinlock_t lock; /* Protects all SQ state */
74 struct mlx5_fpga_dma_buf **bufs;
75 struct list_head backlog;
81 struct mlx5_fpga_dma_buf **bufs;
86 int mlx5_fpga_conn_device_init(struct mlx5_fpga_device *fdev);
87 void mlx5_fpga_conn_device_cleanup(struct mlx5_fpga_device *fdev);
88 struct mlx5_fpga_conn *
89 mlx5_fpga_conn_create(struct mlx5_fpga_device *fdev,
90 struct mlx5_fpga_conn_attr *attr,
91 enum mlx5_ifc_fpga_qp_type qp_type);
92 void mlx5_fpga_conn_destroy(struct mlx5_fpga_conn *conn);
93 int mlx5_fpga_conn_send(struct mlx5_fpga_conn *conn,
94 struct mlx5_fpga_dma_buf *buf);
96 #endif /* __MLX5_FPGA_CONN_H__ */