2 * Copyright (c) 2017, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
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8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
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23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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33 #ifndef __MLX5_FPGA_H__
34 #define __MLX5_FPGA_H__
36 #include <linux/mlx5/driver.h>
38 enum mlx5_fpga_image {
39 MLX5_FPGA_IMAGE_USER = 0,
40 MLX5_FPGA_IMAGE_FACTORY,
43 enum mlx5_fpga_status {
44 MLX5_FPGA_STATUS_SUCCESS = 0,
45 MLX5_FPGA_STATUS_FAILURE = 1,
46 MLX5_FPGA_STATUS_IN_PROGRESS = 2,
47 MLX5_FPGA_STATUS_NONE = 0xFFFF,
50 struct mlx5_fpga_query {
51 enum mlx5_fpga_image admin_image;
52 enum mlx5_fpga_image oper_image;
53 enum mlx5_fpga_status status;
56 enum mlx5_fpga_qpc_field_select {
57 MLX5_FPGA_QPC_STATE = BIT(0),
60 struct mlx5_fpga_qp_counters {
68 int mlx5_fpga_caps(struct mlx5_core_dev *dev);
69 int mlx5_fpga_query(struct mlx5_core_dev *dev, struct mlx5_fpga_query *query);
70 int mlx5_fpga_ctrl_op(struct mlx5_core_dev *dev, u8 op);
71 int mlx5_fpga_access_reg(struct mlx5_core_dev *dev, u8 size, u64 addr,
72 void *buf, bool write);
73 int mlx5_fpga_sbu_caps(struct mlx5_core_dev *dev, void *caps, int size);
75 int mlx5_fpga_create_qp(struct mlx5_core_dev *dev, void *fpga_qpc,
77 int mlx5_fpga_modify_qp(struct mlx5_core_dev *dev, u32 fpga_qpn,
78 enum mlx5_fpga_qpc_field_select fields, void *fpga_qpc);
79 int mlx5_fpga_query_qp(struct mlx5_core_dev *dev, u32 fpga_qpn, void *fpga_qpc);
80 int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn,
81 bool clear, struct mlx5_fpga_qp_counters *data);
82 int mlx5_fpga_destroy_qp(struct mlx5_core_dev *dev, u32 fpga_qpn);
84 #endif /* __MLX5_FPGA_H__ */