2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
41 #define UPLINK_VPORT 0xFFFF
49 /* Vport UC/MC hash node */
51 struct l2addr_node node;
54 struct mlx5_flow_handle *flow_rule;
55 bool mpfs; /* UC MAC was added to MPFs */
56 /* A flag indicating that mac was added due to mc promiscuous vport */
61 UC_ADDR_CHANGE = BIT(0),
62 MC_ADDR_CHANGE = BIT(1),
63 PROMISC_CHANGE = BIT(3),
66 /* Vport context events */
67 #define SRIOV_VPORT_EVENTS (UC_ADDR_CHANGE | \
71 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
74 int in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
75 int out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
78 MLX5_SET(modify_nic_vport_context_in, in,
79 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
80 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
81 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
83 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
84 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
85 in, nic_vport_context);
87 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
89 if (events_mask & UC_ADDR_CHANGE)
90 MLX5_SET(nic_vport_context, nic_vport_ctx,
91 event_on_uc_address_change, 1);
92 if (events_mask & MC_ADDR_CHANGE)
93 MLX5_SET(nic_vport_context, nic_vport_ctx,
94 event_on_mc_address_change, 1);
95 if (events_mask & PROMISC_CHANGE)
96 MLX5_SET(nic_vport_context, nic_vport_ctx,
97 event_on_promisc_change, 1);
99 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
102 /* E-Switch vport context HW commands */
103 static int modify_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
106 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
108 MLX5_SET(modify_esw_vport_context_in, in, opcode,
109 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
110 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
112 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
113 return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
116 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
117 u16 vlan, u8 qos, u8 set_flags)
119 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {0};
121 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
122 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
125 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
126 vport, vlan, qos, set_flags);
128 if (set_flags & SET_VLAN_STRIP)
129 MLX5_SET(modify_esw_vport_context_in, in,
130 esw_vport_context.vport_cvlan_strip, 1);
132 if (set_flags & SET_VLAN_INSERT) {
133 /* insert only if no vlan in packet */
134 MLX5_SET(modify_esw_vport_context_in, in,
135 esw_vport_context.vport_cvlan_insert, 1);
137 MLX5_SET(modify_esw_vport_context_in, in,
138 esw_vport_context.cvlan_pcp, qos);
139 MLX5_SET(modify_esw_vport_context_in, in,
140 esw_vport_context.cvlan_id, vlan);
143 MLX5_SET(modify_esw_vport_context_in, in,
144 field_select.vport_cvlan_strip, 1);
145 MLX5_SET(modify_esw_vport_context_in, in,
146 field_select.vport_cvlan_insert, 1);
148 return modify_esw_vport_context_cmd(dev, vport, in, sizeof(in));
152 static struct mlx5_flow_handle *
153 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u32 vport, bool rx_rule,
154 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
156 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
157 MLX5_MATCH_OUTER_HEADERS);
158 struct mlx5_flow_handle *flow_rule = NULL;
159 struct mlx5_flow_act flow_act = {0};
160 struct mlx5_flow_destination dest = {};
161 struct mlx5_flow_spec *spec;
162 void *mv_misc = NULL;
163 void *mc_misc = NULL;
168 match_header |= MLX5_MATCH_MISC_PARAMETERS;
170 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
174 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
175 outer_headers.dmac_47_16);
176 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
177 outer_headers.dmac_47_16);
179 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
180 ether_addr_copy(dmac_v, mac_v);
181 ether_addr_copy(dmac_c, mac_c);
184 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
185 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
187 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
189 MLX5_SET(fte_match_set_misc, mv_misc, source_port, UPLINK_VPORT);
190 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
193 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
194 dest.vport_num = vport;
197 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
198 dmac_v, dmac_c, vport);
199 spec->match_criteria_enable = match_header;
200 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
202 mlx5_add_flow_rules(esw->fdb_table.fdb, spec,
203 &flow_act, &dest, 1);
204 if (IS_ERR(flow_rule)) {
206 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
207 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
215 static struct mlx5_flow_handle *
216 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u32 vport)
220 eth_broadcast_addr(mac_c);
221 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
224 static struct mlx5_flow_handle *
225 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u32 vport)
230 eth_zero_addr(mac_c);
231 eth_zero_addr(mac_v);
234 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
237 static struct mlx5_flow_handle *
238 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u32 vport)
243 eth_zero_addr(mac_c);
244 eth_zero_addr(mac_v);
245 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
248 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw, int nvports)
250 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
251 struct mlx5_flow_table_attr ft_attr = {};
252 struct mlx5_core_dev *dev = esw->dev;
253 struct mlx5_flow_namespace *root_ns;
254 struct mlx5_flow_table *fdb;
255 struct mlx5_flow_group *g;
256 void *match_criteria;
262 esw_debug(dev, "Create FDB log_max_size(%d)\n",
263 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
265 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
267 esw_warn(dev, "Failed to get FDB flow namespace\n");
271 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
275 table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
277 ft_attr.max_fte = table_size;
278 fdb = mlx5_create_flow_table(root_ns, &ft_attr);
281 esw_warn(dev, "Failed to create FDB Table err %d\n", err);
284 esw->fdb_table.fdb = fdb;
286 /* Addresses group : Full match unicast/multicast addresses */
287 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
288 MLX5_MATCH_OUTER_HEADERS);
289 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
290 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria, outer_headers.dmac_47_16);
291 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
292 /* Preserve 2 entries for allmulti and promisc rules*/
293 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
294 eth_broadcast_addr(dmac);
295 g = mlx5_create_flow_group(fdb, flow_group_in);
298 esw_warn(dev, "Failed to create flow group err(%d)\n", err);
301 esw->fdb_table.legacy.addr_grp = g;
303 /* Allmulti group : One rule that forwards any mcast traffic */
304 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
305 MLX5_MATCH_OUTER_HEADERS);
306 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 2);
307 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 2);
310 g = mlx5_create_flow_group(fdb, flow_group_in);
313 esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
316 esw->fdb_table.legacy.allmulti_grp = g;
318 /* Promiscuous group :
319 * One rule that forward all unmatched traffic from previous groups
322 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
323 MLX5_MATCH_MISC_PARAMETERS);
324 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
325 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
326 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
327 g = mlx5_create_flow_group(fdb, flow_group_in);
330 esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
333 esw->fdb_table.legacy.promisc_grp = g;
337 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.allmulti_grp)) {
338 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
339 esw->fdb_table.legacy.allmulti_grp = NULL;
341 if (!IS_ERR_OR_NULL(esw->fdb_table.legacy.addr_grp)) {
342 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
343 esw->fdb_table.legacy.addr_grp = NULL;
345 if (!IS_ERR_OR_NULL(esw->fdb_table.fdb)) {
346 mlx5_destroy_flow_table(esw->fdb_table.fdb);
347 esw->fdb_table.fdb = NULL;
351 kvfree(flow_group_in);
355 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)
357 if (!esw->fdb_table.fdb)
360 esw_debug(esw->dev, "Destroy FDB Table\n");
361 mlx5_destroy_flow_group(esw->fdb_table.legacy.promisc_grp);
362 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
363 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
364 mlx5_destroy_flow_table(esw->fdb_table.fdb);
365 esw->fdb_table.fdb = NULL;
366 esw->fdb_table.legacy.addr_grp = NULL;
367 esw->fdb_table.legacy.allmulti_grp = NULL;
368 esw->fdb_table.legacy.promisc_grp = NULL;
371 /* E-Switch vport UC/MC lists management */
372 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
373 struct vport_addr *vaddr);
375 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
377 u8 *mac = vaddr->node.addr;
378 u32 vport = vaddr->vport;
381 /* Skip mlx5_mpfs_add_mac for PFs,
382 * it is already done by the PF netdev in mlx5e_execute_l2_action
387 err = mlx5_mpfs_add_mac(esw->dev, mac);
390 "Failed to add L2 table mac(%pM) for vport(%d), err(%d)\n",
397 /* SRIOV is enabled: Forward UC MAC to vport */
398 if (esw->fdb_table.fdb && esw->mode == SRIOV_LEGACY)
399 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
401 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM fr(%p)\n",
402 vport, mac, vaddr->flow_rule);
407 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
409 u8 *mac = vaddr->node.addr;
410 u32 vport = vaddr->vport;
413 /* Skip mlx5_mpfs_del_mac for PFs,
414 * it is already done by the PF netdev in mlx5e_execute_l2_action
416 if (!vport || !vaddr->mpfs)
419 err = mlx5_mpfs_del_mac(esw->dev, mac);
422 "Failed to del L2 table mac(%pM) for vport(%d), err(%d)\n",
427 if (vaddr->flow_rule)
428 mlx5_del_flow_rules(vaddr->flow_rule);
429 vaddr->flow_rule = NULL;
434 static void update_allmulti_vports(struct mlx5_eswitch *esw,
435 struct vport_addr *vaddr,
436 struct esw_mc_addr *esw_mc)
438 u8 *mac = vaddr->node.addr;
441 for (vport_idx = 0; vport_idx < esw->total_vports; vport_idx++) {
442 struct mlx5_vport *vport = &esw->vports[vport_idx];
443 struct hlist_head *vport_hash = vport->mc_list;
444 struct vport_addr *iter_vaddr =
445 l2addr_hash_find(vport_hash,
448 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
449 vaddr->vport == vport_idx)
451 switch (vaddr->action) {
452 case MLX5_ACTION_ADD:
455 iter_vaddr = l2addr_hash_add(vport_hash, mac,
460 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
464 iter_vaddr->vport = vport_idx;
465 iter_vaddr->flow_rule =
466 esw_fdb_set_vport_rule(esw,
469 iter_vaddr->mc_promisc = true;
471 case MLX5_ACTION_DEL:
474 mlx5_del_flow_rules(iter_vaddr->flow_rule);
475 l2addr_hash_del(iter_vaddr);
481 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
483 struct hlist_head *hash = esw->mc_table;
484 struct esw_mc_addr *esw_mc;
485 u8 *mac = vaddr->node.addr;
486 u32 vport = vaddr->vport;
488 if (!esw->fdb_table.fdb)
491 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
495 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
499 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
500 esw_fdb_set_vport_rule(esw, mac, UPLINK_VPORT);
502 /* Add this multicast mac to all the mc promiscuous vports */
503 update_allmulti_vports(esw, vaddr, esw_mc);
506 /* If the multicast mac is added as a result of mc promiscuous vport,
507 * don't increment the multicast ref count
509 if (!vaddr->mc_promisc)
512 /* Forward MC MAC to vport */
513 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
515 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
516 vport, mac, vaddr->flow_rule,
517 esw_mc->refcnt, esw_mc->uplink_rule);
521 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
523 struct hlist_head *hash = esw->mc_table;
524 struct esw_mc_addr *esw_mc;
525 u8 *mac = vaddr->node.addr;
526 u32 vport = vaddr->vport;
528 if (!esw->fdb_table.fdb)
531 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
534 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
539 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
540 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
541 esw_mc->uplink_rule);
543 if (vaddr->flow_rule)
544 mlx5_del_flow_rules(vaddr->flow_rule);
545 vaddr->flow_rule = NULL;
547 /* If the multicast mac is added as a result of mc promiscuous vport,
548 * don't decrement the multicast ref count.
550 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
553 /* Remove this multicast mac from all the mc promiscuous vports */
554 update_allmulti_vports(esw, vaddr, esw_mc);
556 if (esw_mc->uplink_rule)
557 mlx5_del_flow_rules(esw_mc->uplink_rule);
559 l2addr_hash_del(esw_mc);
563 /* Apply vport UC/MC list to HW l2 table and FDB table */
564 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
565 u32 vport_num, int list_type)
567 struct mlx5_vport *vport = &esw->vports[vport_num];
568 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
569 vport_addr_action vport_addr_add;
570 vport_addr_action vport_addr_del;
571 struct vport_addr *addr;
572 struct l2addr_node *node;
573 struct hlist_head *hash;
574 struct hlist_node *tmp;
577 vport_addr_add = is_uc ? esw_add_uc_addr :
579 vport_addr_del = is_uc ? esw_del_uc_addr :
582 hash = is_uc ? vport->uc_list : vport->mc_list;
583 for_each_l2hash_node(node, tmp, hash, hi) {
584 addr = container_of(node, struct vport_addr, node);
585 switch (addr->action) {
586 case MLX5_ACTION_ADD:
587 vport_addr_add(esw, addr);
588 addr->action = MLX5_ACTION_NONE;
590 case MLX5_ACTION_DEL:
591 vport_addr_del(esw, addr);
592 l2addr_hash_del(addr);
598 /* Sync vport UC/MC list from vport context */
599 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
600 u32 vport_num, int list_type)
602 struct mlx5_vport *vport = &esw->vports[vport_num];
603 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
604 u8 (*mac_list)[ETH_ALEN];
605 struct l2addr_node *node;
606 struct vport_addr *addr;
607 struct hlist_head *hash;
608 struct hlist_node *tmp;
614 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
615 MLX5_MAX_MC_PER_VPORT(esw->dev);
617 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
621 hash = is_uc ? vport->uc_list : vport->mc_list;
623 for_each_l2hash_node(node, tmp, hash, hi) {
624 addr = container_of(node, struct vport_addr, node);
625 addr->action = MLX5_ACTION_DEL;
631 err = mlx5_query_nic_vport_mac_list(esw->dev, vport_num, list_type,
635 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
636 vport_num, is_uc ? "UC" : "MC", size);
638 for (i = 0; i < size; i++) {
639 if (is_uc && !is_valid_ether_addr(mac_list[i]))
642 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
645 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
647 addr->action = MLX5_ACTION_NONE;
648 /* If this mac was previously added because of allmulti
649 * promiscuous rx mode, its now converted to be original
652 if (addr->mc_promisc) {
653 struct esw_mc_addr *esw_mc =
654 l2addr_hash_find(esw->mc_table,
659 "Failed to MAC(%pM) in mcast DB\n",
664 addr->mc_promisc = false;
669 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
673 "Failed to add MAC(%pM) to vport[%d] DB\n",
674 mac_list[i], vport_num);
677 addr->vport = vport_num;
678 addr->action = MLX5_ACTION_ADD;
684 /* Sync vport UC/MC list from vport context
685 * Must be called after esw_update_vport_addr_list
687 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw, u32 vport_num)
689 struct mlx5_vport *vport = &esw->vports[vport_num];
690 struct l2addr_node *node;
691 struct vport_addr *addr;
692 struct hlist_head *hash;
693 struct hlist_node *tmp;
696 hash = vport->mc_list;
698 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
699 u8 *mac = node->addr;
701 addr = l2addr_hash_find(hash, mac, struct vport_addr);
703 if (addr->action == MLX5_ACTION_DEL)
704 addr->action = MLX5_ACTION_NONE;
707 addr = l2addr_hash_add(hash, mac, struct vport_addr,
711 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
715 addr->vport = vport_num;
716 addr->action = MLX5_ACTION_ADD;
717 addr->mc_promisc = true;
721 /* Apply vport rx mode to HW FDB table */
722 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num,
723 bool promisc, bool mc_promisc)
725 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
726 struct mlx5_vport *vport = &esw->vports[vport_num];
728 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
732 vport->allmulti_rule =
733 esw_fdb_set_vport_allmulti_rule(esw, vport_num);
734 if (!allmulti_addr->uplink_rule)
735 allmulti_addr->uplink_rule =
736 esw_fdb_set_vport_allmulti_rule(esw,
738 allmulti_addr->refcnt++;
739 } else if (vport->allmulti_rule) {
740 mlx5_del_flow_rules(vport->allmulti_rule);
741 vport->allmulti_rule = NULL;
743 if (--allmulti_addr->refcnt > 0)
746 if (allmulti_addr->uplink_rule)
747 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
748 allmulti_addr->uplink_rule = NULL;
752 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
756 vport->promisc_rule = esw_fdb_set_vport_promisc_rule(esw,
758 } else if (vport->promisc_rule) {
759 mlx5_del_flow_rules(vport->promisc_rule);
760 vport->promisc_rule = NULL;
764 /* Sync vport rx mode from vport context */
765 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw, u32 vport_num)
767 struct mlx5_vport *vport = &esw->vports[vport_num];
773 err = mlx5_query_nic_vport_promisc(esw->dev,
780 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
781 vport_num, promisc_all, promisc_mc);
783 if (!vport->info.trusted || !vport->enabled) {
789 esw_apply_vport_rx_mode(esw, vport_num, promisc_all,
790 (promisc_all || promisc_mc));
793 static void esw_vport_change_handle_locked(struct mlx5_vport *vport)
795 struct mlx5_core_dev *dev = vport->dev;
796 struct mlx5_eswitch *esw = dev->priv.eswitch;
799 mlx5_query_nic_vport_mac_address(dev, vport->vport, mac);
800 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
803 if (vport->enabled_events & UC_ADDR_CHANGE) {
804 esw_update_vport_addr_list(esw, vport->vport,
805 MLX5_NVPRT_LIST_TYPE_UC);
806 esw_apply_vport_addr_list(esw, vport->vport,
807 MLX5_NVPRT_LIST_TYPE_UC);
810 if (vport->enabled_events & MC_ADDR_CHANGE) {
811 esw_update_vport_addr_list(esw, vport->vport,
812 MLX5_NVPRT_LIST_TYPE_MC);
815 if (vport->enabled_events & PROMISC_CHANGE) {
816 esw_update_vport_rx_mode(esw, vport->vport);
817 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
818 esw_update_vport_mc_promisc(esw, vport->vport);
821 if (vport->enabled_events & (PROMISC_CHANGE | MC_ADDR_CHANGE)) {
822 esw_apply_vport_addr_list(esw, vport->vport,
823 MLX5_NVPRT_LIST_TYPE_MC);
826 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
828 arm_vport_context_events_cmd(dev, vport->vport,
829 vport->enabled_events);
832 static void esw_vport_change_handler(struct work_struct *work)
834 struct mlx5_vport *vport =
835 container_of(work, struct mlx5_vport, vport_change_handler);
836 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
838 mutex_lock(&esw->state_lock);
839 esw_vport_change_handle_locked(vport);
840 mutex_unlock(&esw->state_lock);
843 static int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
844 struct mlx5_vport *vport)
846 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
847 struct mlx5_flow_group *vlan_grp = NULL;
848 struct mlx5_flow_group *drop_grp = NULL;
849 struct mlx5_core_dev *dev = esw->dev;
850 struct mlx5_flow_namespace *root_ns;
851 struct mlx5_flow_table *acl;
852 void *match_criteria;
854 /* The egress acl table contains 2 rules:
855 * 1)Allow traffic with vlan_tag=vst_vlan_id
856 * 2)Drop all other traffic.
861 if (!MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
864 if (!IS_ERR_OR_NULL(vport->egress.acl))
867 esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
868 vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
870 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
872 esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
876 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
880 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
883 esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
888 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
889 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
890 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
891 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.first_vid);
892 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
893 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
895 vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
896 if (IS_ERR(vlan_grp)) {
897 err = PTR_ERR(vlan_grp);
898 esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
903 memset(flow_group_in, 0, inlen);
904 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
905 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
906 drop_grp = mlx5_create_flow_group(acl, flow_group_in);
907 if (IS_ERR(drop_grp)) {
908 err = PTR_ERR(drop_grp);
909 esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
914 vport->egress.acl = acl;
915 vport->egress.drop_grp = drop_grp;
916 vport->egress.allowed_vlans_grp = vlan_grp;
918 kvfree(flow_group_in);
919 if (err && !IS_ERR_OR_NULL(vlan_grp))
920 mlx5_destroy_flow_group(vlan_grp);
921 if (err && !IS_ERR_OR_NULL(acl))
922 mlx5_destroy_flow_table(acl);
926 static void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
927 struct mlx5_vport *vport)
929 if (!IS_ERR_OR_NULL(vport->egress.allowed_vlan))
930 mlx5_del_flow_rules(vport->egress.allowed_vlan);
932 if (!IS_ERR_OR_NULL(vport->egress.drop_rule))
933 mlx5_del_flow_rules(vport->egress.drop_rule);
935 vport->egress.allowed_vlan = NULL;
936 vport->egress.drop_rule = NULL;
939 static void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
940 struct mlx5_vport *vport)
942 if (IS_ERR_OR_NULL(vport->egress.acl))
945 esw_debug(esw->dev, "Destroy vport[%d] E-Switch egress ACL\n", vport->vport);
947 esw_vport_cleanup_egress_rules(esw, vport);
948 mlx5_destroy_flow_group(vport->egress.allowed_vlans_grp);
949 mlx5_destroy_flow_group(vport->egress.drop_grp);
950 mlx5_destroy_flow_table(vport->egress.acl);
951 vport->egress.allowed_vlans_grp = NULL;
952 vport->egress.drop_grp = NULL;
953 vport->egress.acl = NULL;
956 static int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
957 struct mlx5_vport *vport)
959 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
960 struct mlx5_core_dev *dev = esw->dev;
961 struct mlx5_flow_namespace *root_ns;
962 struct mlx5_flow_table *acl;
963 struct mlx5_flow_group *g;
964 void *match_criteria;
966 /* The ingress acl table contains 4 groups
967 * (2 active rules at the same time -
968 * 1 allow rule from one of the first 3 groups.
969 * 1 drop rule from the last group):
970 * 1)Allow untagged traffic with smac=original mac.
971 * 2)Allow untagged traffic.
972 * 3)Allow traffic with smac=original mac.
973 * 4)Drop all other traffic.
978 if (!MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
981 if (!IS_ERR_OR_NULL(vport->ingress.acl))
984 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
985 vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
987 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
989 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n");
993 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
997 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1000 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1004 vport->ingress.acl = acl;
1006 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1008 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1009 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1010 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1011 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1012 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1013 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1015 g = mlx5_create_flow_group(acl, flow_group_in);
1018 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1022 vport->ingress.allow_untagged_spoofchk_grp = g;
1024 memset(flow_group_in, 0, inlen);
1025 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1026 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1027 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1028 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1030 g = mlx5_create_flow_group(acl, flow_group_in);
1033 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1037 vport->ingress.allow_untagged_only_grp = g;
1039 memset(flow_group_in, 0, inlen);
1040 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1041 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1042 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1043 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 2);
1044 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1046 g = mlx5_create_flow_group(acl, flow_group_in);
1049 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1053 vport->ingress.allow_spoofchk_only_grp = g;
1055 memset(flow_group_in, 0, inlen);
1056 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 3);
1057 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1059 g = mlx5_create_flow_group(acl, flow_group_in);
1062 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1066 vport->ingress.drop_grp = g;
1070 if (!IS_ERR_OR_NULL(vport->ingress.allow_spoofchk_only_grp))
1071 mlx5_destroy_flow_group(
1072 vport->ingress.allow_spoofchk_only_grp);
1073 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_only_grp))
1074 mlx5_destroy_flow_group(
1075 vport->ingress.allow_untagged_only_grp);
1076 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_spoofchk_grp))
1077 mlx5_destroy_flow_group(
1078 vport->ingress.allow_untagged_spoofchk_grp);
1079 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1080 mlx5_destroy_flow_table(vport->ingress.acl);
1083 kvfree(flow_group_in);
1087 static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
1088 struct mlx5_vport *vport)
1090 if (!IS_ERR_OR_NULL(vport->ingress.drop_rule))
1091 mlx5_del_flow_rules(vport->ingress.drop_rule);
1093 if (!IS_ERR_OR_NULL(vport->ingress.allow_rule))
1094 mlx5_del_flow_rules(vport->ingress.allow_rule);
1096 vport->ingress.drop_rule = NULL;
1097 vport->ingress.allow_rule = NULL;
1100 static void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
1101 struct mlx5_vport *vport)
1103 if (IS_ERR_OR_NULL(vport->ingress.acl))
1106 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport);
1108 esw_vport_cleanup_ingress_rules(esw, vport);
1109 mlx5_destroy_flow_group(vport->ingress.allow_spoofchk_only_grp);
1110 mlx5_destroy_flow_group(vport->ingress.allow_untagged_only_grp);
1111 mlx5_destroy_flow_group(vport->ingress.allow_untagged_spoofchk_grp);
1112 mlx5_destroy_flow_group(vport->ingress.drop_grp);
1113 mlx5_destroy_flow_table(vport->ingress.acl);
1114 vport->ingress.acl = NULL;
1115 vport->ingress.drop_grp = NULL;
1116 vport->ingress.allow_spoofchk_only_grp = NULL;
1117 vport->ingress.allow_untagged_only_grp = NULL;
1118 vport->ingress.allow_untagged_spoofchk_grp = NULL;
1121 static int esw_vport_ingress_config(struct mlx5_eswitch *esw,
1122 struct mlx5_vport *vport)
1124 struct mlx5_flow_act flow_act = {0};
1125 struct mlx5_flow_spec *spec;
1129 if (vport->info.spoofchk && !is_valid_ether_addr(vport->info.mac)) {
1130 mlx5_core_warn(esw->dev,
1131 "vport[%d] configure ingress rules failed, illegal mac with spoofchk\n",
1136 esw_vport_cleanup_ingress_rules(esw, vport);
1138 if (!vport->info.vlan && !vport->info.qos && !vport->info.spoofchk) {
1139 esw_vport_disable_ingress_acl(esw, vport);
1143 err = esw_vport_enable_ingress_acl(esw, vport);
1145 mlx5_core_warn(esw->dev,
1146 "failed to enable ingress acl (%d) on vport[%d]\n",
1152 "vport[%d] configure ingress rules, vlan(%d) qos(%d)\n",
1153 vport->vport, vport->info.vlan, vport->info.qos);
1155 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
1161 if (vport->info.vlan || vport->info.qos)
1162 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1164 if (vport->info.spoofchk) {
1165 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_47_16);
1166 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_15_0);
1167 smac_v = MLX5_ADDR_OF(fte_match_param,
1169 outer_headers.smac_47_16);
1170 ether_addr_copy(smac_v, vport->info.mac);
1173 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1174 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1175 vport->ingress.allow_rule =
1176 mlx5_add_flow_rules(vport->ingress.acl, spec,
1177 &flow_act, NULL, 0);
1178 if (IS_ERR(vport->ingress.allow_rule)) {
1179 err = PTR_ERR(vport->ingress.allow_rule);
1181 "vport[%d] configure ingress allow rule, err(%d)\n",
1183 vport->ingress.allow_rule = NULL;
1187 memset(spec, 0, sizeof(*spec));
1188 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1189 vport->ingress.drop_rule =
1190 mlx5_add_flow_rules(vport->ingress.acl, spec,
1191 &flow_act, NULL, 0);
1192 if (IS_ERR(vport->ingress.drop_rule)) {
1193 err = PTR_ERR(vport->ingress.drop_rule);
1195 "vport[%d] configure ingress drop rule, err(%d)\n",
1197 vport->ingress.drop_rule = NULL;
1203 esw_vport_cleanup_ingress_rules(esw, vport);
1208 static int esw_vport_egress_config(struct mlx5_eswitch *esw,
1209 struct mlx5_vport *vport)
1211 struct mlx5_flow_act flow_act = {0};
1212 struct mlx5_flow_spec *spec;
1215 esw_vport_cleanup_egress_rules(esw, vport);
1217 if (!vport->info.vlan && !vport->info.qos) {
1218 esw_vport_disable_egress_acl(esw, vport);
1222 err = esw_vport_enable_egress_acl(esw, vport);
1224 mlx5_core_warn(esw->dev,
1225 "failed to enable egress acl (%d) on vport[%d]\n",
1231 "vport[%d] configure egress rules, vlan(%d) qos(%d)\n",
1232 vport->vport, vport->info.vlan, vport->info.qos);
1234 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
1240 /* Allowed vlan rule */
1241 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1242 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.cvlan_tag);
1243 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.first_vid);
1244 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vport->info.vlan);
1246 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1247 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1248 vport->egress.allowed_vlan =
1249 mlx5_add_flow_rules(vport->egress.acl, spec,
1250 &flow_act, NULL, 0);
1251 if (IS_ERR(vport->egress.allowed_vlan)) {
1252 err = PTR_ERR(vport->egress.allowed_vlan);
1254 "vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1256 vport->egress.allowed_vlan = NULL;
1260 /* Drop others rule (star rule) */
1261 memset(spec, 0, sizeof(*spec));
1262 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1263 vport->egress.drop_rule =
1264 mlx5_add_flow_rules(vport->egress.acl, spec,
1265 &flow_act, NULL, 0);
1266 if (IS_ERR(vport->egress.drop_rule)) {
1267 err = PTR_ERR(vport->egress.drop_rule);
1269 "vport[%d] configure egress drop rule failed, err(%d)\n",
1271 vport->egress.drop_rule = NULL;
1278 /* Vport QoS management */
1279 static int esw_create_tsar(struct mlx5_eswitch *esw)
1281 u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1282 struct mlx5_core_dev *dev = esw->dev;
1285 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1288 if (esw->qos.enabled)
1291 err = mlx5_create_scheduling_element_cmd(dev,
1292 SCHEDULING_HIERARCHY_E_SWITCH,
1294 &esw->qos.root_tsar_id);
1296 esw_warn(esw->dev, "E-Switch create TSAR failed (%d)\n", err);
1300 esw->qos.enabled = true;
1304 static void esw_destroy_tsar(struct mlx5_eswitch *esw)
1308 if (!esw->qos.enabled)
1311 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1312 SCHEDULING_HIERARCHY_E_SWITCH,
1313 esw->qos.root_tsar_id);
1315 esw_warn(esw->dev, "E-Switch destroy TSAR failed (%d)\n", err);
1317 esw->qos.enabled = false;
1320 static int esw_vport_enable_qos(struct mlx5_eswitch *esw, int vport_num,
1321 u32 initial_max_rate, u32 initial_bw_share)
1323 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1324 struct mlx5_vport *vport = &esw->vports[vport_num];
1325 struct mlx5_core_dev *dev = esw->dev;
1329 if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) ||
1330 !MLX5_CAP_QOS(dev, esw_scheduling))
1333 if (vport->qos.enabled)
1336 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1337 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1338 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1339 element_attributes);
1340 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1341 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1342 esw->qos.root_tsar_id);
1343 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1345 MLX5_SET(scheduling_context, &sched_ctx, bw_share, initial_bw_share);
1347 err = mlx5_create_scheduling_element_cmd(dev,
1348 SCHEDULING_HIERARCHY_E_SWITCH,
1350 &vport->qos.esw_tsar_ix);
1352 esw_warn(esw->dev, "E-Switch create TSAR vport element failed (vport=%d,err=%d)\n",
1357 vport->qos.enabled = true;
1361 static void esw_vport_disable_qos(struct mlx5_eswitch *esw, int vport_num)
1363 struct mlx5_vport *vport = &esw->vports[vport_num];
1366 if (!vport->qos.enabled)
1369 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1370 SCHEDULING_HIERARCHY_E_SWITCH,
1371 vport->qos.esw_tsar_ix);
1373 esw_warn(esw->dev, "E-Switch destroy TSAR vport element failed (vport=%d,err=%d)\n",
1376 vport->qos.enabled = false;
1379 static int esw_vport_qos_config(struct mlx5_eswitch *esw, int vport_num,
1380 u32 max_rate, u32 bw_share)
1382 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1383 struct mlx5_vport *vport = &esw->vports[vport_num];
1384 struct mlx5_core_dev *dev = esw->dev;
1389 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1392 if (!vport->qos.enabled)
1395 MLX5_SET(scheduling_context, &sched_ctx, element_type,
1396 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1397 vport_elem = MLX5_ADDR_OF(scheduling_context, &sched_ctx,
1398 element_attributes);
1399 MLX5_SET(vport_element, vport_elem, vport_number, vport_num);
1400 MLX5_SET(scheduling_context, &sched_ctx, parent_element_id,
1401 esw->qos.root_tsar_id);
1402 MLX5_SET(scheduling_context, &sched_ctx, max_average_bw,
1404 MLX5_SET(scheduling_context, &sched_ctx, bw_share, bw_share);
1405 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;
1406 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;
1408 err = mlx5_modify_scheduling_element_cmd(dev,
1409 SCHEDULING_HIERARCHY_E_SWITCH,
1411 vport->qos.esw_tsar_ix,
1414 esw_warn(esw->dev, "E-Switch modify TSAR vport element failed (vport=%d,err=%d)\n",
1422 static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
1424 ((u8 *)node_guid)[7] = mac[0];
1425 ((u8 *)node_guid)[6] = mac[1];
1426 ((u8 *)node_guid)[5] = mac[2];
1427 ((u8 *)node_guid)[4] = 0xff;
1428 ((u8 *)node_guid)[3] = 0xfe;
1429 ((u8 *)node_guid)[2] = mac[3];
1430 ((u8 *)node_guid)[1] = mac[4];
1431 ((u8 *)node_guid)[0] = mac[5];
1434 static void esw_apply_vport_conf(struct mlx5_eswitch *esw,
1435 struct mlx5_vport *vport)
1437 int vport_num = vport->vport;
1442 mlx5_modify_vport_admin_state(esw->dev,
1443 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1445 vport->info.link_state);
1446 mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, vport->info.mac);
1447 mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, vport->info.node_guid);
1448 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan, vport->info.qos,
1449 (vport->info.vlan || vport->info.qos));
1451 /* Only legacy mode needs ACLs */
1452 if (esw->mode == SRIOV_LEGACY) {
1453 esw_vport_ingress_config(esw, vport);
1454 esw_vport_egress_config(esw, vport);
1458 static void esw_enable_vport(struct mlx5_eswitch *esw, int vport_num,
1461 struct mlx5_vport *vport = &esw->vports[vport_num];
1463 mutex_lock(&esw->state_lock);
1464 WARN_ON(vport->enabled);
1466 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
1468 /* Restore old vport configuration */
1469 esw_apply_vport_conf(esw, vport);
1471 /* Attach vport to the eswitch rate limiter */
1472 if (esw_vport_enable_qos(esw, vport_num, vport->info.max_rate,
1473 vport->qos.bw_share))
1474 esw_warn(esw->dev, "Failed to attach vport %d to eswitch rate limiter", vport_num);
1476 /* Sync with current vport context */
1477 vport->enabled_events = enable_events;
1478 vport->enabled = true;
1480 /* only PF is trusted by default */
1482 vport->info.trusted = true;
1484 esw_vport_change_handle_locked(vport);
1486 esw->enabled_vports++;
1487 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
1488 mutex_unlock(&esw->state_lock);
1491 static void esw_disable_vport(struct mlx5_eswitch *esw, int vport_num)
1493 struct mlx5_vport *vport = &esw->vports[vport_num];
1495 if (!vport->enabled)
1498 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
1499 /* Mark this vport as disabled to discard new events */
1500 vport->enabled = false;
1502 synchronize_irq(pci_irq_vector(esw->dev->pdev, MLX5_EQ_VEC_ASYNC));
1503 /* Wait for current already scheduled events to complete */
1504 flush_workqueue(esw->work_queue);
1505 /* Disable events from this vport */
1506 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
1507 mutex_lock(&esw->state_lock);
1508 /* We don't assume VFs will cleanup after themselves.
1509 * Calling vport change handler while vport is disabled will cleanup
1510 * the vport resources.
1512 esw_vport_change_handle_locked(vport);
1513 vport->enabled_events = 0;
1514 esw_vport_disable_qos(esw, vport_num);
1515 if (vport_num && esw->mode == SRIOV_LEGACY) {
1516 mlx5_modify_vport_admin_state(esw->dev,
1517 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1519 MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
1520 esw_vport_disable_egress_acl(esw, vport);
1521 esw_vport_disable_ingress_acl(esw, vport);
1523 esw->enabled_vports--;
1524 mutex_unlock(&esw->state_lock);
1527 /* Public E-Switch API */
1528 #define ESW_ALLOWED(esw) ((esw) && MLX5_VPORT_MANAGER((esw)->dev))
1530 int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
1533 int i, enabled_events;
1535 if (!ESW_ALLOWED(esw))
1538 if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
1539 !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1540 esw_warn(esw->dev, "E-Switch FDB is not supported, aborting ...\n");
1544 if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
1545 esw_warn(esw->dev, "E-Switch ingress ACL is not supported by FW\n");
1547 if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
1548 esw_warn(esw->dev, "E-Switch engress ACL is not supported by FW\n");
1550 esw_info(esw->dev, "E-Switch enable SRIOV: nvfs(%d) mode (%d)\n", nvfs, mode);
1553 if (mode == SRIOV_LEGACY)
1554 err = esw_create_legacy_fdb_table(esw, nvfs + 1);
1556 err = esw_offloads_init(esw, nvfs + 1);
1560 err = esw_create_tsar(esw);
1562 esw_warn(esw->dev, "Failed to create eswitch TSAR");
1564 /* Don't enable vport events when in SRIOV_OFFLOADS mode, since:
1565 * 1. L2 table (MPFS) is programmed by PF/VF representors netdevs set_rx_mode
1566 * 2. FDB/Eswitch is programmed by user space tools
1568 enabled_events = (mode == SRIOV_LEGACY) ? SRIOV_VPORT_EVENTS : 0;
1569 for (i = 0; i <= nvfs; i++)
1570 esw_enable_vport(esw, i, enabled_events);
1572 esw_info(esw->dev, "SRIOV enabled: active vports(%d)\n",
1573 esw->enabled_vports);
1577 esw->mode = SRIOV_NONE;
1581 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw)
1583 struct esw_mc_addr *mc_promisc;
1587 if (!ESW_ALLOWED(esw) || esw->mode == SRIOV_NONE)
1590 esw_info(esw->dev, "disable SRIOV: active vports(%d) mode(%d)\n",
1591 esw->enabled_vports, esw->mode);
1593 mc_promisc = &esw->mc_promisc;
1594 nvports = esw->enabled_vports;
1596 for (i = 0; i < esw->total_vports; i++)
1597 esw_disable_vport(esw, i);
1599 if (mc_promisc && mc_promisc->uplink_rule)
1600 mlx5_del_flow_rules(mc_promisc->uplink_rule);
1602 esw_destroy_tsar(esw);
1604 if (esw->mode == SRIOV_LEGACY)
1605 esw_destroy_legacy_fdb_table(esw);
1606 else if (esw->mode == SRIOV_OFFLOADS)
1607 esw_offloads_cleanup(esw, nvports);
1609 esw->mode = SRIOV_NONE;
1612 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1614 int total_vports = MLX5_TOTAL_VPORTS(dev);
1615 struct mlx5_eswitch *esw;
1619 if (!MLX5_VPORT_MANAGER(dev))
1623 "Total vports %d, per vport: max uc(%d) max mc(%d)\n",
1625 MLX5_MAX_UC_PER_VPORT(dev),
1626 MLX5_MAX_MC_PER_VPORT(dev));
1628 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1634 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1635 if (!esw->work_queue) {
1640 esw->vports = kcalloc(total_vports, sizeof(struct mlx5_vport),
1647 esw->offloads.vport_reps =
1648 kzalloc(total_vports * sizeof(struct mlx5_eswitch_rep),
1650 if (!esw->offloads.vport_reps) {
1655 hash_init(esw->offloads.encap_tbl);
1656 hash_init(esw->offloads.mod_hdr_tbl);
1657 mutex_init(&esw->state_lock);
1659 for (vport_num = 0; vport_num < total_vports; vport_num++) {
1660 struct mlx5_vport *vport = &esw->vports[vport_num];
1662 vport->vport = vport_num;
1663 vport->info.link_state = MLX5_ESW_VPORT_ADMIN_STATE_AUTO;
1665 INIT_WORK(&vport->vport_change_handler,
1666 esw_vport_change_handler);
1669 esw->total_vports = total_vports;
1670 esw->enabled_vports = 0;
1671 esw->mode = SRIOV_NONE;
1672 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1673 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) &&
1674 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
1675 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
1677 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
1679 dev->priv.eswitch = esw;
1682 if (esw->work_queue)
1683 destroy_workqueue(esw->work_queue);
1685 kfree(esw->offloads.vport_reps);
1690 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1692 if (!esw || !MLX5_VPORT_MANAGER(esw->dev))
1695 esw_info(esw->dev, "cleanup\n");
1697 esw->dev->priv.eswitch = NULL;
1698 destroy_workqueue(esw->work_queue);
1699 kfree(esw->offloads.vport_reps);
1704 void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe)
1706 struct mlx5_eqe_vport_change *vc_eqe = &eqe->data.vport_change;
1707 u16 vport_num = be16_to_cpu(vc_eqe->vport_num);
1708 struct mlx5_vport *vport;
1711 pr_warn("MLX5 E-Switch: vport %d got an event while eswitch is not initialized\n",
1716 vport = &esw->vports[vport_num];
1718 queue_work(esw->work_queue, &vport->vport_change_handler);
1721 /* Vport Administration */
1722 #define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)
1724 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1725 int vport, u8 mac[ETH_ALEN])
1727 struct mlx5_vport *evport;
1731 if (!ESW_ALLOWED(esw))
1733 if (!LEGAL_VPORT(esw, vport) || is_multicast_ether_addr(mac))
1736 mutex_lock(&esw->state_lock);
1737 evport = &esw->vports[vport];
1739 if (evport->info.spoofchk && !is_valid_ether_addr(mac)) {
1740 mlx5_core_warn(esw->dev,
1741 "MAC invalidation is not allowed when spoofchk is on, vport(%d)\n",
1747 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport, mac);
1749 mlx5_core_warn(esw->dev,
1750 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
1755 node_guid_gen_from_mac(&node_guid, mac);
1756 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
1758 mlx5_core_warn(esw->dev,
1759 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
1762 ether_addr_copy(evport->info.mac, mac);
1763 evport->info.node_guid = node_guid;
1764 if (evport->enabled && esw->mode == SRIOV_LEGACY)
1765 err = esw_vport_ingress_config(esw, evport);
1768 mutex_unlock(&esw->state_lock);
1772 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
1773 int vport, int link_state)
1775 struct mlx5_vport *evport;
1778 if (!ESW_ALLOWED(esw))
1780 if (!LEGAL_VPORT(esw, vport))
1783 mutex_lock(&esw->state_lock);
1784 evport = &esw->vports[vport];
1786 err = mlx5_modify_vport_admin_state(esw->dev,
1787 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT,
1790 mlx5_core_warn(esw->dev,
1791 "Failed to set vport %d link state, err = %d",
1796 evport->info.link_state = link_state;
1799 mutex_unlock(&esw->state_lock);
1803 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
1804 int vport, struct ifla_vf_info *ivi)
1806 struct mlx5_vport *evport;
1808 if (!ESW_ALLOWED(esw))
1810 if (!LEGAL_VPORT(esw, vport))
1813 evport = &esw->vports[vport];
1815 memset(ivi, 0, sizeof(*ivi));
1816 ivi->vf = vport - 1;
1818 mutex_lock(&esw->state_lock);
1819 ether_addr_copy(ivi->mac, evport->info.mac);
1820 ivi->linkstate = evport->info.link_state;
1821 ivi->vlan = evport->info.vlan;
1822 ivi->qos = evport->info.qos;
1823 ivi->spoofchk = evport->info.spoofchk;
1824 ivi->trusted = evport->info.trusted;
1825 ivi->min_tx_rate = evport->info.min_rate;
1826 ivi->max_tx_rate = evport->info.max_rate;
1827 mutex_unlock(&esw->state_lock);
1832 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1833 int vport, u16 vlan, u8 qos, u8 set_flags)
1835 struct mlx5_vport *evport;
1838 if (!ESW_ALLOWED(esw))
1840 if (!LEGAL_VPORT(esw, vport) || (vlan > 4095) || (qos > 7))
1843 mutex_lock(&esw->state_lock);
1844 evport = &esw->vports[vport];
1846 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
1850 evport->info.vlan = vlan;
1851 evport->info.qos = qos;
1852 if (evport->enabled && esw->mode == SRIOV_LEGACY) {
1853 err = esw_vport_ingress_config(esw, evport);
1856 err = esw_vport_egress_config(esw, evport);
1860 mutex_unlock(&esw->state_lock);
1864 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
1865 int vport, u16 vlan, u8 qos)
1870 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;
1872 return __mlx5_eswitch_set_vport_vlan(esw, vport, vlan, qos, set_flags);
1875 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
1876 int vport, bool spoofchk)
1878 struct mlx5_vport *evport;
1882 if (!ESW_ALLOWED(esw))
1884 if (!LEGAL_VPORT(esw, vport))
1887 mutex_lock(&esw->state_lock);
1888 evport = &esw->vports[vport];
1889 pschk = evport->info.spoofchk;
1890 evport->info.spoofchk = spoofchk;
1891 if (evport->enabled && esw->mode == SRIOV_LEGACY)
1892 err = esw_vport_ingress_config(esw, evport);
1894 evport->info.spoofchk = pschk;
1895 mutex_unlock(&esw->state_lock);
1900 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
1901 int vport, bool setting)
1903 struct mlx5_vport *evport;
1905 if (!ESW_ALLOWED(esw))
1907 if (!LEGAL_VPORT(esw, vport))
1910 mutex_lock(&esw->state_lock);
1911 evport = &esw->vports[vport];
1912 evport->info.trusted = setting;
1913 if (evport->enabled)
1914 esw_vport_change_handle_locked(evport);
1915 mutex_unlock(&esw->state_lock);
1920 static u32 calculate_vports_min_rate_divider(struct mlx5_eswitch *esw)
1922 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
1923 struct mlx5_vport *evport;
1924 u32 max_guarantee = 0;
1927 for (i = 0; i <= esw->total_vports; i++) {
1928 evport = &esw->vports[i];
1929 if (!evport->enabled || evport->info.min_rate < max_guarantee)
1931 max_guarantee = evport->info.min_rate;
1934 return max_t(u32, max_guarantee / fw_max_bw_share, 1);
1937 static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider)
1939 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
1940 struct mlx5_vport *evport;
1947 for (i = 0; i <= esw->total_vports; i++) {
1948 evport = &esw->vports[i];
1949 if (!evport->enabled)
1951 vport_min_rate = evport->info.min_rate;
1952 vport_max_rate = evport->info.max_rate;
1953 bw_share = MLX5_MIN_BW_SHARE;
1956 bw_share = MLX5_RATE_TO_BW_SHARE(vport_min_rate,
1960 if (bw_share == evport->qos.bw_share)
1963 err = esw_vport_qos_config(esw, i, vport_max_rate,
1966 evport->qos.bw_share = bw_share;
1974 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
1975 u32 max_rate, u32 min_rate)
1977 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
1978 bool min_rate_supported = MLX5_CAP_QOS(esw->dev, esw_bw_share) &&
1979 fw_max_bw_share >= MLX5_MIN_BW_SHARE;
1980 bool max_rate_supported = MLX5_CAP_QOS(esw->dev, esw_rate_limit);
1981 struct mlx5_vport *evport;
1982 u32 previous_min_rate;
1986 if (!ESW_ALLOWED(esw))
1988 if (!LEGAL_VPORT(esw, vport))
1990 if ((min_rate && !min_rate_supported) || (max_rate && !max_rate_supported))
1993 mutex_lock(&esw->state_lock);
1994 evport = &esw->vports[vport];
1996 if (min_rate == evport->info.min_rate)
1999 previous_min_rate = evport->info.min_rate;
2000 evport->info.min_rate = min_rate;
2001 divider = calculate_vports_min_rate_divider(esw);
2002 err = normalize_vports_min_rate(esw, divider);
2004 evport->info.min_rate = previous_min_rate;
2009 if (max_rate == evport->info.max_rate)
2012 err = esw_vport_qos_config(esw, vport, max_rate, evport->qos.bw_share);
2014 evport->info.max_rate = max_rate;
2017 mutex_unlock(&esw->state_lock);
2021 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2023 struct ifla_vf_stats *vf_stats)
2025 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2026 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
2030 if (!ESW_ALLOWED(esw))
2032 if (!LEGAL_VPORT(esw, vport))
2035 out = kvzalloc(outlen, GFP_KERNEL);
2039 MLX5_SET(query_vport_counter_in, in, opcode,
2040 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2041 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2042 MLX5_SET(query_vport_counter_in, in, vport_number, vport);
2044 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2046 memset(out, 0, outlen);
2047 err = mlx5_cmd_exec(esw->dev, in, sizeof(in), out, outlen);
2051 #define MLX5_GET_CTR(p, x) \
2052 MLX5_GET64(query_vport_counter_out, p, x)
2054 memset(vf_stats, 0, sizeof(*vf_stats));
2055 vf_stats->rx_packets =
2056 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2057 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2058 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2060 vf_stats->rx_bytes =
2061 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2062 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2063 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2065 vf_stats->tx_packets =
2066 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2067 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2068 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2070 vf_stats->tx_bytes =
2071 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2072 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2073 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2075 vf_stats->multicast =
2076 MLX5_GET_CTR(out, received_eth_multicast.packets);
2078 vf_stats->broadcast =
2079 MLX5_GET_CTR(out, received_eth_broadcast.packets);