2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
50 /* Vport UC/MC hash node */
52 struct l2addr_node node;
55 struct mlx5_flow_handle *flow_rule;
56 bool mpfs; /* UC MAC was added to MPFs */
57 /* A flag indicating that mac was added due to mc promiscuous vport */
62 UC_ADDR_CHANGE = BIT(0),
63 MC_ADDR_CHANGE = BIT(1),
64 PROMISC_CHANGE = BIT(3),
67 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw);
68 static void esw_cleanup_vepa_rules(struct mlx5_eswitch *esw);
70 /* Vport context events */
71 #define SRIOV_VPORT_EVENTS (UC_ADDR_CHANGE | \
75 struct mlx5_vport *__must_check
76 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num)
80 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager))
81 return ERR_PTR(-EPERM);
83 idx = mlx5_eswitch_vport_num_to_index(esw, vport_num);
85 if (idx > esw->total_vports - 1) {
86 esw_debug(esw->dev, "vport out of range: num(0x%x), idx(0x%x)\n",
88 return ERR_PTR(-EINVAL);
91 return &esw->vports[idx];
94 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
97 int in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
98 int out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
101 MLX5_SET(modify_nic_vport_context_in, in,
102 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
103 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
104 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
105 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
106 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
107 in, nic_vport_context);
109 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
111 if (events_mask & UC_ADDR_CHANGE)
112 MLX5_SET(nic_vport_context, nic_vport_ctx,
113 event_on_uc_address_change, 1);
114 if (events_mask & MC_ADDR_CHANGE)
115 MLX5_SET(nic_vport_context, nic_vport_ctx,
116 event_on_mc_address_change, 1);
117 if (events_mask & PROMISC_CHANGE)
118 MLX5_SET(nic_vport_context, nic_vport_ctx,
119 event_on_promisc_change, 1);
121 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
124 /* E-Switch vport context HW commands */
125 static int modify_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
128 u32 out[MLX5_ST_SZ_DW(modify_esw_vport_context_out)] = {0};
130 MLX5_SET(modify_esw_vport_context_in, in, opcode,
131 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
132 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
133 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
134 return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
137 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_eswitch *esw, u16 vport,
140 return modify_esw_vport_context_cmd(esw->dev, vport, in, inlen);
143 static int query_esw_vport_context_cmd(struct mlx5_core_dev *dev, u16 vport,
144 void *out, int outlen)
146 u32 in[MLX5_ST_SZ_DW(query_esw_vport_context_in)] = {};
148 MLX5_SET(query_esw_vport_context_in, in, opcode,
149 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT);
150 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
151 MLX5_SET(modify_esw_vport_context_in, in, other_vport, 1);
152 return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
155 int mlx5_eswitch_query_esw_vport_context(struct mlx5_eswitch *esw, u16 vport,
156 void *out, int outlen)
158 return query_esw_vport_context_cmd(esw->dev, vport, out, outlen);
161 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u16 vport,
162 u16 vlan, u8 qos, u8 set_flags)
164 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {0};
166 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
167 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
170 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
171 vport, vlan, qos, set_flags);
173 if (set_flags & SET_VLAN_STRIP)
174 MLX5_SET(modify_esw_vport_context_in, in,
175 esw_vport_context.vport_cvlan_strip, 1);
177 if (set_flags & SET_VLAN_INSERT) {
178 /* insert only if no vlan in packet */
179 MLX5_SET(modify_esw_vport_context_in, in,
180 esw_vport_context.vport_cvlan_insert, 1);
182 MLX5_SET(modify_esw_vport_context_in, in,
183 esw_vport_context.cvlan_pcp, qos);
184 MLX5_SET(modify_esw_vport_context_in, in,
185 esw_vport_context.cvlan_id, vlan);
188 MLX5_SET(modify_esw_vport_context_in, in,
189 field_select.vport_cvlan_strip, 1);
190 MLX5_SET(modify_esw_vport_context_in, in,
191 field_select.vport_cvlan_insert, 1);
193 return modify_esw_vport_context_cmd(dev, vport, in, sizeof(in));
197 static struct mlx5_flow_handle *
198 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u16 vport, bool rx_rule,
199 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
201 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
202 MLX5_MATCH_OUTER_HEADERS);
203 struct mlx5_flow_handle *flow_rule = NULL;
204 struct mlx5_flow_act flow_act = {0};
205 struct mlx5_flow_destination dest = {};
206 struct mlx5_flow_spec *spec;
207 void *mv_misc = NULL;
208 void *mc_misc = NULL;
213 match_header |= MLX5_MATCH_MISC_PARAMETERS;
215 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
219 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
220 outer_headers.dmac_47_16);
221 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
222 outer_headers.dmac_47_16);
224 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
225 ether_addr_copy(dmac_v, mac_v);
226 ether_addr_copy(dmac_c, mac_c);
229 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
230 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
232 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
234 MLX5_SET(fte_match_set_misc, mv_misc, source_port, MLX5_VPORT_UPLINK);
235 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
238 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
239 dest.vport.num = vport;
242 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
243 dmac_v, dmac_c, vport);
244 spec->match_criteria_enable = match_header;
245 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
247 mlx5_add_flow_rules(esw->fdb_table.legacy.fdb, spec,
248 &flow_act, &dest, 1);
249 if (IS_ERR(flow_rule)) {
251 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
252 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
260 static struct mlx5_flow_handle *
261 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u16 vport)
265 eth_broadcast_addr(mac_c);
266 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
269 static struct mlx5_flow_handle *
270 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u16 vport)
275 eth_zero_addr(mac_c);
276 eth_zero_addr(mac_v);
279 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
282 static struct mlx5_flow_handle *
283 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u16 vport)
288 eth_zero_addr(mac_c);
289 eth_zero_addr(mac_v);
290 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
294 LEGACY_VEPA_PRIO = 0,
298 static int esw_create_legacy_vepa_table(struct mlx5_eswitch *esw)
300 struct mlx5_core_dev *dev = esw->dev;
301 struct mlx5_flow_namespace *root_ns;
302 struct mlx5_flow_table *fdb;
305 root_ns = mlx5_get_fdb_sub_ns(dev, 0);
307 esw_warn(dev, "Failed to get FDB flow namespace\n");
311 /* num FTE 2, num FG 2 */
312 fdb = mlx5_create_auto_grouped_flow_table(root_ns, LEGACY_VEPA_PRIO,
316 esw_warn(dev, "Failed to create VEPA FDB err %d\n", err);
319 esw->fdb_table.legacy.vepa_fdb = fdb;
324 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw)
326 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
327 struct mlx5_flow_table_attr ft_attr = {};
328 struct mlx5_core_dev *dev = esw->dev;
329 struct mlx5_flow_namespace *root_ns;
330 struct mlx5_flow_table *fdb;
331 struct mlx5_flow_group *g;
332 void *match_criteria;
338 esw_debug(dev, "Create FDB log_max_size(%d)\n",
339 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
341 root_ns = mlx5_get_fdb_sub_ns(dev, 0);
343 esw_warn(dev, "Failed to get FDB flow namespace\n");
347 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
351 table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
352 ft_attr.max_fte = table_size;
353 ft_attr.prio = LEGACY_FDB_PRIO;
354 fdb = mlx5_create_flow_table(root_ns, &ft_attr);
357 esw_warn(dev, "Failed to create FDB Table err %d\n", err);
360 esw->fdb_table.legacy.fdb = fdb;
362 /* Addresses group : Full match unicast/multicast addresses */
363 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
364 MLX5_MATCH_OUTER_HEADERS);
365 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
366 dmac = MLX5_ADDR_OF(fte_match_param, match_criteria, outer_headers.dmac_47_16);
367 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
368 /* Preserve 2 entries for allmulti and promisc rules*/
369 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
370 eth_broadcast_addr(dmac);
371 g = mlx5_create_flow_group(fdb, flow_group_in);
374 esw_warn(dev, "Failed to create flow group err(%d)\n", err);
377 esw->fdb_table.legacy.addr_grp = g;
379 /* Allmulti group : One rule that forwards any mcast traffic */
380 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
381 MLX5_MATCH_OUTER_HEADERS);
382 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 2);
383 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 2);
386 g = mlx5_create_flow_group(fdb, flow_group_in);
389 esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
392 esw->fdb_table.legacy.allmulti_grp = g;
394 /* Promiscuous group :
395 * One rule that forward all unmatched traffic from previous groups
398 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
399 MLX5_MATCH_MISC_PARAMETERS);
400 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
401 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
402 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
403 g = mlx5_create_flow_group(fdb, flow_group_in);
406 esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
409 esw->fdb_table.legacy.promisc_grp = g;
413 esw_destroy_legacy_fdb_table(esw);
415 kvfree(flow_group_in);
419 static void esw_destroy_legacy_vepa_table(struct mlx5_eswitch *esw)
421 esw_debug(esw->dev, "Destroy VEPA Table\n");
422 if (!esw->fdb_table.legacy.vepa_fdb)
425 mlx5_destroy_flow_table(esw->fdb_table.legacy.vepa_fdb);
426 esw->fdb_table.legacy.vepa_fdb = NULL;
429 static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)
431 esw_debug(esw->dev, "Destroy FDB Table\n");
432 if (!esw->fdb_table.legacy.fdb)
435 if (esw->fdb_table.legacy.promisc_grp)
436 mlx5_destroy_flow_group(esw->fdb_table.legacy.promisc_grp);
437 if (esw->fdb_table.legacy.allmulti_grp)
438 mlx5_destroy_flow_group(esw->fdb_table.legacy.allmulti_grp);
439 if (esw->fdb_table.legacy.addr_grp)
440 mlx5_destroy_flow_group(esw->fdb_table.legacy.addr_grp);
441 mlx5_destroy_flow_table(esw->fdb_table.legacy.fdb);
443 esw->fdb_table.legacy.fdb = NULL;
444 esw->fdb_table.legacy.addr_grp = NULL;
445 esw->fdb_table.legacy.allmulti_grp = NULL;
446 esw->fdb_table.legacy.promisc_grp = NULL;
449 static int esw_create_legacy_table(struct mlx5_eswitch *esw)
453 memset(&esw->fdb_table.legacy, 0, sizeof(struct legacy_fdb));
455 err = esw_create_legacy_vepa_table(esw);
459 err = esw_create_legacy_fdb_table(esw);
461 esw_destroy_legacy_vepa_table(esw);
466 static void esw_destroy_legacy_table(struct mlx5_eswitch *esw)
468 esw_cleanup_vepa_rules(esw);
469 esw_destroy_legacy_fdb_table(esw);
470 esw_destroy_legacy_vepa_table(esw);
473 /* E-Switch vport UC/MC lists management */
474 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
475 struct vport_addr *vaddr);
477 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
479 u8 *mac = vaddr->node.addr;
480 u16 vport = vaddr->vport;
483 /* Skip mlx5_mpfs_add_mac for eswitch_managers,
484 * it is already done by its netdev in mlx5e_execute_l2_action
486 if (esw->manager_vport == vport)
489 err = mlx5_mpfs_add_mac(esw->dev, mac);
492 "Failed to add L2 table mac(%pM) for vport(0x%x), err(%d)\n",
499 /* SRIOV is enabled: Forward UC MAC to vport */
500 if (esw->fdb_table.legacy.fdb && esw->mode == MLX5_ESWITCH_LEGACY)
501 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
503 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM fr(%p)\n",
504 vport, mac, vaddr->flow_rule);
509 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
511 u8 *mac = vaddr->node.addr;
512 u16 vport = vaddr->vport;
515 /* Skip mlx5_mpfs_del_mac for eswitch managerss,
516 * it is already done by its netdev in mlx5e_execute_l2_action
518 if (!vaddr->mpfs || esw->manager_vport == vport)
521 err = mlx5_mpfs_del_mac(esw->dev, mac);
524 "Failed to del L2 table mac(%pM) for vport(%d), err(%d)\n",
529 if (vaddr->flow_rule)
530 mlx5_del_flow_rules(vaddr->flow_rule);
531 vaddr->flow_rule = NULL;
536 static void update_allmulti_vports(struct mlx5_eswitch *esw,
537 struct vport_addr *vaddr,
538 struct esw_mc_addr *esw_mc)
540 u8 *mac = vaddr->node.addr;
541 struct mlx5_vport *vport;
544 mlx5_esw_for_all_vports(esw, i, vport) {
545 struct hlist_head *vport_hash = vport->mc_list;
546 struct vport_addr *iter_vaddr =
547 l2addr_hash_find(vport_hash,
550 vport_num = vport->vport;
551 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
552 vaddr->vport == vport_num)
554 switch (vaddr->action) {
555 case MLX5_ACTION_ADD:
558 iter_vaddr = l2addr_hash_add(vport_hash, mac,
563 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
567 iter_vaddr->vport = vport_num;
568 iter_vaddr->flow_rule =
569 esw_fdb_set_vport_rule(esw,
572 iter_vaddr->mc_promisc = true;
574 case MLX5_ACTION_DEL:
577 mlx5_del_flow_rules(iter_vaddr->flow_rule);
578 l2addr_hash_del(iter_vaddr);
584 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
586 struct hlist_head *hash = esw->mc_table;
587 struct esw_mc_addr *esw_mc;
588 u8 *mac = vaddr->node.addr;
589 u16 vport = vaddr->vport;
591 if (!esw->fdb_table.legacy.fdb)
594 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
598 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
602 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
603 esw_fdb_set_vport_rule(esw, mac, MLX5_VPORT_UPLINK);
605 /* Add this multicast mac to all the mc promiscuous vports */
606 update_allmulti_vports(esw, vaddr, esw_mc);
609 /* If the multicast mac is added as a result of mc promiscuous vport,
610 * don't increment the multicast ref count
612 if (!vaddr->mc_promisc)
615 /* Forward MC MAC to vport */
616 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
618 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
619 vport, mac, vaddr->flow_rule,
620 esw_mc->refcnt, esw_mc->uplink_rule);
624 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
626 struct hlist_head *hash = esw->mc_table;
627 struct esw_mc_addr *esw_mc;
628 u8 *mac = vaddr->node.addr;
629 u16 vport = vaddr->vport;
631 if (!esw->fdb_table.legacy.fdb)
634 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
637 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
642 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
643 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
644 esw_mc->uplink_rule);
646 if (vaddr->flow_rule)
647 mlx5_del_flow_rules(vaddr->flow_rule);
648 vaddr->flow_rule = NULL;
650 /* If the multicast mac is added as a result of mc promiscuous vport,
651 * don't decrement the multicast ref count.
653 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
656 /* Remove this multicast mac from all the mc promiscuous vports */
657 update_allmulti_vports(esw, vaddr, esw_mc);
659 if (esw_mc->uplink_rule)
660 mlx5_del_flow_rules(esw_mc->uplink_rule);
662 l2addr_hash_del(esw_mc);
666 /* Apply vport UC/MC list to HW l2 table and FDB table */
667 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
668 struct mlx5_vport *vport, int list_type)
670 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
671 vport_addr_action vport_addr_add;
672 vport_addr_action vport_addr_del;
673 struct vport_addr *addr;
674 struct l2addr_node *node;
675 struct hlist_head *hash;
676 struct hlist_node *tmp;
679 vport_addr_add = is_uc ? esw_add_uc_addr :
681 vport_addr_del = is_uc ? esw_del_uc_addr :
684 hash = is_uc ? vport->uc_list : vport->mc_list;
685 for_each_l2hash_node(node, tmp, hash, hi) {
686 addr = container_of(node, struct vport_addr, node);
687 switch (addr->action) {
688 case MLX5_ACTION_ADD:
689 vport_addr_add(esw, addr);
690 addr->action = MLX5_ACTION_NONE;
692 case MLX5_ACTION_DEL:
693 vport_addr_del(esw, addr);
694 l2addr_hash_del(addr);
700 /* Sync vport UC/MC list from vport context */
701 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
702 struct mlx5_vport *vport, int list_type)
704 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
705 u8 (*mac_list)[ETH_ALEN];
706 struct l2addr_node *node;
707 struct vport_addr *addr;
708 struct hlist_head *hash;
709 struct hlist_node *tmp;
715 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
716 MLX5_MAX_MC_PER_VPORT(esw->dev);
718 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
722 hash = is_uc ? vport->uc_list : vport->mc_list;
724 for_each_l2hash_node(node, tmp, hash, hi) {
725 addr = container_of(node, struct vport_addr, node);
726 addr->action = MLX5_ACTION_DEL;
732 err = mlx5_query_nic_vport_mac_list(esw->dev, vport->vport, list_type,
736 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
737 vport->vport, is_uc ? "UC" : "MC", size);
739 for (i = 0; i < size; i++) {
740 if (is_uc && !is_valid_ether_addr(mac_list[i]))
743 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
746 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
748 addr->action = MLX5_ACTION_NONE;
749 /* If this mac was previously added because of allmulti
750 * promiscuous rx mode, its now converted to be original
753 if (addr->mc_promisc) {
754 struct esw_mc_addr *esw_mc =
755 l2addr_hash_find(esw->mc_table,
760 "Failed to MAC(%pM) in mcast DB\n",
765 addr->mc_promisc = false;
770 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
774 "Failed to add MAC(%pM) to vport[%d] DB\n",
775 mac_list[i], vport->vport);
778 addr->vport = vport->vport;
779 addr->action = MLX5_ACTION_ADD;
785 /* Sync vport UC/MC list from vport context
786 * Must be called after esw_update_vport_addr_list
788 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw,
789 struct mlx5_vport *vport)
791 struct l2addr_node *node;
792 struct vport_addr *addr;
793 struct hlist_head *hash;
794 struct hlist_node *tmp;
797 hash = vport->mc_list;
799 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
800 u8 *mac = node->addr;
802 addr = l2addr_hash_find(hash, mac, struct vport_addr);
804 if (addr->action == MLX5_ACTION_DEL)
805 addr->action = MLX5_ACTION_NONE;
808 addr = l2addr_hash_add(hash, mac, struct vport_addr,
812 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
816 addr->vport = vport->vport;
817 addr->action = MLX5_ACTION_ADD;
818 addr->mc_promisc = true;
822 /* Apply vport rx mode to HW FDB table */
823 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw,
824 struct mlx5_vport *vport,
825 bool promisc, bool mc_promisc)
827 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
829 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
833 vport->allmulti_rule =
834 esw_fdb_set_vport_allmulti_rule(esw, vport->vport);
835 if (!allmulti_addr->uplink_rule)
836 allmulti_addr->uplink_rule =
837 esw_fdb_set_vport_allmulti_rule(esw,
839 allmulti_addr->refcnt++;
840 } else if (vport->allmulti_rule) {
841 mlx5_del_flow_rules(vport->allmulti_rule);
842 vport->allmulti_rule = NULL;
844 if (--allmulti_addr->refcnt > 0)
847 if (allmulti_addr->uplink_rule)
848 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
849 allmulti_addr->uplink_rule = NULL;
853 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
857 vport->promisc_rule =
858 esw_fdb_set_vport_promisc_rule(esw, vport->vport);
859 } else if (vport->promisc_rule) {
860 mlx5_del_flow_rules(vport->promisc_rule);
861 vport->promisc_rule = NULL;
865 /* Sync vport rx mode from vport context */
866 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw,
867 struct mlx5_vport *vport)
874 err = mlx5_query_nic_vport_promisc(esw->dev,
881 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
882 vport->vport, promisc_all, promisc_mc);
884 if (!vport->info.trusted || !vport->enabled) {
890 esw_apply_vport_rx_mode(esw, vport, promisc_all,
891 (promisc_all || promisc_mc));
894 static void esw_vport_change_handle_locked(struct mlx5_vport *vport)
896 struct mlx5_core_dev *dev = vport->dev;
897 struct mlx5_eswitch *esw = dev->priv.eswitch;
900 mlx5_query_nic_vport_mac_address(dev, vport->vport, true, mac);
901 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
904 if (vport->enabled_events & UC_ADDR_CHANGE) {
905 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
906 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
909 if (vport->enabled_events & MC_ADDR_CHANGE)
910 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
912 if (vport->enabled_events & PROMISC_CHANGE) {
913 esw_update_vport_rx_mode(esw, vport);
914 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
915 esw_update_vport_mc_promisc(esw, vport);
918 if (vport->enabled_events & (PROMISC_CHANGE | MC_ADDR_CHANGE))
919 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
921 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
923 arm_vport_context_events_cmd(dev, vport->vport,
924 vport->enabled_events);
927 static void esw_vport_change_handler(struct work_struct *work)
929 struct mlx5_vport *vport =
930 container_of(work, struct mlx5_vport, vport_change_handler);
931 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
933 mutex_lock(&esw->state_lock);
934 esw_vport_change_handle_locked(vport);
935 mutex_unlock(&esw->state_lock);
938 int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
939 struct mlx5_vport *vport)
941 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
942 struct mlx5_flow_group *vlan_grp = NULL;
943 struct mlx5_flow_group *drop_grp = NULL;
944 struct mlx5_core_dev *dev = esw->dev;
945 struct mlx5_flow_namespace *root_ns;
946 struct mlx5_flow_table *acl;
947 void *match_criteria;
949 /* The egress acl table contains 2 rules:
950 * 1)Allow traffic with vlan_tag=vst_vlan_id
951 * 2)Drop all other traffic.
956 if (!MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
959 if (!IS_ERR_OR_NULL(vport->egress.acl))
962 esw_debug(dev, "Create vport[%d] egress ACL log_max_size(%d)\n",
963 vport->vport, MLX5_CAP_ESW_EGRESS_ACL(dev, log_max_ft_size));
965 root_ns = mlx5_get_flow_vport_acl_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS,
966 mlx5_eswitch_vport_num_to_index(esw, vport->vport));
968 esw_warn(dev, "Failed to get E-Switch egress flow namespace for vport (%d)\n", vport->vport);
972 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
976 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
979 esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
984 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
985 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
986 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
987 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.first_vid);
988 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
989 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
991 vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
992 if (IS_ERR(vlan_grp)) {
993 err = PTR_ERR(vlan_grp);
994 esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
999 memset(flow_group_in, 0, inlen);
1000 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1001 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1002 drop_grp = mlx5_create_flow_group(acl, flow_group_in);
1003 if (IS_ERR(drop_grp)) {
1004 err = PTR_ERR(drop_grp);
1005 esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
1010 vport->egress.acl = acl;
1011 vport->egress.drop_grp = drop_grp;
1012 vport->egress.allowed_vlans_grp = vlan_grp;
1014 kvfree(flow_group_in);
1015 if (err && !IS_ERR_OR_NULL(vlan_grp))
1016 mlx5_destroy_flow_group(vlan_grp);
1017 if (err && !IS_ERR_OR_NULL(acl))
1018 mlx5_destroy_flow_table(acl);
1022 void esw_vport_cleanup_egress_rules(struct mlx5_eswitch *esw,
1023 struct mlx5_vport *vport)
1025 if (!IS_ERR_OR_NULL(vport->egress.allowed_vlan))
1026 mlx5_del_flow_rules(vport->egress.allowed_vlan);
1028 if (!IS_ERR_OR_NULL(vport->egress.drop_rule))
1029 mlx5_del_flow_rules(vport->egress.drop_rule);
1031 vport->egress.allowed_vlan = NULL;
1032 vport->egress.drop_rule = NULL;
1035 void esw_vport_disable_egress_acl(struct mlx5_eswitch *esw,
1036 struct mlx5_vport *vport)
1038 if (IS_ERR_OR_NULL(vport->egress.acl))
1041 esw_debug(esw->dev, "Destroy vport[%d] E-Switch egress ACL\n", vport->vport);
1043 esw_vport_cleanup_egress_rules(esw, vport);
1044 mlx5_destroy_flow_group(vport->egress.allowed_vlans_grp);
1045 mlx5_destroy_flow_group(vport->egress.drop_grp);
1046 mlx5_destroy_flow_table(vport->egress.acl);
1047 vport->egress.allowed_vlans_grp = NULL;
1048 vport->egress.drop_grp = NULL;
1049 vport->egress.acl = NULL;
1052 int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
1053 struct mlx5_vport *vport)
1055 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
1056 struct mlx5_core_dev *dev = esw->dev;
1057 struct mlx5_flow_namespace *root_ns;
1058 struct mlx5_flow_table *acl;
1059 struct mlx5_flow_group *g;
1060 void *match_criteria;
1062 /* The ingress acl table contains 4 groups
1063 * (2 active rules at the same time -
1064 * 1 allow rule from one of the first 3 groups.
1065 * 1 drop rule from the last group):
1066 * 1)Allow untagged traffic with smac=original mac.
1067 * 2)Allow untagged traffic.
1068 * 3)Allow traffic with smac=original mac.
1069 * 4)Drop all other traffic.
1074 if (!MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1077 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1080 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n",
1081 vport->vport, MLX5_CAP_ESW_INGRESS_ACL(dev, log_max_ft_size));
1083 root_ns = mlx5_get_flow_vport_acl_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS,
1084 mlx5_eswitch_vport_num_to_index(esw, vport->vport));
1086 esw_warn(dev, "Failed to get E-Switch ingress flow namespace for vport (%d)\n", vport->vport);
1090 flow_group_in = kvzalloc(inlen, GFP_KERNEL);
1094 acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1097 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1101 vport->ingress.acl = acl;
1103 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
1105 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1106 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1107 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1108 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1109 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
1110 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1112 g = mlx5_create_flow_group(acl, flow_group_in);
1115 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1119 vport->ingress.allow_untagged_spoofchk_grp = g;
1121 memset(flow_group_in, 0, inlen);
1122 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1123 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.cvlan_tag);
1124 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1125 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1127 g = mlx5_create_flow_group(acl, flow_group_in);
1130 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1134 vport->ingress.allow_untagged_only_grp = g;
1136 memset(flow_group_in, 0, inlen);
1137 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
1138 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_47_16);
1139 MLX5_SET_TO_ONES(fte_match_param, match_criteria, outer_headers.smac_15_0);
1140 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 2);
1141 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1143 g = mlx5_create_flow_group(acl, flow_group_in);
1146 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1150 vport->ingress.allow_spoofchk_only_grp = g;
1152 memset(flow_group_in, 0, inlen);
1153 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 3);
1154 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1156 g = mlx5_create_flow_group(acl, flow_group_in);
1159 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1163 vport->ingress.drop_grp = g;
1167 if (!IS_ERR_OR_NULL(vport->ingress.allow_spoofchk_only_grp))
1168 mlx5_destroy_flow_group(
1169 vport->ingress.allow_spoofchk_only_grp);
1170 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_only_grp))
1171 mlx5_destroy_flow_group(
1172 vport->ingress.allow_untagged_only_grp);
1173 if (!IS_ERR_OR_NULL(vport->ingress.allow_untagged_spoofchk_grp))
1174 mlx5_destroy_flow_group(
1175 vport->ingress.allow_untagged_spoofchk_grp);
1176 if (!IS_ERR_OR_NULL(vport->ingress.acl))
1177 mlx5_destroy_flow_table(vport->ingress.acl);
1180 kvfree(flow_group_in);
1184 void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
1185 struct mlx5_vport *vport)
1187 if (!IS_ERR_OR_NULL(vport->ingress.drop_rule))
1188 mlx5_del_flow_rules(vport->ingress.drop_rule);
1190 if (!IS_ERR_OR_NULL(vport->ingress.allow_rule))
1191 mlx5_del_flow_rules(vport->ingress.allow_rule);
1193 vport->ingress.drop_rule = NULL;
1194 vport->ingress.allow_rule = NULL;
1196 esw_vport_del_ingress_acl_modify_metadata(esw, vport);
1199 void esw_vport_disable_ingress_acl(struct mlx5_eswitch *esw,
1200 struct mlx5_vport *vport)
1202 if (IS_ERR_OR_NULL(vport->ingress.acl))
1205 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport);
1207 esw_vport_cleanup_ingress_rules(esw, vport);
1208 mlx5_destroy_flow_group(vport->ingress.allow_spoofchk_only_grp);
1209 mlx5_destroy_flow_group(vport->ingress.allow_untagged_only_grp);
1210 mlx5_destroy_flow_group(vport->ingress.allow_untagged_spoofchk_grp);
1211 mlx5_destroy_flow_group(vport->ingress.drop_grp);
1212 mlx5_destroy_flow_table(vport->ingress.acl);
1213 vport->ingress.acl = NULL;
1214 vport->ingress.drop_grp = NULL;
1215 vport->ingress.allow_spoofchk_only_grp = NULL;
1216 vport->ingress.allow_untagged_only_grp = NULL;
1217 vport->ingress.allow_untagged_spoofchk_grp = NULL;
1220 static int esw_vport_ingress_config(struct mlx5_eswitch *esw,
1221 struct mlx5_vport *vport)
1223 struct mlx5_fc *counter = vport->ingress.drop_counter;
1224 struct mlx5_flow_destination drop_ctr_dst = {0};
1225 struct mlx5_flow_destination *dst = NULL;
1226 struct mlx5_flow_act flow_act = {0};
1227 struct mlx5_flow_spec *spec;
1232 esw_vport_cleanup_ingress_rules(esw, vport);
1234 if (!vport->info.vlan && !vport->info.qos && !vport->info.spoofchk) {
1235 esw_vport_disable_ingress_acl(esw, vport);
1239 err = esw_vport_enable_ingress_acl(esw, vport);
1241 mlx5_core_warn(esw->dev,
1242 "failed to enable ingress acl (%d) on vport[%d]\n",
1248 "vport[%d] configure ingress rules, vlan(%d) qos(%d)\n",
1249 vport->vport, vport->info.vlan, vport->info.qos);
1251 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
1257 if (vport->info.vlan || vport->info.qos)
1258 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1260 if (vport->info.spoofchk) {
1261 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_47_16);
1262 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.smac_15_0);
1263 smac_v = MLX5_ADDR_OF(fte_match_param,
1265 outer_headers.smac_47_16);
1266 ether_addr_copy(smac_v, vport->info.mac);
1269 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1270 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1271 vport->ingress.allow_rule =
1272 mlx5_add_flow_rules(vport->ingress.acl, spec,
1273 &flow_act, NULL, 0);
1274 if (IS_ERR(vport->ingress.allow_rule)) {
1275 err = PTR_ERR(vport->ingress.allow_rule);
1277 "vport[%d] configure ingress allow rule, err(%d)\n",
1279 vport->ingress.allow_rule = NULL;
1283 memset(spec, 0, sizeof(*spec));
1284 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1286 /* Attach drop flow counter */
1288 flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1289 drop_ctr_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
1290 drop_ctr_dst.counter_id = mlx5_fc_id(counter);
1291 dst = &drop_ctr_dst;
1294 vport->ingress.drop_rule =
1295 mlx5_add_flow_rules(vport->ingress.acl, spec,
1296 &flow_act, dst, dest_num);
1297 if (IS_ERR(vport->ingress.drop_rule)) {
1298 err = PTR_ERR(vport->ingress.drop_rule);
1300 "vport[%d] configure ingress drop rule, err(%d)\n",
1302 vport->ingress.drop_rule = NULL;
1308 esw_vport_cleanup_ingress_rules(esw, vport);
1313 static int esw_vport_egress_config(struct mlx5_eswitch *esw,
1314 struct mlx5_vport *vport)
1316 struct mlx5_fc *counter = vport->egress.drop_counter;
1317 struct mlx5_flow_destination drop_ctr_dst = {0};
1318 struct mlx5_flow_destination *dst = NULL;
1319 struct mlx5_flow_act flow_act = {0};
1320 struct mlx5_flow_spec *spec;
1324 esw_vport_cleanup_egress_rules(esw, vport);
1326 if (!vport->info.vlan && !vport->info.qos) {
1327 esw_vport_disable_egress_acl(esw, vport);
1331 err = esw_vport_enable_egress_acl(esw, vport);
1333 mlx5_core_warn(esw->dev,
1334 "failed to enable egress acl (%d) on vport[%d]\n",
1340 "vport[%d] configure egress rules, vlan(%d) qos(%d)\n",
1341 vport->vport, vport->info.vlan, vport->info.qos);
1343 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
1349 /* Allowed vlan rule */
1350 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.cvlan_tag);
1351 MLX5_SET_TO_ONES(fte_match_param, spec->match_value, outer_headers.cvlan_tag);
1352 MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, outer_headers.first_vid);
1353 MLX5_SET(fte_match_param, spec->match_value, outer_headers.first_vid, vport->info.vlan);
1355 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
1356 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
1357 vport->egress.allowed_vlan =
1358 mlx5_add_flow_rules(vport->egress.acl, spec,
1359 &flow_act, NULL, 0);
1360 if (IS_ERR(vport->egress.allowed_vlan)) {
1361 err = PTR_ERR(vport->egress.allowed_vlan);
1363 "vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1365 vport->egress.allowed_vlan = NULL;
1369 /* Drop others rule (star rule) */
1370 memset(spec, 0, sizeof(*spec));
1371 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;
1373 /* Attach egress drop flow counter */
1375 flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
1376 drop_ctr_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
1377 drop_ctr_dst.counter_id = mlx5_fc_id(counter);
1378 dst = &drop_ctr_dst;
1381 vport->egress.drop_rule =
1382 mlx5_add_flow_rules(vport->egress.acl, spec,
1383 &flow_act, dst, dest_num);
1384 if (IS_ERR(vport->egress.drop_rule)) {
1385 err = PTR_ERR(vport->egress.drop_rule);
1387 "vport[%d] configure egress drop rule failed, err(%d)\n",
1389 vport->egress.drop_rule = NULL;
1396 /* Vport QoS management */
1397 static int esw_create_tsar(struct mlx5_eswitch *esw)
1399 u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1400 struct mlx5_core_dev *dev = esw->dev;
1403 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1406 if (esw->qos.enabled)
1409 err = mlx5_create_scheduling_element_cmd(dev,
1410 SCHEDULING_HIERARCHY_E_SWITCH,
1412 &esw->qos.root_tsar_id);
1414 esw_warn(esw->dev, "E-Switch create TSAR failed (%d)\n", err);
1418 esw->qos.enabled = true;
1422 static void esw_destroy_tsar(struct mlx5_eswitch *esw)
1426 if (!esw->qos.enabled)
1429 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1430 SCHEDULING_HIERARCHY_E_SWITCH,
1431 esw->qos.root_tsar_id);
1433 esw_warn(esw->dev, "E-Switch destroy TSAR failed (%d)\n", err);
1435 esw->qos.enabled = false;
1438 static int esw_vport_enable_qos(struct mlx5_eswitch *esw,
1439 struct mlx5_vport *vport,
1440 u32 initial_max_rate, u32 initial_bw_share)
1442 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1443 struct mlx5_core_dev *dev = esw->dev;
1447 if (!esw->qos.enabled || !MLX5_CAP_GEN(dev, qos) ||
1448 !MLX5_CAP_QOS(dev, esw_scheduling))
1451 if (vport->qos.enabled)
1454 MLX5_SET(scheduling_context, sched_ctx, element_type,
1455 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1456 vport_elem = MLX5_ADDR_OF(scheduling_context, sched_ctx,
1457 element_attributes);
1458 MLX5_SET(vport_element, vport_elem, vport_number, vport->vport);
1459 MLX5_SET(scheduling_context, sched_ctx, parent_element_id,
1460 esw->qos.root_tsar_id);
1461 MLX5_SET(scheduling_context, sched_ctx, max_average_bw,
1463 MLX5_SET(scheduling_context, sched_ctx, bw_share, initial_bw_share);
1465 err = mlx5_create_scheduling_element_cmd(dev,
1466 SCHEDULING_HIERARCHY_E_SWITCH,
1468 &vport->qos.esw_tsar_ix);
1470 esw_warn(esw->dev, "E-Switch create TSAR vport element failed (vport=%d,err=%d)\n",
1475 vport->qos.enabled = true;
1479 static void esw_vport_disable_qos(struct mlx5_eswitch *esw,
1480 struct mlx5_vport *vport)
1484 if (!vport->qos.enabled)
1487 err = mlx5_destroy_scheduling_element_cmd(esw->dev,
1488 SCHEDULING_HIERARCHY_E_SWITCH,
1489 vport->qos.esw_tsar_ix);
1491 esw_warn(esw->dev, "E-Switch destroy TSAR vport element failed (vport=%d,err=%d)\n",
1494 vport->qos.enabled = false;
1497 static int esw_vport_qos_config(struct mlx5_eswitch *esw,
1498 struct mlx5_vport *vport,
1499 u32 max_rate, u32 bw_share)
1501 u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
1502 struct mlx5_core_dev *dev = esw->dev;
1507 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
1510 if (!vport->qos.enabled)
1513 MLX5_SET(scheduling_context, sched_ctx, element_type,
1514 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);
1515 vport_elem = MLX5_ADDR_OF(scheduling_context, sched_ctx,
1516 element_attributes);
1517 MLX5_SET(vport_element, vport_elem, vport_number, vport->vport);
1518 MLX5_SET(scheduling_context, sched_ctx, parent_element_id,
1519 esw->qos.root_tsar_id);
1520 MLX5_SET(scheduling_context, sched_ctx, max_average_bw,
1522 MLX5_SET(scheduling_context, sched_ctx, bw_share, bw_share);
1523 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;
1524 bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;
1526 err = mlx5_modify_scheduling_element_cmd(dev,
1527 SCHEDULING_HIERARCHY_E_SWITCH,
1529 vport->qos.esw_tsar_ix,
1532 esw_warn(esw->dev, "E-Switch modify TSAR vport element failed (vport=%d,err=%d)\n",
1540 static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
1542 ((u8 *)node_guid)[7] = mac[0];
1543 ((u8 *)node_guid)[6] = mac[1];
1544 ((u8 *)node_guid)[5] = mac[2];
1545 ((u8 *)node_guid)[4] = 0xff;
1546 ((u8 *)node_guid)[3] = 0xfe;
1547 ((u8 *)node_guid)[2] = mac[3];
1548 ((u8 *)node_guid)[1] = mac[4];
1549 ((u8 *)node_guid)[0] = mac[5];
1552 static void esw_apply_vport_conf(struct mlx5_eswitch *esw,
1553 struct mlx5_vport *vport)
1555 u16 vport_num = vport->vport;
1558 if (esw->manager_vport == vport_num)
1561 mlx5_modify_vport_admin_state(esw->dev,
1562 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
1564 vport->info.link_state);
1566 /* Host PF has its own mac/guid. */
1568 mlx5_modify_nic_vport_mac_address(esw->dev, vport_num,
1570 mlx5_modify_nic_vport_node_guid(esw->dev, vport_num,
1571 vport->info.node_guid);
1574 flags = (vport->info.vlan || vport->info.qos) ?
1575 SET_VLAN_STRIP | SET_VLAN_INSERT : 0;
1576 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan, vport->info.qos,
1579 /* Only legacy mode needs ACLs */
1580 if (esw->mode == MLX5_ESWITCH_LEGACY) {
1581 esw_vport_ingress_config(esw, vport);
1582 esw_vport_egress_config(esw, vport);
1586 static void esw_vport_create_drop_counters(struct mlx5_vport *vport)
1588 struct mlx5_core_dev *dev = vport->dev;
1590 if (MLX5_CAP_ESW_INGRESS_ACL(dev, flow_counter)) {
1591 vport->ingress.drop_counter = mlx5_fc_create(dev, false);
1592 if (IS_ERR(vport->ingress.drop_counter)) {
1594 "vport[%d] configure ingress drop rule counter failed\n",
1596 vport->ingress.drop_counter = NULL;
1600 if (MLX5_CAP_ESW_EGRESS_ACL(dev, flow_counter)) {
1601 vport->egress.drop_counter = mlx5_fc_create(dev, false);
1602 if (IS_ERR(vport->egress.drop_counter)) {
1604 "vport[%d] configure egress drop rule counter failed\n",
1606 vport->egress.drop_counter = NULL;
1611 static void esw_vport_destroy_drop_counters(struct mlx5_vport *vport)
1613 struct mlx5_core_dev *dev = vport->dev;
1615 if (vport->ingress.drop_counter)
1616 mlx5_fc_destroy(dev, vport->ingress.drop_counter);
1617 if (vport->egress.drop_counter)
1618 mlx5_fc_destroy(dev, vport->egress.drop_counter);
1621 static void esw_enable_vport(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
1624 u16 vport_num = vport->vport;
1626 mutex_lock(&esw->state_lock);
1627 WARN_ON(vport->enabled);
1629 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
1631 /* Create steering drop counters for ingress and egress ACLs */
1632 if (vport_num && esw->mode == MLX5_ESWITCH_LEGACY)
1633 esw_vport_create_drop_counters(vport);
1635 /* Restore old vport configuration */
1636 esw_apply_vport_conf(esw, vport);
1638 /* Attach vport to the eswitch rate limiter */
1639 if (esw_vport_enable_qos(esw, vport, vport->info.max_rate,
1640 vport->qos.bw_share))
1641 esw_warn(esw->dev, "Failed to attach vport %d to eswitch rate limiter", vport_num);
1643 /* Sync with current vport context */
1644 vport->enabled_events = enable_events;
1645 vport->enabled = true;
1647 /* Esw manager is trusted by default. Host PF (vport 0) is trusted as well
1648 * in smartNIC as it's a vport group manager.
1650 if (esw->manager_vport == vport_num ||
1651 (!vport_num && mlx5_core_is_ecpf(esw->dev)))
1652 vport->info.trusted = true;
1654 esw_vport_change_handle_locked(vport);
1656 esw->enabled_vports++;
1657 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
1658 mutex_unlock(&esw->state_lock);
1661 static void esw_disable_vport(struct mlx5_eswitch *esw,
1662 struct mlx5_vport *vport)
1664 u16 vport_num = vport->vport;
1666 if (!vport->enabled)
1669 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
1670 /* Mark this vport as disabled to discard new events */
1671 vport->enabled = false;
1673 /* Wait for current already scheduled events to complete */
1674 flush_workqueue(esw->work_queue);
1675 /* Disable events from this vport */
1676 arm_vport_context_events_cmd(esw->dev, vport->vport, 0);
1677 mutex_lock(&esw->state_lock);
1678 /* We don't assume VFs will cleanup after themselves.
1679 * Calling vport change handler while vport is disabled will cleanup
1680 * the vport resources.
1682 esw_vport_change_handle_locked(vport);
1683 vport->enabled_events = 0;
1684 esw_vport_disable_qos(esw, vport);
1685 if (esw->manager_vport != vport_num &&
1686 esw->mode == MLX5_ESWITCH_LEGACY) {
1687 mlx5_modify_vport_admin_state(esw->dev,
1688 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
1690 MLX5_VPORT_ADMIN_STATE_DOWN);
1691 esw_vport_disable_egress_acl(esw, vport);
1692 esw_vport_disable_ingress_acl(esw, vport);
1693 esw_vport_destroy_drop_counters(vport);
1695 esw->enabled_vports--;
1696 mutex_unlock(&esw->state_lock);
1699 static int eswitch_vport_event(struct notifier_block *nb,
1700 unsigned long type, void *data)
1702 struct mlx5_eswitch *esw = mlx5_nb_cof(nb, struct mlx5_eswitch, nb);
1703 struct mlx5_eqe *eqe = data;
1704 struct mlx5_vport *vport;
1707 vport_num = be16_to_cpu(eqe->data.vport_change.vport_num);
1708 vport = mlx5_eswitch_get_vport(esw, vport_num);
1713 queue_work(esw->work_queue, &vport->vport_change_handler);
1719 * mlx5_esw_query_functions - Returns raw output about functions state
1720 * @dev: Pointer to device to query
1722 * mlx5_esw_query_functions() allocates and returns functions changed
1723 * raw output memory pointer from device on success. Otherwise returns ERR_PTR.
1724 * Caller must free the memory using kvfree() when valid pointer is returned.
1726 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
1728 int outlen = MLX5_ST_SZ_BYTES(query_esw_functions_out);
1729 u32 in[MLX5_ST_SZ_DW(query_esw_functions_in)] = {};
1733 out = kvzalloc(outlen, GFP_KERNEL);
1735 return ERR_PTR(-ENOMEM);
1737 MLX5_SET(query_esw_functions_in, in, opcode,
1738 MLX5_CMD_OP_QUERY_ESW_FUNCTIONS);
1740 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
1745 return ERR_PTR(err);
1748 static void mlx5_eswitch_event_handlers_register(struct mlx5_eswitch *esw)
1750 MLX5_NB_INIT(&esw->nb, eswitch_vport_event, NIC_VPORT_CHANGE);
1751 mlx5_eq_notifier_register(esw->dev, &esw->nb);
1753 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev)) {
1754 MLX5_NB_INIT(&esw->esw_funcs.nb, mlx5_esw_funcs_changed_handler,
1755 ESW_FUNCTIONS_CHANGED);
1756 mlx5_eq_notifier_register(esw->dev, &esw->esw_funcs.nb);
1760 static void mlx5_eswitch_event_handlers_unregister(struct mlx5_eswitch *esw)
1762 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev))
1763 mlx5_eq_notifier_unregister(esw->dev, &esw->esw_funcs.nb);
1765 mlx5_eq_notifier_unregister(esw->dev, &esw->nb);
1767 flush_workqueue(esw->work_queue);
1770 /* Public E-Switch API */
1771 #define ESW_ALLOWED(esw) ((esw) && MLX5_ESWITCH_MANAGER((esw)->dev))
1773 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int mode)
1775 struct mlx5_vport *vport;
1777 int i, enabled_events;
1779 if (!ESW_ALLOWED(esw) ||
1780 !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1781 esw_warn(esw->dev, "FDB is not supported, aborting ...\n");
1785 if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
1786 esw_warn(esw->dev, "ingress ACL is not supported by FW\n");
1788 if (!MLX5_CAP_ESW_EGRESS_ACL(esw->dev, ft_support))
1789 esw_warn(esw->dev, "engress ACL is not supported by FW\n");
1793 mlx5_lag_update(esw->dev);
1795 if (mode == MLX5_ESWITCH_LEGACY) {
1796 err = esw_create_legacy_table(esw);
1800 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);
1801 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
1802 err = esw_offloads_init(esw);
1808 err = esw_create_tsar(esw);
1810 esw_warn(esw->dev, "Failed to create eswitch TSAR");
1812 enabled_events = (mode == MLX5_ESWITCH_LEGACY) ? SRIOV_VPORT_EVENTS :
1815 /* Enable PF vport */
1816 vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);
1817 esw_enable_vport(esw, vport, enabled_events);
1819 /* Enable ECPF vports */
1820 if (mlx5_ecpf_vport_exists(esw->dev)) {
1821 vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_ECPF);
1822 esw_enable_vport(esw, vport, enabled_events);
1825 /* Enable VF vports */
1826 mlx5_esw_for_each_vf_vport(esw, i, vport, esw->esw_funcs.num_vfs)
1827 esw_enable_vport(esw, vport, enabled_events);
1829 mlx5_eswitch_event_handlers_register(esw);
1831 esw_info(esw->dev, "Enable: mode(%s), nvfs(%d), active vports(%d)\n",
1832 mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1833 esw->esw_funcs.num_vfs, esw->enabled_vports);
1838 esw->mode = MLX5_ESWITCH_NONE;
1840 if (mode == MLX5_ESWITCH_OFFLOADS) {
1841 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
1842 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);
1848 void mlx5_eswitch_disable(struct mlx5_eswitch *esw)
1850 struct esw_mc_addr *mc_promisc;
1851 struct mlx5_vport *vport;
1855 if (!ESW_ALLOWED(esw) || esw->mode == MLX5_ESWITCH_NONE)
1858 esw_info(esw->dev, "Disable: mode(%s), nvfs(%d), active vports(%d)\n",
1859 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1860 esw->esw_funcs.num_vfs, esw->enabled_vports);
1862 mc_promisc = &esw->mc_promisc;
1863 mlx5_eswitch_event_handlers_unregister(esw);
1865 mlx5_esw_for_all_vports(esw, i, vport)
1866 esw_disable_vport(esw, vport);
1868 if (mc_promisc && mc_promisc->uplink_rule)
1869 mlx5_del_flow_rules(mc_promisc->uplink_rule);
1871 esw_destroy_tsar(esw);
1873 if (esw->mode == MLX5_ESWITCH_LEGACY)
1874 esw_destroy_legacy_table(esw);
1875 else if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1876 esw_offloads_cleanup(esw);
1878 old_mode = esw->mode;
1879 esw->mode = MLX5_ESWITCH_NONE;
1881 mlx5_lag_update(esw->dev);
1883 if (old_mode == MLX5_ESWITCH_OFFLOADS) {
1884 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
1885 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);
1889 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1891 struct mlx5_eswitch *esw;
1892 struct mlx5_vport *vport;
1896 if (!MLX5_VPORT_MANAGER(dev))
1899 total_vports = mlx5_eswitch_get_total_vports(dev);
1902 "Total vports %d, per vport: max uc(%d) max mc(%d)\n",
1904 MLX5_MAX_UC_PER_VPORT(dev),
1905 MLX5_MAX_MC_PER_VPORT(dev));
1907 esw = kzalloc(sizeof(*esw), GFP_KERNEL);
1912 esw->manager_vport = mlx5_eswitch_manager_vport(dev);
1913 esw->first_host_vport = mlx5_eswitch_first_host_vport_num(dev);
1915 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
1916 if (!esw->work_queue) {
1921 esw->vports = kcalloc(total_vports, sizeof(struct mlx5_vport),
1928 esw->total_vports = total_vports;
1930 err = esw_offloads_init_reps(esw);
1934 hash_init(esw->offloads.encap_tbl);
1935 hash_init(esw->offloads.mod_hdr_tbl);
1936 mutex_init(&esw->state_lock);
1938 mlx5_esw_for_all_vports(esw, i, vport) {
1939 vport->vport = mlx5_eswitch_index_to_vport_num(esw, i);
1940 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1942 INIT_WORK(&vport->vport_change_handler,
1943 esw_vport_change_handler);
1946 esw->enabled_vports = 0;
1947 esw->mode = MLX5_ESWITCH_NONE;
1948 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1949 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, reformat) &&
1950 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
1951 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
1953 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
1955 dev->priv.eswitch = esw;
1958 if (esw->work_queue)
1959 destroy_workqueue(esw->work_queue);
1960 esw_offloads_cleanup_reps(esw);
1966 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
1968 if (!esw || !MLX5_VPORT_MANAGER(esw->dev))
1971 esw_info(esw->dev, "cleanup\n");
1973 esw->dev->priv.eswitch = NULL;
1974 destroy_workqueue(esw->work_queue);
1975 esw_offloads_cleanup_reps(esw);
1980 /* Vport Administration */
1981 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1982 u16 vport, u8 mac[ETH_ALEN])
1984 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1989 return PTR_ERR(evport);
1990 if (is_multicast_ether_addr(mac))
1993 mutex_lock(&esw->state_lock);
1995 if (evport->info.spoofchk && !is_valid_ether_addr(mac))
1996 mlx5_core_warn(esw->dev,
1997 "Set invalid MAC while spoofchk is on, vport(%d)\n",
2000 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport, mac);
2002 mlx5_core_warn(esw->dev,
2003 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
2008 node_guid_gen_from_mac(&node_guid, mac);
2009 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
2011 mlx5_core_warn(esw->dev,
2012 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
2015 ether_addr_copy(evport->info.mac, mac);
2016 evport->info.node_guid = node_guid;
2017 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY)
2018 err = esw_vport_ingress_config(esw, evport);
2021 mutex_unlock(&esw->state_lock);
2025 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
2026 u16 vport, int link_state)
2028 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2031 if (!ESW_ALLOWED(esw))
2034 return PTR_ERR(evport);
2036 mutex_lock(&esw->state_lock);
2038 err = mlx5_modify_vport_admin_state(esw->dev,
2039 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
2040 vport, 1, link_state);
2042 mlx5_core_warn(esw->dev,
2043 "Failed to set vport %d link state, err = %d",
2048 evport->info.link_state = link_state;
2051 mutex_unlock(&esw->state_lock);
2055 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
2056 u16 vport, struct ifla_vf_info *ivi)
2058 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2061 return PTR_ERR(evport);
2063 memset(ivi, 0, sizeof(*ivi));
2064 ivi->vf = vport - 1;
2066 mutex_lock(&esw->state_lock);
2067 ether_addr_copy(ivi->mac, evport->info.mac);
2068 ivi->linkstate = evport->info.link_state;
2069 ivi->vlan = evport->info.vlan;
2070 ivi->qos = evport->info.qos;
2071 ivi->spoofchk = evport->info.spoofchk;
2072 ivi->trusted = evport->info.trusted;
2073 ivi->min_tx_rate = evport->info.min_rate;
2074 ivi->max_tx_rate = evport->info.max_rate;
2075 mutex_unlock(&esw->state_lock);
2080 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
2081 u16 vport, u16 vlan, u8 qos, u8 set_flags)
2083 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2086 if (!ESW_ALLOWED(esw))
2089 return PTR_ERR(evport);
2090 if (vlan > 4095 || qos > 7)
2093 mutex_lock(&esw->state_lock);
2095 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
2099 evport->info.vlan = vlan;
2100 evport->info.qos = qos;
2101 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY) {
2102 err = esw_vport_ingress_config(esw, evport);
2105 err = esw_vport_egress_config(esw, evport);
2109 mutex_unlock(&esw->state_lock);
2113 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
2114 u16 vport, u16 vlan, u8 qos)
2119 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;
2121 return __mlx5_eswitch_set_vport_vlan(esw, vport, vlan, qos, set_flags);
2124 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
2125 u16 vport, bool spoofchk)
2127 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2131 if (!ESW_ALLOWED(esw))
2134 return PTR_ERR(evport);
2136 mutex_lock(&esw->state_lock);
2137 pschk = evport->info.spoofchk;
2138 evport->info.spoofchk = spoofchk;
2139 if (pschk && !is_valid_ether_addr(evport->info.mac))
2140 mlx5_core_warn(esw->dev,
2141 "Spoofchk in set while MAC is invalid, vport(%d)\n",
2143 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY)
2144 err = esw_vport_ingress_config(esw, evport);
2146 evport->info.spoofchk = pschk;
2147 mutex_unlock(&esw->state_lock);
2152 static void esw_cleanup_vepa_rules(struct mlx5_eswitch *esw)
2154 if (esw->fdb_table.legacy.vepa_uplink_rule)
2155 mlx5_del_flow_rules(esw->fdb_table.legacy.vepa_uplink_rule);
2157 if (esw->fdb_table.legacy.vepa_star_rule)
2158 mlx5_del_flow_rules(esw->fdb_table.legacy.vepa_star_rule);
2160 esw->fdb_table.legacy.vepa_uplink_rule = NULL;
2161 esw->fdb_table.legacy.vepa_star_rule = NULL;
2164 static int _mlx5_eswitch_set_vepa_locked(struct mlx5_eswitch *esw,
2167 struct mlx5_flow_destination dest = {};
2168 struct mlx5_flow_act flow_act = {};
2169 struct mlx5_flow_handle *flow_rule;
2170 struct mlx5_flow_spec *spec;
2175 esw_cleanup_vepa_rules(esw);
2179 if (esw->fdb_table.legacy.vepa_uplink_rule)
2182 spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
2186 /* Uplink rule forward uplink traffic to FDB */
2187 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
2188 MLX5_SET(fte_match_set_misc, misc, source_port, MLX5_VPORT_UPLINK);
2190 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
2191 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
2193 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
2194 dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
2195 dest.ft = esw->fdb_table.legacy.fdb;
2196 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2197 flow_rule = mlx5_add_flow_rules(esw->fdb_table.legacy.vepa_fdb, spec,
2198 &flow_act, &dest, 1);
2199 if (IS_ERR(flow_rule)) {
2200 err = PTR_ERR(flow_rule);
2203 esw->fdb_table.legacy.vepa_uplink_rule = flow_rule;
2206 /* Star rule to forward all traffic to uplink vport */
2207 memset(spec, 0, sizeof(*spec));
2208 memset(&dest, 0, sizeof(dest));
2209 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
2210 dest.vport.num = MLX5_VPORT_UPLINK;
2211 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
2212 flow_rule = mlx5_add_flow_rules(esw->fdb_table.legacy.vepa_fdb, spec,
2213 &flow_act, &dest, 1);
2214 if (IS_ERR(flow_rule)) {
2215 err = PTR_ERR(flow_rule);
2218 esw->fdb_table.legacy.vepa_star_rule = flow_rule;
2224 esw_cleanup_vepa_rules(esw);
2228 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting)
2235 if (!ESW_ALLOWED(esw))
2238 mutex_lock(&esw->state_lock);
2239 if (esw->mode != MLX5_ESWITCH_LEGACY) {
2244 err = _mlx5_eswitch_set_vepa_locked(esw, setting);
2247 mutex_unlock(&esw->state_lock);
2251 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting)
2258 if (!ESW_ALLOWED(esw))
2261 mutex_lock(&esw->state_lock);
2262 if (esw->mode != MLX5_ESWITCH_LEGACY) {
2267 *setting = esw->fdb_table.legacy.vepa_uplink_rule ? 1 : 0;
2270 mutex_unlock(&esw->state_lock);
2274 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
2275 u16 vport, bool setting)
2277 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2279 if (!ESW_ALLOWED(esw))
2282 return PTR_ERR(evport);
2284 mutex_lock(&esw->state_lock);
2285 evport->info.trusted = setting;
2286 if (evport->enabled)
2287 esw_vport_change_handle_locked(evport);
2288 mutex_unlock(&esw->state_lock);
2293 static u32 calculate_vports_min_rate_divider(struct mlx5_eswitch *esw)
2295 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2296 struct mlx5_vport *evport;
2297 u32 max_guarantee = 0;
2300 mlx5_esw_for_all_vports(esw, i, evport) {
2301 if (!evport->enabled || evport->info.min_rate < max_guarantee)
2303 max_guarantee = evport->info.min_rate;
2306 return max_t(u32, max_guarantee / fw_max_bw_share, 1);
2309 static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider)
2311 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2312 struct mlx5_vport *evport;
2319 mlx5_esw_for_all_vports(esw, i, evport) {
2320 if (!evport->enabled)
2322 vport_min_rate = evport->info.min_rate;
2323 vport_max_rate = evport->info.max_rate;
2324 bw_share = MLX5_MIN_BW_SHARE;
2327 bw_share = MLX5_RATE_TO_BW_SHARE(vport_min_rate,
2331 if (bw_share == evport->qos.bw_share)
2334 err = esw_vport_qos_config(esw, evport, vport_max_rate,
2337 evport->qos.bw_share = bw_share;
2345 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
2346 u32 max_rate, u32 min_rate)
2348 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2349 u32 fw_max_bw_share;
2350 u32 previous_min_rate;
2352 bool min_rate_supported;
2353 bool max_rate_supported;
2356 if (!ESW_ALLOWED(esw))
2359 return PTR_ERR(evport);
2361 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share);
2362 min_rate_supported = MLX5_CAP_QOS(esw->dev, esw_bw_share) &&
2363 fw_max_bw_share >= MLX5_MIN_BW_SHARE;
2364 max_rate_supported = MLX5_CAP_QOS(esw->dev, esw_rate_limit);
2366 if ((min_rate && !min_rate_supported) || (max_rate && !max_rate_supported))
2369 mutex_lock(&esw->state_lock);
2371 if (min_rate == evport->info.min_rate)
2374 previous_min_rate = evport->info.min_rate;
2375 evport->info.min_rate = min_rate;
2376 divider = calculate_vports_min_rate_divider(esw);
2377 err = normalize_vports_min_rate(esw, divider);
2379 evport->info.min_rate = previous_min_rate;
2384 if (max_rate == evport->info.max_rate)
2387 err = esw_vport_qos_config(esw, evport, max_rate, evport->qos.bw_share);
2389 evport->info.max_rate = max_rate;
2392 mutex_unlock(&esw->state_lock);
2396 static int mlx5_eswitch_query_vport_drop_stats(struct mlx5_core_dev *dev,
2397 struct mlx5_vport *vport,
2398 struct mlx5_vport_drop_stats *stats)
2400 struct mlx5_eswitch *esw = dev->priv.eswitch;
2401 u64 rx_discard_vport_down, tx_discard_vport_down;
2405 if (!vport->enabled || esw->mode != MLX5_ESWITCH_LEGACY)
2408 if (vport->egress.drop_counter)
2409 mlx5_fc_query(dev, vport->egress.drop_counter,
2410 &stats->rx_dropped, &bytes);
2412 if (vport->ingress.drop_counter)
2413 mlx5_fc_query(dev, vport->ingress.drop_counter,
2414 &stats->tx_dropped, &bytes);
2416 if (!MLX5_CAP_GEN(dev, receive_discard_vport_down) &&
2417 !MLX5_CAP_GEN(dev, transmit_discard_vport_down))
2420 err = mlx5_query_vport_down_stats(dev, vport->vport, 1,
2421 &rx_discard_vport_down,
2422 &tx_discard_vport_down);
2426 if (MLX5_CAP_GEN(dev, receive_discard_vport_down))
2427 stats->rx_dropped += rx_discard_vport_down;
2428 if (MLX5_CAP_GEN(dev, transmit_discard_vport_down))
2429 stats->tx_dropped += tx_discard_vport_down;
2434 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2436 struct ifla_vf_stats *vf_stats)
2438 struct mlx5_vport *vport = mlx5_eswitch_get_vport(esw, vport_num);
2439 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2440 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {0};
2441 struct mlx5_vport_drop_stats stats = {0};
2446 return PTR_ERR(vport);
2448 out = kvzalloc(outlen, GFP_KERNEL);
2452 MLX5_SET(query_vport_counter_in, in, opcode,
2453 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2454 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2455 MLX5_SET(query_vport_counter_in, in, vport_number, vport->vport);
2456 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2458 memset(out, 0, outlen);
2459 err = mlx5_cmd_exec(esw->dev, in, sizeof(in), out, outlen);
2463 #define MLX5_GET_CTR(p, x) \
2464 MLX5_GET64(query_vport_counter_out, p, x)
2466 memset(vf_stats, 0, sizeof(*vf_stats));
2467 vf_stats->rx_packets =
2468 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2469 MLX5_GET_CTR(out, received_ib_unicast.packets) +
2470 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2471 MLX5_GET_CTR(out, received_ib_multicast.packets) +
2472 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2474 vf_stats->rx_bytes =
2475 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2476 MLX5_GET_CTR(out, received_ib_unicast.octets) +
2477 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2478 MLX5_GET_CTR(out, received_ib_multicast.octets) +
2479 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2481 vf_stats->tx_packets =
2482 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2483 MLX5_GET_CTR(out, transmitted_ib_unicast.packets) +
2484 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2485 MLX5_GET_CTR(out, transmitted_ib_multicast.packets) +
2486 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2488 vf_stats->tx_bytes =
2489 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2490 MLX5_GET_CTR(out, transmitted_ib_unicast.octets) +
2491 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2492 MLX5_GET_CTR(out, transmitted_ib_multicast.octets) +
2493 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2495 vf_stats->multicast =
2496 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2497 MLX5_GET_CTR(out, received_ib_multicast.packets);
2499 vf_stats->broadcast =
2500 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2502 err = mlx5_eswitch_query_vport_drop_stats(esw->dev, vport, &stats);
2505 vf_stats->rx_dropped = stats.rx_dropped;
2506 vf_stats->tx_dropped = stats.tx_dropped;
2513 u8 mlx5_eswitch_mode(struct mlx5_eswitch *esw)
2515 return ESW_ALLOWED(esw) ? esw->mode : MLX5_ESWITCH_NONE;
2517 EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
2519 enum devlink_eswitch_encap_mode
2520 mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
2522 struct mlx5_eswitch *esw;
2524 esw = dev->priv.eswitch;
2525 return ESW_ALLOWED(esw) ? esw->offloads.encap :
2526 DEVLINK_ESWITCH_ENCAP_MODE_NONE;
2528 EXPORT_SYMBOL(mlx5_eswitch_get_encap_mode);
2530 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1)
2532 if ((dev0->priv.eswitch->mode == MLX5_ESWITCH_NONE &&
2533 dev1->priv.eswitch->mode == MLX5_ESWITCH_NONE) ||
2534 (dev0->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS &&
2535 dev1->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS))
2541 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
2542 struct mlx5_core_dev *dev1)
2544 return (dev0->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS &&
2545 dev1->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS);
2548 void mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, const int num_vfs)
2552 WARN_ON_ONCE(esw->mode != MLX5_ESWITCH_NONE);
2554 if (!mlx5_core_is_ecpf_esw_manager(esw->dev)) {
2555 esw->esw_funcs.num_vfs = num_vfs;
2559 out = mlx5_esw_query_functions(esw->dev);
2563 esw->esw_funcs.num_vfs = MLX5_GET(query_esw_functions_out, out,
2564 host_params_context.host_num_of_vfs);