1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2015 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
56 #include <linux/of_net.h>
60 #include <asm/idprom.h>
65 #include "ixgbe_common.h"
66 #include "ixgbe_dcb_82599.h"
67 #include "ixgbe_sriov.h"
69 char ixgbe_driver_name[] = "ixgbe";
70 static const char ixgbe_driver_string[] =
71 "Intel(R) 10 Gigabit PCI Express Network Driver";
73 char ixgbe_default_device_descr[] =
74 "Intel(R) 10 Gigabit Network Connection";
76 static char ixgbe_default_device_descr[] =
77 "Intel(R) 10 Gigabit Network Connection";
79 #define DRV_VERSION "4.2.1-k"
80 const char ixgbe_driver_version[] = DRV_VERSION;
81 static const char ixgbe_copyright[] =
82 "Copyright (c) 1999-2015 Intel Corporation.";
84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
87 [board_82598] = &ixgbe_82598_info,
88 [board_82599] = &ixgbe_82599_info,
89 [board_X540] = &ixgbe_X540_info,
90 [board_X550] = &ixgbe_X550_info,
91 [board_X550EM_x] = &ixgbe_X550EM_x_info,
94 /* ixgbe_pci_tbl - PCI Device ID Table
96 * Wildcard entries (PCI_ANY_ID) should come last
97 * Last entry must be all 0s
99 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
100 * Class, Class Mask, private data (not used) }
102 static const struct pci_device_id ixgbe_pci_tbl[] = {
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
138 /* required last entry */
141 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
143 #ifdef CONFIG_IXGBE_DCA
144 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
146 static struct notifier_block dca_notifier = {
147 .notifier_call = ixgbe_notify_dca,
153 #ifdef CONFIG_PCI_IOV
154 static unsigned int max_vfs;
155 module_param(max_vfs, uint, 0);
156 MODULE_PARM_DESC(max_vfs,
157 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
158 #endif /* CONFIG_PCI_IOV */
160 static unsigned int allow_unsupported_sfp;
161 module_param(allow_unsupported_sfp, uint, 0);
162 MODULE_PARM_DESC(allow_unsupported_sfp,
163 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
165 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
166 static int debug = -1;
167 module_param(debug, int, 0);
168 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
170 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
171 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
172 MODULE_LICENSE("GPL");
173 MODULE_VERSION(DRV_VERSION);
175 static struct workqueue_struct *ixgbe_wq;
177 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
179 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
182 struct pci_dev *parent_dev;
183 struct pci_bus *parent_bus;
185 parent_bus = adapter->pdev->bus->parent;
189 parent_dev = parent_bus->self;
193 if (!pci_is_pcie(parent_dev))
196 pcie_capability_read_word(parent_dev, reg, value);
197 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
198 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
203 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
205 struct ixgbe_hw *hw = &adapter->hw;
209 hw->bus.type = ixgbe_bus_type_pci_express;
211 /* Get the negotiated link width and speed from PCI config space of the
212 * parent, as this device is behind a switch
214 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
216 /* assume caller will handle error case */
220 hw->bus.width = ixgbe_convert_bus_width(link_status);
221 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
227 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
228 * @hw: hw specific details
230 * This function is used by probe to determine whether a device's PCI-Express
231 * bandwidth details should be gathered from the parent bus instead of from the
232 * device. Used to ensure that various locations all have the correct device ID
235 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
237 switch (hw->device_id) {
238 case IXGBE_DEV_ID_82599_SFP_SF_QP:
239 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
246 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
249 struct ixgbe_hw *hw = &adapter->hw;
251 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
252 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
253 struct pci_dev *pdev;
255 /* Some devices are not connected over PCIe and thus do not negotiate
256 * speed. These devices do not have valid bus info, and thus any report
257 * we generate may not be correct.
259 if (hw->bus.type == ixgbe_bus_type_internal)
262 /* determine whether to use the parent device */
263 if (ixgbe_pcie_from_parent(&adapter->hw))
264 pdev = adapter->pdev->bus->parent->self;
266 pdev = adapter->pdev;
268 if (pcie_get_minimum_link(pdev, &speed, &width) ||
269 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
270 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
275 case PCIE_SPEED_2_5GT:
276 /* 8b/10b encoding reduces max throughput by 20% */
279 case PCIE_SPEED_5_0GT:
280 /* 8b/10b encoding reduces max throughput by 20% */
283 case PCIE_SPEED_8_0GT:
284 /* 128b/130b encoding reduces throughput by less than 2% */
288 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
292 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
294 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
295 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
296 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
297 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
300 (speed == PCIE_SPEED_2_5GT ? "20%" :
301 speed == PCIE_SPEED_5_0GT ? "20%" :
302 speed == PCIE_SPEED_8_0GT ? "<2%" :
305 if (max_gts < expected_gts) {
306 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
307 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
309 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
313 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
315 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
316 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
317 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
318 queue_work(ixgbe_wq, &adapter->service_task);
321 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
323 struct ixgbe_adapter *adapter = hw->back;
328 e_dev_err("Adapter removed\n");
329 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
330 ixgbe_service_event_schedule(adapter);
333 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
337 /* The following check not only optimizes a bit by not
338 * performing a read on the status register when the
339 * register just read was a status register read that
340 * returned IXGBE_FAILED_READ_REG. It also blocks any
341 * potential recursion.
343 if (reg == IXGBE_STATUS) {
344 ixgbe_remove_adapter(hw);
347 value = ixgbe_read_reg(hw, IXGBE_STATUS);
348 if (value == IXGBE_FAILED_READ_REG)
349 ixgbe_remove_adapter(hw);
353 * ixgbe_read_reg - Read from device register
354 * @hw: hw specific details
355 * @reg: offset of register to read
357 * Returns : value read or IXGBE_FAILED_READ_REG if removed
359 * This function is used to read device registers. It checks for device
360 * removal by confirming any read that returns all ones by checking the
361 * status register value for all ones. This function avoids reading from
362 * the hardware if a removal was previously detected in which case it
363 * returns IXGBE_FAILED_READ_REG (all ones).
365 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
367 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
370 if (ixgbe_removed(reg_addr))
371 return IXGBE_FAILED_READ_REG;
372 value = readl(reg_addr + reg);
373 if (unlikely(value == IXGBE_FAILED_READ_REG))
374 ixgbe_check_remove(hw, reg);
378 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
382 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
383 if (value == IXGBE_FAILED_READ_CFG_WORD) {
384 ixgbe_remove_adapter(hw);
390 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
392 struct ixgbe_adapter *adapter = hw->back;
395 if (ixgbe_removed(hw->hw_addr))
396 return IXGBE_FAILED_READ_CFG_WORD;
397 pci_read_config_word(adapter->pdev, reg, &value);
398 if (value == IXGBE_FAILED_READ_CFG_WORD &&
399 ixgbe_check_cfg_remove(hw, adapter->pdev))
400 return IXGBE_FAILED_READ_CFG_WORD;
404 #ifdef CONFIG_PCI_IOV
405 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
407 struct ixgbe_adapter *adapter = hw->back;
410 if (ixgbe_removed(hw->hw_addr))
411 return IXGBE_FAILED_READ_CFG_DWORD;
412 pci_read_config_dword(adapter->pdev, reg, &value);
413 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
414 ixgbe_check_cfg_remove(hw, adapter->pdev))
415 return IXGBE_FAILED_READ_CFG_DWORD;
418 #endif /* CONFIG_PCI_IOV */
420 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
422 struct ixgbe_adapter *adapter = hw->back;
424 if (ixgbe_removed(hw->hw_addr))
426 pci_write_config_word(adapter->pdev, reg, value);
429 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
431 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
433 /* flush memory to make sure state is correct before next watchdog */
434 smp_mb__before_atomic();
435 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
438 struct ixgbe_reg_info {
443 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
445 /* General Registers */
446 {IXGBE_CTRL, "CTRL"},
447 {IXGBE_STATUS, "STATUS"},
448 {IXGBE_CTRL_EXT, "CTRL_EXT"},
450 /* Interrupt Registers */
451 {IXGBE_EICR, "EICR"},
454 {IXGBE_SRRCTL(0), "SRRCTL"},
455 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
456 {IXGBE_RDLEN(0), "RDLEN"},
457 {IXGBE_RDH(0), "RDH"},
458 {IXGBE_RDT(0), "RDT"},
459 {IXGBE_RXDCTL(0), "RXDCTL"},
460 {IXGBE_RDBAL(0), "RDBAL"},
461 {IXGBE_RDBAH(0), "RDBAH"},
464 {IXGBE_TDBAL(0), "TDBAL"},
465 {IXGBE_TDBAH(0), "TDBAH"},
466 {IXGBE_TDLEN(0), "TDLEN"},
467 {IXGBE_TDH(0), "TDH"},
468 {IXGBE_TDT(0), "TDT"},
469 {IXGBE_TXDCTL(0), "TXDCTL"},
471 /* List Terminator */
477 * ixgbe_regdump - register printout routine
479 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
485 switch (reginfo->ofs) {
486 case IXGBE_SRRCTL(0):
487 for (i = 0; i < 64; i++)
488 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
490 case IXGBE_DCA_RXCTRL(0):
491 for (i = 0; i < 64; i++)
492 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
495 for (i = 0; i < 64; i++)
496 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
499 for (i = 0; i < 64; i++)
500 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
503 for (i = 0; i < 64; i++)
504 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
506 case IXGBE_RXDCTL(0):
507 for (i = 0; i < 64; i++)
508 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
511 for (i = 0; i < 64; i++)
512 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
515 for (i = 0; i < 64; i++)
516 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
519 for (i = 0; i < 64; i++)
520 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
523 for (i = 0; i < 64; i++)
524 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
527 for (i = 0; i < 64; i++)
528 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
531 for (i = 0; i < 64; i++)
532 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
535 for (i = 0; i < 64; i++)
536 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
538 case IXGBE_TXDCTL(0):
539 for (i = 0; i < 64; i++)
540 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
543 pr_info("%-15s %08x\n", reginfo->name,
544 IXGBE_READ_REG(hw, reginfo->ofs));
548 for (i = 0; i < 8; i++) {
549 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
550 pr_err("%-15s", rname);
551 for (j = 0; j < 8; j++)
552 pr_cont(" %08x", regs[i*8+j]);
559 * ixgbe_dump - Print registers, tx-rings and rx-rings
561 static void ixgbe_dump(struct ixgbe_adapter *adapter)
563 struct net_device *netdev = adapter->netdev;
564 struct ixgbe_hw *hw = &adapter->hw;
565 struct ixgbe_reg_info *reginfo;
567 struct ixgbe_ring *tx_ring;
568 struct ixgbe_tx_buffer *tx_buffer;
569 union ixgbe_adv_tx_desc *tx_desc;
570 struct my_u0 { u64 a; u64 b; } *u0;
571 struct ixgbe_ring *rx_ring;
572 union ixgbe_adv_rx_desc *rx_desc;
573 struct ixgbe_rx_buffer *rx_buffer_info;
577 if (!netif_msg_hw(adapter))
580 /* Print netdevice Info */
582 dev_info(&adapter->pdev->dev, "Net device Info\n");
583 pr_info("Device Name state "
584 "trans_start last_rx\n");
585 pr_info("%-15s %016lX %016lX %016lX\n",
592 /* Print Registers */
593 dev_info(&adapter->pdev->dev, "Register Dump\n");
594 pr_info(" Register Name Value\n");
595 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
596 reginfo->name; reginfo++) {
597 ixgbe_regdump(hw, reginfo);
600 /* Print TX Ring Summary */
601 if (!netdev || !netif_running(netdev))
604 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
605 pr_info(" %s %s %s %s\n",
606 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
607 "leng", "ntw", "timestamp");
608 for (n = 0; n < adapter->num_tx_queues; n++) {
609 tx_ring = adapter->tx_ring[n];
610 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
611 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
612 n, tx_ring->next_to_use, tx_ring->next_to_clean,
613 (u64)dma_unmap_addr(tx_buffer, dma),
614 dma_unmap_len(tx_buffer, len),
615 tx_buffer->next_to_watch,
616 (u64)tx_buffer->time_stamp);
620 if (!netif_msg_tx_done(adapter))
621 goto rx_ring_summary;
623 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
625 /* Transmit Descriptor Formats
627 * 82598 Advanced Transmit Descriptor
628 * +--------------------------------------------------------------+
629 * 0 | Buffer Address [63:0] |
630 * +--------------------------------------------------------------+
631 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
632 * +--------------------------------------------------------------+
633 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
635 * 82598 Advanced Transmit Descriptor (Write-Back Format)
636 * +--------------------------------------------------------------+
638 * +--------------------------------------------------------------+
639 * 8 | RSV | STA | NXTSEQ |
640 * +--------------------------------------------------------------+
643 * 82599+ Advanced Transmit Descriptor
644 * +--------------------------------------------------------------+
645 * 0 | Buffer Address [63:0] |
646 * +--------------------------------------------------------------+
647 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
648 * +--------------------------------------------------------------+
649 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
651 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
652 * +--------------------------------------------------------------+
654 * +--------------------------------------------------------------+
655 * 8 | RSV | STA | RSV |
656 * +--------------------------------------------------------------+
660 for (n = 0; n < adapter->num_tx_queues; n++) {
661 tx_ring = adapter->tx_ring[n];
662 pr_info("------------------------------------\n");
663 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
664 pr_info("------------------------------------\n");
665 pr_info("%s%s %s %s %s %s\n",
666 "T [desc] [address 63:0 ] ",
667 "[PlPOIdStDDt Ln] [bi->dma ] ",
668 "leng", "ntw", "timestamp", "bi->skb");
670 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
671 tx_desc = IXGBE_TX_DESC(tx_ring, i);
672 tx_buffer = &tx_ring->tx_buffer_info[i];
673 u0 = (struct my_u0 *)tx_desc;
674 if (dma_unmap_len(tx_buffer, len) > 0) {
675 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
679 (u64)dma_unmap_addr(tx_buffer, dma),
680 dma_unmap_len(tx_buffer, len),
681 tx_buffer->next_to_watch,
682 (u64)tx_buffer->time_stamp,
684 if (i == tx_ring->next_to_use &&
685 i == tx_ring->next_to_clean)
687 else if (i == tx_ring->next_to_use)
689 else if (i == tx_ring->next_to_clean)
694 if (netif_msg_pktdata(adapter) &&
696 print_hex_dump(KERN_INFO, "",
697 DUMP_PREFIX_ADDRESS, 16, 1,
698 tx_buffer->skb->data,
699 dma_unmap_len(tx_buffer, len),
705 /* Print RX Rings Summary */
707 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
708 pr_info("Queue [NTU] [NTC]\n");
709 for (n = 0; n < adapter->num_rx_queues; n++) {
710 rx_ring = adapter->rx_ring[n];
711 pr_info("%5d %5X %5X\n",
712 n, rx_ring->next_to_use, rx_ring->next_to_clean);
716 if (!netif_msg_rx_status(adapter))
719 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
721 /* Receive Descriptor Formats
723 * 82598 Advanced Receive Descriptor (Read) Format
725 * +-----------------------------------------------------+
726 * 0 | Packet Buffer Address [63:1] |A0/NSE|
727 * +----------------------------------------------+------+
728 * 8 | Header Buffer Address [63:1] | DD |
729 * +-----------------------------------------------------+
732 * 82598 Advanced Receive Descriptor (Write-Back) Format
734 * 63 48 47 32 31 30 21 20 16 15 4 3 0
735 * +------------------------------------------------------+
736 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
737 * | Packet | IP | | | | Type | Type |
738 * | Checksum | Ident | | | | | |
739 * +------------------------------------------------------+
740 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
741 * +------------------------------------------------------+
742 * 63 48 47 32 31 20 19 0
744 * 82599+ Advanced Receive Descriptor (Read) Format
746 * +-----------------------------------------------------+
747 * 0 | Packet Buffer Address [63:1] |A0/NSE|
748 * +----------------------------------------------+------+
749 * 8 | Header Buffer Address [63:1] | DD |
750 * +-----------------------------------------------------+
753 * 82599+ Advanced Receive Descriptor (Write-Back) Format
755 * 63 48 47 32 31 30 21 20 17 16 4 3 0
756 * +------------------------------------------------------+
757 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
758 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
759 * |/ Flow Dir Flt ID | | | | | |
760 * +------------------------------------------------------+
761 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
762 * +------------------------------------------------------+
763 * 63 48 47 32 31 20 19 0
766 for (n = 0; n < adapter->num_rx_queues; n++) {
767 rx_ring = adapter->rx_ring[n];
768 pr_info("------------------------------------\n");
769 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
770 pr_info("------------------------------------\n");
772 "R [desc] [ PktBuf A0] ",
773 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
774 "<-- Adv Rx Read format\n");
776 "RWB[desc] [PcsmIpSHl PtRs] ",
777 "[vl er S cks ln] ---------------- [bi->skb ] ",
778 "<-- Adv Rx Write-Back format\n");
780 for (i = 0; i < rx_ring->count; i++) {
781 rx_buffer_info = &rx_ring->rx_buffer_info[i];
782 rx_desc = IXGBE_RX_DESC(rx_ring, i);
783 u0 = (struct my_u0 *)rx_desc;
784 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
785 if (staterr & IXGBE_RXD_STAT_DD) {
786 /* Descriptor Done */
787 pr_info("RWB[0x%03X] %016llX "
788 "%016llX ---------------- %p", i,
791 rx_buffer_info->skb);
793 pr_info("R [0x%03X] %016llX "
794 "%016llX %016llX %p", i,
797 (u64)rx_buffer_info->dma,
798 rx_buffer_info->skb);
800 if (netif_msg_pktdata(adapter) &&
801 rx_buffer_info->dma) {
802 print_hex_dump(KERN_INFO, "",
803 DUMP_PREFIX_ADDRESS, 16, 1,
804 page_address(rx_buffer_info->page) +
805 rx_buffer_info->page_offset,
806 ixgbe_rx_bufsz(rx_ring), true);
810 if (i == rx_ring->next_to_use)
812 else if (i == rx_ring->next_to_clean)
821 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
825 /* Let firmware take over control of h/w */
826 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
827 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
828 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
831 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
835 /* Let firmware know the driver has taken over */
836 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
837 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
838 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
842 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
843 * @adapter: pointer to adapter struct
844 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
845 * @queue: queue to map the corresponding interrupt to
846 * @msix_vector: the vector to map to the corresponding queue
849 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
850 u8 queue, u8 msix_vector)
853 struct ixgbe_hw *hw = &adapter->hw;
854 switch (hw->mac.type) {
855 case ixgbe_mac_82598EB:
856 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
859 index = (((direction * 64) + queue) >> 2) & 0x1F;
860 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
861 ivar &= ~(0xFF << (8 * (queue & 0x3)));
862 ivar |= (msix_vector << (8 * (queue & 0x3)));
863 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
865 case ixgbe_mac_82599EB:
868 case ixgbe_mac_X550EM_x:
869 if (direction == -1) {
871 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
872 index = ((queue & 1) * 8);
873 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
874 ivar &= ~(0xFF << index);
875 ivar |= (msix_vector << index);
876 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
879 /* tx or rx causes */
880 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
881 index = ((16 * (queue & 1)) + (8 * direction));
882 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
883 ivar &= ~(0xFF << index);
884 ivar |= (msix_vector << index);
885 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
893 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
898 switch (adapter->hw.mac.type) {
899 case ixgbe_mac_82598EB:
900 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
901 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
903 case ixgbe_mac_82599EB:
906 case ixgbe_mac_X550EM_x:
907 mask = (qmask & 0xFFFFFFFF);
908 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
909 mask = (qmask >> 32);
910 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
917 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
918 struct ixgbe_tx_buffer *tx_buffer)
920 if (tx_buffer->skb) {
921 dev_kfree_skb_any(tx_buffer->skb);
922 if (dma_unmap_len(tx_buffer, len))
923 dma_unmap_single(ring->dev,
924 dma_unmap_addr(tx_buffer, dma),
925 dma_unmap_len(tx_buffer, len),
927 } else if (dma_unmap_len(tx_buffer, len)) {
928 dma_unmap_page(ring->dev,
929 dma_unmap_addr(tx_buffer, dma),
930 dma_unmap_len(tx_buffer, len),
933 tx_buffer->next_to_watch = NULL;
934 tx_buffer->skb = NULL;
935 dma_unmap_len_set(tx_buffer, len, 0);
936 /* tx_buffer must be completely set up in the transmit path */
939 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
941 struct ixgbe_hw *hw = &adapter->hw;
942 struct ixgbe_hw_stats *hwstats = &adapter->stats;
946 if ((hw->fc.current_mode != ixgbe_fc_full) &&
947 (hw->fc.current_mode != ixgbe_fc_rx_pause))
950 switch (hw->mac.type) {
951 case ixgbe_mac_82598EB:
952 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
955 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
957 hwstats->lxoffrxc += data;
959 /* refill credits (no tx hang) if we received xoff */
963 for (i = 0; i < adapter->num_tx_queues; i++)
964 clear_bit(__IXGBE_HANG_CHECK_ARMED,
965 &adapter->tx_ring[i]->state);
968 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
970 struct ixgbe_hw *hw = &adapter->hw;
971 struct ixgbe_hw_stats *hwstats = &adapter->stats;
975 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
977 if (adapter->ixgbe_ieee_pfc)
978 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
980 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
981 ixgbe_update_xoff_rx_lfc(adapter);
985 /* update stats for each tc, only valid with PFC enabled */
986 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
989 switch (hw->mac.type) {
990 case ixgbe_mac_82598EB:
991 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
994 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
996 hwstats->pxoffrxc[i] += pxoffrxc;
997 /* Get the TC for given UP */
998 tc = netdev_get_prio_tc_map(adapter->netdev, i);
999 xoff[tc] += pxoffrxc;
1002 /* disarm tx queues that have received xoff frames */
1003 for (i = 0; i < adapter->num_tx_queues; i++) {
1004 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1006 tc = tx_ring->dcb_tc;
1008 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1012 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1014 return ring->stats.packets;
1017 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1019 struct ixgbe_adapter *adapter;
1020 struct ixgbe_hw *hw;
1023 if (ring->l2_accel_priv)
1024 adapter = ring->l2_accel_priv->real_adapter;
1026 adapter = netdev_priv(ring->netdev);
1029 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1030 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1033 return (head < tail) ?
1034 tail - head : (tail + ring->count - head);
1039 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1041 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1042 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1043 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1045 clear_check_for_tx_hang(tx_ring);
1048 * Check for a hung queue, but be thorough. This verifies
1049 * that a transmit has been completed since the previous
1050 * check AND there is at least one packet pending. The
1051 * ARMED bit is set to indicate a potential hang. The
1052 * bit is cleared if a pause frame is received to remove
1053 * false hang detection due to PFC or 802.3x frames. By
1054 * requiring this to fail twice we avoid races with
1055 * pfc clearing the ARMED bit and conditions where we
1056 * run the check_tx_hang logic with a transmit completion
1057 * pending but without time to complete it yet.
1059 if (tx_done_old == tx_done && tx_pending)
1060 /* make sure it is true for two checks in a row */
1061 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1063 /* update completed stats and continue */
1064 tx_ring->tx_stats.tx_done_old = tx_done;
1065 /* reset the countdown */
1066 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1072 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1073 * @adapter: driver private struct
1075 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1078 /* Do the reset outside of interrupt context */
1079 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1080 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1081 e_warn(drv, "initiating reset due to tx timeout\n");
1082 ixgbe_service_event_schedule(adapter);
1087 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1088 * @q_vector: structure containing interrupt and ring information
1089 * @tx_ring: tx ring to clean
1091 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1092 struct ixgbe_ring *tx_ring)
1094 struct ixgbe_adapter *adapter = q_vector->adapter;
1095 struct ixgbe_tx_buffer *tx_buffer;
1096 union ixgbe_adv_tx_desc *tx_desc;
1097 unsigned int total_bytes = 0, total_packets = 0;
1098 unsigned int budget = q_vector->tx.work_limit;
1099 unsigned int i = tx_ring->next_to_clean;
1101 if (test_bit(__IXGBE_DOWN, &adapter->state))
1104 tx_buffer = &tx_ring->tx_buffer_info[i];
1105 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1106 i -= tx_ring->count;
1109 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1111 /* if next_to_watch is not set then there is no work pending */
1115 /* prevent any other reads prior to eop_desc */
1116 read_barrier_depends();
1118 /* if DD is not set pending work has not been completed */
1119 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1122 /* clear next_to_watch to prevent false hangs */
1123 tx_buffer->next_to_watch = NULL;
1125 /* update the statistics for this packet */
1126 total_bytes += tx_buffer->bytecount;
1127 total_packets += tx_buffer->gso_segs;
1130 dev_consume_skb_any(tx_buffer->skb);
1132 /* unmap skb header data */
1133 dma_unmap_single(tx_ring->dev,
1134 dma_unmap_addr(tx_buffer, dma),
1135 dma_unmap_len(tx_buffer, len),
1138 /* clear tx_buffer data */
1139 tx_buffer->skb = NULL;
1140 dma_unmap_len_set(tx_buffer, len, 0);
1142 /* unmap remaining buffers */
1143 while (tx_desc != eop_desc) {
1148 i -= tx_ring->count;
1149 tx_buffer = tx_ring->tx_buffer_info;
1150 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1153 /* unmap any remaining paged data */
1154 if (dma_unmap_len(tx_buffer, len)) {
1155 dma_unmap_page(tx_ring->dev,
1156 dma_unmap_addr(tx_buffer, dma),
1157 dma_unmap_len(tx_buffer, len),
1159 dma_unmap_len_set(tx_buffer, len, 0);
1163 /* move us one more past the eop_desc for start of next pkt */
1168 i -= tx_ring->count;
1169 tx_buffer = tx_ring->tx_buffer_info;
1170 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1173 /* issue prefetch for next Tx descriptor */
1176 /* update budget accounting */
1178 } while (likely(budget));
1180 i += tx_ring->count;
1181 tx_ring->next_to_clean = i;
1182 u64_stats_update_begin(&tx_ring->syncp);
1183 tx_ring->stats.bytes += total_bytes;
1184 tx_ring->stats.packets += total_packets;
1185 u64_stats_update_end(&tx_ring->syncp);
1186 q_vector->tx.total_bytes += total_bytes;
1187 q_vector->tx.total_packets += total_packets;
1189 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1190 /* schedule immediate reset if we believe we hung */
1191 struct ixgbe_hw *hw = &adapter->hw;
1192 e_err(drv, "Detected Tx Unit Hang\n"
1194 " TDH, TDT <%x>, <%x>\n"
1195 " next_to_use <%x>\n"
1196 " next_to_clean <%x>\n"
1197 "tx_buffer_info[next_to_clean]\n"
1198 " time_stamp <%lx>\n"
1200 tx_ring->queue_index,
1201 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1202 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1203 tx_ring->next_to_use, i,
1204 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1206 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1209 "tx hang %d detected on queue %d, resetting adapter\n",
1210 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1212 /* schedule immediate reset if we believe we hung */
1213 ixgbe_tx_timeout_reset(adapter);
1215 /* the adapter is about to reset, no point in enabling stuff */
1219 netdev_tx_completed_queue(txring_txq(tx_ring),
1220 total_packets, total_bytes);
1222 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1223 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1224 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1225 /* Make sure that anybody stopping the queue after this
1226 * sees the new next_to_clean.
1229 if (__netif_subqueue_stopped(tx_ring->netdev,
1230 tx_ring->queue_index)
1231 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1232 netif_wake_subqueue(tx_ring->netdev,
1233 tx_ring->queue_index);
1234 ++tx_ring->tx_stats.restart_queue;
1241 #ifdef CONFIG_IXGBE_DCA
1242 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1243 struct ixgbe_ring *tx_ring,
1246 struct ixgbe_hw *hw = &adapter->hw;
1250 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1251 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1253 switch (hw->mac.type) {
1254 case ixgbe_mac_82598EB:
1255 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1257 case ixgbe_mac_82599EB:
1258 case ixgbe_mac_X540:
1259 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1260 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1263 /* for unknown hardware do not write register */
1268 * We can enable relaxed ordering for reads, but not writes when
1269 * DCA is enabled. This is due to a known issue in some chipsets
1270 * which will cause the DCA tag to be cleared.
1272 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1273 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1274 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1276 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1279 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1280 struct ixgbe_ring *rx_ring,
1283 struct ixgbe_hw *hw = &adapter->hw;
1285 u8 reg_idx = rx_ring->reg_idx;
1287 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1288 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1290 switch (hw->mac.type) {
1291 case ixgbe_mac_82599EB:
1292 case ixgbe_mac_X540:
1293 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1300 * We can enable relaxed ordering for reads, but not writes when
1301 * DCA is enabled. This is due to a known issue in some chipsets
1302 * which will cause the DCA tag to be cleared.
1304 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1305 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1306 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1308 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1311 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1313 struct ixgbe_adapter *adapter = q_vector->adapter;
1314 struct ixgbe_ring *ring;
1315 int cpu = get_cpu();
1317 if (q_vector->cpu == cpu)
1320 ixgbe_for_each_ring(ring, q_vector->tx)
1321 ixgbe_update_tx_dca(adapter, ring, cpu);
1323 ixgbe_for_each_ring(ring, q_vector->rx)
1324 ixgbe_update_rx_dca(adapter, ring, cpu);
1326 q_vector->cpu = cpu;
1331 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1335 /* always use CB2 mode, difference is masked in the CB driver */
1336 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1337 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1338 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1340 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1341 IXGBE_DCA_CTRL_DCA_DISABLE);
1343 for (i = 0; i < adapter->num_q_vectors; i++) {
1344 adapter->q_vector[i]->cpu = -1;
1345 ixgbe_update_dca(adapter->q_vector[i]);
1349 static int __ixgbe_notify_dca(struct device *dev, void *data)
1351 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1352 unsigned long event = *(unsigned long *)data;
1354 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1358 case DCA_PROVIDER_ADD:
1359 /* if we're already enabled, don't do it again */
1360 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1362 if (dca_add_requester(dev) == 0) {
1363 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1364 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1365 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1368 /* Fall Through since DCA is disabled. */
1369 case DCA_PROVIDER_REMOVE:
1370 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1371 dca_remove_requester(dev);
1372 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1373 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1374 IXGBE_DCA_CTRL_DCA_DISABLE);
1382 #endif /* CONFIG_IXGBE_DCA */
1384 #define IXGBE_RSS_L4_TYPES_MASK \
1385 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1386 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1387 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1388 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1390 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1391 union ixgbe_adv_rx_desc *rx_desc,
1392 struct sk_buff *skb)
1396 if (!(ring->netdev->features & NETIF_F_RXHASH))
1399 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1400 IXGBE_RXDADV_RSSTYPE_MASK;
1405 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1406 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1407 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1412 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1413 * @ring: structure containing ring specific data
1414 * @rx_desc: advanced rx descriptor
1416 * Returns : true if it is FCoE pkt
1418 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1419 union ixgbe_adv_rx_desc *rx_desc)
1421 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1423 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1424 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1425 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1426 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1429 #endif /* IXGBE_FCOE */
1431 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1432 * @ring: structure containing ring specific data
1433 * @rx_desc: current Rx descriptor being processed
1434 * @skb: skb currently being received and modified
1436 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1437 union ixgbe_adv_rx_desc *rx_desc,
1438 struct sk_buff *skb)
1440 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1441 __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1442 bool encap_pkt = false;
1444 skb_checksum_none_assert(skb);
1446 /* Rx csum disabled */
1447 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1450 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1451 (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1453 skb->encapsulation = 1;
1456 /* if IP and error */
1457 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1458 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1459 ring->rx_stats.csum_err++;
1463 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1466 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1468 * 82599 errata, UDP frames with a 0 checksum can be marked as
1471 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1472 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1475 ring->rx_stats.csum_err++;
1479 /* It must be a TCP or UDP packet with a valid checksum */
1480 skb->ip_summed = CHECKSUM_UNNECESSARY;
1482 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1485 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1486 skb->ip_summed = CHECKSUM_NONE;
1489 /* If we checked the outer header let the stack know */
1490 skb->csum_level = 1;
1494 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1495 struct ixgbe_rx_buffer *bi)
1497 struct page *page = bi->page;
1500 /* since we are recycling buffers we should seldom need to alloc */
1504 /* alloc new page for storage */
1505 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1506 if (unlikely(!page)) {
1507 rx_ring->rx_stats.alloc_rx_page_failed++;
1511 /* map page for use */
1512 dma = dma_map_page(rx_ring->dev, page, 0,
1513 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1516 * if mapping failed free memory back to system since
1517 * there isn't much point in holding memory we can't use
1519 if (dma_mapping_error(rx_ring->dev, dma)) {
1520 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1522 rx_ring->rx_stats.alloc_rx_page_failed++;
1528 bi->page_offset = 0;
1534 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1535 * @rx_ring: ring to place buffers on
1536 * @cleaned_count: number of buffers to replace
1538 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1540 union ixgbe_adv_rx_desc *rx_desc;
1541 struct ixgbe_rx_buffer *bi;
1542 u16 i = rx_ring->next_to_use;
1548 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1549 bi = &rx_ring->rx_buffer_info[i];
1550 i -= rx_ring->count;
1553 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1557 * Refresh the desc even if buffer_addrs didn't change
1558 * because each write-back erases this info.
1560 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1566 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1567 bi = rx_ring->rx_buffer_info;
1568 i -= rx_ring->count;
1571 /* clear the status bits for the next_to_use descriptor */
1572 rx_desc->wb.upper.status_error = 0;
1575 } while (cleaned_count);
1577 i += rx_ring->count;
1579 if (rx_ring->next_to_use != i) {
1580 rx_ring->next_to_use = i;
1582 /* update next to alloc since we have filled the ring */
1583 rx_ring->next_to_alloc = i;
1585 /* Force memory writes to complete before letting h/w
1586 * know there are new descriptors to fetch. (Only
1587 * applicable for weak-ordered memory model archs,
1591 writel(i, rx_ring->tail);
1595 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1596 struct sk_buff *skb)
1598 u16 hdr_len = skb_headlen(skb);
1600 /* set gso_size to avoid messing up TCP MSS */
1601 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1602 IXGBE_CB(skb)->append_cnt);
1603 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1606 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1607 struct sk_buff *skb)
1609 /* if append_cnt is 0 then frame is not RSC */
1610 if (!IXGBE_CB(skb)->append_cnt)
1613 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1614 rx_ring->rx_stats.rsc_flush++;
1616 ixgbe_set_rsc_gso_size(rx_ring, skb);
1618 /* gso_size is computed using append_cnt so always clear it last */
1619 IXGBE_CB(skb)->append_cnt = 0;
1623 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1624 * @rx_ring: rx descriptor ring packet is being transacted on
1625 * @rx_desc: pointer to the EOP Rx descriptor
1626 * @skb: pointer to current skb being populated
1628 * This function checks the ring, descriptor, and packet information in
1629 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1630 * other fields within the skb.
1632 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1633 union ixgbe_adv_rx_desc *rx_desc,
1634 struct sk_buff *skb)
1636 struct net_device *dev = rx_ring->netdev;
1637 u32 flags = rx_ring->q_vector->adapter->flags;
1639 ixgbe_update_rsc_stats(rx_ring, skb);
1641 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1643 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1645 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1646 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1648 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1649 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1650 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1651 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1654 skb_record_rx_queue(skb, rx_ring->queue_index);
1656 skb->protocol = eth_type_trans(skb, dev);
1659 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1660 struct sk_buff *skb)
1662 skb_mark_napi_id(skb, &q_vector->napi);
1663 if (ixgbe_qv_busy_polling(q_vector))
1664 netif_receive_skb(skb);
1666 napi_gro_receive(&q_vector->napi, skb);
1670 * ixgbe_is_non_eop - process handling of non-EOP buffers
1671 * @rx_ring: Rx ring being processed
1672 * @rx_desc: Rx descriptor for current buffer
1673 * @skb: Current socket buffer containing buffer in progress
1675 * This function updates next to clean. If the buffer is an EOP buffer
1676 * this function exits returning false, otherwise it will place the
1677 * sk_buff in the next buffer to be chained and return true indicating
1678 * that this is in fact a non-EOP buffer.
1680 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1681 union ixgbe_adv_rx_desc *rx_desc,
1682 struct sk_buff *skb)
1684 u32 ntc = rx_ring->next_to_clean + 1;
1686 /* fetch, update, and store next to clean */
1687 ntc = (ntc < rx_ring->count) ? ntc : 0;
1688 rx_ring->next_to_clean = ntc;
1690 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1692 /* update RSC append count if present */
1693 if (ring_is_rsc_enabled(rx_ring)) {
1694 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1695 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1697 if (unlikely(rsc_enabled)) {
1698 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1700 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1701 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1703 /* update ntc based on RSC value */
1704 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1705 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1706 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1710 /* if we are the last buffer then there is nothing else to do */
1711 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1714 /* place skb in next buffer to be received */
1715 rx_ring->rx_buffer_info[ntc].skb = skb;
1716 rx_ring->rx_stats.non_eop_descs++;
1722 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1723 * @rx_ring: rx descriptor ring packet is being transacted on
1724 * @skb: pointer to current skb being adjusted
1726 * This function is an ixgbe specific version of __pskb_pull_tail. The
1727 * main difference between this version and the original function is that
1728 * this function can make several assumptions about the state of things
1729 * that allow for significant optimizations versus the standard function.
1730 * As a result we can do things like drop a frag and maintain an accurate
1731 * truesize for the skb.
1733 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1734 struct sk_buff *skb)
1736 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1738 unsigned int pull_len;
1741 * it is valid to use page_address instead of kmap since we are
1742 * working with pages allocated out of the lomem pool per
1743 * alloc_page(GFP_ATOMIC)
1745 va = skb_frag_address(frag);
1748 * we need the header to contain the greater of either ETH_HLEN or
1749 * 60 bytes if the skb->len is less than 60 for skb_pad.
1751 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1753 /* align pull length to size of long to optimize memcpy performance */
1754 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1756 /* update all of the pointers */
1757 skb_frag_size_sub(frag, pull_len);
1758 frag->page_offset += pull_len;
1759 skb->data_len -= pull_len;
1760 skb->tail += pull_len;
1764 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1765 * @rx_ring: rx descriptor ring packet is being transacted on
1766 * @skb: pointer to current skb being updated
1768 * This function provides a basic DMA sync up for the first fragment of an
1769 * skb. The reason for doing this is that the first fragment cannot be
1770 * unmapped until we have reached the end of packet descriptor for a buffer
1773 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1774 struct sk_buff *skb)
1776 /* if the page was released unmap it, else just sync our portion */
1777 if (unlikely(IXGBE_CB(skb)->page_released)) {
1778 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1779 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1780 IXGBE_CB(skb)->page_released = false;
1782 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1784 dma_sync_single_range_for_cpu(rx_ring->dev,
1787 ixgbe_rx_bufsz(rx_ring),
1790 IXGBE_CB(skb)->dma = 0;
1794 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1795 * @rx_ring: rx descriptor ring packet is being transacted on
1796 * @rx_desc: pointer to the EOP Rx descriptor
1797 * @skb: pointer to current skb being fixed
1799 * Check for corrupted packet headers caused by senders on the local L2
1800 * embedded NIC switch not setting up their Tx Descriptors right. These
1801 * should be very rare.
1803 * Also address the case where we are pulling data in on pages only
1804 * and as such no data is present in the skb header.
1806 * In addition if skb is not at least 60 bytes we need to pad it so that
1807 * it is large enough to qualify as a valid Ethernet frame.
1809 * Returns true if an error was encountered and skb was freed.
1811 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1812 union ixgbe_adv_rx_desc *rx_desc,
1813 struct sk_buff *skb)
1815 struct net_device *netdev = rx_ring->netdev;
1817 /* verify that the packet does not have any known errors */
1818 if (unlikely(ixgbe_test_staterr(rx_desc,
1819 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1820 !(netdev->features & NETIF_F_RXALL))) {
1821 dev_kfree_skb_any(skb);
1825 /* place header in linear portion of buffer */
1826 if (skb_is_nonlinear(skb))
1827 ixgbe_pull_tail(rx_ring, skb);
1830 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1831 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1835 /* if eth_skb_pad returns an error the skb was freed */
1836 if (eth_skb_pad(skb))
1843 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1844 * @rx_ring: rx descriptor ring to store buffers on
1845 * @old_buff: donor buffer to have page reused
1847 * Synchronizes page for reuse by the adapter
1849 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1850 struct ixgbe_rx_buffer *old_buff)
1852 struct ixgbe_rx_buffer *new_buff;
1853 u16 nta = rx_ring->next_to_alloc;
1855 new_buff = &rx_ring->rx_buffer_info[nta];
1857 /* update, and store next to alloc */
1859 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1861 /* transfer page from old buffer to new buffer */
1862 *new_buff = *old_buff;
1864 /* sync the buffer for use by the device */
1865 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1866 new_buff->page_offset,
1867 ixgbe_rx_bufsz(rx_ring),
1871 static inline bool ixgbe_page_is_reserved(struct page *page)
1873 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1877 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1878 * @rx_ring: rx descriptor ring to transact packets on
1879 * @rx_buffer: buffer containing page to add
1880 * @rx_desc: descriptor containing length of buffer written by hardware
1881 * @skb: sk_buff to place the data into
1883 * This function will add the data contained in rx_buffer->page to the skb.
1884 * This is done either through a direct copy if the data in the buffer is
1885 * less than the skb header size, otherwise it will just attach the page as
1886 * a frag to the skb.
1888 * The function will then update the page offset if necessary and return
1889 * true if the buffer can be reused by the adapter.
1891 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1892 struct ixgbe_rx_buffer *rx_buffer,
1893 union ixgbe_adv_rx_desc *rx_desc,
1894 struct sk_buff *skb)
1896 struct page *page = rx_buffer->page;
1897 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1898 #if (PAGE_SIZE < 8192)
1899 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1901 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1902 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1903 ixgbe_rx_bufsz(rx_ring);
1906 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1907 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1909 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1911 /* page is not reserved, we can reuse buffer as-is */
1912 if (likely(!ixgbe_page_is_reserved(page)))
1915 /* this page cannot be reused so discard it */
1916 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1920 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1921 rx_buffer->page_offset, size, truesize);
1923 /* avoid re-using remote pages */
1924 if (unlikely(ixgbe_page_is_reserved(page)))
1927 #if (PAGE_SIZE < 8192)
1928 /* if we are only owner of page we can reuse it */
1929 if (unlikely(page_count(page) != 1))
1932 /* flip page offset to other buffer */
1933 rx_buffer->page_offset ^= truesize;
1935 /* move offset up to the next cache line */
1936 rx_buffer->page_offset += truesize;
1938 if (rx_buffer->page_offset > last_offset)
1942 /* Even if we own the page, we are not allowed to use atomic_set()
1943 * This would break get_page_unless_zero() users.
1950 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1951 union ixgbe_adv_rx_desc *rx_desc)
1953 struct ixgbe_rx_buffer *rx_buffer;
1954 struct sk_buff *skb;
1957 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1958 page = rx_buffer->page;
1961 skb = rx_buffer->skb;
1964 void *page_addr = page_address(page) +
1965 rx_buffer->page_offset;
1967 /* prefetch first cache line of first page */
1968 prefetch(page_addr);
1969 #if L1_CACHE_BYTES < 128
1970 prefetch(page_addr + L1_CACHE_BYTES);
1973 /* allocate a skb to store the frags */
1974 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1976 if (unlikely(!skb)) {
1977 rx_ring->rx_stats.alloc_rx_buff_failed++;
1982 * we will be copying header into skb->data in
1983 * pskb_may_pull so it is in our interest to prefetch
1984 * it now to avoid a possible cache miss
1986 prefetchw(skb->data);
1989 * Delay unmapping of the first packet. It carries the
1990 * header information, HW may still access the header
1991 * after the writeback. Only unmap it when EOP is
1994 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1997 IXGBE_CB(skb)->dma = rx_buffer->dma;
1999 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2000 ixgbe_dma_sync_frag(rx_ring, skb);
2003 /* we are reusing so sync this buffer for CPU use */
2004 dma_sync_single_range_for_cpu(rx_ring->dev,
2006 rx_buffer->page_offset,
2007 ixgbe_rx_bufsz(rx_ring),
2010 rx_buffer->skb = NULL;
2013 /* pull page into skb */
2014 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2015 /* hand second half of page back to the ring */
2016 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2017 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2018 /* the page has been released from the ring */
2019 IXGBE_CB(skb)->page_released = true;
2021 /* we are not reusing the buffer so unmap it */
2022 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2023 ixgbe_rx_pg_size(rx_ring),
2027 /* clear contents of buffer_info */
2028 rx_buffer->page = NULL;
2034 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2035 * @q_vector: structure containing interrupt and ring information
2036 * @rx_ring: rx descriptor ring to transact packets on
2037 * @budget: Total limit on number of packets to process
2039 * This function provides a "bounce buffer" approach to Rx interrupt
2040 * processing. The advantage to this is that on systems that have
2041 * expensive overhead for IOMMU access this provides a means of avoiding
2042 * it by maintaining the mapping of the page to the syste.
2044 * Returns amount of work completed
2046 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2047 struct ixgbe_ring *rx_ring,
2050 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2052 struct ixgbe_adapter *adapter = q_vector->adapter;
2054 unsigned int mss = 0;
2055 #endif /* IXGBE_FCOE */
2056 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2058 while (likely(total_rx_packets < budget)) {
2059 union ixgbe_adv_rx_desc *rx_desc;
2060 struct sk_buff *skb;
2062 /* return some buffers to hardware, one at a time is too slow */
2063 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2064 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2068 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2070 if (!rx_desc->wb.upper.status_error)
2073 /* This memory barrier is needed to keep us from reading
2074 * any other fields out of the rx_desc until we know the
2075 * descriptor has been written back
2079 /* retrieve a buffer from the ring */
2080 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2082 /* exit if we failed to retrieve a buffer */
2088 /* place incomplete frames back on ring for completion */
2089 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2092 /* verify the packet layout is correct */
2093 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2096 /* probably a little skewed due to removing CRC */
2097 total_rx_bytes += skb->len;
2099 /* populate checksum, timestamp, VLAN, and protocol */
2100 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2103 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2104 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2105 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2106 /* include DDPed FCoE data */
2107 if (ddp_bytes > 0) {
2109 mss = rx_ring->netdev->mtu -
2110 sizeof(struct fcoe_hdr) -
2111 sizeof(struct fc_frame_header) -
2112 sizeof(struct fcoe_crc_eof);
2116 total_rx_bytes += ddp_bytes;
2117 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2121 dev_kfree_skb_any(skb);
2126 #endif /* IXGBE_FCOE */
2127 ixgbe_rx_skb(q_vector, skb);
2129 /* update budget accounting */
2133 u64_stats_update_begin(&rx_ring->syncp);
2134 rx_ring->stats.packets += total_rx_packets;
2135 rx_ring->stats.bytes += total_rx_bytes;
2136 u64_stats_update_end(&rx_ring->syncp);
2137 q_vector->rx.total_packets += total_rx_packets;
2138 q_vector->rx.total_bytes += total_rx_bytes;
2140 return total_rx_packets;
2143 #ifdef CONFIG_NET_RX_BUSY_POLL
2144 /* must be called with local_bh_disable()d */
2145 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2147 struct ixgbe_q_vector *q_vector =
2148 container_of(napi, struct ixgbe_q_vector, napi);
2149 struct ixgbe_adapter *adapter = q_vector->adapter;
2150 struct ixgbe_ring *ring;
2153 if (test_bit(__IXGBE_DOWN, &adapter->state))
2154 return LL_FLUSH_FAILED;
2156 if (!ixgbe_qv_lock_poll(q_vector))
2157 return LL_FLUSH_BUSY;
2159 ixgbe_for_each_ring(ring, q_vector->rx) {
2160 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2161 #ifdef BP_EXTENDED_STATS
2163 ring->stats.cleaned += found;
2165 ring->stats.misses++;
2171 ixgbe_qv_unlock_poll(q_vector);
2175 #endif /* CONFIG_NET_RX_BUSY_POLL */
2178 * ixgbe_configure_msix - Configure MSI-X hardware
2179 * @adapter: board private structure
2181 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2184 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2186 struct ixgbe_q_vector *q_vector;
2190 /* Populate MSIX to EITR Select */
2191 if (adapter->num_vfs > 32) {
2192 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2193 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2197 * Populate the IVAR table and set the ITR values to the
2198 * corresponding register.
2200 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2201 struct ixgbe_ring *ring;
2202 q_vector = adapter->q_vector[v_idx];
2204 ixgbe_for_each_ring(ring, q_vector->rx)
2205 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2207 ixgbe_for_each_ring(ring, q_vector->tx)
2208 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2210 ixgbe_write_eitr(q_vector);
2213 switch (adapter->hw.mac.type) {
2214 case ixgbe_mac_82598EB:
2215 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2218 case ixgbe_mac_82599EB:
2219 case ixgbe_mac_X540:
2220 case ixgbe_mac_X550:
2221 case ixgbe_mac_X550EM_x:
2222 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2227 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2229 /* set up to autoclear timer, and the vectors */
2230 mask = IXGBE_EIMS_ENABLE_MASK;
2231 mask &= ~(IXGBE_EIMS_OTHER |
2232 IXGBE_EIMS_MAILBOX |
2235 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2238 enum latency_range {
2242 latency_invalid = 255
2246 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2247 * @q_vector: structure containing interrupt and ring information
2248 * @ring_container: structure containing ring performance data
2250 * Stores a new ITR value based on packets and byte
2251 * counts during the last interrupt. The advantage of per interrupt
2252 * computation is faster updates and more accurate ITR for the current
2253 * traffic pattern. Constants in this function were computed
2254 * based on theoretical maximum wire speed and thresholds were set based
2255 * on testing data as well as attempting to minimize response time
2256 * while increasing bulk throughput.
2257 * this functionality is controlled by the InterruptThrottleRate module
2258 * parameter (see ixgbe_param.c)
2260 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2261 struct ixgbe_ring_container *ring_container)
2263 int bytes = ring_container->total_bytes;
2264 int packets = ring_container->total_packets;
2267 u8 itr_setting = ring_container->itr;
2272 /* simple throttlerate management
2273 * 0-10MB/s lowest (100000 ints/s)
2274 * 10-20MB/s low (20000 ints/s)
2275 * 20-1249MB/s bulk (12000 ints/s)
2277 /* what was last interrupt timeslice? */
2278 timepassed_us = q_vector->itr >> 2;
2279 if (timepassed_us == 0)
2282 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2284 switch (itr_setting) {
2285 case lowest_latency:
2286 if (bytes_perint > 10)
2287 itr_setting = low_latency;
2290 if (bytes_perint > 20)
2291 itr_setting = bulk_latency;
2292 else if (bytes_perint <= 10)
2293 itr_setting = lowest_latency;
2296 if (bytes_perint <= 20)
2297 itr_setting = low_latency;
2301 /* clear work counters since we have the values we need */
2302 ring_container->total_bytes = 0;
2303 ring_container->total_packets = 0;
2305 /* write updated itr to ring container */
2306 ring_container->itr = itr_setting;
2310 * ixgbe_write_eitr - write EITR register in hardware specific way
2311 * @q_vector: structure containing interrupt and ring information
2313 * This function is made to be called by ethtool and by the driver
2314 * when it needs to update EITR registers at runtime. Hardware
2315 * specific quirks/differences are taken care of here.
2317 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2319 struct ixgbe_adapter *adapter = q_vector->adapter;
2320 struct ixgbe_hw *hw = &adapter->hw;
2321 int v_idx = q_vector->v_idx;
2322 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2324 switch (adapter->hw.mac.type) {
2325 case ixgbe_mac_82598EB:
2326 /* must write high and low 16 bits to reset counter */
2327 itr_reg |= (itr_reg << 16);
2329 case ixgbe_mac_82599EB:
2330 case ixgbe_mac_X540:
2331 case ixgbe_mac_X550:
2332 case ixgbe_mac_X550EM_x:
2334 * set the WDIS bit to not clear the timer bits and cause an
2335 * immediate assertion of the interrupt
2337 itr_reg |= IXGBE_EITR_CNT_WDIS;
2342 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2345 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2347 u32 new_itr = q_vector->itr;
2350 ixgbe_update_itr(q_vector, &q_vector->tx);
2351 ixgbe_update_itr(q_vector, &q_vector->rx);
2353 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2355 switch (current_itr) {
2356 /* counts and packets in update_itr are dependent on these numbers */
2357 case lowest_latency:
2358 new_itr = IXGBE_100K_ITR;
2361 new_itr = IXGBE_20K_ITR;
2364 new_itr = IXGBE_12K_ITR;
2370 if (new_itr != q_vector->itr) {
2371 /* do an exponential smoothing */
2372 new_itr = (10 * new_itr * q_vector->itr) /
2373 ((9 * new_itr) + q_vector->itr);
2375 /* save the algorithm value here */
2376 q_vector->itr = new_itr;
2378 ixgbe_write_eitr(q_vector);
2383 * ixgbe_check_overtemp_subtask - check for over temperature
2384 * @adapter: pointer to adapter
2386 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2388 struct ixgbe_hw *hw = &adapter->hw;
2389 u32 eicr = adapter->interrupt_event;
2391 if (test_bit(__IXGBE_DOWN, &adapter->state))
2394 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2395 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2398 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2400 switch (hw->device_id) {
2401 case IXGBE_DEV_ID_82599_T3_LOM:
2403 * Since the warning interrupt is for both ports
2404 * we don't have to check if:
2405 * - This interrupt wasn't for our port.
2406 * - We may have missed the interrupt so always have to
2407 * check if we got a LSC
2409 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2410 !(eicr & IXGBE_EICR_LSC))
2413 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2415 bool link_up = false;
2417 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2423 /* Check if this is not due to overtemp */
2424 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2429 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2431 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2435 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2437 adapter->interrupt_event = 0;
2440 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2442 struct ixgbe_hw *hw = &adapter->hw;
2444 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2445 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2446 e_crit(probe, "Fan has stopped, replace the adapter\n");
2447 /* write to clear the interrupt */
2448 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2452 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2454 struct ixgbe_hw *hw = &adapter->hw;
2456 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2459 switch (adapter->hw.mac.type) {
2460 case ixgbe_mac_82599EB:
2462 * Need to check link state so complete overtemp check
2465 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2466 (eicr & IXGBE_EICR_LSC)) &&
2467 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2468 adapter->interrupt_event = eicr;
2469 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2470 ixgbe_service_event_schedule(adapter);
2474 case ixgbe_mac_X540:
2475 if (!(eicr & IXGBE_EICR_TS))
2482 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2485 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2487 switch (hw->mac.type) {
2488 case ixgbe_mac_82598EB:
2489 if (hw->phy.type == ixgbe_phy_nl)
2492 case ixgbe_mac_82599EB:
2493 case ixgbe_mac_X550EM_x:
2494 switch (hw->mac.ops.get_media_type(hw)) {
2495 case ixgbe_media_type_fiber:
2496 case ixgbe_media_type_fiber_qsfp:
2506 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2508 struct ixgbe_hw *hw = &adapter->hw;
2509 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2511 if (!ixgbe_is_sfp(hw))
2514 /* Later MAC's use different SDP */
2515 if (hw->mac.type >= ixgbe_mac_X540)
2516 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2518 if (eicr & eicr_mask) {
2519 /* Clear the interrupt */
2520 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2521 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2522 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2523 adapter->sfp_poll_time = 0;
2524 ixgbe_service_event_schedule(adapter);
2528 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2529 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2530 /* Clear the interrupt */
2531 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2532 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2533 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2534 ixgbe_service_event_schedule(adapter);
2539 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2541 struct ixgbe_hw *hw = &adapter->hw;
2544 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2545 adapter->link_check_timeout = jiffies;
2546 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2547 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2548 IXGBE_WRITE_FLUSH(hw);
2549 ixgbe_service_event_schedule(adapter);
2553 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2557 struct ixgbe_hw *hw = &adapter->hw;
2559 switch (hw->mac.type) {
2560 case ixgbe_mac_82598EB:
2561 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2562 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2564 case ixgbe_mac_82599EB:
2565 case ixgbe_mac_X540:
2566 case ixgbe_mac_X550:
2567 case ixgbe_mac_X550EM_x:
2568 mask = (qmask & 0xFFFFFFFF);
2570 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2571 mask = (qmask >> 32);
2573 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2578 /* skip the flush */
2581 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2585 struct ixgbe_hw *hw = &adapter->hw;
2587 switch (hw->mac.type) {
2588 case ixgbe_mac_82598EB:
2589 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2590 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2592 case ixgbe_mac_82599EB:
2593 case ixgbe_mac_X540:
2594 case ixgbe_mac_X550:
2595 case ixgbe_mac_X550EM_x:
2596 mask = (qmask & 0xFFFFFFFF);
2598 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2599 mask = (qmask >> 32);
2601 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2606 /* skip the flush */
2610 * ixgbe_irq_enable - Enable default interrupt generation settings
2611 * @adapter: board private structure
2613 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2616 struct ixgbe_hw *hw = &adapter->hw;
2617 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2619 /* don't reenable LSC while waiting for link */
2620 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2621 mask &= ~IXGBE_EIMS_LSC;
2623 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2624 switch (adapter->hw.mac.type) {
2625 case ixgbe_mac_82599EB:
2626 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2628 case ixgbe_mac_X540:
2629 case ixgbe_mac_X550:
2630 case ixgbe_mac_X550EM_x:
2631 mask |= IXGBE_EIMS_TS;
2636 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2637 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2638 switch (adapter->hw.mac.type) {
2639 case ixgbe_mac_82599EB:
2640 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2641 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2643 case ixgbe_mac_X540:
2644 case ixgbe_mac_X550:
2645 case ixgbe_mac_X550EM_x:
2646 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2647 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2648 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2649 mask |= IXGBE_EICR_GPI_SDP0_X540;
2650 mask |= IXGBE_EIMS_ECC;
2651 mask |= IXGBE_EIMS_MAILBOX;
2657 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2658 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2659 mask |= IXGBE_EIMS_FLOW_DIR;
2661 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2663 ixgbe_irq_enable_queues(adapter, ~0);
2665 IXGBE_WRITE_FLUSH(&adapter->hw);
2668 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2670 struct ixgbe_adapter *adapter = data;
2671 struct ixgbe_hw *hw = &adapter->hw;
2675 * Workaround for Silicon errata. Use clear-by-write instead
2676 * of clear-by-read. Reading with EICS will return the
2677 * interrupt causes without clearing, which later be done
2678 * with the write to EICR.
2680 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2682 /* The lower 16bits of the EICR register are for the queue interrupts
2683 * which should be masked here in order to not accidentally clear them if
2684 * the bits are high when ixgbe_msix_other is called. There is a race
2685 * condition otherwise which results in possible performance loss
2686 * especially if the ixgbe_msix_other interrupt is triggering
2687 * consistently (as it would when PPS is turned on for the X540 device)
2691 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2693 if (eicr & IXGBE_EICR_LSC)
2694 ixgbe_check_lsc(adapter);
2696 if (eicr & IXGBE_EICR_MAILBOX)
2697 ixgbe_msg_task(adapter);
2699 switch (hw->mac.type) {
2700 case ixgbe_mac_82599EB:
2701 case ixgbe_mac_X540:
2702 case ixgbe_mac_X550:
2703 case ixgbe_mac_X550EM_x:
2704 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2705 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2706 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2707 ixgbe_service_event_schedule(adapter);
2708 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2709 IXGBE_EICR_GPI_SDP0_X540);
2711 if (eicr & IXGBE_EICR_ECC) {
2712 e_info(link, "Received ECC Err, initiating reset\n");
2713 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2714 ixgbe_service_event_schedule(adapter);
2715 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2717 /* Handle Flow Director Full threshold interrupt */
2718 if (eicr & IXGBE_EICR_FLOW_DIR) {
2719 int reinit_count = 0;
2721 for (i = 0; i < adapter->num_tx_queues; i++) {
2722 struct ixgbe_ring *ring = adapter->tx_ring[i];
2723 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2728 /* no more flow director interrupts until after init */
2729 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2730 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2731 ixgbe_service_event_schedule(adapter);
2734 ixgbe_check_sfp_event(adapter, eicr);
2735 ixgbe_check_overtemp_event(adapter, eicr);
2741 ixgbe_check_fan_failure(adapter, eicr);
2743 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2744 ixgbe_ptp_check_pps_event(adapter);
2746 /* re-enable the original interrupt state, no lsc, no queues */
2747 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2748 ixgbe_irq_enable(adapter, false, false);
2753 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2755 struct ixgbe_q_vector *q_vector = data;
2757 /* EIAM disabled interrupts (on this vector) for us */
2759 if (q_vector->rx.ring || q_vector->tx.ring)
2760 napi_schedule_irqoff(&q_vector->napi);
2766 * ixgbe_poll - NAPI Rx polling callback
2767 * @napi: structure for representing this polling device
2768 * @budget: how many packets driver is allowed to clean
2770 * This function is used for legacy and MSI, NAPI mode
2772 int ixgbe_poll(struct napi_struct *napi, int budget)
2774 struct ixgbe_q_vector *q_vector =
2775 container_of(napi, struct ixgbe_q_vector, napi);
2776 struct ixgbe_adapter *adapter = q_vector->adapter;
2777 struct ixgbe_ring *ring;
2778 int per_ring_budget, work_done = 0;
2779 bool clean_complete = true;
2781 #ifdef CONFIG_IXGBE_DCA
2782 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2783 ixgbe_update_dca(q_vector);
2786 ixgbe_for_each_ring(ring, q_vector->tx)
2787 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2789 /* Exit if we are called by netpoll or busy polling is active */
2790 if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2793 /* attempt to distribute budget to each queue fairly, but don't allow
2794 * the budget to go below 1 because we'll exit polling */
2795 if (q_vector->rx.count > 1)
2796 per_ring_budget = max(budget/q_vector->rx.count, 1);
2798 per_ring_budget = budget;
2800 ixgbe_for_each_ring(ring, q_vector->rx) {
2801 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2804 work_done += cleaned;
2805 clean_complete &= (cleaned < per_ring_budget);
2808 ixgbe_qv_unlock_napi(q_vector);
2809 /* If all work not completed, return budget and keep polling */
2810 if (!clean_complete)
2813 /* all work done, exit the polling mode */
2814 napi_complete_done(napi, work_done);
2815 if (adapter->rx_itr_setting & 1)
2816 ixgbe_set_itr(q_vector);
2817 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2818 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2824 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2825 * @adapter: board private structure
2827 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2828 * interrupts from the kernel.
2830 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2832 struct net_device *netdev = adapter->netdev;
2836 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2837 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2838 struct msix_entry *entry = &adapter->msix_entries[vector];
2840 if (q_vector->tx.ring && q_vector->rx.ring) {
2841 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2842 "%s-%s-%d", netdev->name, "TxRx", ri++);
2844 } else if (q_vector->rx.ring) {
2845 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2846 "%s-%s-%d", netdev->name, "rx", ri++);
2847 } else if (q_vector->tx.ring) {
2848 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2849 "%s-%s-%d", netdev->name, "tx", ti++);
2851 /* skip this unused q_vector */
2854 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2855 q_vector->name, q_vector);
2857 e_err(probe, "request_irq failed for MSIX interrupt "
2858 "Error: %d\n", err);
2859 goto free_queue_irqs;
2861 /* If Flow Director is enabled, set interrupt affinity */
2862 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2863 /* assign the mask for this irq */
2864 irq_set_affinity_hint(entry->vector,
2865 &q_vector->affinity_mask);
2869 err = request_irq(adapter->msix_entries[vector].vector,
2870 ixgbe_msix_other, 0, netdev->name, adapter);
2872 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2873 goto free_queue_irqs;
2881 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2883 free_irq(adapter->msix_entries[vector].vector,
2884 adapter->q_vector[vector]);
2886 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2887 pci_disable_msix(adapter->pdev);
2888 kfree(adapter->msix_entries);
2889 adapter->msix_entries = NULL;
2894 * ixgbe_intr - legacy mode Interrupt Handler
2895 * @irq: interrupt number
2896 * @data: pointer to a network interface device structure
2898 static irqreturn_t ixgbe_intr(int irq, void *data)
2900 struct ixgbe_adapter *adapter = data;
2901 struct ixgbe_hw *hw = &adapter->hw;
2902 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2906 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2907 * before the read of EICR.
2909 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2911 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2912 * therefore no explicit interrupt disable is necessary */
2913 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2916 * shared interrupt alert!
2917 * make sure interrupts are enabled because the read will
2918 * have disabled interrupts due to EIAM
2919 * finish the workaround of silicon errata on 82598. Unmask
2920 * the interrupt that we masked before the EICR read.
2922 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2923 ixgbe_irq_enable(adapter, true, true);
2924 return IRQ_NONE; /* Not our interrupt */
2927 if (eicr & IXGBE_EICR_LSC)
2928 ixgbe_check_lsc(adapter);
2930 switch (hw->mac.type) {
2931 case ixgbe_mac_82599EB:
2932 ixgbe_check_sfp_event(adapter, eicr);
2934 case ixgbe_mac_X540:
2935 case ixgbe_mac_X550:
2936 case ixgbe_mac_X550EM_x:
2937 if (eicr & IXGBE_EICR_ECC) {
2938 e_info(link, "Received ECC Err, initiating reset\n");
2939 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2940 ixgbe_service_event_schedule(adapter);
2941 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2943 ixgbe_check_overtemp_event(adapter, eicr);
2949 ixgbe_check_fan_failure(adapter, eicr);
2950 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2951 ixgbe_ptp_check_pps_event(adapter);
2953 /* would disable interrupts here but EIAM disabled it */
2954 napi_schedule_irqoff(&q_vector->napi);
2957 * re-enable link(maybe) and non-queue interrupts, no flush.
2958 * ixgbe_poll will re-enable the queue interrupts
2960 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2961 ixgbe_irq_enable(adapter, false, false);
2967 * ixgbe_request_irq - initialize interrupts
2968 * @adapter: board private structure
2970 * Attempts to configure interrupts using the best available
2971 * capabilities of the hardware and kernel.
2973 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2975 struct net_device *netdev = adapter->netdev;
2978 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2979 err = ixgbe_request_msix_irqs(adapter);
2980 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2981 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2982 netdev->name, adapter);
2984 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2985 netdev->name, adapter);
2988 e_err(probe, "request_irq failed, Error %d\n", err);
2993 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2997 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2998 free_irq(adapter->pdev->irq, adapter);
3002 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3003 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3004 struct msix_entry *entry = &adapter->msix_entries[vector];
3006 /* free only the irqs that were actually requested */
3007 if (!q_vector->rx.ring && !q_vector->tx.ring)
3010 /* clear the affinity_mask in the IRQ descriptor */
3011 irq_set_affinity_hint(entry->vector, NULL);
3013 free_irq(entry->vector, q_vector);
3016 free_irq(adapter->msix_entries[vector++].vector, adapter);
3020 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3021 * @adapter: board private structure
3023 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3025 switch (adapter->hw.mac.type) {
3026 case ixgbe_mac_82598EB:
3027 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3029 case ixgbe_mac_82599EB:
3030 case ixgbe_mac_X540:
3031 case ixgbe_mac_X550:
3032 case ixgbe_mac_X550EM_x:
3033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3034 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3035 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3040 IXGBE_WRITE_FLUSH(&adapter->hw);
3041 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3044 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3045 synchronize_irq(adapter->msix_entries[vector].vector);
3047 synchronize_irq(adapter->msix_entries[vector++].vector);
3049 synchronize_irq(adapter->pdev->irq);
3054 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3057 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3059 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3061 ixgbe_write_eitr(q_vector);
3063 ixgbe_set_ivar(adapter, 0, 0, 0);
3064 ixgbe_set_ivar(adapter, 1, 0, 0);
3066 e_info(hw, "Legacy interrupt IVAR setup done\n");
3070 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3071 * @adapter: board private structure
3072 * @ring: structure containing ring specific data
3074 * Configure the Tx descriptor ring after a reset.
3076 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3077 struct ixgbe_ring *ring)
3079 struct ixgbe_hw *hw = &adapter->hw;
3080 u64 tdba = ring->dma;
3082 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3083 u8 reg_idx = ring->reg_idx;
3085 /* disable queue to avoid issues while updating state */
3086 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3087 IXGBE_WRITE_FLUSH(hw);
3089 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3090 (tdba & DMA_BIT_MASK(32)));
3091 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3092 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3093 ring->count * sizeof(union ixgbe_adv_tx_desc));
3094 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3095 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3096 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3099 * set WTHRESH to encourage burst writeback, it should not be set
3100 * higher than 1 when:
3101 * - ITR is 0 as it could cause false TX hangs
3102 * - ITR is set to > 100k int/sec and BQL is enabled
3104 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3105 * to or less than the number of on chip descriptors, which is
3108 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3109 txdctl |= (1 << 16); /* WTHRESH = 1 */
3111 txdctl |= (8 << 16); /* WTHRESH = 8 */
3114 * Setting PTHRESH to 32 both improves performance
3115 * and avoids a TX hang with DFP enabled
3117 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3118 32; /* PTHRESH = 32 */
3120 /* reinitialize flowdirector state */
3121 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3122 ring->atr_sample_rate = adapter->atr_sample_rate;
3123 ring->atr_count = 0;
3124 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3126 ring->atr_sample_rate = 0;
3129 /* initialize XPS */
3130 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3131 struct ixgbe_q_vector *q_vector = ring->q_vector;
3134 netif_set_xps_queue(ring->netdev,
3135 &q_vector->affinity_mask,
3139 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3142 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3144 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3145 if (hw->mac.type == ixgbe_mac_82598EB &&
3146 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3149 /* poll to verify queue is enabled */
3151 usleep_range(1000, 2000);
3152 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3153 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3155 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3158 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3160 struct ixgbe_hw *hw = &adapter->hw;
3162 u8 tcs = netdev_get_num_tc(adapter->netdev);
3164 if (hw->mac.type == ixgbe_mac_82598EB)
3167 /* disable the arbiter while setting MTQC */
3168 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3169 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3170 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3172 /* set transmit pool layout */
3173 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3174 mtqc = IXGBE_MTQC_VT_ENA;
3176 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3178 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3179 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3180 mtqc |= IXGBE_MTQC_32VF;
3182 mtqc |= IXGBE_MTQC_64VF;
3185 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3187 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3189 mtqc = IXGBE_MTQC_64Q_1PB;
3192 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3194 /* Enable Security TX Buffer IFG for multiple pb */
3196 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3197 sectx |= IXGBE_SECTX_DCB;
3198 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3201 /* re-enable the arbiter */
3202 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3203 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3207 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3208 * @adapter: board private structure
3210 * Configure the Tx unit of the MAC after a reset.
3212 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3214 struct ixgbe_hw *hw = &adapter->hw;
3218 ixgbe_setup_mtqc(adapter);
3220 if (hw->mac.type != ixgbe_mac_82598EB) {
3221 /* DMATXCTL.EN must be before Tx queues are enabled */
3222 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3223 dmatxctl |= IXGBE_DMATXCTL_TE;
3224 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3227 /* Setup the HW Tx Head and Tail descriptor pointers */
3228 for (i = 0; i < adapter->num_tx_queues; i++)
3229 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3232 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3233 struct ixgbe_ring *ring)
3235 struct ixgbe_hw *hw = &adapter->hw;
3236 u8 reg_idx = ring->reg_idx;
3237 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3239 srrctl |= IXGBE_SRRCTL_DROP_EN;
3241 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3244 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3245 struct ixgbe_ring *ring)
3247 struct ixgbe_hw *hw = &adapter->hw;
3248 u8 reg_idx = ring->reg_idx;
3249 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3251 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3253 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3256 #ifdef CONFIG_IXGBE_DCB
3257 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3259 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3263 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3265 if (adapter->ixgbe_ieee_pfc)
3266 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3269 * We should set the drop enable bit if:
3272 * Number of Rx queues > 1 and flow control is disabled
3274 * This allows us to avoid head of line blocking for security
3275 * and performance reasons.
3277 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3278 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3279 for (i = 0; i < adapter->num_rx_queues; i++)
3280 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3282 for (i = 0; i < adapter->num_rx_queues; i++)
3283 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3287 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3289 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3290 struct ixgbe_ring *rx_ring)
3292 struct ixgbe_hw *hw = &adapter->hw;
3294 u8 reg_idx = rx_ring->reg_idx;
3296 if (hw->mac.type == ixgbe_mac_82598EB) {
3297 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3300 * if VMDq is not active we must program one srrctl register
3301 * per RSS queue since we have enabled RDRXCTL.MVMEN
3306 /* configure header buffer length, needed for RSC */
3307 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3309 /* configure the packet buffer length */
3310 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3312 /* configure descriptor type */
3313 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3315 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3319 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3320 * @adapter: device handle
3322 * - 82598/82599/X540: 128
3323 * - X550(non-SRIOV mode): 512
3324 * - X550(SRIOV mode): 64
3326 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3328 if (adapter->hw.mac.type < ixgbe_mac_X550)
3330 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3337 * ixgbe_store_reta - Write the RETA table to HW
3338 * @adapter: device handle
3340 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3342 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3344 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3345 struct ixgbe_hw *hw = &adapter->hw;
3348 u8 *indir_tbl = adapter->rss_indir_tbl;
3350 /* Fill out the redirection table as follows:
3351 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3353 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3354 * - X550: 8 bit wide entries containing 6 bit RSS index
3356 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3357 indices_multi = 0x11;
3359 indices_multi = 0x1;
3361 /* Write redirection table to HW */
3362 for (i = 0; i < reta_entries; i++) {
3363 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3366 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3368 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3376 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3377 * @adapter: device handle
3379 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3381 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3383 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3384 struct ixgbe_hw *hw = &adapter->hw;
3386 unsigned int pf_pool = adapter->num_vfs;
3388 /* Write redirection table to HW */
3389 for (i = 0; i < reta_entries; i++) {
3390 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3392 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3399 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3401 struct ixgbe_hw *hw = &adapter->hw;
3403 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3404 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3406 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3407 * make full use of any rings they may have. We will use the
3408 * PSRTYPE register to control how many rings we use within the PF.
3410 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3413 /* Fill out hash function seeds */
3414 for (i = 0; i < 10; i++)
3415 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3417 /* Fill out redirection table */
3418 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3420 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3424 adapter->rss_indir_tbl[i] = j;
3427 ixgbe_store_reta(adapter);
3430 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3432 struct ixgbe_hw *hw = &adapter->hw;
3433 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3434 unsigned int pf_pool = adapter->num_vfs;
3437 /* Fill out hash function seeds */
3438 for (i = 0; i < 10; i++)
3439 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3440 adapter->rss_key[i]);
3442 /* Fill out the redirection table */
3443 for (i = 0, j = 0; i < 64; i++, j++) {
3447 adapter->rss_indir_tbl[i] = j;
3450 ixgbe_store_vfreta(adapter);
3453 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3455 struct ixgbe_hw *hw = &adapter->hw;
3456 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3459 /* Disable indicating checksum in descriptor, enables RSS hash */
3460 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3461 rxcsum |= IXGBE_RXCSUM_PCSD;
3462 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3464 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3465 if (adapter->ring_feature[RING_F_RSS].mask)
3466 mrqc = IXGBE_MRQC_RSSEN;
3468 u8 tcs = netdev_get_num_tc(adapter->netdev);
3470 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3472 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3474 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3475 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3476 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3478 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3481 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3483 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3485 mrqc = IXGBE_MRQC_RSSEN;
3489 /* Perform hash on these packet types */
3490 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3491 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3492 IXGBE_MRQC_RSS_FIELD_IPV6 |
3493 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3495 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3496 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3497 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3498 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3500 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3501 if ((hw->mac.type >= ixgbe_mac_X550) &&
3502 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3503 unsigned int pf_pool = adapter->num_vfs;
3505 /* Enable VF RSS mode */
3506 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3507 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3509 /* Setup RSS through the VF registers */
3510 ixgbe_setup_vfreta(adapter);
3511 vfmrqc = IXGBE_MRQC_RSSEN;
3512 vfmrqc |= rss_field;
3513 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3515 ixgbe_setup_reta(adapter);
3517 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3522 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3523 * @adapter: address of board private structure
3524 * @index: index of ring to set
3526 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3527 struct ixgbe_ring *ring)
3529 struct ixgbe_hw *hw = &adapter->hw;
3531 u8 reg_idx = ring->reg_idx;
3533 if (!ring_is_rsc_enabled(ring))
3536 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3537 rscctrl |= IXGBE_RSCCTL_RSCEN;
3539 * we must limit the number of descriptors so that the
3540 * total size of max desc * buf_len is not greater
3543 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3544 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3547 #define IXGBE_MAX_RX_DESC_POLL 10
3548 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3549 struct ixgbe_ring *ring)
3551 struct ixgbe_hw *hw = &adapter->hw;
3552 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3554 u8 reg_idx = ring->reg_idx;
3556 if (ixgbe_removed(hw->hw_addr))
3558 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3559 if (hw->mac.type == ixgbe_mac_82598EB &&
3560 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3564 usleep_range(1000, 2000);
3565 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3566 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3569 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3570 "the polling period\n", reg_idx);
3574 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3575 struct ixgbe_ring *ring)
3577 struct ixgbe_hw *hw = &adapter->hw;
3578 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3580 u8 reg_idx = ring->reg_idx;
3582 if (ixgbe_removed(hw->hw_addr))
3584 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3585 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3587 /* write value back with RXDCTL.ENABLE bit cleared */
3588 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3590 if (hw->mac.type == ixgbe_mac_82598EB &&
3591 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3594 /* the hardware may take up to 100us to really disable the rx queue */
3597 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3598 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3601 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3602 "the polling period\n", reg_idx);
3606 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3607 struct ixgbe_ring *ring)
3609 struct ixgbe_hw *hw = &adapter->hw;
3610 u64 rdba = ring->dma;
3612 u8 reg_idx = ring->reg_idx;
3614 /* disable queue to avoid issues while updating state */
3615 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3616 ixgbe_disable_rx_queue(adapter, ring);
3618 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3619 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3620 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3621 ring->count * sizeof(union ixgbe_adv_rx_desc));
3622 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3623 IXGBE_WRITE_FLUSH(hw);
3625 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3626 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3627 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3629 ixgbe_configure_srrctl(adapter, ring);
3630 ixgbe_configure_rscctl(adapter, ring);
3632 if (hw->mac.type == ixgbe_mac_82598EB) {
3634 * enable cache line friendly hardware writes:
3635 * PTHRESH=32 descriptors (half the internal cache),
3636 * this also removes ugly rx_no_buffer_count increment
3637 * HTHRESH=4 descriptors (to minimize latency on fetch)
3638 * WTHRESH=8 burst writeback up to two cache lines
3640 rxdctl &= ~0x3FFFFF;
3644 /* enable receive descriptor ring */
3645 rxdctl |= IXGBE_RXDCTL_ENABLE;
3646 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3648 ixgbe_rx_desc_queue_enable(adapter, ring);
3649 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3652 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3654 struct ixgbe_hw *hw = &adapter->hw;
3655 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3658 /* PSRTYPE must be initialized in non 82598 adapters */
3659 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3660 IXGBE_PSRTYPE_UDPHDR |
3661 IXGBE_PSRTYPE_IPV4HDR |
3662 IXGBE_PSRTYPE_L2HDR |
3663 IXGBE_PSRTYPE_IPV6HDR;
3665 if (hw->mac.type == ixgbe_mac_82598EB)
3673 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3674 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3677 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3679 struct ixgbe_hw *hw = &adapter->hw;
3680 u32 reg_offset, vf_shift;
3681 u32 gcr_ext, vmdctl;
3684 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3687 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3688 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3689 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3690 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3691 vmdctl |= IXGBE_VT_CTL_REPLEN;
3692 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3694 vf_shift = VMDQ_P(0) % 32;
3695 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3697 /* Enable only the PF's pool for Tx/Rx */
3698 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3699 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3700 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3701 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3702 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3703 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3705 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3706 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3708 /* clear VLAN promisc flag so VFTA will be updated if necessary */
3709 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3712 * Set up VF register offsets for selected VT Mode,
3713 * i.e. 32 or 64 VFs for SR-IOV
3715 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3716 case IXGBE_82599_VMDQ_8Q_MASK:
3717 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3719 case IXGBE_82599_VMDQ_4Q_MASK:
3720 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3723 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3727 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3730 /* Enable MAC Anti-Spoofing */
3731 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3734 /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be
3735 * calling set_ethertype_anti_spoofing for each VF in loop below
3737 if (hw->mac.ops.set_ethertype_anti_spoofing) {
3738 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3739 (IXGBE_ETQF_FILTER_EN |
3740 IXGBE_ETQF_TX_ANTISPOOF |
3743 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC),
3744 (IXGBE_ETQF_FILTER_EN |
3745 IXGBE_ETQF_TX_ANTISPOOF |
3749 /* For VFs that have spoof checking turned off */
3750 for (i = 0; i < adapter->num_vfs; i++) {
3751 if (!adapter->vfinfo[i].spoofchk_enabled)
3752 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3754 /* enable ethertype anti spoofing if hw supports it */
3755 if (hw->mac.ops.set_ethertype_anti_spoofing)
3756 hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3758 /* Enable/Disable RSS query feature */
3759 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3760 adapter->vfinfo[i].rss_query_enabled);
3764 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3766 struct ixgbe_hw *hw = &adapter->hw;
3767 struct net_device *netdev = adapter->netdev;
3768 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3769 struct ixgbe_ring *rx_ring;
3774 /* adjust max frame to be able to do baby jumbo for FCoE */
3775 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3776 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3777 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3779 #endif /* IXGBE_FCOE */
3781 /* adjust max frame to be at least the size of a standard frame */
3782 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3783 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3785 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3786 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3787 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3788 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3790 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3793 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3794 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3795 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3796 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3799 * Setup the HW Rx Head and Tail Descriptor Pointers and
3800 * the Base and Length of the Rx Descriptor Ring
3802 for (i = 0; i < adapter->num_rx_queues; i++) {
3803 rx_ring = adapter->rx_ring[i];
3804 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3805 set_ring_rsc_enabled(rx_ring);
3807 clear_ring_rsc_enabled(rx_ring);
3811 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3813 struct ixgbe_hw *hw = &adapter->hw;
3814 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3816 switch (hw->mac.type) {
3817 case ixgbe_mac_82598EB:
3819 * For VMDq support of different descriptor types or
3820 * buffer sizes through the use of multiple SRRCTL
3821 * registers, RDRXCTL.MVMEN must be set to 1
3823 * also, the manual doesn't mention it clearly but DCA hints
3824 * will only use queue 0's tags unless this bit is set. Side
3825 * effects of setting this bit are only that SRRCTL must be
3826 * fully programmed [0..15]
3828 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3830 case ixgbe_mac_X550:
3831 case ixgbe_mac_X550EM_x:
3832 if (adapter->num_vfs)
3833 rdrxctl |= IXGBE_RDRXCTL_PSP;
3834 /* fall through for older HW */
3835 case ixgbe_mac_82599EB:
3836 case ixgbe_mac_X540:
3837 /* Disable RSC for ACK packets */
3838 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3839 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3840 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3841 /* hardware requires some bits to be set by default */
3842 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3843 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3846 /* We should do nothing since we don't know this hardware */
3850 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3854 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3855 * @adapter: board private structure
3857 * Configure the Rx unit of the MAC after a reset.
3859 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3861 struct ixgbe_hw *hw = &adapter->hw;
3865 /* disable receives while setting up the descriptors */
3866 hw->mac.ops.disable_rx(hw);
3868 ixgbe_setup_psrtype(adapter);
3869 ixgbe_setup_rdrxctl(adapter);
3872 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3873 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3874 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3875 rfctl |= IXGBE_RFCTL_RSC_DIS;
3876 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3878 /* Program registers for the distribution of queues */
3879 ixgbe_setup_mrqc(adapter);
3881 /* set_rx_buffer_len must be called before ring initialization */
3882 ixgbe_set_rx_buffer_len(adapter);
3885 * Setup the HW Rx Head and Tail Descriptor Pointers and
3886 * the Base and Length of the Rx Descriptor Ring
3888 for (i = 0; i < adapter->num_rx_queues; i++)
3889 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3891 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3892 /* disable drop enable for 82598 parts */
3893 if (hw->mac.type == ixgbe_mac_82598EB)
3894 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3896 /* enable all receives */
3897 rxctrl |= IXGBE_RXCTRL_RXEN;
3898 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3901 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3902 __be16 proto, u16 vid)
3904 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3905 struct ixgbe_hw *hw = &adapter->hw;
3907 /* add VID to filter table */
3908 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, true);
3909 set_bit(vid, adapter->active_vlans);
3914 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3919 /* short cut the special case */
3923 /* Search for the vlan id in the VLVF entries */
3924 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
3925 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
3926 if ((vlvf & VLAN_VID_MASK) == vlan)
3933 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
3935 struct ixgbe_hw *hw = &adapter->hw;
3939 idx = ixgbe_find_vlvf_entry(hw, vid);
3943 /* See if any other pools are set for this VLAN filter
3944 * entry other than the PF.
3946 word = idx * 2 + (VMDQ_P(0) / 32);
3947 bits = ~(1 << (VMDQ_P(0)) % 32);
3948 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
3950 /* Disable the filter so this falls into the default pool. */
3951 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
3952 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3953 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
3954 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
3958 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3959 __be16 proto, u16 vid)
3961 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3962 struct ixgbe_hw *hw = &adapter->hw;
3964 /* remove VID from filter table */
3965 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
3966 ixgbe_update_pf_promisc_vlvf(adapter, vid);
3968 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
3970 clear_bit(vid, adapter->active_vlans);
3976 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3977 * @adapter: driver data
3979 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3981 struct ixgbe_hw *hw = &adapter->hw;
3985 switch (hw->mac.type) {
3986 case ixgbe_mac_82598EB:
3987 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3988 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3989 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3991 case ixgbe_mac_82599EB:
3992 case ixgbe_mac_X540:
3993 case ixgbe_mac_X550:
3994 case ixgbe_mac_X550EM_x:
3995 for (i = 0; i < adapter->num_rx_queues; i++) {
3996 struct ixgbe_ring *ring = adapter->rx_ring[i];
3998 if (ring->l2_accel_priv)
4001 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4002 vlnctrl &= ~IXGBE_RXDCTL_VME;
4003 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4012 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4013 * @adapter: driver data
4015 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4017 struct ixgbe_hw *hw = &adapter->hw;
4021 switch (hw->mac.type) {
4022 case ixgbe_mac_82598EB:
4023 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4024 vlnctrl |= IXGBE_VLNCTRL_VME;
4025 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4027 case ixgbe_mac_82599EB:
4028 case ixgbe_mac_X540:
4029 case ixgbe_mac_X550:
4030 case ixgbe_mac_X550EM_x:
4031 for (i = 0; i < adapter->num_rx_queues; i++) {
4032 struct ixgbe_ring *ring = adapter->rx_ring[i];
4034 if (ring->l2_accel_priv)
4037 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4038 vlnctrl |= IXGBE_RXDCTL_VME;
4039 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4047 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4049 struct ixgbe_hw *hw = &adapter->hw;
4052 switch (hw->mac.type) {
4053 case ixgbe_mac_82599EB:
4054 case ixgbe_mac_X540:
4055 case ixgbe_mac_X550:
4056 case ixgbe_mac_X550EM_x:
4058 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)
4061 case ixgbe_mac_82598EB:
4062 /* legacy case, we can just disable VLAN filtering */
4063 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4064 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4065 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4069 /* We are already in VLAN promisc, nothing to do */
4070 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4073 /* Set flag so we don't redo unnecessary work */
4074 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4076 /* Add PF to all active pools */
4077 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4078 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4079 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4081 vlvfb |= 1 << (VMDQ_P(0) % 32);
4082 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4085 /* Set all bits in the VLAN filter table array */
4086 for (i = hw->mac.vft_size; i--;)
4087 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4090 #define VFTA_BLOCK_SIZE 8
4091 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4093 struct ixgbe_hw *hw = &adapter->hw;
4094 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4095 u32 vid_start = vfta_offset * 32;
4096 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4097 u32 i, vid, word, bits;
4099 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4100 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4102 /* pull VLAN ID from VLVF */
4103 vid = vlvf & VLAN_VID_MASK;
4105 /* only concern outselves with a certain range */
4106 if (vid < vid_start || vid >= vid_end)
4110 /* record VLAN ID in VFTA */
4111 vfta[(vid - vid_start) / 32] |= 1 << (vid % 32);
4113 /* if PF is part of this then continue */
4114 if (test_bit(vid, adapter->active_vlans))
4118 /* remove PF from the pool */
4119 word = i * 2 + VMDQ_P(0) / 32;
4120 bits = ~(1 << (VMDQ_P(0) % 32));
4121 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4122 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4125 /* extract values from active_vlans and write back to VFTA */
4126 for (i = VFTA_BLOCK_SIZE; i--;) {
4127 vid = (vfta_offset + i) * 32;
4128 word = vid / BITS_PER_LONG;
4129 bits = vid % BITS_PER_LONG;
4131 vfta[i] |= adapter->active_vlans[word] >> bits;
4133 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4137 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4139 struct ixgbe_hw *hw = &adapter->hw;
4142 switch (hw->mac.type) {
4143 case ixgbe_mac_82599EB:
4144 case ixgbe_mac_X540:
4145 case ixgbe_mac_X550:
4146 case ixgbe_mac_X550EM_x:
4148 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)
4151 case ixgbe_mac_82598EB:
4152 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4153 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
4154 vlnctrl |= IXGBE_VLNCTRL_VFE;
4155 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4159 /* We are not in VLAN promisc, nothing to do */
4160 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4163 /* Set flag so we don't redo unnecessary work */
4164 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4166 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4167 ixgbe_scrub_vfta(adapter, i);
4170 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4174 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4176 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4177 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4181 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4182 * @netdev: network interface device structure
4184 * Writes multicast address list to the MTA hash table.
4185 * Returns: -ENOMEM on failure
4186 * 0 on no addresses written
4187 * X on writing X addresses to MTA
4189 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4191 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4192 struct ixgbe_hw *hw = &adapter->hw;
4194 if (!netif_running(netdev))
4197 if (hw->mac.ops.update_mc_addr_list)
4198 hw->mac.ops.update_mc_addr_list(hw, netdev);
4202 #ifdef CONFIG_PCI_IOV
4203 ixgbe_restore_vf_multicasts(adapter);
4206 return netdev_mc_count(netdev);
4209 #ifdef CONFIG_PCI_IOV
4210 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4212 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4213 struct ixgbe_hw *hw = &adapter->hw;
4216 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4217 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4219 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4220 hw->mac.ops.set_rar(hw, i,
4225 hw->mac.ops.clear_rar(hw, i);
4230 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4232 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4233 struct ixgbe_hw *hw = &adapter->hw;
4236 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4237 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4240 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4242 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4243 hw->mac.ops.set_rar(hw, i,
4248 hw->mac.ops.clear_rar(hw, i);
4252 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4254 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4255 struct ixgbe_hw *hw = &adapter->hw;
4258 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4259 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4260 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4263 ixgbe_sync_mac_table(adapter);
4266 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4268 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4269 struct ixgbe_hw *hw = &adapter->hw;
4272 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4273 /* do not count default RAR as available */
4274 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4277 /* only count unused and addresses that belong to us */
4278 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4279 if (mac_table->pool != pool)
4289 /* this function destroys the first RAR entry */
4290 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4292 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4293 struct ixgbe_hw *hw = &adapter->hw;
4295 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4296 mac_table->pool = VMDQ_P(0);
4298 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4300 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4304 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4305 const u8 *addr, u16 pool)
4307 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4308 struct ixgbe_hw *hw = &adapter->hw;
4311 if (is_zero_ether_addr(addr))
4314 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4315 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4318 ether_addr_copy(mac_table->addr, addr);
4319 mac_table->pool = pool;
4321 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4322 IXGBE_MAC_STATE_IN_USE;
4324 ixgbe_sync_mac_table(adapter);
4332 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4333 const u8 *addr, u16 pool)
4335 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4336 struct ixgbe_hw *hw = &adapter->hw;
4339 if (is_zero_ether_addr(addr))
4342 /* search table for addr, if found clear IN_USE flag and sync */
4343 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4344 /* we can only delete an entry if it is in use */
4345 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4347 /* we only care about entries that belong to the given pool */
4348 if (mac_table->pool != pool)
4350 /* we only care about a specific MAC address */
4351 if (!ether_addr_equal(addr, mac_table->addr))
4354 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4355 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4357 ixgbe_sync_mac_table(adapter);
4365 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4366 * @netdev: network interface device structure
4368 * Writes unicast address list to the RAR table.
4369 * Returns: -ENOMEM on failure/insufficient address space
4370 * 0 on no addresses written
4371 * X on writing X addresses to the RAR table
4373 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4375 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4378 /* return ENOMEM indicating insufficient memory for addresses */
4379 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4382 if (!netdev_uc_empty(netdev)) {
4383 struct netdev_hw_addr *ha;
4384 netdev_for_each_uc_addr(ha, netdev) {
4385 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4386 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4393 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4395 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4398 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4400 return min_t(int, ret, 0);
4403 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4405 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4407 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4413 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4414 * @netdev: network interface device structure
4416 * The set_rx_method entry point is called whenever the unicast/multicast
4417 * address list or the network interface flags are updated. This routine is
4418 * responsible for configuring the hardware for proper unicast, multicast and
4421 void ixgbe_set_rx_mode(struct net_device *netdev)
4423 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4424 struct ixgbe_hw *hw = &adapter->hw;
4425 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4428 /* Check for Promiscuous and All Multicast modes */
4429 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4431 /* set all bits that we expect to always be set */
4432 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4433 fctrl |= IXGBE_FCTRL_BAM;
4434 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4435 fctrl |= IXGBE_FCTRL_PMCF;
4437 /* clear the bits we are changing the status of */
4438 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4439 if (netdev->flags & IFF_PROMISC) {
4440 hw->addr_ctrl.user_set_promisc = true;
4441 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4442 vmolr |= IXGBE_VMOLR_MPE;
4443 ixgbe_vlan_promisc_enable(adapter);
4445 if (netdev->flags & IFF_ALLMULTI) {
4446 fctrl |= IXGBE_FCTRL_MPE;
4447 vmolr |= IXGBE_VMOLR_MPE;
4449 hw->addr_ctrl.user_set_promisc = false;
4450 ixgbe_vlan_promisc_disable(adapter);
4454 * Write addresses to available RAR registers, if there is not
4455 * sufficient space to store all the addresses then enable
4456 * unicast promiscuous mode
4458 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4459 fctrl |= IXGBE_FCTRL_UPE;
4460 vmolr |= IXGBE_VMOLR_ROPE;
4463 /* Write addresses to the MTA, if the attempt fails
4464 * then we should just turn on promiscuous mode so
4465 * that we can at least receive multicast traffic
4467 count = ixgbe_write_mc_addr_list(netdev);
4469 fctrl |= IXGBE_FCTRL_MPE;
4470 vmolr |= IXGBE_VMOLR_MPE;
4472 vmolr |= IXGBE_VMOLR_ROMPE;
4475 if (hw->mac.type != ixgbe_mac_82598EB) {
4476 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4477 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4479 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4482 /* This is useful for sniffing bad packets. */
4483 if (adapter->netdev->features & NETIF_F_RXALL) {
4484 /* UPE and MPE will be handled by normal PROMISC logic
4485 * in e1000e_set_rx_mode */
4486 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4487 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4488 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4490 fctrl &= ~(IXGBE_FCTRL_DPF);
4491 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4494 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4496 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4497 ixgbe_vlan_strip_enable(adapter);
4499 ixgbe_vlan_strip_disable(adapter);
4502 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4506 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4507 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4508 napi_enable(&adapter->q_vector[q_idx]->napi);
4512 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4516 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4517 napi_disable(&adapter->q_vector[q_idx]->napi);
4518 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4519 pr_info("QV %d locked\n", q_idx);
4520 usleep_range(1000, 20000);
4525 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4527 switch (adapter->hw.mac.type) {
4528 case ixgbe_mac_X550:
4529 case ixgbe_mac_X550EM_x:
4530 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4531 #ifdef CONFIG_IXGBE_VXLAN
4532 adapter->vxlan_port = 0;
4540 #ifdef CONFIG_IXGBE_DCB
4542 * ixgbe_configure_dcb - Configure DCB hardware
4543 * @adapter: ixgbe adapter struct
4545 * This is called by the driver on open to configure the DCB hardware.
4546 * This is also called by the gennetlink interface when reconfiguring
4549 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4551 struct ixgbe_hw *hw = &adapter->hw;
4552 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4554 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4555 if (hw->mac.type == ixgbe_mac_82598EB)
4556 netif_set_gso_max_size(adapter->netdev, 65536);
4560 if (hw->mac.type == ixgbe_mac_82598EB)
4561 netif_set_gso_max_size(adapter->netdev, 32768);
4564 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4565 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4568 /* reconfigure the hardware */
4569 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4570 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4572 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4574 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4575 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4576 ixgbe_dcb_hw_ets(&adapter->hw,
4577 adapter->ixgbe_ieee_ets,
4579 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4580 adapter->ixgbe_ieee_pfc->pfc_en,
4581 adapter->ixgbe_ieee_ets->prio_tc);
4584 /* Enable RSS Hash per TC */
4585 if (hw->mac.type != ixgbe_mac_82598EB) {
4587 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4594 /* write msb to all 8 TCs in one write */
4595 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4600 /* Additional bittime to account for IXGBE framing */
4601 #define IXGBE_ETH_FRAMING 20
4604 * ixgbe_hpbthresh - calculate high water mark for flow control
4606 * @adapter: board private structure to calculate for
4607 * @pb: packet buffer to calculate
4609 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4611 struct ixgbe_hw *hw = &adapter->hw;
4612 struct net_device *dev = adapter->netdev;
4613 int link, tc, kb, marker;
4616 /* Calculate max LAN frame size */
4617 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4620 /* FCoE traffic class uses FCOE jumbo frames */
4621 if ((dev->features & NETIF_F_FCOE_MTU) &&
4622 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4623 (pb == ixgbe_fcoe_get_tc(adapter)))
4624 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4627 /* Calculate delay value for device */
4628 switch (hw->mac.type) {
4629 case ixgbe_mac_X540:
4630 case ixgbe_mac_X550:
4631 case ixgbe_mac_X550EM_x:
4632 dv_id = IXGBE_DV_X540(link, tc);
4635 dv_id = IXGBE_DV(link, tc);
4639 /* Loopback switch introduces additional latency */
4640 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4641 dv_id += IXGBE_B2BT(tc);
4643 /* Delay value is calculated in bit times convert to KB */
4644 kb = IXGBE_BT2KB(dv_id);
4645 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4647 marker = rx_pba - kb;
4649 /* It is possible that the packet buffer is not large enough
4650 * to provide required headroom. In this case throw an error
4651 * to user and a do the best we can.
4654 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4655 "headroom to support flow control."
4656 "Decrease MTU or number of traffic classes\n", pb);
4664 * ixgbe_lpbthresh - calculate low water mark for for flow control
4666 * @adapter: board private structure to calculate for
4667 * @pb: packet buffer to calculate
4669 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4671 struct ixgbe_hw *hw = &adapter->hw;
4672 struct net_device *dev = adapter->netdev;
4676 /* Calculate max LAN frame size */
4677 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4680 /* FCoE traffic class uses FCOE jumbo frames */
4681 if ((dev->features & NETIF_F_FCOE_MTU) &&
4682 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4683 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4684 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4687 /* Calculate delay value for device */
4688 switch (hw->mac.type) {
4689 case ixgbe_mac_X540:
4690 case ixgbe_mac_X550:
4691 case ixgbe_mac_X550EM_x:
4692 dv_id = IXGBE_LOW_DV_X540(tc);
4695 dv_id = IXGBE_LOW_DV(tc);
4699 /* Delay value is calculated in bit times convert to KB */
4700 return IXGBE_BT2KB(dv_id);
4704 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4706 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4708 struct ixgbe_hw *hw = &adapter->hw;
4709 int num_tc = netdev_get_num_tc(adapter->netdev);
4715 for (i = 0; i < num_tc; i++) {
4716 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4717 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4719 /* Low water marks must not be larger than high water marks */
4720 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4721 hw->fc.low_water[i] = 0;
4724 for (; i < MAX_TRAFFIC_CLASS; i++)
4725 hw->fc.high_water[i] = 0;
4728 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4730 struct ixgbe_hw *hw = &adapter->hw;
4732 u8 tc = netdev_get_num_tc(adapter->netdev);
4734 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4735 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4736 hdrm = 32 << adapter->fdir_pballoc;
4740 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4741 ixgbe_pbthresh_setup(adapter);
4744 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4746 struct ixgbe_hw *hw = &adapter->hw;
4747 struct hlist_node *node2;
4748 struct ixgbe_fdir_filter *filter;
4750 spin_lock(&adapter->fdir_perfect_lock);
4752 if (!hlist_empty(&adapter->fdir_filter_list))
4753 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4755 hlist_for_each_entry_safe(filter, node2,
4756 &adapter->fdir_filter_list, fdir_node) {
4757 ixgbe_fdir_write_perfect_filter_82599(hw,
4760 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4761 IXGBE_FDIR_DROP_QUEUE :
4762 adapter->rx_ring[filter->action]->reg_idx);
4765 spin_unlock(&adapter->fdir_perfect_lock);
4768 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4769 struct ixgbe_adapter *adapter)
4771 struct ixgbe_hw *hw = &adapter->hw;
4774 /* No unicast promiscuous support for VMDQ devices. */
4775 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4776 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4778 /* clear the affected bit */
4779 vmolr &= ~IXGBE_VMOLR_MPE;
4781 if (dev->flags & IFF_ALLMULTI) {
4782 vmolr |= IXGBE_VMOLR_MPE;
4784 vmolr |= IXGBE_VMOLR_ROMPE;
4785 hw->mac.ops.update_mc_addr_list(hw, dev);
4787 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4788 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4791 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4793 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4794 int rss_i = adapter->num_rx_queues_per_pool;
4795 struct ixgbe_hw *hw = &adapter->hw;
4796 u16 pool = vadapter->pool;
4797 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4798 IXGBE_PSRTYPE_UDPHDR |
4799 IXGBE_PSRTYPE_IPV4HDR |
4800 IXGBE_PSRTYPE_L2HDR |
4801 IXGBE_PSRTYPE_IPV6HDR;
4803 if (hw->mac.type == ixgbe_mac_82598EB)
4811 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4815 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4816 * @rx_ring: ring to free buffers from
4818 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4820 struct device *dev = rx_ring->dev;
4824 /* ring already cleared, nothing to do */
4825 if (!rx_ring->rx_buffer_info)
4828 /* Free all the Rx ring sk_buffs */
4829 for (i = 0; i < rx_ring->count; i++) {
4830 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4832 if (rx_buffer->skb) {
4833 struct sk_buff *skb = rx_buffer->skb;
4834 if (IXGBE_CB(skb)->page_released)
4837 ixgbe_rx_bufsz(rx_ring),
4840 rx_buffer->skb = NULL;
4843 if (!rx_buffer->page)
4846 dma_unmap_page(dev, rx_buffer->dma,
4847 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4848 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4850 rx_buffer->page = NULL;
4853 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4854 memset(rx_ring->rx_buffer_info, 0, size);
4856 /* Zero out the descriptor ring */
4857 memset(rx_ring->desc, 0, rx_ring->size);
4859 rx_ring->next_to_alloc = 0;
4860 rx_ring->next_to_clean = 0;
4861 rx_ring->next_to_use = 0;
4864 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4865 struct ixgbe_ring *rx_ring)
4867 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4868 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4870 /* shutdown specific queue receive and wait for dma to settle */
4871 ixgbe_disable_rx_queue(adapter, rx_ring);
4872 usleep_range(10000, 20000);
4873 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4874 ixgbe_clean_rx_ring(rx_ring);
4875 rx_ring->l2_accel_priv = NULL;
4878 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4879 struct ixgbe_fwd_adapter *accel)
4881 struct ixgbe_adapter *adapter = accel->real_adapter;
4882 unsigned int rxbase = accel->rx_base_queue;
4883 unsigned int txbase = accel->tx_base_queue;
4886 netif_tx_stop_all_queues(vdev);
4888 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4889 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4890 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4893 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4894 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4895 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4902 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4903 struct ixgbe_fwd_adapter *accel)
4905 struct ixgbe_adapter *adapter = accel->real_adapter;
4906 unsigned int rxbase, txbase, queues;
4907 int i, baseq, err = 0;
4909 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4912 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4913 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4914 accel->pool, adapter->num_rx_pools,
4915 baseq, baseq + adapter->num_rx_queues_per_pool,
4916 adapter->fwd_bitmask);
4918 accel->netdev = vdev;
4919 accel->rx_base_queue = rxbase = baseq;
4920 accel->tx_base_queue = txbase = baseq;
4922 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4923 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4925 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4926 adapter->rx_ring[rxbase + i]->netdev = vdev;
4927 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4928 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4931 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4932 adapter->tx_ring[txbase + i]->netdev = vdev;
4933 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4936 queues = min_t(unsigned int,
4937 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4938 err = netif_set_real_num_tx_queues(vdev, queues);
4942 err = netif_set_real_num_rx_queues(vdev, queues);
4946 if (is_valid_ether_addr(vdev->dev_addr))
4947 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4949 ixgbe_fwd_psrtype(accel);
4950 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4953 ixgbe_fwd_ring_down(vdev, accel);
4957 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4959 struct net_device *upper;
4960 struct list_head *iter;
4963 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4964 if (netif_is_macvlan(upper)) {
4965 struct macvlan_dev *dfwd = netdev_priv(upper);
4966 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4968 if (dfwd->fwd_priv) {
4969 err = ixgbe_fwd_ring_up(upper, vadapter);
4977 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4979 struct ixgbe_hw *hw = &adapter->hw;
4981 ixgbe_configure_pb(adapter);
4982 #ifdef CONFIG_IXGBE_DCB
4983 ixgbe_configure_dcb(adapter);
4986 * We must restore virtualization before VLANs or else
4987 * the VLVF registers will not be populated
4989 ixgbe_configure_virtualization(adapter);
4991 ixgbe_set_rx_mode(adapter->netdev);
4992 ixgbe_restore_vlan(adapter);
4994 switch (hw->mac.type) {
4995 case ixgbe_mac_82599EB:
4996 case ixgbe_mac_X540:
4997 hw->mac.ops.disable_rx_buff(hw);
5003 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5004 ixgbe_init_fdir_signature_82599(&adapter->hw,
5005 adapter->fdir_pballoc);
5006 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5007 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5008 adapter->fdir_pballoc);
5009 ixgbe_fdir_filter_restore(adapter);
5012 switch (hw->mac.type) {
5013 case ixgbe_mac_82599EB:
5014 case ixgbe_mac_X540:
5015 hw->mac.ops.enable_rx_buff(hw);
5021 #ifdef CONFIG_IXGBE_DCA
5023 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5024 ixgbe_setup_dca(adapter);
5025 #endif /* CONFIG_IXGBE_DCA */
5028 /* configure FCoE L2 filters, redirection table, and Rx control */
5029 ixgbe_configure_fcoe(adapter);
5031 #endif /* IXGBE_FCOE */
5032 ixgbe_configure_tx(adapter);
5033 ixgbe_configure_rx(adapter);
5034 ixgbe_configure_dfwd(adapter);
5038 * ixgbe_sfp_link_config - set up SFP+ link
5039 * @adapter: pointer to private adapter struct
5041 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5044 * We are assuming the worst case scenario here, and that
5045 * is that an SFP was inserted/removed after the reset
5046 * but before SFP detection was enabled. As such the best
5047 * solution is to just start searching as soon as we start
5049 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5050 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5052 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5053 adapter->sfp_poll_time = 0;
5057 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5058 * @hw: pointer to private hardware struct
5060 * Returns 0 on success, negative on failure
5062 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5065 bool autoneg, link_up = false;
5066 int ret = IXGBE_ERR_LINK_SETUP;
5068 if (hw->mac.ops.check_link)
5069 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5074 speed = hw->phy.autoneg_advertised;
5075 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5076 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5081 if (hw->mac.ops.setup_link)
5082 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5087 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5089 struct ixgbe_hw *hw = &adapter->hw;
5092 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5093 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5095 gpie |= IXGBE_GPIE_EIAME;
5097 * use EIAM to auto-mask when MSI-X interrupt is asserted
5098 * this saves a register write for every interrupt
5100 switch (hw->mac.type) {
5101 case ixgbe_mac_82598EB:
5102 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5104 case ixgbe_mac_82599EB:
5105 case ixgbe_mac_X540:
5106 case ixgbe_mac_X550:
5107 case ixgbe_mac_X550EM_x:
5109 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5110 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5114 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5115 * specifically only auto mask tx and rx interrupts */
5116 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5119 /* XXX: to interrupt immediately for EICS writes, enable this */
5120 /* gpie |= IXGBE_GPIE_EIMEN; */
5122 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5123 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5125 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5126 case IXGBE_82599_VMDQ_8Q_MASK:
5127 gpie |= IXGBE_GPIE_VTMODE_16;
5129 case IXGBE_82599_VMDQ_4Q_MASK:
5130 gpie |= IXGBE_GPIE_VTMODE_32;
5133 gpie |= IXGBE_GPIE_VTMODE_64;
5138 /* Enable Thermal over heat sensor interrupt */
5139 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5140 switch (adapter->hw.mac.type) {
5141 case ixgbe_mac_82599EB:
5142 gpie |= IXGBE_SDP0_GPIEN_8259X;
5149 /* Enable fan failure interrupt */
5150 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5151 gpie |= IXGBE_SDP1_GPIEN(hw);
5153 switch (hw->mac.type) {
5154 case ixgbe_mac_82599EB:
5155 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5157 case ixgbe_mac_X550EM_x:
5158 gpie |= IXGBE_SDP0_GPIEN_X540;
5164 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5167 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5169 struct ixgbe_hw *hw = &adapter->hw;
5173 ixgbe_get_hw_control(adapter);
5174 ixgbe_setup_gpie(adapter);
5176 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5177 ixgbe_configure_msix(adapter);
5179 ixgbe_configure_msi_and_legacy(adapter);
5181 /* enable the optics for 82599 SFP+ fiber */
5182 if (hw->mac.ops.enable_tx_laser)
5183 hw->mac.ops.enable_tx_laser(hw);
5185 if (hw->phy.ops.set_phy_power)
5186 hw->phy.ops.set_phy_power(hw, true);
5188 smp_mb__before_atomic();
5189 clear_bit(__IXGBE_DOWN, &adapter->state);
5190 ixgbe_napi_enable_all(adapter);
5192 if (ixgbe_is_sfp(hw)) {
5193 ixgbe_sfp_link_config(adapter);
5195 err = ixgbe_non_sfp_link_config(hw);
5197 e_err(probe, "link_config FAILED %d\n", err);
5200 /* clear any pending interrupts, may auto mask */
5201 IXGBE_READ_REG(hw, IXGBE_EICR);
5202 ixgbe_irq_enable(adapter, true, true);
5205 * If this adapter has a fan, check to see if we had a failure
5206 * before we enabled the interrupt.
5208 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5209 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5210 if (esdp & IXGBE_ESDP_SDP1)
5211 e_crit(drv, "Fan has stopped, replace the adapter\n");
5214 /* bring the link up in the watchdog, this could race with our first
5215 * link up interrupt but shouldn't be a problem */
5216 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5217 adapter->link_check_timeout = jiffies;
5218 mod_timer(&adapter->service_timer, jiffies);
5220 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5221 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5222 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5223 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5226 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5228 WARN_ON(in_interrupt());
5229 /* put off any impending NetWatchDogTimeout */
5230 adapter->netdev->trans_start = jiffies;
5232 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5233 usleep_range(1000, 2000);
5234 ixgbe_down(adapter);
5236 * If SR-IOV enabled then wait a bit before bringing the adapter
5237 * back up to give the VFs time to respond to the reset. The
5238 * two second wait is based upon the watchdog timer cycle in
5241 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5244 clear_bit(__IXGBE_RESETTING, &adapter->state);
5247 void ixgbe_up(struct ixgbe_adapter *adapter)
5249 /* hardware has been reset, we need to reload some things */
5250 ixgbe_configure(adapter);
5252 ixgbe_up_complete(adapter);
5255 void ixgbe_reset(struct ixgbe_adapter *adapter)
5257 struct ixgbe_hw *hw = &adapter->hw;
5258 struct net_device *netdev = adapter->netdev;
5261 if (ixgbe_removed(hw->hw_addr))
5263 /* lock SFP init bit to prevent race conditions with the watchdog */
5264 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5265 usleep_range(1000, 2000);
5267 /* clear all SFP and link config related flags while holding SFP_INIT */
5268 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5269 IXGBE_FLAG2_SFP_NEEDS_RESET);
5270 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5272 err = hw->mac.ops.init_hw(hw);
5275 case IXGBE_ERR_SFP_NOT_PRESENT:
5276 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5278 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5279 e_dev_err("master disable timed out\n");
5281 case IXGBE_ERR_EEPROM_VERSION:
5282 /* We are running on a pre-production device, log a warning */
5283 e_dev_warn("This device is a pre-production adapter/LOM. "
5284 "Please be aware there may be issues associated with "
5285 "your hardware. If you are experiencing problems "
5286 "please contact your Intel or hardware "
5287 "representative who provided you with this "
5291 e_dev_err("Hardware Error: %d\n", err);
5294 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5296 /* flush entries out of MAC table */
5297 ixgbe_flush_sw_mac_table(adapter);
5298 __dev_uc_unsync(netdev, NULL);
5300 /* do not flush user set addresses */
5301 ixgbe_mac_set_default_filter(adapter);
5303 /* update SAN MAC vmdq pool selection */
5304 if (hw->mac.san_mac_rar_index)
5305 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5307 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5308 ixgbe_ptp_reset(adapter);
5310 if (hw->phy.ops.set_phy_power) {
5311 if (!netif_running(adapter->netdev) && !adapter->wol)
5312 hw->phy.ops.set_phy_power(hw, false);
5314 hw->phy.ops.set_phy_power(hw, true);
5319 * ixgbe_clean_tx_ring - Free Tx Buffers
5320 * @tx_ring: ring to be cleaned
5322 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5324 struct ixgbe_tx_buffer *tx_buffer_info;
5328 /* ring already cleared, nothing to do */
5329 if (!tx_ring->tx_buffer_info)
5332 /* Free all the Tx ring sk_buffs */
5333 for (i = 0; i < tx_ring->count; i++) {
5334 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5335 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5338 netdev_tx_reset_queue(txring_txq(tx_ring));
5340 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5341 memset(tx_ring->tx_buffer_info, 0, size);
5343 /* Zero out the descriptor ring */
5344 memset(tx_ring->desc, 0, tx_ring->size);
5346 tx_ring->next_to_use = 0;
5347 tx_ring->next_to_clean = 0;
5351 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5352 * @adapter: board private structure
5354 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5358 for (i = 0; i < adapter->num_rx_queues; i++)
5359 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5363 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5364 * @adapter: board private structure
5366 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5370 for (i = 0; i < adapter->num_tx_queues; i++)
5371 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5374 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5376 struct hlist_node *node2;
5377 struct ixgbe_fdir_filter *filter;
5379 spin_lock(&adapter->fdir_perfect_lock);
5381 hlist_for_each_entry_safe(filter, node2,
5382 &adapter->fdir_filter_list, fdir_node) {
5383 hlist_del(&filter->fdir_node);
5386 adapter->fdir_filter_count = 0;
5388 spin_unlock(&adapter->fdir_perfect_lock);
5391 void ixgbe_down(struct ixgbe_adapter *adapter)
5393 struct net_device *netdev = adapter->netdev;
5394 struct ixgbe_hw *hw = &adapter->hw;
5395 struct net_device *upper;
5396 struct list_head *iter;
5399 /* signal that we are down to the interrupt handler */
5400 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5401 return; /* do nothing if already down */
5403 /* disable receives */
5404 hw->mac.ops.disable_rx(hw);
5406 /* disable all enabled rx queues */
5407 for (i = 0; i < adapter->num_rx_queues; i++)
5408 /* this call also flushes the previous write */
5409 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5411 usleep_range(10000, 20000);
5413 netif_tx_stop_all_queues(netdev);
5415 /* call carrier off first to avoid false dev_watchdog timeouts */
5416 netif_carrier_off(netdev);
5417 netif_tx_disable(netdev);
5419 /* disable any upper devices */
5420 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5421 if (netif_is_macvlan(upper)) {
5422 struct macvlan_dev *vlan = netdev_priv(upper);
5424 if (vlan->fwd_priv) {
5425 netif_tx_stop_all_queues(upper);
5426 netif_carrier_off(upper);
5427 netif_tx_disable(upper);
5432 ixgbe_irq_disable(adapter);
5434 ixgbe_napi_disable_all(adapter);
5436 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5437 IXGBE_FLAG2_RESET_REQUESTED);
5438 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5440 del_timer_sync(&adapter->service_timer);
5442 if (adapter->num_vfs) {
5443 /* Clear EITR Select mapping */
5444 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5446 /* Mark all the VFs as inactive */
5447 for (i = 0 ; i < adapter->num_vfs; i++)
5448 adapter->vfinfo[i].clear_to_send = false;
5450 /* ping all the active vfs to let them know we are going down */
5451 ixgbe_ping_all_vfs(adapter);
5453 /* Disable all VFTE/VFRE TX/RX */
5454 ixgbe_disable_tx_rx(adapter);
5457 /* disable transmits in the hardware now that interrupts are off */
5458 for (i = 0; i < adapter->num_tx_queues; i++) {
5459 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5460 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5463 /* Disable the Tx DMA engine on 82599 and later MAC */
5464 switch (hw->mac.type) {
5465 case ixgbe_mac_82599EB:
5466 case ixgbe_mac_X540:
5467 case ixgbe_mac_X550:
5468 case ixgbe_mac_X550EM_x:
5469 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5470 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5471 ~IXGBE_DMATXCTL_TE));
5477 if (!pci_channel_offline(adapter->pdev))
5478 ixgbe_reset(adapter);
5480 /* power down the optics for 82599 SFP+ fiber */
5481 if (hw->mac.ops.disable_tx_laser)
5482 hw->mac.ops.disable_tx_laser(hw);
5484 ixgbe_clean_all_tx_rings(adapter);
5485 ixgbe_clean_all_rx_rings(adapter);
5489 * ixgbe_tx_timeout - Respond to a Tx Hang
5490 * @netdev: network interface device structure
5492 static void ixgbe_tx_timeout(struct net_device *netdev)
5494 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5496 /* Do the reset outside of interrupt context */
5497 ixgbe_tx_timeout_reset(adapter);
5501 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5502 * @adapter: board private structure to initialize
5504 * ixgbe_sw_init initializes the Adapter private data structure.
5505 * Fields are initialized based on PCI device information and
5506 * OS network device settings (MTU size).
5508 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5510 struct ixgbe_hw *hw = &adapter->hw;
5511 struct pci_dev *pdev = adapter->pdev;
5512 unsigned int rss, fdir;
5514 #ifdef CONFIG_IXGBE_DCB
5516 struct tc_configuration *tc;
5519 /* PCI config space info */
5521 hw->vendor_id = pdev->vendor;
5522 hw->device_id = pdev->device;
5523 hw->revision_id = pdev->revision;
5524 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5525 hw->subsystem_device_id = pdev->subsystem_device;
5527 /* Set common capability flags and settings */
5528 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5529 adapter->ring_feature[RING_F_RSS].limit = rss;
5530 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5531 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5532 adapter->atr_sample_rate = 20;
5533 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5534 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5535 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5536 #ifdef CONFIG_IXGBE_DCA
5537 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5540 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5541 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5542 #ifdef CONFIG_IXGBE_DCB
5543 /* Default traffic class to use for FCoE */
5544 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5545 #endif /* CONFIG_IXGBE_DCB */
5546 #endif /* IXGBE_FCOE */
5548 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5549 hw->mac.num_rar_entries,
5551 if (!adapter->mac_table)
5554 /* Set MAC specific capability flags and exceptions */
5555 switch (hw->mac.type) {
5556 case ixgbe_mac_82598EB:
5557 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5559 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5560 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5562 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5563 adapter->ring_feature[RING_F_FDIR].limit = 0;
5564 adapter->atr_sample_rate = 0;
5565 adapter->fdir_pballoc = 0;
5567 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5568 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5569 #ifdef CONFIG_IXGBE_DCB
5570 adapter->fcoe.up = 0;
5571 #endif /* IXGBE_DCB */
5572 #endif /* IXGBE_FCOE */
5574 case ixgbe_mac_82599EB:
5575 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5576 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5578 case ixgbe_mac_X540:
5579 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5580 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5581 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5583 case ixgbe_mac_X550EM_x:
5584 case ixgbe_mac_X550:
5585 #ifdef CONFIG_IXGBE_DCA
5586 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5588 #ifdef CONFIG_IXGBE_VXLAN
5589 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5597 /* FCoE support exists, always init the FCoE lock */
5598 spin_lock_init(&adapter->fcoe.lock);
5601 /* n-tuple support exists, always init our spinlock */
5602 spin_lock_init(&adapter->fdir_perfect_lock);
5604 #ifdef CONFIG_IXGBE_DCB
5605 switch (hw->mac.type) {
5606 case ixgbe_mac_X540:
5607 case ixgbe_mac_X550:
5608 case ixgbe_mac_X550EM_x:
5609 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5610 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5613 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5614 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5618 /* Configure DCB traffic classes */
5619 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5620 tc = &adapter->dcb_cfg.tc_config[j];
5621 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5622 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5623 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5624 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5625 tc->dcb_pfc = pfc_disabled;
5628 /* Initialize default user to priority mapping, UPx->TC0 */
5629 tc = &adapter->dcb_cfg.tc_config[0];
5630 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5631 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5633 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5634 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5635 adapter->dcb_cfg.pfc_mode_enable = false;
5636 adapter->dcb_set_bitmap = 0x00;
5637 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5638 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5639 sizeof(adapter->temp_dcb_cfg));
5643 /* default flow control settings */
5644 hw->fc.requested_mode = ixgbe_fc_full;
5645 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5646 ixgbe_pbthresh_setup(adapter);
5647 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5648 hw->fc.send_xon = true;
5649 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5651 #ifdef CONFIG_PCI_IOV
5653 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5655 /* assign number of SR-IOV VFs */
5656 if (hw->mac.type != ixgbe_mac_82598EB) {
5657 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5658 adapter->num_vfs = 0;
5659 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5661 adapter->num_vfs = max_vfs;
5664 #endif /* CONFIG_PCI_IOV */
5666 /* enable itr by default in dynamic mode */
5667 adapter->rx_itr_setting = 1;
5668 adapter->tx_itr_setting = 1;
5670 /* set default ring sizes */
5671 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5672 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5674 /* set default work limits */
5675 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5677 /* initialize eeprom parameters */
5678 if (ixgbe_init_eeprom_params_generic(hw)) {
5679 e_dev_err("EEPROM initialization failed\n");
5683 /* PF holds first pool slot */
5684 set_bit(0, &adapter->fwd_bitmask);
5685 set_bit(__IXGBE_DOWN, &adapter->state);
5691 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5692 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5694 * Return 0 on success, negative on failure
5696 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5698 struct device *dev = tx_ring->dev;
5699 int orig_node = dev_to_node(dev);
5703 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5705 if (tx_ring->q_vector)
5706 ring_node = tx_ring->q_vector->numa_node;
5708 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5709 if (!tx_ring->tx_buffer_info)
5710 tx_ring->tx_buffer_info = vzalloc(size);
5711 if (!tx_ring->tx_buffer_info)
5714 u64_stats_init(&tx_ring->syncp);
5716 /* round up to nearest 4K */
5717 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5718 tx_ring->size = ALIGN(tx_ring->size, 4096);
5720 set_dev_node(dev, ring_node);
5721 tx_ring->desc = dma_alloc_coherent(dev,
5725 set_dev_node(dev, orig_node);
5727 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5728 &tx_ring->dma, GFP_KERNEL);
5732 tx_ring->next_to_use = 0;
5733 tx_ring->next_to_clean = 0;
5737 vfree(tx_ring->tx_buffer_info);
5738 tx_ring->tx_buffer_info = NULL;
5739 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5744 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5745 * @adapter: board private structure
5747 * If this function returns with an error, then it's possible one or
5748 * more of the rings is populated (while the rest are not). It is the
5749 * callers duty to clean those orphaned rings.
5751 * Return 0 on success, negative on failure
5753 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5757 for (i = 0; i < adapter->num_tx_queues; i++) {
5758 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5762 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5768 /* rewind the index freeing the rings as we go */
5770 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5775 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5776 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5778 * Returns 0 on success, negative on failure
5780 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5782 struct device *dev = rx_ring->dev;
5783 int orig_node = dev_to_node(dev);
5787 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5789 if (rx_ring->q_vector)
5790 ring_node = rx_ring->q_vector->numa_node;
5792 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5793 if (!rx_ring->rx_buffer_info)
5794 rx_ring->rx_buffer_info = vzalloc(size);
5795 if (!rx_ring->rx_buffer_info)
5798 u64_stats_init(&rx_ring->syncp);
5800 /* Round up to nearest 4K */
5801 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5802 rx_ring->size = ALIGN(rx_ring->size, 4096);
5804 set_dev_node(dev, ring_node);
5805 rx_ring->desc = dma_alloc_coherent(dev,
5809 set_dev_node(dev, orig_node);
5811 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5812 &rx_ring->dma, GFP_KERNEL);
5816 rx_ring->next_to_clean = 0;
5817 rx_ring->next_to_use = 0;
5821 vfree(rx_ring->rx_buffer_info);
5822 rx_ring->rx_buffer_info = NULL;
5823 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5828 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5829 * @adapter: board private structure
5831 * If this function returns with an error, then it's possible one or
5832 * more of the rings is populated (while the rest are not). It is the
5833 * callers duty to clean those orphaned rings.
5835 * Return 0 on success, negative on failure
5837 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5841 for (i = 0; i < adapter->num_rx_queues; i++) {
5842 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5846 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5851 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5856 /* rewind the index freeing the rings as we go */
5858 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5863 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5864 * @tx_ring: Tx descriptor ring for a specific queue
5866 * Free all transmit software resources
5868 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5870 ixgbe_clean_tx_ring(tx_ring);
5872 vfree(tx_ring->tx_buffer_info);
5873 tx_ring->tx_buffer_info = NULL;
5875 /* if not set, then don't free */
5879 dma_free_coherent(tx_ring->dev, tx_ring->size,
5880 tx_ring->desc, tx_ring->dma);
5882 tx_ring->desc = NULL;
5886 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5887 * @adapter: board private structure
5889 * Free all transmit software resources
5891 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5895 for (i = 0; i < adapter->num_tx_queues; i++)
5896 if (adapter->tx_ring[i]->desc)
5897 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5901 * ixgbe_free_rx_resources - Free Rx Resources
5902 * @rx_ring: ring to clean the resources from
5904 * Free all receive software resources
5906 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5908 ixgbe_clean_rx_ring(rx_ring);
5910 vfree(rx_ring->rx_buffer_info);
5911 rx_ring->rx_buffer_info = NULL;
5913 /* if not set, then don't free */
5917 dma_free_coherent(rx_ring->dev, rx_ring->size,
5918 rx_ring->desc, rx_ring->dma);
5920 rx_ring->desc = NULL;
5924 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5925 * @adapter: board private structure
5927 * Free all receive software resources
5929 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5934 ixgbe_free_fcoe_ddp_resources(adapter);
5937 for (i = 0; i < adapter->num_rx_queues; i++)
5938 if (adapter->rx_ring[i]->desc)
5939 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5943 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5944 * @netdev: network interface device structure
5945 * @new_mtu: new value for maximum frame size
5947 * Returns 0 on success, negative on failure
5949 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5951 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5952 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5954 /* MTU < 68 is an error and causes problems on some kernels */
5955 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5959 * For 82599EB we cannot allow legacy VFs to enable their receive
5960 * paths when MTU greater than 1500 is configured. So display a
5961 * warning that legacy VFs will be disabled.
5963 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5964 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5965 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5966 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5968 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5970 /* must set new MTU before calling down or up */
5971 netdev->mtu = new_mtu;
5973 if (netif_running(netdev))
5974 ixgbe_reinit_locked(adapter);
5980 * ixgbe_open - Called when a network interface is made active
5981 * @netdev: network interface device structure
5983 * Returns 0 on success, negative value on failure
5985 * The open entry point is called when a network interface is made
5986 * active by the system (IFF_UP). At this point all resources needed
5987 * for transmit and receive operations are allocated, the interrupt
5988 * handler is registered with the OS, the watchdog timer is started,
5989 * and the stack is notified that the interface is ready.
5991 static int ixgbe_open(struct net_device *netdev)
5993 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5994 struct ixgbe_hw *hw = &adapter->hw;
5997 /* disallow open during test */
5998 if (test_bit(__IXGBE_TESTING, &adapter->state))
6001 netif_carrier_off(netdev);
6003 /* allocate transmit descriptors */
6004 err = ixgbe_setup_all_tx_resources(adapter);
6008 /* allocate receive descriptors */
6009 err = ixgbe_setup_all_rx_resources(adapter);
6013 ixgbe_configure(adapter);
6015 err = ixgbe_request_irq(adapter);
6019 /* Notify the stack of the actual queue counts. */
6020 if (adapter->num_rx_pools > 1)
6021 queues = adapter->num_rx_queues_per_pool;
6023 queues = adapter->num_tx_queues;
6025 err = netif_set_real_num_tx_queues(netdev, queues);
6027 goto err_set_queues;
6029 if (adapter->num_rx_pools > 1 &&
6030 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6031 queues = IXGBE_MAX_L2A_QUEUES;
6033 queues = adapter->num_rx_queues;
6034 err = netif_set_real_num_rx_queues(netdev, queues);
6036 goto err_set_queues;
6038 ixgbe_ptp_init(adapter);
6040 ixgbe_up_complete(adapter);
6042 ixgbe_clear_vxlan_port(adapter);
6043 #ifdef CONFIG_IXGBE_VXLAN
6044 vxlan_get_rx_port(netdev);
6050 ixgbe_free_irq(adapter);
6052 ixgbe_free_all_rx_resources(adapter);
6053 if (hw->phy.ops.set_phy_power && !adapter->wol)
6054 hw->phy.ops.set_phy_power(&adapter->hw, false);
6056 ixgbe_free_all_tx_resources(adapter);
6058 ixgbe_reset(adapter);
6063 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6065 ixgbe_ptp_suspend(adapter);
6067 if (adapter->hw.phy.ops.enter_lplu) {
6068 adapter->hw.phy.reset_disable = true;
6069 ixgbe_down(adapter);
6070 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6071 adapter->hw.phy.reset_disable = false;
6073 ixgbe_down(adapter);
6076 ixgbe_free_irq(adapter);
6078 ixgbe_free_all_tx_resources(adapter);
6079 ixgbe_free_all_rx_resources(adapter);
6083 * ixgbe_close - Disables a network interface
6084 * @netdev: network interface device structure
6086 * Returns 0, this is not allowed to fail
6088 * The close entry point is called when an interface is de-activated
6089 * by the OS. The hardware is still under the drivers control, but
6090 * needs to be disabled. A global MAC reset is issued to stop the
6091 * hardware, and all transmit and receive resources are freed.
6093 static int ixgbe_close(struct net_device *netdev)
6095 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6097 ixgbe_ptp_stop(adapter);
6099 ixgbe_close_suspend(adapter);
6101 ixgbe_fdir_filter_exit(adapter);
6103 ixgbe_release_hw_control(adapter);
6109 static int ixgbe_resume(struct pci_dev *pdev)
6111 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6112 struct net_device *netdev = adapter->netdev;
6115 adapter->hw.hw_addr = adapter->io_addr;
6116 pci_set_power_state(pdev, PCI_D0);
6117 pci_restore_state(pdev);
6119 * pci_restore_state clears dev->state_saved so call
6120 * pci_save_state to restore it.
6122 pci_save_state(pdev);
6124 err = pci_enable_device_mem(pdev);
6126 e_dev_err("Cannot enable PCI device from suspend\n");
6129 smp_mb__before_atomic();
6130 clear_bit(__IXGBE_DISABLED, &adapter->state);
6131 pci_set_master(pdev);
6133 pci_wake_from_d3(pdev, false);
6135 ixgbe_reset(adapter);
6137 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6140 err = ixgbe_init_interrupt_scheme(adapter);
6141 if (!err && netif_running(netdev))
6142 err = ixgbe_open(netdev);
6149 netif_device_attach(netdev);
6153 #endif /* CONFIG_PM */
6155 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6157 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6158 struct net_device *netdev = adapter->netdev;
6159 struct ixgbe_hw *hw = &adapter->hw;
6161 u32 wufc = adapter->wol;
6166 netif_device_detach(netdev);
6169 if (netif_running(netdev))
6170 ixgbe_close_suspend(adapter);
6173 ixgbe_clear_interrupt_scheme(adapter);
6176 retval = pci_save_state(pdev);
6181 if (hw->mac.ops.stop_link_on_d3)
6182 hw->mac.ops.stop_link_on_d3(hw);
6185 ixgbe_set_rx_mode(netdev);
6187 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6188 if (hw->mac.ops.enable_tx_laser)
6189 hw->mac.ops.enable_tx_laser(hw);
6191 /* turn on all-multi mode if wake on multicast is enabled */
6192 if (wufc & IXGBE_WUFC_MC) {
6193 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6194 fctrl |= IXGBE_FCTRL_MPE;
6195 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6198 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6199 ctrl |= IXGBE_CTRL_GIO_DIS;
6200 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6202 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6204 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6205 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6208 switch (hw->mac.type) {
6209 case ixgbe_mac_82598EB:
6210 pci_wake_from_d3(pdev, false);
6212 case ixgbe_mac_82599EB:
6213 case ixgbe_mac_X540:
6214 case ixgbe_mac_X550:
6215 case ixgbe_mac_X550EM_x:
6216 pci_wake_from_d3(pdev, !!wufc);
6222 *enable_wake = !!wufc;
6223 if (hw->phy.ops.set_phy_power && !*enable_wake)
6224 hw->phy.ops.set_phy_power(hw, false);
6226 ixgbe_release_hw_control(adapter);
6228 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6229 pci_disable_device(pdev);
6235 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6240 retval = __ixgbe_shutdown(pdev, &wake);
6245 pci_prepare_to_sleep(pdev);
6247 pci_wake_from_d3(pdev, false);
6248 pci_set_power_state(pdev, PCI_D3hot);
6253 #endif /* CONFIG_PM */
6255 static void ixgbe_shutdown(struct pci_dev *pdev)
6259 __ixgbe_shutdown(pdev, &wake);
6261 if (system_state == SYSTEM_POWER_OFF) {
6262 pci_wake_from_d3(pdev, wake);
6263 pci_set_power_state(pdev, PCI_D3hot);
6268 * ixgbe_update_stats - Update the board statistics counters.
6269 * @adapter: board private structure
6271 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6273 struct net_device *netdev = adapter->netdev;
6274 struct ixgbe_hw *hw = &adapter->hw;
6275 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6277 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6278 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6279 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6280 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6282 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6283 test_bit(__IXGBE_RESETTING, &adapter->state))
6286 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6289 for (i = 0; i < adapter->num_rx_queues; i++) {
6290 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6291 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6293 adapter->rsc_total_count = rsc_count;
6294 adapter->rsc_total_flush = rsc_flush;
6297 for (i = 0; i < adapter->num_rx_queues; i++) {
6298 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6299 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6300 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6301 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6302 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6303 bytes += rx_ring->stats.bytes;
6304 packets += rx_ring->stats.packets;
6306 adapter->non_eop_descs = non_eop_descs;
6307 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6308 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6309 adapter->hw_csum_rx_error = hw_csum_rx_error;
6310 netdev->stats.rx_bytes = bytes;
6311 netdev->stats.rx_packets = packets;
6315 /* gather some stats to the adapter struct that are per queue */
6316 for (i = 0; i < adapter->num_tx_queues; i++) {
6317 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6318 restart_queue += tx_ring->tx_stats.restart_queue;
6319 tx_busy += tx_ring->tx_stats.tx_busy;
6320 bytes += tx_ring->stats.bytes;
6321 packets += tx_ring->stats.packets;
6323 adapter->restart_queue = restart_queue;
6324 adapter->tx_busy = tx_busy;
6325 netdev->stats.tx_bytes = bytes;
6326 netdev->stats.tx_packets = packets;
6328 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6330 /* 8 register reads */
6331 for (i = 0; i < 8; i++) {
6332 /* for packet buffers not used, the register should read 0 */
6333 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6335 hwstats->mpc[i] += mpc;
6336 total_mpc += hwstats->mpc[i];
6337 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6338 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6339 switch (hw->mac.type) {
6340 case ixgbe_mac_82598EB:
6341 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6342 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6343 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6344 hwstats->pxonrxc[i] +=
6345 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6347 case ixgbe_mac_82599EB:
6348 case ixgbe_mac_X540:
6349 case ixgbe_mac_X550:
6350 case ixgbe_mac_X550EM_x:
6351 hwstats->pxonrxc[i] +=
6352 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6359 /*16 register reads */
6360 for (i = 0; i < 16; i++) {
6361 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6362 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6363 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6364 (hw->mac.type == ixgbe_mac_X540) ||
6365 (hw->mac.type == ixgbe_mac_X550) ||
6366 (hw->mac.type == ixgbe_mac_X550EM_x)) {
6367 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6368 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6369 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6370 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6374 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6375 /* work around hardware counting issue */
6376 hwstats->gprc -= missed_rx;
6378 ixgbe_update_xoff_received(adapter);
6380 /* 82598 hardware only has a 32 bit counter in the high register */
6381 switch (hw->mac.type) {
6382 case ixgbe_mac_82598EB:
6383 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6384 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6385 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6386 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6388 case ixgbe_mac_X540:
6389 case ixgbe_mac_X550:
6390 case ixgbe_mac_X550EM_x:
6391 /* OS2BMC stats are X540 and later */
6392 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6393 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6394 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6395 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6396 case ixgbe_mac_82599EB:
6397 for (i = 0; i < 16; i++)
6398 adapter->hw_rx_no_dma_resources +=
6399 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6400 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6401 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6402 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6403 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6404 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6405 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6406 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6407 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6408 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6410 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6411 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6412 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6413 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6414 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6415 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6416 /* Add up per cpu counters for total ddp aloc fail */
6417 if (adapter->fcoe.ddp_pool) {
6418 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6419 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6421 u64 noddp = 0, noddp_ext_buff = 0;
6422 for_each_possible_cpu(cpu) {
6423 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6424 noddp += ddp_pool->noddp;
6425 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6427 hwstats->fcoe_noddp = noddp;
6428 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6430 #endif /* IXGBE_FCOE */
6435 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6436 hwstats->bprc += bprc;
6437 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6438 if (hw->mac.type == ixgbe_mac_82598EB)
6439 hwstats->mprc -= bprc;
6440 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6441 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6442 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6443 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6444 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6445 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6446 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6447 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6448 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6449 hwstats->lxontxc += lxon;
6450 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6451 hwstats->lxofftxc += lxoff;
6452 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6453 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6455 * 82598 errata - tx of flow control packets is included in tx counters
6457 xon_off_tot = lxon + lxoff;
6458 hwstats->gptc -= xon_off_tot;
6459 hwstats->mptc -= xon_off_tot;
6460 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6461 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6462 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6463 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6464 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6465 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6466 hwstats->ptc64 -= xon_off_tot;
6467 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6468 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6469 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6470 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6471 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6472 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6474 /* Fill out the OS statistics structure */
6475 netdev->stats.multicast = hwstats->mprc;
6478 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6479 netdev->stats.rx_dropped = 0;
6480 netdev->stats.rx_length_errors = hwstats->rlec;
6481 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6482 netdev->stats.rx_missed_errors = total_mpc;
6486 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6487 * @adapter: pointer to the device adapter structure
6489 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6491 struct ixgbe_hw *hw = &adapter->hw;
6494 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6497 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6499 /* if interface is down do nothing */
6500 if (test_bit(__IXGBE_DOWN, &adapter->state))
6503 /* do nothing if we are not using signature filters */
6504 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6507 adapter->fdir_overflow++;
6509 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6510 for (i = 0; i < adapter->num_tx_queues; i++)
6511 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6512 &(adapter->tx_ring[i]->state));
6513 /* re-enable flow director interrupts */
6514 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6516 e_err(probe, "failed to finish FDIR re-initialization, "
6517 "ignored adding FDIR ATR filters\n");
6522 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6523 * @adapter: pointer to the device adapter structure
6525 * This function serves two purposes. First it strobes the interrupt lines
6526 * in order to make certain interrupts are occurring. Secondly it sets the
6527 * bits needed to check for TX hangs. As a result we should immediately
6528 * determine if a hang has occurred.
6530 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6532 struct ixgbe_hw *hw = &adapter->hw;
6536 /* If we're down, removing or resetting, just bail */
6537 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6538 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6539 test_bit(__IXGBE_RESETTING, &adapter->state))
6542 /* Force detection of hung controller */
6543 if (netif_carrier_ok(adapter->netdev)) {
6544 for (i = 0; i < adapter->num_tx_queues; i++)
6545 set_check_for_tx_hang(adapter->tx_ring[i]);
6548 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6550 * for legacy and MSI interrupts don't set any bits
6551 * that are enabled for EIAM, because this operation
6552 * would set *both* EIMS and EICS for any bit in EIAM
6554 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6555 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6557 /* get one bit for every active tx/rx interrupt vector */
6558 for (i = 0; i < adapter->num_q_vectors; i++) {
6559 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6560 if (qv->rx.ring || qv->tx.ring)
6561 eics |= ((u64)1 << i);
6565 /* Cause software interrupt to ensure rings are cleaned */
6566 ixgbe_irq_rearm_queues(adapter, eics);
6570 * ixgbe_watchdog_update_link - update the link status
6571 * @adapter: pointer to the device adapter structure
6572 * @link_speed: pointer to a u32 to store the link_speed
6574 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6576 struct ixgbe_hw *hw = &adapter->hw;
6577 u32 link_speed = adapter->link_speed;
6578 bool link_up = adapter->link_up;
6579 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6581 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6584 if (hw->mac.ops.check_link) {
6585 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6587 /* always assume link is up, if no check link function */
6588 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6592 if (adapter->ixgbe_ieee_pfc)
6593 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6595 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6596 hw->mac.ops.fc_enable(hw);
6597 ixgbe_set_rx_drop_en(adapter);
6601 time_after(jiffies, (adapter->link_check_timeout +
6602 IXGBE_TRY_LINK_TIMEOUT))) {
6603 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6604 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6605 IXGBE_WRITE_FLUSH(hw);
6608 adapter->link_up = link_up;
6609 adapter->link_speed = link_speed;
6612 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6614 #ifdef CONFIG_IXGBE_DCB
6615 struct net_device *netdev = adapter->netdev;
6616 struct dcb_app app = {
6617 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6622 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6623 up = dcb_ieee_getapp_mask(netdev, &app);
6625 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6630 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6631 * print link up message
6632 * @adapter: pointer to the device adapter structure
6634 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6636 struct net_device *netdev = adapter->netdev;
6637 struct ixgbe_hw *hw = &adapter->hw;
6638 struct net_device *upper;
6639 struct list_head *iter;
6640 u32 link_speed = adapter->link_speed;
6641 const char *speed_str;
6642 bool flow_rx, flow_tx;
6644 /* only continue if link was previously down */
6645 if (netif_carrier_ok(netdev))
6648 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6650 switch (hw->mac.type) {
6651 case ixgbe_mac_82598EB: {
6652 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6653 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6654 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6655 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6658 case ixgbe_mac_X540:
6659 case ixgbe_mac_X550:
6660 case ixgbe_mac_X550EM_x:
6661 case ixgbe_mac_82599EB: {
6662 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6663 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6664 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6665 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6674 adapter->last_rx_ptp_check = jiffies;
6676 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6677 ixgbe_ptp_start_cyclecounter(adapter);
6679 switch (link_speed) {
6680 case IXGBE_LINK_SPEED_10GB_FULL:
6681 speed_str = "10 Gbps";
6683 case IXGBE_LINK_SPEED_2_5GB_FULL:
6684 speed_str = "2.5 Gbps";
6686 case IXGBE_LINK_SPEED_1GB_FULL:
6687 speed_str = "1 Gbps";
6689 case IXGBE_LINK_SPEED_100_FULL:
6690 speed_str = "100 Mbps";
6693 speed_str = "unknown speed";
6696 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6697 ((flow_rx && flow_tx) ? "RX/TX" :
6699 (flow_tx ? "TX" : "None"))));
6701 netif_carrier_on(netdev);
6702 ixgbe_check_vf_rate_limit(adapter);
6704 /* enable transmits */
6705 netif_tx_wake_all_queues(adapter->netdev);
6707 /* enable any upper devices */
6709 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6710 if (netif_is_macvlan(upper)) {
6711 struct macvlan_dev *vlan = netdev_priv(upper);
6714 netif_tx_wake_all_queues(upper);
6719 /* update the default user priority for VFs */
6720 ixgbe_update_default_up(adapter);
6722 /* ping all the active vfs to let them know link has changed */
6723 ixgbe_ping_all_vfs(adapter);
6727 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6728 * print link down message
6729 * @adapter: pointer to the adapter structure
6731 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6733 struct net_device *netdev = adapter->netdev;
6734 struct ixgbe_hw *hw = &adapter->hw;
6736 adapter->link_up = false;
6737 adapter->link_speed = 0;
6739 /* only continue if link was up previously */
6740 if (!netif_carrier_ok(netdev))
6743 /* poll for SFP+ cable when link is down */
6744 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6745 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6747 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6748 ixgbe_ptp_start_cyclecounter(adapter);
6750 e_info(drv, "NIC Link is Down\n");
6751 netif_carrier_off(netdev);
6753 /* ping all the active vfs to let them know link has changed */
6754 ixgbe_ping_all_vfs(adapter);
6757 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6761 for (i = 0; i < adapter->num_tx_queues; i++) {
6762 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6764 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6771 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6773 struct ixgbe_hw *hw = &adapter->hw;
6774 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6775 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6779 if (!adapter->num_vfs)
6782 /* resetting the PF is only needed for MAC before X550 */
6783 if (hw->mac.type >= ixgbe_mac_X550)
6786 for (i = 0; i < adapter->num_vfs; i++) {
6787 for (j = 0; j < q_per_pool; j++) {
6790 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6791 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6802 * ixgbe_watchdog_flush_tx - flush queues on link down
6803 * @adapter: pointer to the device adapter structure
6805 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6807 if (!netif_carrier_ok(adapter->netdev)) {
6808 if (ixgbe_ring_tx_pending(adapter) ||
6809 ixgbe_vf_tx_pending(adapter)) {
6810 /* We've lost link, so the controller stops DMA,
6811 * but we've got queued Tx work that's never going
6812 * to get done, so reset controller to flush Tx.
6813 * (Do the reset outside of interrupt context).
6815 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6816 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6821 #ifdef CONFIG_PCI_IOV
6822 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6823 struct pci_dev *vfdev)
6825 if (!pci_wait_for_pending_transaction(vfdev))
6826 e_dev_warn("Issuing VFLR with pending transactions\n");
6828 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6829 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6834 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6836 struct ixgbe_hw *hw = &adapter->hw;
6837 struct pci_dev *pdev = adapter->pdev;
6841 if (!(netif_carrier_ok(adapter->netdev)))
6844 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6845 if (gpc) /* If incrementing then no need for the check below */
6847 /* Check to see if a bad DMA write target from an errant or
6848 * malicious VF has caused a PCIe error. If so then we can
6849 * issue a VFLR to the offending VF(s) and then resume without
6850 * requesting a full slot reset.
6856 /* check status reg for all VFs owned by this PF */
6857 for (vf = 0; vf < adapter->num_vfs; ++vf) {
6858 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
6863 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6864 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
6865 status_reg & PCI_STATUS_REC_MASTER_ABORT)
6866 ixgbe_issue_vf_flr(adapter, vfdev);
6870 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6874 /* Do not perform spoof check for 82598 or if not in IOV mode */
6875 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6876 adapter->num_vfs == 0)
6879 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6882 * ssvpc register is cleared on read, if zero then no
6883 * spoofed packets in the last interval.
6888 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6891 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6896 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6899 #endif /* CONFIG_PCI_IOV */
6903 * ixgbe_watchdog_subtask - check and bring link up
6904 * @adapter: pointer to the device adapter structure
6906 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6908 /* if interface is down, removing or resetting, do nothing */
6909 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6910 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6911 test_bit(__IXGBE_RESETTING, &adapter->state))
6914 ixgbe_watchdog_update_link(adapter);
6916 if (adapter->link_up)
6917 ixgbe_watchdog_link_is_up(adapter);
6919 ixgbe_watchdog_link_is_down(adapter);
6921 ixgbe_check_for_bad_vf(adapter);
6922 ixgbe_spoof_check(adapter);
6923 ixgbe_update_stats(adapter);
6925 ixgbe_watchdog_flush_tx(adapter);
6929 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6930 * @adapter: the ixgbe adapter structure
6932 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6934 struct ixgbe_hw *hw = &adapter->hw;
6937 /* not searching for SFP so there is nothing to do here */
6938 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6939 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6942 if (adapter->sfp_poll_time &&
6943 time_after(adapter->sfp_poll_time, jiffies))
6944 return; /* If not yet time to poll for SFP */
6946 /* someone else is in init, wait until next service event */
6947 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6950 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
6952 err = hw->phy.ops.identify_sfp(hw);
6953 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6956 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6957 /* If no cable is present, then we need to reset
6958 * the next time we find a good cable. */
6959 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6966 /* exit if reset not needed */
6967 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6970 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6973 * A module may be identified correctly, but the EEPROM may not have
6974 * support for that module. setup_sfp() will fail in that case, so
6975 * we should not allow that module to load.
6977 if (hw->mac.type == ixgbe_mac_82598EB)
6978 err = hw->phy.ops.reset(hw);
6980 err = hw->mac.ops.setup_sfp(hw);
6982 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6985 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6986 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6989 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6991 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6992 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6993 e_dev_err("failed to initialize because an unsupported "
6994 "SFP+ module type was detected.\n");
6995 e_dev_err("Reload the driver after installing a "
6996 "supported module.\n");
6997 unregister_netdev(adapter->netdev);
7002 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7003 * @adapter: the ixgbe adapter structure
7005 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7007 struct ixgbe_hw *hw = &adapter->hw;
7009 bool autoneg = false;
7011 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7014 /* someone else is in init, wait until next service event */
7015 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7018 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7020 speed = hw->phy.autoneg_advertised;
7021 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7022 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7024 /* setup the highest link when no autoneg */
7026 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7027 speed = IXGBE_LINK_SPEED_10GB_FULL;
7031 if (hw->mac.ops.setup_link)
7032 hw->mac.ops.setup_link(hw, speed, true);
7034 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7035 adapter->link_check_timeout = jiffies;
7036 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7040 * ixgbe_service_timer - Timer Call-back
7041 * @data: pointer to adapter cast into an unsigned long
7043 static void ixgbe_service_timer(unsigned long data)
7045 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7046 unsigned long next_event_offset;
7048 /* poll faster when waiting for link */
7049 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7050 next_event_offset = HZ / 10;
7052 next_event_offset = HZ * 2;
7054 /* Reset the timer */
7055 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7057 ixgbe_service_event_schedule(adapter);
7060 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7062 struct ixgbe_hw *hw = &adapter->hw;
7065 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7068 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7070 if (!hw->phy.ops.handle_lasi)
7073 status = hw->phy.ops.handle_lasi(&adapter->hw);
7074 if (status != IXGBE_ERR_OVERTEMP)
7077 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7080 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7082 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
7085 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
7087 /* If we're already down, removing or resetting, just bail */
7088 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7089 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7090 test_bit(__IXGBE_RESETTING, &adapter->state))
7093 ixgbe_dump(adapter);
7094 netdev_err(adapter->netdev, "Reset adapter\n");
7095 adapter->tx_timeout_count++;
7098 ixgbe_reinit_locked(adapter);
7103 * ixgbe_service_task - manages and runs subtasks
7104 * @work: pointer to work_struct containing our data
7106 static void ixgbe_service_task(struct work_struct *work)
7108 struct ixgbe_adapter *adapter = container_of(work,
7109 struct ixgbe_adapter,
7111 if (ixgbe_removed(adapter->hw.hw_addr)) {
7112 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7114 ixgbe_down(adapter);
7117 ixgbe_service_event_complete(adapter);
7120 #ifdef CONFIG_IXGBE_VXLAN
7121 if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
7122 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
7123 vxlan_get_rx_port(adapter->netdev);
7125 #endif /* CONFIG_IXGBE_VXLAN */
7126 ixgbe_reset_subtask(adapter);
7127 ixgbe_phy_interrupt_subtask(adapter);
7128 ixgbe_sfp_detection_subtask(adapter);
7129 ixgbe_sfp_link_config_subtask(adapter);
7130 ixgbe_check_overtemp_subtask(adapter);
7131 ixgbe_watchdog_subtask(adapter);
7132 ixgbe_fdir_reinit_subtask(adapter);
7133 ixgbe_check_hang_subtask(adapter);
7135 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7136 ixgbe_ptp_overflow_check(adapter);
7137 ixgbe_ptp_rx_hang(adapter);
7140 ixgbe_service_event_complete(adapter);
7143 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7144 struct ixgbe_tx_buffer *first,
7147 struct sk_buff *skb = first->skb;
7148 u32 vlan_macip_lens, type_tucmd;
7149 u32 mss_l4len_idx, l4len;
7152 if (skb->ip_summed != CHECKSUM_PARTIAL)
7155 if (!skb_is_gso(skb))
7158 err = skb_cow_head(skb, 0);
7162 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7163 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7165 if (first->protocol == htons(ETH_P_IP)) {
7166 struct iphdr *iph = ip_hdr(skb);
7169 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
7173 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7174 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7175 IXGBE_TX_FLAGS_CSUM |
7176 IXGBE_TX_FLAGS_IPV4;
7177 } else if (skb_is_gso_v6(skb)) {
7178 ipv6_hdr(skb)->payload_len = 0;
7179 tcp_hdr(skb)->check =
7180 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
7181 &ipv6_hdr(skb)->daddr,
7183 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7184 IXGBE_TX_FLAGS_CSUM;
7187 /* compute header lengths */
7188 l4len = tcp_hdrlen(skb);
7189 *hdr_len = skb_transport_offset(skb) + l4len;
7191 /* update gso size and bytecount with header size */
7192 first->gso_segs = skb_shinfo(skb)->gso_segs;
7193 first->bytecount += (first->gso_segs - 1) * *hdr_len;
7195 /* mss_l4len_id: use 0 as index for TSO */
7196 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
7197 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7199 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7200 vlan_macip_lens = skb_network_header_len(skb);
7201 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7202 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7204 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7210 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7211 struct ixgbe_tx_buffer *first)
7213 struct sk_buff *skb = first->skb;
7214 u32 vlan_macip_lens = 0;
7215 u32 mss_l4len_idx = 0;
7218 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7219 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
7220 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
7222 vlan_macip_lens = skb_network_offset(skb) <<
7223 IXGBE_ADVTXD_MACLEN_SHIFT;
7228 struct ipv6hdr *ipv6;
7232 struct tcphdr *tcphdr;
7237 if (skb->encapsulation) {
7238 network_hdr.raw = skb_inner_network_header(skb);
7239 transport_hdr.raw = skb_inner_transport_header(skb);
7240 vlan_macip_lens = skb_inner_network_offset(skb) <<
7241 IXGBE_ADVTXD_MACLEN_SHIFT;
7243 network_hdr.raw = skb_network_header(skb);
7244 transport_hdr.raw = skb_transport_header(skb);
7245 vlan_macip_lens = skb_network_offset(skb) <<
7246 IXGBE_ADVTXD_MACLEN_SHIFT;
7249 /* use first 4 bits to determine IP version */
7250 switch (network_hdr.ipv4->version) {
7252 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7253 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7254 l4_hdr = network_hdr.ipv4->protocol;
7257 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7258 l4_hdr = network_hdr.ipv6->nexthdr;
7259 if (likely((transport_hdr.raw - network_hdr.raw) ==
7260 sizeof(struct ipv6hdr)))
7262 ipv6_skip_exthdr(skb, network_hdr.raw - skb->data +
7263 sizeof(struct ipv6hdr),
7264 &l4_hdr, &frag_off);
7265 if (unlikely(frag_off))
7266 l4_hdr = NEXTHDR_FRAGMENT;
7274 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7275 mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7276 IXGBE_ADVTXD_L4LEN_SHIFT;
7279 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7280 mss_l4len_idx = sizeof(struct sctphdr) <<
7281 IXGBE_ADVTXD_L4LEN_SHIFT;
7284 mss_l4len_idx = sizeof(struct udphdr) <<
7285 IXGBE_ADVTXD_L4LEN_SHIFT;
7288 if (unlikely(net_ratelimit())) {
7289 dev_warn(tx_ring->dev,
7290 "partial checksum, version=%d, l4 proto=%x\n",
7291 network_hdr.ipv4->version, l4_hdr);
7293 skb_checksum_help(skb);
7297 /* update TX checksum flag */
7298 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7302 /* vlan_macip_lens: MACLEN, VLAN tag */
7303 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7305 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7306 type_tucmd, mss_l4len_idx);
7309 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7310 ((_flag <= _result) ? \
7311 ((u32)(_input & _flag) * (_result / _flag)) : \
7312 ((u32)(_input & _flag) / (_flag / _result)))
7314 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7316 /* set type for advanced descriptor with frame checksum insertion */
7317 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7318 IXGBE_ADVTXD_DCMD_DEXT |
7319 IXGBE_ADVTXD_DCMD_IFCS;
7321 /* set HW vlan bit if vlan is present */
7322 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7323 IXGBE_ADVTXD_DCMD_VLE);
7325 /* set segmentation enable bits for TSO/FSO */
7326 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7327 IXGBE_ADVTXD_DCMD_TSE);
7329 /* set timestamp bit if present */
7330 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7331 IXGBE_ADVTXD_MAC_TSTAMP);
7333 /* insert frame checksum */
7334 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7339 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7340 u32 tx_flags, unsigned int paylen)
7342 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7344 /* enable L4 checksum for TSO and TX checksum offload */
7345 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7346 IXGBE_TX_FLAGS_CSUM,
7347 IXGBE_ADVTXD_POPTS_TXSM);
7349 /* enble IPv4 checksum for TSO */
7350 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7351 IXGBE_TX_FLAGS_IPV4,
7352 IXGBE_ADVTXD_POPTS_IXSM);
7355 * Check Context must be set if Tx switch is enabled, which it
7356 * always is for case where virtual functions are running
7358 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7362 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7365 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7367 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7369 /* Herbert's original patch had:
7370 * smp_mb__after_netif_stop_queue();
7371 * but since that doesn't exist yet, just open code it.
7375 /* We need to check again in a case another CPU has just
7376 * made room available.
7378 if (likely(ixgbe_desc_unused(tx_ring) < size))
7381 /* A reprieve! - use start_queue because it doesn't call schedule */
7382 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7383 ++tx_ring->tx_stats.restart_queue;
7387 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7389 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7392 return __ixgbe_maybe_stop_tx(tx_ring, size);
7395 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7398 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7399 struct ixgbe_tx_buffer *first,
7402 struct sk_buff *skb = first->skb;
7403 struct ixgbe_tx_buffer *tx_buffer;
7404 union ixgbe_adv_tx_desc *tx_desc;
7405 struct skb_frag_struct *frag;
7407 unsigned int data_len, size;
7408 u32 tx_flags = first->tx_flags;
7409 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7410 u16 i = tx_ring->next_to_use;
7412 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7414 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7416 size = skb_headlen(skb);
7417 data_len = skb->data_len;
7420 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7421 if (data_len < sizeof(struct fcoe_crc_eof)) {
7422 size -= sizeof(struct fcoe_crc_eof) - data_len;
7425 data_len -= sizeof(struct fcoe_crc_eof);
7430 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7434 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7435 if (dma_mapping_error(tx_ring->dev, dma))
7438 /* record length, and DMA address */
7439 dma_unmap_len_set(tx_buffer, len, size);
7440 dma_unmap_addr_set(tx_buffer, dma, dma);
7442 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7444 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7445 tx_desc->read.cmd_type_len =
7446 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7450 if (i == tx_ring->count) {
7451 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7454 tx_desc->read.olinfo_status = 0;
7456 dma += IXGBE_MAX_DATA_PER_TXD;
7457 size -= IXGBE_MAX_DATA_PER_TXD;
7459 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7462 if (likely(!data_len))
7465 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7469 if (i == tx_ring->count) {
7470 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7473 tx_desc->read.olinfo_status = 0;
7476 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7478 size = skb_frag_size(frag);
7482 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7485 tx_buffer = &tx_ring->tx_buffer_info[i];
7488 /* write last descriptor with RS and EOP bits */
7489 cmd_type |= size | IXGBE_TXD_CMD;
7490 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7492 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7494 /* set the timestamp */
7495 first->time_stamp = jiffies;
7498 * Force memory writes to complete before letting h/w know there
7499 * are new descriptors to fetch. (Only applicable for weak-ordered
7500 * memory model archs, such as IA-64).
7502 * We also need this memory barrier to make certain all of the
7503 * status bits have been updated before next_to_watch is written.
7507 /* set next_to_watch value indicating a packet is present */
7508 first->next_to_watch = tx_desc;
7511 if (i == tx_ring->count)
7514 tx_ring->next_to_use = i;
7516 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7518 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7519 writel(i, tx_ring->tail);
7521 /* we need this if more than one processor can write to our tail
7522 * at a time, it synchronizes IO on IA64/Altix systems
7529 dev_err(tx_ring->dev, "TX DMA map failed\n");
7531 /* clear dma mappings for failed tx_buffer_info map */
7533 tx_buffer = &tx_ring->tx_buffer_info[i];
7534 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7535 if (tx_buffer == first)
7542 tx_ring->next_to_use = i;
7545 static void ixgbe_atr(struct ixgbe_ring *ring,
7546 struct ixgbe_tx_buffer *first)
7548 struct ixgbe_q_vector *q_vector = ring->q_vector;
7549 union ixgbe_atr_hash_dword input = { .dword = 0 };
7550 union ixgbe_atr_hash_dword common = { .dword = 0 };
7552 unsigned char *network;
7554 struct ipv6hdr *ipv6;
7557 struct sk_buff *skb;
7558 #ifdef CONFIG_IXGBE_VXLAN
7560 #endif /* CONFIG_IXGBE_VXLAN */
7563 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7567 /* do nothing if sampling is disabled */
7568 if (!ring->atr_sample_rate)
7573 /* snag network header to get L4 type and address */
7575 hdr.network = skb_network_header(skb);
7576 if (!skb->encapsulation) {
7579 #ifdef CONFIG_IXGBE_VXLAN
7580 struct ixgbe_adapter *adapter = q_vector->adapter;
7582 if (!adapter->vxlan_port)
7584 if (first->protocol != htons(ETH_P_IP) ||
7585 hdr.ipv4->version != IPVERSION ||
7586 hdr.ipv4->protocol != IPPROTO_UDP) {
7589 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7592 hdr.network = skb_inner_network_header(skb);
7593 th = inner_tcp_hdr(skb);
7596 #endif /* CONFIG_IXGBE_VXLAN */
7599 /* Currently only IPv4/IPv6 with TCP is supported */
7600 switch (hdr.ipv4->version) {
7602 if (hdr.ipv4->protocol != IPPROTO_TCP)
7606 if (likely((unsigned char *)th - hdr.network ==
7607 sizeof(struct ipv6hdr))) {
7608 if (hdr.ipv6->nexthdr != IPPROTO_TCP)
7614 ipv6_skip_exthdr(skb, hdr.network - skb->data +
7615 sizeof(struct ipv6hdr),
7616 &l4_hdr, &frag_off);
7617 if (unlikely(frag_off))
7619 if (l4_hdr != IPPROTO_TCP)
7627 /* skip this packet since it is invalid or the socket is closing */
7631 /* sample on all syn packets or once every atr sample count */
7632 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7635 /* reset sample count */
7636 ring->atr_count = 0;
7638 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7641 * src and dst are inverted, think how the receiver sees them
7643 * The input is broken into two sections, a non-compressed section
7644 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7645 * is XORed together and stored in the compressed dword.
7647 input.formatted.vlan_id = vlan_id;
7650 * since src port and flex bytes occupy the same word XOR them together
7651 * and write the value to source port portion of compressed dword
7653 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7654 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7656 common.port.src ^= th->dest ^ first->protocol;
7657 common.port.dst ^= th->source;
7659 switch (hdr.ipv4->version) {
7661 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7662 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7665 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7666 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7667 hdr.ipv6->saddr.s6_addr32[1] ^
7668 hdr.ipv6->saddr.s6_addr32[2] ^
7669 hdr.ipv6->saddr.s6_addr32[3] ^
7670 hdr.ipv6->daddr.s6_addr32[0] ^
7671 hdr.ipv6->daddr.s6_addr32[1] ^
7672 hdr.ipv6->daddr.s6_addr32[2] ^
7673 hdr.ipv6->daddr.s6_addr32[3];
7679 #ifdef CONFIG_IXGBE_VXLAN
7681 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7682 #endif /* CONFIG_IXGBE_VXLAN */
7684 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7685 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7686 input, common, ring->queue_index);
7689 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7690 void *accel_priv, select_queue_fallback_t fallback)
7692 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7694 struct ixgbe_adapter *adapter;
7695 struct ixgbe_ring_feature *f;
7700 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7705 * only execute the code below if protocol is FCoE
7706 * or FIP and we have FCoE enabled on the adapter
7708 switch (vlan_get_protocol(skb)) {
7709 case htons(ETH_P_FCOE):
7710 case htons(ETH_P_FIP):
7711 adapter = netdev_priv(dev);
7713 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7716 return fallback(dev, skb);
7719 f = &adapter->ring_feature[RING_F_FCOE];
7721 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7724 while (txq >= f->indices)
7727 return txq + f->offset;
7729 return fallback(dev, skb);
7733 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7734 struct ixgbe_adapter *adapter,
7735 struct ixgbe_ring *tx_ring)
7737 struct ixgbe_tx_buffer *first;
7741 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7742 __be16 protocol = skb->protocol;
7746 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7747 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7748 * + 2 desc gap to keep tail from touching head,
7749 * + 1 desc for context descriptor,
7750 * otherwise try next time
7752 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7753 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7755 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7756 tx_ring->tx_stats.tx_busy++;
7757 return NETDEV_TX_BUSY;
7760 /* record the location of the first descriptor for this packet */
7761 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7763 first->bytecount = skb->len;
7764 first->gso_segs = 1;
7766 /* if we have a HW VLAN tag being added default to the HW one */
7767 if (skb_vlan_tag_present(skb)) {
7768 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7769 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7770 /* else if it is a SW VLAN check the next protocol and store the tag */
7771 } else if (protocol == htons(ETH_P_8021Q)) {
7772 struct vlan_hdr *vhdr, _vhdr;
7773 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7777 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7778 IXGBE_TX_FLAGS_VLAN_SHIFT;
7779 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7781 protocol = vlan_get_protocol(skb);
7783 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7784 adapter->ptp_clock &&
7785 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7787 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7788 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7790 /* schedule check for Tx timestamp */
7791 adapter->ptp_tx_skb = skb_get(skb);
7792 adapter->ptp_tx_start = jiffies;
7793 schedule_work(&adapter->ptp_tx_work);
7796 skb_tx_timestamp(skb);
7798 #ifdef CONFIG_PCI_IOV
7800 * Use the l2switch_enable flag - would be false if the DMA
7801 * Tx switch had been disabled.
7803 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7804 tx_flags |= IXGBE_TX_FLAGS_CC;
7807 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7808 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7809 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7810 (skb->priority != TC_PRIO_CONTROL))) {
7811 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7812 tx_flags |= (skb->priority & 0x7) <<
7813 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7814 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7815 struct vlan_ethhdr *vhdr;
7817 if (skb_cow_head(skb, 0))
7819 vhdr = (struct vlan_ethhdr *)skb->data;
7820 vhdr->h_vlan_TCI = htons(tx_flags >>
7821 IXGBE_TX_FLAGS_VLAN_SHIFT);
7823 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7827 /* record initial flags and protocol */
7828 first->tx_flags = tx_flags;
7829 first->protocol = protocol;
7832 /* setup tx offload for FCoE */
7833 if ((protocol == htons(ETH_P_FCOE)) &&
7834 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7835 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7842 #endif /* IXGBE_FCOE */
7843 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7847 ixgbe_tx_csum(tx_ring, first);
7849 /* add the ATR filter if ATR is on */
7850 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7851 ixgbe_atr(tx_ring, first);
7855 #endif /* IXGBE_FCOE */
7856 ixgbe_tx_map(tx_ring, first, hdr_len);
7858 return NETDEV_TX_OK;
7861 dev_kfree_skb_any(first->skb);
7864 return NETDEV_TX_OK;
7867 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7868 struct net_device *netdev,
7869 struct ixgbe_ring *ring)
7871 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7872 struct ixgbe_ring *tx_ring;
7875 * The minimum packet size for olinfo paylen is 17 so pad the skb
7876 * in order to meet this minimum size requirement.
7878 if (skb_put_padto(skb, 17))
7879 return NETDEV_TX_OK;
7881 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7883 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7886 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7887 struct net_device *netdev)
7889 return __ixgbe_xmit_frame(skb, netdev, NULL);
7893 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7894 * @netdev: network interface device structure
7895 * @p: pointer to an address structure
7897 * Returns 0 on success, negative on failure
7899 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7901 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7902 struct ixgbe_hw *hw = &adapter->hw;
7903 struct sockaddr *addr = p;
7905 if (!is_valid_ether_addr(addr->sa_data))
7906 return -EADDRNOTAVAIL;
7908 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7909 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7911 ixgbe_mac_set_default_filter(adapter);
7917 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7919 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7920 struct ixgbe_hw *hw = &adapter->hw;
7924 if (prtad != hw->phy.mdio.prtad)
7926 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7932 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7933 u16 addr, u16 value)
7935 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7936 struct ixgbe_hw *hw = &adapter->hw;
7938 if (prtad != hw->phy.mdio.prtad)
7940 return hw->phy.ops.write_reg(hw, addr, devad, value);
7943 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7945 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7949 return ixgbe_ptp_set_ts_config(adapter, req);
7951 return ixgbe_ptp_get_ts_config(adapter, req);
7953 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7958 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7960 * @netdev: network interface device structure
7962 * Returns non-zero on failure
7964 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7967 struct ixgbe_adapter *adapter = netdev_priv(dev);
7968 struct ixgbe_hw *hw = &adapter->hw;
7970 if (is_valid_ether_addr(hw->mac.san_addr)) {
7972 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7975 /* update SAN MAC vmdq pool selection */
7976 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7982 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7984 * @netdev: network interface device structure
7986 * Returns non-zero on failure
7988 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7991 struct ixgbe_adapter *adapter = netdev_priv(dev);
7992 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7994 if (is_valid_ether_addr(mac->san_addr)) {
7996 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8002 #ifdef CONFIG_NET_POLL_CONTROLLER
8004 * Polling 'interrupt' - used by things like netconsole to send skbs
8005 * without having to re-enable interrupts. It's not called while
8006 * the interrupt routine is executing.
8008 static void ixgbe_netpoll(struct net_device *netdev)
8010 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8013 /* if interface is down do nothing */
8014 if (test_bit(__IXGBE_DOWN, &adapter->state))
8017 /* loop through and schedule all active queues */
8018 for (i = 0; i < adapter->num_q_vectors; i++)
8019 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8023 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
8024 struct rtnl_link_stats64 *stats)
8026 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8030 for (i = 0; i < adapter->num_rx_queues; i++) {
8031 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8037 start = u64_stats_fetch_begin_irq(&ring->syncp);
8038 packets = ring->stats.packets;
8039 bytes = ring->stats.bytes;
8040 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8041 stats->rx_packets += packets;
8042 stats->rx_bytes += bytes;
8046 for (i = 0; i < adapter->num_tx_queues; i++) {
8047 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8053 start = u64_stats_fetch_begin_irq(&ring->syncp);
8054 packets = ring->stats.packets;
8055 bytes = ring->stats.bytes;
8056 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8057 stats->tx_packets += packets;
8058 stats->tx_bytes += bytes;
8062 /* following stats updated by ixgbe_watchdog_task() */
8063 stats->multicast = netdev->stats.multicast;
8064 stats->rx_errors = netdev->stats.rx_errors;
8065 stats->rx_length_errors = netdev->stats.rx_length_errors;
8066 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8067 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8071 #ifdef CONFIG_IXGBE_DCB
8073 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8074 * @adapter: pointer to ixgbe_adapter
8075 * @tc: number of traffic classes currently enabled
8077 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8078 * 802.1Q priority maps to a packet buffer that exists.
8080 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8082 struct ixgbe_hw *hw = &adapter->hw;
8086 /* 82598 have a static priority to TC mapping that can not
8087 * be changed so no validation is needed.
8089 if (hw->mac.type == ixgbe_mac_82598EB)
8092 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8095 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8096 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8098 /* If up2tc is out of bounds default to zero */
8100 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8104 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8110 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8111 * @adapter: Pointer to adapter struct
8113 * Populate the netdev user priority to tc map
8115 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8117 struct net_device *dev = adapter->netdev;
8118 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8119 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8122 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8125 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8126 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8128 tc = ets->prio_tc[prio];
8130 netdev_set_prio_tc_map(dev, prio, tc);
8134 #endif /* CONFIG_IXGBE_DCB */
8136 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8138 * @netdev: net device to configure
8139 * @tc: number of traffic classes to enable
8141 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8143 struct ixgbe_adapter *adapter = netdev_priv(dev);
8144 struct ixgbe_hw *hw = &adapter->hw;
8147 /* Hardware supports up to 8 traffic classes */
8148 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8151 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8154 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8155 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8158 /* Hardware has to reinitialize queues and interrupts to
8159 * match packet buffer alignment. Unfortunately, the
8160 * hardware is not flexible enough to do this dynamically.
8162 if (netif_running(dev))
8165 ixgbe_reset(adapter);
8167 ixgbe_clear_interrupt_scheme(adapter);
8169 #ifdef CONFIG_IXGBE_DCB
8171 netdev_set_num_tc(dev, tc);
8172 ixgbe_set_prio_tc_map(adapter);
8174 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8176 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8177 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8178 adapter->hw.fc.requested_mode = ixgbe_fc_none;
8181 netdev_reset_tc(dev);
8183 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8184 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8186 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8188 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8189 adapter->dcb_cfg.pfc_mode_enable = false;
8192 ixgbe_validate_rtr(adapter, tc);
8194 #endif /* CONFIG_IXGBE_DCB */
8195 ixgbe_init_interrupt_scheme(adapter);
8197 if (netif_running(dev))
8198 return ixgbe_open(dev);
8203 #ifdef CONFIG_PCI_IOV
8204 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8206 struct net_device *netdev = adapter->netdev;
8209 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8214 void ixgbe_do_reset(struct net_device *netdev)
8216 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8218 if (netif_running(netdev))
8219 ixgbe_reinit_locked(adapter);
8221 ixgbe_reset(adapter);
8224 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8225 netdev_features_t features)
8227 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8229 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8230 if (!(features & NETIF_F_RXCSUM))
8231 features &= ~NETIF_F_LRO;
8233 /* Turn off LRO if not RSC capable */
8234 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8235 features &= ~NETIF_F_LRO;
8240 static int ixgbe_set_features(struct net_device *netdev,
8241 netdev_features_t features)
8243 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8244 netdev_features_t changed = netdev->features ^ features;
8245 bool need_reset = false;
8247 /* Make sure RSC matches LRO, reset if change */
8248 if (!(features & NETIF_F_LRO)) {
8249 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8251 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8252 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8253 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8254 if (adapter->rx_itr_setting == 1 ||
8255 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8256 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8258 } else if ((changed ^ features) & NETIF_F_LRO) {
8259 e_info(probe, "rx-usecs set too low, "
8265 * Check if Flow Director n-tuple support was enabled or disabled. If
8266 * the state changed, we need to reset.
8268 switch (features & NETIF_F_NTUPLE) {
8269 case NETIF_F_NTUPLE:
8270 /* turn off ATR, enable perfect filters and reset */
8271 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8274 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8275 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8278 /* turn off perfect filters, enable ATR and reset */
8279 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8282 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8284 /* We cannot enable ATR if SR-IOV is enabled */
8285 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8288 /* We cannot enable ATR if we have 2 or more traffic classes */
8289 if (netdev_get_num_tc(netdev) > 1)
8292 /* We cannot enable ATR if RSS is disabled */
8293 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8296 /* A sample rate of 0 indicates ATR disabled */
8297 if (!adapter->atr_sample_rate)
8300 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8304 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8305 ixgbe_vlan_strip_enable(adapter);
8307 ixgbe_vlan_strip_disable(adapter);
8309 if (changed & NETIF_F_RXALL)
8312 netdev->features = features;
8314 #ifdef CONFIG_IXGBE_VXLAN
8315 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8316 if (features & NETIF_F_RXCSUM)
8317 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8319 ixgbe_clear_vxlan_port(adapter);
8321 #endif /* CONFIG_IXGBE_VXLAN */
8324 ixgbe_do_reset(netdev);
8329 #ifdef CONFIG_IXGBE_VXLAN
8331 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8332 * @dev: The port's netdev
8333 * @sa_family: Socket Family that VXLAN is notifiying us about
8334 * @port: New UDP port number that VXLAN started listening to
8336 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8339 struct ixgbe_adapter *adapter = netdev_priv(dev);
8340 struct ixgbe_hw *hw = &adapter->hw;
8341 u16 new_port = ntohs(port);
8343 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8346 if (sa_family == AF_INET6)
8349 if (adapter->vxlan_port == new_port)
8352 if (adapter->vxlan_port) {
8354 "Hit Max num of VXLAN ports, not adding port %d\n",
8359 adapter->vxlan_port = new_port;
8360 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8364 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8365 * @dev: The port's netdev
8366 * @sa_family: Socket Family that VXLAN is notifying us about
8367 * @port: UDP port number that VXLAN stopped listening to
8369 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8372 struct ixgbe_adapter *adapter = netdev_priv(dev);
8373 u16 new_port = ntohs(port);
8375 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8378 if (sa_family == AF_INET6)
8381 if (adapter->vxlan_port != new_port) {
8382 netdev_info(dev, "Port %d was not found, not deleting\n",
8387 ixgbe_clear_vxlan_port(adapter);
8388 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8390 #endif /* CONFIG_IXGBE_VXLAN */
8392 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8393 struct net_device *dev,
8394 const unsigned char *addr, u16 vid,
8397 /* guarantee we can provide a unique filter for the unicast address */
8398 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8399 struct ixgbe_adapter *adapter = netdev_priv(dev);
8400 u16 pool = VMDQ_P(0);
8402 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
8406 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8410 * ixgbe_configure_bridge_mode - set various bridge modes
8411 * @adapter - the private structure
8412 * @mode - requested bridge mode
8414 * Configure some settings require for various bridge modes.
8416 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8419 struct ixgbe_hw *hw = &adapter->hw;
8420 unsigned int p, num_pools;
8424 case BRIDGE_MODE_VEPA:
8425 /* disable Tx loopback, rely on switch hairpin mode */
8426 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8428 /* must enable Rx switching replication to allow multicast
8429 * packet reception on all VFs, and to enable source address
8432 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8433 vmdctl |= IXGBE_VT_CTL_REPLEN;
8434 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8436 /* enable Rx source address pruning. Note, this requires
8437 * replication to be enabled or else it does nothing.
8439 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8440 for (p = 0; p < num_pools; p++) {
8441 if (hw->mac.ops.set_source_address_pruning)
8442 hw->mac.ops.set_source_address_pruning(hw,
8447 case BRIDGE_MODE_VEB:
8448 /* enable Tx loopback for internal VF/PF communication */
8449 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8450 IXGBE_PFDTXGSWC_VT_LBEN);
8452 /* disable Rx switching replication unless we have SR-IOV
8455 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8456 if (!adapter->num_vfs)
8457 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8458 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8460 /* disable Rx source address pruning, since we don't expect to
8461 * be receiving external loopback of our transmitted frames.
8463 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8464 for (p = 0; p < num_pools; p++) {
8465 if (hw->mac.ops.set_source_address_pruning)
8466 hw->mac.ops.set_source_address_pruning(hw,
8475 adapter->bridge_mode = mode;
8477 e_info(drv, "enabling bridge mode: %s\n",
8478 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8483 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8484 struct nlmsghdr *nlh, u16 flags)
8486 struct ixgbe_adapter *adapter = netdev_priv(dev);
8487 struct nlattr *attr, *br_spec;
8490 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8493 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8497 nla_for_each_nested(attr, br_spec, rem) {
8501 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8504 if (nla_len(attr) < sizeof(mode))
8507 mode = nla_get_u16(attr);
8508 status = ixgbe_configure_bridge_mode(adapter, mode);
8518 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8519 struct net_device *dev,
8520 u32 filter_mask, int nlflags)
8522 struct ixgbe_adapter *adapter = netdev_priv(dev);
8524 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8527 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8528 adapter->bridge_mode, 0, 0, nlflags,
8532 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8534 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8535 struct ixgbe_adapter *adapter = netdev_priv(pdev);
8536 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8540 /* Hardware has a limited number of available pools. Each VF, and the
8541 * PF require a pool. Check to ensure we don't attempt to use more
8542 * then the available number of pools.
8544 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8545 return ERR_PTR(-EINVAL);
8548 if (vdev->num_rx_queues != vdev->num_tx_queues) {
8549 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8551 return ERR_PTR(-EINVAL);
8554 /* Check for hardware restriction on number of rx/tx queues */
8555 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8556 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8558 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8560 return ERR_PTR(-EINVAL);
8563 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8564 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8565 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8566 return ERR_PTR(-EBUSY);
8568 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8570 return ERR_PTR(-ENOMEM);
8572 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8573 adapter->num_rx_pools++;
8574 set_bit(pool, &adapter->fwd_bitmask);
8575 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8577 /* Enable VMDq flag so device will be set in VM mode */
8578 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8579 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8580 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8582 /* Force reinit of ring allocation with VMDQ enabled */
8583 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8586 fwd_adapter->pool = pool;
8587 fwd_adapter->real_adapter = adapter;
8588 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8591 netif_tx_start_all_queues(vdev);
8594 /* unwind counter and free adapter struct */
8596 "%s: dfwd hardware acceleration failed\n", vdev->name);
8597 clear_bit(pool, &adapter->fwd_bitmask);
8598 adapter->num_rx_pools--;
8600 return ERR_PTR(err);
8603 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8605 struct ixgbe_fwd_adapter *fwd_adapter = priv;
8606 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8609 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8610 adapter->num_rx_pools--;
8612 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8613 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8614 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8615 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8616 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8617 fwd_adapter->pool, adapter->num_rx_pools,
8618 fwd_adapter->rx_base_queue,
8619 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8620 adapter->fwd_bitmask);
8624 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8625 static netdev_features_t
8626 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8627 netdev_features_t features)
8629 if (!skb->encapsulation)
8632 if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8633 IXGBE_MAX_TUNNEL_HDR_LEN))
8634 return features & ~NETIF_F_CSUM_MASK;
8639 static const struct net_device_ops ixgbe_netdev_ops = {
8640 .ndo_open = ixgbe_open,
8641 .ndo_stop = ixgbe_close,
8642 .ndo_start_xmit = ixgbe_xmit_frame,
8643 .ndo_select_queue = ixgbe_select_queue,
8644 .ndo_set_rx_mode = ixgbe_set_rx_mode,
8645 .ndo_validate_addr = eth_validate_addr,
8646 .ndo_set_mac_address = ixgbe_set_mac,
8647 .ndo_change_mtu = ixgbe_change_mtu,
8648 .ndo_tx_timeout = ixgbe_tx_timeout,
8649 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
8650 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
8651 .ndo_do_ioctl = ixgbe_ioctl,
8652 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
8653 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
8654 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
8655 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
8656 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8657 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
8658 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
8659 .ndo_get_stats64 = ixgbe_get_stats64,
8660 #ifdef CONFIG_IXGBE_DCB
8661 .ndo_setup_tc = ixgbe_setup_tc,
8663 #ifdef CONFIG_NET_POLL_CONTROLLER
8664 .ndo_poll_controller = ixgbe_netpoll,
8666 #ifdef CONFIG_NET_RX_BUSY_POLL
8667 .ndo_busy_poll = ixgbe_low_latency_recv,
8670 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8671 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8672 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8673 .ndo_fcoe_enable = ixgbe_fcoe_enable,
8674 .ndo_fcoe_disable = ixgbe_fcoe_disable,
8675 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8676 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8677 #endif /* IXGBE_FCOE */
8678 .ndo_set_features = ixgbe_set_features,
8679 .ndo_fix_features = ixgbe_fix_features,
8680 .ndo_fdb_add = ixgbe_ndo_fdb_add,
8681 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
8682 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
8683 .ndo_dfwd_add_station = ixgbe_fwd_add,
8684 .ndo_dfwd_del_station = ixgbe_fwd_del,
8685 #ifdef CONFIG_IXGBE_VXLAN
8686 .ndo_add_vxlan_port = ixgbe_add_vxlan_port,
8687 .ndo_del_vxlan_port = ixgbe_del_vxlan_port,
8688 #endif /* CONFIG_IXGBE_VXLAN */
8689 .ndo_features_check = ixgbe_features_check,
8693 * ixgbe_enumerate_functions - Get the number of ports this device has
8694 * @adapter: adapter structure
8696 * This function enumerates the phsyical functions co-located on a single slot,
8697 * in order to determine how many ports a device has. This is most useful in
8698 * determining the required GT/s of PCIe bandwidth necessary for optimal
8701 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8703 struct pci_dev *entry, *pdev = adapter->pdev;
8706 /* Some cards can not use the generic count PCIe functions method,
8707 * because they are behind a parent switch, so we hardcode these with
8708 * the correct number of functions.
8710 if (ixgbe_pcie_from_parent(&adapter->hw))
8713 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8714 /* don't count virtual functions */
8715 if (entry->is_virtfn)
8718 /* When the devices on the bus don't all match our device ID,
8719 * we can't reliably determine the correct number of
8720 * functions. This can occur if a function has been direct
8721 * attached to a virtual machine using VT-d, for example. In
8722 * this case, simply return -1 to indicate this.
8724 if ((entry->vendor != pdev->vendor) ||
8725 (entry->device != pdev->device))
8735 * ixgbe_wol_supported - Check whether device supports WoL
8736 * @hw: hw specific details
8737 * @device_id: the device ID
8738 * @subdev_id: the subsystem device ID
8740 * This function is used by probe and ethtool to determine
8741 * which devices have WoL support
8744 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8747 struct ixgbe_hw *hw = &adapter->hw;
8748 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8749 int is_wol_supported = 0;
8751 switch (device_id) {
8752 case IXGBE_DEV_ID_82599_SFP:
8753 /* Only these subdevices could supports WOL */
8754 switch (subdevice_id) {
8755 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8756 case IXGBE_SUBDEV_ID_82599_560FLR:
8757 /* only support first port */
8758 if (hw->bus.func != 0)
8760 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8761 case IXGBE_SUBDEV_ID_82599_SFP:
8762 case IXGBE_SUBDEV_ID_82599_RNDC:
8763 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8764 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8765 is_wol_supported = 1;
8769 case IXGBE_DEV_ID_82599EN_SFP:
8770 /* Only this subdevice supports WOL */
8771 switch (subdevice_id) {
8772 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8773 is_wol_supported = 1;
8777 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8778 /* All except this subdevice support WOL */
8779 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8780 is_wol_supported = 1;
8782 case IXGBE_DEV_ID_82599_KX4:
8783 is_wol_supported = 1;
8785 case IXGBE_DEV_ID_X540T:
8786 case IXGBE_DEV_ID_X540T1:
8787 case IXGBE_DEV_ID_X550T:
8788 case IXGBE_DEV_ID_X550EM_X_KX4:
8789 case IXGBE_DEV_ID_X550EM_X_KR:
8790 case IXGBE_DEV_ID_X550EM_X_10G_T:
8791 /* check eeprom to see if enabled wol */
8792 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8793 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8794 (hw->bus.func == 0))) {
8795 is_wol_supported = 1;
8800 return is_wol_supported;
8804 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8805 * @adapter: Pointer to adapter struct
8807 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8810 struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8811 struct ixgbe_hw *hw = &adapter->hw;
8812 const unsigned char *addr;
8814 addr = of_get_mac_address(dp);
8816 ether_addr_copy(hw->mac.perm_addr, addr);
8819 #endif /* CONFIG_OF */
8822 ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8823 #endif /* CONFIG_SPARC */
8827 * ixgbe_probe - Device Initialization Routine
8828 * @pdev: PCI device information struct
8829 * @ent: entry in ixgbe_pci_tbl
8831 * Returns 0 on success, negative on failure
8833 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8834 * The OS initialization, configuring of the adapter private structure,
8835 * and a hardware reset occur.
8837 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8839 struct net_device *netdev;
8840 struct ixgbe_adapter *adapter = NULL;
8841 struct ixgbe_hw *hw;
8842 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8843 int i, err, pci_using_dac, expected_gts;
8844 unsigned int indices = MAX_TX_QUEUES;
8845 u8 part_str[IXGBE_PBANUM_LENGTH];
8846 bool disable_dev = false;
8852 /* Catch broken hardware that put the wrong VF device ID in
8853 * the PCIe SR-IOV capability.
8855 if (pdev->is_virtfn) {
8856 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8857 pci_name(pdev), pdev->vendor, pdev->device);
8861 err = pci_enable_device_mem(pdev);
8865 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8868 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8871 "No usable DMA configuration, aborting\n");
8877 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8878 IORESOURCE_MEM), ixgbe_driver_name);
8881 "pci_request_selected_regions failed 0x%x\n", err);
8885 pci_enable_pcie_error_reporting(pdev);
8887 pci_set_master(pdev);
8888 pci_save_state(pdev);
8890 if (ii->mac == ixgbe_mac_82598EB) {
8891 #ifdef CONFIG_IXGBE_DCB
8892 /* 8 TC w/ 4 queues per TC */
8893 indices = 4 * MAX_TRAFFIC_CLASS;
8895 indices = IXGBE_MAX_RSS_INDICES;
8899 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8902 goto err_alloc_etherdev;
8905 SET_NETDEV_DEV(netdev, &pdev->dev);
8907 adapter = netdev_priv(netdev);
8909 adapter->netdev = netdev;
8910 adapter->pdev = pdev;
8913 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8915 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8916 pci_resource_len(pdev, 0));
8917 adapter->io_addr = hw->hw_addr;
8923 netdev->netdev_ops = &ixgbe_netdev_ops;
8924 ixgbe_set_ethtool_ops(netdev);
8925 netdev->watchdog_timeo = 5 * HZ;
8926 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8929 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8930 hw->mac.type = ii->mac;
8931 hw->mvals = ii->mvals;
8934 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8935 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8936 if (ixgbe_removed(hw->hw_addr)) {
8940 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8941 if (!(eec & (1 << 8)))
8942 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8945 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8946 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8947 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8948 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8949 hw->phy.mdio.mmds = 0;
8950 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8951 hw->phy.mdio.dev = netdev;
8952 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8953 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8955 ii->get_invariants(hw);
8957 /* setup the private structure */
8958 err = ixgbe_sw_init(adapter);
8962 /* Make it possible the adapter to be woken up via WOL */
8963 switch (adapter->hw.mac.type) {
8964 case ixgbe_mac_82599EB:
8965 case ixgbe_mac_X540:
8966 case ixgbe_mac_X550:
8967 case ixgbe_mac_X550EM_x:
8968 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8975 * If there is a fan on this device and it has failed log the
8978 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8979 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8980 if (esdp & IXGBE_ESDP_SDP1)
8981 e_crit(probe, "Fan has stopped, replace the adapter\n");
8984 if (allow_unsupported_sfp)
8985 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8987 /* reset_hw fills in the perm_addr as well */
8988 hw->phy.reset_if_overtemp = true;
8989 err = hw->mac.ops.reset_hw(hw);
8990 hw->phy.reset_if_overtemp = false;
8991 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8993 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8994 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8995 e_dev_err("Reload the driver after installing a supported module.\n");
8998 e_dev_err("HW Init failed: %d\n", err);
9002 #ifdef CONFIG_PCI_IOV
9003 /* SR-IOV not supported on the 82598 */
9004 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9007 ixgbe_init_mbx_params_pf(hw);
9008 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
9009 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9010 ixgbe_enable_sriov(adapter);
9014 netdev->features = NETIF_F_SG |
9017 NETIF_F_HW_VLAN_CTAG_TX |
9018 NETIF_F_HW_VLAN_CTAG_RX |
9024 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
9026 switch (adapter->hw.mac.type) {
9027 case ixgbe_mac_82599EB:
9028 case ixgbe_mac_X540:
9029 case ixgbe_mac_X550:
9030 case ixgbe_mac_X550EM_x:
9031 netdev->features |= NETIF_F_SCTP_CRC;
9032 netdev->hw_features |= NETIF_F_SCTP_CRC |
9039 netdev->hw_features |= NETIF_F_RXALL;
9040 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9042 netdev->vlan_features |= NETIF_F_TSO;
9043 netdev->vlan_features |= NETIF_F_TSO6;
9044 netdev->vlan_features |= NETIF_F_IP_CSUM;
9045 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
9046 netdev->vlan_features |= NETIF_F_SG;
9048 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
9050 netdev->priv_flags |= IFF_UNICAST_FLT;
9051 netdev->priv_flags |= IFF_SUPP_NOFCS;
9053 #ifdef CONFIG_IXGBE_VXLAN
9054 switch (adapter->hw.mac.type) {
9055 case ixgbe_mac_X550:
9056 case ixgbe_mac_X550EM_x:
9057 netdev->hw_enc_features |= NETIF_F_RXCSUM;
9062 #endif /* CONFIG_IXGBE_VXLAN */
9064 #ifdef CONFIG_IXGBE_DCB
9065 netdev->dcbnl_ops = &dcbnl_ops;
9069 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9070 unsigned int fcoe_l;
9072 if (hw->mac.ops.get_device_caps) {
9073 hw->mac.ops.get_device_caps(hw, &device_caps);
9074 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9075 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9079 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9080 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9082 netdev->features |= NETIF_F_FSO |
9085 netdev->vlan_features |= NETIF_F_FSO |
9089 #endif /* IXGBE_FCOE */
9090 if (pci_using_dac) {
9091 netdev->features |= NETIF_F_HIGHDMA;
9092 netdev->vlan_features |= NETIF_F_HIGHDMA;
9095 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9096 netdev->hw_features |= NETIF_F_LRO;
9097 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9098 netdev->features |= NETIF_F_LRO;
9100 /* make sure the EEPROM is good */
9101 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9102 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9107 ixgbe_get_platform_mac_addr(adapter);
9109 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9111 if (!is_valid_ether_addr(netdev->dev_addr)) {
9112 e_dev_err("invalid MAC address\n");
9117 ixgbe_mac_set_default_filter(adapter);
9119 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9120 (unsigned long) adapter);
9122 if (ixgbe_removed(hw->hw_addr)) {
9126 INIT_WORK(&adapter->service_task, ixgbe_service_task);
9127 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9128 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9130 err = ixgbe_init_interrupt_scheme(adapter);
9134 /* WOL not supported for all devices */
9136 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9137 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9138 pdev->subsystem_device);
9139 if (hw->wol_enabled)
9140 adapter->wol = IXGBE_WUFC_MAG;
9142 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9144 /* save off EEPROM version number */
9145 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9146 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9148 /* pick up the PCI bus settings for reporting later */
9149 if (ixgbe_pcie_from_parent(hw))
9150 ixgbe_get_parent_bus_info(adapter);
9152 hw->mac.ops.get_bus_info(hw);
9154 /* calculate the expected PCIe bandwidth required for optimal
9155 * performance. Note that some older parts will never have enough
9156 * bandwidth due to being older generation PCIe parts. We clamp these
9157 * parts to ensure no warning is displayed if it can't be fixed.
9159 switch (hw->mac.type) {
9160 case ixgbe_mac_82598EB:
9161 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9164 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9168 /* don't check link if we failed to enumerate functions */
9169 if (expected_gts > 0)
9170 ixgbe_check_minimum_link(adapter, expected_gts);
9172 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9174 strlcpy(part_str, "Unknown", sizeof(part_str));
9175 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9176 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9177 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9180 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9181 hw->mac.type, hw->phy.type, part_str);
9183 e_dev_info("%pM\n", netdev->dev_addr);
9185 /* reset the hardware with the new settings */
9186 err = hw->mac.ops.start_hw(hw);
9187 if (err == IXGBE_ERR_EEPROM_VERSION) {
9188 /* We are running on a pre-production device, log a warning */
9189 e_dev_warn("This device is a pre-production adapter/LOM. "
9190 "Please be aware there may be issues associated "
9191 "with your hardware. If you are experiencing "
9192 "problems please contact your Intel or hardware "
9193 "representative who provided you with this "
9196 strcpy(netdev->name, "eth%d");
9197 err = register_netdev(netdev);
9201 pci_set_drvdata(pdev, adapter);
9203 /* power down the optics for 82599 SFP+ fiber */
9204 if (hw->mac.ops.disable_tx_laser)
9205 hw->mac.ops.disable_tx_laser(hw);
9207 /* carrier off reporting is important to ethtool even BEFORE open */
9208 netif_carrier_off(netdev);
9210 #ifdef CONFIG_IXGBE_DCA
9211 if (dca_add_requester(&pdev->dev) == 0) {
9212 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9213 ixgbe_setup_dca(adapter);
9216 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9217 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9218 for (i = 0; i < adapter->num_vfs; i++)
9219 ixgbe_vf_configuration(pdev, (i | 0x10000000));
9222 /* firmware requires driver version to be 0xFFFFFFFF
9223 * since os does not support feature
9225 if (hw->mac.ops.set_fw_drv_ver)
9226 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
9229 /* add san mac addr to netdev */
9230 ixgbe_add_sanmac_netdev(netdev);
9232 e_dev_info("%s\n", ixgbe_default_device_descr);
9234 #ifdef CONFIG_IXGBE_HWMON
9235 if (ixgbe_sysfs_init(adapter))
9236 e_err(probe, "failed to allocate sysfs resources\n");
9237 #endif /* CONFIG_IXGBE_HWMON */
9239 ixgbe_dbg_adapter_init(adapter);
9241 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9242 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9243 hw->mac.ops.setup_link(hw,
9244 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9250 ixgbe_release_hw_control(adapter);
9251 ixgbe_clear_interrupt_scheme(adapter);
9253 ixgbe_disable_sriov(adapter);
9254 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9255 iounmap(adapter->io_addr);
9256 kfree(adapter->mac_table);
9258 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9259 free_netdev(netdev);
9261 pci_release_selected_regions(pdev,
9262 pci_select_bars(pdev, IORESOURCE_MEM));
9265 if (!adapter || disable_dev)
9266 pci_disable_device(pdev);
9271 * ixgbe_remove - Device Removal Routine
9272 * @pdev: PCI device information struct
9274 * ixgbe_remove is called by the PCI subsystem to alert the driver
9275 * that it should release a PCI device. The could be caused by a
9276 * Hot-Plug event, or because the driver is going to be removed from
9279 static void ixgbe_remove(struct pci_dev *pdev)
9281 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9282 struct net_device *netdev;
9285 /* if !adapter then we already cleaned up in probe */
9289 netdev = adapter->netdev;
9290 ixgbe_dbg_adapter_exit(adapter);
9292 set_bit(__IXGBE_REMOVING, &adapter->state);
9293 cancel_work_sync(&adapter->service_task);
9296 #ifdef CONFIG_IXGBE_DCA
9297 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9298 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9299 dca_remove_requester(&pdev->dev);
9300 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9301 IXGBE_DCA_CTRL_DCA_DISABLE);
9305 #ifdef CONFIG_IXGBE_HWMON
9306 ixgbe_sysfs_exit(adapter);
9307 #endif /* CONFIG_IXGBE_HWMON */
9309 /* remove the added san mac */
9310 ixgbe_del_sanmac_netdev(netdev);
9312 #ifdef CONFIG_PCI_IOV
9313 ixgbe_disable_sriov(adapter);
9315 if (netdev->reg_state == NETREG_REGISTERED)
9316 unregister_netdev(netdev);
9318 ixgbe_clear_interrupt_scheme(adapter);
9320 ixgbe_release_hw_control(adapter);
9323 kfree(adapter->ixgbe_ieee_pfc);
9324 kfree(adapter->ixgbe_ieee_ets);
9327 iounmap(adapter->io_addr);
9328 pci_release_selected_regions(pdev, pci_select_bars(pdev,
9331 e_dev_info("complete\n");
9333 kfree(adapter->mac_table);
9334 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9335 free_netdev(netdev);
9337 pci_disable_pcie_error_reporting(pdev);
9340 pci_disable_device(pdev);
9344 * ixgbe_io_error_detected - called when PCI error is detected
9345 * @pdev: Pointer to PCI device
9346 * @state: The current pci connection state
9348 * This function is called after a PCI bus error affecting
9349 * this device has been detected.
9351 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9352 pci_channel_state_t state)
9354 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9355 struct net_device *netdev = adapter->netdev;
9357 #ifdef CONFIG_PCI_IOV
9358 struct ixgbe_hw *hw = &adapter->hw;
9359 struct pci_dev *bdev, *vfdev;
9360 u32 dw0, dw1, dw2, dw3;
9362 u16 req_id, pf_func;
9364 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9365 adapter->num_vfs == 0)
9366 goto skip_bad_vf_detection;
9368 bdev = pdev->bus->self;
9369 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9370 bdev = bdev->bus->self;
9373 goto skip_bad_vf_detection;
9375 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9377 goto skip_bad_vf_detection;
9379 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9380 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9381 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9382 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9383 if (ixgbe_removed(hw->hw_addr))
9384 goto skip_bad_vf_detection;
9387 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9388 if (!(req_id & 0x0080))
9389 goto skip_bad_vf_detection;
9391 pf_func = req_id & 0x01;
9392 if ((pf_func & 1) == (pdev->devfn & 1)) {
9393 unsigned int device_id;
9395 vf = (req_id & 0x7F) >> 1;
9396 e_dev_err("VF %d has caused a PCIe error\n", vf);
9397 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9398 "%8.8x\tdw3: %8.8x\n",
9399 dw0, dw1, dw2, dw3);
9400 switch (adapter->hw.mac.type) {
9401 case ixgbe_mac_82599EB:
9402 device_id = IXGBE_82599_VF_DEVICE_ID;
9404 case ixgbe_mac_X540:
9405 device_id = IXGBE_X540_VF_DEVICE_ID;
9407 case ixgbe_mac_X550:
9408 device_id = IXGBE_DEV_ID_X550_VF;
9410 case ixgbe_mac_X550EM_x:
9411 device_id = IXGBE_DEV_ID_X550EM_X_VF;
9418 /* Find the pci device of the offending VF */
9419 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9421 if (vfdev->devfn == (req_id & 0xFF))
9423 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9427 * There's a slim chance the VF could have been hot plugged,
9428 * so if it is no longer present we don't need to issue the
9429 * VFLR. Just clean up the AER in that case.
9432 ixgbe_issue_vf_flr(adapter, vfdev);
9433 /* Free device reference count */
9437 pci_cleanup_aer_uncorrect_error_status(pdev);
9441 * Even though the error may have occurred on the other port
9442 * we still need to increment the vf error reference count for
9443 * both ports because the I/O resume function will be called
9446 adapter->vferr_refcount++;
9448 return PCI_ERS_RESULT_RECOVERED;
9450 skip_bad_vf_detection:
9451 #endif /* CONFIG_PCI_IOV */
9452 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9453 return PCI_ERS_RESULT_DISCONNECT;
9456 netif_device_detach(netdev);
9458 if (state == pci_channel_io_perm_failure) {
9460 return PCI_ERS_RESULT_DISCONNECT;
9463 if (netif_running(netdev))
9464 ixgbe_down(adapter);
9466 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9467 pci_disable_device(pdev);
9470 /* Request a slot reset. */
9471 return PCI_ERS_RESULT_NEED_RESET;
9475 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9476 * @pdev: Pointer to PCI device
9478 * Restart the card from scratch, as if from a cold-boot.
9480 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9482 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9483 pci_ers_result_t result;
9486 if (pci_enable_device_mem(pdev)) {
9487 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9488 result = PCI_ERS_RESULT_DISCONNECT;
9490 smp_mb__before_atomic();
9491 clear_bit(__IXGBE_DISABLED, &adapter->state);
9492 adapter->hw.hw_addr = adapter->io_addr;
9493 pci_set_master(pdev);
9494 pci_restore_state(pdev);
9495 pci_save_state(pdev);
9497 pci_wake_from_d3(pdev, false);
9499 ixgbe_reset(adapter);
9500 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9501 result = PCI_ERS_RESULT_RECOVERED;
9504 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9506 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9507 "failed 0x%0x\n", err);
9508 /* non-fatal, continue */
9515 * ixgbe_io_resume - called when traffic can start flowing again.
9516 * @pdev: Pointer to PCI device
9518 * This callback is called when the error recovery driver tells us that
9519 * its OK to resume normal operation.
9521 static void ixgbe_io_resume(struct pci_dev *pdev)
9523 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9524 struct net_device *netdev = adapter->netdev;
9526 #ifdef CONFIG_PCI_IOV
9527 if (adapter->vferr_refcount) {
9528 e_info(drv, "Resuming after VF err\n");
9529 adapter->vferr_refcount--;
9534 if (netif_running(netdev))
9537 netif_device_attach(netdev);
9540 static const struct pci_error_handlers ixgbe_err_handler = {
9541 .error_detected = ixgbe_io_error_detected,
9542 .slot_reset = ixgbe_io_slot_reset,
9543 .resume = ixgbe_io_resume,
9546 static struct pci_driver ixgbe_driver = {
9547 .name = ixgbe_driver_name,
9548 .id_table = ixgbe_pci_tbl,
9549 .probe = ixgbe_probe,
9550 .remove = ixgbe_remove,
9552 .suspend = ixgbe_suspend,
9553 .resume = ixgbe_resume,
9555 .shutdown = ixgbe_shutdown,
9556 .sriov_configure = ixgbe_pci_sriov_configure,
9557 .err_handler = &ixgbe_err_handler
9561 * ixgbe_init_module - Driver Registration Routine
9563 * ixgbe_init_module is the first routine called when the driver is
9564 * loaded. All it does is register with the PCI subsystem.
9566 static int __init ixgbe_init_module(void)
9569 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9570 pr_info("%s\n", ixgbe_copyright);
9572 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
9574 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
9580 ret = pci_register_driver(&ixgbe_driver);
9586 #ifdef CONFIG_IXGBE_DCA
9587 dca_register_notify(&dca_notifier);
9593 module_init(ixgbe_init_module);
9596 * ixgbe_exit_module - Driver Exit Cleanup Routine
9598 * ixgbe_exit_module is called just before the driver is removed
9601 static void __exit ixgbe_exit_module(void)
9603 #ifdef CONFIG_IXGBE_DCA
9604 dca_unregister_notify(&dca_notifier);
9606 pci_unregister_driver(&ixgbe_driver);
9610 destroy_workqueue(ixgbe_wq);
9615 #ifdef CONFIG_IXGBE_DCA
9616 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9621 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9622 __ixgbe_notify_dca);
9624 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9627 #endif /* CONFIG_IXGBE_DCA */
9629 module_exit(ixgbe_exit_module);