1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name[] = "ixgbe";
56 static const char ixgbe_driver_string[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version[] = DRV_VERSION;
71 static const char ixgbe_copyright[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info *ixgbe_info_tbl[] = {
75 [board_82598] = &ixgbe_82598_info,
76 [board_82599] = &ixgbe_82599_info,
77 [board_X540] = &ixgbe_X540_info,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs;
134 module_param(max_vfs, uint, 0);
135 MODULE_PARM_DESC(max_vfs,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp;
140 module_param(allow_unsupported_sfp, uint, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug = -1;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
156 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
158 schedule_work(&adapter->service_task);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
170 struct ixgbe_reg_info {
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
177 /* General Registers */
178 {IXGBE_CTRL, "CTRL"},
179 {IXGBE_STATUS, "STATUS"},
180 {IXGBE_CTRL_EXT, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
217 switch (reginfo->ofs) {
218 case IXGBE_SRRCTL(0):
219 for (i = 0; i < 64; i++)
220 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i = 0; i < 64; i++)
224 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
227 for (i = 0; i < 64; i++)
228 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
231 for (i = 0; i < 64; i++)
232 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
235 for (i = 0; i < 64; i++)
236 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
238 case IXGBE_RXDCTL(0):
239 for (i = 0; i < 64; i++)
240 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
243 for (i = 0; i < 64; i++)
244 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
247 for (i = 0; i < 64; i++)
248 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
251 for (i = 0; i < 64; i++)
252 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
255 for (i = 0; i < 64; i++)
256 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
259 for (i = 0; i < 64; i++)
260 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
263 for (i = 0; i < 64; i++)
264 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
267 for (i = 0; i < 64; i++)
268 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
270 case IXGBE_TXDCTL(0):
271 for (i = 0; i < 64; i++)
272 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
275 pr_info("%-15s %08x\n", reginfo->name,
276 IXGBE_READ_REG(hw, reginfo->ofs));
280 for (i = 0; i < 8; i++) {
281 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
282 pr_err("%-15s", rname);
283 for (j = 0; j < 8; j++)
284 pr_cont(" %08x", regs[i*8+j]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter *adapter)
295 struct net_device *netdev = adapter->netdev;
296 struct ixgbe_hw *hw = &adapter->hw;
297 struct ixgbe_reg_info *reginfo;
299 struct ixgbe_ring *tx_ring;
300 struct ixgbe_tx_buffer *tx_buffer;
301 union ixgbe_adv_tx_desc *tx_desc;
302 struct my_u0 { u64 a; u64 b; } *u0;
303 struct ixgbe_ring *rx_ring;
304 union ixgbe_adv_rx_desc *rx_desc;
305 struct ixgbe_rx_buffer *rx_buffer_info;
309 if (!netif_msg_hw(adapter))
312 /* Print netdevice Info */
314 dev_info(&adapter->pdev->dev, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter->pdev->dev, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
328 reginfo->name; reginfo++) {
329 ixgbe_regdump(hw, reginfo);
332 /* Print TX Ring Summary */
333 if (!netdev || !netif_running(netdev))
336 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n = 0; n < adapter->num_tx_queues; n++) {
339 tx_ring = adapter->tx_ring[n];
340 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n, tx_ring->next_to_use, tx_ring->next_to_clean,
343 (u64)dma_unmap_addr(tx_buffer, dma),
344 dma_unmap_len(tx_buffer, len),
345 tx_buffer->next_to_watch,
346 (u64)tx_buffer->time_stamp);
350 if (!netif_msg_tx_done(adapter))
351 goto rx_ring_summary;
353 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n = 0; n < adapter->num_tx_queues; n++) {
367 tx_ring = adapter->tx_ring[n];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
376 tx_desc = IXGBE_TX_DESC(tx_ring, i);
377 tx_buffer = &tx_ring->tx_buffer_info[i];
378 u0 = (struct my_u0 *)tx_desc;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i,
383 (u64)dma_unmap_addr(tx_buffer, dma),
384 dma_unmap_len(tx_buffer, len),
385 tx_buffer->next_to_watch,
386 (u64)tx_buffer->time_stamp,
388 if (i == tx_ring->next_to_use &&
389 i == tx_ring->next_to_clean)
391 else if (i == tx_ring->next_to_use)
393 else if (i == tx_ring->next_to_clean)
398 if (netif_msg_pktdata(adapter) &&
399 dma_unmap_len(tx_buffer, len) != 0)
400 print_hex_dump(KERN_INFO, "",
401 DUMP_PREFIX_ADDRESS, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer,
404 dma_unmap_len(tx_buffer, len),
409 /* Print RX Rings Summary */
411 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n = 0; n < adapter->num_rx_queues; n++) {
414 rx_ring = adapter->rx_ring[n];
415 pr_info("%5d %5X %5X\n",
416 n, rx_ring->next_to_use, rx_ring->next_to_clean);
420 if (!netif_msg_rx_status(adapter))
423 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n = 0; n < adapter->num_rx_queues; n++) {
446 rx_ring = adapter->rx_ring[n];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i = 0; i < rx_ring->count; i++) {
458 rx_buffer_info = &rx_ring->rx_buffer_info[i];
459 rx_desc = IXGBE_RX_DESC(rx_ring, i);
460 u0 = (struct my_u0 *)rx_desc;
461 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
462 if (staterr & IXGBE_RXD_STAT_DD) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i,
468 rx_buffer_info->skb);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i,
474 (u64)rx_buffer_info->dma,
475 rx_buffer_info->skb);
477 if (netif_msg_pktdata(adapter)) {
478 print_hex_dump(KERN_INFO, "",
479 DUMP_PREFIX_ADDRESS, 16, 1,
480 phys_to_virt(rx_buffer_info->dma),
481 ixgbe_rx_bufsz(rx_ring), true);
485 if (i == rx_ring->next_to_use)
487 else if (i == rx_ring->next_to_clean)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
503 /* Let firmware take over control of h/w */
504 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
505 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
506 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
516 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
528 u8 queue, u8 msix_vector)
531 struct ixgbe_hw *hw = &adapter->hw;
532 switch (hw->mac.type) {
533 case ixgbe_mac_82598EB:
534 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
537 index = (((direction * 64) + queue) >> 2) & 0x1F;
538 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
539 ivar &= ~(0xFF << (8 * (queue & 0x3)));
540 ivar |= (msix_vector << (8 * (queue & 0x3)));
541 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
543 case ixgbe_mac_82599EB:
545 if (direction == -1) {
547 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
548 index = ((queue & 1) * 8);
549 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
550 ivar &= ~(0xFF << index);
551 ivar |= (msix_vector << index);
552 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
555 /* tx or rx causes */
556 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
557 index = ((16 * (queue & 1)) + (8 * direction));
558 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
559 ivar &= ~(0xFF << index);
560 ivar |= (msix_vector << index);
561 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
574 switch (adapter->hw.mac.type) {
575 case ixgbe_mac_82598EB:
576 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
577 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
579 case ixgbe_mac_82599EB:
581 mask = (qmask & 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
583 mask = (qmask >> 32);
584 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
592 struct ixgbe_tx_buffer *tx_buffer)
594 if (tx_buffer->skb) {
595 dev_kfree_skb_any(tx_buffer->skb);
596 if (dma_unmap_len(tx_buffer, len))
597 dma_unmap_single(ring->dev,
598 dma_unmap_addr(tx_buffer, dma),
599 dma_unmap_len(tx_buffer, len),
601 } else if (dma_unmap_len(tx_buffer, len)) {
602 dma_unmap_page(ring->dev,
603 dma_unmap_addr(tx_buffer, dma),
604 dma_unmap_len(tx_buffer, len),
607 tx_buffer->next_to_watch = NULL;
608 tx_buffer->skb = NULL;
609 dma_unmap_len_set(tx_buffer, len, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
615 struct ixgbe_hw *hw = &adapter->hw;
616 struct ixgbe_hw_stats *hwstats = &adapter->stats;
620 if ((hw->fc.current_mode != ixgbe_fc_full) &&
621 (hw->fc.current_mode != ixgbe_fc_rx_pause))
624 switch (hw->mac.type) {
625 case ixgbe_mac_82598EB:
626 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
629 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
631 hwstats->lxoffrxc += data;
633 /* refill credits (no tx hang) if we received xoff */
637 for (i = 0; i < adapter->num_tx_queues; i++)
638 clear_bit(__IXGBE_HANG_CHECK_ARMED,
639 &adapter->tx_ring[i]->state);
642 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
644 struct ixgbe_hw *hw = &adapter->hw;
645 struct ixgbe_hw_stats *hwstats = &adapter->stats;
648 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
650 if (adapter->ixgbe_ieee_pfc)
651 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
653 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
654 ixgbe_update_xoff_rx_lfc(adapter);
658 /* update stats for each tc, only valid with PFC enabled */
659 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
660 switch (hw->mac.type) {
661 case ixgbe_mac_82598EB:
662 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
665 xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
667 hwstats->pxoffrxc[i] += xoff[i];
670 /* disarm tx queues that have received xoff frames */
671 for (i = 0; i < adapter->num_tx_queues; i++) {
672 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
673 u8 tc = tx_ring->dcb_tc;
676 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
680 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
682 return ring->stats.packets;
685 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
687 struct ixgbe_adapter *adapter = netdev_priv(ring->netdev);
688 struct ixgbe_hw *hw = &adapter->hw;
690 u32 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
691 u32 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
694 return (head < tail) ?
695 tail - head : (tail + ring->count - head);
700 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
702 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
703 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
704 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
707 clear_check_for_tx_hang(tx_ring);
710 * Check for a hung queue, but be thorough. This verifies
711 * that a transmit has been completed since the previous
712 * check AND there is at least one packet pending. The
713 * ARMED bit is set to indicate a potential hang. The
714 * bit is cleared if a pause frame is received to remove
715 * false hang detection due to PFC or 802.3x frames. By
716 * requiring this to fail twice we avoid races with
717 * pfc clearing the ARMED bit and conditions where we
718 * run the check_tx_hang logic with a transmit completion
719 * pending but without time to complete it yet.
721 if ((tx_done_old == tx_done) && tx_pending) {
722 /* make sure it is true for two checks in a row */
723 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
726 /* update completed stats and continue */
727 tx_ring->tx_stats.tx_done_old = tx_done;
728 /* reset the countdown */
729 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
736 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
737 * @adapter: driver private struct
739 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
742 /* Do the reset outside of interrupt context */
743 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
744 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
745 ixgbe_service_event_schedule(adapter);
750 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
751 * @q_vector: structure containing interrupt and ring information
752 * @tx_ring: tx ring to clean
754 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
755 struct ixgbe_ring *tx_ring)
757 struct ixgbe_adapter *adapter = q_vector->adapter;
758 struct ixgbe_tx_buffer *tx_buffer;
759 union ixgbe_adv_tx_desc *tx_desc;
760 unsigned int total_bytes = 0, total_packets = 0;
761 unsigned int budget = q_vector->tx.work_limit;
762 unsigned int i = tx_ring->next_to_clean;
764 if (test_bit(__IXGBE_DOWN, &adapter->state))
767 tx_buffer = &tx_ring->tx_buffer_info[i];
768 tx_desc = IXGBE_TX_DESC(tx_ring, i);
772 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
774 /* if next_to_watch is not set then there is no work pending */
778 /* prevent any other reads prior to eop_desc */
781 /* if DD is not set pending work has not been completed */
782 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
785 /* clear next_to_watch to prevent false hangs */
786 tx_buffer->next_to_watch = NULL;
788 /* update the statistics for this packet */
789 total_bytes += tx_buffer->bytecount;
790 total_packets += tx_buffer->gso_segs;
793 dev_kfree_skb_any(tx_buffer->skb);
795 /* unmap skb header data */
796 dma_unmap_single(tx_ring->dev,
797 dma_unmap_addr(tx_buffer, dma),
798 dma_unmap_len(tx_buffer, len),
801 /* clear tx_buffer data */
802 tx_buffer->skb = NULL;
803 dma_unmap_len_set(tx_buffer, len, 0);
805 /* unmap remaining buffers */
806 while (tx_desc != eop_desc) {
812 tx_buffer = tx_ring->tx_buffer_info;
813 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
816 /* unmap any remaining paged data */
817 if (dma_unmap_len(tx_buffer, len)) {
818 dma_unmap_page(tx_ring->dev,
819 dma_unmap_addr(tx_buffer, dma),
820 dma_unmap_len(tx_buffer, len),
822 dma_unmap_len_set(tx_buffer, len, 0);
826 /* move us one more past the eop_desc for start of next pkt */
832 tx_buffer = tx_ring->tx_buffer_info;
833 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
836 /* issue prefetch for next Tx descriptor */
839 /* update budget accounting */
841 } while (likely(budget));
844 tx_ring->next_to_clean = i;
845 u64_stats_update_begin(&tx_ring->syncp);
846 tx_ring->stats.bytes += total_bytes;
847 tx_ring->stats.packets += total_packets;
848 u64_stats_update_end(&tx_ring->syncp);
849 q_vector->tx.total_bytes += total_bytes;
850 q_vector->tx.total_packets += total_packets;
852 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
853 /* schedule immediate reset if we believe we hung */
854 struct ixgbe_hw *hw = &adapter->hw;
855 e_err(drv, "Detected Tx Unit Hang\n"
857 " TDH, TDT <%x>, <%x>\n"
858 " next_to_use <%x>\n"
859 " next_to_clean <%x>\n"
860 "tx_buffer_info[next_to_clean]\n"
861 " time_stamp <%lx>\n"
863 tx_ring->queue_index,
864 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
865 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
866 tx_ring->next_to_use, i,
867 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
869 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
872 "tx hang %d detected on queue %d, resetting adapter\n",
873 adapter->tx_timeout_count + 1, tx_ring->queue_index);
875 /* schedule immediate reset if we believe we hung */
876 ixgbe_tx_timeout_reset(adapter);
878 /* the adapter is about to reset, no point in enabling stuff */
882 netdev_tx_completed_queue(txring_txq(tx_ring),
883 total_packets, total_bytes);
885 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
886 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
887 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
888 /* Make sure that anybody stopping the queue after this
889 * sees the new next_to_clean.
892 if (__netif_subqueue_stopped(tx_ring->netdev,
893 tx_ring->queue_index)
894 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
895 netif_wake_subqueue(tx_ring->netdev,
896 tx_ring->queue_index);
897 ++tx_ring->tx_stats.restart_queue;
904 #ifdef CONFIG_IXGBE_DCA
905 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
906 struct ixgbe_ring *tx_ring,
909 struct ixgbe_hw *hw = &adapter->hw;
910 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
913 switch (hw->mac.type) {
914 case ixgbe_mac_82598EB:
915 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
917 case ixgbe_mac_82599EB:
919 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
920 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
923 /* for unknown hardware do not write register */
928 * We can enable relaxed ordering for reads, but not writes when
929 * DCA is enabled. This is due to a known issue in some chipsets
930 * which will cause the DCA tag to be cleared.
932 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
933 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
934 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
936 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
939 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
940 struct ixgbe_ring *rx_ring,
943 struct ixgbe_hw *hw = &adapter->hw;
944 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
945 u8 reg_idx = rx_ring->reg_idx;
948 switch (hw->mac.type) {
949 case ixgbe_mac_82599EB:
951 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
958 * We can enable relaxed ordering for reads, but not writes when
959 * DCA is enabled. This is due to a known issue in some chipsets
960 * which will cause the DCA tag to be cleared.
962 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
963 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
964 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
966 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
969 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
971 struct ixgbe_adapter *adapter = q_vector->adapter;
972 struct ixgbe_ring *ring;
975 if (q_vector->cpu == cpu)
978 ixgbe_for_each_ring(ring, q_vector->tx)
979 ixgbe_update_tx_dca(adapter, ring, cpu);
981 ixgbe_for_each_ring(ring, q_vector->rx)
982 ixgbe_update_rx_dca(adapter, ring, cpu);
989 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
994 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
997 /* always use CB2 mode, difference is masked in the CB driver */
998 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1000 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1001 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1005 for (i = 0; i < num_q_vectors; i++) {
1006 adapter->q_vector[i]->cpu = -1;
1007 ixgbe_update_dca(adapter->q_vector[i]);
1011 static int __ixgbe_notify_dca(struct device *dev, void *data)
1013 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1014 unsigned long event = *(unsigned long *)data;
1016 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1020 case DCA_PROVIDER_ADD:
1021 /* if we're already enabled, don't do it again */
1022 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1024 if (dca_add_requester(dev) == 0) {
1025 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1026 ixgbe_setup_dca(adapter);
1029 /* Fall Through since DCA is disabled. */
1030 case DCA_PROVIDER_REMOVE:
1031 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1032 dca_remove_requester(dev);
1033 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1034 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1042 #endif /* CONFIG_IXGBE_DCA */
1043 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1044 union ixgbe_adv_rx_desc *rx_desc,
1045 struct sk_buff *skb)
1047 if (ring->netdev->features & NETIF_F_RXHASH)
1048 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1053 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1054 * @adapter: address of board private structure
1055 * @rx_desc: advanced rx descriptor
1057 * Returns : true if it is FCoE pkt
1059 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_adapter *adapter,
1060 union ixgbe_adv_rx_desc *rx_desc)
1062 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1064 return (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
1065 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1066 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1067 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1070 #endif /* IXGBE_FCOE */
1072 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1073 * @ring: structure containing ring specific data
1074 * @rx_desc: current Rx descriptor being processed
1075 * @skb: skb currently being received and modified
1077 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1078 union ixgbe_adv_rx_desc *rx_desc,
1079 struct sk_buff *skb)
1081 skb_checksum_none_assert(skb);
1083 /* Rx csum disabled */
1084 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1087 /* if IP and error */
1088 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1089 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1090 ring->rx_stats.csum_err++;
1094 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1097 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1098 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1101 * 82599 errata, UDP frames with a 0 checksum can be marked as
1104 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1105 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1108 ring->rx_stats.csum_err++;
1112 /* It must be a TCP or UDP packet with a valid checksum */
1113 skb->ip_summed = CHECKSUM_UNNECESSARY;
1116 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1118 rx_ring->next_to_use = val;
1120 /* update next to alloc since we have filled the ring */
1121 rx_ring->next_to_alloc = val;
1123 * Force memory writes to complete before letting h/w
1124 * know there are new descriptors to fetch. (Only
1125 * applicable for weak-ordered memory model archs,
1129 writel(val, rx_ring->tail);
1132 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1133 struct ixgbe_rx_buffer *bi)
1135 struct page *page = bi->page;
1136 dma_addr_t dma = bi->dma;
1138 /* since we are recycling buffers we should seldom need to alloc */
1142 /* alloc new page for storage */
1143 if (likely(!page)) {
1144 page = alloc_pages(GFP_ATOMIC | __GFP_COLD,
1145 ixgbe_rx_pg_order(rx_ring));
1146 if (unlikely(!page)) {
1147 rx_ring->rx_stats.alloc_rx_page_failed++;
1153 /* map page for use */
1154 dma = dma_map_page(rx_ring->dev, page, 0,
1155 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1158 * if mapping failed free memory back to system since
1159 * there isn't much point in holding memory we can't use
1161 if (dma_mapping_error(rx_ring->dev, dma)) {
1162 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1165 rx_ring->rx_stats.alloc_rx_page_failed++;
1170 bi->page_offset ^= ixgbe_rx_bufsz(rx_ring);
1176 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1177 * @rx_ring: ring to place buffers on
1178 * @cleaned_count: number of buffers to replace
1180 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1182 union ixgbe_adv_rx_desc *rx_desc;
1183 struct ixgbe_rx_buffer *bi;
1184 u16 i = rx_ring->next_to_use;
1190 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1191 bi = &rx_ring->rx_buffer_info[i];
1192 i -= rx_ring->count;
1195 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1199 * Refresh the desc even if buffer_addrs didn't change
1200 * because each write-back erases this info.
1202 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1208 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1209 bi = rx_ring->rx_buffer_info;
1210 i -= rx_ring->count;
1213 /* clear the hdr_addr for the next_to_use descriptor */
1214 rx_desc->read.hdr_addr = 0;
1217 } while (cleaned_count);
1219 i += rx_ring->count;
1221 if (rx_ring->next_to_use != i)
1222 ixgbe_release_rx_desc(rx_ring, i);
1226 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1227 * @data: pointer to the start of the headers
1228 * @max_len: total length of section to find headers in
1230 * This function is meant to determine the length of headers that will
1231 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1232 * motivation of doing this is to only perform one pull for IPv4 TCP
1233 * packets so that we can do basic things like calculating the gso_size
1234 * based on the average data per packet.
1236 static unsigned int ixgbe_get_headlen(unsigned char *data,
1237 unsigned int max_len)
1240 unsigned char *network;
1243 struct vlan_hdr *vlan;
1248 u8 nexthdr = 0; /* default to not TCP */
1251 /* this should never happen, but better safe than sorry */
1252 if (max_len < ETH_HLEN)
1255 /* initialize network frame pointer */
1258 /* set first protocol and move network header forward */
1259 protocol = hdr.eth->h_proto;
1260 hdr.network += ETH_HLEN;
1262 /* handle any vlan tag if present */
1263 if (protocol == __constant_htons(ETH_P_8021Q)) {
1264 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1267 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1268 hdr.network += VLAN_HLEN;
1271 /* handle L3 protocols */
1272 if (protocol == __constant_htons(ETH_P_IP)) {
1273 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1276 /* access ihl as a u8 to avoid unaligned access on ia64 */
1277 hlen = (hdr.network[0] & 0x0F) << 2;
1279 /* verify hlen meets minimum size requirements */
1280 if (hlen < sizeof(struct iphdr))
1281 return hdr.network - data;
1283 /* record next protocol */
1284 nexthdr = hdr.ipv4->protocol;
1285 hdr.network += hlen;
1287 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1288 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1290 hdr.network += FCOE_HEADER_LEN;
1293 return hdr.network - data;
1296 /* finally sort out TCP */
1297 if (nexthdr == IPPROTO_TCP) {
1298 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1301 /* access doff as a u8 to avoid unaligned access on ia64 */
1302 hlen = (hdr.network[12] & 0xF0) >> 2;
1304 /* verify hlen meets minimum size requirements */
1305 if (hlen < sizeof(struct tcphdr))
1306 return hdr.network - data;
1308 hdr.network += hlen;
1312 * If everything has gone correctly hdr.network should be the
1313 * data section of the packet and will be the end of the header.
1314 * If not then it probably represents the end of the last recognized
1317 if ((hdr.network - data) < max_len)
1318 return hdr.network - data;
1323 static void ixgbe_get_rsc_cnt(struct ixgbe_ring *rx_ring,
1324 union ixgbe_adv_rx_desc *rx_desc,
1325 struct sk_buff *skb)
1330 if (!ring_is_rsc_enabled(rx_ring))
1333 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1334 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1336 /* If this is an RSC frame rsc_cnt should be non-zero */
1340 rsc_cnt = le32_to_cpu(rsc_enabled);
1341 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1343 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1346 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1347 struct sk_buff *skb)
1349 u16 hdr_len = skb_headlen(skb);
1351 /* set gso_size to avoid messing up TCP MSS */
1352 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1353 IXGBE_CB(skb)->append_cnt);
1356 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1357 struct sk_buff *skb)
1359 /* if append_cnt is 0 then frame is not RSC */
1360 if (!IXGBE_CB(skb)->append_cnt)
1363 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1364 rx_ring->rx_stats.rsc_flush++;
1366 ixgbe_set_rsc_gso_size(rx_ring, skb);
1368 /* gso_size is computed using append_cnt so always clear it last */
1369 IXGBE_CB(skb)->append_cnt = 0;
1373 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1374 * @rx_ring: rx descriptor ring packet is being transacted on
1375 * @rx_desc: pointer to the EOP Rx descriptor
1376 * @skb: pointer to current skb being populated
1378 * This function checks the ring, descriptor, and packet information in
1379 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1380 * other fields within the skb.
1382 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1383 union ixgbe_adv_rx_desc *rx_desc,
1384 struct sk_buff *skb)
1386 ixgbe_update_rsc_stats(rx_ring, skb);
1388 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1390 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1392 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1393 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1394 __vlan_hwaccel_put_tag(skb, vid);
1397 skb_record_rx_queue(skb, rx_ring->queue_index);
1399 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1402 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1403 struct sk_buff *skb)
1405 struct ixgbe_adapter *adapter = q_vector->adapter;
1407 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1408 napi_gro_receive(&q_vector->napi, skb);
1414 * ixgbe_is_non_eop - process handling of non-EOP buffers
1415 * @rx_ring: Rx ring being processed
1416 * @rx_desc: Rx descriptor for current buffer
1417 * @skb: Current socket buffer containing buffer in progress
1419 * This function updates next to clean. If the buffer is an EOP buffer
1420 * this function exits returning false, otherwise it will place the
1421 * sk_buff in the next buffer to be chained and return true indicating
1422 * that this is in fact a non-EOP buffer.
1424 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1425 union ixgbe_adv_rx_desc *rx_desc,
1426 struct sk_buff *skb)
1428 u32 ntc = rx_ring->next_to_clean + 1;
1430 /* fetch, update, and store next to clean */
1431 ntc = (ntc < rx_ring->count) ? ntc : 0;
1432 rx_ring->next_to_clean = ntc;
1434 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1436 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1439 /* append_cnt indicates packet is RSC, if so fetch nextp */
1440 if (IXGBE_CB(skb)->append_cnt) {
1441 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1442 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1443 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1446 /* place skb in next buffer to be received */
1447 rx_ring->rx_buffer_info[ntc].skb = skb;
1448 rx_ring->rx_stats.non_eop_descs++;
1454 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1455 * @rx_ring: rx descriptor ring packet is being transacted on
1456 * @rx_desc: pointer to the EOP Rx descriptor
1457 * @skb: pointer to current skb being fixed
1459 * Check for corrupted packet headers caused by senders on the local L2
1460 * embedded NIC switch not setting up their Tx Descriptors right. These
1461 * should be very rare.
1463 * Also address the case where we are pulling data in on pages only
1464 * and as such no data is present in the skb header.
1466 * In addition if skb is not at least 60 bytes we need to pad it so that
1467 * it is large enough to qualify as a valid Ethernet frame.
1469 * Returns true if an error was encountered and skb was freed.
1471 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1472 union ixgbe_adv_rx_desc *rx_desc,
1473 struct sk_buff *skb)
1475 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1476 struct net_device *netdev = rx_ring->netdev;
1478 unsigned int pull_len;
1480 /* if the page was released unmap it, else just sync our portion */
1481 if (unlikely(IXGBE_CB(skb)->page_released)) {
1482 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1483 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1484 IXGBE_CB(skb)->page_released = false;
1486 dma_sync_single_range_for_cpu(rx_ring->dev,
1489 ixgbe_rx_bufsz(rx_ring),
1492 IXGBE_CB(skb)->dma = 0;
1494 /* verify that the packet does not have any known errors */
1495 if (unlikely(ixgbe_test_staterr(rx_desc,
1496 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1497 !(netdev->features & NETIF_F_RXALL))) {
1498 dev_kfree_skb_any(skb);
1503 * it is valid to use page_address instead of kmap since we are
1504 * working with pages allocated out of the lomem pool per
1505 * alloc_page(GFP_ATOMIC)
1507 va = skb_frag_address(frag);
1510 * we need the header to contain the greater of either ETH_HLEN or
1511 * 60 bytes if the skb->len is less than 60 for skb_pad.
1513 pull_len = skb_frag_size(frag);
1515 pull_len = ixgbe_get_headlen(va, pull_len);
1517 /* align pull length to size of long to optimize memcpy performance */
1518 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1520 /* update all of the pointers */
1521 skb_frag_size_sub(frag, pull_len);
1522 frag->page_offset += pull_len;
1523 skb->data_len -= pull_len;
1524 skb->tail += pull_len;
1527 * if we sucked the frag empty then we should free it,
1528 * if there are other frags here something is screwed up in hardware
1530 if (skb_frag_size(frag) == 0) {
1531 BUG_ON(skb_shinfo(skb)->nr_frags != 1);
1532 skb_shinfo(skb)->nr_frags = 0;
1533 __skb_frag_unref(frag);
1534 skb->truesize -= ixgbe_rx_bufsz(rx_ring);
1537 /* if skb_pad returns an error the skb was freed */
1538 if (unlikely(skb->len < 60)) {
1539 int pad_len = 60 - skb->len;
1541 if (skb_pad(skb, pad_len))
1543 __skb_put(skb, pad_len);
1550 * ixgbe_can_reuse_page - determine if we can reuse a page
1551 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1553 * Returns true if page can be reused in another Rx buffer
1555 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer *rx_buffer)
1557 struct page *page = rx_buffer->page;
1559 /* if we are only owner of page and it is local we can reuse it */
1560 return likely(page_count(page) == 1) &&
1561 likely(page_to_nid(page) == numa_node_id());
1565 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1566 * @rx_ring: rx descriptor ring to store buffers on
1567 * @old_buff: donor buffer to have page reused
1569 * Syncronizes page for reuse by the adapter
1571 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1572 struct ixgbe_rx_buffer *old_buff)
1574 struct ixgbe_rx_buffer *new_buff;
1575 u16 nta = rx_ring->next_to_alloc;
1576 u16 bufsz = ixgbe_rx_bufsz(rx_ring);
1578 new_buff = &rx_ring->rx_buffer_info[nta];
1580 /* update, and store next to alloc */
1582 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1584 /* transfer page from old buffer to new buffer */
1585 new_buff->page = old_buff->page;
1586 new_buff->dma = old_buff->dma;
1588 /* flip page offset to other buffer and store to new_buff */
1589 new_buff->page_offset = old_buff->page_offset ^ bufsz;
1591 /* sync the buffer for use by the device */
1592 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1593 new_buff->page_offset, bufsz,
1596 /* bump ref count on page before it is given to the stack */
1597 get_page(new_buff->page);
1601 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1602 * @rx_ring: rx descriptor ring to transact packets on
1603 * @rx_buffer: buffer containing page to add
1604 * @rx_desc: descriptor containing length of buffer written by hardware
1605 * @skb: sk_buff to place the data into
1607 * This function is based on skb_add_rx_frag. I would have used that
1608 * function however it doesn't handle the truesize case correctly since we
1609 * are allocating more memory than might be used for a single receive.
1611 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1612 struct ixgbe_rx_buffer *rx_buffer,
1613 struct sk_buff *skb, int size)
1615 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
1616 rx_buffer->page, rx_buffer->page_offset,
1619 skb->data_len += size;
1620 skb->truesize += ixgbe_rx_bufsz(rx_ring);
1624 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1625 * @q_vector: structure containing interrupt and ring information
1626 * @rx_ring: rx descriptor ring to transact packets on
1627 * @budget: Total limit on number of packets to process
1629 * This function provides a "bounce buffer" approach to Rx interrupt
1630 * processing. The advantage to this is that on systems that have
1631 * expensive overhead for IOMMU access this provides a means of avoiding
1632 * it by maintaining the mapping of the page to the syste.
1634 * Returns true if all work is completed without reaching budget
1636 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1637 struct ixgbe_ring *rx_ring,
1640 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1642 struct ixgbe_adapter *adapter = q_vector->adapter;
1644 #endif /* IXGBE_FCOE */
1645 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1648 struct ixgbe_rx_buffer *rx_buffer;
1649 union ixgbe_adv_rx_desc *rx_desc;
1650 struct sk_buff *skb;
1654 /* return some buffers to hardware, one at a time is too slow */
1655 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1656 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1660 ntc = rx_ring->next_to_clean;
1661 rx_desc = IXGBE_RX_DESC(rx_ring, ntc);
1662 rx_buffer = &rx_ring->rx_buffer_info[ntc];
1664 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
1668 * This memory barrier is needed to keep us from reading
1669 * any other fields out of the rx_desc until we know the
1670 * RXD_STAT_DD bit is set
1674 page = rx_buffer->page;
1677 skb = rx_buffer->skb;
1680 void *page_addr = page_address(page) +
1681 rx_buffer->page_offset;
1683 /* prefetch first cache line of first page */
1684 prefetch(page_addr);
1685 #if L1_CACHE_BYTES < 128
1686 prefetch(page_addr + L1_CACHE_BYTES);
1689 /* allocate a skb to store the frags */
1690 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1692 if (unlikely(!skb)) {
1693 rx_ring->rx_stats.alloc_rx_buff_failed++;
1698 * we will be copying header into skb->data in
1699 * pskb_may_pull so it is in our interest to prefetch
1700 * it now to avoid a possible cache miss
1702 prefetchw(skb->data);
1705 * Delay unmapping of the first packet. It carries the
1706 * header information, HW may still access the header
1707 * after the writeback. Only unmap it when EOP is
1710 IXGBE_CB(skb)->dma = rx_buffer->dma;
1712 /* we are reusing so sync this buffer for CPU use */
1713 dma_sync_single_range_for_cpu(rx_ring->dev,
1715 rx_buffer->page_offset,
1716 ixgbe_rx_bufsz(rx_ring),
1720 /* pull page into skb */
1721 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb,
1722 le16_to_cpu(rx_desc->wb.upper.length));
1724 if (ixgbe_can_reuse_page(rx_buffer)) {
1725 /* hand second half of page back to the ring */
1726 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1727 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1728 /* the page has been released from the ring */
1729 IXGBE_CB(skb)->page_released = true;
1731 /* we are not reusing the buffer so unmap it */
1732 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1733 ixgbe_rx_pg_size(rx_ring),
1737 /* clear contents of buffer_info */
1738 rx_buffer->skb = NULL;
1740 rx_buffer->page = NULL;
1742 ixgbe_get_rsc_cnt(rx_ring, rx_desc, skb);
1746 /* place incomplete frames back on ring for completion */
1747 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
1750 /* verify the packet layout is correct */
1751 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
1754 /* probably a little skewed due to removing CRC */
1755 total_rx_bytes += skb->len;
1758 /* populate checksum, timestamp, VLAN, and protocol */
1759 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
1762 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1763 if (ixgbe_rx_is_fcoe(adapter, rx_desc)) {
1764 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1766 dev_kfree_skb_any(skb);
1771 #endif /* IXGBE_FCOE */
1772 ixgbe_rx_skb(q_vector, skb);
1774 /* update budget accounting */
1776 } while (likely(budget));
1779 /* include DDPed FCoE data */
1780 if (ddp_bytes > 0) {
1783 mss = rx_ring->netdev->mtu - sizeof(struct fcoe_hdr) -
1784 sizeof(struct fc_frame_header) -
1785 sizeof(struct fcoe_crc_eof);
1788 total_rx_bytes += ddp_bytes;
1789 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1792 #endif /* IXGBE_FCOE */
1793 u64_stats_update_begin(&rx_ring->syncp);
1794 rx_ring->stats.packets += total_rx_packets;
1795 rx_ring->stats.bytes += total_rx_bytes;
1796 u64_stats_update_end(&rx_ring->syncp);
1797 q_vector->rx.total_packets += total_rx_packets;
1798 q_vector->rx.total_bytes += total_rx_bytes;
1801 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
1807 * ixgbe_configure_msix - Configure MSI-X hardware
1808 * @adapter: board private structure
1810 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1813 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1815 struct ixgbe_q_vector *q_vector;
1816 int q_vectors, v_idx;
1819 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1821 /* Populate MSIX to EITR Select */
1822 if (adapter->num_vfs > 32) {
1823 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1824 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1828 * Populate the IVAR table and set the ITR values to the
1829 * corresponding register.
1831 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
1832 struct ixgbe_ring *ring;
1833 q_vector = adapter->q_vector[v_idx];
1835 ixgbe_for_each_ring(ring, q_vector->rx)
1836 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1838 ixgbe_for_each_ring(ring, q_vector->tx)
1839 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1841 if (q_vector->tx.ring && !q_vector->rx.ring) {
1842 /* tx only vector */
1843 if (adapter->tx_itr_setting == 1)
1844 q_vector->itr = IXGBE_10K_ITR;
1846 q_vector->itr = adapter->tx_itr_setting;
1848 /* rx or rx/tx vector */
1849 if (adapter->rx_itr_setting == 1)
1850 q_vector->itr = IXGBE_20K_ITR;
1852 q_vector->itr = adapter->rx_itr_setting;
1855 ixgbe_write_eitr(q_vector);
1858 switch (adapter->hw.mac.type) {
1859 case ixgbe_mac_82598EB:
1860 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1863 case ixgbe_mac_82599EB:
1864 case ixgbe_mac_X540:
1865 ixgbe_set_ivar(adapter, -1, 1, v_idx);
1870 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
1872 /* set up to autoclear timer, and the vectors */
1873 mask = IXGBE_EIMS_ENABLE_MASK;
1874 mask &= ~(IXGBE_EIMS_OTHER |
1875 IXGBE_EIMS_MAILBOX |
1878 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1881 enum latency_range {
1885 latency_invalid = 255
1889 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1890 * @q_vector: structure containing interrupt and ring information
1891 * @ring_container: structure containing ring performance data
1893 * Stores a new ITR value based on packets and byte
1894 * counts during the last interrupt. The advantage of per interrupt
1895 * computation is faster updates and more accurate ITR for the current
1896 * traffic pattern. Constants in this function were computed
1897 * based on theoretical maximum wire speed and thresholds were set based
1898 * on testing data as well as attempting to minimize response time
1899 * while increasing bulk throughput.
1900 * this functionality is controlled by the InterruptThrottleRate module
1901 * parameter (see ixgbe_param.c)
1903 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
1904 struct ixgbe_ring_container *ring_container)
1906 int bytes = ring_container->total_bytes;
1907 int packets = ring_container->total_packets;
1910 u8 itr_setting = ring_container->itr;
1915 /* simple throttlerate management
1916 * 0-10MB/s lowest (100000 ints/s)
1917 * 10-20MB/s low (20000 ints/s)
1918 * 20-1249MB/s bulk (8000 ints/s)
1920 /* what was last interrupt timeslice? */
1921 timepassed_us = q_vector->itr >> 2;
1922 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1924 switch (itr_setting) {
1925 case lowest_latency:
1926 if (bytes_perint > 10)
1927 itr_setting = low_latency;
1930 if (bytes_perint > 20)
1931 itr_setting = bulk_latency;
1932 else if (bytes_perint <= 10)
1933 itr_setting = lowest_latency;
1936 if (bytes_perint <= 20)
1937 itr_setting = low_latency;
1941 /* clear work counters since we have the values we need */
1942 ring_container->total_bytes = 0;
1943 ring_container->total_packets = 0;
1945 /* write updated itr to ring container */
1946 ring_container->itr = itr_setting;
1950 * ixgbe_write_eitr - write EITR register in hardware specific way
1951 * @q_vector: structure containing interrupt and ring information
1953 * This function is made to be called by ethtool and by the driver
1954 * when it needs to update EITR registers at runtime. Hardware
1955 * specific quirks/differences are taken care of here.
1957 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1959 struct ixgbe_adapter *adapter = q_vector->adapter;
1960 struct ixgbe_hw *hw = &adapter->hw;
1961 int v_idx = q_vector->v_idx;
1962 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1964 switch (adapter->hw.mac.type) {
1965 case ixgbe_mac_82598EB:
1966 /* must write high and low 16 bits to reset counter */
1967 itr_reg |= (itr_reg << 16);
1969 case ixgbe_mac_82599EB:
1970 case ixgbe_mac_X540:
1972 * set the WDIS bit to not clear the timer bits and cause an
1973 * immediate assertion of the interrupt
1975 itr_reg |= IXGBE_EITR_CNT_WDIS;
1980 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1983 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
1985 u32 new_itr = q_vector->itr;
1988 ixgbe_update_itr(q_vector, &q_vector->tx);
1989 ixgbe_update_itr(q_vector, &q_vector->rx);
1991 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
1993 switch (current_itr) {
1994 /* counts and packets in update_itr are dependent on these numbers */
1995 case lowest_latency:
1996 new_itr = IXGBE_100K_ITR;
1999 new_itr = IXGBE_20K_ITR;
2002 new_itr = IXGBE_8K_ITR;
2008 if (new_itr != q_vector->itr) {
2009 /* do an exponential smoothing */
2010 new_itr = (10 * new_itr * q_vector->itr) /
2011 ((9 * new_itr) + q_vector->itr);
2013 /* save the algorithm value here */
2014 q_vector->itr = new_itr;
2016 ixgbe_write_eitr(q_vector);
2021 * ixgbe_check_overtemp_subtask - check for over temperature
2022 * @adapter: pointer to adapter
2024 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2026 struct ixgbe_hw *hw = &adapter->hw;
2027 u32 eicr = adapter->interrupt_event;
2029 if (test_bit(__IXGBE_DOWN, &adapter->state))
2032 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2033 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2036 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2038 switch (hw->device_id) {
2039 case IXGBE_DEV_ID_82599_T3_LOM:
2041 * Since the warning interrupt is for both ports
2042 * we don't have to check if:
2043 * - This interrupt wasn't for our port.
2044 * - We may have missed the interrupt so always have to
2045 * check if we got a LSC
2047 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2048 !(eicr & IXGBE_EICR_LSC))
2051 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2053 bool link_up = false;
2055 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2061 /* Check if this is not due to overtemp */
2062 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2067 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2072 "Network adapter has been stopped because it has over heated. "
2073 "Restart the computer. If the problem persists, "
2074 "power off the system and replace the adapter\n");
2076 adapter->interrupt_event = 0;
2079 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2081 struct ixgbe_hw *hw = &adapter->hw;
2083 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2084 (eicr & IXGBE_EICR_GPI_SDP1)) {
2085 e_crit(probe, "Fan has stopped, replace the adapter\n");
2086 /* write to clear the interrupt */
2087 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2091 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2093 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2096 switch (adapter->hw.mac.type) {
2097 case ixgbe_mac_82599EB:
2099 * Need to check link state so complete overtemp check
2102 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2103 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2104 adapter->interrupt_event = eicr;
2105 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2106 ixgbe_service_event_schedule(adapter);
2110 case ixgbe_mac_X540:
2111 if (!(eicr & IXGBE_EICR_TS))
2119 "Network adapter has been stopped because it has over heated. "
2120 "Restart the computer. If the problem persists, "
2121 "power off the system and replace the adapter\n");
2124 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2126 struct ixgbe_hw *hw = &adapter->hw;
2128 if (eicr & IXGBE_EICR_GPI_SDP2) {
2129 /* Clear the interrupt */
2130 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2131 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2132 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2133 ixgbe_service_event_schedule(adapter);
2137 if (eicr & IXGBE_EICR_GPI_SDP1) {
2138 /* Clear the interrupt */
2139 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2140 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2141 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2142 ixgbe_service_event_schedule(adapter);
2147 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2149 struct ixgbe_hw *hw = &adapter->hw;
2152 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2153 adapter->link_check_timeout = jiffies;
2154 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2155 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2156 IXGBE_WRITE_FLUSH(hw);
2157 ixgbe_service_event_schedule(adapter);
2161 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2165 struct ixgbe_hw *hw = &adapter->hw;
2167 switch (hw->mac.type) {
2168 case ixgbe_mac_82598EB:
2169 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2170 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2172 case ixgbe_mac_82599EB:
2173 case ixgbe_mac_X540:
2174 mask = (qmask & 0xFFFFFFFF);
2176 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2177 mask = (qmask >> 32);
2179 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2184 /* skip the flush */
2187 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2191 struct ixgbe_hw *hw = &adapter->hw;
2193 switch (hw->mac.type) {
2194 case ixgbe_mac_82598EB:
2195 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2196 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2198 case ixgbe_mac_82599EB:
2199 case ixgbe_mac_X540:
2200 mask = (qmask & 0xFFFFFFFF);
2202 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2203 mask = (qmask >> 32);
2205 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2210 /* skip the flush */
2214 * ixgbe_irq_enable - Enable default interrupt generation settings
2215 * @adapter: board private structure
2217 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2220 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2222 /* don't reenable LSC while waiting for link */
2223 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2224 mask &= ~IXGBE_EIMS_LSC;
2226 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2227 switch (adapter->hw.mac.type) {
2228 case ixgbe_mac_82599EB:
2229 mask |= IXGBE_EIMS_GPI_SDP0;
2231 case ixgbe_mac_X540:
2232 mask |= IXGBE_EIMS_TS;
2237 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2238 mask |= IXGBE_EIMS_GPI_SDP1;
2239 switch (adapter->hw.mac.type) {
2240 case ixgbe_mac_82599EB:
2241 mask |= IXGBE_EIMS_GPI_SDP1;
2242 mask |= IXGBE_EIMS_GPI_SDP2;
2243 case ixgbe_mac_X540:
2244 mask |= IXGBE_EIMS_ECC;
2245 mask |= IXGBE_EIMS_MAILBOX;
2250 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2251 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2252 mask |= IXGBE_EIMS_FLOW_DIR;
2254 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2256 ixgbe_irq_enable_queues(adapter, ~0);
2258 IXGBE_WRITE_FLUSH(&adapter->hw);
2261 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2263 struct ixgbe_adapter *adapter = data;
2264 struct ixgbe_hw *hw = &adapter->hw;
2268 * Workaround for Silicon errata. Use clear-by-write instead
2269 * of clear-by-read. Reading with EICS will return the
2270 * interrupt causes without clearing, which later be done
2271 * with the write to EICR.
2273 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2274 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2276 if (eicr & IXGBE_EICR_LSC)
2277 ixgbe_check_lsc(adapter);
2279 if (eicr & IXGBE_EICR_MAILBOX)
2280 ixgbe_msg_task(adapter);
2282 switch (hw->mac.type) {
2283 case ixgbe_mac_82599EB:
2284 case ixgbe_mac_X540:
2285 if (eicr & IXGBE_EICR_ECC)
2286 e_info(link, "Received unrecoverable ECC Err, please "
2288 /* Handle Flow Director Full threshold interrupt */
2289 if (eicr & IXGBE_EICR_FLOW_DIR) {
2290 int reinit_count = 0;
2292 for (i = 0; i < adapter->num_tx_queues; i++) {
2293 struct ixgbe_ring *ring = adapter->tx_ring[i];
2294 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2299 /* no more flow director interrupts until after init */
2300 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2301 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2302 ixgbe_service_event_schedule(adapter);
2305 ixgbe_check_sfp_event(adapter, eicr);
2306 ixgbe_check_overtemp_event(adapter, eicr);
2312 ixgbe_check_fan_failure(adapter, eicr);
2314 /* re-enable the original interrupt state, no lsc, no queues */
2315 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2316 ixgbe_irq_enable(adapter, false, false);
2321 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2323 struct ixgbe_q_vector *q_vector = data;
2325 /* EIAM disabled interrupts (on this vector) for us */
2327 if (q_vector->rx.ring || q_vector->tx.ring)
2328 napi_schedule(&q_vector->napi);
2334 * ixgbe_poll - NAPI Rx polling callback
2335 * @napi: structure for representing this polling device
2336 * @budget: how many packets driver is allowed to clean
2338 * This function is used for legacy and MSI, NAPI mode
2340 int ixgbe_poll(struct napi_struct *napi, int budget)
2342 struct ixgbe_q_vector *q_vector =
2343 container_of(napi, struct ixgbe_q_vector, napi);
2344 struct ixgbe_adapter *adapter = q_vector->adapter;
2345 struct ixgbe_ring *ring;
2346 int per_ring_budget;
2347 bool clean_complete = true;
2349 #ifdef CONFIG_IXGBE_DCA
2350 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2351 ixgbe_update_dca(q_vector);
2354 ixgbe_for_each_ring(ring, q_vector->tx)
2355 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2357 /* attempt to distribute budget to each queue fairly, but don't allow
2358 * the budget to go below 1 because we'll exit polling */
2359 if (q_vector->rx.count > 1)
2360 per_ring_budget = max(budget/q_vector->rx.count, 1);
2362 per_ring_budget = budget;
2364 ixgbe_for_each_ring(ring, q_vector->rx)
2365 clean_complete &= ixgbe_clean_rx_irq(q_vector, ring,
2368 /* If all work not completed, return budget and keep polling */
2369 if (!clean_complete)
2372 /* all work done, exit the polling mode */
2373 napi_complete(napi);
2374 if (adapter->rx_itr_setting & 1)
2375 ixgbe_set_itr(q_vector);
2376 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2377 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2383 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2384 * @adapter: board private structure
2386 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2387 * interrupts from the kernel.
2389 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2391 struct net_device *netdev = adapter->netdev;
2392 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2396 for (vector = 0; vector < q_vectors; vector++) {
2397 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2398 struct msix_entry *entry = &adapter->msix_entries[vector];
2400 if (q_vector->tx.ring && q_vector->rx.ring) {
2401 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2402 "%s-%s-%d", netdev->name, "TxRx", ri++);
2404 } else if (q_vector->rx.ring) {
2405 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2406 "%s-%s-%d", netdev->name, "rx", ri++);
2407 } else if (q_vector->tx.ring) {
2408 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2409 "%s-%s-%d", netdev->name, "tx", ti++);
2411 /* skip this unused q_vector */
2414 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2415 q_vector->name, q_vector);
2417 e_err(probe, "request_irq failed for MSIX interrupt "
2418 "Error: %d\n", err);
2419 goto free_queue_irqs;
2421 /* If Flow Director is enabled, set interrupt affinity */
2422 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2423 /* assign the mask for this irq */
2424 irq_set_affinity_hint(entry->vector,
2425 &q_vector->affinity_mask);
2429 err = request_irq(adapter->msix_entries[vector].vector,
2430 ixgbe_msix_other, 0, netdev->name, adapter);
2432 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2433 goto free_queue_irqs;
2441 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2443 free_irq(adapter->msix_entries[vector].vector,
2444 adapter->q_vector[vector]);
2446 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2447 pci_disable_msix(adapter->pdev);
2448 kfree(adapter->msix_entries);
2449 adapter->msix_entries = NULL;
2454 * ixgbe_intr - legacy mode Interrupt Handler
2455 * @irq: interrupt number
2456 * @data: pointer to a network interface device structure
2458 static irqreturn_t ixgbe_intr(int irq, void *data)
2460 struct ixgbe_adapter *adapter = data;
2461 struct ixgbe_hw *hw = &adapter->hw;
2462 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2466 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2467 * before the read of EICR.
2469 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2471 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2472 * therefore no explicit interrupt disable is necessary */
2473 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2476 * shared interrupt alert!
2477 * make sure interrupts are enabled because the read will
2478 * have disabled interrupts due to EIAM
2479 * finish the workaround of silicon errata on 82598. Unmask
2480 * the interrupt that we masked before the EICR read.
2482 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2483 ixgbe_irq_enable(adapter, true, true);
2484 return IRQ_NONE; /* Not our interrupt */
2487 if (eicr & IXGBE_EICR_LSC)
2488 ixgbe_check_lsc(adapter);
2490 switch (hw->mac.type) {
2491 case ixgbe_mac_82599EB:
2492 ixgbe_check_sfp_event(adapter, eicr);
2494 case ixgbe_mac_X540:
2495 if (eicr & IXGBE_EICR_ECC)
2496 e_info(link, "Received unrecoverable ECC err, please "
2498 ixgbe_check_overtemp_event(adapter, eicr);
2504 ixgbe_check_fan_failure(adapter, eicr);
2506 /* would disable interrupts here but EIAM disabled it */
2507 napi_schedule(&q_vector->napi);
2510 * re-enable link(maybe) and non-queue interrupts, no flush.
2511 * ixgbe_poll will re-enable the queue interrupts
2513 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2514 ixgbe_irq_enable(adapter, false, false);
2520 * ixgbe_request_irq - initialize interrupts
2521 * @adapter: board private structure
2523 * Attempts to configure interrupts using the best available
2524 * capabilities of the hardware and kernel.
2526 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2528 struct net_device *netdev = adapter->netdev;
2531 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2532 err = ixgbe_request_msix_irqs(adapter);
2533 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2534 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2535 netdev->name, adapter);
2537 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2538 netdev->name, adapter);
2541 e_err(probe, "request_irq failed, Error %d\n", err);
2546 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2548 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2551 q_vectors = adapter->num_msix_vectors;
2553 free_irq(adapter->msix_entries[i].vector, adapter);
2556 for (; i >= 0; i--) {
2557 /* free only the irqs that were actually requested */
2558 if (!adapter->q_vector[i]->rx.ring &&
2559 !adapter->q_vector[i]->tx.ring)
2562 /* clear the affinity_mask in the IRQ descriptor */
2563 irq_set_affinity_hint(adapter->msix_entries[i].vector,
2566 free_irq(adapter->msix_entries[i].vector,
2567 adapter->q_vector[i]);
2570 free_irq(adapter->pdev->irq, adapter);
2575 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2576 * @adapter: board private structure
2578 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2580 switch (adapter->hw.mac.type) {
2581 case ixgbe_mac_82598EB:
2582 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2584 case ixgbe_mac_82599EB:
2585 case ixgbe_mac_X540:
2586 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2587 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2588 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2593 IXGBE_WRITE_FLUSH(&adapter->hw);
2594 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2596 for (i = 0; i < adapter->num_msix_vectors; i++)
2597 synchronize_irq(adapter->msix_entries[i].vector);
2599 synchronize_irq(adapter->pdev->irq);
2604 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2607 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2609 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2612 if (adapter->rx_itr_setting == 1)
2613 q_vector->itr = IXGBE_20K_ITR;
2615 q_vector->itr = adapter->rx_itr_setting;
2617 ixgbe_write_eitr(q_vector);
2619 ixgbe_set_ivar(adapter, 0, 0, 0);
2620 ixgbe_set_ivar(adapter, 1, 0, 0);
2622 e_info(hw, "Legacy interrupt IVAR setup done\n");
2626 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2627 * @adapter: board private structure
2628 * @ring: structure containing ring specific data
2630 * Configure the Tx descriptor ring after a reset.
2632 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2633 struct ixgbe_ring *ring)
2635 struct ixgbe_hw *hw = &adapter->hw;
2636 u64 tdba = ring->dma;
2638 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2639 u8 reg_idx = ring->reg_idx;
2641 /* disable queue to avoid issues while updating state */
2642 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2643 IXGBE_WRITE_FLUSH(hw);
2645 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2646 (tdba & DMA_BIT_MASK(32)));
2647 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2648 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2649 ring->count * sizeof(union ixgbe_adv_tx_desc));
2650 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2651 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2652 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
2655 * set WTHRESH to encourage burst writeback, it should not be set
2656 * higher than 1 when ITR is 0 as it could cause false TX hangs
2658 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2659 * to or less than the number of on chip descriptors, which is
2662 if (!ring->q_vector || (ring->q_vector->itr < 8))
2663 txdctl |= (1 << 16); /* WTHRESH = 1 */
2665 txdctl |= (8 << 16); /* WTHRESH = 8 */
2668 * Setting PTHRESH to 32 both improves performance
2669 * and avoids a TX hang with DFP enabled
2671 txdctl |= (1 << 8) | /* HTHRESH = 1 */
2672 32; /* PTHRESH = 32 */
2674 /* reinitialize flowdirector state */
2675 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2676 adapter->atr_sample_rate) {
2677 ring->atr_sample_rate = adapter->atr_sample_rate;
2678 ring->atr_count = 0;
2679 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
2681 ring->atr_sample_rate = 0;
2684 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
2687 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2689 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2690 if (hw->mac.type == ixgbe_mac_82598EB &&
2691 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2694 /* poll to verify queue is enabled */
2696 usleep_range(1000, 2000);
2697 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2698 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2700 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
2703 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2705 struct ixgbe_hw *hw = &adapter->hw;
2708 u8 tcs = netdev_get_num_tc(adapter->netdev);
2710 if (hw->mac.type == ixgbe_mac_82598EB)
2713 /* disable the arbiter while setting MTQC */
2714 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2715 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2716 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2718 /* set transmit pool layout */
2719 switch (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2720 case (IXGBE_FLAG_SRIOV_ENABLED):
2721 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2722 (IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF));
2726 reg = IXGBE_MTQC_64Q_1PB;
2728 reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
2730 reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
2732 IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg);
2734 /* Enable Security TX Buffer IFG for multiple pb */
2736 reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
2737 reg |= IXGBE_SECTX_DCB;
2738 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg);
2743 /* re-enable the arbiter */
2744 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2745 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2749 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2750 * @adapter: board private structure
2752 * Configure the Tx unit of the MAC after a reset.
2754 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2756 struct ixgbe_hw *hw = &adapter->hw;
2760 ixgbe_setup_mtqc(adapter);
2762 if (hw->mac.type != ixgbe_mac_82598EB) {
2763 /* DMATXCTL.EN must be before Tx queues are enabled */
2764 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2765 dmatxctl |= IXGBE_DMATXCTL_TE;
2766 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2769 /* Setup the HW Tx Head and Tail descriptor pointers */
2770 for (i = 0; i < adapter->num_tx_queues; i++)
2771 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
2774 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
2775 struct ixgbe_ring *ring)
2777 struct ixgbe_hw *hw = &adapter->hw;
2778 u8 reg_idx = ring->reg_idx;
2779 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2781 srrctl |= IXGBE_SRRCTL_DROP_EN;
2783 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2786 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
2787 struct ixgbe_ring *ring)
2789 struct ixgbe_hw *hw = &adapter->hw;
2790 u8 reg_idx = ring->reg_idx;
2791 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
2793 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
2795 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
2798 #ifdef CONFIG_IXGBE_DCB
2799 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2801 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
2805 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2807 if (adapter->ixgbe_ieee_pfc)
2808 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2811 * We should set the drop enable bit if:
2814 * Number of Rx queues > 1 and flow control is disabled
2816 * This allows us to avoid head of line blocking for security
2817 * and performance reasons.
2819 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
2820 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
2821 for (i = 0; i < adapter->num_rx_queues; i++)
2822 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
2824 for (i = 0; i < adapter->num_rx_queues; i++)
2825 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
2829 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2831 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2832 struct ixgbe_ring *rx_ring)
2835 u8 reg_idx = rx_ring->reg_idx;
2837 switch (adapter->hw.mac.type) {
2838 case ixgbe_mac_82598EB: {
2839 struct ixgbe_ring_feature *feature = adapter->ring_feature;
2840 const int mask = feature[RING_F_RSS].mask;
2841 reg_idx = reg_idx & mask;
2844 case ixgbe_mac_82599EB:
2845 case ixgbe_mac_X540:
2850 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(reg_idx));
2852 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
2853 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
2854 if (adapter->num_vfs)
2855 srrctl |= IXGBE_SRRCTL_DROP_EN;
2857 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
2858 IXGBE_SRRCTL_BSIZEHDR_MASK;
2860 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2861 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2863 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2865 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
2867 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(reg_idx), srrctl);
2870 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2872 struct ixgbe_hw *hw = &adapter->hw;
2873 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2874 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2875 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2876 u32 mrqc = 0, reta = 0;
2879 u8 tcs = netdev_get_num_tc(adapter->netdev);
2880 int maxq = adapter->ring_feature[RING_F_RSS].indices;
2883 maxq = min(maxq, adapter->num_tx_queues / tcs);
2885 /* Fill out hash function seeds */
2886 for (i = 0; i < 10; i++)
2887 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2889 /* Fill out redirection table */
2890 for (i = 0, j = 0; i < 128; i++, j++) {
2893 /* reta = 4-byte sliding window of
2894 * 0x00..(indices-1)(indices-1)00..etc. */
2895 reta = (reta << 8) | (j * 0x11);
2897 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2900 /* Disable indicating checksum in descriptor, enables RSS hash */
2901 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2902 rxcsum |= IXGBE_RXCSUM_PCSD;
2903 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2905 if (adapter->hw.mac.type == ixgbe_mac_82598EB &&
2906 (adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
2907 mrqc = IXGBE_MRQC_RSSEN;
2909 int mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
2910 | IXGBE_FLAG_SRIOV_ENABLED);
2913 case (IXGBE_FLAG_RSS_ENABLED):
2915 mrqc = IXGBE_MRQC_RSSEN;
2917 mrqc = IXGBE_MRQC_RTRSS4TCEN;
2919 mrqc = IXGBE_MRQC_RTRSS8TCEN;
2921 case (IXGBE_FLAG_SRIOV_ENABLED):
2922 mrqc = IXGBE_MRQC_VMDQEN;
2929 /* Perform hash on these packet types */
2930 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2931 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2932 | IXGBE_MRQC_RSS_FIELD_IPV6
2933 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2935 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2936 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2937 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2938 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2940 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2944 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2945 * @adapter: address of board private structure
2946 * @index: index of ring to set
2948 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
2949 struct ixgbe_ring *ring)
2951 struct ixgbe_hw *hw = &adapter->hw;
2953 u8 reg_idx = ring->reg_idx;
2955 if (!ring_is_rsc_enabled(ring))
2958 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
2959 rscctrl |= IXGBE_RSCCTL_RSCEN;
2961 * we must limit the number of descriptors so that the
2962 * total size of max desc * buf_len is not greater
2965 #if (PAGE_SIZE <= 8192)
2966 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2967 #elif (PAGE_SIZE <= 16384)
2968 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2970 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2972 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
2975 #define IXGBE_MAX_RX_DESC_POLL 10
2976 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2977 struct ixgbe_ring *ring)
2979 struct ixgbe_hw *hw = &adapter->hw;
2980 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
2982 u8 reg_idx = ring->reg_idx;
2984 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2985 if (hw->mac.type == ixgbe_mac_82598EB &&
2986 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2990 usleep_range(1000, 2000);
2991 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
2992 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
2995 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
2996 "the polling period\n", reg_idx);
3000 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3001 struct ixgbe_ring *ring)
3003 struct ixgbe_hw *hw = &adapter->hw;
3004 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3006 u8 reg_idx = ring->reg_idx;
3008 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3009 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3011 /* write value back with RXDCTL.ENABLE bit cleared */
3012 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3014 if (hw->mac.type == ixgbe_mac_82598EB &&
3015 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3018 /* the hardware may take up to 100us to really disable the rx queue */
3021 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3022 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3025 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3026 "the polling period\n", reg_idx);
3030 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3031 struct ixgbe_ring *ring)
3033 struct ixgbe_hw *hw = &adapter->hw;
3034 u64 rdba = ring->dma;
3036 u8 reg_idx = ring->reg_idx;
3038 /* disable queue to avoid issues while updating state */
3039 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3040 ixgbe_disable_rx_queue(adapter, ring);
3042 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3043 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3044 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3045 ring->count * sizeof(union ixgbe_adv_rx_desc));
3046 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3047 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3048 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
3050 ixgbe_configure_srrctl(adapter, ring);
3051 ixgbe_configure_rscctl(adapter, ring);
3053 /* If operating in IOV mode set RLPML for X540 */
3054 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3055 hw->mac.type == ixgbe_mac_X540) {
3056 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
3057 rxdctl |= ((ring->netdev->mtu + ETH_HLEN +
3058 ETH_FCS_LEN + VLAN_HLEN) | IXGBE_RXDCTL_RLPML_EN);
3061 if (hw->mac.type == ixgbe_mac_82598EB) {
3063 * enable cache line friendly hardware writes:
3064 * PTHRESH=32 descriptors (half the internal cache),
3065 * this also removes ugly rx_no_buffer_count increment
3066 * HTHRESH=4 descriptors (to minimize latency on fetch)
3067 * WTHRESH=8 burst writeback up to two cache lines
3069 rxdctl &= ~0x3FFFFF;
3073 /* enable receive descriptor ring */
3074 rxdctl |= IXGBE_RXDCTL_ENABLE;
3075 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3077 ixgbe_rx_desc_queue_enable(adapter, ring);
3078 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3081 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3083 struct ixgbe_hw *hw = &adapter->hw;
3086 /* PSRTYPE must be initialized in non 82598 adapters */
3087 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3088 IXGBE_PSRTYPE_UDPHDR |
3089 IXGBE_PSRTYPE_IPV4HDR |
3090 IXGBE_PSRTYPE_L2HDR |
3091 IXGBE_PSRTYPE_IPV6HDR;
3093 if (hw->mac.type == ixgbe_mac_82598EB)
3096 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
3097 psrtype |= (adapter->num_rx_queues_per_pool << 29);
3099 for (p = 0; p < adapter->num_rx_pools; p++)
3100 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(adapter->num_vfs + p),
3104 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3106 struct ixgbe_hw *hw = &adapter->hw;
3109 u32 reg_offset, vf_shift;
3113 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3116 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3117 vt_reg_bits = IXGBE_VMD_CTL_VMDQ_EN | IXGBE_VT_CTL_REPLEN;
3118 vt_reg_bits |= (adapter->num_vfs << IXGBE_VT_CTL_POOL_SHIFT);
3119 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
3121 vf_shift = adapter->num_vfs % 32;
3122 reg_offset = (adapter->num_vfs >= 32) ? 1 : 0;
3124 /* Enable only the PF's pool for Tx/Rx */
3125 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
3126 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), 0);
3127 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
3128 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), 0);
3129 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3131 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3132 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
3135 * Set up VF register offsets for selected VT Mode,
3136 * i.e. 32 or 64 VFs for SR-IOV
3138 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
3139 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN;
3140 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64;
3141 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3143 /* enable Tx loopback for VF/PF communication */
3144 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3145 /* Enable MAC Anti-Spoofing */
3146 hw->mac.ops.set_mac_anti_spoofing(hw,
3147 (adapter->num_vfs != 0),
3149 /* For VFs that have spoof checking turned off */
3150 for (i = 0; i < adapter->num_vfs; i++) {
3151 if (!adapter->vfinfo[i].spoofchk_enabled)
3152 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3156 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3158 struct ixgbe_hw *hw = &adapter->hw;
3159 struct net_device *netdev = adapter->netdev;
3160 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3161 struct ixgbe_ring *rx_ring;
3166 /* adjust max frame to be able to do baby jumbo for FCoE */
3167 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3168 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3169 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3171 #endif /* IXGBE_FCOE */
3172 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3173 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3174 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3175 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3177 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3180 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3181 max_frame += VLAN_HLEN;
3183 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3184 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3185 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3186 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3189 * Setup the HW Rx Head and Tail Descriptor Pointers and
3190 * the Base and Length of the Rx Descriptor Ring
3192 for (i = 0; i < adapter->num_rx_queues; i++) {
3193 rx_ring = adapter->rx_ring[i];
3194 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3195 set_ring_rsc_enabled(rx_ring);
3197 clear_ring_rsc_enabled(rx_ring);
3201 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3203 struct ixgbe_hw *hw = &adapter->hw;
3204 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3206 switch (hw->mac.type) {
3207 case ixgbe_mac_82598EB:
3209 * For VMDq support of different descriptor types or
3210 * buffer sizes through the use of multiple SRRCTL
3211 * registers, RDRXCTL.MVMEN must be set to 1
3213 * also, the manual doesn't mention it clearly but DCA hints
3214 * will only use queue 0's tags unless this bit is set. Side
3215 * effects of setting this bit are only that SRRCTL must be
3216 * fully programmed [0..15]
3218 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3220 case ixgbe_mac_82599EB:
3221 case ixgbe_mac_X540:
3222 /* Disable RSC for ACK packets */
3223 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3224 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3225 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3226 /* hardware requires some bits to be set by default */
3227 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3228 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3231 /* We should do nothing since we don't know this hardware */
3235 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3239 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3240 * @adapter: board private structure
3242 * Configure the Rx unit of the MAC after a reset.
3244 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3246 struct ixgbe_hw *hw = &adapter->hw;
3250 /* disable receives while setting up the descriptors */
3251 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3252 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3254 ixgbe_setup_psrtype(adapter);
3255 ixgbe_setup_rdrxctl(adapter);
3257 /* Program registers for the distribution of queues */
3258 ixgbe_setup_mrqc(adapter);
3260 /* set_rx_buffer_len must be called before ring initialization */
3261 ixgbe_set_rx_buffer_len(adapter);
3264 * Setup the HW Rx Head and Tail Descriptor Pointers and
3265 * the Base and Length of the Rx Descriptor Ring
3267 for (i = 0; i < adapter->num_rx_queues; i++)
3268 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3270 /* disable drop enable for 82598 parts */
3271 if (hw->mac.type == ixgbe_mac_82598EB)
3272 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3274 /* enable all receives */
3275 rxctrl |= IXGBE_RXCTRL_RXEN;
3276 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3279 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3281 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3282 struct ixgbe_hw *hw = &adapter->hw;
3283 int pool_ndx = adapter->num_vfs;
3285 /* add VID to filter table */
3286 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
3287 set_bit(vid, adapter->active_vlans);
3292 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3294 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3295 struct ixgbe_hw *hw = &adapter->hw;
3296 int pool_ndx = adapter->num_vfs;
3298 /* remove VID from filter table */
3299 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
3300 clear_bit(vid, adapter->active_vlans);
3306 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3307 * @adapter: driver data
3309 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3311 struct ixgbe_hw *hw = &adapter->hw;
3314 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3315 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3316 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3320 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3321 * @adapter: driver data
3323 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3325 struct ixgbe_hw *hw = &adapter->hw;
3328 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3329 vlnctrl |= IXGBE_VLNCTRL_VFE;
3330 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3331 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3335 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3336 * @adapter: driver data
3338 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3340 struct ixgbe_hw *hw = &adapter->hw;
3344 switch (hw->mac.type) {
3345 case ixgbe_mac_82598EB:
3346 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3347 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3348 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3350 case ixgbe_mac_82599EB:
3351 case ixgbe_mac_X540:
3352 for (i = 0; i < adapter->num_rx_queues; i++) {
3353 j = adapter->rx_ring[i]->reg_idx;
3354 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3355 vlnctrl &= ~IXGBE_RXDCTL_VME;
3356 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3365 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3366 * @adapter: driver data
3368 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3370 struct ixgbe_hw *hw = &adapter->hw;
3374 switch (hw->mac.type) {
3375 case ixgbe_mac_82598EB:
3376 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3377 vlnctrl |= IXGBE_VLNCTRL_VME;
3378 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3380 case ixgbe_mac_82599EB:
3381 case ixgbe_mac_X540:
3382 for (i = 0; i < adapter->num_rx_queues; i++) {
3383 j = adapter->rx_ring[i]->reg_idx;
3384 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3385 vlnctrl |= IXGBE_RXDCTL_VME;
3386 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3394 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3398 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3400 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3401 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
3405 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3406 * @netdev: network interface device structure
3408 * Writes unicast address list to the RAR table.
3409 * Returns: -ENOMEM on failure/insufficient address space
3410 * 0 on no addresses written
3411 * X on writing X addresses to the RAR table
3413 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3415 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3416 struct ixgbe_hw *hw = &adapter->hw;
3417 unsigned int vfn = adapter->num_vfs;
3418 unsigned int rar_entries = IXGBE_MAX_PF_MACVLANS;
3421 /* return ENOMEM indicating insufficient memory for addresses */
3422 if (netdev_uc_count(netdev) > rar_entries)
3425 if (!netdev_uc_empty(netdev) && rar_entries) {
3426 struct netdev_hw_addr *ha;
3427 /* return error if we do not support writing to RAR table */
3428 if (!hw->mac.ops.set_rar)
3431 netdev_for_each_uc_addr(ha, netdev) {
3434 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3439 /* write the addresses in reverse order to avoid write combining */
3440 for (; rar_entries > 0 ; rar_entries--)
3441 hw->mac.ops.clear_rar(hw, rar_entries);
3447 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3448 * @netdev: network interface device structure
3450 * The set_rx_method entry point is called whenever the unicast/multicast
3451 * address list or the network interface flags are updated. This routine is
3452 * responsible for configuring the hardware for proper unicast, multicast and
3455 void ixgbe_set_rx_mode(struct net_device *netdev)
3457 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3458 struct ixgbe_hw *hw = &adapter->hw;
3459 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3462 /* Check for Promiscuous and All Multicast modes */
3464 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3466 /* set all bits that we expect to always be set */
3467 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3468 fctrl |= IXGBE_FCTRL_BAM;
3469 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3470 fctrl |= IXGBE_FCTRL_PMCF;
3472 /* clear the bits we are changing the status of */
3473 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3475 if (netdev->flags & IFF_PROMISC) {
3476 hw->addr_ctrl.user_set_promisc = true;
3477 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3478 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3479 /* don't hardware filter vlans in promisc mode */
3480 ixgbe_vlan_filter_disable(adapter);
3482 if (netdev->flags & IFF_ALLMULTI) {
3483 fctrl |= IXGBE_FCTRL_MPE;
3484 vmolr |= IXGBE_VMOLR_MPE;
3487 * Write addresses to the MTA, if the attempt fails
3488 * then we should just turn on promiscuous mode so
3489 * that we can at least receive multicast traffic
3491 hw->mac.ops.update_mc_addr_list(hw, netdev);
3492 vmolr |= IXGBE_VMOLR_ROMPE;
3494 ixgbe_vlan_filter_enable(adapter);
3495 hw->addr_ctrl.user_set_promisc = false;
3499 * Write addresses to available RAR registers, if there is not
3500 * sufficient space to store all the addresses then enable
3501 * unicast promiscuous mode
3503 count = ixgbe_write_uc_addr_list(netdev);
3505 fctrl |= IXGBE_FCTRL_UPE;
3506 vmolr |= IXGBE_VMOLR_ROPE;
3509 if (adapter->num_vfs) {
3510 ixgbe_restore_vf_multicasts(adapter);
3511 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3512 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3514 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
3517 /* This is useful for sniffing bad packets. */
3518 if (adapter->netdev->features & NETIF_F_RXALL) {
3519 /* UPE and MPE will be handled by normal PROMISC logic
3520 * in e1000e_set_rx_mode */
3521 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3522 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3523 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3525 fctrl &= ~(IXGBE_FCTRL_DPF);
3526 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3529 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3531 if (netdev->features & NETIF_F_HW_VLAN_RX)
3532 ixgbe_vlan_strip_enable(adapter);
3534 ixgbe_vlan_strip_disable(adapter);
3537 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3540 struct ixgbe_q_vector *q_vector;
3541 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3543 /* legacy and MSI only use one vector */
3544 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3547 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3548 q_vector = adapter->q_vector[q_idx];
3549 napi_enable(&q_vector->napi);
3553 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3556 struct ixgbe_q_vector *q_vector;
3557 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3559 /* legacy and MSI only use one vector */
3560 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3563 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3564 q_vector = adapter->q_vector[q_idx];
3565 napi_disable(&q_vector->napi);
3569 #ifdef CONFIG_IXGBE_DCB
3571 * ixgbe_configure_dcb - Configure DCB hardware
3572 * @adapter: ixgbe adapter struct
3574 * This is called by the driver on open to configure the DCB hardware.
3575 * This is also called by the gennetlink interface when reconfiguring
3578 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3580 struct ixgbe_hw *hw = &adapter->hw;
3581 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3583 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3584 if (hw->mac.type == ixgbe_mac_82598EB)
3585 netif_set_gso_max_size(adapter->netdev, 65536);
3589 if (hw->mac.type == ixgbe_mac_82598EB)
3590 netif_set_gso_max_size(adapter->netdev, 32768);
3593 /* Enable VLAN tag insert/strip */
3594 adapter->netdev->features |= NETIF_F_HW_VLAN_RX;
3596 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3599 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3600 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3603 /* reconfigure the hardware */
3604 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
3605 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3607 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
3609 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
3610 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
3611 ixgbe_dcb_hw_ets(&adapter->hw,
3612 adapter->ixgbe_ieee_ets,
3614 ixgbe_dcb_hw_pfc_config(&adapter->hw,
3615 adapter->ixgbe_ieee_pfc->pfc_en,
3616 adapter->ixgbe_ieee_ets->prio_tc);
3619 /* Enable RSS Hash per TC */
3620 if (hw->mac.type != ixgbe_mac_82598EB) {
3624 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
3626 u8 cnt = adapter->netdev->tc_to_txq[i].count;
3631 reg |= msb << IXGBE_RQTC_SHIFT_TC(i);
3633 IXGBE_WRITE_REG(hw, IXGBE_RQTC, reg);
3638 /* Additional bittime to account for IXGBE framing */
3639 #define IXGBE_ETH_FRAMING 20
3642 * ixgbe_hpbthresh - calculate high water mark for flow control
3644 * @adapter: board private structure to calculate for
3645 * @pb - packet buffer to calculate
3647 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
3649 struct ixgbe_hw *hw = &adapter->hw;
3650 struct net_device *dev = adapter->netdev;
3651 int link, tc, kb, marker;
3654 /* Calculate max LAN frame size */
3655 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
3658 /* FCoE traffic class uses FCOE jumbo frames */
3659 if (dev->features & NETIF_F_FCOE_MTU) {
3662 #ifdef CONFIG_IXGBE_DCB
3663 fcoe_pb = netdev_get_prio_tc_map(dev, adapter->fcoe.up);
3666 if (fcoe_pb == pb && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE)
3667 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3671 /* Calculate delay value for device */
3672 switch (hw->mac.type) {
3673 case ixgbe_mac_X540:
3674 dv_id = IXGBE_DV_X540(link, tc);
3677 dv_id = IXGBE_DV(link, tc);
3681 /* Loopback switch introduces additional latency */
3682 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3683 dv_id += IXGBE_B2BT(tc);
3685 /* Delay value is calculated in bit times convert to KB */
3686 kb = IXGBE_BT2KB(dv_id);
3687 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
3689 marker = rx_pba - kb;
3691 /* It is possible that the packet buffer is not large enough
3692 * to provide required headroom. In this case throw an error
3693 * to user and a do the best we can.
3696 e_warn(drv, "Packet Buffer(%i) can not provide enough"
3697 "headroom to support flow control."
3698 "Decrease MTU or number of traffic classes\n", pb);
3706 * ixgbe_lpbthresh - calculate low water mark for for flow control
3708 * @adapter: board private structure to calculate for
3709 * @pb - packet buffer to calculate
3711 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
3713 struct ixgbe_hw *hw = &adapter->hw;
3714 struct net_device *dev = adapter->netdev;
3718 /* Calculate max LAN frame size */
3719 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
3721 /* Calculate delay value for device */
3722 switch (hw->mac.type) {
3723 case ixgbe_mac_X540:
3724 dv_id = IXGBE_LOW_DV_X540(tc);
3727 dv_id = IXGBE_LOW_DV(tc);
3731 /* Delay value is calculated in bit times convert to KB */
3732 return IXGBE_BT2KB(dv_id);
3736 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3738 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
3740 struct ixgbe_hw *hw = &adapter->hw;
3741 int num_tc = netdev_get_num_tc(adapter->netdev);
3747 hw->fc.low_water = ixgbe_lpbthresh(adapter);
3749 for (i = 0; i < num_tc; i++) {
3750 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
3752 /* Low water marks must not be larger than high water marks */
3753 if (hw->fc.low_water > hw->fc.high_water[i])
3754 hw->fc.low_water = 0;
3758 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
3760 struct ixgbe_hw *hw = &adapter->hw;
3762 u8 tc = netdev_get_num_tc(adapter->netdev);
3764 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3765 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3766 hdrm = 32 << adapter->fdir_pballoc;
3770 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
3771 ixgbe_pbthresh_setup(adapter);
3774 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
3776 struct ixgbe_hw *hw = &adapter->hw;
3777 struct hlist_node *node, *node2;
3778 struct ixgbe_fdir_filter *filter;
3780 spin_lock(&adapter->fdir_perfect_lock);
3782 if (!hlist_empty(&adapter->fdir_filter_list))
3783 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
3785 hlist_for_each_entry_safe(filter, node, node2,
3786 &adapter->fdir_filter_list, fdir_node) {
3787 ixgbe_fdir_write_perfect_filter_82599(hw,
3790 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
3791 IXGBE_FDIR_DROP_QUEUE :
3792 adapter->rx_ring[filter->action]->reg_idx);
3795 spin_unlock(&adapter->fdir_perfect_lock);
3798 static void ixgbe_configure(struct ixgbe_adapter *adapter)
3800 struct ixgbe_hw *hw = &adapter->hw;
3802 ixgbe_configure_pb(adapter);
3803 #ifdef CONFIG_IXGBE_DCB
3804 ixgbe_configure_dcb(adapter);
3807 ixgbe_set_rx_mode(adapter->netdev);
3808 ixgbe_restore_vlan(adapter);
3811 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
3812 ixgbe_configure_fcoe(adapter);
3814 #endif /* IXGBE_FCOE */
3816 switch (hw->mac.type) {
3817 case ixgbe_mac_82599EB:
3818 case ixgbe_mac_X540:
3819 hw->mac.ops.disable_rx_buff(hw);
3825 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3826 ixgbe_init_fdir_signature_82599(&adapter->hw,
3827 adapter->fdir_pballoc);
3828 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3829 ixgbe_init_fdir_perfect_82599(&adapter->hw,
3830 adapter->fdir_pballoc);
3831 ixgbe_fdir_filter_restore(adapter);
3834 switch (hw->mac.type) {
3835 case ixgbe_mac_82599EB:
3836 case ixgbe_mac_X540:
3837 hw->mac.ops.enable_rx_buff(hw);
3843 ixgbe_configure_virtualization(adapter);
3845 ixgbe_configure_tx(adapter);
3846 ixgbe_configure_rx(adapter);
3849 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3851 switch (hw->phy.type) {
3852 case ixgbe_phy_sfp_avago:
3853 case ixgbe_phy_sfp_ftl:
3854 case ixgbe_phy_sfp_intel:
3855 case ixgbe_phy_sfp_unknown:
3856 case ixgbe_phy_sfp_passive_tyco:
3857 case ixgbe_phy_sfp_passive_unknown:
3858 case ixgbe_phy_sfp_active_unknown:
3859 case ixgbe_phy_sfp_ftl_active:
3862 if (hw->mac.type == ixgbe_mac_82598EB)
3870 * ixgbe_sfp_link_config - set up SFP+ link
3871 * @adapter: pointer to private adapter struct
3873 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3876 * We are assuming the worst case scenario here, and that
3877 * is that an SFP was inserted/removed after the reset
3878 * but before SFP detection was enabled. As such the best
3879 * solution is to just start searching as soon as we start
3881 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3882 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
3884 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
3888 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3889 * @hw: pointer to private hardware struct
3891 * Returns 0 on success, negative on failure
3893 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
3896 bool negotiation, link_up = false;
3897 u32 ret = IXGBE_ERR_LINK_SETUP;
3899 if (hw->mac.ops.check_link)
3900 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3905 autoneg = hw->phy.autoneg_advertised;
3906 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
3907 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3912 if (hw->mac.ops.setup_link)
3913 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
3918 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
3920 struct ixgbe_hw *hw = &adapter->hw;
3923 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3924 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
3926 gpie |= IXGBE_GPIE_EIAME;
3928 * use EIAM to auto-mask when MSI-X interrupt is asserted
3929 * this saves a register write for every interrupt
3931 switch (hw->mac.type) {
3932 case ixgbe_mac_82598EB:
3933 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3935 case ixgbe_mac_82599EB:
3936 case ixgbe_mac_X540:
3938 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3939 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3943 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3944 * specifically only auto mask tx and rx interrupts */
3945 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3948 /* XXX: to interrupt immediately for EICS writes, enable this */
3949 /* gpie |= IXGBE_GPIE_EIMEN; */
3951 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3952 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
3953 gpie |= IXGBE_GPIE_VTMODE_64;
3956 /* Enable Thermal over heat sensor interrupt */
3957 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
3958 switch (adapter->hw.mac.type) {
3959 case ixgbe_mac_82599EB:
3960 gpie |= IXGBE_SDP0_GPIEN;
3962 case ixgbe_mac_X540:
3963 gpie |= IXGBE_EIMS_TS;
3970 /* Enable fan failure interrupt */
3971 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3972 gpie |= IXGBE_SDP1_GPIEN;
3974 if (hw->mac.type == ixgbe_mac_82599EB) {
3975 gpie |= IXGBE_SDP1_GPIEN;
3976 gpie |= IXGBE_SDP2_GPIEN;
3979 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3982 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
3984 struct ixgbe_hw *hw = &adapter->hw;
3988 ixgbe_get_hw_control(adapter);
3989 ixgbe_setup_gpie(adapter);
3991 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3992 ixgbe_configure_msix(adapter);
3994 ixgbe_configure_msi_and_legacy(adapter);
3996 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
3997 if (hw->mac.ops.enable_tx_laser &&
3998 ((hw->phy.multispeed_fiber) ||
3999 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4000 (hw->mac.type == ixgbe_mac_82599EB))))
4001 hw->mac.ops.enable_tx_laser(hw);
4003 clear_bit(__IXGBE_DOWN, &adapter->state);
4004 ixgbe_napi_enable_all(adapter);
4006 if (ixgbe_is_sfp(hw)) {
4007 ixgbe_sfp_link_config(adapter);
4009 err = ixgbe_non_sfp_link_config(hw);
4011 e_err(probe, "link_config FAILED %d\n", err);
4014 /* clear any pending interrupts, may auto mask */
4015 IXGBE_READ_REG(hw, IXGBE_EICR);
4016 ixgbe_irq_enable(adapter, true, true);
4019 * If this adapter has a fan, check to see if we had a failure
4020 * before we enabled the interrupt.
4022 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4023 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4024 if (esdp & IXGBE_ESDP_SDP1)
4025 e_crit(drv, "Fan has stopped, replace the adapter\n");
4028 /* enable transmits */
4029 netif_tx_start_all_queues(adapter->netdev);
4031 /* bring the link up in the watchdog, this could race with our first
4032 * link up interrupt but shouldn't be a problem */
4033 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4034 adapter->link_check_timeout = jiffies;
4035 mod_timer(&adapter->service_timer, jiffies);
4037 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4038 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4039 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4040 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4043 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4045 WARN_ON(in_interrupt());
4046 /* put off any impending NetWatchDogTimeout */
4047 adapter->netdev->trans_start = jiffies;
4049 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4050 usleep_range(1000, 2000);
4051 ixgbe_down(adapter);
4053 * If SR-IOV enabled then wait a bit before bringing the adapter
4054 * back up to give the VFs time to respond to the reset. The
4055 * two second wait is based upon the watchdog timer cycle in
4058 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4061 clear_bit(__IXGBE_RESETTING, &adapter->state);
4064 void ixgbe_up(struct ixgbe_adapter *adapter)
4066 /* hardware has been reset, we need to reload some things */
4067 ixgbe_configure(adapter);
4069 ixgbe_up_complete(adapter);
4072 void ixgbe_reset(struct ixgbe_adapter *adapter)
4074 struct ixgbe_hw *hw = &adapter->hw;
4077 /* lock SFP init bit to prevent race conditions with the watchdog */
4078 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4079 usleep_range(1000, 2000);
4081 /* clear all SFP and link config related flags while holding SFP_INIT */
4082 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4083 IXGBE_FLAG2_SFP_NEEDS_RESET);
4084 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4086 err = hw->mac.ops.init_hw(hw);
4089 case IXGBE_ERR_SFP_NOT_PRESENT:
4090 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4092 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4093 e_dev_err("master disable timed out\n");
4095 case IXGBE_ERR_EEPROM_VERSION:
4096 /* We are running on a pre-production device, log a warning */
4097 e_dev_warn("This device is a pre-production adapter/LOM. "
4098 "Please be aware there may be issues associated with "
4099 "your hardware. If you are experiencing problems "
4100 "please contact your Intel or hardware "
4101 "representative who provided you with this "
4105 e_dev_err("Hardware Error: %d\n", err);
4108 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4110 /* reprogram the RAR[0] in case user changed it. */
4111 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
4116 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4117 * @rx_ring: ring to setup
4119 * On many IA platforms the L1 cache has a critical stride of 4K, this
4120 * results in each receive buffer starting in the same cache set. To help
4121 * reduce the pressure on this cache set we can interleave the offsets so
4122 * that only every other buffer will be in the same cache set.
4124 static void ixgbe_init_rx_page_offset(struct ixgbe_ring *rx_ring)
4126 struct ixgbe_rx_buffer *rx_buffer = rx_ring->rx_buffer_info;
4129 for (i = 0; i < rx_ring->count; i += 2) {
4130 rx_buffer[0].page_offset = 0;
4131 rx_buffer[1].page_offset = ixgbe_rx_bufsz(rx_ring);
4132 rx_buffer = &rx_buffer[2];
4137 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4138 * @rx_ring: ring to free buffers from
4140 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4142 struct device *dev = rx_ring->dev;
4146 /* ring already cleared, nothing to do */
4147 if (!rx_ring->rx_buffer_info)
4150 /* Free all the Rx ring sk_buffs */
4151 for (i = 0; i < rx_ring->count; i++) {
4152 struct ixgbe_rx_buffer *rx_buffer;
4154 rx_buffer = &rx_ring->rx_buffer_info[i];
4155 if (rx_buffer->skb) {
4156 struct sk_buff *skb = rx_buffer->skb;
4157 if (IXGBE_CB(skb)->page_released) {
4160 ixgbe_rx_bufsz(rx_ring),
4162 IXGBE_CB(skb)->page_released = false;
4166 rx_buffer->skb = NULL;
4168 dma_unmap_page(dev, rx_buffer->dma,
4169 ixgbe_rx_pg_size(rx_ring),
4172 if (rx_buffer->page)
4173 __free_pages(rx_buffer->page,
4174 ixgbe_rx_pg_order(rx_ring));
4175 rx_buffer->page = NULL;
4178 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4179 memset(rx_ring->rx_buffer_info, 0, size);
4181 ixgbe_init_rx_page_offset(rx_ring);
4183 /* Zero out the descriptor ring */
4184 memset(rx_ring->desc, 0, rx_ring->size);
4186 rx_ring->next_to_alloc = 0;
4187 rx_ring->next_to_clean = 0;
4188 rx_ring->next_to_use = 0;
4192 * ixgbe_clean_tx_ring - Free Tx Buffers
4193 * @tx_ring: ring to be cleaned
4195 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4197 struct ixgbe_tx_buffer *tx_buffer_info;
4201 /* ring already cleared, nothing to do */
4202 if (!tx_ring->tx_buffer_info)
4205 /* Free all the Tx ring sk_buffs */
4206 for (i = 0; i < tx_ring->count; i++) {
4207 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4208 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4211 netdev_tx_reset_queue(txring_txq(tx_ring));
4213 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4214 memset(tx_ring->tx_buffer_info, 0, size);
4216 /* Zero out the descriptor ring */
4217 memset(tx_ring->desc, 0, tx_ring->size);
4219 tx_ring->next_to_use = 0;
4220 tx_ring->next_to_clean = 0;
4224 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4225 * @adapter: board private structure
4227 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4231 for (i = 0; i < adapter->num_rx_queues; i++)
4232 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4236 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4237 * @adapter: board private structure
4239 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4243 for (i = 0; i < adapter->num_tx_queues; i++)
4244 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4247 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4249 struct hlist_node *node, *node2;
4250 struct ixgbe_fdir_filter *filter;
4252 spin_lock(&adapter->fdir_perfect_lock);
4254 hlist_for_each_entry_safe(filter, node, node2,
4255 &adapter->fdir_filter_list, fdir_node) {
4256 hlist_del(&filter->fdir_node);
4259 adapter->fdir_filter_count = 0;
4261 spin_unlock(&adapter->fdir_perfect_lock);
4264 void ixgbe_down(struct ixgbe_adapter *adapter)
4266 struct net_device *netdev = adapter->netdev;
4267 struct ixgbe_hw *hw = &adapter->hw;
4271 /* signal that we are down to the interrupt handler */
4272 set_bit(__IXGBE_DOWN, &adapter->state);
4274 /* disable receives */
4275 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4276 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4278 /* disable all enabled rx queues */
4279 for (i = 0; i < adapter->num_rx_queues; i++)
4280 /* this call also flushes the previous write */
4281 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4283 usleep_range(10000, 20000);
4285 netif_tx_stop_all_queues(netdev);
4287 /* call carrier off first to avoid false dev_watchdog timeouts */
4288 netif_carrier_off(netdev);
4289 netif_tx_disable(netdev);
4291 ixgbe_irq_disable(adapter);
4293 ixgbe_napi_disable_all(adapter);
4295 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4296 IXGBE_FLAG2_RESET_REQUESTED);
4297 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4299 del_timer_sync(&adapter->service_timer);
4301 if (adapter->num_vfs) {
4302 /* Clear EITR Select mapping */
4303 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4305 /* Mark all the VFs as inactive */
4306 for (i = 0 ; i < adapter->num_vfs; i++)
4307 adapter->vfinfo[i].clear_to_send = false;
4309 /* ping all the active vfs to let them know we are going down */
4310 ixgbe_ping_all_vfs(adapter);
4312 /* Disable all VFTE/VFRE TX/RX */
4313 ixgbe_disable_tx_rx(adapter);
4316 /* disable transmits in the hardware now that interrupts are off */
4317 for (i = 0; i < adapter->num_tx_queues; i++) {
4318 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4319 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4322 /* Disable the Tx DMA engine on 82599 and X540 */
4323 switch (hw->mac.type) {
4324 case ixgbe_mac_82599EB:
4325 case ixgbe_mac_X540:
4326 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4327 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4328 ~IXGBE_DMATXCTL_TE));
4334 if (!pci_channel_offline(adapter->pdev))
4335 ixgbe_reset(adapter);
4337 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4338 if (hw->mac.ops.disable_tx_laser &&
4339 ((hw->phy.multispeed_fiber) ||
4340 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
4341 (hw->mac.type == ixgbe_mac_82599EB))))
4342 hw->mac.ops.disable_tx_laser(hw);
4344 ixgbe_clean_all_tx_rings(adapter);
4345 ixgbe_clean_all_rx_rings(adapter);
4347 #ifdef CONFIG_IXGBE_DCA
4348 /* since we reset the hardware DCA settings were cleared */
4349 ixgbe_setup_dca(adapter);
4354 * ixgbe_tx_timeout - Respond to a Tx Hang
4355 * @netdev: network interface device structure
4357 static void ixgbe_tx_timeout(struct net_device *netdev)
4359 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4361 /* Do the reset outside of interrupt context */
4362 ixgbe_tx_timeout_reset(adapter);
4366 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4367 * @adapter: board private structure to initialize
4369 * ixgbe_sw_init initializes the Adapter private data structure.
4370 * Fields are initialized based on PCI device information and
4371 * OS network device settings (MTU size).
4373 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4375 struct ixgbe_hw *hw = &adapter->hw;
4376 struct pci_dev *pdev = adapter->pdev;
4378 #ifdef CONFIG_IXGBE_DCB
4380 struct tc_configuration *tc;
4383 /* PCI config space info */
4385 hw->vendor_id = pdev->vendor;
4386 hw->device_id = pdev->device;
4387 hw->revision_id = pdev->revision;
4388 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4389 hw->subsystem_device_id = pdev->subsystem_device;
4391 /* Set capability flags */
4392 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
4393 adapter->ring_feature[RING_F_RSS].indices = rss;
4394 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
4395 switch (hw->mac.type) {
4396 case ixgbe_mac_82598EB:
4397 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4398 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
4399 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
4401 case ixgbe_mac_X540:
4402 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4403 case ixgbe_mac_82599EB:
4404 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
4405 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4406 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
4407 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4408 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
4409 /* Flow Director hash filters enabled */
4410 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4411 adapter->atr_sample_rate = 20;
4412 adapter->ring_feature[RING_F_FDIR].indices =
4413 IXGBE_MAX_FDIR_INDICES;
4414 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
4416 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4417 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4418 adapter->ring_feature[RING_F_FCOE].indices = 0;
4419 #ifdef CONFIG_IXGBE_DCB
4420 /* Default traffic class to use for FCoE */
4421 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
4423 #endif /* IXGBE_FCOE */
4429 /* n-tuple support exists, always init our spinlock */
4430 spin_lock_init(&adapter->fdir_perfect_lock);
4432 #ifdef CONFIG_IXGBE_DCB
4433 switch (hw->mac.type) {
4434 case ixgbe_mac_X540:
4435 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
4436 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
4439 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
4440 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
4444 /* Configure DCB traffic classes */
4445 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4446 tc = &adapter->dcb_cfg.tc_config[j];
4447 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4448 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4449 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4450 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4451 tc->dcb_pfc = pfc_disabled;
4454 /* Initialize default user to priority mapping, UPx->TC0 */
4455 tc = &adapter->dcb_cfg.tc_config[0];
4456 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
4457 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
4459 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4460 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4461 adapter->dcb_cfg.pfc_mode_enable = false;
4462 adapter->dcb_set_bitmap = 0x00;
4463 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
4464 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
4465 sizeof(adapter->temp_dcb_cfg));
4469 /* default flow control settings */
4470 hw->fc.requested_mode = ixgbe_fc_full;
4471 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4472 ixgbe_pbthresh_setup(adapter);
4473 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4474 hw->fc.send_xon = true;
4475 hw->fc.disable_fc_autoneg = false;
4477 /* enable itr by default in dynamic mode */
4478 adapter->rx_itr_setting = 1;
4479 adapter->tx_itr_setting = 1;
4481 /* set default ring sizes */
4482 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4483 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4485 /* set default work limits */
4486 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
4488 /* initialize eeprom parameters */
4489 if (ixgbe_init_eeprom_params_generic(hw)) {
4490 e_dev_err("EEPROM initialization failed\n");
4494 set_bit(__IXGBE_DOWN, &adapter->state);
4500 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4501 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4503 * Return 0 on success, negative on failure
4505 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
4507 struct device *dev = tx_ring->dev;
4508 int orig_node = dev_to_node(dev);
4512 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4514 if (tx_ring->q_vector)
4515 numa_node = tx_ring->q_vector->numa_node;
4517 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
4518 if (!tx_ring->tx_buffer_info)
4519 tx_ring->tx_buffer_info = vzalloc(size);
4520 if (!tx_ring->tx_buffer_info)
4523 /* round up to nearest 4K */
4524 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
4525 tx_ring->size = ALIGN(tx_ring->size, 4096);
4527 set_dev_node(dev, numa_node);
4528 tx_ring->desc = dma_alloc_coherent(dev,
4532 set_dev_node(dev, orig_node);
4534 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4535 &tx_ring->dma, GFP_KERNEL);
4539 tx_ring->next_to_use = 0;
4540 tx_ring->next_to_clean = 0;
4544 vfree(tx_ring->tx_buffer_info);
4545 tx_ring->tx_buffer_info = NULL;
4546 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4551 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4552 * @adapter: board private structure
4554 * If this function returns with an error, then it's possible one or
4555 * more of the rings is populated (while the rest are not). It is the
4556 * callers duty to clean those orphaned rings.
4558 * Return 0 on success, negative on failure
4560 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4564 for (i = 0; i < adapter->num_tx_queues; i++) {
4565 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
4568 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
4576 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4577 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4579 * Returns 0 on success, negative on failure
4581 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
4583 struct device *dev = rx_ring->dev;
4584 int orig_node = dev_to_node(dev);
4588 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4590 if (rx_ring->q_vector)
4591 numa_node = rx_ring->q_vector->numa_node;
4593 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
4594 if (!rx_ring->rx_buffer_info)
4595 rx_ring->rx_buffer_info = vzalloc(size);
4596 if (!rx_ring->rx_buffer_info)
4599 /* Round up to nearest 4K */
4600 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4601 rx_ring->size = ALIGN(rx_ring->size, 4096);
4603 set_dev_node(dev, numa_node);
4604 rx_ring->desc = dma_alloc_coherent(dev,
4608 set_dev_node(dev, orig_node);
4610 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4611 &rx_ring->dma, GFP_KERNEL);
4615 rx_ring->next_to_clean = 0;
4616 rx_ring->next_to_use = 0;
4618 ixgbe_init_rx_page_offset(rx_ring);
4622 vfree(rx_ring->rx_buffer_info);
4623 rx_ring->rx_buffer_info = NULL;
4624 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4629 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4630 * @adapter: board private structure
4632 * If this function returns with an error, then it's possible one or
4633 * more of the rings is populated (while the rest are not). It is the
4634 * callers duty to clean those orphaned rings.
4636 * Return 0 on success, negative on failure
4638 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4642 for (i = 0; i < adapter->num_rx_queues; i++) {
4643 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
4646 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
4654 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4655 * @tx_ring: Tx descriptor ring for a specific queue
4657 * Free all transmit software resources
4659 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
4661 ixgbe_clean_tx_ring(tx_ring);
4663 vfree(tx_ring->tx_buffer_info);
4664 tx_ring->tx_buffer_info = NULL;
4666 /* if not set, then don't free */
4670 dma_free_coherent(tx_ring->dev, tx_ring->size,
4671 tx_ring->desc, tx_ring->dma);
4673 tx_ring->desc = NULL;
4677 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4678 * @adapter: board private structure
4680 * Free all transmit software resources
4682 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4686 for (i = 0; i < adapter->num_tx_queues; i++)
4687 if (adapter->tx_ring[i]->desc)
4688 ixgbe_free_tx_resources(adapter->tx_ring[i]);
4692 * ixgbe_free_rx_resources - Free Rx Resources
4693 * @rx_ring: ring to clean the resources from
4695 * Free all receive software resources
4697 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
4699 ixgbe_clean_rx_ring(rx_ring);
4701 vfree(rx_ring->rx_buffer_info);
4702 rx_ring->rx_buffer_info = NULL;
4704 /* if not set, then don't free */
4708 dma_free_coherent(rx_ring->dev, rx_ring->size,
4709 rx_ring->desc, rx_ring->dma);
4711 rx_ring->desc = NULL;
4715 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4716 * @adapter: board private structure
4718 * Free all receive software resources
4720 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4724 for (i = 0; i < adapter->num_rx_queues; i++)
4725 if (adapter->rx_ring[i]->desc)
4726 ixgbe_free_rx_resources(adapter->rx_ring[i]);
4730 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4731 * @netdev: network interface device structure
4732 * @new_mtu: new value for maximum frame size
4734 * Returns 0 on success, negative on failure
4736 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4738 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4739 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4741 /* MTU < 68 is an error and causes problems on some kernels */
4742 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
4746 * For 82599EB we cannot allow PF to change MTU greater than 1500
4747 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4748 * don't allocate and chain buffers correctly.
4750 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
4751 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
4752 (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
4755 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4757 /* must set new MTU before calling down or up */
4758 netdev->mtu = new_mtu;
4760 if (netif_running(netdev))
4761 ixgbe_reinit_locked(adapter);
4767 * ixgbe_open - Called when a network interface is made active
4768 * @netdev: network interface device structure
4770 * Returns 0 on success, negative value on failure
4772 * The open entry point is called when a network interface is made
4773 * active by the system (IFF_UP). At this point all resources needed
4774 * for transmit and receive operations are allocated, the interrupt
4775 * handler is registered with the OS, the watchdog timer is started,
4776 * and the stack is notified that the interface is ready.
4778 static int ixgbe_open(struct net_device *netdev)
4780 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4783 /* disallow open during test */
4784 if (test_bit(__IXGBE_TESTING, &adapter->state))
4787 netif_carrier_off(netdev);
4789 /* allocate transmit descriptors */
4790 err = ixgbe_setup_all_tx_resources(adapter);
4794 /* allocate receive descriptors */
4795 err = ixgbe_setup_all_rx_resources(adapter);
4799 ixgbe_configure(adapter);
4801 err = ixgbe_request_irq(adapter);
4805 ixgbe_up_complete(adapter);
4811 ixgbe_free_all_rx_resources(adapter);
4813 ixgbe_free_all_tx_resources(adapter);
4814 ixgbe_reset(adapter);
4820 * ixgbe_close - Disables a network interface
4821 * @netdev: network interface device structure
4823 * Returns 0, this is not allowed to fail
4825 * The close entry point is called when an interface is de-activated
4826 * by the OS. The hardware is still under the drivers control, but
4827 * needs to be disabled. A global MAC reset is issued to stop the
4828 * hardware, and all transmit and receive resources are freed.
4830 static int ixgbe_close(struct net_device *netdev)
4832 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4834 ixgbe_down(adapter);
4835 ixgbe_free_irq(adapter);
4837 ixgbe_fdir_filter_exit(adapter);
4839 ixgbe_free_all_tx_resources(adapter);
4840 ixgbe_free_all_rx_resources(adapter);
4842 ixgbe_release_hw_control(adapter);
4848 static int ixgbe_resume(struct pci_dev *pdev)
4850 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4851 struct net_device *netdev = adapter->netdev;
4854 pci_set_power_state(pdev, PCI_D0);
4855 pci_restore_state(pdev);
4857 * pci_restore_state clears dev->state_saved so call
4858 * pci_save_state to restore it.
4860 pci_save_state(pdev);
4862 err = pci_enable_device_mem(pdev);
4864 e_dev_err("Cannot enable PCI device from suspend\n");
4867 pci_set_master(pdev);
4869 pci_wake_from_d3(pdev, false);
4872 err = ixgbe_init_interrupt_scheme(adapter);
4875 e_dev_err("Cannot initialize interrupts for device\n");
4879 ixgbe_reset(adapter);
4881 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4883 if (netif_running(netdev)) {
4884 err = ixgbe_open(netdev);
4889 netif_device_attach(netdev);
4893 #endif /* CONFIG_PM */
4895 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
4897 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
4898 struct net_device *netdev = adapter->netdev;
4899 struct ixgbe_hw *hw = &adapter->hw;
4901 u32 wufc = adapter->wol;
4906 netif_device_detach(netdev);
4908 if (netif_running(netdev)) {
4910 ixgbe_down(adapter);
4911 ixgbe_free_irq(adapter);
4912 ixgbe_free_all_tx_resources(adapter);
4913 ixgbe_free_all_rx_resources(adapter);
4917 ixgbe_clear_interrupt_scheme(adapter);
4920 retval = pci_save_state(pdev);
4926 ixgbe_set_rx_mode(netdev);
4929 * enable the optics for both mult-speed fiber and
4930 * 82599 SFP+ fiber as we can WoL.
4932 if (hw->mac.ops.enable_tx_laser &&
4933 (hw->phy.multispeed_fiber ||
4934 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber &&
4935 hw->mac.type == ixgbe_mac_82599EB)))
4936 hw->mac.ops.enable_tx_laser(hw);
4938 /* turn on all-multi mode if wake on multicast is enabled */
4939 if (wufc & IXGBE_WUFC_MC) {
4940 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4941 fctrl |= IXGBE_FCTRL_MPE;
4942 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4945 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
4946 ctrl |= IXGBE_CTRL_GIO_DIS;
4947 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
4949 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
4951 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
4952 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4955 switch (hw->mac.type) {
4956 case ixgbe_mac_82598EB:
4957 pci_wake_from_d3(pdev, false);
4959 case ixgbe_mac_82599EB:
4960 case ixgbe_mac_X540:
4961 pci_wake_from_d3(pdev, !!wufc);
4967 *enable_wake = !!wufc;
4969 ixgbe_release_hw_control(adapter);
4971 pci_disable_device(pdev);
4977 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
4982 retval = __ixgbe_shutdown(pdev, &wake);
4987 pci_prepare_to_sleep(pdev);
4989 pci_wake_from_d3(pdev, false);
4990 pci_set_power_state(pdev, PCI_D3hot);
4995 #endif /* CONFIG_PM */
4997 static void ixgbe_shutdown(struct pci_dev *pdev)
5001 __ixgbe_shutdown(pdev, &wake);
5003 if (system_state == SYSTEM_POWER_OFF) {
5004 pci_wake_from_d3(pdev, wake);
5005 pci_set_power_state(pdev, PCI_D3hot);
5010 * ixgbe_update_stats - Update the board statistics counters.
5011 * @adapter: board private structure
5013 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5015 struct net_device *netdev = adapter->netdev;
5016 struct ixgbe_hw *hw = &adapter->hw;
5017 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5019 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5020 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5021 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5022 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5024 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5026 u64 fcoe_noddp_counts_sum = 0, fcoe_noddp_ext_buff_counts_sum = 0;
5027 #endif /* IXGBE_FCOE */
5029 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5030 test_bit(__IXGBE_RESETTING, &adapter->state))
5033 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5036 for (i = 0; i < adapter->num_rx_queues; i++) {
5037 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5038 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5040 adapter->rsc_total_count = rsc_count;
5041 adapter->rsc_total_flush = rsc_flush;
5044 for (i = 0; i < adapter->num_rx_queues; i++) {
5045 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5046 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5047 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5048 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5049 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5050 bytes += rx_ring->stats.bytes;
5051 packets += rx_ring->stats.packets;
5053 adapter->non_eop_descs = non_eop_descs;
5054 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5055 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5056 adapter->hw_csum_rx_error = hw_csum_rx_error;
5057 netdev->stats.rx_bytes = bytes;
5058 netdev->stats.rx_packets = packets;
5062 /* gather some stats to the adapter struct that are per queue */
5063 for (i = 0; i < adapter->num_tx_queues; i++) {
5064 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5065 restart_queue += tx_ring->tx_stats.restart_queue;
5066 tx_busy += tx_ring->tx_stats.tx_busy;
5067 bytes += tx_ring->stats.bytes;
5068 packets += tx_ring->stats.packets;
5070 adapter->restart_queue = restart_queue;
5071 adapter->tx_busy = tx_busy;
5072 netdev->stats.tx_bytes = bytes;
5073 netdev->stats.tx_packets = packets;
5075 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5077 /* 8 register reads */
5078 for (i = 0; i < 8; i++) {
5079 /* for packet buffers not used, the register should read 0 */
5080 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5082 hwstats->mpc[i] += mpc;
5083 total_mpc += hwstats->mpc[i];
5084 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5085 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5086 switch (hw->mac.type) {
5087 case ixgbe_mac_82598EB:
5088 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5089 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5090 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5091 hwstats->pxonrxc[i] +=
5092 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5094 case ixgbe_mac_82599EB:
5095 case ixgbe_mac_X540:
5096 hwstats->pxonrxc[i] +=
5097 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5104 /*16 register reads */
5105 for (i = 0; i < 16; i++) {
5106 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5107 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5108 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5109 (hw->mac.type == ixgbe_mac_X540)) {
5110 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5111 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5112 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5113 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5117 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5118 /* work around hardware counting issue */
5119 hwstats->gprc -= missed_rx;
5121 ixgbe_update_xoff_received(adapter);
5123 /* 82598 hardware only has a 32 bit counter in the high register */
5124 switch (hw->mac.type) {
5125 case ixgbe_mac_82598EB:
5126 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5127 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5128 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5129 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5131 case ixgbe_mac_X540:
5132 /* OS2BMC stats are X540 only*/
5133 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5134 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5135 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5136 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5137 case ixgbe_mac_82599EB:
5138 for (i = 0; i < 16; i++)
5139 adapter->hw_rx_no_dma_resources +=
5140 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5141 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5142 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5143 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5144 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5145 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5146 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5147 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5148 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5149 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5151 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5152 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5153 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5154 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5155 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5156 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5157 /* Add up per cpu counters for total ddp aloc fail */
5158 if (fcoe->pcpu_noddp && fcoe->pcpu_noddp_ext_buff) {
5159 for_each_possible_cpu(cpu) {
5160 fcoe_noddp_counts_sum +=
5161 *per_cpu_ptr(fcoe->pcpu_noddp, cpu);
5162 fcoe_noddp_ext_buff_counts_sum +=
5164 pcpu_noddp_ext_buff, cpu);
5167 hwstats->fcoe_noddp = fcoe_noddp_counts_sum;
5168 hwstats->fcoe_noddp_ext_buff = fcoe_noddp_ext_buff_counts_sum;
5169 #endif /* IXGBE_FCOE */
5174 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5175 hwstats->bprc += bprc;
5176 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5177 if (hw->mac.type == ixgbe_mac_82598EB)
5178 hwstats->mprc -= bprc;
5179 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5180 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5181 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5182 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5183 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5184 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5185 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5186 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5187 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5188 hwstats->lxontxc += lxon;
5189 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5190 hwstats->lxofftxc += lxoff;
5191 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5192 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5194 * 82598 errata - tx of flow control packets is included in tx counters
5196 xon_off_tot = lxon + lxoff;
5197 hwstats->gptc -= xon_off_tot;
5198 hwstats->mptc -= xon_off_tot;
5199 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5200 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5201 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5202 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5203 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5204 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5205 hwstats->ptc64 -= xon_off_tot;
5206 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5207 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5208 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5209 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5210 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5211 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5213 /* Fill out the OS statistics structure */
5214 netdev->stats.multicast = hwstats->mprc;
5217 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5218 netdev->stats.rx_dropped = 0;
5219 netdev->stats.rx_length_errors = hwstats->rlec;
5220 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5221 netdev->stats.rx_missed_errors = total_mpc;
5225 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5226 * @adapter - pointer to the device adapter structure
5228 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5230 struct ixgbe_hw *hw = &adapter->hw;
5233 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5236 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5238 /* if interface is down do nothing */
5239 if (test_bit(__IXGBE_DOWN, &adapter->state))
5242 /* do nothing if we are not using signature filters */
5243 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5246 adapter->fdir_overflow++;
5248 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5249 for (i = 0; i < adapter->num_tx_queues; i++)
5250 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5251 &(adapter->tx_ring[i]->state));
5252 /* re-enable flow director interrupts */
5253 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5255 e_err(probe, "failed to finish FDIR re-initialization, "
5256 "ignored adding FDIR ATR filters\n");
5261 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5262 * @adapter - pointer to the device adapter structure
5264 * This function serves two purposes. First it strobes the interrupt lines
5265 * in order to make certain interrupts are occurring. Secondly it sets the
5266 * bits needed to check for TX hangs. As a result we should immediately
5267 * determine if a hang has occurred.
5269 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5271 struct ixgbe_hw *hw = &adapter->hw;
5275 /* If we're down or resetting, just bail */
5276 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5277 test_bit(__IXGBE_RESETTING, &adapter->state))
5280 /* Force detection of hung controller */
5281 if (netif_carrier_ok(adapter->netdev)) {
5282 for (i = 0; i < adapter->num_tx_queues; i++)
5283 set_check_for_tx_hang(adapter->tx_ring[i]);
5286 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5288 * for legacy and MSI interrupts don't set any bits
5289 * that are enabled for EIAM, because this operation
5290 * would set *both* EIMS and EICS for any bit in EIAM
5292 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5293 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5295 /* get one bit for every active tx/rx interrupt vector */
5296 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
5297 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5298 if (qv->rx.ring || qv->tx.ring)
5299 eics |= ((u64)1 << i);
5303 /* Cause software interrupt to ensure rings are cleaned */
5304 ixgbe_irq_rearm_queues(adapter, eics);
5309 * ixgbe_watchdog_update_link - update the link status
5310 * @adapter - pointer to the device adapter structure
5311 * @link_speed - pointer to a u32 to store the link_speed
5313 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
5315 struct ixgbe_hw *hw = &adapter->hw;
5316 u32 link_speed = adapter->link_speed;
5317 bool link_up = adapter->link_up;
5318 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
5320 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5323 if (hw->mac.ops.check_link) {
5324 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5326 /* always assume link is up, if no check link function */
5327 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
5331 if (adapter->ixgbe_ieee_pfc)
5332 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
5334 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
5335 hw->mac.ops.fc_enable(hw);
5336 ixgbe_set_rx_drop_en(adapter);
5340 time_after(jiffies, (adapter->link_check_timeout +
5341 IXGBE_TRY_LINK_TIMEOUT))) {
5342 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5343 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5344 IXGBE_WRITE_FLUSH(hw);
5347 adapter->link_up = link_up;
5348 adapter->link_speed = link_speed;
5352 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5353 * print link up message
5354 * @adapter - pointer to the device adapter structure
5356 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
5358 struct net_device *netdev = adapter->netdev;
5359 struct ixgbe_hw *hw = &adapter->hw;
5360 u32 link_speed = adapter->link_speed;
5361 bool flow_rx, flow_tx;
5363 /* only continue if link was previously down */
5364 if (netif_carrier_ok(netdev))
5367 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
5369 switch (hw->mac.type) {
5370 case ixgbe_mac_82598EB: {
5371 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5372 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
5373 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5374 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
5377 case ixgbe_mac_X540:
5378 case ixgbe_mac_82599EB: {
5379 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5380 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5381 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5382 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
5390 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
5391 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5393 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5395 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
5398 ((flow_rx && flow_tx) ? "RX/TX" :
5400 (flow_tx ? "TX" : "None"))));
5402 netif_carrier_on(netdev);
5403 ixgbe_check_vf_rate_limit(adapter);
5407 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5408 * print link down message
5409 * @adapter - pointer to the adapter structure
5411 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
5413 struct net_device *netdev = adapter->netdev;
5414 struct ixgbe_hw *hw = &adapter->hw;
5416 adapter->link_up = false;
5417 adapter->link_speed = 0;
5419 /* only continue if link was up previously */
5420 if (!netif_carrier_ok(netdev))
5423 /* poll for SFP+ cable when link is down */
5424 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
5425 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5427 e_info(drv, "NIC Link is Down\n");
5428 netif_carrier_off(netdev);
5432 * ixgbe_watchdog_flush_tx - flush queues on link down
5433 * @adapter - pointer to the device adapter structure
5435 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
5438 int some_tx_pending = 0;
5440 if (!netif_carrier_ok(adapter->netdev)) {
5441 for (i = 0; i < adapter->num_tx_queues; i++) {
5442 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5443 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5444 some_tx_pending = 1;
5449 if (some_tx_pending) {
5450 /* We've lost link, so the controller stops DMA,
5451 * but we've got queued Tx work that's never going
5452 * to get done, so reset controller to flush Tx.
5453 * (Do the reset outside of interrupt context).
5455 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
5460 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
5464 /* Do not perform spoof check for 82598 */
5465 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5468 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
5471 * ssvpc register is cleared on read, if zero then no
5472 * spoofed packets in the last interval.
5477 e_warn(drv, "%d Spoofed packets detected\n", ssvpc);
5481 * ixgbe_watchdog_subtask - check and bring link up
5482 * @adapter - pointer to the device adapter structure
5484 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
5486 /* if interface is down do nothing */
5487 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5488 test_bit(__IXGBE_RESETTING, &adapter->state))
5491 ixgbe_watchdog_update_link(adapter);
5493 if (adapter->link_up)
5494 ixgbe_watchdog_link_is_up(adapter);
5496 ixgbe_watchdog_link_is_down(adapter);
5498 ixgbe_spoof_check(adapter);
5499 ixgbe_update_stats(adapter);
5501 ixgbe_watchdog_flush_tx(adapter);
5505 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5506 * @adapter - the ixgbe adapter structure
5508 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
5510 struct ixgbe_hw *hw = &adapter->hw;
5513 /* not searching for SFP so there is nothing to do here */
5514 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
5515 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5518 /* someone else is in init, wait until next service event */
5519 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5522 err = hw->phy.ops.identify_sfp(hw);
5523 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5526 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
5527 /* If no cable is present, then we need to reset
5528 * the next time we find a good cable. */
5529 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5536 /* exit if reset not needed */
5537 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
5540 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
5543 * A module may be identified correctly, but the EEPROM may not have
5544 * support for that module. setup_sfp() will fail in that case, so
5545 * we should not allow that module to load.
5547 if (hw->mac.type == ixgbe_mac_82598EB)
5548 err = hw->phy.ops.reset(hw);
5550 err = hw->mac.ops.setup_sfp(hw);
5552 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
5555 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
5556 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
5559 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5561 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
5562 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
5563 e_dev_err("failed to initialize because an unsupported "
5564 "SFP+ module type was detected.\n");
5565 e_dev_err("Reload the driver after installing a "
5566 "supported module.\n");
5567 unregister_netdev(adapter->netdev);
5572 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5573 * @adapter - the ixgbe adapter structure
5575 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
5577 struct ixgbe_hw *hw = &adapter->hw;
5581 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
5584 /* someone else is in init, wait until next service event */
5585 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5588 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5590 autoneg = hw->phy.autoneg_advertised;
5591 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5592 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5593 if (hw->mac.ops.setup_link)
5594 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5596 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5597 adapter->link_check_timeout = jiffies;
5598 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5601 #ifdef CONFIG_PCI_IOV
5602 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
5605 struct ixgbe_hw *hw = &adapter->hw;
5606 struct net_device *netdev = adapter->netdev;
5610 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
5611 if (gpc) /* If incrementing then no need for the check below */
5614 * Check to see if a bad DMA write target from an errant or
5615 * malicious VF has caused a PCIe error. If so then we can
5616 * issue a VFLR to the offending VF(s) and then resume without
5617 * requesting a full slot reset.
5620 for (vf = 0; vf < adapter->num_vfs; vf++) {
5621 ciaa = (vf << 16) | 0x80000000;
5622 /* 32 bit read so align, we really want status at offset 6 */
5623 ciaa |= PCI_COMMAND;
5624 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5625 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
5627 /* disable debug mode asap after reading data */
5628 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5629 /* Get the upper 16 bits which will be the PCI status reg */
5631 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
5632 netdev_err(netdev, "VF %d Hung DMA\n", vf);
5634 ciaa = (vf << 16) | 0x80000000;
5636 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5637 ciad = 0x00008000; /* VFLR */
5638 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
5640 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
5647 * ixgbe_service_timer - Timer Call-back
5648 * @data: pointer to adapter cast into an unsigned long
5650 static void ixgbe_service_timer(unsigned long data)
5652 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
5653 unsigned long next_event_offset;
5656 /* poll faster when waiting for link */
5657 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
5658 next_event_offset = HZ / 10;
5660 next_event_offset = HZ * 2;
5662 #ifdef CONFIG_PCI_IOV
5664 * don't bother with SR-IOV VF DMA hang check if there are
5665 * no VFs or the link is down
5667 if (!adapter->num_vfs ||
5668 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
5669 goto normal_timer_service;
5671 /* If we have VFs allocated then we must check for DMA hangs */
5672 ixgbe_check_for_bad_vf(adapter);
5673 next_event_offset = HZ / 50;
5674 adapter->timer_event_accumulator++;
5676 if (adapter->timer_event_accumulator >= 100)
5677 adapter->timer_event_accumulator = 0;
5681 normal_timer_service:
5683 /* Reset the timer */
5684 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
5687 ixgbe_service_event_schedule(adapter);
5690 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
5692 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
5695 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
5697 /* If we're already down or resetting, just bail */
5698 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5699 test_bit(__IXGBE_RESETTING, &adapter->state))
5702 ixgbe_dump(adapter);
5703 netdev_err(adapter->netdev, "Reset adapter\n");
5704 adapter->tx_timeout_count++;
5706 ixgbe_reinit_locked(adapter);
5710 * ixgbe_service_task - manages and runs subtasks
5711 * @work: pointer to work_struct containing our data
5713 static void ixgbe_service_task(struct work_struct *work)
5715 struct ixgbe_adapter *adapter = container_of(work,
5716 struct ixgbe_adapter,
5719 ixgbe_reset_subtask(adapter);
5720 ixgbe_sfp_detection_subtask(adapter);
5721 ixgbe_sfp_link_config_subtask(adapter);
5722 ixgbe_check_overtemp_subtask(adapter);
5723 ixgbe_watchdog_subtask(adapter);
5724 ixgbe_fdir_reinit_subtask(adapter);
5725 ixgbe_check_hang_subtask(adapter);
5727 ixgbe_service_event_complete(adapter);
5730 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
5731 struct ixgbe_tx_buffer *first,
5734 struct sk_buff *skb = first->skb;
5735 u32 vlan_macip_lens, type_tucmd;
5736 u32 mss_l4len_idx, l4len;
5738 if (!skb_is_gso(skb))
5741 if (skb_header_cloned(skb)) {
5742 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5747 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5748 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
5750 if (first->protocol == __constant_htons(ETH_P_IP)) {
5751 struct iphdr *iph = ip_hdr(skb);
5754 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5758 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5759 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5760 IXGBE_TX_FLAGS_CSUM |
5761 IXGBE_TX_FLAGS_IPV4;
5762 } else if (skb_is_gso_v6(skb)) {
5763 ipv6_hdr(skb)->payload_len = 0;
5764 tcp_hdr(skb)->check =
5765 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5766 &ipv6_hdr(skb)->daddr,
5768 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
5769 IXGBE_TX_FLAGS_CSUM;
5772 /* compute header lengths */
5773 l4len = tcp_hdrlen(skb);
5774 *hdr_len = skb_transport_offset(skb) + l4len;
5776 /* update gso size and bytecount with header size */
5777 first->gso_segs = skb_shinfo(skb)->gso_segs;
5778 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5780 /* mss_l4len_id: use 1 as index for TSO */
5781 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
5782 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
5783 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
5785 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5786 vlan_macip_lens = skb_network_header_len(skb);
5787 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5788 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5790 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
5796 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
5797 struct ixgbe_tx_buffer *first)
5799 struct sk_buff *skb = first->skb;
5800 u32 vlan_macip_lens = 0;
5801 u32 mss_l4len_idx = 0;
5804 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5805 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
5806 !(first->tx_flags & IXGBE_TX_FLAGS_TXSW))
5810 switch (first->protocol) {
5811 case __constant_htons(ETH_P_IP):
5812 vlan_macip_lens |= skb_network_header_len(skb);
5813 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
5814 l4_hdr = ip_hdr(skb)->protocol;
5816 case __constant_htons(ETH_P_IPV6):
5817 vlan_macip_lens |= skb_network_header_len(skb);
5818 l4_hdr = ipv6_hdr(skb)->nexthdr;
5821 if (unlikely(net_ratelimit())) {
5822 dev_warn(tx_ring->dev,
5823 "partial checksum but proto=%x!\n",
5831 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5832 mss_l4len_idx = tcp_hdrlen(skb) <<
5833 IXGBE_ADVTXD_L4LEN_SHIFT;
5836 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5837 mss_l4len_idx = sizeof(struct sctphdr) <<
5838 IXGBE_ADVTXD_L4LEN_SHIFT;
5841 mss_l4len_idx = sizeof(struct udphdr) <<
5842 IXGBE_ADVTXD_L4LEN_SHIFT;
5845 if (unlikely(net_ratelimit())) {
5846 dev_warn(tx_ring->dev,
5847 "partial checksum but l4 proto=%x!\n",
5853 /* update TX checksum flag */
5854 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
5857 /* vlan_macip_lens: MACLEN, VLAN tag */
5858 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
5859 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
5861 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
5862 type_tucmd, mss_l4len_idx);
5865 static __le32 ixgbe_tx_cmd_type(u32 tx_flags)
5867 /* set type for advanced descriptor with frame checksum insertion */
5868 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
5869 IXGBE_ADVTXD_DCMD_IFCS |
5870 IXGBE_ADVTXD_DCMD_DEXT);
5872 /* set HW vlan bit if vlan is present */
5873 if (tx_flags & IXGBE_TX_FLAGS_HW_VLAN)
5874 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
5876 /* set segmentation enable bits for TSO/FSO */
5878 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))
5880 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5882 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
5887 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
5888 u32 tx_flags, unsigned int paylen)
5890 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
5892 /* enable L4 checksum for TSO and TX checksum offload */
5893 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
5894 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
5896 /* enble IPv4 checksum for TSO */
5897 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
5898 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
5900 /* use index 1 context for TSO/FSO/FCOE */
5902 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FCOE))
5904 if (tx_flags & IXGBE_TX_FLAGS_TSO)
5906 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
5909 * Check Context must be set if Tx switch is enabled, which it
5910 * always is for case where virtual functions are running
5913 if (tx_flags & (IXGBE_TX_FLAGS_TXSW | IXGBE_TX_FLAGS_FCOE))
5915 if (tx_flags & IXGBE_TX_FLAGS_TXSW)
5917 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
5919 tx_desc->read.olinfo_status = olinfo_status;
5922 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5925 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
5926 struct ixgbe_tx_buffer *first,
5930 struct sk_buff *skb = first->skb;
5931 struct ixgbe_tx_buffer *tx_buffer;
5932 union ixgbe_adv_tx_desc *tx_desc;
5933 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
5934 unsigned int data_len = skb->data_len;
5935 unsigned int size = skb_headlen(skb);
5936 unsigned int paylen = skb->len - hdr_len;
5937 u32 tx_flags = first->tx_flags;
5939 u16 i = tx_ring->next_to_use;
5941 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5943 ixgbe_tx_olinfo_status(tx_desc, tx_flags, paylen);
5944 cmd_type = ixgbe_tx_cmd_type(tx_flags);
5947 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5948 if (data_len < sizeof(struct fcoe_crc_eof)) {
5949 size -= sizeof(struct fcoe_crc_eof) - data_len;
5952 data_len -= sizeof(struct fcoe_crc_eof);
5957 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5958 if (dma_mapping_error(tx_ring->dev, dma))
5961 /* record length, and DMA address */
5962 dma_unmap_len_set(first, len, size);
5963 dma_unmap_addr_set(first, dma, dma);
5965 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5968 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
5969 tx_desc->read.cmd_type_len =
5970 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
5974 if (i == tx_ring->count) {
5975 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5979 dma += IXGBE_MAX_DATA_PER_TXD;
5980 size -= IXGBE_MAX_DATA_PER_TXD;
5982 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5983 tx_desc->read.olinfo_status = 0;
5986 if (likely(!data_len))
5989 if (unlikely(skb->no_fcs))
5990 cmd_type &= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS));
5991 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
5995 if (i == tx_ring->count) {
5996 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6001 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6003 size = skb_frag_size(frag);
6007 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6009 if (dma_mapping_error(tx_ring->dev, dma))
6012 tx_buffer = &tx_ring->tx_buffer_info[i];
6013 dma_unmap_len_set(tx_buffer, len, size);
6014 dma_unmap_addr_set(tx_buffer, dma, dma);
6016 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6017 tx_desc->read.olinfo_status = 0;
6022 /* write last descriptor with RS and EOP bits */
6023 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
6024 tx_desc->read.cmd_type_len = cmd_type;
6026 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6028 /* set the timestamp */
6029 first->time_stamp = jiffies;
6032 * Force memory writes to complete before letting h/w know there
6033 * are new descriptors to fetch. (Only applicable for weak-ordered
6034 * memory model archs, such as IA-64).
6036 * We also need this memory barrier to make certain all of the
6037 * status bits have been updated before next_to_watch is written.
6041 /* set next_to_watch value indicating a packet is present */
6042 first->next_to_watch = tx_desc;
6045 if (i == tx_ring->count)
6048 tx_ring->next_to_use = i;
6050 /* notify HW of packet */
6051 writel(i, tx_ring->tail);
6055 dev_err(tx_ring->dev, "TX DMA map failed\n");
6057 /* clear dma mappings for failed tx_buffer_info map */
6059 tx_buffer = &tx_ring->tx_buffer_info[i];
6060 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6061 if (tx_buffer == first)
6068 tx_ring->next_to_use = i;
6071 static void ixgbe_atr(struct ixgbe_ring *ring,
6072 struct ixgbe_tx_buffer *first)
6074 struct ixgbe_q_vector *q_vector = ring->q_vector;
6075 union ixgbe_atr_hash_dword input = { .dword = 0 };
6076 union ixgbe_atr_hash_dword common = { .dword = 0 };
6078 unsigned char *network;
6080 struct ipv6hdr *ipv6;
6085 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6089 /* do nothing if sampling is disabled */
6090 if (!ring->atr_sample_rate)
6095 /* snag network header to get L4 type and address */
6096 hdr.network = skb_network_header(first->skb);
6098 /* Currently only IPv4/IPv6 with TCP is supported */
6099 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6100 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6101 (first->protocol != __constant_htons(ETH_P_IP) ||
6102 hdr.ipv4->protocol != IPPROTO_TCP))
6105 th = tcp_hdr(first->skb);
6107 /* skip this packet since it is invalid or the socket is closing */
6111 /* sample on all syn packets or once every atr sample count */
6112 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6115 /* reset sample count */
6116 ring->atr_count = 0;
6118 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6121 * src and dst are inverted, think how the receiver sees them
6123 * The input is broken into two sections, a non-compressed section
6124 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6125 * is XORed together and stored in the compressed dword.
6127 input.formatted.vlan_id = vlan_id;
6130 * since src port and flex bytes occupy the same word XOR them together
6131 * and write the value to source port portion of compressed dword
6133 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6134 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6136 common.port.src ^= th->dest ^ first->protocol;
6137 common.port.dst ^= th->source;
6139 if (first->protocol == __constant_htons(ETH_P_IP)) {
6140 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6141 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6143 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6144 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6145 hdr.ipv6->saddr.s6_addr32[1] ^
6146 hdr.ipv6->saddr.s6_addr32[2] ^
6147 hdr.ipv6->saddr.s6_addr32[3] ^
6148 hdr.ipv6->daddr.s6_addr32[0] ^
6149 hdr.ipv6->daddr.s6_addr32[1] ^
6150 hdr.ipv6->daddr.s6_addr32[2] ^
6151 hdr.ipv6->daddr.s6_addr32[3];
6154 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6155 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6156 input, common, ring->queue_index);
6159 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6161 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6162 /* Herbert's original patch had:
6163 * smp_mb__after_netif_stop_queue();
6164 * but since that doesn't exist yet, just open code it. */
6167 /* We need to check again in a case another CPU has just
6168 * made room available. */
6169 if (likely(ixgbe_desc_unused(tx_ring) < size))
6172 /* A reprieve! - use start_queue because it doesn't call schedule */
6173 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6174 ++tx_ring->tx_stats.restart_queue;
6178 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6180 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6182 return __ixgbe_maybe_stop_tx(tx_ring, size);
6185 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6187 struct ixgbe_adapter *adapter = netdev_priv(dev);
6188 int txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6191 __be16 protocol = vlan_get_protocol(skb);
6193 if (((protocol == htons(ETH_P_FCOE)) ||
6194 (protocol == htons(ETH_P_FIP))) &&
6195 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6196 txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1);
6197 txq += adapter->ring_feature[RING_F_FCOE].mask;
6202 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6203 while (unlikely(txq >= dev->real_num_tx_queues))
6204 txq -= dev->real_num_tx_queues;
6208 return skb_tx_hash(dev, skb);
6211 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6212 struct ixgbe_adapter *adapter,
6213 struct ixgbe_ring *tx_ring)
6215 struct ixgbe_tx_buffer *first;
6218 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6221 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6222 __be16 protocol = skb->protocol;
6226 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6227 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6228 * + 2 desc gap to keep tail from touching head,
6229 * + 1 desc for context descriptor,
6230 * otherwise try next time
6232 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6233 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6234 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6236 count += skb_shinfo(skb)->nr_frags;
6238 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
6239 tx_ring->tx_stats.tx_busy++;
6240 return NETDEV_TX_BUSY;
6243 /* record the location of the first descriptor for this packet */
6244 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6246 first->bytecount = skb->len;
6247 first->gso_segs = 1;
6249 /* if we have a HW VLAN tag being added default to the HW one */
6250 if (vlan_tx_tag_present(skb)) {
6251 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
6252 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6253 /* else if it is a SW VLAN check the next protocol and store the tag */
6254 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
6255 struct vlan_hdr *vhdr, _vhdr;
6256 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
6260 protocol = vhdr->h_vlan_encapsulated_proto;
6261 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
6262 IXGBE_TX_FLAGS_VLAN_SHIFT;
6263 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
6266 #ifdef CONFIG_PCI_IOV
6268 * Use the l2switch_enable flag - would be false if the DMA
6269 * Tx switch had been disabled.
6271 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6272 tx_flags |= IXGBE_TX_FLAGS_TXSW;
6275 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6276 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
6277 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
6278 (skb->priority != TC_PRIO_CONTROL))) {
6279 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
6280 tx_flags |= (skb->priority & 0x7) <<
6281 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
6282 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
6283 struct vlan_ethhdr *vhdr;
6284 if (skb_header_cloned(skb) &&
6285 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
6287 vhdr = (struct vlan_ethhdr *)skb->data;
6288 vhdr->h_vlan_TCI = htons(tx_flags >>
6289 IXGBE_TX_FLAGS_VLAN_SHIFT);
6291 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
6295 /* record initial flags and protocol */
6296 first->tx_flags = tx_flags;
6297 first->protocol = protocol;
6300 /* setup tx offload for FCoE */
6301 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
6302 (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) {
6303 tso = ixgbe_fso(tx_ring, first, &hdr_len);
6310 #endif /* IXGBE_FCOE */
6311 tso = ixgbe_tso(tx_ring, first, &hdr_len);
6315 ixgbe_tx_csum(tx_ring, first);
6317 /* add the ATR filter if ATR is on */
6318 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
6319 ixgbe_atr(tx_ring, first);
6323 #endif /* IXGBE_FCOE */
6324 ixgbe_tx_map(tx_ring, first, hdr_len);
6326 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6328 return NETDEV_TX_OK;
6331 dev_kfree_skb_any(first->skb);
6334 return NETDEV_TX_OK;
6337 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6338 struct net_device *netdev)
6340 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6341 struct ixgbe_ring *tx_ring;
6343 if (skb->len <= 0) {
6344 dev_kfree_skb_any(skb);
6345 return NETDEV_TX_OK;
6349 * The minimum packet size for olinfo paylen is 17 so pad the skb
6350 * in order to meet this minimum size requirement.
6352 if (skb->len < 17) {
6353 if (skb_padto(skb, 17))
6354 return NETDEV_TX_OK;
6358 tx_ring = adapter->tx_ring[skb->queue_mapping];
6359 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
6363 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6364 * @netdev: network interface device structure
6365 * @p: pointer to an address structure
6367 * Returns 0 on success, negative on failure
6369 static int ixgbe_set_mac(struct net_device *netdev, void *p)
6371 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6372 struct ixgbe_hw *hw = &adapter->hw;
6373 struct sockaddr *addr = p;
6375 if (!is_valid_ether_addr(addr->sa_data))
6376 return -EADDRNOTAVAIL;
6378 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
6379 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6381 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6388 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6390 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6391 struct ixgbe_hw *hw = &adapter->hw;
6395 if (prtad != hw->phy.mdio.prtad)
6397 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6403 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6404 u16 addr, u16 value)
6406 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6407 struct ixgbe_hw *hw = &adapter->hw;
6409 if (prtad != hw->phy.mdio.prtad)
6411 return hw->phy.ops.write_reg(hw, addr, devad, value);
6414 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6416 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6418 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6422 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6424 * @netdev: network interface device structure
6426 * Returns non-zero on failure
6428 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6431 struct ixgbe_adapter *adapter = netdev_priv(dev);
6432 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6434 if (is_valid_ether_addr(mac->san_addr)) {
6436 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6443 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6445 * @netdev: network interface device structure
6447 * Returns non-zero on failure
6449 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6452 struct ixgbe_adapter *adapter = netdev_priv(dev);
6453 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6455 if (is_valid_ether_addr(mac->san_addr)) {
6457 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6463 #ifdef CONFIG_NET_POLL_CONTROLLER
6465 * Polling 'interrupt' - used by things like netconsole to send skbs
6466 * without having to re-enable interrupts. It's not called while
6467 * the interrupt routine is executing.
6469 static void ixgbe_netpoll(struct net_device *netdev)
6471 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6474 /* if interface is down do nothing */
6475 if (test_bit(__IXGBE_DOWN, &adapter->state))
6478 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
6479 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6480 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
6481 for (i = 0; i < num_q_vectors; i++) {
6482 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
6483 ixgbe_msix_clean_rings(0, q_vector);
6486 ixgbe_intr(adapter->pdev->irq, netdev);
6488 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
6492 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6493 struct rtnl_link_stats64 *stats)
6495 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6499 for (i = 0; i < adapter->num_rx_queues; i++) {
6500 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
6506 start = u64_stats_fetch_begin_bh(&ring->syncp);
6507 packets = ring->stats.packets;
6508 bytes = ring->stats.bytes;
6509 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6510 stats->rx_packets += packets;
6511 stats->rx_bytes += bytes;
6515 for (i = 0; i < adapter->num_tx_queues; i++) {
6516 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
6522 start = u64_stats_fetch_begin_bh(&ring->syncp);
6523 packets = ring->stats.packets;
6524 bytes = ring->stats.bytes;
6525 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6526 stats->tx_packets += packets;
6527 stats->tx_bytes += bytes;
6531 /* following stats updated by ixgbe_watchdog_task() */
6532 stats->multicast = netdev->stats.multicast;
6533 stats->rx_errors = netdev->stats.rx_errors;
6534 stats->rx_length_errors = netdev->stats.rx_length_errors;
6535 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6536 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6540 #ifdef CONFIG_IXGBE_DCB
6541 /* ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6542 * #adapter: pointer to ixgbe_adapter
6543 * @tc: number of traffic classes currently enabled
6545 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6546 * 802.1Q priority maps to a packet buffer that exists.
6548 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
6550 struct ixgbe_hw *hw = &adapter->hw;
6554 /* 82598 have a static priority to TC mapping that can not
6555 * be changed so no validation is needed.
6557 if (hw->mac.type == ixgbe_mac_82598EB)
6560 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
6563 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
6564 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
6566 /* If up2tc is out of bounds default to zero */
6568 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
6572 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
6577 /* ixgbe_setup_tc - routine to configure net_device for multiple traffic
6580 * @netdev: net device to configure
6581 * @tc: number of traffic classes to enable
6583 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
6585 struct ixgbe_adapter *adapter = netdev_priv(dev);
6586 struct ixgbe_hw *hw = &adapter->hw;
6588 /* Multiple traffic classes requires multiple queues */
6589 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6590 e_err(drv, "Enable failed, needs MSI-X\n");
6594 /* Hardware supports up to 8 traffic classes */
6595 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
6596 (hw->mac.type == ixgbe_mac_82598EB &&
6597 tc < MAX_TRAFFIC_CLASS))
6600 /* Hardware has to reinitialize queues and interrupts to
6601 * match packet buffer alignment. Unfortunately, the
6602 * hardware is not flexible enough to do this dynamically.
6604 if (netif_running(dev))
6606 ixgbe_clear_interrupt_scheme(adapter);
6609 netdev_set_num_tc(dev, tc);
6610 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
6611 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6613 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
6614 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
6615 adapter->hw.fc.requested_mode = ixgbe_fc_none;
6618 netdev_reset_tc(dev);
6619 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
6620 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
6622 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6623 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6625 adapter->temp_dcb_cfg.pfc_mode_enable = false;
6626 adapter->dcb_cfg.pfc_mode_enable = false;
6629 ixgbe_init_interrupt_scheme(adapter);
6630 ixgbe_validate_rtr(adapter, tc);
6631 if (netif_running(dev))
6637 #endif /* CONFIG_IXGBE_DCB */
6638 void ixgbe_do_reset(struct net_device *netdev)
6640 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6642 if (netif_running(netdev))
6643 ixgbe_reinit_locked(adapter);
6645 ixgbe_reset(adapter);
6648 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
6649 netdev_features_t features)
6651 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6654 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
6655 features &= ~NETIF_F_HW_VLAN_RX;
6658 /* return error if RXHASH is being enabled when RSS is not supported */
6659 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
6660 features &= ~NETIF_F_RXHASH;
6662 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6663 if (!(features & NETIF_F_RXCSUM))
6664 features &= ~NETIF_F_LRO;
6666 /* Turn off LRO if not RSC capable */
6667 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
6668 features &= ~NETIF_F_LRO;
6674 static int ixgbe_set_features(struct net_device *netdev,
6675 netdev_features_t features)
6677 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6678 netdev_features_t changed = netdev->features ^ features;
6679 bool need_reset = false;
6681 /* Make sure RSC matches LRO, reset if change */
6682 if (!(features & NETIF_F_LRO)) {
6683 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
6685 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
6686 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
6687 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
6688 if (adapter->rx_itr_setting == 1 ||
6689 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
6690 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
6692 } else if ((changed ^ features) & NETIF_F_LRO) {
6693 e_info(probe, "rx-usecs set too low, "
6699 * Check if Flow Director n-tuple support was enabled or disabled. If
6700 * the state changed, we need to reset.
6702 if (!(features & NETIF_F_NTUPLE)) {
6703 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
6704 /* turn off Flow Director, set ATR and reset */
6705 if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
6706 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
6707 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
6710 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6711 } else if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
6712 /* turn off ATR, enable perfect filters and reset */
6713 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
6714 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
6718 if (changed & NETIF_F_RXALL)
6721 netdev->features = features;
6723 ixgbe_do_reset(netdev);
6728 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm,
6729 struct net_device *dev,
6730 unsigned char *addr,
6733 struct ixgbe_adapter *adapter = netdev_priv(dev);
6734 int err = -EOPNOTSUPP;
6736 if (ndm->ndm_state & NUD_PERMANENT) {
6737 pr_info("%s: FDB only supports static addresses\n",
6742 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6743 if (is_unicast_ether_addr(addr))
6744 err = dev_uc_add_excl(dev, addr);
6745 else if (is_multicast_ether_addr(addr))
6746 err = dev_mc_add_excl(dev, addr);
6751 /* Only return duplicate errors if NLM_F_EXCL is set */
6752 if (err == -EEXIST && !(flags & NLM_F_EXCL))
6758 static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,
6759 struct net_device *dev,
6760 unsigned char *addr)
6762 struct ixgbe_adapter *adapter = netdev_priv(dev);
6763 int err = -EOPNOTSUPP;
6765 if (ndm->ndm_state & NUD_PERMANENT) {
6766 pr_info("%s: FDB only supports static addresses\n",
6771 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6772 if (is_unicast_ether_addr(addr))
6773 err = dev_uc_del(dev, addr);
6774 else if (is_multicast_ether_addr(addr))
6775 err = dev_mc_del(dev, addr);
6783 static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,
6784 struct netlink_callback *cb,
6785 struct net_device *dev,
6788 struct ixgbe_adapter *adapter = netdev_priv(dev);
6790 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6791 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
6796 static const struct net_device_ops ixgbe_netdev_ops = {
6797 .ndo_open = ixgbe_open,
6798 .ndo_stop = ixgbe_close,
6799 .ndo_start_xmit = ixgbe_xmit_frame,
6800 .ndo_select_queue = ixgbe_select_queue,
6801 .ndo_set_rx_mode = ixgbe_set_rx_mode,
6802 .ndo_validate_addr = eth_validate_addr,
6803 .ndo_set_mac_address = ixgbe_set_mac,
6804 .ndo_change_mtu = ixgbe_change_mtu,
6805 .ndo_tx_timeout = ixgbe_tx_timeout,
6806 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6807 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
6808 .ndo_do_ioctl = ixgbe_ioctl,
6809 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6810 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6811 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6812 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
6813 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
6814 .ndo_get_stats64 = ixgbe_get_stats64,
6815 #ifdef CONFIG_IXGBE_DCB
6816 .ndo_setup_tc = ixgbe_setup_tc,
6818 #ifdef CONFIG_NET_POLL_CONTROLLER
6819 .ndo_poll_controller = ixgbe_netpoll,
6822 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6823 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
6824 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
6825 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6826 .ndo_fcoe_disable = ixgbe_fcoe_disable,
6827 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
6828 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
6829 #endif /* IXGBE_FCOE */
6830 .ndo_set_features = ixgbe_set_features,
6831 .ndo_fix_features = ixgbe_fix_features,
6832 .ndo_fdb_add = ixgbe_ndo_fdb_add,
6833 .ndo_fdb_del = ixgbe_ndo_fdb_del,
6834 .ndo_fdb_dump = ixgbe_ndo_fdb_dump,
6837 static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
6838 const struct ixgbe_info *ii)
6840 #ifdef CONFIG_PCI_IOV
6841 struct ixgbe_hw *hw = &adapter->hw;
6843 if (hw->mac.type == ixgbe_mac_82598EB)
6846 /* The 82599 supports up to 64 VFs per physical function
6847 * but this implementation limits allocation to 63 so that
6848 * basic networking resources are still available to the
6849 * physical function. If the user requests greater thn
6850 * 63 VFs then it is an error - reset to default of zero.
6852 adapter->num_vfs = (max_vfs > 63) ? 0 : max_vfs;
6853 ixgbe_enable_sriov(adapter, ii);
6854 #endif /* CONFIG_PCI_IOV */
6858 * ixgbe_wol_supported - Check whether device supports WoL
6859 * @hw: hw specific details
6860 * @device_id: the device ID
6861 * @subdev_id: the subsystem device ID
6863 * This function is used by probe and ethtool to determine
6864 * which devices have WoL support
6867 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
6870 struct ixgbe_hw *hw = &adapter->hw;
6871 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
6872 int is_wol_supported = 0;
6874 switch (device_id) {
6875 case IXGBE_DEV_ID_82599_SFP:
6876 /* Only these subdevices could supports WOL */
6877 switch (subdevice_id) {
6878 case IXGBE_SUBDEV_ID_82599_560FLR:
6879 /* only support first port */
6880 if (hw->bus.func != 0)
6882 case IXGBE_SUBDEV_ID_82599_SFP:
6883 is_wol_supported = 1;
6887 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
6888 /* All except this subdevice support WOL */
6889 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
6890 is_wol_supported = 1;
6892 case IXGBE_DEV_ID_82599_KX4:
6893 is_wol_supported = 1;
6895 case IXGBE_DEV_ID_X540T:
6896 /* check eeprom to see if enabled wol */
6897 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
6898 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
6899 (hw->bus.func == 0))) {
6900 is_wol_supported = 1;
6905 return is_wol_supported;
6909 * ixgbe_probe - Device Initialization Routine
6910 * @pdev: PCI device information struct
6911 * @ent: entry in ixgbe_pci_tbl
6913 * Returns 0 on success, negative on failure
6915 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6916 * The OS initialization, configuring of the adapter private structure,
6917 * and a hardware reset occur.
6919 static int __devinit ixgbe_probe(struct pci_dev *pdev,
6920 const struct pci_device_id *ent)
6922 struct net_device *netdev;
6923 struct ixgbe_adapter *adapter = NULL;
6924 struct ixgbe_hw *hw;
6925 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
6926 static int cards_found;
6927 int i, err, pci_using_dac;
6928 u8 part_str[IXGBE_PBANUM_LENGTH];
6929 unsigned int indices = num_possible_cpus();
6935 /* Catch broken hardware that put the wrong VF device ID in
6936 * the PCIe SR-IOV capability.
6938 if (pdev->is_virtfn) {
6939 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
6940 pci_name(pdev), pdev->vendor, pdev->device);
6944 err = pci_enable_device_mem(pdev);
6948 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
6949 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
6952 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
6954 err = dma_set_coherent_mask(&pdev->dev,
6958 "No usable DMA configuration, aborting\n");
6965 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
6966 IORESOURCE_MEM), ixgbe_driver_name);
6969 "pci_request_selected_regions failed 0x%x\n", err);
6973 pci_enable_pcie_error_reporting(pdev);
6975 pci_set_master(pdev);
6976 pci_save_state(pdev);
6978 #ifdef CONFIG_IXGBE_DCB
6979 indices *= MAX_TRAFFIC_CLASS;
6982 if (ii->mac == ixgbe_mac_82598EB)
6983 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
6985 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
6988 indices += min_t(unsigned int, num_possible_cpus(),
6989 IXGBE_MAX_FCOE_INDICES);
6991 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
6994 goto err_alloc_etherdev;
6997 SET_NETDEV_DEV(netdev, &pdev->dev);
6999 adapter = netdev_priv(netdev);
7000 pci_set_drvdata(pdev, adapter);
7002 adapter->netdev = netdev;
7003 adapter->pdev = pdev;
7006 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7008 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7009 pci_resource_len(pdev, 0));
7015 for (i = 1; i <= 5; i++) {
7016 if (pci_resource_len(pdev, i) == 0)
7020 netdev->netdev_ops = &ixgbe_netdev_ops;
7021 ixgbe_set_ethtool_ops(netdev);
7022 netdev->watchdog_timeo = 5 * HZ;
7023 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7025 adapter->bd_number = cards_found;
7028 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
7029 hw->mac.type = ii->mac;
7032 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
7033 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
7034 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7035 if (!(eec & (1 << 8)))
7036 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
7039 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
7040 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
7041 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7042 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
7043 hw->phy.mdio.mmds = 0;
7044 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
7045 hw->phy.mdio.dev = netdev;
7046 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
7047 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
7049 ii->get_invariants(hw);
7051 /* setup the private structure */
7052 err = ixgbe_sw_init(adapter);
7056 /* Make it possible the adapter to be woken up via WOL */
7057 switch (adapter->hw.mac.type) {
7058 case ixgbe_mac_82599EB:
7059 case ixgbe_mac_X540:
7060 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7067 * If there is a fan on this device and it has failed log the
7070 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
7071 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
7072 if (esdp & IXGBE_ESDP_SDP1)
7073 e_crit(probe, "Fan has stopped, replace the adapter\n");
7076 if (allow_unsupported_sfp)
7077 hw->allow_unsupported_sfp = allow_unsupported_sfp;
7079 /* reset_hw fills in the perm_addr as well */
7080 hw->phy.reset_if_overtemp = true;
7081 err = hw->mac.ops.reset_hw(hw);
7082 hw->phy.reset_if_overtemp = false;
7083 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
7084 hw->mac.type == ixgbe_mac_82598EB) {
7086 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
7087 e_dev_err("failed to load because an unsupported SFP+ "
7088 "module type was detected.\n");
7089 e_dev_err("Reload the driver after installing a supported "
7093 e_dev_err("HW Init failed: %d\n", err);
7097 ixgbe_probe_vf(adapter, ii);
7099 netdev->features = NETIF_F_SG |
7102 NETIF_F_HW_VLAN_TX |
7103 NETIF_F_HW_VLAN_RX |
7104 NETIF_F_HW_VLAN_FILTER |
7110 netdev->hw_features = netdev->features;
7112 switch (adapter->hw.mac.type) {
7113 case ixgbe_mac_82599EB:
7114 case ixgbe_mac_X540:
7115 netdev->features |= NETIF_F_SCTP_CSUM;
7116 netdev->hw_features |= NETIF_F_SCTP_CSUM |
7123 netdev->hw_features |= NETIF_F_RXALL;
7125 netdev->vlan_features |= NETIF_F_TSO;
7126 netdev->vlan_features |= NETIF_F_TSO6;
7127 netdev->vlan_features |= NETIF_F_IP_CSUM;
7128 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
7129 netdev->vlan_features |= NETIF_F_SG;
7131 netdev->priv_flags |= IFF_UNICAST_FLT;
7132 netdev->priv_flags |= IFF_SUPP_NOFCS;
7134 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7135 adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
7136 IXGBE_FLAG_DCB_ENABLED);
7138 #ifdef CONFIG_IXGBE_DCB
7139 netdev->dcbnl_ops = &dcbnl_ops;
7143 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7144 if (hw->mac.ops.get_device_caps) {
7145 hw->mac.ops.get_device_caps(hw, &device_caps);
7146 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
7147 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
7150 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
7151 netdev->vlan_features |= NETIF_F_FCOE_CRC;
7152 netdev->vlan_features |= NETIF_F_FSO;
7153 netdev->vlan_features |= NETIF_F_FCOE_MTU;
7155 #endif /* IXGBE_FCOE */
7156 if (pci_using_dac) {
7157 netdev->features |= NETIF_F_HIGHDMA;
7158 netdev->vlan_features |= NETIF_F_HIGHDMA;
7161 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
7162 netdev->hw_features |= NETIF_F_LRO;
7163 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7164 netdev->features |= NETIF_F_LRO;
7166 /* make sure the EEPROM is good */
7167 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
7168 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7173 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
7174 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
7176 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
7177 e_dev_err("invalid MAC address\n");
7182 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
7183 (unsigned long) adapter);
7185 INIT_WORK(&adapter->service_task, ixgbe_service_task);
7186 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
7188 err = ixgbe_init_interrupt_scheme(adapter);
7192 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
7193 netdev->hw_features &= ~NETIF_F_RXHASH;
7194 netdev->features &= ~NETIF_F_RXHASH;
7197 /* WOL not supported for all devices */
7199 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
7200 if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device))
7201 adapter->wol = IXGBE_WUFC_MAG;
7203 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
7205 /* save off EEPROM version number */
7206 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
7207 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
7209 /* pick up the PCI bus settings for reporting later */
7210 hw->mac.ops.get_bus_info(hw);
7212 /* print bus type/speed/width info */
7213 e_dev_info("(PCI Express:%s:%s) %pM\n",
7214 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
7215 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
7217 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
7218 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
7219 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
7223 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
7225 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
7226 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
7227 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7228 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
7231 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7232 hw->mac.type, hw->phy.type, part_str);
7234 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
7235 e_dev_warn("PCI-Express bandwidth available for this card is "
7236 "not sufficient for optimal performance.\n");
7237 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7241 /* reset the hardware with the new settings */
7242 err = hw->mac.ops.start_hw(hw);
7243 if (err == IXGBE_ERR_EEPROM_VERSION) {
7244 /* We are running on a pre-production device, log a warning */
7245 e_dev_warn("This device is a pre-production adapter/LOM. "
7246 "Please be aware there may be issues associated "
7247 "with your hardware. If you are experiencing "
7248 "problems please contact your Intel or hardware "
7249 "representative who provided you with this "
7252 strcpy(netdev->name, "eth%d");
7253 err = register_netdev(netdev);
7257 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7258 if (hw->mac.ops.disable_tx_laser &&
7259 ((hw->phy.multispeed_fiber) ||
7260 ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
7261 (hw->mac.type == ixgbe_mac_82599EB))))
7262 hw->mac.ops.disable_tx_laser(hw);
7264 /* carrier off reporting is important to ethtool even BEFORE open */
7265 netif_carrier_off(netdev);
7267 #ifdef CONFIG_IXGBE_DCA
7268 if (dca_add_requester(&pdev->dev) == 0) {
7269 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
7270 ixgbe_setup_dca(adapter);
7273 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7274 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
7275 for (i = 0; i < adapter->num_vfs; i++)
7276 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7279 /* firmware requires driver version to be 0xFFFFFFFF
7280 * since os does not support feature
7282 if (hw->mac.ops.set_fw_drv_ver)
7283 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
7286 /* add san mac addr to netdev */
7287 ixgbe_add_sanmac_netdev(netdev);
7289 e_dev_info("%s\n", ixgbe_default_device_descr);
7292 if (ixgbe_sysfs_init(adapter))
7293 e_err(probe, "failed to allocate sysfs resources\n");
7298 ixgbe_release_hw_control(adapter);
7299 ixgbe_clear_interrupt_scheme(adapter);
7301 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7302 ixgbe_disable_sriov(adapter);
7303 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7304 iounmap(hw->hw_addr);
7306 free_netdev(netdev);
7308 pci_release_selected_regions(pdev,
7309 pci_select_bars(pdev, IORESOURCE_MEM));
7312 pci_disable_device(pdev);
7317 * ixgbe_remove - Device Removal Routine
7318 * @pdev: PCI device information struct
7320 * ixgbe_remove is called by the PCI subsystem to alert the driver
7321 * that it should release a PCI device. The could be caused by a
7322 * Hot-Plug event, or because the driver is going to be removed from
7325 static void __devexit ixgbe_remove(struct pci_dev *pdev)
7327 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7328 struct net_device *netdev = adapter->netdev;
7330 set_bit(__IXGBE_DOWN, &adapter->state);
7331 cancel_work_sync(&adapter->service_task);
7333 #ifdef CONFIG_IXGBE_DCA
7334 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7335 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7336 dca_remove_requester(&pdev->dev);
7337 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7341 ixgbe_sysfs_exit(adapter);
7344 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7345 ixgbe_cleanup_fcoe(adapter);
7347 #endif /* IXGBE_FCOE */
7349 /* remove the added san mac */
7350 ixgbe_del_sanmac_netdev(netdev);
7352 if (netdev->reg_state == NETREG_REGISTERED)
7353 unregister_netdev(netdev);
7355 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
7356 if (!(ixgbe_check_vf_assignment(adapter)))
7357 ixgbe_disable_sriov(adapter);
7359 e_dev_warn("Unloading driver while VFs are assigned "
7360 "- VFs will not be deallocated\n");
7363 ixgbe_clear_interrupt_scheme(adapter);
7365 ixgbe_release_hw_control(adapter);
7368 kfree(adapter->ixgbe_ieee_pfc);
7369 kfree(adapter->ixgbe_ieee_ets);
7372 iounmap(adapter->hw.hw_addr);
7373 pci_release_selected_regions(pdev, pci_select_bars(pdev,
7376 e_dev_info("complete\n");
7378 free_netdev(netdev);
7380 pci_disable_pcie_error_reporting(pdev);
7382 pci_disable_device(pdev);
7386 * ixgbe_io_error_detected - called when PCI error is detected
7387 * @pdev: Pointer to PCI device
7388 * @state: The current pci connection state
7390 * This function is called after a PCI bus error affecting
7391 * this device has been detected.
7393 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
7394 pci_channel_state_t state)
7396 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7397 struct net_device *netdev = adapter->netdev;
7399 #ifdef CONFIG_PCI_IOV
7400 struct pci_dev *bdev, *vfdev;
7401 u32 dw0, dw1, dw2, dw3;
7403 u16 req_id, pf_func;
7405 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7406 adapter->num_vfs == 0)
7407 goto skip_bad_vf_detection;
7409 bdev = pdev->bus->self;
7410 while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
7411 bdev = bdev->bus->self;
7414 goto skip_bad_vf_detection;
7416 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
7418 goto skip_bad_vf_detection;
7420 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
7421 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
7422 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
7423 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
7426 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7427 if (!(req_id & 0x0080))
7428 goto skip_bad_vf_detection;
7430 pf_func = req_id & 0x01;
7431 if ((pf_func & 1) == (pdev->devfn & 1)) {
7432 unsigned int device_id;
7434 vf = (req_id & 0x7F) >> 1;
7435 e_dev_err("VF %d has caused a PCIe error\n", vf);
7436 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7437 "%8.8x\tdw3: %8.8x\n",
7438 dw0, dw1, dw2, dw3);
7439 switch (adapter->hw.mac.type) {
7440 case ixgbe_mac_82599EB:
7441 device_id = IXGBE_82599_VF_DEVICE_ID;
7443 case ixgbe_mac_X540:
7444 device_id = IXGBE_X540_VF_DEVICE_ID;
7451 /* Find the pci device of the offending VF */
7452 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID, device_id, NULL);
7454 if (vfdev->devfn == (req_id & 0xFF))
7456 vfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID,
7460 * There's a slim chance the VF could have been hot plugged,
7461 * so if it is no longer present we don't need to issue the
7462 * VFLR. Just clean up the AER in that case.
7465 e_dev_err("Issuing VFLR to VF %d\n", vf);
7466 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
7469 pci_cleanup_aer_uncorrect_error_status(pdev);
7473 * Even though the error may have occurred on the other port
7474 * we still need to increment the vf error reference count for
7475 * both ports because the I/O resume function will be called
7478 adapter->vferr_refcount++;
7480 return PCI_ERS_RESULT_RECOVERED;
7482 skip_bad_vf_detection:
7483 #endif /* CONFIG_PCI_IOV */
7484 netif_device_detach(netdev);
7486 if (state == pci_channel_io_perm_failure)
7487 return PCI_ERS_RESULT_DISCONNECT;
7489 if (netif_running(netdev))
7490 ixgbe_down(adapter);
7491 pci_disable_device(pdev);
7493 /* Request a slot reset. */
7494 return PCI_ERS_RESULT_NEED_RESET;
7498 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7499 * @pdev: Pointer to PCI device
7501 * Restart the card from scratch, as if from a cold-boot.
7503 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7505 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7506 pci_ers_result_t result;
7509 if (pci_enable_device_mem(pdev)) {
7510 e_err(probe, "Cannot re-enable PCI device after reset.\n");
7511 result = PCI_ERS_RESULT_DISCONNECT;
7513 pci_set_master(pdev);
7514 pci_restore_state(pdev);
7515 pci_save_state(pdev);
7517 pci_wake_from_d3(pdev, false);
7519 ixgbe_reset(adapter);
7520 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7521 result = PCI_ERS_RESULT_RECOVERED;
7524 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7526 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7527 "failed 0x%0x\n", err);
7528 /* non-fatal, continue */
7535 * ixgbe_io_resume - called when traffic can start flowing again.
7536 * @pdev: Pointer to PCI device
7538 * This callback is called when the error recovery driver tells us that
7539 * its OK to resume normal operation.
7541 static void ixgbe_io_resume(struct pci_dev *pdev)
7543 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
7544 struct net_device *netdev = adapter->netdev;
7546 #ifdef CONFIG_PCI_IOV
7547 if (adapter->vferr_refcount) {
7548 e_info(drv, "Resuming after VF err\n");
7549 adapter->vferr_refcount--;
7554 if (netif_running(netdev))
7557 netif_device_attach(netdev);
7560 static struct pci_error_handlers ixgbe_err_handler = {
7561 .error_detected = ixgbe_io_error_detected,
7562 .slot_reset = ixgbe_io_slot_reset,
7563 .resume = ixgbe_io_resume,
7566 static struct pci_driver ixgbe_driver = {
7567 .name = ixgbe_driver_name,
7568 .id_table = ixgbe_pci_tbl,
7569 .probe = ixgbe_probe,
7570 .remove = __devexit_p(ixgbe_remove),
7572 .suspend = ixgbe_suspend,
7573 .resume = ixgbe_resume,
7575 .shutdown = ixgbe_shutdown,
7576 .err_handler = &ixgbe_err_handler
7580 * ixgbe_init_module - Driver Registration Routine
7582 * ixgbe_init_module is the first routine called when the driver is
7583 * loaded. All it does is register with the PCI subsystem.
7585 static int __init ixgbe_init_module(void)
7588 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
7589 pr_info("%s\n", ixgbe_copyright);
7591 #ifdef CONFIG_IXGBE_DCA
7592 dca_register_notify(&dca_notifier);
7595 ret = pci_register_driver(&ixgbe_driver);
7599 module_init(ixgbe_init_module);
7602 * ixgbe_exit_module - Driver Exit Cleanup Routine
7604 * ixgbe_exit_module is called just before the driver is removed
7607 static void __exit ixgbe_exit_module(void)
7609 #ifdef CONFIG_IXGBE_DCA
7610 dca_unregister_notify(&dca_notifier);
7612 pci_unregister_driver(&ixgbe_driver);
7613 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7616 #ifdef CONFIG_IXGBE_DCA
7617 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
7622 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
7623 __ixgbe_notify_dca);
7625 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7628 #endif /* CONFIG_IXGBE_DCA */
7630 module_exit(ixgbe_exit_module);