1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <net/pkt_sched.h>
38 #include <linux/net_tstamp.h>
39 #include <linux/mii.h>
40 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43 #include <linux/pci.h>
44 #include <linux/pci-aspm.h>
45 #include <linux/delay.h>
46 #include <linux/interrupt.h>
48 #include <linux/tcp.h>
49 #include <linux/sctp.h>
50 #include <linux/if_ether.h>
51 #include <linux/aer.h>
52 #include <linux/prefetch.h>
53 #include <linux/pm_runtime.h>
54 #include <linux/etherdevice.h>
56 #include <linux/dca.h>
58 #include <linux/i2c.h>
64 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
65 __stringify(BUILD) "-k"
68 QUEUE_MODE_STRICT_PRIORITY,
69 QUEUE_MODE_STREAM_RESERVATION,
77 char igb_driver_name[] = "igb";
78 char igb_driver_version[] = DRV_VERSION;
79 static const char igb_driver_string[] =
80 "Intel(R) Gigabit Ethernet Network Driver";
81 static const char igb_copyright[] =
82 "Copyright (c) 2007-2014 Intel Corporation.";
84 static const struct e1000_info *igb_info_tbl[] = {
85 [board_82575] = &e1000_82575_info,
88 static const struct pci_device_id igb_pci_tbl[] = {
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
115 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
116 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
117 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
118 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
119 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
120 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
121 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
122 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
123 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
124 /* required last entry */
128 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
130 static int igb_setup_all_tx_resources(struct igb_adapter *);
131 static int igb_setup_all_rx_resources(struct igb_adapter *);
132 static void igb_free_all_tx_resources(struct igb_adapter *);
133 static void igb_free_all_rx_resources(struct igb_adapter *);
134 static void igb_setup_mrqc(struct igb_adapter *);
135 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
136 static void igb_remove(struct pci_dev *pdev);
137 static int igb_sw_init(struct igb_adapter *);
138 int igb_open(struct net_device *);
139 int igb_close(struct net_device *);
140 static void igb_configure(struct igb_adapter *);
141 static void igb_configure_tx(struct igb_adapter *);
142 static void igb_configure_rx(struct igb_adapter *);
143 static void igb_clean_all_tx_rings(struct igb_adapter *);
144 static void igb_clean_all_rx_rings(struct igb_adapter *);
145 static void igb_clean_tx_ring(struct igb_ring *);
146 static void igb_clean_rx_ring(struct igb_ring *);
147 static void igb_set_rx_mode(struct net_device *);
148 static void igb_update_phy_info(struct timer_list *);
149 static void igb_watchdog(struct timer_list *);
150 static void igb_watchdog_task(struct work_struct *);
151 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
152 static void igb_get_stats64(struct net_device *dev,
153 struct rtnl_link_stats64 *stats);
154 static int igb_change_mtu(struct net_device *, int);
155 static int igb_set_mac(struct net_device *, void *);
156 static void igb_set_uta(struct igb_adapter *adapter, bool set);
157 static irqreturn_t igb_intr(int irq, void *);
158 static irqreturn_t igb_intr_msi(int irq, void *);
159 static irqreturn_t igb_msix_other(int irq, void *);
160 static irqreturn_t igb_msix_ring(int irq, void *);
161 #ifdef CONFIG_IGB_DCA
162 static void igb_update_dca(struct igb_q_vector *);
163 static void igb_setup_dca(struct igb_adapter *);
164 #endif /* CONFIG_IGB_DCA */
165 static int igb_poll(struct napi_struct *, int);
166 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
167 static int igb_clean_rx_irq(struct igb_q_vector *, int);
168 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
169 static void igb_tx_timeout(struct net_device *);
170 static void igb_reset_task(struct work_struct *);
171 static void igb_vlan_mode(struct net_device *netdev,
172 netdev_features_t features);
173 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
174 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
175 static void igb_restore_vlan(struct igb_adapter *);
176 static void igb_rar_set_index(struct igb_adapter *, u32);
177 static void igb_ping_all_vfs(struct igb_adapter *);
178 static void igb_msg_task(struct igb_adapter *);
179 static void igb_vmm_control(struct igb_adapter *);
180 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
181 static void igb_flush_mac_table(struct igb_adapter *);
182 static int igb_available_rars(struct igb_adapter *, u8);
183 static void igb_set_default_mac_filter(struct igb_adapter *);
184 static int igb_uc_sync(struct net_device *, const unsigned char *);
185 static int igb_uc_unsync(struct net_device *, const unsigned char *);
186 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
187 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
188 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
189 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
190 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
191 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
193 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
194 struct ifla_vf_info *ivi);
195 static void igb_check_vf_rate_limit(struct igb_adapter *);
196 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
197 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
199 #ifdef CONFIG_PCI_IOV
200 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
201 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
202 static int igb_disable_sriov(struct pci_dev *dev);
203 static int igb_pci_disable_sriov(struct pci_dev *dev);
206 static int igb_suspend(struct device *);
207 static int igb_resume(struct device *);
208 static int igb_runtime_suspend(struct device *dev);
209 static int igb_runtime_resume(struct device *dev);
210 static int igb_runtime_idle(struct device *dev);
211 static const struct dev_pm_ops igb_pm_ops = {
212 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
213 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
216 static void igb_shutdown(struct pci_dev *);
217 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
218 #ifdef CONFIG_IGB_DCA
219 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
220 static struct notifier_block dca_notifier = {
221 .notifier_call = igb_notify_dca,
226 #ifdef CONFIG_NET_POLL_CONTROLLER
227 /* for netdump / net console */
228 static void igb_netpoll(struct net_device *);
230 #ifdef CONFIG_PCI_IOV
231 static unsigned int max_vfs;
232 module_param(max_vfs, uint, 0);
233 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
234 #endif /* CONFIG_PCI_IOV */
236 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
237 pci_channel_state_t);
238 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
239 static void igb_io_resume(struct pci_dev *);
241 static const struct pci_error_handlers igb_err_handler = {
242 .error_detected = igb_io_error_detected,
243 .slot_reset = igb_io_slot_reset,
244 .resume = igb_io_resume,
247 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
249 static struct pci_driver igb_driver = {
250 .name = igb_driver_name,
251 .id_table = igb_pci_tbl,
253 .remove = igb_remove,
255 .driver.pm = &igb_pm_ops,
257 .shutdown = igb_shutdown,
258 .sriov_configure = igb_pci_sriov_configure,
259 .err_handler = &igb_err_handler
262 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
263 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
264 MODULE_LICENSE("GPL");
265 MODULE_VERSION(DRV_VERSION);
267 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
268 static int debug = -1;
269 module_param(debug, int, 0);
270 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
272 struct igb_reg_info {
277 static const struct igb_reg_info igb_reg_info_tbl[] = {
279 /* General Registers */
280 {E1000_CTRL, "CTRL"},
281 {E1000_STATUS, "STATUS"},
282 {E1000_CTRL_EXT, "CTRL_EXT"},
284 /* Interrupt Registers */
288 {E1000_RCTL, "RCTL"},
289 {E1000_RDLEN(0), "RDLEN"},
290 {E1000_RDH(0), "RDH"},
291 {E1000_RDT(0), "RDT"},
292 {E1000_RXDCTL(0), "RXDCTL"},
293 {E1000_RDBAL(0), "RDBAL"},
294 {E1000_RDBAH(0), "RDBAH"},
297 {E1000_TCTL, "TCTL"},
298 {E1000_TDBAL(0), "TDBAL"},
299 {E1000_TDBAH(0), "TDBAH"},
300 {E1000_TDLEN(0), "TDLEN"},
301 {E1000_TDH(0), "TDH"},
302 {E1000_TDT(0), "TDT"},
303 {E1000_TXDCTL(0), "TXDCTL"},
304 {E1000_TDFH, "TDFH"},
305 {E1000_TDFT, "TDFT"},
306 {E1000_TDFHS, "TDFHS"},
307 {E1000_TDFPC, "TDFPC"},
309 /* List Terminator */
313 /* igb_regdump - register printout routine */
314 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
320 switch (reginfo->ofs) {
322 for (n = 0; n < 4; n++)
323 regs[n] = rd32(E1000_RDLEN(n));
326 for (n = 0; n < 4; n++)
327 regs[n] = rd32(E1000_RDH(n));
330 for (n = 0; n < 4; n++)
331 regs[n] = rd32(E1000_RDT(n));
333 case E1000_RXDCTL(0):
334 for (n = 0; n < 4; n++)
335 regs[n] = rd32(E1000_RXDCTL(n));
338 for (n = 0; n < 4; n++)
339 regs[n] = rd32(E1000_RDBAL(n));
342 for (n = 0; n < 4; n++)
343 regs[n] = rd32(E1000_RDBAH(n));
346 for (n = 0; n < 4; n++)
347 regs[n] = rd32(E1000_RDBAL(n));
350 for (n = 0; n < 4; n++)
351 regs[n] = rd32(E1000_TDBAH(n));
354 for (n = 0; n < 4; n++)
355 regs[n] = rd32(E1000_TDLEN(n));
358 for (n = 0; n < 4; n++)
359 regs[n] = rd32(E1000_TDH(n));
362 for (n = 0; n < 4; n++)
363 regs[n] = rd32(E1000_TDT(n));
365 case E1000_TXDCTL(0):
366 for (n = 0; n < 4; n++)
367 regs[n] = rd32(E1000_TXDCTL(n));
370 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
374 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
375 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
379 /* igb_dump - Print registers, Tx-rings and Rx-rings */
380 static void igb_dump(struct igb_adapter *adapter)
382 struct net_device *netdev = adapter->netdev;
383 struct e1000_hw *hw = &adapter->hw;
384 struct igb_reg_info *reginfo;
385 struct igb_ring *tx_ring;
386 union e1000_adv_tx_desc *tx_desc;
387 struct my_u0 { u64 a; u64 b; } *u0;
388 struct igb_ring *rx_ring;
389 union e1000_adv_rx_desc *rx_desc;
393 if (!netif_msg_hw(adapter))
396 /* Print netdevice Info */
398 dev_info(&adapter->pdev->dev, "Net device Info\n");
399 pr_info("Device Name state trans_start\n");
400 pr_info("%-15s %016lX %016lX\n", netdev->name,
401 netdev->state, dev_trans_start(netdev));
404 /* Print Registers */
405 dev_info(&adapter->pdev->dev, "Register Dump\n");
406 pr_info(" Register Name Value\n");
407 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
408 reginfo->name; reginfo++) {
409 igb_regdump(hw, reginfo);
412 /* Print TX Ring Summary */
413 if (!netdev || !netif_running(netdev))
416 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
417 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
418 for (n = 0; n < adapter->num_tx_queues; n++) {
419 struct igb_tx_buffer *buffer_info;
420 tx_ring = adapter->tx_ring[n];
421 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
422 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
423 n, tx_ring->next_to_use, tx_ring->next_to_clean,
424 (u64)dma_unmap_addr(buffer_info, dma),
425 dma_unmap_len(buffer_info, len),
426 buffer_info->next_to_watch,
427 (u64)buffer_info->time_stamp);
431 if (!netif_msg_tx_done(adapter))
432 goto rx_ring_summary;
434 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
436 /* Transmit Descriptor Formats
438 * Advanced Transmit Descriptor
439 * +--------------------------------------------------------------+
440 * 0 | Buffer Address [63:0] |
441 * +--------------------------------------------------------------+
442 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
443 * +--------------------------------------------------------------+
444 * 63 46 45 40 39 38 36 35 32 31 24 15 0
447 for (n = 0; n < adapter->num_tx_queues; n++) {
448 tx_ring = adapter->tx_ring[n];
449 pr_info("------------------------------------\n");
450 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
451 pr_info("------------------------------------\n");
452 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
454 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
455 const char *next_desc;
456 struct igb_tx_buffer *buffer_info;
457 tx_desc = IGB_TX_DESC(tx_ring, i);
458 buffer_info = &tx_ring->tx_buffer_info[i];
459 u0 = (struct my_u0 *)tx_desc;
460 if (i == tx_ring->next_to_use &&
461 i == tx_ring->next_to_clean)
462 next_desc = " NTC/U";
463 else if (i == tx_ring->next_to_use)
465 else if (i == tx_ring->next_to_clean)
470 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
471 i, le64_to_cpu(u0->a),
473 (u64)dma_unmap_addr(buffer_info, dma),
474 dma_unmap_len(buffer_info, len),
475 buffer_info->next_to_watch,
476 (u64)buffer_info->time_stamp,
477 buffer_info->skb, next_desc);
479 if (netif_msg_pktdata(adapter) && buffer_info->skb)
480 print_hex_dump(KERN_INFO, "",
482 16, 1, buffer_info->skb->data,
483 dma_unmap_len(buffer_info, len),
488 /* Print RX Rings Summary */
490 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
491 pr_info("Queue [NTU] [NTC]\n");
492 for (n = 0; n < adapter->num_rx_queues; n++) {
493 rx_ring = adapter->rx_ring[n];
494 pr_info(" %5d %5X %5X\n",
495 n, rx_ring->next_to_use, rx_ring->next_to_clean);
499 if (!netif_msg_rx_status(adapter))
502 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
504 /* Advanced Receive Descriptor (Read) Format
506 * +-----------------------------------------------------+
507 * 0 | Packet Buffer Address [63:1] |A0/NSE|
508 * +----------------------------------------------+------+
509 * 8 | Header Buffer Address [63:1] | DD |
510 * +-----------------------------------------------------+
513 * Advanced Receive Descriptor (Write-Back) Format
515 * 63 48 47 32 31 30 21 20 17 16 4 3 0
516 * +------------------------------------------------------+
517 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
518 * | Checksum Ident | | | | Type | Type |
519 * +------------------------------------------------------+
520 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
521 * +------------------------------------------------------+
522 * 63 48 47 32 31 20 19 0
525 for (n = 0; n < adapter->num_rx_queues; n++) {
526 rx_ring = adapter->rx_ring[n];
527 pr_info("------------------------------------\n");
528 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
529 pr_info("------------------------------------\n");
530 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
531 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
533 for (i = 0; i < rx_ring->count; i++) {
534 const char *next_desc;
535 struct igb_rx_buffer *buffer_info;
536 buffer_info = &rx_ring->rx_buffer_info[i];
537 rx_desc = IGB_RX_DESC(rx_ring, i);
538 u0 = (struct my_u0 *)rx_desc;
539 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
541 if (i == rx_ring->next_to_use)
543 else if (i == rx_ring->next_to_clean)
548 if (staterr & E1000_RXD_STAT_DD) {
549 /* Descriptor Done */
550 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
556 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
560 (u64)buffer_info->dma,
563 if (netif_msg_pktdata(adapter) &&
564 buffer_info->dma && buffer_info->page) {
565 print_hex_dump(KERN_INFO, "",
568 page_address(buffer_info->page) +
569 buffer_info->page_offset,
570 igb_rx_bufsz(rx_ring), true);
581 * igb_get_i2c_data - Reads the I2C SDA data bit
582 * @hw: pointer to hardware structure
583 * @i2cctl: Current value of I2CCTL register
585 * Returns the I2C data bit value
587 static int igb_get_i2c_data(void *data)
589 struct igb_adapter *adapter = (struct igb_adapter *)data;
590 struct e1000_hw *hw = &adapter->hw;
591 s32 i2cctl = rd32(E1000_I2CPARAMS);
593 return !!(i2cctl & E1000_I2C_DATA_IN);
597 * igb_set_i2c_data - Sets the I2C data bit
598 * @data: pointer to hardware structure
599 * @state: I2C data value (0 or 1) to set
601 * Sets the I2C data bit
603 static void igb_set_i2c_data(void *data, int state)
605 struct igb_adapter *adapter = (struct igb_adapter *)data;
606 struct e1000_hw *hw = &adapter->hw;
607 s32 i2cctl = rd32(E1000_I2CPARAMS);
610 i2cctl |= E1000_I2C_DATA_OUT;
612 i2cctl &= ~E1000_I2C_DATA_OUT;
614 i2cctl &= ~E1000_I2C_DATA_OE_N;
615 i2cctl |= E1000_I2C_CLK_OE_N;
616 wr32(E1000_I2CPARAMS, i2cctl);
622 * igb_set_i2c_clk - Sets the I2C SCL clock
623 * @data: pointer to hardware structure
624 * @state: state to set clock
626 * Sets the I2C clock line to state
628 static void igb_set_i2c_clk(void *data, int state)
630 struct igb_adapter *adapter = (struct igb_adapter *)data;
631 struct e1000_hw *hw = &adapter->hw;
632 s32 i2cctl = rd32(E1000_I2CPARAMS);
635 i2cctl |= E1000_I2C_CLK_OUT;
636 i2cctl &= ~E1000_I2C_CLK_OE_N;
638 i2cctl &= ~E1000_I2C_CLK_OUT;
639 i2cctl &= ~E1000_I2C_CLK_OE_N;
641 wr32(E1000_I2CPARAMS, i2cctl);
646 * igb_get_i2c_clk - Gets the I2C SCL clock state
647 * @data: pointer to hardware structure
649 * Gets the I2C clock state
651 static int igb_get_i2c_clk(void *data)
653 struct igb_adapter *adapter = (struct igb_adapter *)data;
654 struct e1000_hw *hw = &adapter->hw;
655 s32 i2cctl = rd32(E1000_I2CPARAMS);
657 return !!(i2cctl & E1000_I2C_CLK_IN);
660 static const struct i2c_algo_bit_data igb_i2c_algo = {
661 .setsda = igb_set_i2c_data,
662 .setscl = igb_set_i2c_clk,
663 .getsda = igb_get_i2c_data,
664 .getscl = igb_get_i2c_clk,
670 * igb_get_hw_dev - return device
671 * @hw: pointer to hardware structure
673 * used by hardware layer to print debugging information
675 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
677 struct igb_adapter *adapter = hw->back;
678 return adapter->netdev;
682 * igb_init_module - Driver Registration Routine
684 * igb_init_module is the first routine called when the driver is
685 * loaded. All it does is register with the PCI subsystem.
687 static int __init igb_init_module(void)
691 pr_info("%s - version %s\n",
692 igb_driver_string, igb_driver_version);
693 pr_info("%s\n", igb_copyright);
695 #ifdef CONFIG_IGB_DCA
696 dca_register_notify(&dca_notifier);
698 ret = pci_register_driver(&igb_driver);
702 module_init(igb_init_module);
705 * igb_exit_module - Driver Exit Cleanup Routine
707 * igb_exit_module is called just before the driver is removed
710 static void __exit igb_exit_module(void)
712 #ifdef CONFIG_IGB_DCA
713 dca_unregister_notify(&dca_notifier);
715 pci_unregister_driver(&igb_driver);
718 module_exit(igb_exit_module);
720 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
722 * igb_cache_ring_register - Descriptor ring to register mapping
723 * @adapter: board private structure to initialize
725 * Once we know the feature-set enabled for the device, we'll cache
726 * the register offset the descriptor ring is assigned to.
728 static void igb_cache_ring_register(struct igb_adapter *adapter)
731 u32 rbase_offset = adapter->vfs_allocated_count;
733 switch (adapter->hw.mac.type) {
735 /* The queues are allocated for virtualization such that VF 0
736 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
737 * In order to avoid collision we start at the first free queue
738 * and continue consuming queues in the same sequence
740 if (adapter->vfs_allocated_count) {
741 for (; i < adapter->rss_queues; i++)
742 adapter->rx_ring[i]->reg_idx = rbase_offset +
754 for (; i < adapter->num_rx_queues; i++)
755 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
756 for (; j < adapter->num_tx_queues; j++)
757 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
762 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
764 struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
765 u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
768 if (E1000_REMOVED(hw_addr))
771 value = readl(&hw_addr[reg]);
773 /* reads should not return all F's */
774 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
775 struct net_device *netdev = igb->netdev;
777 netif_device_detach(netdev);
778 netdev_err(netdev, "PCIe link lost, device now detached\n");
785 * igb_write_ivar - configure ivar for given MSI-X vector
786 * @hw: pointer to the HW structure
787 * @msix_vector: vector number we are allocating to a given ring
788 * @index: row index of IVAR register to write within IVAR table
789 * @offset: column offset of in IVAR, should be multiple of 8
791 * This function is intended to handle the writing of the IVAR register
792 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
793 * each containing an cause allocation for an Rx and Tx ring, and a
794 * variable number of rows depending on the number of queues supported.
796 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
797 int index, int offset)
799 u32 ivar = array_rd32(E1000_IVAR0, index);
801 /* clear any bits that are currently set */
802 ivar &= ~((u32)0xFF << offset);
804 /* write vector and valid bit */
805 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
807 array_wr32(E1000_IVAR0, index, ivar);
810 #define IGB_N0_QUEUE -1
811 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
813 struct igb_adapter *adapter = q_vector->adapter;
814 struct e1000_hw *hw = &adapter->hw;
815 int rx_queue = IGB_N0_QUEUE;
816 int tx_queue = IGB_N0_QUEUE;
819 if (q_vector->rx.ring)
820 rx_queue = q_vector->rx.ring->reg_idx;
821 if (q_vector->tx.ring)
822 tx_queue = q_vector->tx.ring->reg_idx;
824 switch (hw->mac.type) {
826 /* The 82575 assigns vectors using a bitmask, which matches the
827 * bitmask for the EICR/EIMS/EIMC registers. To assign one
828 * or more queues to a vector, we write the appropriate bits
829 * into the MSIXBM register for that vector.
831 if (rx_queue > IGB_N0_QUEUE)
832 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
833 if (tx_queue > IGB_N0_QUEUE)
834 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
835 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
836 msixbm |= E1000_EIMS_OTHER;
837 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
838 q_vector->eims_value = msixbm;
841 /* 82576 uses a table that essentially consists of 2 columns
842 * with 8 rows. The ordering is column-major so we use the
843 * lower 3 bits as the row index, and the 4th bit as the
846 if (rx_queue > IGB_N0_QUEUE)
847 igb_write_ivar(hw, msix_vector,
849 (rx_queue & 0x8) << 1);
850 if (tx_queue > IGB_N0_QUEUE)
851 igb_write_ivar(hw, msix_vector,
853 ((tx_queue & 0x8) << 1) + 8);
854 q_vector->eims_value = BIT(msix_vector);
861 /* On 82580 and newer adapters the scheme is similar to 82576
862 * however instead of ordering column-major we have things
863 * ordered row-major. So we traverse the table by using
864 * bit 0 as the column offset, and the remaining bits as the
867 if (rx_queue > IGB_N0_QUEUE)
868 igb_write_ivar(hw, msix_vector,
870 (rx_queue & 0x1) << 4);
871 if (tx_queue > IGB_N0_QUEUE)
872 igb_write_ivar(hw, msix_vector,
874 ((tx_queue & 0x1) << 4) + 8);
875 q_vector->eims_value = BIT(msix_vector);
882 /* add q_vector eims value to global eims_enable_mask */
883 adapter->eims_enable_mask |= q_vector->eims_value;
885 /* configure q_vector to set itr on first interrupt */
886 q_vector->set_itr = 1;
890 * igb_configure_msix - Configure MSI-X hardware
891 * @adapter: board private structure to initialize
893 * igb_configure_msix sets up the hardware to properly
894 * generate MSI-X interrupts.
896 static void igb_configure_msix(struct igb_adapter *adapter)
900 struct e1000_hw *hw = &adapter->hw;
902 adapter->eims_enable_mask = 0;
904 /* set vector for other causes, i.e. link changes */
905 switch (hw->mac.type) {
907 tmp = rd32(E1000_CTRL_EXT);
908 /* enable MSI-X PBA support*/
909 tmp |= E1000_CTRL_EXT_PBA_CLR;
911 /* Auto-Mask interrupts upon ICR read. */
912 tmp |= E1000_CTRL_EXT_EIAME;
913 tmp |= E1000_CTRL_EXT_IRCA;
915 wr32(E1000_CTRL_EXT, tmp);
917 /* enable msix_other interrupt */
918 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
919 adapter->eims_other = E1000_EIMS_OTHER;
929 /* Turn on MSI-X capability first, or our settings
930 * won't stick. And it will take days to debug.
932 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
933 E1000_GPIE_PBA | E1000_GPIE_EIAME |
936 /* enable msix_other interrupt */
937 adapter->eims_other = BIT(vector);
938 tmp = (vector++ | E1000_IVAR_VALID) << 8;
940 wr32(E1000_IVAR_MISC, tmp);
943 /* do nothing, since nothing else supports MSI-X */
945 } /* switch (hw->mac.type) */
947 adapter->eims_enable_mask |= adapter->eims_other;
949 for (i = 0; i < adapter->num_q_vectors; i++)
950 igb_assign_vector(adapter->q_vector[i], vector++);
956 * igb_request_msix - Initialize MSI-X interrupts
957 * @adapter: board private structure to initialize
959 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
962 static int igb_request_msix(struct igb_adapter *adapter)
964 struct net_device *netdev = adapter->netdev;
965 int i, err = 0, vector = 0, free_vector = 0;
967 err = request_irq(adapter->msix_entries[vector].vector,
968 igb_msix_other, 0, netdev->name, adapter);
972 for (i = 0; i < adapter->num_q_vectors; i++) {
973 struct igb_q_vector *q_vector = adapter->q_vector[i];
977 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
979 if (q_vector->rx.ring && q_vector->tx.ring)
980 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
981 q_vector->rx.ring->queue_index);
982 else if (q_vector->tx.ring)
983 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
984 q_vector->tx.ring->queue_index);
985 else if (q_vector->rx.ring)
986 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
987 q_vector->rx.ring->queue_index);
989 sprintf(q_vector->name, "%s-unused", netdev->name);
991 err = request_irq(adapter->msix_entries[vector].vector,
992 igb_msix_ring, 0, q_vector->name,
998 igb_configure_msix(adapter);
1002 /* free already assigned IRQs */
1003 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
1006 for (i = 0; i < vector; i++) {
1007 free_irq(adapter->msix_entries[free_vector++].vector,
1008 adapter->q_vector[i]);
1015 * igb_free_q_vector - Free memory allocated for specific interrupt vector
1016 * @adapter: board private structure to initialize
1017 * @v_idx: Index of vector to be freed
1019 * This function frees the memory allocated to the q_vector.
1021 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1023 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1025 adapter->q_vector[v_idx] = NULL;
1027 /* igb_get_stats64() might access the rings on this vector,
1028 * we must wait a grace period before freeing it.
1031 kfree_rcu(q_vector, rcu);
1035 * igb_reset_q_vector - Reset config for interrupt vector
1036 * @adapter: board private structure to initialize
1037 * @v_idx: Index of vector to be reset
1039 * If NAPI is enabled it will delete any references to the
1040 * NAPI struct. This is preparation for igb_free_q_vector.
1042 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1044 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1046 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1047 * allocated. So, q_vector is NULL so we should stop here.
1052 if (q_vector->tx.ring)
1053 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1055 if (q_vector->rx.ring)
1056 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1058 netif_napi_del(&q_vector->napi);
1062 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1064 int v_idx = adapter->num_q_vectors;
1066 if (adapter->flags & IGB_FLAG_HAS_MSIX)
1067 pci_disable_msix(adapter->pdev);
1068 else if (adapter->flags & IGB_FLAG_HAS_MSI)
1069 pci_disable_msi(adapter->pdev);
1072 igb_reset_q_vector(adapter, v_idx);
1076 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1077 * @adapter: board private structure to initialize
1079 * This function frees the memory allocated to the q_vectors. In addition if
1080 * NAPI is enabled it will delete any references to the NAPI struct prior
1081 * to freeing the q_vector.
1083 static void igb_free_q_vectors(struct igb_adapter *adapter)
1085 int v_idx = adapter->num_q_vectors;
1087 adapter->num_tx_queues = 0;
1088 adapter->num_rx_queues = 0;
1089 adapter->num_q_vectors = 0;
1092 igb_reset_q_vector(adapter, v_idx);
1093 igb_free_q_vector(adapter, v_idx);
1098 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1099 * @adapter: board private structure to initialize
1101 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1102 * MSI-X interrupts allocated.
1104 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1106 igb_free_q_vectors(adapter);
1107 igb_reset_interrupt_capability(adapter);
1111 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1112 * @adapter: board private structure to initialize
1113 * @msix: boolean value of MSIX capability
1115 * Attempt to configure interrupts using the best available
1116 * capabilities of the hardware and kernel.
1118 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1125 adapter->flags |= IGB_FLAG_HAS_MSIX;
1127 /* Number of supported queues. */
1128 adapter->num_rx_queues = adapter->rss_queues;
1129 if (adapter->vfs_allocated_count)
1130 adapter->num_tx_queues = 1;
1132 adapter->num_tx_queues = adapter->rss_queues;
1134 /* start with one vector for every Rx queue */
1135 numvecs = adapter->num_rx_queues;
1137 /* if Tx handler is separate add 1 for every Tx queue */
1138 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1139 numvecs += adapter->num_tx_queues;
1141 /* store the number of vectors reserved for queues */
1142 adapter->num_q_vectors = numvecs;
1144 /* add 1 vector for link status interrupts */
1146 for (i = 0; i < numvecs; i++)
1147 adapter->msix_entries[i].entry = i;
1149 err = pci_enable_msix_range(adapter->pdev,
1150 adapter->msix_entries,
1156 igb_reset_interrupt_capability(adapter);
1158 /* If we can't do MSI-X, try MSI */
1160 adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1161 #ifdef CONFIG_PCI_IOV
1162 /* disable SR-IOV for non MSI-X configurations */
1163 if (adapter->vf_data) {
1164 struct e1000_hw *hw = &adapter->hw;
1165 /* disable iov and allow time for transactions to clear */
1166 pci_disable_sriov(adapter->pdev);
1169 kfree(adapter->vf_mac_list);
1170 adapter->vf_mac_list = NULL;
1171 kfree(adapter->vf_data);
1172 adapter->vf_data = NULL;
1173 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1176 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1179 adapter->vfs_allocated_count = 0;
1180 adapter->rss_queues = 1;
1181 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1182 adapter->num_rx_queues = 1;
1183 adapter->num_tx_queues = 1;
1184 adapter->num_q_vectors = 1;
1185 if (!pci_enable_msi(adapter->pdev))
1186 adapter->flags |= IGB_FLAG_HAS_MSI;
1189 static void igb_add_ring(struct igb_ring *ring,
1190 struct igb_ring_container *head)
1197 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1198 * @adapter: board private structure to initialize
1199 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1200 * @v_idx: index of vector in adapter struct
1201 * @txr_count: total number of Tx rings to allocate
1202 * @txr_idx: index of first Tx ring to allocate
1203 * @rxr_count: total number of Rx rings to allocate
1204 * @rxr_idx: index of first Rx ring to allocate
1206 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1208 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1209 int v_count, int v_idx,
1210 int txr_count, int txr_idx,
1211 int rxr_count, int rxr_idx)
1213 struct igb_q_vector *q_vector;
1214 struct igb_ring *ring;
1215 int ring_count, size;
1217 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1218 if (txr_count > 1 || rxr_count > 1)
1221 ring_count = txr_count + rxr_count;
1222 size = sizeof(struct igb_q_vector) +
1223 (sizeof(struct igb_ring) * ring_count);
1225 /* allocate q_vector and rings */
1226 q_vector = adapter->q_vector[v_idx];
1228 q_vector = kzalloc(size, GFP_KERNEL);
1229 } else if (size > ksize(q_vector)) {
1230 kfree_rcu(q_vector, rcu);
1231 q_vector = kzalloc(size, GFP_KERNEL);
1233 memset(q_vector, 0, size);
1238 /* initialize NAPI */
1239 netif_napi_add(adapter->netdev, &q_vector->napi,
1242 /* tie q_vector and adapter together */
1243 adapter->q_vector[v_idx] = q_vector;
1244 q_vector->adapter = adapter;
1246 /* initialize work limits */
1247 q_vector->tx.work_limit = adapter->tx_work_limit;
1249 /* initialize ITR configuration */
1250 q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1251 q_vector->itr_val = IGB_START_ITR;
1253 /* initialize pointer to rings */
1254 ring = q_vector->ring;
1258 /* rx or rx/tx vector */
1259 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1260 q_vector->itr_val = adapter->rx_itr_setting;
1262 /* tx only vector */
1263 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1264 q_vector->itr_val = adapter->tx_itr_setting;
1268 /* assign generic ring traits */
1269 ring->dev = &adapter->pdev->dev;
1270 ring->netdev = adapter->netdev;
1272 /* configure backlink on ring */
1273 ring->q_vector = q_vector;
1275 /* update q_vector Tx values */
1276 igb_add_ring(ring, &q_vector->tx);
1278 /* For 82575, context index must be unique per ring. */
1279 if (adapter->hw.mac.type == e1000_82575)
1280 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1282 /* apply Tx specific ring traits */
1283 ring->count = adapter->tx_ring_count;
1284 ring->queue_index = txr_idx;
1286 ring->cbs_enable = false;
1287 ring->idleslope = 0;
1288 ring->sendslope = 0;
1292 u64_stats_init(&ring->tx_syncp);
1293 u64_stats_init(&ring->tx_syncp2);
1295 /* assign ring to adapter */
1296 adapter->tx_ring[txr_idx] = ring;
1298 /* push pointer to next ring */
1303 /* assign generic ring traits */
1304 ring->dev = &adapter->pdev->dev;
1305 ring->netdev = adapter->netdev;
1307 /* configure backlink on ring */
1308 ring->q_vector = q_vector;
1310 /* update q_vector Rx values */
1311 igb_add_ring(ring, &q_vector->rx);
1313 /* set flag indicating ring supports SCTP checksum offload */
1314 if (adapter->hw.mac.type >= e1000_82576)
1315 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1317 /* On i350, i354, i210, and i211, loopback VLAN packets
1318 * have the tag byte-swapped.
1320 if (adapter->hw.mac.type >= e1000_i350)
1321 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1323 /* apply Rx specific ring traits */
1324 ring->count = adapter->rx_ring_count;
1325 ring->queue_index = rxr_idx;
1327 u64_stats_init(&ring->rx_syncp);
1329 /* assign ring to adapter */
1330 adapter->rx_ring[rxr_idx] = ring;
1338 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1339 * @adapter: board private structure to initialize
1341 * We allocate one q_vector per queue interrupt. If allocation fails we
1344 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1346 int q_vectors = adapter->num_q_vectors;
1347 int rxr_remaining = adapter->num_rx_queues;
1348 int txr_remaining = adapter->num_tx_queues;
1349 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1352 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1353 for (; rxr_remaining; v_idx++) {
1354 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1360 /* update counts and index */
1366 for (; v_idx < q_vectors; v_idx++) {
1367 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1368 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1370 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1371 tqpv, txr_idx, rqpv, rxr_idx);
1376 /* update counts and index */
1377 rxr_remaining -= rqpv;
1378 txr_remaining -= tqpv;
1386 adapter->num_tx_queues = 0;
1387 adapter->num_rx_queues = 0;
1388 adapter->num_q_vectors = 0;
1391 igb_free_q_vector(adapter, v_idx);
1397 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1398 * @adapter: board private structure to initialize
1399 * @msix: boolean value of MSIX capability
1401 * This function initializes the interrupts and allocates all of the queues.
1403 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1405 struct pci_dev *pdev = adapter->pdev;
1408 igb_set_interrupt_capability(adapter, msix);
1410 err = igb_alloc_q_vectors(adapter);
1412 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1413 goto err_alloc_q_vectors;
1416 igb_cache_ring_register(adapter);
1420 err_alloc_q_vectors:
1421 igb_reset_interrupt_capability(adapter);
1426 * igb_request_irq - initialize interrupts
1427 * @adapter: board private structure to initialize
1429 * Attempts to configure interrupts using the best available
1430 * capabilities of the hardware and kernel.
1432 static int igb_request_irq(struct igb_adapter *adapter)
1434 struct net_device *netdev = adapter->netdev;
1435 struct pci_dev *pdev = adapter->pdev;
1438 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1439 err = igb_request_msix(adapter);
1442 /* fall back to MSI */
1443 igb_free_all_tx_resources(adapter);
1444 igb_free_all_rx_resources(adapter);
1446 igb_clear_interrupt_scheme(adapter);
1447 err = igb_init_interrupt_scheme(adapter, false);
1451 igb_setup_all_tx_resources(adapter);
1452 igb_setup_all_rx_resources(adapter);
1453 igb_configure(adapter);
1456 igb_assign_vector(adapter->q_vector[0], 0);
1458 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1459 err = request_irq(pdev->irq, igb_intr_msi, 0,
1460 netdev->name, adapter);
1464 /* fall back to legacy interrupts */
1465 igb_reset_interrupt_capability(adapter);
1466 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1469 err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1470 netdev->name, adapter);
1473 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1480 static void igb_free_irq(struct igb_adapter *adapter)
1482 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1485 free_irq(adapter->msix_entries[vector++].vector, adapter);
1487 for (i = 0; i < adapter->num_q_vectors; i++)
1488 free_irq(adapter->msix_entries[vector++].vector,
1489 adapter->q_vector[i]);
1491 free_irq(adapter->pdev->irq, adapter);
1496 * igb_irq_disable - Mask off interrupt generation on the NIC
1497 * @adapter: board private structure
1499 static void igb_irq_disable(struct igb_adapter *adapter)
1501 struct e1000_hw *hw = &adapter->hw;
1503 /* we need to be careful when disabling interrupts. The VFs are also
1504 * mapped into these registers and so clearing the bits can cause
1505 * issues on the VF drivers so we only need to clear what we set
1507 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1508 u32 regval = rd32(E1000_EIAM);
1510 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1511 wr32(E1000_EIMC, adapter->eims_enable_mask);
1512 regval = rd32(E1000_EIAC);
1513 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1517 wr32(E1000_IMC, ~0);
1519 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1522 for (i = 0; i < adapter->num_q_vectors; i++)
1523 synchronize_irq(adapter->msix_entries[i].vector);
1525 synchronize_irq(adapter->pdev->irq);
1530 * igb_irq_enable - Enable default interrupt generation settings
1531 * @adapter: board private structure
1533 static void igb_irq_enable(struct igb_adapter *adapter)
1535 struct e1000_hw *hw = &adapter->hw;
1537 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1538 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1539 u32 regval = rd32(E1000_EIAC);
1541 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1542 regval = rd32(E1000_EIAM);
1543 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1544 wr32(E1000_EIMS, adapter->eims_enable_mask);
1545 if (adapter->vfs_allocated_count) {
1546 wr32(E1000_MBVFIMR, 0xFF);
1547 ims |= E1000_IMS_VMMB;
1549 wr32(E1000_IMS, ims);
1551 wr32(E1000_IMS, IMS_ENABLE_MASK |
1553 wr32(E1000_IAM, IMS_ENABLE_MASK |
1558 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1560 struct e1000_hw *hw = &adapter->hw;
1561 u16 pf_id = adapter->vfs_allocated_count;
1562 u16 vid = adapter->hw.mng_cookie.vlan_id;
1563 u16 old_vid = adapter->mng_vlan_id;
1565 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1566 /* add VID to filter table */
1567 igb_vfta_set(hw, vid, pf_id, true, true);
1568 adapter->mng_vlan_id = vid;
1570 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1573 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1575 !test_bit(old_vid, adapter->active_vlans)) {
1576 /* remove VID from filter table */
1577 igb_vfta_set(hw, vid, pf_id, false, true);
1582 * igb_release_hw_control - release control of the h/w to f/w
1583 * @adapter: address of board private structure
1585 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1586 * For ASF and Pass Through versions of f/w this means that the
1587 * driver is no longer loaded.
1589 static void igb_release_hw_control(struct igb_adapter *adapter)
1591 struct e1000_hw *hw = &adapter->hw;
1594 /* Let firmware take over control of h/w */
1595 ctrl_ext = rd32(E1000_CTRL_EXT);
1596 wr32(E1000_CTRL_EXT,
1597 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1601 * igb_get_hw_control - get control of the h/w from f/w
1602 * @adapter: address of board private structure
1604 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1605 * For ASF and Pass Through versions of f/w this means that
1606 * the driver is loaded.
1608 static void igb_get_hw_control(struct igb_adapter *adapter)
1610 struct e1000_hw *hw = &adapter->hw;
1613 /* Let firmware know the driver has taken over */
1614 ctrl_ext = rd32(E1000_CTRL_EXT);
1615 wr32(E1000_CTRL_EXT,
1616 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1619 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1621 struct net_device *netdev = adapter->netdev;
1622 struct e1000_hw *hw = &adapter->hw;
1624 WARN_ON(hw->mac.type != e1000_i210);
1627 adapter->flags |= IGB_FLAG_FQTSS;
1629 adapter->flags &= ~IGB_FLAG_FQTSS;
1631 if (netif_running(netdev))
1632 schedule_work(&adapter->reset_task);
1635 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1637 return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1640 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1641 enum tx_queue_prio prio)
1645 WARN_ON(hw->mac.type != e1000_i210);
1646 WARN_ON(queue < 0 || queue > 4);
1648 val = rd32(E1000_I210_TXDCTL(queue));
1650 if (prio == TX_QUEUE_PRIO_HIGH)
1651 val |= E1000_TXDCTL_PRIORITY;
1653 val &= ~E1000_TXDCTL_PRIORITY;
1655 wr32(E1000_I210_TXDCTL(queue), val);
1658 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1662 WARN_ON(hw->mac.type != e1000_i210);
1663 WARN_ON(queue < 0 || queue > 1);
1665 val = rd32(E1000_I210_TQAVCC(queue));
1667 if (mode == QUEUE_MODE_STREAM_RESERVATION)
1668 val |= E1000_TQAVCC_QUEUEMODE;
1670 val &= ~E1000_TQAVCC_QUEUEMODE;
1672 wr32(E1000_I210_TQAVCC(queue), val);
1676 * igb_configure_cbs - Configure Credit-Based Shaper (CBS)
1677 * @adapter: pointer to adapter struct
1678 * @queue: queue number
1679 * @enable: true = enable CBS, false = disable CBS
1680 * @idleslope: idleSlope in kbps
1681 * @sendslope: sendSlope in kbps
1682 * @hicredit: hiCredit in bytes
1683 * @locredit: loCredit in bytes
1685 * Configure CBS for a given hardware queue. When disabling, idleslope,
1686 * sendslope, hicredit, locredit arguments are ignored. Returns 0 if
1687 * success. Negative otherwise.
1689 static void igb_configure_cbs(struct igb_adapter *adapter, int queue,
1690 bool enable, int idleslope, int sendslope,
1691 int hicredit, int locredit)
1693 struct net_device *netdev = adapter->netdev;
1694 struct e1000_hw *hw = &adapter->hw;
1698 WARN_ON(hw->mac.type != e1000_i210);
1699 WARN_ON(queue < 0 || queue > 1);
1702 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1703 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1705 /* According to i210 datasheet section 7.2.7.7, we should set
1706 * the 'idleSlope' field from TQAVCC register following the
1709 * For 100 Mbps link speed:
1711 * value = BW * 0x7735 * 0.2 (E1)
1713 * For 1000Mbps link speed:
1715 * value = BW * 0x7735 * 2 (E2)
1717 * E1 and E2 can be merged into one equation as shown below.
1718 * Note that 'link-speed' is in Mbps.
1720 * value = BW * 0x7735 * 2 * link-speed
1721 * -------------- (E3)
1724 * 'BW' is the percentage bandwidth out of full link speed
1725 * which can be found with the following equation. Note that
1726 * idleSlope here is the parameter from this function which
1730 * ----------------- (E4)
1733 * That said, we can come up with a generic equation to
1734 * calculate the value we should set it TQAVCC register by
1735 * replacing 'BW' in E3 by E4. The resulting equation is:
1737 * value = idleSlope * 0x7735 * 2 * link-speed
1738 * ----------------- -------------- (E5)
1739 * link-speed * 1000 1000
1741 * 'link-speed' is present in both sides of the fraction so
1742 * it is canceled out. The final equation is the following:
1744 * value = idleSlope * 61034
1745 * ----------------- (E6)
1748 value = DIV_ROUND_UP_ULL(idleslope * 61034ULL, 1000000);
1750 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1751 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1753 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1755 wr32(E1000_I210_TQAVHC(queue), 0x80000000 + hicredit * 0x7735);
1757 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1758 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1760 /* Set idleSlope to zero. */
1761 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1762 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1763 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1765 /* Set hiCredit to zero. */
1766 wr32(E1000_I210_TQAVHC(queue), 0);
1769 /* XXX: In i210 controller the sendSlope and loCredit parameters from
1770 * CBS are not configurable by software so we don't do any 'controller
1771 * configuration' in respect to these parameters.
1774 netdev_dbg(netdev, "CBS %s: queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1775 (enable) ? "enabled" : "disabled", queue,
1776 idleslope, sendslope, hicredit, locredit);
1779 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1780 bool enable, int idleslope, int sendslope,
1781 int hicredit, int locredit)
1783 struct igb_ring *ring;
1785 if (queue < 0 || queue > adapter->num_tx_queues)
1788 ring = adapter->tx_ring[queue];
1790 ring->cbs_enable = enable;
1791 ring->idleslope = idleslope;
1792 ring->sendslope = sendslope;
1793 ring->hicredit = hicredit;
1794 ring->locredit = locredit;
1799 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1801 struct igb_ring *ring;
1804 for (i = 0; i < adapter->num_tx_queues; i++) {
1805 ring = adapter->tx_ring[i];
1807 if (ring->cbs_enable)
1814 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1816 struct net_device *netdev = adapter->netdev;
1817 struct e1000_hw *hw = &adapter->hw;
1820 /* Only i210 controller supports changing the transmission mode. */
1821 if (hw->mac.type != e1000_i210)
1824 if (is_fqtss_enabled(adapter)) {
1827 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1828 * set data fetch arbitration to 'round robin' and set data
1829 * transfer arbitration to 'credit shaper algorithm.
1831 val = rd32(E1000_I210_TQAVCTRL);
1832 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_DATATRANARB;
1833 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1834 wr32(E1000_I210_TQAVCTRL, val);
1836 /* Configure Tx and Rx packet buffers sizes as described in
1837 * i210 datasheet section 7.2.7.7.
1839 val = rd32(E1000_TXPBS);
1840 val &= ~I210_TXPBSIZE_MASK;
1841 val |= I210_TXPBSIZE_PB0_8KB | I210_TXPBSIZE_PB1_8KB |
1842 I210_TXPBSIZE_PB2_4KB | I210_TXPBSIZE_PB3_4KB;
1843 wr32(E1000_TXPBS, val);
1845 val = rd32(E1000_RXPBS);
1846 val &= ~I210_RXPBSIZE_MASK;
1847 val |= I210_RXPBSIZE_PB_32KB;
1848 wr32(E1000_RXPBS, val);
1850 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1851 * register should not exceed the buffer size programmed in
1852 * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1853 * so according to the datasheet we should set MAX_TPKT_SIZE to
1856 * However, when we do so, no frame from queue 2 and 3 are
1857 * transmitted. It seems the MAX_TPKT_SIZE should not be great
1858 * or _equal_ to the buffer size programmed in TXPBS. For this
1859 * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1861 val = (4096 - 1) / 64;
1862 wr32(E1000_I210_DTXMXPKTSZ, val);
1864 /* Since FQTSS mode is enabled, apply any CBS configuration
1865 * previously set. If no previous CBS configuration has been
1866 * done, then the initial configuration is applied, which means
1869 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1870 adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1872 for (i = 0; i < max_queue; i++) {
1873 struct igb_ring *ring = adapter->tx_ring[i];
1875 igb_configure_cbs(adapter, i, ring->cbs_enable,
1876 ring->idleslope, ring->sendslope,
1877 ring->hicredit, ring->locredit);
1880 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1881 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1882 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1884 val = rd32(E1000_I210_TQAVCTRL);
1885 /* According to Section 8.12.21, the other flags we've set when
1886 * enabling FQTSS are not relevant when disabling FQTSS so we
1887 * don't set they here.
1889 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1890 wr32(E1000_I210_TQAVCTRL, val);
1893 netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1894 "enabled" : "disabled");
1898 * igb_configure - configure the hardware for RX and TX
1899 * @adapter: private board structure
1901 static void igb_configure(struct igb_adapter *adapter)
1903 struct net_device *netdev = adapter->netdev;
1906 igb_get_hw_control(adapter);
1907 igb_set_rx_mode(netdev);
1908 igb_setup_tx_mode(adapter);
1910 igb_restore_vlan(adapter);
1912 igb_setup_tctl(adapter);
1913 igb_setup_mrqc(adapter);
1914 igb_setup_rctl(adapter);
1916 igb_nfc_filter_restore(adapter);
1917 igb_configure_tx(adapter);
1918 igb_configure_rx(adapter);
1920 igb_rx_fifo_flush_82575(&adapter->hw);
1922 /* call igb_desc_unused which always leaves
1923 * at least 1 descriptor unused to make sure
1924 * next_to_use != next_to_clean
1926 for (i = 0; i < adapter->num_rx_queues; i++) {
1927 struct igb_ring *ring = adapter->rx_ring[i];
1928 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1933 * igb_power_up_link - Power up the phy/serdes link
1934 * @adapter: address of board private structure
1936 void igb_power_up_link(struct igb_adapter *adapter)
1938 igb_reset_phy(&adapter->hw);
1940 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1941 igb_power_up_phy_copper(&adapter->hw);
1943 igb_power_up_serdes_link_82575(&adapter->hw);
1945 igb_setup_link(&adapter->hw);
1949 * igb_power_down_link - Power down the phy/serdes link
1950 * @adapter: address of board private structure
1952 static void igb_power_down_link(struct igb_adapter *adapter)
1954 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1955 igb_power_down_phy_copper_82575(&adapter->hw);
1957 igb_shutdown_serdes_link_82575(&adapter->hw);
1961 * Detect and switch function for Media Auto Sense
1962 * @adapter: address of the board private structure
1964 static void igb_check_swap_media(struct igb_adapter *adapter)
1966 struct e1000_hw *hw = &adapter->hw;
1967 u32 ctrl_ext, connsw;
1968 bool swap_now = false;
1970 ctrl_ext = rd32(E1000_CTRL_EXT);
1971 connsw = rd32(E1000_CONNSW);
1973 /* need to live swap if current media is copper and we have fiber/serdes
1977 if ((hw->phy.media_type == e1000_media_type_copper) &&
1978 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1980 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1981 /* copper signal takes time to appear */
1982 if (adapter->copper_tries < 4) {
1983 adapter->copper_tries++;
1984 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1985 wr32(E1000_CONNSW, connsw);
1988 adapter->copper_tries = 0;
1989 if ((connsw & E1000_CONNSW_PHYSD) &&
1990 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1992 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1993 wr32(E1000_CONNSW, connsw);
2001 switch (hw->phy.media_type) {
2002 case e1000_media_type_copper:
2003 netdev_info(adapter->netdev,
2004 "MAS: changing media to fiber/serdes\n");
2006 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2007 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2008 adapter->copper_tries = 0;
2010 case e1000_media_type_internal_serdes:
2011 case e1000_media_type_fiber:
2012 netdev_info(adapter->netdev,
2013 "MAS: changing media to copper\n");
2015 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2016 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2019 /* shouldn't get here during regular operation */
2020 netdev_err(adapter->netdev,
2021 "AMS: Invalid media type found, returning\n");
2024 wr32(E1000_CTRL_EXT, ctrl_ext);
2028 * igb_up - Open the interface and prepare it to handle traffic
2029 * @adapter: board private structure
2031 int igb_up(struct igb_adapter *adapter)
2033 struct e1000_hw *hw = &adapter->hw;
2036 /* hardware has been reset, we need to reload some things */
2037 igb_configure(adapter);
2039 clear_bit(__IGB_DOWN, &adapter->state);
2041 for (i = 0; i < adapter->num_q_vectors; i++)
2042 napi_enable(&(adapter->q_vector[i]->napi));
2044 if (adapter->flags & IGB_FLAG_HAS_MSIX)
2045 igb_configure_msix(adapter);
2047 igb_assign_vector(adapter->q_vector[0], 0);
2049 /* Clear any pending interrupts. */
2051 igb_irq_enable(adapter);
2053 /* notify VFs that reset has been completed */
2054 if (adapter->vfs_allocated_count) {
2055 u32 reg_data = rd32(E1000_CTRL_EXT);
2057 reg_data |= E1000_CTRL_EXT_PFRSTD;
2058 wr32(E1000_CTRL_EXT, reg_data);
2061 netif_tx_start_all_queues(adapter->netdev);
2063 /* start the watchdog. */
2064 hw->mac.get_link_status = 1;
2065 schedule_work(&adapter->watchdog_task);
2067 if ((adapter->flags & IGB_FLAG_EEE) &&
2068 (!hw->dev_spec._82575.eee_disable))
2069 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2074 void igb_down(struct igb_adapter *adapter)
2076 struct net_device *netdev = adapter->netdev;
2077 struct e1000_hw *hw = &adapter->hw;
2081 /* signal that we're down so the interrupt handler does not
2082 * reschedule our watchdog timer
2084 set_bit(__IGB_DOWN, &adapter->state);
2086 /* disable receives in the hardware */
2087 rctl = rd32(E1000_RCTL);
2088 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2089 /* flush and sleep below */
2091 igb_nfc_filter_exit(adapter);
2093 netif_carrier_off(netdev);
2094 netif_tx_stop_all_queues(netdev);
2096 /* disable transmits in the hardware */
2097 tctl = rd32(E1000_TCTL);
2098 tctl &= ~E1000_TCTL_EN;
2099 wr32(E1000_TCTL, tctl);
2100 /* flush both disables and wait for them to finish */
2102 usleep_range(10000, 11000);
2104 igb_irq_disable(adapter);
2106 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2108 for (i = 0; i < adapter->num_q_vectors; i++) {
2109 if (adapter->q_vector[i]) {
2110 napi_synchronize(&adapter->q_vector[i]->napi);
2111 napi_disable(&adapter->q_vector[i]->napi);
2115 del_timer_sync(&adapter->watchdog_timer);
2116 del_timer_sync(&adapter->phy_info_timer);
2118 /* record the stats before reset*/
2119 spin_lock(&adapter->stats64_lock);
2120 igb_update_stats(adapter);
2121 spin_unlock(&adapter->stats64_lock);
2123 adapter->link_speed = 0;
2124 adapter->link_duplex = 0;
2126 if (!pci_channel_offline(adapter->pdev))
2129 /* clear VLAN promisc flag so VFTA will be updated if necessary */
2130 adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2132 igb_clean_all_tx_rings(adapter);
2133 igb_clean_all_rx_rings(adapter);
2134 #ifdef CONFIG_IGB_DCA
2136 /* since we reset the hardware DCA settings were cleared */
2137 igb_setup_dca(adapter);
2141 void igb_reinit_locked(struct igb_adapter *adapter)
2143 WARN_ON(in_interrupt());
2144 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2145 usleep_range(1000, 2000);
2148 clear_bit(__IGB_RESETTING, &adapter->state);
2151 /** igb_enable_mas - Media Autosense re-enable after swap
2153 * @adapter: adapter struct
2155 static void igb_enable_mas(struct igb_adapter *adapter)
2157 struct e1000_hw *hw = &adapter->hw;
2158 u32 connsw = rd32(E1000_CONNSW);
2160 /* configure for SerDes media detect */
2161 if ((hw->phy.media_type == e1000_media_type_copper) &&
2162 (!(connsw & E1000_CONNSW_SERDESD))) {
2163 connsw |= E1000_CONNSW_ENRGSRC;
2164 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2165 wr32(E1000_CONNSW, connsw);
2170 void igb_reset(struct igb_adapter *adapter)
2172 struct pci_dev *pdev = adapter->pdev;
2173 struct e1000_hw *hw = &adapter->hw;
2174 struct e1000_mac_info *mac = &hw->mac;
2175 struct e1000_fc_info *fc = &hw->fc;
2178 /* Repartition Pba for greater than 9k mtu
2179 * To take effect CTRL.RST is required.
2181 switch (mac->type) {
2185 pba = rd32(E1000_RXPBS);
2186 pba = igb_rxpbs_adjust_82580(pba);
2189 pba = rd32(E1000_RXPBS);
2190 pba &= E1000_RXPBS_SIZE_MASK_82576;
2196 pba = E1000_PBA_34K;
2200 if (mac->type == e1000_82575) {
2201 u32 min_rx_space, min_tx_space, needed_tx_space;
2203 /* write Rx PBA so that hardware can report correct Tx PBA */
2204 wr32(E1000_PBA, pba);
2206 /* To maintain wire speed transmits, the Tx FIFO should be
2207 * large enough to accommodate two full transmit packets,
2208 * rounded up to the next 1KB and expressed in KB. Likewise,
2209 * the Rx FIFO should be large enough to accommodate at least
2210 * one full receive packet and is similarly rounded up and
2213 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2215 /* The Tx FIFO also stores 16 bytes of information about the Tx
2216 * but don't include Ethernet FCS because hardware appends it.
2217 * We only need to round down to the nearest 512 byte block
2218 * count since the value we care about is 2 frames, not 1.
2220 min_tx_space = adapter->max_frame_size;
2221 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2222 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2224 /* upper 16 bits has Tx packet buffer allocation size in KB */
2225 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2227 /* If current Tx allocation is less than the min Tx FIFO size,
2228 * and the min Tx FIFO size is less than the current Rx FIFO
2229 * allocation, take space away from current Rx allocation.
2231 if (needed_tx_space < pba) {
2232 pba -= needed_tx_space;
2234 /* if short on Rx space, Rx wins and must trump Tx
2237 if (pba < min_rx_space)
2241 /* adjust PBA for jumbo frames */
2242 wr32(E1000_PBA, pba);
2245 /* flow control settings
2246 * The high water mark must be low enough to fit one full frame
2247 * after transmitting the pause frame. As such we must have enough
2248 * space to allow for us to complete our current transmit and then
2249 * receive the frame that is in progress from the link partner.
2251 * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2253 hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2255 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
2256 fc->low_water = fc->high_water - 16;
2257 fc->pause_time = 0xFFFF;
2259 fc->current_mode = fc->requested_mode;
2261 /* disable receive for all VFs and wait one second */
2262 if (adapter->vfs_allocated_count) {
2265 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2266 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2268 /* ping all the active vfs to let them know we are going down */
2269 igb_ping_all_vfs(adapter);
2271 /* disable transmits and receives */
2272 wr32(E1000_VFRE, 0);
2273 wr32(E1000_VFTE, 0);
2276 /* Allow time for pending master requests to run */
2277 hw->mac.ops.reset_hw(hw);
2280 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2281 /* need to resetup here after media swap */
2282 adapter->ei.get_invariants(hw);
2283 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2285 if ((mac->type == e1000_82575) &&
2286 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2287 igb_enable_mas(adapter);
2289 if (hw->mac.ops.init_hw(hw))
2290 dev_err(&pdev->dev, "Hardware Error\n");
2292 /* RAR registers were cleared during init_hw, clear mac table */
2293 igb_flush_mac_table(adapter);
2294 __dev_uc_unsync(adapter->netdev, NULL);
2296 /* Recover default RAR entry */
2297 igb_set_default_mac_filter(adapter);
2299 /* Flow control settings reset on hardware reset, so guarantee flow
2300 * control is off when forcing speed.
2302 if (!hw->mac.autoneg)
2303 igb_force_mac_fc(hw);
2305 igb_init_dmac(adapter, pba);
2306 #ifdef CONFIG_IGB_HWMON
2307 /* Re-initialize the thermal sensor on i350 devices. */
2308 if (!test_bit(__IGB_DOWN, &adapter->state)) {
2309 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2310 /* If present, re-initialize the external thermal sensor
2314 mac->ops.init_thermal_sensor_thresh(hw);
2318 /* Re-establish EEE setting */
2319 if (hw->phy.media_type == e1000_media_type_copper) {
2320 switch (mac->type) {
2324 igb_set_eee_i350(hw, true, true);
2327 igb_set_eee_i354(hw, true, true);
2333 if (!netif_running(adapter->netdev))
2334 igb_power_down_link(adapter);
2336 igb_update_mng_vlan(adapter);
2338 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2339 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2341 /* Re-enable PTP, where applicable. */
2342 if (adapter->ptp_flags & IGB_PTP_ENABLED)
2343 igb_ptp_reset(adapter);
2345 igb_get_phy_info(hw);
2348 static netdev_features_t igb_fix_features(struct net_device *netdev,
2349 netdev_features_t features)
2351 /* Since there is no support for separate Rx/Tx vlan accel
2352 * enable/disable make sure Tx flag is always in same state as Rx.
2354 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2355 features |= NETIF_F_HW_VLAN_CTAG_TX;
2357 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2362 static int igb_set_features(struct net_device *netdev,
2363 netdev_features_t features)
2365 netdev_features_t changed = netdev->features ^ features;
2366 struct igb_adapter *adapter = netdev_priv(netdev);
2368 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2369 igb_vlan_mode(netdev, features);
2371 if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2374 if (!(features & NETIF_F_NTUPLE)) {
2375 struct hlist_node *node2;
2376 struct igb_nfc_filter *rule;
2378 spin_lock(&adapter->nfc_lock);
2379 hlist_for_each_entry_safe(rule, node2,
2380 &adapter->nfc_filter_list, nfc_node) {
2381 igb_erase_filter(adapter, rule);
2382 hlist_del(&rule->nfc_node);
2385 spin_unlock(&adapter->nfc_lock);
2386 adapter->nfc_filter_count = 0;
2389 netdev->features = features;
2391 if (netif_running(netdev))
2392 igb_reinit_locked(adapter);
2399 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2400 struct net_device *dev,
2401 const unsigned char *addr, u16 vid,
2404 /* guarantee we can provide a unique filter for the unicast address */
2405 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2406 struct igb_adapter *adapter = netdev_priv(dev);
2407 int vfn = adapter->vfs_allocated_count;
2409 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2413 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2416 #define IGB_MAX_MAC_HDR_LEN 127
2417 #define IGB_MAX_NETWORK_HDR_LEN 511
2419 static netdev_features_t
2420 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2421 netdev_features_t features)
2423 unsigned int network_hdr_len, mac_hdr_len;
2425 /* Make certain the headers can be described by a context descriptor */
2426 mac_hdr_len = skb_network_header(skb) - skb->data;
2427 if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2428 return features & ~(NETIF_F_HW_CSUM |
2430 NETIF_F_HW_VLAN_CTAG_TX |
2434 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2435 if (unlikely(network_hdr_len > IGB_MAX_NETWORK_HDR_LEN))
2436 return features & ~(NETIF_F_HW_CSUM |
2441 /* We can only support IPV4 TSO in tunnels if we can mangle the
2442 * inner IP ID field, so strip TSO if MANGLEID is not supported.
2444 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2445 features &= ~NETIF_F_TSO;
2450 static int igb_offload_cbs(struct igb_adapter *adapter,
2451 struct tc_cbs_qopt_offload *qopt)
2453 struct e1000_hw *hw = &adapter->hw;
2456 /* CBS offloading is only supported by i210 controller. */
2457 if (hw->mac.type != e1000_i210)
2460 /* CBS offloading is only supported by queue 0 and queue 1. */
2461 if (qopt->queue < 0 || qopt->queue > 1)
2464 err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2465 qopt->idleslope, qopt->sendslope,
2466 qopt->hicredit, qopt->locredit);
2470 if (is_fqtss_enabled(adapter)) {
2471 igb_configure_cbs(adapter, qopt->queue, qopt->enable,
2472 qopt->idleslope, qopt->sendslope,
2473 qopt->hicredit, qopt->locredit);
2475 if (!is_any_cbs_enabled(adapter))
2476 enable_fqtss(adapter, false);
2479 enable_fqtss(adapter, true);
2485 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2488 struct igb_adapter *adapter = netdev_priv(dev);
2491 case TC_SETUP_QDISC_CBS:
2492 return igb_offload_cbs(adapter, type_data);
2499 static const struct net_device_ops igb_netdev_ops = {
2500 .ndo_open = igb_open,
2501 .ndo_stop = igb_close,
2502 .ndo_start_xmit = igb_xmit_frame,
2503 .ndo_get_stats64 = igb_get_stats64,
2504 .ndo_set_rx_mode = igb_set_rx_mode,
2505 .ndo_set_mac_address = igb_set_mac,
2506 .ndo_change_mtu = igb_change_mtu,
2507 .ndo_do_ioctl = igb_ioctl,
2508 .ndo_tx_timeout = igb_tx_timeout,
2509 .ndo_validate_addr = eth_validate_addr,
2510 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2511 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2512 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2513 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2514 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
2515 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2516 .ndo_get_vf_config = igb_ndo_get_vf_config,
2517 #ifdef CONFIG_NET_POLL_CONTROLLER
2518 .ndo_poll_controller = igb_netpoll,
2520 .ndo_fix_features = igb_fix_features,
2521 .ndo_set_features = igb_set_features,
2522 .ndo_fdb_add = igb_ndo_fdb_add,
2523 .ndo_features_check = igb_features_check,
2524 .ndo_setup_tc = igb_setup_tc,
2528 * igb_set_fw_version - Configure version string for ethtool
2529 * @adapter: adapter struct
2531 void igb_set_fw_version(struct igb_adapter *adapter)
2533 struct e1000_hw *hw = &adapter->hw;
2534 struct e1000_fw_version fw;
2536 igb_get_fw_version(hw, &fw);
2538 switch (hw->mac.type) {
2541 if (!(igb_get_flash_presence_i210(hw))) {
2542 snprintf(adapter->fw_version,
2543 sizeof(adapter->fw_version),
2545 fw.invm_major, fw.invm_minor,
2551 /* if option is rom valid, display its version too */
2553 snprintf(adapter->fw_version,
2554 sizeof(adapter->fw_version),
2555 "%d.%d, 0x%08x, %d.%d.%d",
2556 fw.eep_major, fw.eep_minor, fw.etrack_id,
2557 fw.or_major, fw.or_build, fw.or_patch);
2559 } else if (fw.etrack_id != 0X0000) {
2560 snprintf(adapter->fw_version,
2561 sizeof(adapter->fw_version),
2563 fw.eep_major, fw.eep_minor, fw.etrack_id);
2565 snprintf(adapter->fw_version,
2566 sizeof(adapter->fw_version),
2568 fw.eep_major, fw.eep_minor, fw.eep_build);
2575 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2577 * @adapter: adapter struct
2579 static void igb_init_mas(struct igb_adapter *adapter)
2581 struct e1000_hw *hw = &adapter->hw;
2584 hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2585 switch (hw->bus.func) {
2587 if (eeprom_data & IGB_MAS_ENABLE_0) {
2588 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2589 netdev_info(adapter->netdev,
2590 "MAS: Enabling Media Autosense for port %d\n",
2595 if (eeprom_data & IGB_MAS_ENABLE_1) {
2596 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2597 netdev_info(adapter->netdev,
2598 "MAS: Enabling Media Autosense for port %d\n",
2603 if (eeprom_data & IGB_MAS_ENABLE_2) {
2604 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2605 netdev_info(adapter->netdev,
2606 "MAS: Enabling Media Autosense for port %d\n",
2611 if (eeprom_data & IGB_MAS_ENABLE_3) {
2612 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2613 netdev_info(adapter->netdev,
2614 "MAS: Enabling Media Autosense for port %d\n",
2619 /* Shouldn't get here */
2620 netdev_err(adapter->netdev,
2621 "MAS: Invalid port configuration, returning\n");
2627 * igb_init_i2c - Init I2C interface
2628 * @adapter: pointer to adapter structure
2630 static s32 igb_init_i2c(struct igb_adapter *adapter)
2634 /* I2C interface supported on i350 devices */
2635 if (adapter->hw.mac.type != e1000_i350)
2638 /* Initialize the i2c bus which is controlled by the registers.
2639 * This bus will use the i2c_algo_bit structue that implements
2640 * the protocol through toggling of the 4 bits in the register.
2642 adapter->i2c_adap.owner = THIS_MODULE;
2643 adapter->i2c_algo = igb_i2c_algo;
2644 adapter->i2c_algo.data = adapter;
2645 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2646 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2647 strlcpy(adapter->i2c_adap.name, "igb BB",
2648 sizeof(adapter->i2c_adap.name));
2649 status = i2c_bit_add_bus(&adapter->i2c_adap);
2654 * igb_probe - Device Initialization Routine
2655 * @pdev: PCI device information struct
2656 * @ent: entry in igb_pci_tbl
2658 * Returns 0 on success, negative on failure
2660 * igb_probe initializes an adapter identified by a pci_dev structure.
2661 * The OS initialization, configuring of the adapter private structure,
2662 * and a hardware reset occur.
2664 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2666 struct net_device *netdev;
2667 struct igb_adapter *adapter;
2668 struct e1000_hw *hw;
2669 u16 eeprom_data = 0;
2671 static int global_quad_port_a; /* global quad port a indication */
2672 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2673 int err, pci_using_dac;
2674 u8 part_str[E1000_PBANUM_LENGTH];
2676 /* Catch broken hardware that put the wrong VF device ID in
2677 * the PCIe SR-IOV capability.
2679 if (pdev->is_virtfn) {
2680 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2681 pci_name(pdev), pdev->vendor, pdev->device);
2685 err = pci_enable_device_mem(pdev);
2690 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2694 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2697 "No usable DMA configuration, aborting\n");
2702 err = pci_request_mem_regions(pdev, igb_driver_name);
2706 pci_enable_pcie_error_reporting(pdev);
2708 pci_set_master(pdev);
2709 pci_save_state(pdev);
2712 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2715 goto err_alloc_etherdev;
2717 SET_NETDEV_DEV(netdev, &pdev->dev);
2719 pci_set_drvdata(pdev, netdev);
2720 adapter = netdev_priv(netdev);
2721 adapter->netdev = netdev;
2722 adapter->pdev = pdev;
2725 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2728 adapter->io_addr = pci_iomap(pdev, 0, 0);
2729 if (!adapter->io_addr)
2731 /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2732 hw->hw_addr = adapter->io_addr;
2734 netdev->netdev_ops = &igb_netdev_ops;
2735 igb_set_ethtool_ops(netdev);
2736 netdev->watchdog_timeo = 5 * HZ;
2738 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2740 netdev->mem_start = pci_resource_start(pdev, 0);
2741 netdev->mem_end = pci_resource_end(pdev, 0);
2743 /* PCI config space info */
2744 hw->vendor_id = pdev->vendor;
2745 hw->device_id = pdev->device;
2746 hw->revision_id = pdev->revision;
2747 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2748 hw->subsystem_device_id = pdev->subsystem_device;
2750 /* Copy the default MAC, PHY and NVM function pointers */
2751 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2752 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2753 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2754 /* Initialize skew-specific constants */
2755 err = ei->get_invariants(hw);
2759 /* setup the private structure */
2760 err = igb_sw_init(adapter);
2764 igb_get_bus_info_pcie(hw);
2766 hw->phy.autoneg_wait_to_complete = false;
2768 /* Copper options */
2769 if (hw->phy.media_type == e1000_media_type_copper) {
2770 hw->phy.mdix = AUTO_ALL_MODES;
2771 hw->phy.disable_polarity_correction = false;
2772 hw->phy.ms_type = e1000_ms_hw_default;
2775 if (igb_check_reset_block(hw))
2776 dev_info(&pdev->dev,
2777 "PHY reset is blocked due to SOL/IDER session.\n");
2779 /* features is initialized to 0 in allocation, it might have bits
2780 * set by igb_sw_init so we should use an or instead of an
2783 netdev->features |= NETIF_F_SG |
2790 if (hw->mac.type >= e1000_82576)
2791 netdev->features |= NETIF_F_SCTP_CRC;
2793 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2794 NETIF_F_GSO_GRE_CSUM | \
2795 NETIF_F_GSO_IPXIP4 | \
2796 NETIF_F_GSO_IPXIP6 | \
2797 NETIF_F_GSO_UDP_TUNNEL | \
2798 NETIF_F_GSO_UDP_TUNNEL_CSUM)
2800 netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2801 netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2803 /* copy netdev features into list of user selectable features */
2804 netdev->hw_features |= netdev->features |
2805 NETIF_F_HW_VLAN_CTAG_RX |
2806 NETIF_F_HW_VLAN_CTAG_TX |
2809 if (hw->mac.type >= e1000_i350)
2810 netdev->hw_features |= NETIF_F_NTUPLE;
2813 netdev->features |= NETIF_F_HIGHDMA;
2815 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2816 netdev->mpls_features |= NETIF_F_HW_CSUM;
2817 netdev->hw_enc_features |= netdev->vlan_features;
2819 /* set this bit last since it cannot be part of vlan_features */
2820 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2821 NETIF_F_HW_VLAN_CTAG_RX |
2822 NETIF_F_HW_VLAN_CTAG_TX;
2824 netdev->priv_flags |= IFF_SUPP_NOFCS;
2826 netdev->priv_flags |= IFF_UNICAST_FLT;
2828 /* MTU range: 68 - 9216 */
2829 netdev->min_mtu = ETH_MIN_MTU;
2830 netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
2832 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2834 /* before reading the NVM, reset the controller to put the device in a
2835 * known good starting state
2837 hw->mac.ops.reset_hw(hw);
2839 /* make sure the NVM is good , i211/i210 parts can have special NVM
2840 * that doesn't contain a checksum
2842 switch (hw->mac.type) {
2845 if (igb_get_flash_presence_i210(hw)) {
2846 if (hw->nvm.ops.validate(hw) < 0) {
2848 "The NVM Checksum Is Not Valid\n");
2855 if (hw->nvm.ops.validate(hw) < 0) {
2856 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2863 if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2864 /* copy the MAC address out of the NVM */
2865 if (hw->mac.ops.read_mac_addr(hw))
2866 dev_err(&pdev->dev, "NVM Read Error\n");
2869 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2871 if (!is_valid_ether_addr(netdev->dev_addr)) {
2872 dev_err(&pdev->dev, "Invalid MAC Address\n");
2877 igb_set_default_mac_filter(adapter);
2879 /* get firmware version for ethtool -i */
2880 igb_set_fw_version(adapter);
2882 /* configure RXPBSIZE and TXPBSIZE */
2883 if (hw->mac.type == e1000_i210) {
2884 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2885 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2888 timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
2889 timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
2891 INIT_WORK(&adapter->reset_task, igb_reset_task);
2892 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2894 /* Initialize link properties that are user-changeable */
2895 adapter->fc_autoneg = true;
2896 hw->mac.autoneg = true;
2897 hw->phy.autoneg_advertised = 0x2f;
2899 hw->fc.requested_mode = e1000_fc_default;
2900 hw->fc.current_mode = e1000_fc_default;
2902 igb_validate_mdi_setting(hw);
2904 /* By default, support wake on port A */
2905 if (hw->bus.func == 0)
2906 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2908 /* Check the NVM for wake support on non-port A ports */
2909 if (hw->mac.type >= e1000_82580)
2910 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2911 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2913 else if (hw->bus.func == 1)
2914 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2916 if (eeprom_data & IGB_EEPROM_APME)
2917 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2919 /* now that we have the eeprom settings, apply the special cases where
2920 * the eeprom may be wrong or the board simply won't support wake on
2921 * lan on a particular port
2923 switch (pdev->device) {
2924 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2925 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2927 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2928 case E1000_DEV_ID_82576_FIBER:
2929 case E1000_DEV_ID_82576_SERDES:
2930 /* Wake events only supported on port A for dual fiber
2931 * regardless of eeprom setting
2933 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2934 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2936 case E1000_DEV_ID_82576_QUAD_COPPER:
2937 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2938 /* if quad port adapter, disable WoL on all but port A */
2939 if (global_quad_port_a != 0)
2940 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2942 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2943 /* Reset for multiple quad port adapters */
2944 if (++global_quad_port_a == 4)
2945 global_quad_port_a = 0;
2948 /* If the device can't wake, don't set software support */
2949 if (!device_can_wakeup(&adapter->pdev->dev))
2950 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2953 /* initialize the wol settings based on the eeprom settings */
2954 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2955 adapter->wol |= E1000_WUFC_MAG;
2957 /* Some vendors want WoL disabled by default, but still supported */
2958 if ((hw->mac.type == e1000_i350) &&
2959 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2960 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2964 /* Some vendors want the ability to Use the EEPROM setting as
2965 * enable/disable only, and not for capability
2967 if (((hw->mac.type == e1000_i350) ||
2968 (hw->mac.type == e1000_i354)) &&
2969 (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2970 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2973 if (hw->mac.type == e1000_i350) {
2974 if (((pdev->subsystem_device == 0x5001) ||
2975 (pdev->subsystem_device == 0x5002)) &&
2976 (hw->bus.func == 0)) {
2977 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2980 if (pdev->subsystem_device == 0x1F52)
2981 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2984 device_set_wakeup_enable(&adapter->pdev->dev,
2985 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2987 /* reset the hardware with the new settings */
2990 /* Init the I2C interface */
2991 err = igb_init_i2c(adapter);
2993 dev_err(&pdev->dev, "failed to init i2c interface\n");
2997 /* let the f/w know that the h/w is now under the control of the
3000 igb_get_hw_control(adapter);
3002 strcpy(netdev->name, "eth%d");
3003 err = register_netdev(netdev);
3007 /* carrier off reporting is important to ethtool even BEFORE open */
3008 netif_carrier_off(netdev);
3010 #ifdef CONFIG_IGB_DCA
3011 if (dca_add_requester(&pdev->dev) == 0) {
3012 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3013 dev_info(&pdev->dev, "DCA enabled\n");
3014 igb_setup_dca(adapter);
3018 #ifdef CONFIG_IGB_HWMON
3019 /* Initialize the thermal sensor on i350 devices. */
3020 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3023 /* Read the NVM to determine if this i350 device supports an
3024 * external thermal sensor.
3026 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3027 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3028 adapter->ets = true;
3030 adapter->ets = false;
3031 if (igb_sysfs_init(adapter))
3033 "failed to allocate sysfs resources\n");
3035 adapter->ets = false;
3038 /* Check if Media Autosense is enabled */
3040 if (hw->dev_spec._82575.mas_capable)
3041 igb_init_mas(adapter);
3043 /* do hw tstamp init after resetting */
3044 igb_ptp_init(adapter);
3046 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3047 /* print bus type/speed/width info, not applicable to i354 */
3048 if (hw->mac.type != e1000_i354) {
3049 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3051 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3052 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3054 ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3056 (hw->bus.width == e1000_bus_width_pcie_x2) ?
3058 (hw->bus.width == e1000_bus_width_pcie_x1) ?
3059 "Width x1" : "unknown"), netdev->dev_addr);
3062 if ((hw->mac.type >= e1000_i210 ||
3063 igb_get_flash_presence_i210(hw))) {
3064 ret_val = igb_read_part_string(hw, part_str,
3065 E1000_PBANUM_LENGTH);
3067 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3071 strcpy(part_str, "Unknown");
3072 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3073 dev_info(&pdev->dev,
3074 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3075 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3076 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3077 adapter->num_rx_queues, adapter->num_tx_queues);
3078 if (hw->phy.media_type == e1000_media_type_copper) {
3079 switch (hw->mac.type) {
3083 /* Enable EEE for internal copper PHY devices */
3084 err = igb_set_eee_i350(hw, true, true);
3086 (!hw->dev_spec._82575.eee_disable)) {
3087 adapter->eee_advert =
3088 MDIO_EEE_100TX | MDIO_EEE_1000T;
3089 adapter->flags |= IGB_FLAG_EEE;
3093 if ((rd32(E1000_CTRL_EXT) &
3094 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3095 err = igb_set_eee_i354(hw, true, true);
3097 (!hw->dev_spec._82575.eee_disable)) {
3098 adapter->eee_advert =
3099 MDIO_EEE_100TX | MDIO_EEE_1000T;
3100 adapter->flags |= IGB_FLAG_EEE;
3108 pm_runtime_put_noidle(&pdev->dev);
3112 igb_release_hw_control(adapter);
3113 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3115 if (!igb_check_reset_block(hw))
3118 if (hw->flash_address)
3119 iounmap(hw->flash_address);
3121 kfree(adapter->mac_table);
3122 kfree(adapter->shadow_vfta);
3123 igb_clear_interrupt_scheme(adapter);
3124 #ifdef CONFIG_PCI_IOV
3125 igb_disable_sriov(pdev);
3127 pci_iounmap(pdev, adapter->io_addr);
3129 free_netdev(netdev);
3131 pci_release_mem_regions(pdev);
3134 pci_disable_device(pdev);
3138 #ifdef CONFIG_PCI_IOV
3139 static int igb_disable_sriov(struct pci_dev *pdev)
3141 struct net_device *netdev = pci_get_drvdata(pdev);
3142 struct igb_adapter *adapter = netdev_priv(netdev);
3143 struct e1000_hw *hw = &adapter->hw;
3145 /* reclaim resources allocated to VFs */
3146 if (adapter->vf_data) {
3147 /* disable iov and allow time for transactions to clear */
3148 if (pci_vfs_assigned(pdev)) {
3149 dev_warn(&pdev->dev,
3150 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3153 pci_disable_sriov(pdev);
3157 kfree(adapter->vf_mac_list);
3158 adapter->vf_mac_list = NULL;
3159 kfree(adapter->vf_data);
3160 adapter->vf_data = NULL;
3161 adapter->vfs_allocated_count = 0;
3162 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3165 dev_info(&pdev->dev, "IOV Disabled\n");
3167 /* Re-enable DMA Coalescing flag since IOV is turned off */
3168 adapter->flags |= IGB_FLAG_DMAC;
3174 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3176 struct net_device *netdev = pci_get_drvdata(pdev);
3177 struct igb_adapter *adapter = netdev_priv(netdev);
3178 int old_vfs = pci_num_vf(pdev);
3179 struct vf_mac_filter *mac_list;
3181 int num_vf_mac_filters, i;
3183 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3191 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3193 adapter->vfs_allocated_count = old_vfs;
3195 adapter->vfs_allocated_count = num_vfs;
3197 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3198 sizeof(struct vf_data_storage), GFP_KERNEL);
3200 /* if allocation failed then we do not support SR-IOV */
3201 if (!adapter->vf_data) {
3202 adapter->vfs_allocated_count = 0;
3204 "Unable to allocate memory for VF Data Storage\n");
3209 /* Due to the limited number of RAR entries calculate potential
3210 * number of MAC filters available for the VFs. Reserve entries
3211 * for PF default MAC, PF MAC filters and at least one RAR entry
3212 * for each VF for VF MAC.
3214 num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3215 (1 + IGB_PF_MAC_FILTERS_RESERVED +
3216 adapter->vfs_allocated_count);
3218 adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3219 sizeof(struct vf_mac_filter),
3222 mac_list = adapter->vf_mac_list;
3223 INIT_LIST_HEAD(&adapter->vf_macs.l);
3225 if (adapter->vf_mac_list) {
3226 /* Initialize list of VF MAC filters */
3227 for (i = 0; i < num_vf_mac_filters; i++) {
3229 mac_list->free = true;
3230 list_add(&mac_list->l, &adapter->vf_macs.l);
3234 /* If we could not allocate memory for the VF MAC filters
3235 * we can continue without this feature but warn user.
3238 "Unable to allocate memory for VF MAC filter list\n");
3241 /* only call pci_enable_sriov() if no VFs are allocated already */
3243 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3247 dev_info(&pdev->dev, "%d VFs allocated\n",
3248 adapter->vfs_allocated_count);
3249 for (i = 0; i < adapter->vfs_allocated_count; i++)
3250 igb_vf_configure(adapter, i);
3252 /* DMA Coalescing is not supported in IOV mode. */
3253 adapter->flags &= ~IGB_FLAG_DMAC;
3257 kfree(adapter->vf_mac_list);
3258 adapter->vf_mac_list = NULL;
3259 kfree(adapter->vf_data);
3260 adapter->vf_data = NULL;
3261 adapter->vfs_allocated_count = 0;
3268 * igb_remove_i2c - Cleanup I2C interface
3269 * @adapter: pointer to adapter structure
3271 static void igb_remove_i2c(struct igb_adapter *adapter)
3273 /* free the adapter bus structure */
3274 i2c_del_adapter(&adapter->i2c_adap);
3278 * igb_remove - Device Removal Routine
3279 * @pdev: PCI device information struct
3281 * igb_remove is called by the PCI subsystem to alert the driver
3282 * that it should release a PCI device. The could be caused by a
3283 * Hot-Plug event, or because the driver is going to be removed from
3286 static void igb_remove(struct pci_dev *pdev)
3288 struct net_device *netdev = pci_get_drvdata(pdev);
3289 struct igb_adapter *adapter = netdev_priv(netdev);
3290 struct e1000_hw *hw = &adapter->hw;
3292 pm_runtime_get_noresume(&pdev->dev);
3293 #ifdef CONFIG_IGB_HWMON
3294 igb_sysfs_exit(adapter);
3296 igb_remove_i2c(adapter);
3297 igb_ptp_stop(adapter);
3298 /* The watchdog timer may be rescheduled, so explicitly
3299 * disable watchdog from being rescheduled.
3301 set_bit(__IGB_DOWN, &adapter->state);
3302 del_timer_sync(&adapter->watchdog_timer);
3303 del_timer_sync(&adapter->phy_info_timer);
3305 cancel_work_sync(&adapter->reset_task);
3306 cancel_work_sync(&adapter->watchdog_task);
3308 #ifdef CONFIG_IGB_DCA
3309 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3310 dev_info(&pdev->dev, "DCA disabled\n");
3311 dca_remove_requester(&pdev->dev);
3312 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3313 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3317 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3318 * would have already happened in close and is redundant.
3320 igb_release_hw_control(adapter);
3322 #ifdef CONFIG_PCI_IOV
3323 igb_disable_sriov(pdev);
3326 unregister_netdev(netdev);
3328 igb_clear_interrupt_scheme(adapter);
3330 pci_iounmap(pdev, adapter->io_addr);
3331 if (hw->flash_address)
3332 iounmap(hw->flash_address);
3333 pci_release_mem_regions(pdev);
3335 kfree(adapter->mac_table);
3336 kfree(adapter->shadow_vfta);
3337 free_netdev(netdev);
3339 pci_disable_pcie_error_reporting(pdev);
3341 pci_disable_device(pdev);
3345 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3346 * @adapter: board private structure to initialize
3348 * This function initializes the vf specific data storage and then attempts to
3349 * allocate the VFs. The reason for ordering it this way is because it is much
3350 * mor expensive time wise to disable SR-IOV than it is to allocate and free
3351 * the memory for the VFs.
3353 static void igb_probe_vfs(struct igb_adapter *adapter)
3355 #ifdef CONFIG_PCI_IOV
3356 struct pci_dev *pdev = adapter->pdev;
3357 struct e1000_hw *hw = &adapter->hw;
3359 /* Virtualization features not supported on i210 family. */
3360 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3363 /* Of the below we really only want the effect of getting
3364 * IGB_FLAG_HAS_MSIX set (if available), without which
3365 * igb_enable_sriov() has no effect.
3367 igb_set_interrupt_capability(adapter, true);
3368 igb_reset_interrupt_capability(adapter);
3370 pci_sriov_set_totalvfs(pdev, 7);
3371 igb_enable_sriov(pdev, max_vfs);
3373 #endif /* CONFIG_PCI_IOV */
3376 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3378 struct e1000_hw *hw = &adapter->hw;
3379 unsigned int max_rss_queues;
3381 /* Determine the maximum number of RSS queues supported. */
3382 switch (hw->mac.type) {
3384 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3388 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3391 /* I350 cannot do RSS and SR-IOV at the same time */
3392 if (!!adapter->vfs_allocated_count) {
3398 if (!!adapter->vfs_allocated_count) {
3406 max_rss_queues = IGB_MAX_RX_QUEUES;
3410 return max_rss_queues;
3413 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3417 max_rss_queues = igb_get_max_rss_queues(adapter);
3418 adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3420 igb_set_flag_queue_pairs(adapter, max_rss_queues);
3423 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3424 const u32 max_rss_queues)
3426 struct e1000_hw *hw = &adapter->hw;
3428 /* Determine if we need to pair queues. */
3429 switch (hw->mac.type) {
3432 /* Device supports enough interrupts without queue pairing. */
3440 /* If rss_queues > half of max_rss_queues, pair the queues in
3441 * order to conserve interrupts due to limited supply.
3443 if (adapter->rss_queues > (max_rss_queues / 2))
3444 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3446 adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3452 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3453 * @adapter: board private structure to initialize
3455 * igb_sw_init initializes the Adapter private data structure.
3456 * Fields are initialized based on PCI device information and
3457 * OS network device settings (MTU size).
3459 static int igb_sw_init(struct igb_adapter *adapter)
3461 struct e1000_hw *hw = &adapter->hw;
3462 struct net_device *netdev = adapter->netdev;
3463 struct pci_dev *pdev = adapter->pdev;
3465 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3467 /* set default ring sizes */
3468 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3469 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3471 /* set default ITR values */
3472 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3473 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3475 /* set default work limits */
3476 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3478 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3480 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3482 spin_lock_init(&adapter->nfc_lock);
3483 spin_lock_init(&adapter->stats64_lock);
3484 #ifdef CONFIG_PCI_IOV
3485 switch (hw->mac.type) {
3489 dev_warn(&pdev->dev,
3490 "Maximum of 7 VFs per PF, using max\n");
3491 max_vfs = adapter->vfs_allocated_count = 7;
3493 adapter->vfs_allocated_count = max_vfs;
3494 if (adapter->vfs_allocated_count)
3495 dev_warn(&pdev->dev,
3496 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3501 #endif /* CONFIG_PCI_IOV */
3503 /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3504 adapter->flags |= IGB_FLAG_HAS_MSIX;
3506 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3507 hw->mac.rar_entry_count, GFP_ATOMIC);
3508 if (!adapter->mac_table)
3511 igb_probe_vfs(adapter);
3513 igb_init_queue_configuration(adapter);
3515 /* Setup and initialize a copy of the hw vlan table array */
3516 adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3518 if (!adapter->shadow_vfta)
3521 /* This call may decrease the number of queues */
3522 if (igb_init_interrupt_scheme(adapter, true)) {
3523 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3527 /* Explicitly disable IRQ since the NIC can be in any state. */
3528 igb_irq_disable(adapter);
3530 if (hw->mac.type >= e1000_i350)
3531 adapter->flags &= ~IGB_FLAG_DMAC;
3533 set_bit(__IGB_DOWN, &adapter->state);
3538 * igb_open - Called when a network interface is made active
3539 * @netdev: network interface device structure
3541 * Returns 0 on success, negative value on failure
3543 * The open entry point is called when a network interface is made
3544 * active by the system (IFF_UP). At this point all resources needed
3545 * for transmit and receive operations are allocated, the interrupt
3546 * handler is registered with the OS, the watchdog timer is started,
3547 * and the stack is notified that the interface is ready.
3549 static int __igb_open(struct net_device *netdev, bool resuming)
3551 struct igb_adapter *adapter = netdev_priv(netdev);
3552 struct e1000_hw *hw = &adapter->hw;
3553 struct pci_dev *pdev = adapter->pdev;
3557 /* disallow open during test */
3558 if (test_bit(__IGB_TESTING, &adapter->state)) {
3564 pm_runtime_get_sync(&pdev->dev);
3566 netif_carrier_off(netdev);
3568 /* allocate transmit descriptors */
3569 err = igb_setup_all_tx_resources(adapter);
3573 /* allocate receive descriptors */
3574 err = igb_setup_all_rx_resources(adapter);
3578 igb_power_up_link(adapter);
3580 /* before we allocate an interrupt, we must be ready to handle it.
3581 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3582 * as soon as we call pci_request_irq, so we have to setup our
3583 * clean_rx handler before we do so.
3585 igb_configure(adapter);
3587 err = igb_request_irq(adapter);
3591 /* Notify the stack of the actual queue counts. */
3592 err = netif_set_real_num_tx_queues(adapter->netdev,
3593 adapter->num_tx_queues);
3595 goto err_set_queues;
3597 err = netif_set_real_num_rx_queues(adapter->netdev,
3598 adapter->num_rx_queues);
3600 goto err_set_queues;
3602 /* From here on the code is the same as igb_up() */
3603 clear_bit(__IGB_DOWN, &adapter->state);
3605 for (i = 0; i < adapter->num_q_vectors; i++)
3606 napi_enable(&(adapter->q_vector[i]->napi));
3608 /* Clear any pending interrupts. */
3611 igb_irq_enable(adapter);
3613 /* notify VFs that reset has been completed */
3614 if (adapter->vfs_allocated_count) {
3615 u32 reg_data = rd32(E1000_CTRL_EXT);
3617 reg_data |= E1000_CTRL_EXT_PFRSTD;
3618 wr32(E1000_CTRL_EXT, reg_data);
3621 netif_tx_start_all_queues(netdev);
3624 pm_runtime_put(&pdev->dev);
3626 /* start the watchdog. */
3627 hw->mac.get_link_status = 1;
3628 schedule_work(&adapter->watchdog_task);
3633 igb_free_irq(adapter);
3635 igb_release_hw_control(adapter);
3636 igb_power_down_link(adapter);
3637 igb_free_all_rx_resources(adapter);
3639 igb_free_all_tx_resources(adapter);
3643 pm_runtime_put(&pdev->dev);
3648 int igb_open(struct net_device *netdev)
3650 return __igb_open(netdev, false);
3654 * igb_close - Disables a network interface
3655 * @netdev: network interface device structure
3657 * Returns 0, this is not allowed to fail
3659 * The close entry point is called when an interface is de-activated
3660 * by the OS. The hardware is still under the driver's control, but
3661 * needs to be disabled. A global MAC reset is issued to stop the
3662 * hardware, and all transmit and receive resources are freed.
3664 static int __igb_close(struct net_device *netdev, bool suspending)
3666 struct igb_adapter *adapter = netdev_priv(netdev);
3667 struct pci_dev *pdev = adapter->pdev;
3669 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3672 pm_runtime_get_sync(&pdev->dev);
3675 igb_free_irq(adapter);
3677 igb_free_all_tx_resources(adapter);
3678 igb_free_all_rx_resources(adapter);
3681 pm_runtime_put_sync(&pdev->dev);
3685 int igb_close(struct net_device *netdev)
3687 if (netif_device_present(netdev))
3688 return __igb_close(netdev, false);
3693 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3694 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3696 * Return 0 on success, negative on failure
3698 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3700 struct device *dev = tx_ring->dev;
3703 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3705 tx_ring->tx_buffer_info = vmalloc(size);
3706 if (!tx_ring->tx_buffer_info)
3709 /* round up to nearest 4K */
3710 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3711 tx_ring->size = ALIGN(tx_ring->size, 4096);
3713 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3714 &tx_ring->dma, GFP_KERNEL);
3718 tx_ring->next_to_use = 0;
3719 tx_ring->next_to_clean = 0;
3724 vfree(tx_ring->tx_buffer_info);
3725 tx_ring->tx_buffer_info = NULL;
3726 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3731 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3732 * (Descriptors) for all queues
3733 * @adapter: board private structure
3735 * Return 0 on success, negative on failure
3737 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3739 struct pci_dev *pdev = adapter->pdev;
3742 for (i = 0; i < adapter->num_tx_queues; i++) {
3743 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3746 "Allocation for Tx Queue %u failed\n", i);
3747 for (i--; i >= 0; i--)
3748 igb_free_tx_resources(adapter->tx_ring[i]);
3757 * igb_setup_tctl - configure the transmit control registers
3758 * @adapter: Board private structure
3760 void igb_setup_tctl(struct igb_adapter *adapter)
3762 struct e1000_hw *hw = &adapter->hw;
3765 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3766 wr32(E1000_TXDCTL(0), 0);
3768 /* Program the Transmit Control Register */
3769 tctl = rd32(E1000_TCTL);
3770 tctl &= ~E1000_TCTL_CT;
3771 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3772 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3774 igb_config_collision_dist(hw);
3776 /* Enable transmits */
3777 tctl |= E1000_TCTL_EN;
3779 wr32(E1000_TCTL, tctl);
3783 * igb_configure_tx_ring - Configure transmit ring after Reset
3784 * @adapter: board private structure
3785 * @ring: tx ring to configure
3787 * Configure a transmit ring after a reset.
3789 void igb_configure_tx_ring(struct igb_adapter *adapter,
3790 struct igb_ring *ring)
3792 struct e1000_hw *hw = &adapter->hw;
3794 u64 tdba = ring->dma;
3795 int reg_idx = ring->reg_idx;
3797 /* disable the queue */
3798 wr32(E1000_TXDCTL(reg_idx), 0);
3802 wr32(E1000_TDLEN(reg_idx),
3803 ring->count * sizeof(union e1000_adv_tx_desc));
3804 wr32(E1000_TDBAL(reg_idx),
3805 tdba & 0x00000000ffffffffULL);
3806 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3808 ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
3809 wr32(E1000_TDH(reg_idx), 0);
3810 writel(0, ring->tail);
3812 txdctl |= IGB_TX_PTHRESH;
3813 txdctl |= IGB_TX_HTHRESH << 8;
3814 txdctl |= IGB_TX_WTHRESH << 16;
3816 /* reinitialize tx_buffer_info */
3817 memset(ring->tx_buffer_info, 0,
3818 sizeof(struct igb_tx_buffer) * ring->count);
3820 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3821 wr32(E1000_TXDCTL(reg_idx), txdctl);
3825 * igb_configure_tx - Configure transmit Unit after Reset
3826 * @adapter: board private structure
3828 * Configure the Tx unit of the MAC after a reset.
3830 static void igb_configure_tx(struct igb_adapter *adapter)
3834 for (i = 0; i < adapter->num_tx_queues; i++)
3835 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3839 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3840 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3842 * Returns 0 on success, negative on failure
3844 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3846 struct device *dev = rx_ring->dev;
3849 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3851 rx_ring->rx_buffer_info = vmalloc(size);
3852 if (!rx_ring->rx_buffer_info)
3855 /* Round up to nearest 4K */
3856 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3857 rx_ring->size = ALIGN(rx_ring->size, 4096);
3859 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3860 &rx_ring->dma, GFP_KERNEL);
3864 rx_ring->next_to_alloc = 0;
3865 rx_ring->next_to_clean = 0;
3866 rx_ring->next_to_use = 0;
3871 vfree(rx_ring->rx_buffer_info);
3872 rx_ring->rx_buffer_info = NULL;
3873 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3878 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3879 * (Descriptors) for all queues
3880 * @adapter: board private structure
3882 * Return 0 on success, negative on failure
3884 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3886 struct pci_dev *pdev = adapter->pdev;
3889 for (i = 0; i < adapter->num_rx_queues; i++) {
3890 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3893 "Allocation for Rx Queue %u failed\n", i);
3894 for (i--; i >= 0; i--)
3895 igb_free_rx_resources(adapter->rx_ring[i]);
3904 * igb_setup_mrqc - configure the multiple receive queue control registers
3905 * @adapter: Board private structure
3907 static void igb_setup_mrqc(struct igb_adapter *adapter)
3909 struct e1000_hw *hw = &adapter->hw;
3911 u32 j, num_rx_queues;
3914 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3915 for (j = 0; j < 10; j++)
3916 wr32(E1000_RSSRK(j), rss_key[j]);
3918 num_rx_queues = adapter->rss_queues;
3920 switch (hw->mac.type) {
3922 /* 82576 supports 2 RSS queues for SR-IOV */
3923 if (adapter->vfs_allocated_count)
3930 if (adapter->rss_indir_tbl_init != num_rx_queues) {
3931 for (j = 0; j < IGB_RETA_SIZE; j++)
3932 adapter->rss_indir_tbl[j] =
3933 (j * num_rx_queues) / IGB_RETA_SIZE;
3934 adapter->rss_indir_tbl_init = num_rx_queues;
3936 igb_write_rss_indir_tbl(adapter);
3938 /* Disable raw packet checksumming so that RSS hash is placed in
3939 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3940 * offloads as they are enabled by default
3942 rxcsum = rd32(E1000_RXCSUM);
3943 rxcsum |= E1000_RXCSUM_PCSD;
3945 if (adapter->hw.mac.type >= e1000_82576)
3946 /* Enable Receive Checksum Offload for SCTP */
3947 rxcsum |= E1000_RXCSUM_CRCOFL;
3949 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3950 wr32(E1000_RXCSUM, rxcsum);
3952 /* Generate RSS hash based on packet types, TCP/UDP
3953 * port numbers and/or IPv4/v6 src and dst addresses
3955 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3956 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3957 E1000_MRQC_RSS_FIELD_IPV6 |
3958 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3959 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3961 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3962 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3963 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3964 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3966 /* If VMDq is enabled then we set the appropriate mode for that, else
3967 * we default to RSS so that an RSS hash is calculated per packet even
3968 * if we are only using one queue
3970 if (adapter->vfs_allocated_count) {
3971 if (hw->mac.type > e1000_82575) {
3972 /* Set the default pool for the PF's first queue */
3973 u32 vtctl = rd32(E1000_VT_CTL);
3975 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3976 E1000_VT_CTL_DISABLE_DEF_POOL);
3977 vtctl |= adapter->vfs_allocated_count <<
3978 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3979 wr32(E1000_VT_CTL, vtctl);
3981 if (adapter->rss_queues > 1)
3982 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3984 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3986 if (hw->mac.type != e1000_i211)
3987 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3989 igb_vmm_control(adapter);
3991 wr32(E1000_MRQC, mrqc);
3995 * igb_setup_rctl - configure the receive control registers
3996 * @adapter: Board private structure
3998 void igb_setup_rctl(struct igb_adapter *adapter)
4000 struct e1000_hw *hw = &adapter->hw;
4003 rctl = rd32(E1000_RCTL);
4005 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4006 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4008 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4009 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4011 /* enable stripping of CRC. It's unlikely this will break BMC
4012 * redirection as it did with e1000. Newer features require
4013 * that the HW strips the CRC.
4015 rctl |= E1000_RCTL_SECRC;
4017 /* disable store bad packets and clear size bits. */
4018 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4020 /* enable LPE to allow for reception of jumbo frames */
4021 rctl |= E1000_RCTL_LPE;
4023 /* disable queue 0 to prevent tail write w/o re-config */
4024 wr32(E1000_RXDCTL(0), 0);
4026 /* Attention!!! For SR-IOV PF driver operations you must enable
4027 * queue drop for all VF and PF queues to prevent head of line blocking
4028 * if an un-trusted VF does not provide descriptors to hardware.
4030 if (adapter->vfs_allocated_count) {
4031 /* set all queue drop enable bits */
4032 wr32(E1000_QDE, ALL_QUEUES);
4035 /* This is useful for sniffing bad packets. */
4036 if (adapter->netdev->features & NETIF_F_RXALL) {
4037 /* UPE and MPE will be handled by normal PROMISC logic
4038 * in e1000e_set_rx_mode
4040 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4041 E1000_RCTL_BAM | /* RX All Bcast Pkts */
4042 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4044 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4045 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4046 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4047 * and that breaks VLANs.
4051 wr32(E1000_RCTL, rctl);
4054 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4057 struct e1000_hw *hw = &adapter->hw;
4060 if (size > MAX_JUMBO_FRAME_SIZE)
4061 size = MAX_JUMBO_FRAME_SIZE;
4063 vmolr = rd32(E1000_VMOLR(vfn));
4064 vmolr &= ~E1000_VMOLR_RLPML_MASK;
4065 vmolr |= size | E1000_VMOLR_LPE;
4066 wr32(E1000_VMOLR(vfn), vmolr);
4071 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4072 int vfn, bool enable)
4074 struct e1000_hw *hw = &adapter->hw;
4077 if (hw->mac.type < e1000_82576)
4080 if (hw->mac.type == e1000_i350)
4081 reg = E1000_DVMOLR(vfn);
4083 reg = E1000_VMOLR(vfn);
4087 val |= E1000_VMOLR_STRVLAN;
4089 val &= ~(E1000_VMOLR_STRVLAN);
4093 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4096 struct e1000_hw *hw = &adapter->hw;
4099 /* This register exists only on 82576 and newer so if we are older then
4100 * we should exit and do nothing
4102 if (hw->mac.type < e1000_82576)
4105 vmolr = rd32(E1000_VMOLR(vfn));
4107 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4109 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4111 /* clear all bits that might not be set */
4112 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4114 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4115 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4116 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4119 if (vfn <= adapter->vfs_allocated_count)
4120 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4122 wr32(E1000_VMOLR(vfn), vmolr);
4126 * igb_configure_rx_ring - Configure a receive ring after Reset
4127 * @adapter: board private structure
4128 * @ring: receive ring to be configured
4130 * Configure the Rx unit of the MAC after a reset.
4132 void igb_configure_rx_ring(struct igb_adapter *adapter,
4133 struct igb_ring *ring)
4135 struct e1000_hw *hw = &adapter->hw;
4136 union e1000_adv_rx_desc *rx_desc;
4137 u64 rdba = ring->dma;
4138 int reg_idx = ring->reg_idx;
4139 u32 srrctl = 0, rxdctl = 0;
4141 /* disable the queue */
4142 wr32(E1000_RXDCTL(reg_idx), 0);
4144 /* Set DMA base address registers */
4145 wr32(E1000_RDBAL(reg_idx),
4146 rdba & 0x00000000ffffffffULL);
4147 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4148 wr32(E1000_RDLEN(reg_idx),
4149 ring->count * sizeof(union e1000_adv_rx_desc));
4151 /* initialize head and tail */
4152 ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4153 wr32(E1000_RDH(reg_idx), 0);
4154 writel(0, ring->tail);
4156 /* set descriptor configuration */
4157 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4158 if (ring_uses_large_buffer(ring))
4159 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4161 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4162 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4163 if (hw->mac.type >= e1000_82580)
4164 srrctl |= E1000_SRRCTL_TIMESTAMP;
4165 /* Only set Drop Enable if we are supporting multiple queues */
4166 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
4167 srrctl |= E1000_SRRCTL_DROP_EN;
4169 wr32(E1000_SRRCTL(reg_idx), srrctl);
4171 /* set filtering for VMDQ pools */
4172 igb_set_vmolr(adapter, reg_idx & 0x7, true);
4174 rxdctl |= IGB_RX_PTHRESH;
4175 rxdctl |= IGB_RX_HTHRESH << 8;
4176 rxdctl |= IGB_RX_WTHRESH << 16;
4178 /* initialize rx_buffer_info */
4179 memset(ring->rx_buffer_info, 0,
4180 sizeof(struct igb_rx_buffer) * ring->count);
4182 /* initialize Rx descriptor 0 */
4183 rx_desc = IGB_RX_DESC(ring, 0);
4184 rx_desc->wb.upper.length = 0;
4186 /* enable receive descriptor fetching */
4187 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4188 wr32(E1000_RXDCTL(reg_idx), rxdctl);
4191 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4192 struct igb_ring *rx_ring)
4194 /* set build_skb and buffer size flags */
4195 clear_ring_build_skb_enabled(rx_ring);
4196 clear_ring_uses_large_buffer(rx_ring);
4198 if (adapter->flags & IGB_FLAG_RX_LEGACY)
4201 set_ring_build_skb_enabled(rx_ring);
4203 #if (PAGE_SIZE < 8192)
4204 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4207 set_ring_uses_large_buffer(rx_ring);
4212 * igb_configure_rx - Configure receive Unit after Reset
4213 * @adapter: board private structure
4215 * Configure the Rx unit of the MAC after a reset.
4217 static void igb_configure_rx(struct igb_adapter *adapter)
4221 /* set the correct pool for the PF default MAC address in entry 0 */
4222 igb_set_default_mac_filter(adapter);
4224 /* Setup the HW Rx Head and Tail Descriptor Pointers and
4225 * the Base and Length of the Rx Descriptor Ring
4227 for (i = 0; i < adapter->num_rx_queues; i++) {
4228 struct igb_ring *rx_ring = adapter->rx_ring[i];
4230 igb_set_rx_buffer_len(adapter, rx_ring);
4231 igb_configure_rx_ring(adapter, rx_ring);
4236 * igb_free_tx_resources - Free Tx Resources per Queue
4237 * @tx_ring: Tx descriptor ring for a specific queue
4239 * Free all transmit software resources
4241 void igb_free_tx_resources(struct igb_ring *tx_ring)
4243 igb_clean_tx_ring(tx_ring);
4245 vfree(tx_ring->tx_buffer_info);
4246 tx_ring->tx_buffer_info = NULL;
4248 /* if not set, then don't free */
4252 dma_free_coherent(tx_ring->dev, tx_ring->size,
4253 tx_ring->desc, tx_ring->dma);
4255 tx_ring->desc = NULL;
4259 * igb_free_all_tx_resources - Free Tx Resources for All Queues
4260 * @adapter: board private structure
4262 * Free all transmit software resources
4264 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4268 for (i = 0; i < adapter->num_tx_queues; i++)
4269 if (adapter->tx_ring[i])
4270 igb_free_tx_resources(adapter->tx_ring[i]);
4274 * igb_clean_tx_ring - Free Tx Buffers
4275 * @tx_ring: ring to be cleaned
4277 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4279 u16 i = tx_ring->next_to_clean;
4280 struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4282 while (i != tx_ring->next_to_use) {
4283 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4285 /* Free all the Tx ring sk_buffs */
4286 dev_kfree_skb_any(tx_buffer->skb);
4288 /* unmap skb header data */
4289 dma_unmap_single(tx_ring->dev,
4290 dma_unmap_addr(tx_buffer, dma),
4291 dma_unmap_len(tx_buffer, len),
4294 /* check for eop_desc to determine the end of the packet */
4295 eop_desc = tx_buffer->next_to_watch;
4296 tx_desc = IGB_TX_DESC(tx_ring, i);
4298 /* unmap remaining buffers */
4299 while (tx_desc != eop_desc) {
4303 if (unlikely(i == tx_ring->count)) {
4305 tx_buffer = tx_ring->tx_buffer_info;
4306 tx_desc = IGB_TX_DESC(tx_ring, 0);
4309 /* unmap any remaining paged data */
4310 if (dma_unmap_len(tx_buffer, len))
4311 dma_unmap_page(tx_ring->dev,
4312 dma_unmap_addr(tx_buffer, dma),
4313 dma_unmap_len(tx_buffer, len),
4317 /* move us one more past the eop_desc for start of next pkt */
4320 if (unlikely(i == tx_ring->count)) {
4322 tx_buffer = tx_ring->tx_buffer_info;
4326 /* reset BQL for queue */
4327 netdev_tx_reset_queue(txring_txq(tx_ring));
4329 /* reset next_to_use and next_to_clean */
4330 tx_ring->next_to_use = 0;
4331 tx_ring->next_to_clean = 0;
4335 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4336 * @adapter: board private structure
4338 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4342 for (i = 0; i < adapter->num_tx_queues; i++)
4343 if (adapter->tx_ring[i])
4344 igb_clean_tx_ring(adapter->tx_ring[i]);
4348 * igb_free_rx_resources - Free Rx Resources
4349 * @rx_ring: ring to clean the resources from
4351 * Free all receive software resources
4353 void igb_free_rx_resources(struct igb_ring *rx_ring)
4355 igb_clean_rx_ring(rx_ring);
4357 vfree(rx_ring->rx_buffer_info);
4358 rx_ring->rx_buffer_info = NULL;
4360 /* if not set, then don't free */
4364 dma_free_coherent(rx_ring->dev, rx_ring->size,
4365 rx_ring->desc, rx_ring->dma);
4367 rx_ring->desc = NULL;
4371 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4372 * @adapter: board private structure
4374 * Free all receive software resources
4376 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4380 for (i = 0; i < adapter->num_rx_queues; i++)
4381 if (adapter->rx_ring[i])
4382 igb_free_rx_resources(adapter->rx_ring[i]);
4386 * igb_clean_rx_ring - Free Rx Buffers per Queue
4387 * @rx_ring: ring to free buffers from
4389 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4391 u16 i = rx_ring->next_to_clean;
4394 dev_kfree_skb(rx_ring->skb);
4395 rx_ring->skb = NULL;
4397 /* Free all the Rx ring sk_buffs */
4398 while (i != rx_ring->next_to_alloc) {
4399 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4401 /* Invalidate cache lines that may have been written to by
4402 * device so that we avoid corrupting memory.
4404 dma_sync_single_range_for_cpu(rx_ring->dev,
4406 buffer_info->page_offset,
4407 igb_rx_bufsz(rx_ring),
4410 /* free resources associated with mapping */
4411 dma_unmap_page_attrs(rx_ring->dev,
4413 igb_rx_pg_size(rx_ring),
4416 __page_frag_cache_drain(buffer_info->page,
4417 buffer_info->pagecnt_bias);
4420 if (i == rx_ring->count)
4424 rx_ring->next_to_alloc = 0;
4425 rx_ring->next_to_clean = 0;
4426 rx_ring->next_to_use = 0;
4430 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4431 * @adapter: board private structure
4433 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4437 for (i = 0; i < adapter->num_rx_queues; i++)
4438 if (adapter->rx_ring[i])
4439 igb_clean_rx_ring(adapter->rx_ring[i]);
4443 * igb_set_mac - Change the Ethernet Address of the NIC
4444 * @netdev: network interface device structure
4445 * @p: pointer to an address structure
4447 * Returns 0 on success, negative on failure
4449 static int igb_set_mac(struct net_device *netdev, void *p)
4451 struct igb_adapter *adapter = netdev_priv(netdev);
4452 struct e1000_hw *hw = &adapter->hw;
4453 struct sockaddr *addr = p;
4455 if (!is_valid_ether_addr(addr->sa_data))
4456 return -EADDRNOTAVAIL;
4458 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4459 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4461 /* set the correct pool for the new PF MAC address in entry 0 */
4462 igb_set_default_mac_filter(adapter);
4468 * igb_write_mc_addr_list - write multicast addresses to MTA
4469 * @netdev: network interface device structure
4471 * Writes multicast address list to the MTA hash table.
4472 * Returns: -ENOMEM on failure
4473 * 0 on no addresses written
4474 * X on writing X addresses to MTA
4476 static int igb_write_mc_addr_list(struct net_device *netdev)
4478 struct igb_adapter *adapter = netdev_priv(netdev);
4479 struct e1000_hw *hw = &adapter->hw;
4480 struct netdev_hw_addr *ha;
4484 if (netdev_mc_empty(netdev)) {
4485 /* nothing to program, so clear mc list */
4486 igb_update_mc_addr_list(hw, NULL, 0);
4487 igb_restore_vf_multicasts(adapter);
4491 mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4495 /* The shared function expects a packed array of only addresses. */
4497 netdev_for_each_mc_addr(ha, netdev)
4498 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4500 igb_update_mc_addr_list(hw, mta_list, i);
4503 return netdev_mc_count(netdev);
4506 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4508 struct e1000_hw *hw = &adapter->hw;
4511 switch (hw->mac.type) {
4515 /* VLAN filtering needed for VLAN prio filter */
4516 if (adapter->netdev->features & NETIF_F_NTUPLE)
4522 /* VLAN filtering needed for pool filtering */
4523 if (adapter->vfs_allocated_count)
4530 /* We are already in VLAN promisc, nothing to do */
4531 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4534 if (!adapter->vfs_allocated_count)
4537 /* Add PF to all active pools */
4538 pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4540 for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4541 u32 vlvf = rd32(E1000_VLVF(i));
4544 wr32(E1000_VLVF(i), vlvf);
4548 /* Set all bits in the VLAN filter table array */
4549 for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4550 hw->mac.ops.write_vfta(hw, i, ~0U);
4552 /* Set flag so we don't redo unnecessary work */
4553 adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4558 #define VFTA_BLOCK_SIZE 8
4559 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4561 struct e1000_hw *hw = &adapter->hw;
4562 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4563 u32 vid_start = vfta_offset * 32;
4564 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4565 u32 i, vid, word, bits, pf_id;
4567 /* guarantee that we don't scrub out management VLAN */
4568 vid = adapter->mng_vlan_id;
4569 if (vid >= vid_start && vid < vid_end)
4570 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4572 if (!adapter->vfs_allocated_count)
4575 pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4577 for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4578 u32 vlvf = rd32(E1000_VLVF(i));
4580 /* pull VLAN ID from VLVF */
4581 vid = vlvf & VLAN_VID_MASK;
4583 /* only concern ourselves with a certain range */
4584 if (vid < vid_start || vid >= vid_end)
4587 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4588 /* record VLAN ID in VFTA */
4589 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4591 /* if PF is part of this then continue */
4592 if (test_bit(vid, adapter->active_vlans))
4596 /* remove PF from the pool */
4598 bits &= rd32(E1000_VLVF(i));
4599 wr32(E1000_VLVF(i), bits);
4603 /* extract values from active_vlans and write back to VFTA */
4604 for (i = VFTA_BLOCK_SIZE; i--;) {
4605 vid = (vfta_offset + i) * 32;
4606 word = vid / BITS_PER_LONG;
4607 bits = vid % BITS_PER_LONG;
4609 vfta[i] |= adapter->active_vlans[word] >> bits;
4611 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4615 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4619 /* We are not in VLAN promisc, nothing to do */
4620 if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4623 /* Set flag so we don't redo unnecessary work */
4624 adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4626 for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4627 igb_scrub_vfta(adapter, i);
4631 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4632 * @netdev: network interface device structure
4634 * The set_rx_mode entry point is called whenever the unicast or multicast
4635 * address lists or the network interface flags are updated. This routine is
4636 * responsible for configuring the hardware for proper unicast, multicast,
4637 * promiscuous mode, and all-multi behavior.
4639 static void igb_set_rx_mode(struct net_device *netdev)
4641 struct igb_adapter *adapter = netdev_priv(netdev);
4642 struct e1000_hw *hw = &adapter->hw;
4643 unsigned int vfn = adapter->vfs_allocated_count;
4644 u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
4647 /* Check for Promiscuous and All Multicast modes */
4648 if (netdev->flags & IFF_PROMISC) {
4649 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4650 vmolr |= E1000_VMOLR_MPME;
4652 /* enable use of UTA filter to force packets to default pool */
4653 if (hw->mac.type == e1000_82576)
4654 vmolr |= E1000_VMOLR_ROPE;
4656 if (netdev->flags & IFF_ALLMULTI) {
4657 rctl |= E1000_RCTL_MPE;
4658 vmolr |= E1000_VMOLR_MPME;
4660 /* Write addresses to the MTA, if the attempt fails
4661 * then we should just turn on promiscuous mode so
4662 * that we can at least receive multicast traffic
4664 count = igb_write_mc_addr_list(netdev);
4666 rctl |= E1000_RCTL_MPE;
4667 vmolr |= E1000_VMOLR_MPME;
4669 vmolr |= E1000_VMOLR_ROMPE;
4674 /* Write addresses to available RAR registers, if there is not
4675 * sufficient space to store all the addresses then enable
4676 * unicast promiscuous mode
4678 if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
4679 rctl |= E1000_RCTL_UPE;
4680 vmolr |= E1000_VMOLR_ROPE;
4683 /* enable VLAN filtering by default */
4684 rctl |= E1000_RCTL_VFE;
4686 /* disable VLAN filtering for modes that require it */
4687 if ((netdev->flags & IFF_PROMISC) ||
4688 (netdev->features & NETIF_F_RXALL)) {
4689 /* if we fail to set all rules then just clear VFE */
4690 if (igb_vlan_promisc_enable(adapter))
4691 rctl &= ~E1000_RCTL_VFE;
4693 igb_vlan_promisc_disable(adapter);
4696 /* update state of unicast, multicast, and VLAN filtering modes */
4697 rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4699 wr32(E1000_RCTL, rctl);
4701 #if (PAGE_SIZE < 8192)
4702 if (!adapter->vfs_allocated_count) {
4703 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4704 rlpml = IGB_MAX_FRAME_BUILD_SKB;
4707 wr32(E1000_RLPML, rlpml);
4709 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4710 * the VMOLR to enable the appropriate modes. Without this workaround
4711 * we will have issues with VLAN tag stripping not being done for frames
4712 * that are only arriving because we are the default pool
4714 if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4717 /* set UTA to appropriate mode */
4718 igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4720 vmolr |= rd32(E1000_VMOLR(vfn)) &
4721 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4723 /* enable Rx jumbo frames, restrict as needed to support build_skb */
4724 vmolr &= ~E1000_VMOLR_RLPML_MASK;
4725 #if (PAGE_SIZE < 8192)
4726 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4727 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
4730 vmolr |= MAX_JUMBO_FRAME_SIZE;
4731 vmolr |= E1000_VMOLR_LPE;
4733 wr32(E1000_VMOLR(vfn), vmolr);
4735 igb_restore_vf_multicasts(adapter);
4738 static void igb_check_wvbr(struct igb_adapter *adapter)
4740 struct e1000_hw *hw = &adapter->hw;
4743 switch (hw->mac.type) {
4746 wvbr = rd32(E1000_WVBR);
4754 adapter->wvbr |= wvbr;
4757 #define IGB_STAGGERED_QUEUE_OFFSET 8
4759 static void igb_spoof_check(struct igb_adapter *adapter)
4766 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4767 if (adapter->wvbr & BIT(j) ||
4768 adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4769 dev_warn(&adapter->pdev->dev,
4770 "Spoof event(s) detected on VF %d\n", j);
4773 BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4778 /* Need to wait a few seconds after link up to get diagnostic information from
4781 static void igb_update_phy_info(struct timer_list *t)
4783 struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4784 igb_get_phy_info(&adapter->hw);
4788 * igb_has_link - check shared code for link and determine up/down
4789 * @adapter: pointer to driver private info
4791 bool igb_has_link(struct igb_adapter *adapter)
4793 struct e1000_hw *hw = &adapter->hw;
4794 bool link_active = false;
4796 /* get_link_status is set on LSC (link status) interrupt or
4797 * rx sequence error interrupt. get_link_status will stay
4798 * false until the e1000_check_for_link establishes link
4799 * for copper adapters ONLY
4801 switch (hw->phy.media_type) {
4802 case e1000_media_type_copper:
4803 if (!hw->mac.get_link_status)
4805 case e1000_media_type_internal_serdes:
4806 hw->mac.ops.check_for_link(hw);
4807 link_active = !hw->mac.get_link_status;
4810 case e1000_media_type_unknown:
4814 if (((hw->mac.type == e1000_i210) ||
4815 (hw->mac.type == e1000_i211)) &&
4816 (hw->phy.id == I210_I_PHY_ID)) {
4817 if (!netif_carrier_ok(adapter->netdev)) {
4818 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4819 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4820 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4821 adapter->link_check_timeout = jiffies;
4828 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4831 u32 ctrl_ext, thstat;
4833 /* check for thermal sensor event on i350 copper only */
4834 if (hw->mac.type == e1000_i350) {
4835 thstat = rd32(E1000_THSTAT);
4836 ctrl_ext = rd32(E1000_CTRL_EXT);
4838 if ((hw->phy.media_type == e1000_media_type_copper) &&
4839 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4840 ret = !!(thstat & event);
4847 * igb_check_lvmmc - check for malformed packets received
4848 * and indicated in LVMMC register
4849 * @adapter: pointer to adapter
4851 static void igb_check_lvmmc(struct igb_adapter *adapter)
4853 struct e1000_hw *hw = &adapter->hw;
4856 lvmmc = rd32(E1000_LVMMC);
4858 if (unlikely(net_ratelimit())) {
4859 netdev_warn(adapter->netdev,
4860 "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4867 * igb_watchdog - Timer Call-back
4868 * @data: pointer to adapter cast into an unsigned long
4870 static void igb_watchdog(struct timer_list *t)
4872 struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
4873 /* Do the rest outside of interrupt context */
4874 schedule_work(&adapter->watchdog_task);
4877 static void igb_watchdog_task(struct work_struct *work)
4879 struct igb_adapter *adapter = container_of(work,
4882 struct e1000_hw *hw = &adapter->hw;
4883 struct e1000_phy_info *phy = &hw->phy;
4884 struct net_device *netdev = adapter->netdev;
4888 u16 phy_data, retry_count = 20;
4890 link = igb_has_link(adapter);
4892 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4893 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4894 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4899 /* Force link down if we have fiber to swap to */
4900 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4901 if (hw->phy.media_type == e1000_media_type_copper) {
4902 connsw = rd32(E1000_CONNSW);
4903 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4908 /* Perform a reset if the media type changed. */
4909 if (hw->dev_spec._82575.media_changed) {
4910 hw->dev_spec._82575.media_changed = false;
4911 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4914 /* Cancel scheduled suspend requests. */
4915 pm_runtime_resume(netdev->dev.parent);
4917 if (!netif_carrier_ok(netdev)) {
4920 hw->mac.ops.get_speed_and_duplex(hw,
4921 &adapter->link_speed,
4922 &adapter->link_duplex);
4924 ctrl = rd32(E1000_CTRL);
4925 /* Links status message must follow this format */
4927 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4929 adapter->link_speed,
4930 adapter->link_duplex == FULL_DUPLEX ?
4932 (ctrl & E1000_CTRL_TFCE) &&
4933 (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4934 (ctrl & E1000_CTRL_RFCE) ? "RX" :
4935 (ctrl & E1000_CTRL_TFCE) ? "TX" : "None");
4937 /* disable EEE if enabled */
4938 if ((adapter->flags & IGB_FLAG_EEE) &&
4939 (adapter->link_duplex == HALF_DUPLEX)) {
4940 dev_info(&adapter->pdev->dev,
4941 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4942 adapter->hw.dev_spec._82575.eee_disable = true;
4943 adapter->flags &= ~IGB_FLAG_EEE;
4946 /* check if SmartSpeed worked */
4947 igb_check_downshift(hw);
4948 if (phy->speed_downgraded)
4949 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4951 /* check for thermal sensor event */
4952 if (igb_thermal_sensor_event(hw,
4953 E1000_THSTAT_LINK_THROTTLE))
4954 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4956 /* adjust timeout factor according to speed/duplex */
4957 adapter->tx_timeout_factor = 1;
4958 switch (adapter->link_speed) {
4960 adapter->tx_timeout_factor = 14;
4963 /* maybe add some timeout factor ? */
4967 if (adapter->link_speed != SPEED_1000)
4970 /* wait for Remote receiver status OK */
4972 if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4974 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4978 goto retry_read_status;
4979 } else if (!retry_count) {
4980 dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4983 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4986 netif_carrier_on(netdev);
4988 igb_ping_all_vfs(adapter);
4989 igb_check_vf_rate_limit(adapter);
4991 /* link state has changed, schedule phy info update */
4992 if (!test_bit(__IGB_DOWN, &adapter->state))
4993 mod_timer(&adapter->phy_info_timer,
4994 round_jiffies(jiffies + 2 * HZ));
4997 if (netif_carrier_ok(netdev)) {
4998 adapter->link_speed = 0;
4999 adapter->link_duplex = 0;
5001 /* check for thermal sensor event */
5002 if (igb_thermal_sensor_event(hw,
5003 E1000_THSTAT_PWR_DOWN)) {
5004 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5007 /* Links status message must follow this format */
5008 netdev_info(netdev, "igb: %s NIC Link is Down\n",
5010 netif_carrier_off(netdev);
5012 igb_ping_all_vfs(adapter);
5014 /* link state has changed, schedule phy info update */
5015 if (!test_bit(__IGB_DOWN, &adapter->state))
5016 mod_timer(&adapter->phy_info_timer,
5017 round_jiffies(jiffies + 2 * HZ));
5019 /* link is down, time to check for alternate media */
5020 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5021 igb_check_swap_media(adapter);
5022 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5023 schedule_work(&adapter->reset_task);
5024 /* return immediately */
5028 pm_schedule_suspend(netdev->dev.parent,
5031 /* also check for alternate media here */
5032 } else if (!netif_carrier_ok(netdev) &&
5033 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5034 igb_check_swap_media(adapter);
5035 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5036 schedule_work(&adapter->reset_task);
5037 /* return immediately */
5043 spin_lock(&adapter->stats64_lock);
5044 igb_update_stats(adapter);
5045 spin_unlock(&adapter->stats64_lock);
5047 for (i = 0; i < adapter->num_tx_queues; i++) {
5048 struct igb_ring *tx_ring = adapter->tx_ring[i];
5049 if (!netif_carrier_ok(netdev)) {
5050 /* We've lost link, so the controller stops DMA,
5051 * but we've got queued Tx work that's never going
5052 * to get done, so reset controller to flush Tx.
5053 * (Do the reset outside of interrupt context).
5055 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5056 adapter->tx_timeout_count++;
5057 schedule_work(&adapter->reset_task);
5058 /* return immediately since reset is imminent */
5063 /* Force detection of hung controller every watchdog period */
5064 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5067 /* Cause software interrupt to ensure Rx ring is cleaned */
5068 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5071 for (i = 0; i < adapter->num_q_vectors; i++)
5072 eics |= adapter->q_vector[i]->eims_value;
5073 wr32(E1000_EICS, eics);
5075 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5078 igb_spoof_check(adapter);
5079 igb_ptp_rx_hang(adapter);
5080 igb_ptp_tx_hang(adapter);
5082 /* Check LVMMC register on i350/i354 only */
5083 if ((adapter->hw.mac.type == e1000_i350) ||
5084 (adapter->hw.mac.type == e1000_i354))
5085 igb_check_lvmmc(adapter);
5087 /* Reset the timer */
5088 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5089 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5090 mod_timer(&adapter->watchdog_timer,
5091 round_jiffies(jiffies + HZ));
5093 mod_timer(&adapter->watchdog_timer,
5094 round_jiffies(jiffies + 2 * HZ));
5098 enum latency_range {
5102 latency_invalid = 255
5106 * igb_update_ring_itr - update the dynamic ITR value based on packet size
5107 * @q_vector: pointer to q_vector
5109 * Stores a new ITR value based on strictly on packet size. This
5110 * algorithm is less sophisticated than that used in igb_update_itr,
5111 * due to the difficulty of synchronizing statistics across multiple
5112 * receive rings. The divisors and thresholds used by this function
5113 * were determined based on theoretical maximum wire speed and testing
5114 * data, in order to minimize response time while increasing bulk
5116 * This functionality is controlled by ethtool's coalescing settings.
5117 * NOTE: This function is called only when operating in a multiqueue
5118 * receive environment.
5120 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5122 int new_val = q_vector->itr_val;
5123 int avg_wire_size = 0;
5124 struct igb_adapter *adapter = q_vector->adapter;
5125 unsigned int packets;
5127 /* For non-gigabit speeds, just fix the interrupt rate at 4000
5128 * ints/sec - ITR timer value of 120 ticks.
5130 if (adapter->link_speed != SPEED_1000) {
5131 new_val = IGB_4K_ITR;
5135 packets = q_vector->rx.total_packets;
5137 avg_wire_size = q_vector->rx.total_bytes / packets;
5139 packets = q_vector->tx.total_packets;
5141 avg_wire_size = max_t(u32, avg_wire_size,
5142 q_vector->tx.total_bytes / packets);
5144 /* if avg_wire_size isn't set no work was done */
5148 /* Add 24 bytes to size to account for CRC, preamble, and gap */
5149 avg_wire_size += 24;
5151 /* Don't starve jumbo frames */
5152 avg_wire_size = min(avg_wire_size, 3000);
5154 /* Give a little boost to mid-size frames */
5155 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5156 new_val = avg_wire_size / 3;
5158 new_val = avg_wire_size / 2;
5160 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5161 if (new_val < IGB_20K_ITR &&
5162 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5163 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5164 new_val = IGB_20K_ITR;
5167 if (new_val != q_vector->itr_val) {
5168 q_vector->itr_val = new_val;
5169 q_vector->set_itr = 1;
5172 q_vector->rx.total_bytes = 0;
5173 q_vector->rx.total_packets = 0;
5174 q_vector->tx.total_bytes = 0;
5175 q_vector->tx.total_packets = 0;
5179 * igb_update_itr - update the dynamic ITR value based on statistics
5180 * @q_vector: pointer to q_vector
5181 * @ring_container: ring info to update the itr for
5183 * Stores a new ITR value based on packets and byte
5184 * counts during the last interrupt. The advantage of per interrupt
5185 * computation is faster updates and more accurate ITR for the current
5186 * traffic pattern. Constants in this function were computed
5187 * based on theoretical maximum wire speed and thresholds were set based
5188 * on testing data as well as attempting to minimize response time
5189 * while increasing bulk throughput.
5190 * This functionality is controlled by ethtool's coalescing settings.
5191 * NOTE: These calculations are only valid when operating in a single-
5192 * queue environment.
5194 static void igb_update_itr(struct igb_q_vector *q_vector,
5195 struct igb_ring_container *ring_container)
5197 unsigned int packets = ring_container->total_packets;
5198 unsigned int bytes = ring_container->total_bytes;
5199 u8 itrval = ring_container->itr;
5201 /* no packets, exit with status unchanged */
5206 case lowest_latency:
5207 /* handle TSO and jumbo frames */
5208 if (bytes/packets > 8000)
5209 itrval = bulk_latency;
5210 else if ((packets < 5) && (bytes > 512))
5211 itrval = low_latency;
5213 case low_latency: /* 50 usec aka 20000 ints/s */
5214 if (bytes > 10000) {
5215 /* this if handles the TSO accounting */
5216 if (bytes/packets > 8000)
5217 itrval = bulk_latency;
5218 else if ((packets < 10) || ((bytes/packets) > 1200))
5219 itrval = bulk_latency;
5220 else if ((packets > 35))
5221 itrval = lowest_latency;
5222 } else if (bytes/packets > 2000) {
5223 itrval = bulk_latency;
5224 } else if (packets <= 2 && bytes < 512) {
5225 itrval = lowest_latency;
5228 case bulk_latency: /* 250 usec aka 4000 ints/s */
5229 if (bytes > 25000) {
5231 itrval = low_latency;
5232 } else if (bytes < 1500) {
5233 itrval = low_latency;
5238 /* clear work counters since we have the values we need */
5239 ring_container->total_bytes = 0;
5240 ring_container->total_packets = 0;
5242 /* write updated itr to ring container */
5243 ring_container->itr = itrval;
5246 static void igb_set_itr(struct igb_q_vector *q_vector)
5248 struct igb_adapter *adapter = q_vector->adapter;
5249 u32 new_itr = q_vector->itr_val;
5252 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5253 if (adapter->link_speed != SPEED_1000) {
5255 new_itr = IGB_4K_ITR;
5259 igb_update_itr(q_vector, &q_vector->tx);
5260 igb_update_itr(q_vector, &q_vector->rx);
5262 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5264 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5265 if (current_itr == lowest_latency &&
5266 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5267 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5268 current_itr = low_latency;
5270 switch (current_itr) {
5271 /* counts and packets in update_itr are dependent on these numbers */
5272 case lowest_latency:
5273 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5276 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5279 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5286 if (new_itr != q_vector->itr_val) {
5287 /* this attempts to bias the interrupt rate towards Bulk
5288 * by adding intermediate steps when interrupt rate is
5291 new_itr = new_itr > q_vector->itr_val ?
5292 max((new_itr * q_vector->itr_val) /
5293 (new_itr + (q_vector->itr_val >> 2)),
5295 /* Don't write the value here; it resets the adapter's
5296 * internal timer, and causes us to delay far longer than
5297 * we should between interrupts. Instead, we write the ITR
5298 * value at the beginning of the next interrupt so the timing
5299 * ends up being correct.
5301 q_vector->itr_val = new_itr;
5302 q_vector->set_itr = 1;
5306 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5307 u32 type_tucmd, u32 mss_l4len_idx)
5309 struct e1000_adv_tx_context_desc *context_desc;
5310 u16 i = tx_ring->next_to_use;
5312 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5315 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5317 /* set bits to identify this as an advanced context descriptor */
5318 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5320 /* For 82575, context index must be unique per ring. */
5321 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5322 mss_l4len_idx |= tx_ring->reg_idx << 4;
5324 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5325 context_desc->seqnum_seed = 0;
5326 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5327 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5330 static int igb_tso(struct igb_ring *tx_ring,
5331 struct igb_tx_buffer *first,
5334 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5335 struct sk_buff *skb = first->skb;
5345 u32 paylen, l4_offset;
5348 if (skb->ip_summed != CHECKSUM_PARTIAL)
5351 if (!skb_is_gso(skb))
5354 err = skb_cow_head(skb, 0);
5358 ip.hdr = skb_network_header(skb);
5359 l4.hdr = skb_checksum_start(skb);
5361 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5362 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5364 /* initialize outer IP header fields */
5365 if (ip.v4->version == 4) {
5366 unsigned char *csum_start = skb_checksum_start(skb);
5367 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5369 /* IP header will have to cancel out any data that
5370 * is not a part of the outer IP header
5372 ip.v4->check = csum_fold(csum_partial(trans_start,
5373 csum_start - trans_start,
5375 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5378 first->tx_flags |= IGB_TX_FLAGS_TSO |
5382 ip.v6->payload_len = 0;
5383 first->tx_flags |= IGB_TX_FLAGS_TSO |
5387 /* determine offset of inner transport header */
5388 l4_offset = l4.hdr - skb->data;
5390 /* compute length of segmentation header */
5391 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5393 /* remove payload length from inner checksum */
5394 paylen = skb->len - l4_offset;
5395 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
5397 /* update gso size and bytecount with header size */
5398 first->gso_segs = skb_shinfo(skb)->gso_segs;
5399 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5402 mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5403 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5405 /* VLAN MACLEN IPLEN */
5406 vlan_macip_lens = l4.hdr - ip.hdr;
5407 vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5408 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5410 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5415 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5417 unsigned int offset = 0;
5419 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5421 return offset == skb_checksum_start_offset(skb);
5424 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5426 struct sk_buff *skb = first->skb;
5427 u32 vlan_macip_lens = 0;
5430 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5432 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5437 switch (skb->csum_offset) {
5438 case offsetof(struct tcphdr, check):
5439 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5441 case offsetof(struct udphdr, check):
5443 case offsetof(struct sctphdr, checksum):
5444 /* validate that this is actually an SCTP request */
5445 if (((first->protocol == htons(ETH_P_IP)) &&
5446 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5447 ((first->protocol == htons(ETH_P_IPV6)) &&
5448 igb_ipv6_csum_is_sctp(skb))) {
5449 type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5453 skb_checksum_help(skb);
5457 /* update TX checksum flag */
5458 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5459 vlan_macip_lens = skb_checksum_start_offset(skb) -
5460 skb_network_offset(skb);
5462 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5463 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5465 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5468 #define IGB_SET_FLAG(_input, _flag, _result) \
5469 ((_flag <= _result) ? \
5470 ((u32)(_input & _flag) * (_result / _flag)) : \
5471 ((u32)(_input & _flag) / (_flag / _result)))
5473 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5475 /* set type for advanced descriptor with frame checksum insertion */
5476 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5477 E1000_ADVTXD_DCMD_DEXT |
5478 E1000_ADVTXD_DCMD_IFCS;
5480 /* set HW vlan bit if vlan is present */
5481 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5482 (E1000_ADVTXD_DCMD_VLE));
5484 /* set segmentation bits for TSO */
5485 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5486 (E1000_ADVTXD_DCMD_TSE));
5488 /* set timestamp bit if present */
5489 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5490 (E1000_ADVTXD_MAC_TSTAMP));
5492 /* insert frame checksum */
5493 cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5498 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5499 union e1000_adv_tx_desc *tx_desc,
5500 u32 tx_flags, unsigned int paylen)
5502 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5504 /* 82575 requires a unique index per ring */
5505 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5506 olinfo_status |= tx_ring->reg_idx << 4;
5508 /* insert L4 checksum */
5509 olinfo_status |= IGB_SET_FLAG(tx_flags,
5511 (E1000_TXD_POPTS_TXSM << 8));
5513 /* insert IPv4 checksum */
5514 olinfo_status |= IGB_SET_FLAG(tx_flags,
5516 (E1000_TXD_POPTS_IXSM << 8));
5518 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5521 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5523 struct net_device *netdev = tx_ring->netdev;
5525 netif_stop_subqueue(netdev, tx_ring->queue_index);
5527 /* Herbert's original patch had:
5528 * smp_mb__after_netif_stop_queue();
5529 * but since that doesn't exist yet, just open code it.
5533 /* We need to check again in a case another CPU has just
5534 * made room available.
5536 if (igb_desc_unused(tx_ring) < size)
5540 netif_wake_subqueue(netdev, tx_ring->queue_index);
5542 u64_stats_update_begin(&tx_ring->tx_syncp2);
5543 tx_ring->tx_stats.restart_queue2++;
5544 u64_stats_update_end(&tx_ring->tx_syncp2);
5549 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5551 if (igb_desc_unused(tx_ring) >= size)
5553 return __igb_maybe_stop_tx(tx_ring, size);
5556 static int igb_tx_map(struct igb_ring *tx_ring,
5557 struct igb_tx_buffer *first,
5560 struct sk_buff *skb = first->skb;
5561 struct igb_tx_buffer *tx_buffer;
5562 union e1000_adv_tx_desc *tx_desc;
5563 struct skb_frag_struct *frag;
5565 unsigned int data_len, size;
5566 u32 tx_flags = first->tx_flags;
5567 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5568 u16 i = tx_ring->next_to_use;
5570 tx_desc = IGB_TX_DESC(tx_ring, i);
5572 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5574 size = skb_headlen(skb);
5575 data_len = skb->data_len;
5577 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5581 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5582 if (dma_mapping_error(tx_ring->dev, dma))
5585 /* record length, and DMA address */
5586 dma_unmap_len_set(tx_buffer, len, size);
5587 dma_unmap_addr_set(tx_buffer, dma, dma);
5589 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5591 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5592 tx_desc->read.cmd_type_len =
5593 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5597 if (i == tx_ring->count) {
5598 tx_desc = IGB_TX_DESC(tx_ring, 0);
5601 tx_desc->read.olinfo_status = 0;
5603 dma += IGB_MAX_DATA_PER_TXD;
5604 size -= IGB_MAX_DATA_PER_TXD;
5606 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5609 if (likely(!data_len))
5612 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5616 if (i == tx_ring->count) {
5617 tx_desc = IGB_TX_DESC(tx_ring, 0);
5620 tx_desc->read.olinfo_status = 0;
5622 size = skb_frag_size(frag);
5625 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5626 size, DMA_TO_DEVICE);
5628 tx_buffer = &tx_ring->tx_buffer_info[i];
5631 /* write last descriptor with RS and EOP bits */
5632 cmd_type |= size | IGB_TXD_DCMD;
5633 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5635 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5637 /* set the timestamp */
5638 first->time_stamp = jiffies;
5640 /* Force memory writes to complete before letting h/w know there
5641 * are new descriptors to fetch. (Only applicable for weak-ordered
5642 * memory model archs, such as IA-64).
5644 * We also need this memory barrier to make certain all of the
5645 * status bits have been updated before next_to_watch is written.
5649 /* set next_to_watch value indicating a packet is present */
5650 first->next_to_watch = tx_desc;
5653 if (i == tx_ring->count)
5656 tx_ring->next_to_use = i;
5658 /* Make sure there is space in the ring for the next send. */
5659 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5661 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5662 writel(i, tx_ring->tail);
5664 /* we need this if more than one processor can write to our tail
5665 * at a time, it synchronizes IO on IA64/Altix systems
5672 dev_err(tx_ring->dev, "TX DMA map failed\n");
5673 tx_buffer = &tx_ring->tx_buffer_info[i];
5675 /* clear dma mappings for failed tx_buffer_info map */
5676 while (tx_buffer != first) {
5677 if (dma_unmap_len(tx_buffer, len))
5678 dma_unmap_page(tx_ring->dev,
5679 dma_unmap_addr(tx_buffer, dma),
5680 dma_unmap_len(tx_buffer, len),
5682 dma_unmap_len_set(tx_buffer, len, 0);
5685 i += tx_ring->count;
5686 tx_buffer = &tx_ring->tx_buffer_info[i];
5689 if (dma_unmap_len(tx_buffer, len))
5690 dma_unmap_single(tx_ring->dev,
5691 dma_unmap_addr(tx_buffer, dma),
5692 dma_unmap_len(tx_buffer, len),
5694 dma_unmap_len_set(tx_buffer, len, 0);
5696 dev_kfree_skb_any(tx_buffer->skb);
5697 tx_buffer->skb = NULL;
5699 tx_ring->next_to_use = i;
5704 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5705 struct igb_ring *tx_ring)
5707 struct igb_tx_buffer *first;
5711 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5712 __be16 protocol = vlan_get_protocol(skb);
5715 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5716 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5717 * + 2 desc gap to keep tail from touching head,
5718 * + 1 desc for context descriptor,
5719 * otherwise try next time
5721 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5722 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5724 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5725 /* this is a hard error */
5726 return NETDEV_TX_BUSY;
5729 /* record the location of the first descriptor for this packet */
5730 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5732 first->bytecount = skb->len;
5733 first->gso_segs = 1;
5735 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5736 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5738 if (adapter->tstamp_config.tx_type & HWTSTAMP_TX_ON &&
5739 !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5741 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5742 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5744 adapter->ptp_tx_skb = skb_get(skb);
5745 adapter->ptp_tx_start = jiffies;
5746 if (adapter->hw.mac.type == e1000_82576)
5747 schedule_work(&adapter->ptp_tx_work);
5749 adapter->tx_hwtstamp_skipped++;
5753 skb_tx_timestamp(skb);
5755 if (skb_vlan_tag_present(skb)) {
5756 tx_flags |= IGB_TX_FLAGS_VLAN;
5757 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5760 /* record initial flags and protocol */
5761 first->tx_flags = tx_flags;
5762 first->protocol = protocol;
5764 tso = igb_tso(tx_ring, first, &hdr_len);
5768 igb_tx_csum(tx_ring, first);
5770 if (igb_tx_map(tx_ring, first, hdr_len))
5771 goto cleanup_tx_tstamp;
5773 return NETDEV_TX_OK;
5776 dev_kfree_skb_any(first->skb);
5779 if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
5780 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5782 dev_kfree_skb_any(adapter->ptp_tx_skb);
5783 adapter->ptp_tx_skb = NULL;
5784 if (adapter->hw.mac.type == e1000_82576)
5785 cancel_work_sync(&adapter->ptp_tx_work);
5786 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
5789 return NETDEV_TX_OK;
5792 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5793 struct sk_buff *skb)
5795 unsigned int r_idx = skb->queue_mapping;
5797 if (r_idx >= adapter->num_tx_queues)
5798 r_idx = r_idx % adapter->num_tx_queues;
5800 return adapter->tx_ring[r_idx];
5803 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5804 struct net_device *netdev)
5806 struct igb_adapter *adapter = netdev_priv(netdev);
5808 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5809 * in order to meet this minimum size requirement.
5811 if (skb_put_padto(skb, 17))
5812 return NETDEV_TX_OK;
5814 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5818 * igb_tx_timeout - Respond to a Tx Hang
5819 * @netdev: network interface device structure
5821 static void igb_tx_timeout(struct net_device *netdev)
5823 struct igb_adapter *adapter = netdev_priv(netdev);
5824 struct e1000_hw *hw = &adapter->hw;
5826 /* Do the reset outside of interrupt context */
5827 adapter->tx_timeout_count++;
5829 if (hw->mac.type >= e1000_82580)
5830 hw->dev_spec._82575.global_device_reset = true;
5832 schedule_work(&adapter->reset_task);
5834 (adapter->eims_enable_mask & ~adapter->eims_other));
5837 static void igb_reset_task(struct work_struct *work)
5839 struct igb_adapter *adapter;
5840 adapter = container_of(work, struct igb_adapter, reset_task);
5843 netdev_err(adapter->netdev, "Reset adapter\n");
5844 igb_reinit_locked(adapter);
5848 * igb_get_stats64 - Get System Network Statistics
5849 * @netdev: network interface device structure
5850 * @stats: rtnl_link_stats64 pointer
5852 static void igb_get_stats64(struct net_device *netdev,
5853 struct rtnl_link_stats64 *stats)
5855 struct igb_adapter *adapter = netdev_priv(netdev);
5857 spin_lock(&adapter->stats64_lock);
5858 igb_update_stats(adapter);
5859 memcpy(stats, &adapter->stats64, sizeof(*stats));
5860 spin_unlock(&adapter->stats64_lock);
5864 * igb_change_mtu - Change the Maximum Transfer Unit
5865 * @netdev: network interface device structure
5866 * @new_mtu: new value for maximum frame size
5868 * Returns 0 on success, negative on failure
5870 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5872 struct igb_adapter *adapter = netdev_priv(netdev);
5873 struct pci_dev *pdev = adapter->pdev;
5874 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5876 /* adjust max frame to be at least the size of a standard frame */
5877 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5878 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5880 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5881 usleep_range(1000, 2000);
5883 /* igb_down has a dependency on max_frame_size */
5884 adapter->max_frame_size = max_frame;
5886 if (netif_running(netdev))
5889 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5890 netdev->mtu, new_mtu);
5891 netdev->mtu = new_mtu;
5893 if (netif_running(netdev))
5898 clear_bit(__IGB_RESETTING, &adapter->state);
5904 * igb_update_stats - Update the board statistics counters
5905 * @adapter: board private structure
5907 void igb_update_stats(struct igb_adapter *adapter)
5909 struct rtnl_link_stats64 *net_stats = &adapter->stats64;
5910 struct e1000_hw *hw = &adapter->hw;
5911 struct pci_dev *pdev = adapter->pdev;
5916 u64 _bytes, _packets;
5918 /* Prevent stats update while adapter is being reset, or if the pci
5919 * connection is down.
5921 if (adapter->link_speed == 0)
5923 if (pci_channel_offline(pdev))
5930 for (i = 0; i < adapter->num_rx_queues; i++) {
5931 struct igb_ring *ring = adapter->rx_ring[i];
5932 u32 rqdpc = rd32(E1000_RQDPC(i));
5933 if (hw->mac.type >= e1000_i210)
5934 wr32(E1000_RQDPC(i), 0);
5937 ring->rx_stats.drops += rqdpc;
5938 net_stats->rx_fifo_errors += rqdpc;
5942 start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5943 _bytes = ring->rx_stats.bytes;
5944 _packets = ring->rx_stats.packets;
5945 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5947 packets += _packets;
5950 net_stats->rx_bytes = bytes;
5951 net_stats->rx_packets = packets;
5955 for (i = 0; i < adapter->num_tx_queues; i++) {
5956 struct igb_ring *ring = adapter->tx_ring[i];
5958 start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5959 _bytes = ring->tx_stats.bytes;
5960 _packets = ring->tx_stats.packets;
5961 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5963 packets += _packets;
5965 net_stats->tx_bytes = bytes;
5966 net_stats->tx_packets = packets;
5969 /* read stats registers */
5970 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5971 adapter->stats.gprc += rd32(E1000_GPRC);
5972 adapter->stats.gorc += rd32(E1000_GORCL);
5973 rd32(E1000_GORCH); /* clear GORCL */
5974 adapter->stats.bprc += rd32(E1000_BPRC);
5975 adapter->stats.mprc += rd32(E1000_MPRC);
5976 adapter->stats.roc += rd32(E1000_ROC);
5978 adapter->stats.prc64 += rd32(E1000_PRC64);
5979 adapter->stats.prc127 += rd32(E1000_PRC127);
5980 adapter->stats.prc255 += rd32(E1000_PRC255);
5981 adapter->stats.prc511 += rd32(E1000_PRC511);
5982 adapter->stats.prc1023 += rd32(E1000_PRC1023);
5983 adapter->stats.prc1522 += rd32(E1000_PRC1522);
5984 adapter->stats.symerrs += rd32(E1000_SYMERRS);
5985 adapter->stats.sec += rd32(E1000_SEC);
5987 mpc = rd32(E1000_MPC);
5988 adapter->stats.mpc += mpc;
5989 net_stats->rx_fifo_errors += mpc;
5990 adapter->stats.scc += rd32(E1000_SCC);
5991 adapter->stats.ecol += rd32(E1000_ECOL);
5992 adapter->stats.mcc += rd32(E1000_MCC);
5993 adapter->stats.latecol += rd32(E1000_LATECOL);
5994 adapter->stats.dc += rd32(E1000_DC);
5995 adapter->stats.rlec += rd32(E1000_RLEC);
5996 adapter->stats.xonrxc += rd32(E1000_XONRXC);
5997 adapter->stats.xontxc += rd32(E1000_XONTXC);
5998 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5999 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6000 adapter->stats.fcruc += rd32(E1000_FCRUC);
6001 adapter->stats.gptc += rd32(E1000_GPTC);
6002 adapter->stats.gotc += rd32(E1000_GOTCL);
6003 rd32(E1000_GOTCH); /* clear GOTCL */
6004 adapter->stats.rnbc += rd32(E1000_RNBC);
6005 adapter->stats.ruc += rd32(E1000_RUC);
6006 adapter->stats.rfc += rd32(E1000_RFC);
6007 adapter->stats.rjc += rd32(E1000_RJC);
6008 adapter->stats.tor += rd32(E1000_TORH);
6009 adapter->stats.tot += rd32(E1000_TOTH);
6010 adapter->stats.tpr += rd32(E1000_TPR);
6012 adapter->stats.ptc64 += rd32(E1000_PTC64);
6013 adapter->stats.ptc127 += rd32(E1000_PTC127);
6014 adapter->stats.ptc255 += rd32(E1000_PTC255);
6015 adapter->stats.ptc511 += rd32(E1000_PTC511);
6016 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6017 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6019 adapter->stats.mptc += rd32(E1000_MPTC);
6020 adapter->stats.bptc += rd32(E1000_BPTC);
6022 adapter->stats.tpt += rd32(E1000_TPT);
6023 adapter->stats.colc += rd32(E1000_COLC);
6025 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6026 /* read internal phy specific stats */
6027 reg = rd32(E1000_CTRL_EXT);
6028 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6029 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6031 /* this stat has invalid values on i210/i211 */
6032 if ((hw->mac.type != e1000_i210) &&
6033 (hw->mac.type != e1000_i211))
6034 adapter->stats.tncrs += rd32(E1000_TNCRS);
6037 adapter->stats.tsctc += rd32(E1000_TSCTC);
6038 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6040 adapter->stats.iac += rd32(E1000_IAC);
6041 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6042 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6043 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6044 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6045 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6046 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6047 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6048 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6050 /* Fill out the OS statistics structure */
6051 net_stats->multicast = adapter->stats.mprc;
6052 net_stats->collisions = adapter->stats.colc;
6056 /* RLEC on some newer hardware can be incorrect so build
6057 * our own version based on RUC and ROC
6059 net_stats->rx_errors = adapter->stats.rxerrc +
6060 adapter->stats.crcerrs + adapter->stats.algnerrc +
6061 adapter->stats.ruc + adapter->stats.roc +
6062 adapter->stats.cexterr;
6063 net_stats->rx_length_errors = adapter->stats.ruc +
6065 net_stats->rx_crc_errors = adapter->stats.crcerrs;
6066 net_stats->rx_frame_errors = adapter->stats.algnerrc;
6067 net_stats->rx_missed_errors = adapter->stats.mpc;
6070 net_stats->tx_errors = adapter->stats.ecol +
6071 adapter->stats.latecol;
6072 net_stats->tx_aborted_errors = adapter->stats.ecol;
6073 net_stats->tx_window_errors = adapter->stats.latecol;
6074 net_stats->tx_carrier_errors = adapter->stats.tncrs;
6076 /* Tx Dropped needs to be maintained elsewhere */
6078 /* Management Stats */
6079 adapter->stats.mgptc += rd32(E1000_MGTPTC);
6080 adapter->stats.mgprc += rd32(E1000_MGTPRC);
6081 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6084 reg = rd32(E1000_MANC);
6085 if (reg & E1000_MANC_EN_BMC2OS) {
6086 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6087 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6088 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6089 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6093 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6095 struct e1000_hw *hw = &adapter->hw;
6096 struct ptp_clock_event event;
6097 struct timespec64 ts;
6098 u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
6100 if (tsicr & TSINTR_SYS_WRAP) {
6101 event.type = PTP_CLOCK_PPS;
6102 if (adapter->ptp_caps.pps)
6103 ptp_clock_event(adapter->ptp_clock, &event);
6104 ack |= TSINTR_SYS_WRAP;
6107 if (tsicr & E1000_TSICR_TXTS) {
6108 /* retrieve hardware timestamp */
6109 schedule_work(&adapter->ptp_tx_work);
6110 ack |= E1000_TSICR_TXTS;
6113 if (tsicr & TSINTR_TT0) {
6114 spin_lock(&adapter->tmreg_lock);
6115 ts = timespec64_add(adapter->perout[0].start,
6116 adapter->perout[0].period);
6117 /* u32 conversion of tv_sec is safe until y2106 */
6118 wr32(E1000_TRGTTIML0, ts.tv_nsec);
6119 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
6120 tsauxc = rd32(E1000_TSAUXC);
6121 tsauxc |= TSAUXC_EN_TT0;
6122 wr32(E1000_TSAUXC, tsauxc);
6123 adapter->perout[0].start = ts;
6124 spin_unlock(&adapter->tmreg_lock);
6128 if (tsicr & TSINTR_TT1) {
6129 spin_lock(&adapter->tmreg_lock);
6130 ts = timespec64_add(adapter->perout[1].start,
6131 adapter->perout[1].period);
6132 wr32(E1000_TRGTTIML1, ts.tv_nsec);
6133 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
6134 tsauxc = rd32(E1000_TSAUXC);
6135 tsauxc |= TSAUXC_EN_TT1;
6136 wr32(E1000_TSAUXC, tsauxc);
6137 adapter->perout[1].start = ts;
6138 spin_unlock(&adapter->tmreg_lock);
6142 if (tsicr & TSINTR_AUTT0) {
6143 nsec = rd32(E1000_AUXSTMPL0);
6144 sec = rd32(E1000_AUXSTMPH0);
6145 event.type = PTP_CLOCK_EXTTS;
6147 event.timestamp = sec * 1000000000ULL + nsec;
6148 ptp_clock_event(adapter->ptp_clock, &event);
6149 ack |= TSINTR_AUTT0;
6152 if (tsicr & TSINTR_AUTT1) {
6153 nsec = rd32(E1000_AUXSTMPL1);
6154 sec = rd32(E1000_AUXSTMPH1);
6155 event.type = PTP_CLOCK_EXTTS;
6157 event.timestamp = sec * 1000000000ULL + nsec;
6158 ptp_clock_event(adapter->ptp_clock, &event);
6159 ack |= TSINTR_AUTT1;
6162 /* acknowledge the interrupts */
6163 wr32(E1000_TSICR, ack);
6166 static irqreturn_t igb_msix_other(int irq, void *data)
6168 struct igb_adapter *adapter = data;
6169 struct e1000_hw *hw = &adapter->hw;
6170 u32 icr = rd32(E1000_ICR);
6171 /* reading ICR causes bit 31 of EICR to be cleared */
6173 if (icr & E1000_ICR_DRSTA)
6174 schedule_work(&adapter->reset_task);
6176 if (icr & E1000_ICR_DOUTSYNC) {
6177 /* HW is reporting DMA is out of sync */
6178 adapter->stats.doosync++;
6179 /* The DMA Out of Sync is also indication of a spoof event
6180 * in IOV mode. Check the Wrong VM Behavior register to
6181 * see if it is really a spoof event.
6183 igb_check_wvbr(adapter);
6186 /* Check for a mailbox event */
6187 if (icr & E1000_ICR_VMMB)
6188 igb_msg_task(adapter);
6190 if (icr & E1000_ICR_LSC) {
6191 hw->mac.get_link_status = 1;
6192 /* guard against interrupt when we're going down */
6193 if (!test_bit(__IGB_DOWN, &adapter->state))
6194 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6197 if (icr & E1000_ICR_TS)
6198 igb_tsync_interrupt(adapter);
6200 wr32(E1000_EIMS, adapter->eims_other);
6205 static void igb_write_itr(struct igb_q_vector *q_vector)
6207 struct igb_adapter *adapter = q_vector->adapter;
6208 u32 itr_val = q_vector->itr_val & 0x7FFC;
6210 if (!q_vector->set_itr)
6216 if (adapter->hw.mac.type == e1000_82575)
6217 itr_val |= itr_val << 16;
6219 itr_val |= E1000_EITR_CNT_IGNR;
6221 writel(itr_val, q_vector->itr_register);
6222 q_vector->set_itr = 0;
6225 static irqreturn_t igb_msix_ring(int irq, void *data)
6227 struct igb_q_vector *q_vector = data;
6229 /* Write the ITR value calculated from the previous interrupt. */
6230 igb_write_itr(q_vector);
6232 napi_schedule(&q_vector->napi);
6237 #ifdef CONFIG_IGB_DCA
6238 static void igb_update_tx_dca(struct igb_adapter *adapter,
6239 struct igb_ring *tx_ring,
6242 struct e1000_hw *hw = &adapter->hw;
6243 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6245 if (hw->mac.type != e1000_82575)
6246 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6248 /* We can enable relaxed ordering for reads, but not writes when
6249 * DCA is enabled. This is due to a known issue in some chipsets
6250 * which will cause the DCA tag to be cleared.
6252 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6253 E1000_DCA_TXCTRL_DATA_RRO_EN |
6254 E1000_DCA_TXCTRL_DESC_DCA_EN;
6256 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6259 static void igb_update_rx_dca(struct igb_adapter *adapter,
6260 struct igb_ring *rx_ring,
6263 struct e1000_hw *hw = &adapter->hw;
6264 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6266 if (hw->mac.type != e1000_82575)
6267 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6269 /* We can enable relaxed ordering for reads, but not writes when
6270 * DCA is enabled. This is due to a known issue in some chipsets
6271 * which will cause the DCA tag to be cleared.
6273 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6274 E1000_DCA_RXCTRL_DESC_DCA_EN;
6276 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6279 static void igb_update_dca(struct igb_q_vector *q_vector)
6281 struct igb_adapter *adapter = q_vector->adapter;
6282 int cpu = get_cpu();
6284 if (q_vector->cpu == cpu)
6287 if (q_vector->tx.ring)
6288 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6290 if (q_vector->rx.ring)
6291 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6293 q_vector->cpu = cpu;
6298 static void igb_setup_dca(struct igb_adapter *adapter)
6300 struct e1000_hw *hw = &adapter->hw;
6303 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6306 /* Always use CB2 mode, difference is masked in the CB driver. */
6307 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6309 for (i = 0; i < adapter->num_q_vectors; i++) {
6310 adapter->q_vector[i]->cpu = -1;
6311 igb_update_dca(adapter->q_vector[i]);
6315 static int __igb_notify_dca(struct device *dev, void *data)
6317 struct net_device *netdev = dev_get_drvdata(dev);
6318 struct igb_adapter *adapter = netdev_priv(netdev);
6319 struct pci_dev *pdev = adapter->pdev;
6320 struct e1000_hw *hw = &adapter->hw;
6321 unsigned long event = *(unsigned long *)data;
6324 case DCA_PROVIDER_ADD:
6325 /* if already enabled, don't do it again */
6326 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6328 if (dca_add_requester(dev) == 0) {
6329 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6330 dev_info(&pdev->dev, "DCA enabled\n");
6331 igb_setup_dca(adapter);
6334 /* Fall Through since DCA is disabled. */
6335 case DCA_PROVIDER_REMOVE:
6336 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6337 /* without this a class_device is left
6338 * hanging around in the sysfs model
6340 dca_remove_requester(dev);
6341 dev_info(&pdev->dev, "DCA disabled\n");
6342 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6343 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6351 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6356 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6359 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6361 #endif /* CONFIG_IGB_DCA */
6363 #ifdef CONFIG_PCI_IOV
6364 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6366 unsigned char mac_addr[ETH_ALEN];
6368 eth_zero_addr(mac_addr);
6369 igb_set_vf_mac(adapter, vf, mac_addr);
6371 /* By default spoof check is enabled for all VFs */
6372 adapter->vf_data[vf].spoofchk_enabled = true;
6378 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6380 struct e1000_hw *hw = &adapter->hw;
6384 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6385 ping = E1000_PF_CONTROL_MSG;
6386 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6387 ping |= E1000_VT_MSGTYPE_CTS;
6388 igb_write_mbx(hw, &ping, 1, i);
6392 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6394 struct e1000_hw *hw = &adapter->hw;
6395 u32 vmolr = rd32(E1000_VMOLR(vf));
6396 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6398 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6399 IGB_VF_FLAG_MULTI_PROMISC);
6400 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6402 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6403 vmolr |= E1000_VMOLR_MPME;
6404 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6405 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6407 /* if we have hashes and we are clearing a multicast promisc
6408 * flag we need to write the hashes to the MTA as this step
6409 * was previously skipped
6411 if (vf_data->num_vf_mc_hashes > 30) {
6412 vmolr |= E1000_VMOLR_MPME;
6413 } else if (vf_data->num_vf_mc_hashes) {
6416 vmolr |= E1000_VMOLR_ROMPE;
6417 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6418 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6422 wr32(E1000_VMOLR(vf), vmolr);
6424 /* there are flags left unprocessed, likely not supported */
6425 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6431 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6432 u32 *msgbuf, u32 vf)
6434 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6435 u16 *hash_list = (u16 *)&msgbuf[1];
6436 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6439 /* salt away the number of multicast addresses assigned
6440 * to this VF for later use to restore when the PF multi cast
6443 vf_data->num_vf_mc_hashes = n;
6445 /* only up to 30 hash values supported */
6449 /* store the hashes for later use */
6450 for (i = 0; i < n; i++)
6451 vf_data->vf_mc_hashes[i] = hash_list[i];
6453 /* Flush and reset the mta with the new values */
6454 igb_set_rx_mode(adapter->netdev);
6459 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6461 struct e1000_hw *hw = &adapter->hw;
6462 struct vf_data_storage *vf_data;
6465 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6466 u32 vmolr = rd32(E1000_VMOLR(i));
6468 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6470 vf_data = &adapter->vf_data[i];
6472 if ((vf_data->num_vf_mc_hashes > 30) ||
6473 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6474 vmolr |= E1000_VMOLR_MPME;
6475 } else if (vf_data->num_vf_mc_hashes) {
6476 vmolr |= E1000_VMOLR_ROMPE;
6477 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6478 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6480 wr32(E1000_VMOLR(i), vmolr);
6484 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6486 struct e1000_hw *hw = &adapter->hw;
6487 u32 pool_mask, vlvf_mask, i;
6489 /* create mask for VF and other pools */
6490 pool_mask = E1000_VLVF_POOLSEL_MASK;
6491 vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6493 /* drop PF from pool bits */
6494 pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6495 adapter->vfs_allocated_count);
6497 /* Find the vlan filter for this id */
6498 for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6499 u32 vlvf = rd32(E1000_VLVF(i));
6500 u32 vfta_mask, vid, vfta;
6502 /* remove the vf from the pool */
6503 if (!(vlvf & vlvf_mask))
6506 /* clear out bit from VLVF */
6509 /* if other pools are present, just remove ourselves */
6510 if (vlvf & pool_mask)
6513 /* if PF is present, leave VFTA */
6514 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6517 vid = vlvf & E1000_VLVF_VLANID_MASK;
6518 vfta_mask = BIT(vid % 32);
6520 /* clear bit from VFTA */
6521 vfta = adapter->shadow_vfta[vid / 32];
6522 if (vfta & vfta_mask)
6523 hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6525 /* clear pool selection enable */
6526 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6527 vlvf &= E1000_VLVF_POOLSEL_MASK;
6531 /* clear pool bits */
6532 wr32(E1000_VLVF(i), vlvf);
6536 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6541 /* short cut the special case */
6545 /* Search for the VLAN id in the VLVF entries */
6546 for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6547 vlvf = rd32(E1000_VLVF(idx));
6548 if ((vlvf & VLAN_VID_MASK) == vlan)
6555 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6557 struct e1000_hw *hw = &adapter->hw;
6561 idx = igb_find_vlvf_entry(hw, vid);
6565 /* See if any other pools are set for this VLAN filter
6566 * entry other than the PF.
6568 pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6569 bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6570 bits &= rd32(E1000_VLVF(idx));
6572 /* Disable the filter so this falls into the default pool. */
6574 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6575 wr32(E1000_VLVF(idx), BIT(pf_id));
6577 wr32(E1000_VLVF(idx), 0);
6581 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6584 int pf_id = adapter->vfs_allocated_count;
6585 struct e1000_hw *hw = &adapter->hw;
6588 /* If VLAN overlaps with one the PF is currently monitoring make
6589 * sure that we are able to allocate a VLVF entry. This may be
6590 * redundant but it guarantees PF will maintain visibility to
6593 if (add && test_bit(vid, adapter->active_vlans)) {
6594 err = igb_vfta_set(hw, vid, pf_id, true, false);
6599 err = igb_vfta_set(hw, vid, vf, add, false);
6604 /* If we failed to add the VF VLAN or we are removing the VF VLAN
6605 * we may need to drop the PF pool bit in order to allow us to free
6606 * up the VLVF resources.
6608 if (test_bit(vid, adapter->active_vlans) ||
6609 (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6610 igb_update_pf_vlvf(adapter, vid);
6615 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6617 struct e1000_hw *hw = &adapter->hw;
6620 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6622 wr32(E1000_VMVIR(vf), 0);
6625 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6630 err = igb_set_vf_vlan(adapter, vlan, true, vf);
6634 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6635 igb_set_vmolr(adapter, vf, !vlan);
6637 /* revoke access to previous VLAN */
6638 if (vlan != adapter->vf_data[vf].pf_vlan)
6639 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6642 adapter->vf_data[vf].pf_vlan = vlan;
6643 adapter->vf_data[vf].pf_qos = qos;
6644 igb_set_vf_vlan_strip(adapter, vf, true);
6645 dev_info(&adapter->pdev->dev,
6646 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6647 if (test_bit(__IGB_DOWN, &adapter->state)) {
6648 dev_warn(&adapter->pdev->dev,
6649 "The VF VLAN has been set, but the PF device is not up.\n");
6650 dev_warn(&adapter->pdev->dev,
6651 "Bring the PF device up before attempting to use the VF device.\n");
6657 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6659 /* Restore tagless access via VLAN 0 */
6660 igb_set_vf_vlan(adapter, 0, true, vf);
6662 igb_set_vmvir(adapter, 0, vf);
6663 igb_set_vmolr(adapter, vf, true);
6665 /* Remove any PF assigned VLAN */
6666 if (adapter->vf_data[vf].pf_vlan)
6667 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6670 adapter->vf_data[vf].pf_vlan = 0;
6671 adapter->vf_data[vf].pf_qos = 0;
6672 igb_set_vf_vlan_strip(adapter, vf, false);
6677 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
6678 u16 vlan, u8 qos, __be16 vlan_proto)
6680 struct igb_adapter *adapter = netdev_priv(netdev);
6682 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6685 if (vlan_proto != htons(ETH_P_8021Q))
6686 return -EPROTONOSUPPORT;
6688 return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6689 igb_disable_port_vlan(adapter, vf);
6692 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6694 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6695 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6698 if (adapter->vf_data[vf].pf_vlan)
6701 /* VLAN 0 is a special case, don't allow it to be removed */
6705 ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6707 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6711 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6713 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6715 /* clear flags - except flag that indicates PF has set the MAC */
6716 vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6717 vf_data->last_nack = jiffies;
6719 /* reset vlans for device */
6720 igb_clear_vf_vfta(adapter, vf);
6721 igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6722 igb_set_vmvir(adapter, vf_data->pf_vlan |
6723 (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6724 igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6725 igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6727 /* reset multicast table array for vf */
6728 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6730 /* Flush and reset the mta with the new values */
6731 igb_set_rx_mode(adapter->netdev);
6734 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6736 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6738 /* clear mac address as we were hotplug removed/added */
6739 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6740 eth_zero_addr(vf_mac);
6742 /* process remaining reset events */
6743 igb_vf_reset(adapter, vf);
6746 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6748 struct e1000_hw *hw = &adapter->hw;
6749 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6751 u8 *addr = (u8 *)(&msgbuf[1]);
6753 /* process all the same items cleared in a function level reset */
6754 igb_vf_reset(adapter, vf);
6756 /* set vf mac address */
6757 igb_set_vf_mac(adapter, vf, vf_mac);
6759 /* enable transmit and receive for vf */
6760 reg = rd32(E1000_VFTE);
6761 wr32(E1000_VFTE, reg | BIT(vf));
6762 reg = rd32(E1000_VFRE);
6763 wr32(E1000_VFRE, reg | BIT(vf));
6765 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6767 /* reply to reset with ack and vf mac address */
6768 if (!is_zero_ether_addr(vf_mac)) {
6769 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6770 memcpy(addr, vf_mac, ETH_ALEN);
6772 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6774 igb_write_mbx(hw, msgbuf, 3, vf);
6777 static void igb_flush_mac_table(struct igb_adapter *adapter)
6779 struct e1000_hw *hw = &adapter->hw;
6782 for (i = 0; i < hw->mac.rar_entry_count; i++) {
6783 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
6784 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
6785 adapter->mac_table[i].queue = 0;
6786 igb_rar_set_index(adapter, i);
6790 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
6792 struct e1000_hw *hw = &adapter->hw;
6793 /* do not count rar entries reserved for VFs MAC addresses */
6794 int rar_entries = hw->mac.rar_entry_count -
6795 adapter->vfs_allocated_count;
6798 for (i = 0; i < rar_entries; i++) {
6799 /* do not count default entries */
6800 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
6803 /* do not count "in use" entries for different queues */
6804 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
6805 (adapter->mac_table[i].queue != queue))
6814 /* Set default MAC address for the PF in the first RAR entry */
6815 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
6817 struct igb_mac_addr *mac_table = &adapter->mac_table[0];
6819 ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
6820 mac_table->queue = adapter->vfs_allocated_count;
6821 mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
6823 igb_rar_set_index(adapter, 0);
6826 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
6829 struct e1000_hw *hw = &adapter->hw;
6830 int rar_entries = hw->mac.rar_entry_count -
6831 adapter->vfs_allocated_count;
6834 if (is_zero_ether_addr(addr))
6837 /* Search for the first empty entry in the MAC table.
6838 * Do not touch entries at the end of the table reserved for the VF MAC
6841 for (i = 0; i < rar_entries; i++) {
6842 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
6845 ether_addr_copy(adapter->mac_table[i].addr, addr);
6846 adapter->mac_table[i].queue = queue;
6847 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE;
6849 igb_rar_set_index(adapter, i);
6856 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
6859 struct e1000_hw *hw = &adapter->hw;
6860 int rar_entries = hw->mac.rar_entry_count -
6861 adapter->vfs_allocated_count;
6864 if (is_zero_ether_addr(addr))
6867 /* Search for matching entry in the MAC table based on given address
6868 * and queue. Do not touch entries at the end of the table reserved
6869 * for the VF MAC addresses.
6871 for (i = 0; i < rar_entries; i++) {
6872 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
6874 if (adapter->mac_table[i].queue != queue)
6876 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
6879 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
6880 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
6881 adapter->mac_table[i].queue = 0;
6883 igb_rar_set_index(adapter, i);
6890 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
6892 struct igb_adapter *adapter = netdev_priv(netdev);
6895 ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
6897 return min_t(int, ret, 0);
6900 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
6902 struct igb_adapter *adapter = netdev_priv(netdev);
6904 igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
6909 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
6910 const u32 info, const u8 *addr)
6912 struct pci_dev *pdev = adapter->pdev;
6913 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6914 struct list_head *pos;
6915 struct vf_mac_filter *entry = NULL;
6919 case E1000_VF_MAC_FILTER_CLR:
6920 /* remove all unicast MAC filters related to the current VF */
6921 list_for_each(pos, &adapter->vf_macs.l) {
6922 entry = list_entry(pos, struct vf_mac_filter, l);
6923 if (entry->vf == vf) {
6926 igb_del_mac_filter(adapter, entry->vf_mac, vf);
6930 case E1000_VF_MAC_FILTER_ADD:
6931 if (vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) {
6932 dev_warn(&pdev->dev,
6933 "VF %d requested MAC filter but is administratively denied\n",
6938 if (!is_valid_ether_addr(addr)) {
6939 dev_warn(&pdev->dev,
6940 "VF %d attempted to set invalid MAC filter\n",
6945 /* try to find empty slot in the list */
6946 list_for_each(pos, &adapter->vf_macs.l) {
6947 entry = list_entry(pos, struct vf_mac_filter, l);
6952 if (entry && entry->free) {
6953 entry->free = false;
6955 ether_addr_copy(entry->vf_mac, addr);
6957 ret = igb_add_mac_filter(adapter, addr, vf);
6958 ret = min_t(int, ret, 0);
6964 dev_warn(&pdev->dev,
6965 "VF %d has requested MAC filter but there is no space for it\n",
6976 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6978 struct pci_dev *pdev = adapter->pdev;
6979 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6980 u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
6982 /* The VF MAC Address is stored in a packed array of bytes
6983 * starting at the second 32 bit word of the msg array
6985 unsigned char *addr = (unsigned char *)&msg[1];
6989 if (vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) {
6990 dev_warn(&pdev->dev,
6991 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6996 if (!is_valid_ether_addr(addr)) {
6997 dev_warn(&pdev->dev,
6998 "VF %d attempted to set invalid MAC\n",
7003 ret = igb_set_vf_mac(adapter, vf, addr);
7005 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7011 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7013 struct e1000_hw *hw = &adapter->hw;
7014 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7015 u32 msg = E1000_VT_MSGTYPE_NACK;
7017 /* if device isn't clear to send it shouldn't be reading either */
7018 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7019 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7020 igb_write_mbx(hw, &msg, 1, vf);
7021 vf_data->last_nack = jiffies;
7025 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7027 struct pci_dev *pdev = adapter->pdev;
7028 u32 msgbuf[E1000_VFMAILBOX_SIZE];
7029 struct e1000_hw *hw = &adapter->hw;
7030 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7033 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7036 /* if receive failed revoke VF CTS stats and restart init */
7037 dev_err(&pdev->dev, "Error receiving message from VF\n");
7038 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7039 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7044 /* this is a message we already processed, do nothing */
7045 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7048 /* until the vf completes a reset it should not be
7049 * allowed to start any configuration.
7051 if (msgbuf[0] == E1000_VF_RESET) {
7052 /* unlocks mailbox */
7053 igb_vf_reset_msg(adapter, vf);
7057 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7058 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7064 switch ((msgbuf[0] & 0xFFFF)) {
7065 case E1000_VF_SET_MAC_ADDR:
7066 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7068 case E1000_VF_SET_PROMISC:
7069 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7071 case E1000_VF_SET_MULTICAST:
7072 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7074 case E1000_VF_SET_LPE:
7075 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7077 case E1000_VF_SET_VLAN:
7079 if (vf_data->pf_vlan)
7080 dev_warn(&pdev->dev,
7081 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7084 retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7087 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7092 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7094 /* notify the VF of the results of what it sent us */
7096 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7098 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7100 /* unlocks mailbox */
7101 igb_write_mbx(hw, msgbuf, 1, vf);
7105 igb_unlock_mbx(hw, vf);
7108 static void igb_msg_task(struct igb_adapter *adapter)
7110 struct e1000_hw *hw = &adapter->hw;
7113 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7114 /* process any reset requests */
7115 if (!igb_check_for_rst(hw, vf))
7116 igb_vf_reset_event(adapter, vf);
7118 /* process any messages pending */
7119 if (!igb_check_for_msg(hw, vf))
7120 igb_rcv_msg_from_vf(adapter, vf);
7122 /* process any acks */
7123 if (!igb_check_for_ack(hw, vf))
7124 igb_rcv_ack_from_vf(adapter, vf);
7129 * igb_set_uta - Set unicast filter table address
7130 * @adapter: board private structure
7131 * @set: boolean indicating if we are setting or clearing bits
7133 * The unicast table address is a register array of 32-bit registers.
7134 * The table is meant to be used in a way similar to how the MTA is used
7135 * however due to certain limitations in the hardware it is necessary to
7136 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7137 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
7139 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7141 struct e1000_hw *hw = &adapter->hw;
7142 u32 uta = set ? ~0 : 0;
7145 /* we only need to do this if VMDq is enabled */
7146 if (!adapter->vfs_allocated_count)
7149 for (i = hw->mac.uta_reg_count; i--;)
7150 array_wr32(E1000_UTA, i, uta);
7154 * igb_intr_msi - Interrupt Handler
7155 * @irq: interrupt number
7156 * @data: pointer to a network interface device structure
7158 static irqreturn_t igb_intr_msi(int irq, void *data)
7160 struct igb_adapter *adapter = data;
7161 struct igb_q_vector *q_vector = adapter->q_vector[0];
7162 struct e1000_hw *hw = &adapter->hw;
7163 /* read ICR disables interrupts using IAM */
7164 u32 icr = rd32(E1000_ICR);
7166 igb_write_itr(q_vector);
7168 if (icr & E1000_ICR_DRSTA)
7169 schedule_work(&adapter->reset_task);
7171 if (icr & E1000_ICR_DOUTSYNC) {
7172 /* HW is reporting DMA is out of sync */
7173 adapter->stats.doosync++;
7176 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7177 hw->mac.get_link_status = 1;
7178 if (!test_bit(__IGB_DOWN, &adapter->state))
7179 mod_timer(&adapter->watchdog_timer, jiffies + 1);
7182 if (icr & E1000_ICR_TS)
7183 igb_tsync_interrupt(adapter);
7185 napi_schedule(&q_vector->napi);
7191 * igb_intr - Legacy Interrupt Handler
7192 * @irq: interrupt number
7193 * @data: pointer to a network interface device structure
7195 static irqreturn_t igb_intr(int irq, void *data)
7197 struct igb_adapter *adapter = data;
7198 struct igb_q_vector *q_vector = adapter->q_vector[0];
7199 struct e1000_hw *hw = &adapter->hw;
7200 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
7201 * need for the IMC write
7203 u32 icr = rd32(E1000_ICR);
7205 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7206 * not set, then the adapter didn't send an interrupt
7208 if (!(icr & E1000_ICR_INT_ASSERTED))
7211 igb_write_itr(q_vector);
7213 if (icr & E1000_ICR_DRSTA)
7214 schedule_work(&adapter->reset_task);
7216 if (icr & E1000_ICR_DOUTSYNC) {
7217 /* HW is reporting DMA is out of sync */
7218 adapter->stats.doosync++;
7221 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7222 hw->mac.get_link_status = 1;
7223 /* guard against interrupt when we're going down */
7224 if (!test_bit(__IGB_DOWN, &adapter->state))
7225 mod_timer(&adapter->watchdog_timer, jiffies + 1);
7228 if (icr & E1000_ICR_TS)
7229 igb_tsync_interrupt(adapter);
7231 napi_schedule(&q_vector->napi);
7236 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7238 struct igb_adapter *adapter = q_vector->adapter;
7239 struct e1000_hw *hw = &adapter->hw;
7241 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
7242 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
7243 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
7244 igb_set_itr(q_vector);
7246 igb_update_ring_itr(q_vector);
7249 if (!test_bit(__IGB_DOWN, &adapter->state)) {
7250 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7251 wr32(E1000_EIMS, q_vector->eims_value);
7253 igb_irq_enable(adapter);
7258 * igb_poll - NAPI Rx polling callback
7259 * @napi: napi polling structure
7260 * @budget: count of how many packets we should handle
7262 static int igb_poll(struct napi_struct *napi, int budget)
7264 struct igb_q_vector *q_vector = container_of(napi,
7265 struct igb_q_vector,
7267 bool clean_complete = true;
7270 #ifdef CONFIG_IGB_DCA
7271 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
7272 igb_update_dca(q_vector);
7274 if (q_vector->tx.ring)
7275 clean_complete = igb_clean_tx_irq(q_vector, budget);
7277 if (q_vector->rx.ring) {
7278 int cleaned = igb_clean_rx_irq(q_vector, budget);
7280 work_done += cleaned;
7281 if (cleaned >= budget)
7282 clean_complete = false;
7285 /* If all work not completed, return budget and keep polling */
7286 if (!clean_complete)
7289 /* If not enough Rx work done, exit the polling mode */
7290 napi_complete_done(napi, work_done);
7291 igb_ring_irq_enable(q_vector);
7297 * igb_clean_tx_irq - Reclaim resources after transmit completes
7298 * @q_vector: pointer to q_vector containing needed info
7299 * @napi_budget: Used to determine if we are in netpoll
7301 * returns true if ring is completely cleaned
7303 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
7305 struct igb_adapter *adapter = q_vector->adapter;
7306 struct igb_ring *tx_ring = q_vector->tx.ring;
7307 struct igb_tx_buffer *tx_buffer;
7308 union e1000_adv_tx_desc *tx_desc;
7309 unsigned int total_bytes = 0, total_packets = 0;
7310 unsigned int budget = q_vector->tx.work_limit;
7311 unsigned int i = tx_ring->next_to_clean;
7313 if (test_bit(__IGB_DOWN, &adapter->state))
7316 tx_buffer = &tx_ring->tx_buffer_info[i];
7317 tx_desc = IGB_TX_DESC(tx_ring, i);
7318 i -= tx_ring->count;
7321 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7323 /* if next_to_watch is not set then there is no work pending */
7327 /* prevent any other reads prior to eop_desc */
7330 /* if DD is not set pending work has not been completed */
7331 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7334 /* clear next_to_watch to prevent false hangs */
7335 tx_buffer->next_to_watch = NULL;
7337 /* update the statistics for this packet */
7338 total_bytes += tx_buffer->bytecount;
7339 total_packets += tx_buffer->gso_segs;
7342 napi_consume_skb(tx_buffer->skb, napi_budget);
7344 /* unmap skb header data */
7345 dma_unmap_single(tx_ring->dev,
7346 dma_unmap_addr(tx_buffer, dma),
7347 dma_unmap_len(tx_buffer, len),
7350 /* clear tx_buffer data */
7351 dma_unmap_len_set(tx_buffer, len, 0);
7353 /* clear last DMA location and unmap remaining buffers */
7354 while (tx_desc != eop_desc) {
7359 i -= tx_ring->count;
7360 tx_buffer = tx_ring->tx_buffer_info;
7361 tx_desc = IGB_TX_DESC(tx_ring, 0);
7364 /* unmap any remaining paged data */
7365 if (dma_unmap_len(tx_buffer, len)) {
7366 dma_unmap_page(tx_ring->dev,
7367 dma_unmap_addr(tx_buffer, dma),
7368 dma_unmap_len(tx_buffer, len),
7370 dma_unmap_len_set(tx_buffer, len, 0);
7374 /* move us one more past the eop_desc for start of next pkt */
7379 i -= tx_ring->count;
7380 tx_buffer = tx_ring->tx_buffer_info;
7381 tx_desc = IGB_TX_DESC(tx_ring, 0);
7384 /* issue prefetch for next Tx descriptor */
7387 /* update budget accounting */
7389 } while (likely(budget));
7391 netdev_tx_completed_queue(txring_txq(tx_ring),
7392 total_packets, total_bytes);
7393 i += tx_ring->count;
7394 tx_ring->next_to_clean = i;
7395 u64_stats_update_begin(&tx_ring->tx_syncp);
7396 tx_ring->tx_stats.bytes += total_bytes;
7397 tx_ring->tx_stats.packets += total_packets;
7398 u64_stats_update_end(&tx_ring->tx_syncp);
7399 q_vector->tx.total_bytes += total_bytes;
7400 q_vector->tx.total_packets += total_packets;
7402 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7403 struct e1000_hw *hw = &adapter->hw;
7405 /* Detect a transmit hang in hardware, this serializes the
7406 * check with the clearing of time_stamp and movement of i
7408 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7409 if (tx_buffer->next_to_watch &&
7410 time_after(jiffies, tx_buffer->time_stamp +
7411 (adapter->tx_timeout_factor * HZ)) &&
7412 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
7414 /* detected Tx unit hang */
7415 dev_err(tx_ring->dev,
7416 "Detected Tx Unit Hang\n"
7420 " next_to_use <%x>\n"
7421 " next_to_clean <%x>\n"
7422 "buffer_info[next_to_clean]\n"
7423 " time_stamp <%lx>\n"
7424 " next_to_watch <%p>\n"
7426 " desc.status <%x>\n",
7427 tx_ring->queue_index,
7428 rd32(E1000_TDH(tx_ring->reg_idx)),
7429 readl(tx_ring->tail),
7430 tx_ring->next_to_use,
7431 tx_ring->next_to_clean,
7432 tx_buffer->time_stamp,
7433 tx_buffer->next_to_watch,
7435 tx_buffer->next_to_watch->wb.status);
7436 netif_stop_subqueue(tx_ring->netdev,
7437 tx_ring->queue_index);
7439 /* we are about to reset, no point in enabling stuff */
7444 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7445 if (unlikely(total_packets &&
7446 netif_carrier_ok(tx_ring->netdev) &&
7447 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7448 /* Make sure that anybody stopping the queue after this
7449 * sees the new next_to_clean.
7452 if (__netif_subqueue_stopped(tx_ring->netdev,
7453 tx_ring->queue_index) &&
7454 !(test_bit(__IGB_DOWN, &adapter->state))) {
7455 netif_wake_subqueue(tx_ring->netdev,
7456 tx_ring->queue_index);
7458 u64_stats_update_begin(&tx_ring->tx_syncp);
7459 tx_ring->tx_stats.restart_queue++;
7460 u64_stats_update_end(&tx_ring->tx_syncp);
7468 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7469 * @rx_ring: rx descriptor ring to store buffers on
7470 * @old_buff: donor buffer to have page reused
7472 * Synchronizes page for reuse by the adapter
7474 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7475 struct igb_rx_buffer *old_buff)
7477 struct igb_rx_buffer *new_buff;
7478 u16 nta = rx_ring->next_to_alloc;
7480 new_buff = &rx_ring->rx_buffer_info[nta];
7482 /* update, and store next to alloc */
7484 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7486 /* Transfer page from old buffer to new buffer.
7487 * Move each member individually to avoid possible store
7488 * forwarding stalls.
7490 new_buff->dma = old_buff->dma;
7491 new_buff->page = old_buff->page;
7492 new_buff->page_offset = old_buff->page_offset;
7493 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
7496 static inline bool igb_page_is_reserved(struct page *page)
7498 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
7501 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer)
7503 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
7504 struct page *page = rx_buffer->page;
7506 /* avoid re-using remote pages */
7507 if (unlikely(igb_page_is_reserved(page)))
7510 #if (PAGE_SIZE < 8192)
7511 /* if we are only owner of page we can reuse it */
7512 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
7515 #define IGB_LAST_OFFSET \
7516 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
7518 if (rx_buffer->page_offset > IGB_LAST_OFFSET)
7522 /* If we have drained the page fragment pool we need to update
7523 * the pagecnt_bias and page count so that we fully restock the
7524 * number of references the driver holds.
7526 if (unlikely(!pagecnt_bias)) {
7527 page_ref_add(page, USHRT_MAX);
7528 rx_buffer->pagecnt_bias = USHRT_MAX;
7535 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7536 * @rx_ring: rx descriptor ring to transact packets on
7537 * @rx_buffer: buffer containing page to add
7538 * @skb: sk_buff to place the data into
7539 * @size: size of buffer to be added
7541 * This function will add the data contained in rx_buffer->page to the skb.
7543 static void igb_add_rx_frag(struct igb_ring *rx_ring,
7544 struct igb_rx_buffer *rx_buffer,
7545 struct sk_buff *skb,
7548 #if (PAGE_SIZE < 8192)
7549 unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7551 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
7552 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
7553 SKB_DATA_ALIGN(size);
7555 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
7556 rx_buffer->page_offset, size, truesize);
7557 #if (PAGE_SIZE < 8192)
7558 rx_buffer->page_offset ^= truesize;
7560 rx_buffer->page_offset += truesize;
7564 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
7565 struct igb_rx_buffer *rx_buffer,
7566 union e1000_adv_rx_desc *rx_desc,
7569 void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
7570 #if (PAGE_SIZE < 8192)
7571 unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7573 unsigned int truesize = SKB_DATA_ALIGN(size);
7575 unsigned int headlen;
7576 struct sk_buff *skb;
7578 /* prefetch first cache line of first page */
7580 #if L1_CACHE_BYTES < 128
7581 prefetch(va + L1_CACHE_BYTES);
7584 /* allocate a skb to store the frags */
7585 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
7589 if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
7590 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7591 va += IGB_TS_HDR_LEN;
7592 size -= IGB_TS_HDR_LEN;
7595 /* Determine available headroom for copy */
7597 if (headlen > IGB_RX_HDR_LEN)
7598 headlen = eth_get_headlen(va, IGB_RX_HDR_LEN);
7600 /* align pull length to size of long to optimize memcpy performance */
7601 memcpy(__skb_put(skb, headlen), va, ALIGN(headlen, sizeof(long)));
7603 /* update all of the pointers */
7606 skb_add_rx_frag(skb, 0, rx_buffer->page,
7607 (va + headlen) - page_address(rx_buffer->page),
7609 #if (PAGE_SIZE < 8192)
7610 rx_buffer->page_offset ^= truesize;
7612 rx_buffer->page_offset += truesize;
7615 rx_buffer->pagecnt_bias++;
7621 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
7622 struct igb_rx_buffer *rx_buffer,
7623 union e1000_adv_rx_desc *rx_desc,
7626 void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
7627 #if (PAGE_SIZE < 8192)
7628 unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7630 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
7631 SKB_DATA_ALIGN(IGB_SKB_PAD + size);
7633 struct sk_buff *skb;
7635 /* prefetch first cache line of first page */
7637 #if L1_CACHE_BYTES < 128
7638 prefetch(va + L1_CACHE_BYTES);
7641 /* build an skb around the page buffer */
7642 skb = build_skb(va - IGB_SKB_PAD, truesize);
7646 /* update pointers within the skb to store the data */
7647 skb_reserve(skb, IGB_SKB_PAD);
7648 __skb_put(skb, size);
7650 /* pull timestamp out of packet data */
7651 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7652 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
7653 __skb_pull(skb, IGB_TS_HDR_LEN);
7656 /* update buffer offset */
7657 #if (PAGE_SIZE < 8192)
7658 rx_buffer->page_offset ^= truesize;
7660 rx_buffer->page_offset += truesize;
7666 static inline void igb_rx_checksum(struct igb_ring *ring,
7667 union e1000_adv_rx_desc *rx_desc,
7668 struct sk_buff *skb)
7670 skb_checksum_none_assert(skb);
7672 /* Ignore Checksum bit is set */
7673 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7676 /* Rx checksum disabled via ethtool */
7677 if (!(ring->netdev->features & NETIF_F_RXCSUM))
7680 /* TCP/UDP checksum error bit is set */
7681 if (igb_test_staterr(rx_desc,
7682 E1000_RXDEXT_STATERR_TCPE |
7683 E1000_RXDEXT_STATERR_IPE)) {
7684 /* work around errata with sctp packets where the TCPE aka
7685 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7686 * packets, (aka let the stack check the crc32c)
7688 if (!((skb->len == 60) &&
7689 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
7690 u64_stats_update_begin(&ring->rx_syncp);
7691 ring->rx_stats.csum_err++;
7692 u64_stats_update_end(&ring->rx_syncp);
7694 /* let the stack verify checksum errors */
7697 /* It must be a TCP or UDP packet with a valid checksum */
7698 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7699 E1000_RXD_STAT_UDPCS))
7700 skb->ip_summed = CHECKSUM_UNNECESSARY;
7702 dev_dbg(ring->dev, "cksum success: bits %08X\n",
7703 le32_to_cpu(rx_desc->wb.upper.status_error));
7706 static inline void igb_rx_hash(struct igb_ring *ring,
7707 union e1000_adv_rx_desc *rx_desc,
7708 struct sk_buff *skb)
7710 if (ring->netdev->features & NETIF_F_RXHASH)
7712 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7717 * igb_is_non_eop - process handling of non-EOP buffers
7718 * @rx_ring: Rx ring being processed
7719 * @rx_desc: Rx descriptor for current buffer
7720 * @skb: current socket buffer containing buffer in progress
7722 * This function updates next to clean. If the buffer is an EOP buffer
7723 * this function exits returning false, otherwise it will place the
7724 * sk_buff in the next buffer to be chained and return true indicating
7725 * that this is in fact a non-EOP buffer.
7727 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7728 union e1000_adv_rx_desc *rx_desc)
7730 u32 ntc = rx_ring->next_to_clean + 1;
7732 /* fetch, update, and store next to clean */
7733 ntc = (ntc < rx_ring->count) ? ntc : 0;
7734 rx_ring->next_to_clean = ntc;
7736 prefetch(IGB_RX_DESC(rx_ring, ntc));
7738 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7745 * igb_cleanup_headers - Correct corrupted or empty headers
7746 * @rx_ring: rx descriptor ring packet is being transacted on
7747 * @rx_desc: pointer to the EOP Rx descriptor
7748 * @skb: pointer to current skb being fixed
7750 * Address the case where we are pulling data in on pages only
7751 * and as such no data is present in the skb header.
7753 * In addition if skb is not at least 60 bytes we need to pad it so that
7754 * it is large enough to qualify as a valid Ethernet frame.
7756 * Returns true if an error was encountered and skb was freed.
7758 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7759 union e1000_adv_rx_desc *rx_desc,
7760 struct sk_buff *skb)
7762 if (unlikely((igb_test_staterr(rx_desc,
7763 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7764 struct net_device *netdev = rx_ring->netdev;
7765 if (!(netdev->features & NETIF_F_RXALL)) {
7766 dev_kfree_skb_any(skb);
7771 /* if eth_skb_pad returns an error the skb was freed */
7772 if (eth_skb_pad(skb))
7779 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7780 * @rx_ring: rx descriptor ring packet is being transacted on
7781 * @rx_desc: pointer to the EOP Rx descriptor
7782 * @skb: pointer to current skb being populated
7784 * This function checks the ring, descriptor, and packet information in
7785 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7786 * other fields within the skb.
7788 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7789 union e1000_adv_rx_desc *rx_desc,
7790 struct sk_buff *skb)
7792 struct net_device *dev = rx_ring->netdev;
7794 igb_rx_hash(rx_ring, rx_desc, skb);
7796 igb_rx_checksum(rx_ring, rx_desc, skb);
7798 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7799 !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7800 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7802 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7803 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7806 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7807 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7808 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7810 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7812 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7815 skb_record_rx_queue(skb, rx_ring->queue_index);
7817 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7820 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
7821 const unsigned int size)
7823 struct igb_rx_buffer *rx_buffer;
7825 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7826 prefetchw(rx_buffer->page);
7828 /* we are reusing so sync this buffer for CPU use */
7829 dma_sync_single_range_for_cpu(rx_ring->dev,
7831 rx_buffer->page_offset,
7835 rx_buffer->pagecnt_bias--;
7840 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
7841 struct igb_rx_buffer *rx_buffer)
7843 if (igb_can_reuse_rx_page(rx_buffer)) {
7844 /* hand second half of page back to the ring */
7845 igb_reuse_rx_page(rx_ring, rx_buffer);
7847 /* We are not reusing the buffer so unmap it and free
7848 * any references we are holding to it
7850 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
7851 igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
7853 __page_frag_cache_drain(rx_buffer->page,
7854 rx_buffer->pagecnt_bias);
7857 /* clear contents of rx_buffer */
7858 rx_buffer->page = NULL;
7861 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7863 struct igb_ring *rx_ring = q_vector->rx.ring;
7864 struct sk_buff *skb = rx_ring->skb;
7865 unsigned int total_bytes = 0, total_packets = 0;
7866 u16 cleaned_count = igb_desc_unused(rx_ring);
7868 while (likely(total_packets < budget)) {
7869 union e1000_adv_rx_desc *rx_desc;
7870 struct igb_rx_buffer *rx_buffer;
7873 /* return some buffers to hardware, one at a time is too slow */
7874 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7875 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7879 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7880 size = le16_to_cpu(rx_desc->wb.upper.length);
7884 /* This memory barrier is needed to keep us from reading
7885 * any other fields out of the rx_desc until we know the
7886 * descriptor has been written back
7890 rx_buffer = igb_get_rx_buffer(rx_ring, size);
7892 /* retrieve a buffer from the ring */
7894 igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
7895 else if (ring_uses_build_skb(rx_ring))
7896 skb = igb_build_skb(rx_ring, rx_buffer, rx_desc, size);
7898 skb = igb_construct_skb(rx_ring, rx_buffer,
7901 /* exit if we failed to retrieve a buffer */
7903 rx_ring->rx_stats.alloc_failed++;
7904 rx_buffer->pagecnt_bias++;
7908 igb_put_rx_buffer(rx_ring, rx_buffer);
7911 /* fetch next buffer in frame if non-eop */
7912 if (igb_is_non_eop(rx_ring, rx_desc))
7915 /* verify the packet layout is correct */
7916 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7921 /* probably a little skewed due to removing CRC */
7922 total_bytes += skb->len;
7924 /* populate checksum, timestamp, VLAN, and protocol */
7925 igb_process_skb_fields(rx_ring, rx_desc, skb);
7927 napi_gro_receive(&q_vector->napi, skb);
7929 /* reset skb pointer */
7932 /* update budget accounting */
7936 /* place incomplete frames back on ring for completion */
7939 u64_stats_update_begin(&rx_ring->rx_syncp);
7940 rx_ring->rx_stats.packets += total_packets;
7941 rx_ring->rx_stats.bytes += total_bytes;
7942 u64_stats_update_end(&rx_ring->rx_syncp);
7943 q_vector->rx.total_packets += total_packets;
7944 q_vector->rx.total_bytes += total_bytes;
7947 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7949 return total_packets;
7952 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
7954 return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
7957 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7958 struct igb_rx_buffer *bi)
7960 struct page *page = bi->page;
7963 /* since we are recycling buffers we should seldom need to alloc */
7967 /* alloc new page for storage */
7968 page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
7969 if (unlikely(!page)) {
7970 rx_ring->rx_stats.alloc_failed++;
7974 /* map page for use */
7975 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
7976 igb_rx_pg_size(rx_ring),
7980 /* if mapping failed free memory back to system since
7981 * there isn't much point in holding memory we can't use
7983 if (dma_mapping_error(rx_ring->dev, dma)) {
7984 __free_pages(page, igb_rx_pg_order(rx_ring));
7986 rx_ring->rx_stats.alloc_failed++;
7992 bi->page_offset = igb_rx_offset(rx_ring);
7993 bi->pagecnt_bias = 1;
7999 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8000 * @adapter: address of board private structure
8002 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8004 union e1000_adv_rx_desc *rx_desc;
8005 struct igb_rx_buffer *bi;
8006 u16 i = rx_ring->next_to_use;
8013 rx_desc = IGB_RX_DESC(rx_ring, i);
8014 bi = &rx_ring->rx_buffer_info[i];
8015 i -= rx_ring->count;
8017 bufsz = igb_rx_bufsz(rx_ring);
8020 if (!igb_alloc_mapped_page(rx_ring, bi))
8023 /* sync the buffer for use by the device */
8024 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8025 bi->page_offset, bufsz,
8028 /* Refresh the desc even if buffer_addrs didn't change
8029 * because each write-back erases this info.
8031 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8037 rx_desc = IGB_RX_DESC(rx_ring, 0);
8038 bi = rx_ring->rx_buffer_info;
8039 i -= rx_ring->count;
8042 /* clear the length for the next_to_use descriptor */
8043 rx_desc->wb.upper.length = 0;
8046 } while (cleaned_count);
8048 i += rx_ring->count;
8050 if (rx_ring->next_to_use != i) {
8051 /* record the next descriptor to use */
8052 rx_ring->next_to_use = i;
8054 /* update next to alloc since we have filled the ring */
8055 rx_ring->next_to_alloc = i;
8057 /* Force memory writes to complete before letting h/w
8058 * know there are new descriptors to fetch. (Only
8059 * applicable for weak-ordered memory model archs,
8063 writel(i, rx_ring->tail);
8073 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8075 struct igb_adapter *adapter = netdev_priv(netdev);
8076 struct mii_ioctl_data *data = if_mii(ifr);
8078 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8083 data->phy_id = adapter->hw.phy.addr;
8086 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8103 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8109 return igb_mii_ioctl(netdev, ifr, cmd);
8111 return igb_ptp_get_ts_config(netdev, ifr);
8113 return igb_ptp_set_ts_config(netdev, ifr);
8119 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8121 struct igb_adapter *adapter = hw->back;
8123 pci_read_config_word(adapter->pdev, reg, value);
8126 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8128 struct igb_adapter *adapter = hw->back;
8130 pci_write_config_word(adapter->pdev, reg, *value);
8133 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8135 struct igb_adapter *adapter = hw->back;
8137 if (pcie_capability_read_word(adapter->pdev, reg, value))
8138 return -E1000_ERR_CONFIG;
8143 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8145 struct igb_adapter *adapter = hw->back;
8147 if (pcie_capability_write_word(adapter->pdev, reg, *value))
8148 return -E1000_ERR_CONFIG;
8153 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
8155 struct igb_adapter *adapter = netdev_priv(netdev);
8156 struct e1000_hw *hw = &adapter->hw;
8158 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8161 /* enable VLAN tag insert/strip */
8162 ctrl = rd32(E1000_CTRL);
8163 ctrl |= E1000_CTRL_VME;
8164 wr32(E1000_CTRL, ctrl);
8166 /* Disable CFI check */
8167 rctl = rd32(E1000_RCTL);
8168 rctl &= ~E1000_RCTL_CFIEN;
8169 wr32(E1000_RCTL, rctl);
8171 /* disable VLAN tag insert/strip */
8172 ctrl = rd32(E1000_CTRL);
8173 ctrl &= ~E1000_CTRL_VME;
8174 wr32(E1000_CTRL, ctrl);
8177 igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
8180 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8181 __be16 proto, u16 vid)
8183 struct igb_adapter *adapter = netdev_priv(netdev);
8184 struct e1000_hw *hw = &adapter->hw;
8185 int pf_id = adapter->vfs_allocated_count;
8187 /* add the filter since PF can receive vlans w/o entry in vlvf */
8188 if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8189 igb_vfta_set(hw, vid, pf_id, true, !!vid);
8191 set_bit(vid, adapter->active_vlans);
8196 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8197 __be16 proto, u16 vid)
8199 struct igb_adapter *adapter = netdev_priv(netdev);
8200 int pf_id = adapter->vfs_allocated_count;
8201 struct e1000_hw *hw = &adapter->hw;
8203 /* remove VID from filter table */
8204 if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8205 igb_vfta_set(hw, vid, pf_id, false, true);
8207 clear_bit(vid, adapter->active_vlans);
8212 static void igb_restore_vlan(struct igb_adapter *adapter)
8216 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8217 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
8219 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
8220 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
8223 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
8225 struct pci_dev *pdev = adapter->pdev;
8226 struct e1000_mac_info *mac = &adapter->hw.mac;
8230 /* Make sure dplx is at most 1 bit and lsb of speed is not set
8231 * for the switch() below to work
8233 if ((spd & 1) || (dplx & ~1))
8236 /* Fiber NIC's only allow 1000 gbps Full duplex
8237 * and 100Mbps Full duplex for 100baseFx sfp
8239 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8240 switch (spd + dplx) {
8241 case SPEED_10 + DUPLEX_HALF:
8242 case SPEED_10 + DUPLEX_FULL:
8243 case SPEED_100 + DUPLEX_HALF:
8250 switch (spd + dplx) {
8251 case SPEED_10 + DUPLEX_HALF:
8252 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8254 case SPEED_10 + DUPLEX_FULL:
8255 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8257 case SPEED_100 + DUPLEX_HALF:
8258 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8260 case SPEED_100 + DUPLEX_FULL:
8261 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8263 case SPEED_1000 + DUPLEX_FULL:
8265 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8267 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8272 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8273 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8278 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
8282 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8285 struct net_device *netdev = pci_get_drvdata(pdev);
8286 struct igb_adapter *adapter = netdev_priv(netdev);
8287 struct e1000_hw *hw = &adapter->hw;
8288 u32 ctrl, rctl, status;
8289 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8295 netif_device_detach(netdev);
8297 if (netif_running(netdev))
8298 __igb_close(netdev, true);
8300 igb_ptp_suspend(adapter);
8302 igb_clear_interrupt_scheme(adapter);
8306 retval = pci_save_state(pdev);
8311 status = rd32(E1000_STATUS);
8312 if (status & E1000_STATUS_LU)
8313 wufc &= ~E1000_WUFC_LNKC;
8316 igb_setup_rctl(adapter);
8317 igb_set_rx_mode(netdev);
8319 /* turn on all-multi mode if wake on multicast is enabled */
8320 if (wufc & E1000_WUFC_MC) {
8321 rctl = rd32(E1000_RCTL);
8322 rctl |= E1000_RCTL_MPE;
8323 wr32(E1000_RCTL, rctl);
8326 ctrl = rd32(E1000_CTRL);
8327 /* advertise wake from D3Cold */
8328 #define E1000_CTRL_ADVD3WUC 0x00100000
8329 /* phy power management enable */
8330 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8331 ctrl |= E1000_CTRL_ADVD3WUC;
8332 wr32(E1000_CTRL, ctrl);
8334 /* Allow time for pending master requests to run */
8335 igb_disable_pcie_master(hw);
8337 wr32(E1000_WUC, E1000_WUC_PME_EN);
8338 wr32(E1000_WUFC, wufc);
8341 wr32(E1000_WUFC, 0);
8344 *enable_wake = wufc || adapter->en_mng_pt;
8346 igb_power_down_link(adapter);
8348 igb_power_up_link(adapter);
8350 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8351 * would have already happened in close and is redundant.
8353 igb_release_hw_control(adapter);
8355 pci_disable_device(pdev);
8360 static void igb_deliver_wake_packet(struct net_device *netdev)
8362 struct igb_adapter *adapter = netdev_priv(netdev);
8363 struct e1000_hw *hw = &adapter->hw;
8364 struct sk_buff *skb;
8367 wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
8369 /* WUPM stores only the first 128 bytes of the wake packet.
8370 * Read the packet only if we have the whole thing.
8372 if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
8375 skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
8381 /* Ensure reads are 32-bit aligned */
8382 wupl = roundup(wupl, 4);
8384 memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
8386 skb->protocol = eth_type_trans(skb, netdev);
8390 static int __maybe_unused igb_suspend(struct device *dev)
8394 struct pci_dev *pdev = to_pci_dev(dev);
8396 retval = __igb_shutdown(pdev, &wake, 0);
8401 pci_prepare_to_sleep(pdev);
8403 pci_wake_from_d3(pdev, false);
8404 pci_set_power_state(pdev, PCI_D3hot);
8410 static int __maybe_unused igb_resume(struct device *dev)
8412 struct pci_dev *pdev = to_pci_dev(dev);
8413 struct net_device *netdev = pci_get_drvdata(pdev);
8414 struct igb_adapter *adapter = netdev_priv(netdev);
8415 struct e1000_hw *hw = &adapter->hw;
8418 pci_set_power_state(pdev, PCI_D0);
8419 pci_restore_state(pdev);
8420 pci_save_state(pdev);
8422 if (!pci_device_is_present(pdev))
8424 err = pci_enable_device_mem(pdev);
8427 "igb: Cannot enable PCI device from suspend\n");
8430 pci_set_master(pdev);
8432 pci_enable_wake(pdev, PCI_D3hot, 0);
8433 pci_enable_wake(pdev, PCI_D3cold, 0);
8435 if (igb_init_interrupt_scheme(adapter, true)) {
8436 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8442 /* let the f/w know that the h/w is now under the control of the
8445 igb_get_hw_control(adapter);
8447 val = rd32(E1000_WUS);
8448 if (val & WAKE_PKT_WUS)
8449 igb_deliver_wake_packet(netdev);
8451 wr32(E1000_WUS, ~0);
8454 if (!err && netif_running(netdev))
8455 err = __igb_open(netdev, true);
8458 netif_device_attach(netdev);
8464 static int __maybe_unused igb_runtime_idle(struct device *dev)
8466 struct pci_dev *pdev = to_pci_dev(dev);
8467 struct net_device *netdev = pci_get_drvdata(pdev);
8468 struct igb_adapter *adapter = netdev_priv(netdev);
8470 if (!igb_has_link(adapter))
8471 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8476 static int __maybe_unused igb_runtime_suspend(struct device *dev)
8478 struct pci_dev *pdev = to_pci_dev(dev);
8482 retval = __igb_shutdown(pdev, &wake, 1);
8487 pci_prepare_to_sleep(pdev);
8489 pci_wake_from_d3(pdev, false);
8490 pci_set_power_state(pdev, PCI_D3hot);
8496 static int __maybe_unused igb_runtime_resume(struct device *dev)
8498 return igb_resume(dev);
8501 static void igb_shutdown(struct pci_dev *pdev)
8505 __igb_shutdown(pdev, &wake, 0);
8507 if (system_state == SYSTEM_POWER_OFF) {
8508 pci_wake_from_d3(pdev, wake);
8509 pci_set_power_state(pdev, PCI_D3hot);
8513 #ifdef CONFIG_PCI_IOV
8514 static int igb_sriov_reinit(struct pci_dev *dev)
8516 struct net_device *netdev = pci_get_drvdata(dev);
8517 struct igb_adapter *adapter = netdev_priv(netdev);
8518 struct pci_dev *pdev = adapter->pdev;
8522 if (netif_running(netdev))
8527 igb_clear_interrupt_scheme(adapter);
8529 igb_init_queue_configuration(adapter);
8531 if (igb_init_interrupt_scheme(adapter, true)) {
8533 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8537 if (netif_running(netdev))
8545 static int igb_pci_disable_sriov(struct pci_dev *dev)
8547 int err = igb_disable_sriov(dev);
8550 err = igb_sriov_reinit(dev);
8555 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
8557 int err = igb_enable_sriov(dev, num_vfs);
8562 err = igb_sriov_reinit(dev);
8571 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
8573 #ifdef CONFIG_PCI_IOV
8575 return igb_pci_disable_sriov(dev);
8577 return igb_pci_enable_sriov(dev, num_vfs);
8582 #ifdef CONFIG_NET_POLL_CONTROLLER
8583 /* Polling 'interrupt' - used by things like netconsole to send skbs
8584 * without having to re-enable interrupts. It's not called while
8585 * the interrupt routine is executing.
8587 static void igb_netpoll(struct net_device *netdev)
8589 struct igb_adapter *adapter = netdev_priv(netdev);
8590 struct e1000_hw *hw = &adapter->hw;
8591 struct igb_q_vector *q_vector;
8594 for (i = 0; i < adapter->num_q_vectors; i++) {
8595 q_vector = adapter->q_vector[i];
8596 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8597 wr32(E1000_EIMC, q_vector->eims_value);
8599 igb_irq_disable(adapter);
8600 napi_schedule(&q_vector->napi);
8603 #endif /* CONFIG_NET_POLL_CONTROLLER */
8606 * igb_io_error_detected - called when PCI error is detected
8607 * @pdev: Pointer to PCI device
8608 * @state: The current pci connection state
8610 * This function is called after a PCI bus error affecting
8611 * this device has been detected.
8613 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
8614 pci_channel_state_t state)
8616 struct net_device *netdev = pci_get_drvdata(pdev);
8617 struct igb_adapter *adapter = netdev_priv(netdev);
8619 netif_device_detach(netdev);
8621 if (state == pci_channel_io_perm_failure)
8622 return PCI_ERS_RESULT_DISCONNECT;
8624 if (netif_running(netdev))
8626 pci_disable_device(pdev);
8628 /* Request a slot slot reset. */
8629 return PCI_ERS_RESULT_NEED_RESET;
8633 * igb_io_slot_reset - called after the pci bus has been reset.
8634 * @pdev: Pointer to PCI device
8636 * Restart the card from scratch, as if from a cold-boot. Implementation
8637 * resembles the first-half of the igb_resume routine.
8639 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
8641 struct net_device *netdev = pci_get_drvdata(pdev);
8642 struct igb_adapter *adapter = netdev_priv(netdev);
8643 struct e1000_hw *hw = &adapter->hw;
8644 pci_ers_result_t result;
8647 if (pci_enable_device_mem(pdev)) {
8649 "Cannot re-enable PCI device after reset.\n");
8650 result = PCI_ERS_RESULT_DISCONNECT;
8652 pci_set_master(pdev);
8653 pci_restore_state(pdev);
8654 pci_save_state(pdev);
8656 pci_enable_wake(pdev, PCI_D3hot, 0);
8657 pci_enable_wake(pdev, PCI_D3cold, 0);
8659 /* In case of PCI error, adapter lose its HW address
8660 * so we should re-assign it here.
8662 hw->hw_addr = adapter->io_addr;
8665 wr32(E1000_WUS, ~0);
8666 result = PCI_ERS_RESULT_RECOVERED;
8669 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8672 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8674 /* non-fatal, continue */
8681 * igb_io_resume - called when traffic can start flowing again.
8682 * @pdev: Pointer to PCI device
8684 * This callback is called when the error recovery driver tells us that
8685 * its OK to resume normal operation. Implementation resembles the
8686 * second-half of the igb_resume routine.
8688 static void igb_io_resume(struct pci_dev *pdev)
8690 struct net_device *netdev = pci_get_drvdata(pdev);
8691 struct igb_adapter *adapter = netdev_priv(netdev);
8693 if (netif_running(netdev)) {
8694 if (igb_up(adapter)) {
8695 dev_err(&pdev->dev, "igb_up failed after reset\n");
8700 netif_device_attach(netdev);
8702 /* let the f/w know that the h/w is now under the control of the
8705 igb_get_hw_control(adapter);
8709 * igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
8710 * @adapter: Pointer to adapter structure
8711 * @index: Index of the RAR entry which need to be synced with MAC table
8713 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
8715 struct e1000_hw *hw = &adapter->hw;
8716 u32 rar_low, rar_high;
8717 u8 *addr = adapter->mac_table[index].addr;
8719 /* HW expects these to be in network order when they are plugged
8720 * into the registers which are little endian. In order to guarantee
8721 * that ordering we need to do an leXX_to_cpup here in order to be
8722 * ready for the byteswap that occurs with writel
8724 rar_low = le32_to_cpup((__le32 *)(addr));
8725 rar_high = le16_to_cpup((__le16 *)(addr + 4));
8727 /* Indicate to hardware the Address is Valid. */
8728 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
8729 if (is_valid_ether_addr(addr))
8730 rar_high |= E1000_RAH_AV;
8732 if (hw->mac.type == e1000_82575)
8733 rar_high |= E1000_RAH_POOL_1 *
8734 adapter->mac_table[index].queue;
8736 rar_high |= E1000_RAH_POOL_1 <<
8737 adapter->mac_table[index].queue;
8740 wr32(E1000_RAL(index), rar_low);
8742 wr32(E1000_RAH(index), rar_high);
8746 static int igb_set_vf_mac(struct igb_adapter *adapter,
8747 int vf, unsigned char *mac_addr)
8749 struct e1000_hw *hw = &adapter->hw;
8750 /* VF MAC addresses start at end of receive addresses and moves
8751 * towards the first, as a result a collision should not be possible
8753 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
8754 unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
8756 ether_addr_copy(vf_mac_addr, mac_addr);
8757 ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
8758 adapter->mac_table[rar_entry].queue = vf;
8759 adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
8760 igb_rar_set_index(adapter, rar_entry);
8765 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
8767 struct igb_adapter *adapter = netdev_priv(netdev);
8769 if (vf >= adapter->vfs_allocated_count)
8772 /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
8773 * flag and allows to overwrite the MAC via VF netdev. This
8774 * is necessary to allow libvirt a way to restore the original
8775 * MAC after unbinding vfio-pci and reloading igbvf after shutting
8778 if (is_zero_ether_addr(mac)) {
8779 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
8780 dev_info(&adapter->pdev->dev,
8781 "remove administratively set MAC on VF %d\n",
8783 } else if (is_valid_ether_addr(mac)) {
8784 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
8785 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
8787 dev_info(&adapter->pdev->dev,
8788 "Reload the VF driver to make this change effective.");
8789 /* Generate additional warning if PF is down */
8790 if (test_bit(__IGB_DOWN, &adapter->state)) {
8791 dev_warn(&adapter->pdev->dev,
8792 "The VF MAC address has been set, but the PF device is not up.\n");
8793 dev_warn(&adapter->pdev->dev,
8794 "Bring the PF device up before attempting to use the VF device.\n");
8799 return igb_set_vf_mac(adapter, vf, mac);
8802 static int igb_link_mbps(int internal_link_speed)
8804 switch (internal_link_speed) {
8814 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
8821 /* Calculate the rate factor values to set */
8822 rf_int = link_speed / tx_rate;
8823 rf_dec = (link_speed - (rf_int * tx_rate));
8824 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
8827 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
8828 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
8829 E1000_RTTBCNRC_RF_INT_MASK);
8830 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
8835 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
8836 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8837 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8839 wr32(E1000_RTTBCNRM, 0x14);
8840 wr32(E1000_RTTBCNRC, bcnrc_val);
8843 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8845 int actual_link_speed, i;
8846 bool reset_rate = false;
8848 /* VF TX rate limit was not set or not supported */
8849 if ((adapter->vf_rate_link_speed == 0) ||
8850 (adapter->hw.mac.type != e1000_82576))
8853 actual_link_speed = igb_link_mbps(adapter->link_speed);
8854 if (actual_link_speed != adapter->vf_rate_link_speed) {
8856 adapter->vf_rate_link_speed = 0;
8857 dev_info(&adapter->pdev->dev,
8858 "Link speed has been changed. VF Transmit rate is disabled\n");
8861 for (i = 0; i < adapter->vfs_allocated_count; i++) {
8863 adapter->vf_data[i].tx_rate = 0;
8865 igb_set_vf_rate_limit(&adapter->hw, i,
8866 adapter->vf_data[i].tx_rate,
8871 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8872 int min_tx_rate, int max_tx_rate)
8874 struct igb_adapter *adapter = netdev_priv(netdev);
8875 struct e1000_hw *hw = &adapter->hw;
8876 int actual_link_speed;
8878 if (hw->mac.type != e1000_82576)
8884 actual_link_speed = igb_link_mbps(adapter->link_speed);
8885 if ((vf >= adapter->vfs_allocated_count) ||
8886 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8887 (max_tx_rate < 0) ||
8888 (max_tx_rate > actual_link_speed))
8891 adapter->vf_rate_link_speed = actual_link_speed;
8892 adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8893 igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8898 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8901 struct igb_adapter *adapter = netdev_priv(netdev);
8902 struct e1000_hw *hw = &adapter->hw;
8903 u32 reg_val, reg_offset;
8905 if (!adapter->vfs_allocated_count)
8908 if (vf >= adapter->vfs_allocated_count)
8911 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8912 reg_val = rd32(reg_offset);
8914 reg_val |= (BIT(vf) |
8915 BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8917 reg_val &= ~(BIT(vf) |
8918 BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8919 wr32(reg_offset, reg_val);
8921 adapter->vf_data[vf].spoofchk_enabled = setting;
8925 static int igb_ndo_get_vf_config(struct net_device *netdev,
8926 int vf, struct ifla_vf_info *ivi)
8928 struct igb_adapter *adapter = netdev_priv(netdev);
8929 if (vf >= adapter->vfs_allocated_count)
8932 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8933 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8934 ivi->min_tx_rate = 0;
8935 ivi->vlan = adapter->vf_data[vf].pf_vlan;
8936 ivi->qos = adapter->vf_data[vf].pf_qos;
8937 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8941 static void igb_vmm_control(struct igb_adapter *adapter)
8943 struct e1000_hw *hw = &adapter->hw;
8946 switch (hw->mac.type) {
8952 /* replication is not supported for 82575 */
8955 /* notify HW that the MAC is adding vlan tags */
8956 reg = rd32(E1000_DTXCTL);
8957 reg |= E1000_DTXCTL_VLAN_ADDED;
8958 wr32(E1000_DTXCTL, reg);
8961 /* enable replication vlan tag stripping */
8962 reg = rd32(E1000_RPLOLR);
8963 reg |= E1000_RPLOLR_STRVLAN;
8964 wr32(E1000_RPLOLR, reg);
8967 /* none of the above registers are supported by i350 */
8971 if (adapter->vfs_allocated_count) {
8972 igb_vmdq_set_loopback_pf(hw, true);
8973 igb_vmdq_set_replication_pf(hw, true);
8974 igb_vmdq_set_anti_spoofing_pf(hw, true,
8975 adapter->vfs_allocated_count);
8977 igb_vmdq_set_loopback_pf(hw, false);
8978 igb_vmdq_set_replication_pf(hw, false);
8982 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8984 struct e1000_hw *hw = &adapter->hw;
8988 if (hw->mac.type > e1000_82580) {
8989 if (adapter->flags & IGB_FLAG_DMAC) {
8992 /* force threshold to 0. */
8993 wr32(E1000_DMCTXTH, 0);
8995 /* DMA Coalescing high water mark needs to be greater
8996 * than the Rx threshold. Set hwm to PBA - max frame
8997 * size in 16B units, capping it at PBA - 6KB.
8999 hwm = 64 * (pba - 6);
9000 reg = rd32(E1000_FCRTC);
9001 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9002 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9003 & E1000_FCRTC_RTH_COAL_MASK);
9004 wr32(E1000_FCRTC, reg);
9006 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9007 * frame size, capping it at PBA - 10KB.
9009 dmac_thr = pba - 10;
9010 reg = rd32(E1000_DMACR);
9011 reg &= ~E1000_DMACR_DMACTHR_MASK;
9012 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9013 & E1000_DMACR_DMACTHR_MASK);
9015 /* transition to L0x or L1 if available..*/
9016 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9018 /* watchdog timer= +-1000 usec in 32usec intervals */
9021 /* Disable BMC-to-OS Watchdog Enable */
9022 if (hw->mac.type != e1000_i354)
9023 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9025 wr32(E1000_DMACR, reg);
9027 /* no lower threshold to disable
9028 * coalescing(smart fifb)-UTRESH=0
9030 wr32(E1000_DMCRTRH, 0);
9032 reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9034 wr32(E1000_DMCTLX, reg);
9036 /* free space in tx packet buffer to wake from
9039 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9040 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9042 /* make low power state decision controlled
9045 reg = rd32(E1000_PCIEMISC);
9046 reg &= ~E1000_PCIEMISC_LX_DECISION;
9047 wr32(E1000_PCIEMISC, reg);
9048 } /* endif adapter->dmac is not disabled */
9049 } else if (hw->mac.type == e1000_82580) {
9050 u32 reg = rd32(E1000_PCIEMISC);
9052 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9053 wr32(E1000_DMACR, 0);
9058 * igb_read_i2c_byte - Reads 8 bit word over I2C
9059 * @hw: pointer to hardware structure
9060 * @byte_offset: byte offset to read
9061 * @dev_addr: device address
9064 * Performs byte read operation over I2C interface at
9065 * a specified device address.
9067 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9068 u8 dev_addr, u8 *data)
9070 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9071 struct i2c_client *this_client = adapter->i2c_client;
9076 return E1000_ERR_I2C;
9078 swfw_mask = E1000_SWFW_PHY0_SM;
9080 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9081 return E1000_ERR_SWFW_SYNC;
9083 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9084 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9087 return E1000_ERR_I2C;
9095 * igb_write_i2c_byte - Writes 8 bit word over I2C
9096 * @hw: pointer to hardware structure
9097 * @byte_offset: byte offset to write
9098 * @dev_addr: device address
9099 * @data: value to write
9101 * Performs byte write operation over I2C interface at
9102 * a specified device address.
9104 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9105 u8 dev_addr, u8 data)
9107 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9108 struct i2c_client *this_client = adapter->i2c_client;
9110 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9113 return E1000_ERR_I2C;
9115 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9116 return E1000_ERR_SWFW_SYNC;
9117 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9118 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9121 return E1000_ERR_I2C;
9127 int igb_reinit_queues(struct igb_adapter *adapter)
9129 struct net_device *netdev = adapter->netdev;
9130 struct pci_dev *pdev = adapter->pdev;
9133 if (netif_running(netdev))
9136 igb_reset_interrupt_capability(adapter);
9138 if (igb_init_interrupt_scheme(adapter, true)) {
9139 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9143 if (netif_running(netdev))
9144 err = igb_open(netdev);
9149 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
9151 struct igb_nfc_filter *rule;
9153 spin_lock(&adapter->nfc_lock);
9155 hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9156 igb_erase_filter(adapter, rule);
9158 spin_unlock(&adapter->nfc_lock);
9161 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
9163 struct igb_nfc_filter *rule;
9165 spin_lock(&adapter->nfc_lock);
9167 hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9168 igb_add_filter(adapter, rule);
9170 spin_unlock(&adapter->nfc_lock);