drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2012 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/init.h>
  33 #include <linux/bitops.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/pagemap.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ipv6.h>
  38 #include <linux/slab.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/net_tstamp.h>
  42 #include <linux/mii.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/if.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/pci.h>
  47 #include <linux/pci-aspm.h>
  48 #include <linux/delay.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/ip.h>
  51 #include <linux/tcp.h>
  52 #include <linux/sctp.h>
  53 #include <linux/if_ether.h>
  54 #include <linux/aer.h>
  55 #include <linux/prefetch.h>
  56 #include <linux/pm_runtime.h>
  57 #ifdef CONFIG_IGB_DCA
  58 #include <linux/dca.h>
  59 #endif
  60 #include "igb.h"
  61
  62 #define MAJ 4
  63 #define MIN 0
  64 #define BUILD 1
  65 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  66 __stringify(BUILD) "-k"
  67 char igb_driver_name[] = "igb";
  68 char igb_driver_version[] = DRV_VERSION;
  69 static const char igb_driver_string[] =
  70                                 "Intel(R) Gigabit Ethernet Network Driver";
  71 static const char igb_copyright[] = "Copyright (c) 2007-2012 Intel Corporation.";
  72
  73 static const struct e1000_info *igb_info_tbl[] = {
  74         [board_82575] = &e1000_82575_info,
  75 };
  76
  77 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 108         /* required last entry */
 109         {0, }
 110 };
 111
 112 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 113
 114 void igb_reset(struct igb_adapter *);
 115 static int igb_setup_all_tx_resources(struct igb_adapter *);
 116 static int igb_setup_all_rx_resources(struct igb_adapter *);
 117 static void igb_free_all_tx_resources(struct igb_adapter *);
 118 static void igb_free_all_rx_resources(struct igb_adapter *);
 119 static void igb_setup_mrqc(struct igb_adapter *);
 120 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 121 static void __devexit igb_remove(struct pci_dev *pdev);
 122 static int igb_sw_init(struct igb_adapter *);
 123 static int igb_open(struct net_device *);
 124 static int igb_close(struct net_device *);
 125 static void igb_configure_tx(struct igb_adapter *);
 126 static void igb_configure_rx(struct igb_adapter *);
 127 static void igb_clean_all_tx_rings(struct igb_adapter *);
 128 static void igb_clean_all_rx_rings(struct igb_adapter *);
 129 static void igb_clean_tx_ring(struct igb_ring *);
 130 static void igb_clean_rx_ring(struct igb_ring *);
 131 static void igb_set_rx_mode(struct net_device *);
 132 static void igb_update_phy_info(unsigned long);
 133 static void igb_watchdog(unsigned long);
 134 static void igb_watchdog_task(struct work_struct *);
 135 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 136 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 137                                                  struct rtnl_link_stats64 *stats);
 138 static int igb_change_mtu(struct net_device *, int);
 139 static int igb_set_mac(struct net_device *, void *);
 140 static void igb_set_uta(struct igb_adapter *adapter);
 141 static irqreturn_t igb_intr(int irq, void *);
 142 static irqreturn_t igb_intr_msi(int irq, void *);
 143 static irqreturn_t igb_msix_other(int irq, void *);
 144 static irqreturn_t igb_msix_ring(int irq, void *);
 145 #ifdef CONFIG_IGB_DCA
 146 static void igb_update_dca(struct igb_q_vector *);
 147 static void igb_setup_dca(struct igb_adapter *);
 148 #endif /* CONFIG_IGB_DCA */
 149 static int igb_poll(struct napi_struct *, int);
 150 static bool igb_clean_tx_irq(struct igb_q_vector *);
 151 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 152 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 153 static void igb_tx_timeout(struct net_device *);
 154 static void igb_reset_task(struct work_struct *);
 155 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 156 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 157 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 158 static void igb_restore_vlan(struct igb_adapter *);
 159 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 160 static void igb_ping_all_vfs(struct igb_adapter *);
 161 static void igb_msg_task(struct igb_adapter *);
 162 static void igb_vmm_control(struct igb_adapter *);
 163 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 164 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 165 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 166 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 167                                int vf, u16 vlan, u8 qos);
 168 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 169 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 170                                  struct ifla_vf_info *ivi);
 171 static void igb_check_vf_rate_limit(struct igb_adapter *);
 172
 173 #ifdef CONFIG_PCI_IOV
 174 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 175 static bool igb_vfs_are_assigned(struct igb_adapter *adapter);
 176 #endif
 177
 178 #ifdef CONFIG_PM
 179 #ifdef CONFIG_PM_SLEEP
 180 static int igb_suspend(struct device *);
 181 #endif
 182 static int igb_resume(struct device *);
 183 #ifdef CONFIG_PM_RUNTIME
 184 static int igb_runtime_suspend(struct device *dev);
 185 static int igb_runtime_resume(struct device *dev);
 186 static int igb_runtime_idle(struct device *dev);
 187 #endif
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 #endif
 194 static void igb_shutdown(struct pci_dev *);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_NET_POLL_CONTROLLER
 204 /* for netdump / net console */
 205 static void igb_netpoll(struct net_device *);
 206 #endif
 207 #ifdef CONFIG_PCI_IOV
 208 static unsigned int max_vfs = 0;
 209 module_param(max_vfs, uint, 0);
 210 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 211                  "per physical function");
 212 #endif /* CONFIG_PCI_IOV */
 213
 214 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 215                      pci_channel_state_t);
 216 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 217 static void igb_io_resume(struct pci_dev *);
 218
 219 static const struct pci_error_handlers igb_err_handler = {
 220         .error_detected = igb_io_error_detected,
 221         .slot_reset = igb_io_slot_reset,
 222         .resume = igb_io_resume,
 223 };
 224
 225 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 226
 227 static struct pci_driver igb_driver = {
 228         .name     = igb_driver_name,
 229         .id_table = igb_pci_tbl,
 230         .probe    = igb_probe,
 231         .remove   = __devexit_p(igb_remove),
 232 #ifdef CONFIG_PM
 233         .driver.pm = &igb_pm_ops,
 234 #endif
 235         .shutdown = igb_shutdown,
 236         .err_handler = &igb_err_handler
 237 };
 238
 239 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 240 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 241 MODULE_LICENSE("GPL");
 242 MODULE_VERSION(DRV_VERSION);
 243
 244 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 245 static int debug = -1;
 246 module_param(debug, int, 0);
 247 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 248
 249 struct igb_reg_info {
 250         u32 ofs;
 251         char *name;
 252 };
 253
 254 static const struct igb_reg_info igb_reg_info_tbl[] = {
 255
 256         /* General Registers */
 257         {E1000_CTRL, "CTRL"},
 258         {E1000_STATUS, "STATUS"},
 259         {E1000_CTRL_EXT, "CTRL_EXT"},
 260
 261         /* Interrupt Registers */
 262         {E1000_ICR, "ICR"},
 263
 264         /* RX Registers */
 265         {E1000_RCTL, "RCTL"},
 266         {E1000_RDLEN(0), "RDLEN"},
 267         {E1000_RDH(0), "RDH"},
 268         {E1000_RDT(0), "RDT"},
 269         {E1000_RXDCTL(0), "RXDCTL"},
 270         {E1000_RDBAL(0), "RDBAL"},
 271         {E1000_RDBAH(0), "RDBAH"},
 272
 273         /* TX Registers */
 274         {E1000_TCTL, "TCTL"},
 275         {E1000_TDBAL(0), "TDBAL"},
 276         {E1000_TDBAH(0), "TDBAH"},
 277         {E1000_TDLEN(0), "TDLEN"},
 278         {E1000_TDH(0), "TDH"},
 279         {E1000_TDT(0), "TDT"},
 280         {E1000_TXDCTL(0), "TXDCTL"},
 281         {E1000_TDFH, "TDFH"},
 282         {E1000_TDFT, "TDFT"},
 283         {E1000_TDFHS, "TDFHS"},
 284         {E1000_TDFPC, "TDFPC"},
 285
 286         /* List Terminator */
 287         {}
 288 };
 289
 290 /*
 291  * igb_regdump - register printout routine
 292  */
 293 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 294 {
 295         int n = 0;
 296         char rname[16];
 297         u32 regs[8];
 298
 299         switch (reginfo->ofs) {
 300         case E1000_RDLEN(0):
 301                 for (n = 0; n < 4; n++)
 302                         regs[n] = rd32(E1000_RDLEN(n));
 303                 break;
 304         case E1000_RDH(0):
 305                 for (n = 0; n < 4; n++)
 306                         regs[n] = rd32(E1000_RDH(n));
 307                 break;
 308         case E1000_RDT(0):
 309                 for (n = 0; n < 4; n++)
 310                         regs[n] = rd32(E1000_RDT(n));
 311                 break;
 312         case E1000_RXDCTL(0):
 313                 for (n = 0; n < 4; n++)
 314                         regs[n] = rd32(E1000_RXDCTL(n));
 315                 break;
 316         case E1000_RDBAL(0):
 317                 for (n = 0; n < 4; n++)
 318                         regs[n] = rd32(E1000_RDBAL(n));
 319                 break;
 320         case E1000_RDBAH(0):
 321                 for (n = 0; n < 4; n++)
 322                         regs[n] = rd32(E1000_RDBAH(n));
 323                 break;
 324         case E1000_TDBAL(0):
 325                 for (n = 0; n < 4; n++)
 326                         regs[n] = rd32(E1000_RDBAL(n));
 327                 break;
 328         case E1000_TDBAH(0):
 329                 for (n = 0; n < 4; n++)
 330                         regs[n] = rd32(E1000_TDBAH(n));
 331                 break;
 332         case E1000_TDLEN(0):
 333                 for (n = 0; n < 4; n++)
 334                         regs[n] = rd32(E1000_TDLEN(n));
 335                 break;
 336         case E1000_TDH(0):
 337                 for (n = 0; n < 4; n++)
 338                         regs[n] = rd32(E1000_TDH(n));
 339                 break;
 340         case E1000_TDT(0):
 341                 for (n = 0; n < 4; n++)
 342                         regs[n] = rd32(E1000_TDT(n));
 343                 break;
 344         case E1000_TXDCTL(0):
 345                 for (n = 0; n < 4; n++)
 346                         regs[n] = rd32(E1000_TXDCTL(n));
 347                 break;
 348         default:
 349                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 350                 return;
 351         }
 352
 353         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 354         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 355                 regs[2], regs[3]);
 356 }
 357
 358 /*
 359  * igb_dump - Print registers, tx-rings and rx-rings
 360  */
 361 static void igb_dump(struct igb_adapter *adapter)
 362 {
 363         struct net_device *netdev = adapter->netdev;
 364         struct e1000_hw *hw = &adapter->hw;
 365         struct igb_reg_info *reginfo;
 366         struct igb_ring *tx_ring;
 367         union e1000_adv_tx_desc *tx_desc;
 368         struct my_u0 { u64 a; u64 b; } *u0;
 369         struct igb_ring *rx_ring;
 370         union e1000_adv_rx_desc *rx_desc;
 371         u32 staterr;
 372         u16 i, n;
 373
 374         if (!netif_msg_hw(adapter))
 375                 return;
 376
 377         /* Print netdevice Info */
 378         if (netdev) {
 379                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 380                 pr_info("Device Name     state            trans_start      "
 381                         "last_rx\n");
 382                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 383                         netdev->state, netdev->trans_start, netdev->last_rx);
 384         }
 385
 386         /* Print Registers */
 387         dev_info(&adapter->pdev->dev, "Register Dump\n");
 388         pr_info(" Register Name   Value\n");
 389         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 390              reginfo->name; reginfo++) {
 391                 igb_regdump(hw, reginfo);
 392         }
 393
 394         /* Print TX Ring Summary */
 395         if (!netdev || !netif_running(netdev))
 396                 goto exit;
 397
 398         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 399         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 400         for (n = 0; n < adapter->num_tx_queues; n++) {
 401                 struct igb_tx_buffer *buffer_info;
 402                 tx_ring = adapter->tx_ring[n];
 403                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 404                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 405                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 406                         (u64)dma_unmap_addr(buffer_info, dma),
 407                         dma_unmap_len(buffer_info, len),
 408                         buffer_info->next_to_watch,
 409                         (u64)buffer_info->time_stamp);
 410         }
 411
 412         /* Print TX Rings */
 413         if (!netif_msg_tx_done(adapter))
 414                 goto rx_ring_summary;
 415
 416         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 417
 418         /* Transmit Descriptor Formats
 419          *
 420          * Advanced Transmit Descriptor
 421          *   +--------------------------------------------------------------+
 422          * 0 |         Buffer Address [63:0]                                |
 423          *   +--------------------------------------------------------------+
 424          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 425          *   +--------------------------------------------------------------+
 426          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 427          */
 428
 429         for (n = 0; n < adapter->num_tx_queues; n++) {
 430                 tx_ring = adapter->tx_ring[n];
 431                 pr_info("------------------------------------\n");
 432                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 433                 pr_info("------------------------------------\n");
 434                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 435                         "[bi->dma       ] leng  ntw timestamp        "
 436                         "bi->skb\n");
 437
 438                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 439                         const char *next_desc;
 440                         struct igb_tx_buffer *buffer_info;
 441                         tx_desc = IGB_TX_DESC(tx_ring, i);
 442                         buffer_info = &tx_ring->tx_buffer_info[i];
 443                         u0 = (struct my_u0 *)tx_desc;
 444                         if (i == tx_ring->next_to_use &&
 445                             i == tx_ring->next_to_clean)
 446                                 next_desc = " NTC/U";
 447                         else if (i == tx_ring->next_to_use)
 448                                 next_desc = " NTU";
 449                         else if (i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC";
 451                         else
 452                                 next_desc = "";
 453
 454                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 455                                 " %04X  %p %016llX %p%s\n", i,
 456                                 le64_to_cpu(u0->a),
 457                                 le64_to_cpu(u0->b),
 458                                 (u64)dma_unmap_addr(buffer_info, dma),
 459                                 dma_unmap_len(buffer_info, len),
 460                                 buffer_info->next_to_watch,
 461                                 (u64)buffer_info->time_stamp,
 462                                 buffer_info->skb, next_desc);
 463
 464                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 465                                 print_hex_dump(KERN_INFO, "",
 466                                         DUMP_PREFIX_ADDRESS,
 467                                         16, 1, buffer_info->skb->data,
 468                                         dma_unmap_len(buffer_info, len),
 469                                         true);
 470                 }
 471         }
 472
 473         /* Print RX Rings Summary */
 474 rx_ring_summary:
 475         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 476         pr_info("Queue [NTU] [NTC]\n");
 477         for (n = 0; n < adapter->num_rx_queues; n++) {
 478                 rx_ring = adapter->rx_ring[n];
 479                 pr_info(" %5d %5X %5X\n",
 480                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 481         }
 482
 483         /* Print RX Rings */
 484         if (!netif_msg_rx_status(adapter))
 485                 goto exit;
 486
 487         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 488
 489         /* Advanced Receive Descriptor (Read) Format
 490          *    63                                           1        0
 491          *    +-----------------------------------------------------+
 492          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 493          *    +----------------------------------------------+------+
 494          *  8 |       Header Buffer Address [63:1]           |  DD  |
 495          *    +-----------------------------------------------------+
 496          *
 497          *
 498          * Advanced Receive Descriptor (Write-Back) Format
 499          *
 500          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 501          *   +------------------------------------------------------+
 502          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 503          *   | Checksum   Ident  |   |           |    | Type | Type |
 504          *   +------------------------------------------------------+
 505          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 506          *   +------------------------------------------------------+
 507          *   63       48 47    32 31            20 19               0
 508          */
 509
 510         for (n = 0; n < adapter->num_rx_queues; n++) {
 511                 rx_ring = adapter->rx_ring[n];
 512                 pr_info("------------------------------------\n");
 513                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 514                 pr_info("------------------------------------\n");
 515                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 516                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 517                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 518                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 519
 520                 for (i = 0; i < rx_ring->count; i++) {
 521                         const char *next_desc;
 522                         struct igb_rx_buffer *buffer_info;
 523                         buffer_info = &rx_ring->rx_buffer_info[i];
 524                         rx_desc = IGB_RX_DESC(rx_ring, i);
 525                         u0 = (struct my_u0 *)rx_desc;
 526                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 527
 528                         if (i == rx_ring->next_to_use)
 529                                 next_desc = " NTU";
 530                         else if (i == rx_ring->next_to_clean)
 531                                 next_desc = " NTC";
 532                         else
 533                                 next_desc = "";
 534
 535                         if (staterr & E1000_RXD_STAT_DD) {
 536                                 /* Descriptor Done */
 537                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 538                                         "RWB", i,
 539                                         le64_to_cpu(u0->a),
 540                                         le64_to_cpu(u0->b),
 541                                         next_desc);
 542                         } else {
 543                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 544                                         "R  ", i,
 545                                         le64_to_cpu(u0->a),
 546                                         le64_to_cpu(u0->b),
 547                                         (u64)buffer_info->dma,
 548                                         next_desc);
 549
 550                                 if (netif_msg_pktdata(adapter) &&
 551                                     buffer_info->dma && buffer_info->page) {
 552                                         print_hex_dump(KERN_INFO, "",
 553                                           DUMP_PREFIX_ADDRESS,
 554                                           16, 1,
 555                                           page_address(buffer_info->page) +
 556                                                       buffer_info->page_offset,
 557                                           IGB_RX_BUFSZ, true);
 558                                 }
 559                         }
 560                 }
 561         }
 562
 563 exit:
 564         return;
 565 }
 566
 567 /**
 568  * igb_get_hw_dev - return device
 569  * used by hardware layer to print debugging information
 570  **/
 571 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 572 {
 573         struct igb_adapter *adapter = hw->back;
 574         return adapter->netdev;
 575 }
 576
 577 /**
 578  * igb_init_module - Driver Registration Routine
 579  *
 580  * igb_init_module is the first routine called when the driver is
 581  * loaded. All it does is register with the PCI subsystem.
 582  **/
 583 static int __init igb_init_module(void)
 584 {
 585         int ret;
 586         pr_info("%s - version %s\n",
 587                igb_driver_string, igb_driver_version);
 588
 589         pr_info("%s\n", igb_copyright);
 590
 591 #ifdef CONFIG_IGB_DCA
 592         dca_register_notify(&dca_notifier);
 593 #endif
 594         ret = pci_register_driver(&igb_driver);
 595         return ret;
 596 }
 597
 598 module_init(igb_init_module);
 599
 600 /**
 601  * igb_exit_module - Driver Exit Cleanup Routine
 602  *
 603  * igb_exit_module is called just before the driver is removed
 604  * from memory.
 605  **/
 606 static void __exit igb_exit_module(void)
 607 {
 608 #ifdef CONFIG_IGB_DCA
 609         dca_unregister_notify(&dca_notifier);
 610 #endif
 611         pci_unregister_driver(&igb_driver);
 612 }
 613
 614 module_exit(igb_exit_module);
 615
 616 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 617 /**
 618  * igb_cache_ring_register - Descriptor ring to register mapping
 619  * @adapter: board private structure to initialize
 620  *
 621  * Once we know the feature-set enabled for the device, we'll cache
 622  * the register offset the descriptor ring is assigned to.
 623  **/
 624 static void igb_cache_ring_register(struct igb_adapter *adapter)
 625 {
 626         int i = 0, j = 0;
 627         u32 rbase_offset = adapter->vfs_allocated_count;
 628
 629         switch (adapter->hw.mac.type) {
 630         case e1000_82576:
 631                 /* The queues are allocated for virtualization such that VF 0
 632                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 633                  * In order to avoid collision we start at the first free queue
 634                  * and continue consuming queues in the same sequence
 635                  */
 636                 if (adapter->vfs_allocated_count) {
 637                         for (; i < adapter->rss_queues; i++)
 638                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 639                                                                Q_IDX_82576(i);
 640                 }
 641         case e1000_82575:
 642         case e1000_82580:
 643         case e1000_i350:
 644         case e1000_i210:
 645         case e1000_i211:
 646         default:
 647                 for (; i < adapter->num_rx_queues; i++)
 648                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 649                 for (; j < adapter->num_tx_queues; j++)
 650                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 651                 break;
 652         }
 653 }
 654
 655 static void igb_free_queues(struct igb_adapter *adapter)
 656 {
 657         int i;
 658
 659         for (i = 0; i < adapter->num_tx_queues; i++) {
 660                 kfree(adapter->tx_ring[i]);
 661                 adapter->tx_ring[i] = NULL;
 662         }
 663         for (i = 0; i < adapter->num_rx_queues; i++) {
 664                 kfree(adapter->rx_ring[i]);
 665                 adapter->rx_ring[i] = NULL;
 666         }
 667         adapter->num_rx_queues = 0;
 668         adapter->num_tx_queues = 0;
 669 }
 670
 671 /**
 672  * igb_alloc_queues - Allocate memory for all rings
 673  * @adapter: board private structure to initialize
 674  *
 675  * We allocate one ring per queue at run-time since we don't know the
 676  * number of queues at compile-time.
 677  **/
 678 static int igb_alloc_queues(struct igb_adapter *adapter)
 679 {
 680         struct igb_ring *ring;
 681         int i;
 682
 683         for (i = 0; i < adapter->num_tx_queues; i++) {
 684                 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
 685                 if (!ring)
 686                         goto err;
 687                 ring->count = adapter->tx_ring_count;
 688                 ring->queue_index = i;
 689                 ring->dev = &adapter->pdev->dev;
 690                 ring->netdev = adapter->netdev;
 691                 /* For 82575, context index must be unique per ring. */
 692                 if (adapter->hw.mac.type == e1000_82575)
 693                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
 694                 adapter->tx_ring[i] = ring;
 695         }
 696
 697         for (i = 0; i < adapter->num_rx_queues; i++) {
 698                 ring = kzalloc(sizeof(struct igb_ring), GFP_KERNEL);
 699                 if (!ring)
 700                         goto err;
 701                 ring->count = adapter->rx_ring_count;
 702                 ring->queue_index = i;
 703                 ring->dev = &adapter->pdev->dev;
 704                 ring->netdev = adapter->netdev;
 705                 /* set flag indicating ring supports SCTP checksum offload */
 706                 if (adapter->hw.mac.type >= e1000_82576)
 707                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
 708
 709                 /*
 710                  * On i350, i210, and i211, loopback VLAN packets
 711                  * have the tag byte-swapped.
 712                  * */
 713                 if (adapter->hw.mac.type >= e1000_i350)
 714                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
 715
 716                 adapter->rx_ring[i] = ring;
 717         }
 718
 719         igb_cache_ring_register(adapter);
 720
 721         return 0;
 722
 723 err:
 724         igb_free_queues(adapter);
 725
 726         return -ENOMEM;
 727 }
 728
 729 /**
 730  *  igb_write_ivar - configure ivar for given MSI-X vector
 731  *  @hw: pointer to the HW structure
 732  *  @msix_vector: vector number we are allocating to a given ring
 733  *  @index: row index of IVAR register to write within IVAR table
 734  *  @offset: column offset of in IVAR, should be multiple of 8
 735  *
 736  *  This function is intended to handle the writing of the IVAR register
 737  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 738  *  each containing an cause allocation for an Rx and Tx ring, and a
 739  *  variable number of rows depending on the number of queues supported.
 740  **/
 741 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 742                            int index, int offset)
 743 {
 744         u32 ivar = array_rd32(E1000_IVAR0, index);
 745
 746         /* clear any bits that are currently set */
 747         ivar &= ~((u32)0xFF << offset);
 748
 749         /* write vector and valid bit */
 750         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 751
 752         array_wr32(E1000_IVAR0, index, ivar);
 753 }
 754
 755 #define IGB_N0_QUEUE -1
 756 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 757 {
 758         struct igb_adapter *adapter = q_vector->adapter;
 759         struct e1000_hw *hw = &adapter->hw;
 760         int rx_queue = IGB_N0_QUEUE;
 761         int tx_queue = IGB_N0_QUEUE;
 762         u32 msixbm = 0;
 763
 764         if (q_vector->rx.ring)
 765                 rx_queue = q_vector->rx.ring->reg_idx;
 766         if (q_vector->tx.ring)
 767                 tx_queue = q_vector->tx.ring->reg_idx;
 768
 769         switch (hw->mac.type) {
 770         case e1000_82575:
 771                 /* The 82575 assigns vectors using a bitmask, which matches the
 772                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 773                    or more queues to a vector, we write the appropriate bits
 774                    into the MSIXBM register for that vector. */
 775                 if (rx_queue > IGB_N0_QUEUE)
 776                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 777                 if (tx_queue > IGB_N0_QUEUE)
 778                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 779                 if (!adapter->msix_entries && msix_vector == 0)
 780                         msixbm |= E1000_EIMS_OTHER;
 781                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 782                 q_vector->eims_value = msixbm;
 783                 break;
 784         case e1000_82576:
 785                 /*
 786                  * 82576 uses a table that essentially consists of 2 columns
 787                  * with 8 rows.  The ordering is column-major so we use the
 788                  * lower 3 bits as the row index, and the 4th bit as the
 789                  * column offset.
 790                  */
 791                 if (rx_queue > IGB_N0_QUEUE)
 792                         igb_write_ivar(hw, msix_vector,
 793                                        rx_queue & 0x7,
 794                                        (rx_queue & 0x8) << 1);
 795                 if (tx_queue > IGB_N0_QUEUE)
 796                         igb_write_ivar(hw, msix_vector,
 797                                        tx_queue & 0x7,
 798                                        ((tx_queue & 0x8) << 1) + 8);
 799                 q_vector->eims_value = 1 << msix_vector;
 800                 break;
 801         case e1000_82580:
 802         case e1000_i350:
 803         case e1000_i210:
 804         case e1000_i211:
 805                 /*
 806                  * On 82580 and newer adapters the scheme is similar to 82576
 807                  * however instead of ordering column-major we have things
 808                  * ordered row-major.  So we traverse the table by using
 809                  * bit 0 as the column offset, and the remaining bits as the
 810                  * row index.
 811                  */
 812                 if (rx_queue > IGB_N0_QUEUE)
 813                         igb_write_ivar(hw, msix_vector,
 814                                        rx_queue >> 1,
 815                                        (rx_queue & 0x1) << 4);
 816                 if (tx_queue > IGB_N0_QUEUE)
 817                         igb_write_ivar(hw, msix_vector,
 818                                        tx_queue >> 1,
 819                                        ((tx_queue & 0x1) << 4) + 8);
 820                 q_vector->eims_value = 1 << msix_vector;
 821                 break;
 822         default:
 823                 BUG();
 824                 break;
 825         }
 826
 827         /* add q_vector eims value to global eims_enable_mask */
 828         adapter->eims_enable_mask |= q_vector->eims_value;
 829
 830         /* configure q_vector to set itr on first interrupt */
 831         q_vector->set_itr = 1;
 832 }
 833
 834 /**
 835  * igb_configure_msix - Configure MSI-X hardware
 836  *
 837  * igb_configure_msix sets up the hardware to properly
 838  * generate MSI-X interrupts.
 839  **/
 840 static void igb_configure_msix(struct igb_adapter *adapter)
 841 {
 842         u32 tmp;
 843         int i, vector = 0;
 844         struct e1000_hw *hw = &adapter->hw;
 845
 846         adapter->eims_enable_mask = 0;
 847
 848         /* set vector for other causes, i.e. link changes */
 849         switch (hw->mac.type) {
 850         case e1000_82575:
 851                 tmp = rd32(E1000_CTRL_EXT);
 852                 /* enable MSI-X PBA support*/
 853                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 854
 855                 /* Auto-Mask interrupts upon ICR read. */
 856                 tmp |= E1000_CTRL_EXT_EIAME;
 857                 tmp |= E1000_CTRL_EXT_IRCA;
 858
 859                 wr32(E1000_CTRL_EXT, tmp);
 860
 861                 /* enable msix_other interrupt */
 862                 array_wr32(E1000_MSIXBM(0), vector++,
 863                                       E1000_EIMS_OTHER);
 864                 adapter->eims_other = E1000_EIMS_OTHER;
 865
 866                 break;
 867
 868         case e1000_82576:
 869         case e1000_82580:
 870         case e1000_i350:
 871         case e1000_i210:
 872         case e1000_i211:
 873                 /* Turn on MSI-X capability first, or our settings
 874                  * won't stick.  And it will take days to debug. */
 875                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 876                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 877                                 E1000_GPIE_NSICR);
 878
 879                 /* enable msix_other interrupt */
 880                 adapter->eims_other = 1 << vector;
 881                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 882
 883                 wr32(E1000_IVAR_MISC, tmp);
 884                 break;
 885         default:
 886                 /* do nothing, since nothing else supports MSI-X */
 887                 break;
 888         } /* switch (hw->mac.type) */
 889
 890         adapter->eims_enable_mask |= adapter->eims_other;
 891
 892         for (i = 0; i < adapter->num_q_vectors; i++)
 893                 igb_assign_vector(adapter->q_vector[i], vector++);
 894
 895         wrfl();
 896 }
 897
 898 /**
 899  * igb_request_msix - Initialize MSI-X interrupts
 900  *
 901  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 902  * kernel.
 903  **/
 904 static int igb_request_msix(struct igb_adapter *adapter)
 905 {
 906         struct net_device *netdev = adapter->netdev;
 907         struct e1000_hw *hw = &adapter->hw;
 908         int i, err = 0, vector = 0;
 909
 910         err = request_irq(adapter->msix_entries[vector].vector,
 911                           igb_msix_other, 0, netdev->name, adapter);
 912         if (err)
 913                 goto out;
 914         vector++;
 915
 916         for (i = 0; i < adapter->num_q_vectors; i++) {
 917                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 918
 919                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 920
 921                 if (q_vector->rx.ring && q_vector->tx.ring)
 922                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 923                                 q_vector->rx.ring->queue_index);
 924                 else if (q_vector->tx.ring)
 925                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 926                                 q_vector->tx.ring->queue_index);
 927                 else if (q_vector->rx.ring)
 928                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 929                                 q_vector->rx.ring->queue_index);
 930                 else
 931                         sprintf(q_vector->name, "%s-unused", netdev->name);
 932
 933                 err = request_irq(adapter->msix_entries[vector].vector,
 934                                   igb_msix_ring, 0, q_vector->name,
 935                                   q_vector);
 936                 if (err)
 937                         goto out;
 938                 vector++;
 939         }
 940
 941         igb_configure_msix(adapter);
 942         return 0;
 943 out:
 944         return err;
 945 }
 946
 947 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 948 {
 949         if (adapter->msix_entries) {
 950                 pci_disable_msix(adapter->pdev);
 951                 kfree(adapter->msix_entries);
 952                 adapter->msix_entries = NULL;
 953         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 954                 pci_disable_msi(adapter->pdev);
 955         }
 956 }
 957
 958 /**
 959  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 960  * @adapter: board private structure to initialize
 961  *
 962  * This function frees the memory allocated to the q_vectors.  In addition if
 963  * NAPI is enabled it will delete any references to the NAPI struct prior
 964  * to freeing the q_vector.
 965  **/
 966 static void igb_free_q_vectors(struct igb_adapter *adapter)
 967 {
 968         int v_idx;
 969
 970         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
 971                 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 972                 adapter->q_vector[v_idx] = NULL;
 973                 if (!q_vector)
 974                         continue;
 975                 netif_napi_del(&q_vector->napi);
 976                 kfree(q_vector);
 977         }
 978         adapter->num_q_vectors = 0;
 979 }
 980
 981 /**
 982  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 983  *
 984  * This function resets the device so that it has 0 rx queues, tx queues, and
 985  * MSI-X interrupts allocated.
 986  */
 987 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 988 {
 989         igb_free_queues(adapter);
 990         igb_free_q_vectors(adapter);
 991         igb_reset_interrupt_capability(adapter);
 992 }
 993
 994 /**
 995  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 996  *
 997  * Attempt to configure interrupts using the best available
 998  * capabilities of the hardware and kernel.
 999  **/
1000 static int igb_set_interrupt_capability(struct igb_adapter *adapter)
1001 {
1002         int err;
1003         int numvecs, i;
1004
1005         /* Number of supported queues. */
1006         adapter->num_rx_queues = adapter->rss_queues;
1007         if (adapter->vfs_allocated_count)
1008                 adapter->num_tx_queues = 1;
1009         else
1010                 adapter->num_tx_queues = adapter->rss_queues;
1011
1012         /* start with one vector for every rx queue */
1013         numvecs = adapter->num_rx_queues;
1014
1015         /* if tx handler is separate add 1 for every tx queue */
1016         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1017                 numvecs += adapter->num_tx_queues;
1018
1019         /* store the number of vectors reserved for queues */
1020         adapter->num_q_vectors = numvecs;
1021
1022         /* add 1 vector for link status interrupts */
1023         numvecs++;
1024         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1025                                         GFP_KERNEL);
1026
1027         if (!adapter->msix_entries)
1028                 goto msi_only;
1029
1030         for (i = 0; i < numvecs; i++)
1031                 adapter->msix_entries[i].entry = i;
1032
1033         err = pci_enable_msix(adapter->pdev,
1034                               adapter->msix_entries,
1035                               numvecs);
1036         if (err == 0)
1037                 goto out;
1038
1039         igb_reset_interrupt_capability(adapter);
1040
1041         /* If we can't do MSI-X, try MSI */
1042 msi_only:
1043 #ifdef CONFIG_PCI_IOV
1044         /* disable SR-IOV for non MSI-X configurations */
1045         if (adapter->vf_data) {
1046                 struct e1000_hw *hw = &adapter->hw;
1047                 /* disable iov and allow time for transactions to clear */
1048                 pci_disable_sriov(adapter->pdev);
1049                 msleep(500);
1050
1051                 kfree(adapter->vf_data);
1052                 adapter->vf_data = NULL;
1053                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1054                 wrfl();
1055                 msleep(100);
1056                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1057         }
1058 #endif
1059         adapter->vfs_allocated_count = 0;
1060         adapter->rss_queues = 1;
1061         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1062         adapter->num_rx_queues = 1;
1063         adapter->num_tx_queues = 1;
1064         adapter->num_q_vectors = 1;
1065         if (!pci_enable_msi(adapter->pdev))
1066                 adapter->flags |= IGB_FLAG_HAS_MSI;
1067 out:
1068         /* Notify the stack of the (possibly) reduced queue counts. */
1069         rtnl_lock();
1070         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
1071         err = netif_set_real_num_rx_queues(adapter->netdev,
1072                 adapter->num_rx_queues);
1073         rtnl_unlock();
1074         return err;
1075 }
1076
1077 /**
1078  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1079  * @adapter: board private structure to initialize
1080  *
1081  * We allocate one q_vector per queue interrupt.  If allocation fails we
1082  * return -ENOMEM.
1083  **/
1084 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1085 {
1086         struct igb_q_vector *q_vector;
1087         struct e1000_hw *hw = &adapter->hw;
1088         int v_idx;
1089
1090         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
1091                 q_vector = kzalloc(sizeof(struct igb_q_vector),
1092                                    GFP_KERNEL);
1093                 if (!q_vector)
1094                         goto err_out;
1095                 q_vector->adapter = adapter;
1096                 q_vector->itr_register = hw->hw_addr + E1000_EITR(0);
1097                 q_vector->itr_val = IGB_START_ITR;
1098                 netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll, 64);
1099                 adapter->q_vector[v_idx] = q_vector;
1100         }
1101
1102         return 0;
1103
1104 err_out:
1105         igb_free_q_vectors(adapter);
1106         return -ENOMEM;
1107 }
1108
1109 static void igb_map_rx_ring_to_vector(struct igb_adapter *adapter,
1110                                       int ring_idx, int v_idx)
1111 {
1112         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1113
1114         q_vector->rx.ring = adapter->rx_ring[ring_idx];
1115         q_vector->rx.ring->q_vector = q_vector;
1116         q_vector->rx.count++;
1117         q_vector->itr_val = adapter->rx_itr_setting;
1118         if (q_vector->itr_val && q_vector->itr_val <= 3)
1119                 q_vector->itr_val = IGB_START_ITR;
1120 }
1121
1122 static void igb_map_tx_ring_to_vector(struct igb_adapter *adapter,
1123                                       int ring_idx, int v_idx)
1124 {
1125         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1126
1127         q_vector->tx.ring = adapter->tx_ring[ring_idx];
1128         q_vector->tx.ring->q_vector = q_vector;
1129         q_vector->tx.count++;
1130         q_vector->itr_val = adapter->tx_itr_setting;
1131         q_vector->tx.work_limit = adapter->tx_work_limit;
1132         if (q_vector->itr_val && q_vector->itr_val <= 3)
1133                 q_vector->itr_val = IGB_START_ITR;
1134 }
1135
1136 /**
1137  * igb_map_ring_to_vector - maps allocated queues to vectors
1138  *
1139  * This function maps the recently allocated queues to vectors.
1140  **/
1141 static int igb_map_ring_to_vector(struct igb_adapter *adapter)
1142 {
1143         int i;
1144         int v_idx = 0;
1145
1146         if ((adapter->num_q_vectors < adapter->num_rx_queues) ||
1147             (adapter->num_q_vectors < adapter->num_tx_queues))
1148                 return -ENOMEM;
1149
1150         if (adapter->num_q_vectors >=
1151             (adapter->num_rx_queues + adapter->num_tx_queues)) {
1152                 for (i = 0; i < adapter->num_rx_queues; i++)
1153                         igb_map_rx_ring_to_vector(adapter, i, v_idx++);
1154                 for (i = 0; i < adapter->num_tx_queues; i++)
1155                         igb_map_tx_ring_to_vector(adapter, i, v_idx++);
1156         } else {
1157                 for (i = 0; i < adapter->num_rx_queues; i++) {
1158                         if (i < adapter->num_tx_queues)
1159                                 igb_map_tx_ring_to_vector(adapter, i, v_idx);
1160                         igb_map_rx_ring_to_vector(adapter, i, v_idx++);
1161                 }
1162                 for (; i < adapter->num_tx_queues; i++)
1163                         igb_map_tx_ring_to_vector(adapter, i, v_idx++);
1164         }
1165         return 0;
1166 }
1167
1168 /**
1169  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1170  *
1171  * This function initializes the interrupts and allocates all of the queues.
1172  **/
1173 static int igb_init_interrupt_scheme(struct igb_adapter *adapter)
1174 {
1175         struct pci_dev *pdev = adapter->pdev;
1176         int err;
1177
1178         err = igb_set_interrupt_capability(adapter);
1179         if (err)
1180                 return err;
1181
1182         err = igb_alloc_q_vectors(adapter);
1183         if (err) {
1184                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1185                 goto err_alloc_q_vectors;
1186         }
1187
1188         err = igb_alloc_queues(adapter);
1189         if (err) {
1190                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1191                 goto err_alloc_queues;
1192         }
1193
1194         err = igb_map_ring_to_vector(adapter);
1195         if (err) {
1196                 dev_err(&pdev->dev, "Invalid q_vector to ring mapping\n");
1197                 goto err_map_queues;
1198         }
1199
1200
1201         return 0;
1202 err_map_queues:
1203         igb_free_queues(adapter);
1204 err_alloc_queues:
1205         igb_free_q_vectors(adapter);
1206 err_alloc_q_vectors:
1207         igb_reset_interrupt_capability(adapter);
1208         return err;
1209 }
1210
1211 /**
1212  * igb_request_irq - initialize interrupts
1213  *
1214  * Attempts to configure interrupts using the best available
1215  * capabilities of the hardware and kernel.
1216  **/
1217 static int igb_request_irq(struct igb_adapter *adapter)
1218 {
1219         struct net_device *netdev = adapter->netdev;
1220         struct pci_dev *pdev = adapter->pdev;
1221         int err = 0;
1222
1223         if (adapter->msix_entries) {
1224                 err = igb_request_msix(adapter);
1225                 if (!err)
1226                         goto request_done;
1227                 /* fall back to MSI */
1228                 igb_clear_interrupt_scheme(adapter);
1229                 if (!pci_enable_msi(pdev))
1230                         adapter->flags |= IGB_FLAG_HAS_MSI;
1231                 igb_free_all_tx_resources(adapter);
1232                 igb_free_all_rx_resources(adapter);
1233                 adapter->num_tx_queues = 1;
1234                 adapter->num_rx_queues = 1;
1235                 adapter->num_q_vectors = 1;
1236                 err = igb_alloc_q_vectors(adapter);
1237                 if (err) {
1238                         dev_err(&pdev->dev,
1239                                 "Unable to allocate memory for vectors\n");
1240                         goto request_done;
1241                 }
1242                 err = igb_alloc_queues(adapter);
1243                 if (err) {
1244                         dev_err(&pdev->dev,
1245                                 "Unable to allocate memory for queues\n");
1246                         igb_free_q_vectors(adapter);
1247                         goto request_done;
1248                 }
1249                 igb_setup_all_tx_resources(adapter);
1250                 igb_setup_all_rx_resources(adapter);
1251         }
1252
1253         igb_assign_vector(adapter->q_vector[0], 0);
1254
1255         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1256                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1257                                   netdev->name, adapter);
1258                 if (!err)
1259                         goto request_done;
1260
1261                 /* fall back to legacy interrupts */
1262                 igb_reset_interrupt_capability(adapter);
1263                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1264         }
1265
1266         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1267                           netdev->name, adapter);
1268
1269         if (err)
1270                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1271                         err);
1272
1273 request_done:
1274         return err;
1275 }
1276
1277 static void igb_free_irq(struct igb_adapter *adapter)
1278 {
1279         if (adapter->msix_entries) {
1280                 int vector = 0, i;
1281
1282                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1283
1284                 for (i = 0; i < adapter->num_q_vectors; i++)
1285                         free_irq(adapter->msix_entries[vector++].vector,
1286                                  adapter->q_vector[i]);
1287         } else {
1288                 free_irq(adapter->pdev->irq, adapter);
1289         }
1290 }
1291
1292 /**
1293  * igb_irq_disable - Mask off interrupt generation on the NIC
1294  * @adapter: board private structure
1295  **/
1296 static void igb_irq_disable(struct igb_adapter *adapter)
1297 {
1298         struct e1000_hw *hw = &adapter->hw;
1299
1300         /*
1301          * we need to be careful when disabling interrupts.  The VFs are also
1302          * mapped into these registers and so clearing the bits can cause
1303          * issues on the VF drivers so we only need to clear what we set
1304          */
1305         if (adapter->msix_entries) {
1306                 u32 regval = rd32(E1000_EIAM);
1307                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1308                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1309                 regval = rd32(E1000_EIAC);
1310                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1311         }
1312
1313         wr32(E1000_IAM, 0);
1314         wr32(E1000_IMC, ~0);
1315         wrfl();
1316         if (adapter->msix_entries) {
1317                 int i;
1318                 for (i = 0; i < adapter->num_q_vectors; i++)
1319                         synchronize_irq(adapter->msix_entries[i].vector);
1320         } else {
1321                 synchronize_irq(adapter->pdev->irq);
1322         }
1323 }
1324
1325 /**
1326  * igb_irq_enable - Enable default interrupt generation settings
1327  * @adapter: board private structure
1328  **/
1329 static void igb_irq_enable(struct igb_adapter *adapter)
1330 {
1331         struct e1000_hw *hw = &adapter->hw;
1332
1333         if (adapter->msix_entries) {
1334                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1335                 u32 regval = rd32(E1000_EIAC);
1336                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1337                 regval = rd32(E1000_EIAM);
1338                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1339                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1340                 if (adapter->vfs_allocated_count) {
1341                         wr32(E1000_MBVFIMR, 0xFF);
1342                         ims |= E1000_IMS_VMMB;
1343                 }
1344                 wr32(E1000_IMS, ims);
1345         } else {
1346                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1347                                 E1000_IMS_DRSTA);
1348                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1349                                 E1000_IMS_DRSTA);
1350         }
1351 }
1352
1353 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1354 {
1355         struct e1000_hw *hw = &adapter->hw;
1356         u16 vid = adapter->hw.mng_cookie.vlan_id;
1357         u16 old_vid = adapter->mng_vlan_id;
1358
1359         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1360                 /* add VID to filter table */
1361                 igb_vfta_set(hw, vid, true);
1362                 adapter->mng_vlan_id = vid;
1363         } else {
1364                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1365         }
1366
1367         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1368             (vid != old_vid) &&
1369             !test_bit(old_vid, adapter->active_vlans)) {
1370                 /* remove VID from filter table */
1371                 igb_vfta_set(hw, old_vid, false);
1372         }
1373 }
1374
1375 /**
1376  * igb_release_hw_control - release control of the h/w to f/w
1377  * @adapter: address of board private structure
1378  *
1379  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1380  * For ASF and Pass Through versions of f/w this means that the
1381  * driver is no longer loaded.
1382  *
1383  **/
1384 static void igb_release_hw_control(struct igb_adapter *adapter)
1385 {
1386         struct e1000_hw *hw = &adapter->hw;
1387         u32 ctrl_ext;
1388
1389         /* Let firmware take over control of h/w */
1390         ctrl_ext = rd32(E1000_CTRL_EXT);
1391         wr32(E1000_CTRL_EXT,
1392                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1393 }
1394
1395 /**
1396  * igb_get_hw_control - get control of the h/w from f/w
1397  * @adapter: address of board private structure
1398  *
1399  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1400  * For ASF and Pass Through versions of f/w this means that
1401  * the driver is loaded.
1402  *
1403  **/
1404 static void igb_get_hw_control(struct igb_adapter *adapter)
1405 {
1406         struct e1000_hw *hw = &adapter->hw;
1407         u32 ctrl_ext;
1408
1409         /* Let firmware know the driver has taken over */
1410         ctrl_ext = rd32(E1000_CTRL_EXT);
1411         wr32(E1000_CTRL_EXT,
1412                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1413 }
1414
1415 /**
1416  * igb_configure - configure the hardware for RX and TX
1417  * @adapter: private board structure
1418  **/
1419 static void igb_configure(struct igb_adapter *adapter)
1420 {
1421         struct net_device *netdev = adapter->netdev;
1422         int i;
1423
1424         igb_get_hw_control(adapter);
1425         igb_set_rx_mode(netdev);
1426
1427         igb_restore_vlan(adapter);
1428
1429         igb_setup_tctl(adapter);
1430         igb_setup_mrqc(adapter);
1431         igb_setup_rctl(adapter);
1432
1433         igb_configure_tx(adapter);
1434         igb_configure_rx(adapter);
1435
1436         igb_rx_fifo_flush_82575(&adapter->hw);
1437
1438         /* call igb_desc_unused which always leaves
1439          * at least 1 descriptor unused to make sure
1440          * next_to_use != next_to_clean */
1441         for (i = 0; i < adapter->num_rx_queues; i++) {
1442                 struct igb_ring *ring = adapter->rx_ring[i];
1443                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1444         }
1445 }
1446
1447 /**
1448  * igb_power_up_link - Power up the phy/serdes link
1449  * @adapter: address of board private structure
1450  **/
1451 void igb_power_up_link(struct igb_adapter *adapter)
1452 {
1453         igb_reset_phy(&adapter->hw);
1454
1455         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1456                 igb_power_up_phy_copper(&adapter->hw);
1457         else
1458                 igb_power_up_serdes_link_82575(&adapter->hw);
1459 }
1460
1461 /**
1462  * igb_power_down_link - Power down the phy/serdes link
1463  * @adapter: address of board private structure
1464  */
1465 static void igb_power_down_link(struct igb_adapter *adapter)
1466 {
1467         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1468                 igb_power_down_phy_copper_82575(&adapter->hw);
1469         else
1470                 igb_shutdown_serdes_link_82575(&adapter->hw);
1471 }
1472
1473 /**
1474  * igb_up - Open the interface and prepare it to handle traffic
1475  * @adapter: board private structure
1476  **/
1477 int igb_up(struct igb_adapter *adapter)
1478 {
1479         struct e1000_hw *hw = &adapter->hw;
1480         int i;
1481
1482         /* hardware has been reset, we need to reload some things */
1483         igb_configure(adapter);
1484
1485         clear_bit(__IGB_DOWN, &adapter->state);
1486
1487         for (i = 0; i < adapter->num_q_vectors; i++)
1488                 napi_enable(&(adapter->q_vector[i]->napi));
1489
1490         if (adapter->msix_entries)
1491                 igb_configure_msix(adapter);
1492         else
1493                 igb_assign_vector(adapter->q_vector[0], 0);
1494
1495         /* Clear any pending interrupts. */
1496         rd32(E1000_ICR);
1497         igb_irq_enable(adapter);
1498
1499         /* notify VFs that reset has been completed */
1500         if (adapter->vfs_allocated_count) {
1501                 u32 reg_data = rd32(E1000_CTRL_EXT);
1502                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1503                 wr32(E1000_CTRL_EXT, reg_data);
1504         }
1505
1506         netif_tx_start_all_queues(adapter->netdev);
1507
1508         /* start the watchdog. */
1509         hw->mac.get_link_status = 1;
1510         schedule_work(&adapter->watchdog_task);
1511
1512         return 0;
1513 }
1514
1515 void igb_down(struct igb_adapter *adapter)
1516 {
1517         struct net_device *netdev = adapter->netdev;
1518         struct e1000_hw *hw = &adapter->hw;
1519         u32 tctl, rctl;
1520         int i;
1521
1522         /* signal that we're down so the interrupt handler does not
1523          * reschedule our watchdog timer */
1524         set_bit(__IGB_DOWN, &adapter->state);
1525
1526         /* disable receives in the hardware */
1527         rctl = rd32(E1000_RCTL);
1528         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1529         /* flush and sleep below */
1530
1531         netif_tx_stop_all_queues(netdev);
1532
1533         /* disable transmits in the hardware */
1534         tctl = rd32(E1000_TCTL);
1535         tctl &= ~E1000_TCTL_EN;
1536         wr32(E1000_TCTL, tctl);
1537         /* flush both disables and wait for them to finish */
1538         wrfl();
1539         msleep(10);
1540
1541         for (i = 0; i < adapter->num_q_vectors; i++)
1542                 napi_disable(&(adapter->q_vector[i]->napi));
1543
1544         igb_irq_disable(adapter);
1545
1546         del_timer_sync(&adapter->watchdog_timer);
1547         del_timer_sync(&adapter->phy_info_timer);
1548
1549         netif_carrier_off(netdev);
1550
1551         /* record the stats before reset*/
1552         spin_lock(&adapter->stats64_lock);
1553         igb_update_stats(adapter, &adapter->stats64);
1554         spin_unlock(&adapter->stats64_lock);
1555
1556         adapter->link_speed = 0;
1557         adapter->link_duplex = 0;
1558
1559         if (!pci_channel_offline(adapter->pdev))
1560                 igb_reset(adapter);
1561         igb_clean_all_tx_rings(adapter);
1562         igb_clean_all_rx_rings(adapter);
1563 #ifdef CONFIG_IGB_DCA
1564
1565         /* since we reset the hardware DCA settings were cleared */
1566         igb_setup_dca(adapter);
1567 #endif
1568 }
1569
1570 void igb_reinit_locked(struct igb_adapter *adapter)
1571 {
1572         WARN_ON(in_interrupt());
1573         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1574                 msleep(1);
1575         igb_down(adapter);
1576         igb_up(adapter);
1577         clear_bit(__IGB_RESETTING, &adapter->state);
1578 }
1579
1580 void igb_reset(struct igb_adapter *adapter)
1581 {
1582         struct pci_dev *pdev = adapter->pdev;
1583         struct e1000_hw *hw = &adapter->hw;
1584         struct e1000_mac_info *mac = &hw->mac;
1585         struct e1000_fc_info *fc = &hw->fc;
1586         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
1587         u16 hwm;
1588
1589         /* Repartition Pba for greater than 9k mtu
1590          * To take effect CTRL.RST is required.
1591          */
1592         switch (mac->type) {
1593         case e1000_i350:
1594         case e1000_82580:
1595                 pba = rd32(E1000_RXPBS);
1596                 pba = igb_rxpbs_adjust_82580(pba);
1597                 break;
1598         case e1000_82576:
1599                 pba = rd32(E1000_RXPBS);
1600                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1601                 break;
1602         case e1000_82575:
1603         case e1000_i210:
1604         case e1000_i211:
1605         default:
1606                 pba = E1000_PBA_34K;
1607                 break;
1608         }
1609
1610         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1611             (mac->type < e1000_82576)) {
1612                 /* adjust PBA for jumbo frames */
1613                 wr32(E1000_PBA, pba);
1614
1615                 /* To maintain wire speed transmits, the Tx FIFO should be
1616                  * large enough to accommodate two full transmit packets,
1617                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1618                  * the Rx FIFO should be large enough to accommodate at least
1619                  * one full receive packet and is similarly rounded up and
1620                  * expressed in KB. */
1621                 pba = rd32(E1000_PBA);
1622                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1623                 tx_space = pba >> 16;
1624                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1625                 pba &= 0xffff;
1626                 /* the tx fifo also stores 16 bytes of information about the tx
1627                  * but don't include ethernet FCS because hardware appends it */
1628                 min_tx_space = (adapter->max_frame_size +
1629                                 sizeof(union e1000_adv_tx_desc) -
1630                                 ETH_FCS_LEN) * 2;
1631                 min_tx_space = ALIGN(min_tx_space, 1024);
1632                 min_tx_space >>= 10;
1633                 /* software strips receive CRC, so leave room for it */
1634                 min_rx_space = adapter->max_frame_size;
1635                 min_rx_space = ALIGN(min_rx_space, 1024);
1636                 min_rx_space >>= 10;
1637
1638                 /* If current Tx allocation is less than the min Tx FIFO size,
1639                  * and the min Tx FIFO size is less than the current Rx FIFO
1640                  * allocation, take space away from current Rx allocation */
1641                 if (tx_space < min_tx_space &&
1642                     ((min_tx_space - tx_space) < pba)) {
1643                         pba = pba - (min_tx_space - tx_space);
1644
1645                         /* if short on rx space, rx wins and must trump tx
1646                          * adjustment */
1647                         if (pba < min_rx_space)
1648                                 pba = min_rx_space;
1649                 }
1650                 wr32(E1000_PBA, pba);
1651         }
1652
1653         /* flow control settings */
1654         /* The high water mark must be low enough to fit one full frame
1655          * (or the size used for early receive) above it in the Rx FIFO.
1656          * Set it to the lower of:
1657          * - 90% of the Rx FIFO size, or
1658          * - the full Rx FIFO size minus one full frame */
1659         hwm = min(((pba << 10) * 9 / 10),
1660                         ((pba << 10) - 2 * adapter->max_frame_size));
1661
1662         fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
1663         fc->low_water = fc->high_water - 16;
1664         fc->pause_time = 0xFFFF;
1665         fc->send_xon = 1;
1666         fc->current_mode = fc->requested_mode;
1667
1668         /* disable receive for all VFs and wait one second */
1669         if (adapter->vfs_allocated_count) {
1670                 int i;
1671                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1672                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1673
1674                 /* ping all the active vfs to let them know we are going down */
1675                 igb_ping_all_vfs(adapter);
1676
1677                 /* disable transmits and receives */
1678                 wr32(E1000_VFRE, 0);
1679                 wr32(E1000_VFTE, 0);
1680         }
1681
1682         /* Allow time for pending master requests to run */
1683         hw->mac.ops.reset_hw(hw);
1684         wr32(E1000_WUC, 0);
1685
1686         if (hw->mac.ops.init_hw(hw))
1687                 dev_err(&pdev->dev, "Hardware Error\n");
1688
1689         /*
1690          * Flow control settings reset on hardware reset, so guarantee flow
1691          * control is off when forcing speed.
1692          */
1693         if (!hw->mac.autoneg)
1694                 igb_force_mac_fc(hw);
1695
1696         igb_init_dmac(adapter, pba);
1697         if (!netif_running(adapter->netdev))
1698                 igb_power_down_link(adapter);
1699
1700         igb_update_mng_vlan(adapter);
1701
1702         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1703         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1704
1705 #ifdef CONFIG_IGB_PTP
1706         /* Re-enable PTP, where applicable. */
1707         igb_ptp_reset(adapter);
1708 #endif /* CONFIG_IGB_PTP */
1709
1710         igb_get_phy_info(hw);
1711 }
1712
1713 static netdev_features_t igb_fix_features(struct net_device *netdev,
1714         netdev_features_t features)
1715 {
1716         /*
1717          * Since there is no support for separate rx/tx vlan accel
1718          * enable/disable make sure tx flag is always in same state as rx.
1719          */
1720         if (features & NETIF_F_HW_VLAN_RX)
1721                 features |= NETIF_F_HW_VLAN_TX;
1722         else
1723                 features &= ~NETIF_F_HW_VLAN_TX;
1724
1725         return features;
1726 }
1727
1728 static int igb_set_features(struct net_device *netdev,
1729         netdev_features_t features)
1730 {
1731         netdev_features_t changed = netdev->features ^ features;
1732         struct igb_adapter *adapter = netdev_priv(netdev);
1733
1734         if (changed & NETIF_F_HW_VLAN_RX)
1735                 igb_vlan_mode(netdev, features);
1736
1737         if (!(changed & NETIF_F_RXALL))
1738                 return 0;
1739
1740         netdev->features = features;
1741
1742         if (netif_running(netdev))
1743                 igb_reinit_locked(adapter);
1744         else
1745                 igb_reset(adapter);
1746
1747         return 0;
1748 }
1749
1750 static const struct net_device_ops igb_netdev_ops = {
1751         .ndo_open               = igb_open,
1752         .ndo_stop               = igb_close,
1753         .ndo_start_xmit         = igb_xmit_frame,
1754         .ndo_get_stats64        = igb_get_stats64,
1755         .ndo_set_rx_mode        = igb_set_rx_mode,
1756         .ndo_set_mac_address    = igb_set_mac,
1757         .ndo_change_mtu         = igb_change_mtu,
1758         .ndo_do_ioctl           = igb_ioctl,
1759         .ndo_tx_timeout         = igb_tx_timeout,
1760         .ndo_validate_addr      = eth_validate_addr,
1761         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
1762         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
1763         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
1764         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
1765         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
1766         .ndo_get_vf_config      = igb_ndo_get_vf_config,
1767 #ifdef CONFIG_NET_POLL_CONTROLLER
1768         .ndo_poll_controller    = igb_netpoll,
1769 #endif
1770         .ndo_fix_features       = igb_fix_features,
1771         .ndo_set_features       = igb_set_features,
1772 };
1773
1774 /**
1775  * igb_set_fw_version - Configure version string for ethtool
1776  * @adapter: adapter struct
1777  *
1778  **/
1779 void igb_set_fw_version(struct igb_adapter *adapter)
1780 {
1781         struct e1000_hw *hw = &adapter->hw;
1782         u16 eeprom_verh, eeprom_verl, comb_verh, comb_verl, comb_offset;
1783         u16 major, build, patch, fw_version;
1784         u32 etrack_id;
1785
1786         hw->nvm.ops.read(hw, 5, 1, &fw_version);
1787         if (adapter->hw.mac.type != e1000_i211) {
1788                 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);
1789                 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);
1790                 etrack_id = (eeprom_verh << IGB_ETRACK_SHIFT) | eeprom_verl;
1791
1792                 /* combo image version needs to be found */
1793                 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
1794                 if ((comb_offset != 0x0) &&
1795                     (comb_offset != IGB_NVM_VER_INVALID)) {
1796                         hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset
1797                                          + 1), 1, &comb_verh);
1798                         hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),
1799                                          1, &comb_verl);
1800
1801                         /* Only display Option Rom if it exists and is valid */
1802                         if ((comb_verh && comb_verl) &&
1803                             ((comb_verh != IGB_NVM_VER_INVALID) &&
1804                              (comb_verl != IGB_NVM_VER_INVALID))) {
1805                                 major = comb_verl >> IGB_COMB_VER_SHFT;
1806                                 build = (comb_verl << IGB_COMB_VER_SHFT) |
1807                                         (comb_verh >> IGB_COMB_VER_SHFT);
1808                                 patch = comb_verh & IGB_COMB_VER_MASK;
1809                                 snprintf(adapter->fw_version,
1810                                          sizeof(adapter->fw_version),
1811                                          "%d.%d%d, 0x%08x, %d.%d.%d",
1812                                          (fw_version & IGB_MAJOR_MASK) >>
1813                                          IGB_MAJOR_SHIFT,
1814                                          (fw_version & IGB_MINOR_MASK) >>
1815                                          IGB_MINOR_SHIFT,
1816                                          (fw_version & IGB_BUILD_MASK),
1817                                          etrack_id, major, build, patch);
1818                                 goto out;
1819                         }
1820                 }
1821                 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1822                          "%d.%d%d, 0x%08x",
1823                          (fw_version & IGB_MAJOR_MASK) >> IGB_MAJOR_SHIFT,
1824                          (fw_version & IGB_MINOR_MASK) >> IGB_MINOR_SHIFT,
1825                          (fw_version & IGB_BUILD_MASK), etrack_id);
1826         } else {
1827                 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1828                          "%d.%d%d",
1829                          (fw_version & IGB_MAJOR_MASK) >> IGB_MAJOR_SHIFT,
1830                          (fw_version & IGB_MINOR_MASK) >> IGB_MINOR_SHIFT,
1831                          (fw_version & IGB_BUILD_MASK));
1832         }
1833 out:
1834         return;
1835 }
1836
1837 /**
1838  * igb_probe - Device Initialization Routine
1839  * @pdev: PCI device information struct
1840  * @ent: entry in igb_pci_tbl
1841  *
1842  * Returns 0 on success, negative on failure
1843  *
1844  * igb_probe initializes an adapter identified by a pci_dev structure.
1845  * The OS initialization, configuring of the adapter private structure,
1846  * and a hardware reset occur.
1847  **/
1848 static int __devinit igb_probe(struct pci_dev *pdev,
1849                                const struct pci_device_id *ent)
1850 {
1851         struct net_device *netdev;
1852         struct igb_adapter *adapter;
1853         struct e1000_hw *hw;
1854         u16 eeprom_data = 0;
1855         s32 ret_val;
1856         static int global_quad_port_a; /* global quad port a indication */
1857         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1858         unsigned long mmio_start, mmio_len;
1859         int err, pci_using_dac;
1860         u16 eeprom_apme_mask = IGB_EEPROM_APME;
1861         u8 part_str[E1000_PBANUM_LENGTH];
1862
1863         /* Catch broken hardware that put the wrong VF device ID in
1864          * the PCIe SR-IOV capability.
1865          */
1866         if (pdev->is_virtfn) {
1867                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
1868                         pci_name(pdev), pdev->vendor, pdev->device);
1869                 return -EINVAL;
1870         }
1871
1872         err = pci_enable_device_mem(pdev);
1873         if (err)
1874                 return err;
1875
1876         pci_using_dac = 0;
1877         err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
1878         if (!err) {
1879                 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
1880                 if (!err)
1881                         pci_using_dac = 1;
1882         } else {
1883                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1884                 if (err) {
1885                         err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1886                         if (err) {
1887                                 dev_err(&pdev->dev, "No usable DMA "
1888                                         "configuration, aborting\n");
1889                                 goto err_dma;
1890                         }
1891                 }
1892         }
1893
1894         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
1895                                            IORESOURCE_MEM),
1896                                            igb_driver_name);
1897         if (err)
1898                 goto err_pci_reg;
1899
1900         pci_enable_pcie_error_reporting(pdev);
1901
1902         pci_set_master(pdev);
1903         pci_save_state(pdev);
1904
1905         err = -ENOMEM;
1906         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
1907                                    IGB_MAX_TX_QUEUES);
1908         if (!netdev)
1909                 goto err_alloc_etherdev;
1910
1911         SET_NETDEV_DEV(netdev, &pdev->dev);
1912
1913         pci_set_drvdata(pdev, netdev);
1914         adapter = netdev_priv(netdev);
1915         adapter->netdev = netdev;
1916         adapter->pdev = pdev;
1917         hw = &adapter->hw;
1918         hw->back = adapter;
1919         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1920
1921         mmio_start = pci_resource_start(pdev, 0);
1922         mmio_len = pci_resource_len(pdev, 0);
1923
1924         err = -EIO;
1925         hw->hw_addr = ioremap(mmio_start, mmio_len);
1926         if (!hw->hw_addr)
1927                 goto err_ioremap;
1928
1929         netdev->netdev_ops = &igb_netdev_ops;
1930         igb_set_ethtool_ops(netdev);
1931         netdev->watchdog_timeo = 5 * HZ;
1932
1933         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1934
1935         netdev->mem_start = mmio_start;
1936         netdev->mem_end = mmio_start + mmio_len;
1937
1938         /* PCI config space info */
1939         hw->vendor_id = pdev->vendor;
1940         hw->device_id = pdev->device;
1941         hw->revision_id = pdev->revision;
1942         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1943         hw->subsystem_device_id = pdev->subsystem_device;
1944
1945         /* Copy the default MAC, PHY and NVM function pointers */
1946         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1947         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1948         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1949         /* Initialize skew-specific constants */
1950         err = ei->get_invariants(hw);
1951         if (err)
1952                 goto err_sw_init;
1953
1954         /* setup the private structure */
1955         err = igb_sw_init(adapter);
1956         if (err)
1957                 goto err_sw_init;
1958
1959         igb_get_bus_info_pcie(hw);
1960
1961         hw->phy.autoneg_wait_to_complete = false;
1962
1963         /* Copper options */
1964         if (hw->phy.media_type == e1000_media_type_copper) {
1965                 hw->phy.mdix = AUTO_ALL_MODES;
1966                 hw->phy.disable_polarity_correction = false;
1967                 hw->phy.ms_type = e1000_ms_hw_default;
1968         }
1969
1970         if (igb_check_reset_block(hw))
1971                 dev_info(&pdev->dev,
1972                         "PHY reset is blocked due to SOL/IDER session.\n");
1973
1974         /*
1975          * features is initialized to 0 in allocation, it might have bits
1976          * set by igb_sw_init so we should use an or instead of an
1977          * assignment.
1978          */
1979         netdev->features |= NETIF_F_SG |
1980                             NETIF_F_IP_CSUM |
1981                             NETIF_F_IPV6_CSUM |
1982                             NETIF_F_TSO |
1983                             NETIF_F_TSO6 |
1984                             NETIF_F_RXHASH |
1985                             NETIF_F_RXCSUM |
1986                             NETIF_F_HW_VLAN_RX |
1987                             NETIF_F_HW_VLAN_TX;
1988
1989         /* copy netdev features into list of user selectable features */
1990         netdev->hw_features |= netdev->features;
1991         netdev->hw_features |= NETIF_F_RXALL;
1992
1993         /* set this bit last since it cannot be part of hw_features */
1994         netdev->features |= NETIF_F_HW_VLAN_FILTER;
1995
1996         netdev->vlan_features |= NETIF_F_TSO |
1997                                  NETIF_F_TSO6 |
1998                                  NETIF_F_IP_CSUM |
1999                                  NETIF_F_IPV6_CSUM |
2000                                  NETIF_F_SG;
2001
2002         netdev->priv_flags |= IFF_SUPP_NOFCS;
2003
2004         if (pci_using_dac) {
2005                 netdev->features |= NETIF_F_HIGHDMA;
2006                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2007         }
2008
2009         if (hw->mac.type >= e1000_82576) {
2010                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2011                 netdev->features |= NETIF_F_SCTP_CSUM;
2012         }
2013
2014         netdev->priv_flags |= IFF_UNICAST_FLT;
2015
2016         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2017
2018         /* before reading the NVM, reset the controller to put the device in a
2019          * known good starting state */
2020         hw->mac.ops.reset_hw(hw);
2021
2022         /*
2023          * make sure the NVM is good , i211 parts have special NVM that
2024          * doesn't contain a checksum
2025          */
2026         if (hw->mac.type != e1000_i211) {
2027                 if (hw->nvm.ops.validate(hw) < 0) {
2028                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2029                         err = -EIO;
2030                         goto err_eeprom;
2031                 }
2032         }
2033
2034         /* copy the MAC address out of the NVM */
2035         if (hw->mac.ops.read_mac_addr(hw))
2036                 dev_err(&pdev->dev, "NVM Read Error\n");
2037
2038         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2039         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2040
2041         if (!is_valid_ether_addr(netdev->perm_addr)) {
2042                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2043                 err = -EIO;
2044                 goto err_eeprom;
2045         }
2046
2047         /* get firmware version for ethtool -i */
2048         igb_set_fw_version(adapter);
2049
2050         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2051                     (unsigned long) adapter);
2052         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2053                     (unsigned long) adapter);
2054
2055         INIT_WORK(&adapter->reset_task, igb_reset_task);
2056         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2057
2058         /* Initialize link properties that are user-changeable */
2059         adapter->fc_autoneg = true;
2060         hw->mac.autoneg = true;
2061         hw->phy.autoneg_advertised = 0x2f;
2062
2063         hw->fc.requested_mode = e1000_fc_default;
2064         hw->fc.current_mode = e1000_fc_default;
2065
2066         igb_validate_mdi_setting(hw);
2067
2068         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
2069          * enable the ACPI Magic Packet filter
2070          */
2071
2072         if (hw->bus.func == 0)
2073                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
2074         else if (hw->mac.type >= e1000_82580)
2075                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2076                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2077                                  &eeprom_data);
2078         else if (hw->bus.func == 1)
2079                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2080
2081         if (eeprom_data & eeprom_apme_mask)
2082                 adapter->eeprom_wol |= E1000_WUFC_MAG;
2083
2084         /* now that we have the eeprom settings, apply the special cases where
2085          * the eeprom may be wrong or the board simply won't support wake on
2086          * lan on a particular port */
2087         switch (pdev->device) {
2088         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2089                 adapter->eeprom_wol = 0;
2090                 break;
2091         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2092         case E1000_DEV_ID_82576_FIBER:
2093         case E1000_DEV_ID_82576_SERDES:
2094                 /* Wake events only supported on port A for dual fiber
2095                  * regardless of eeprom setting */
2096                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2097                         adapter->eeprom_wol = 0;
2098                 break;
2099         case E1000_DEV_ID_82576_QUAD_COPPER:
2100         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2101                 /* if quad port adapter, disable WoL on all but port A */
2102                 if (global_quad_port_a != 0)
2103                         adapter->eeprom_wol = 0;
2104                 else
2105                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2106                 /* Reset for multiple quad port adapters */
2107                 if (++global_quad_port_a == 4)
2108                         global_quad_port_a = 0;
2109                 break;
2110         }
2111
2112         /* initialize the wol settings based on the eeprom settings */
2113         adapter->wol = adapter->eeprom_wol;
2114         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2115
2116         /* reset the hardware with the new settings */
2117         igb_reset(adapter);
2118
2119         /* let the f/w know that the h/w is now under the control of the
2120          * driver. */
2121         igb_get_hw_control(adapter);
2122
2123         strcpy(netdev->name, "eth%d");
2124         err = register_netdev(netdev);
2125         if (err)
2126                 goto err_register;
2127
2128         /* carrier off reporting is important to ethtool even BEFORE open */
2129         netif_carrier_off(netdev);
2130
2131 #ifdef CONFIG_IGB_DCA
2132         if (dca_add_requester(&pdev->dev) == 0) {
2133                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2134                 dev_info(&pdev->dev, "DCA enabled\n");
2135                 igb_setup_dca(adapter);
2136         }
2137
2138 #endif
2139
2140 #ifdef CONFIG_IGB_PTP
2141         /* do hw tstamp init after resetting */
2142         igb_ptp_init(adapter);
2143 #endif /* CONFIG_IGB_PTP */
2144
2145         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2146         /* print bus type/speed/width info */
2147         dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2148                  netdev->name,
2149                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2150                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2151                                                             "unknown"),
2152                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2153                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2154                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2155                    "unknown"),
2156                  netdev->dev_addr);
2157
2158         ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2159         if (ret_val)
2160                 strcpy(part_str, "Unknown");
2161         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2162         dev_info(&pdev->dev,
2163                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2164                 adapter->msix_entries ? "MSI-X" :
2165                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2166                 adapter->num_rx_queues, adapter->num_tx_queues);
2167         switch (hw->mac.type) {
2168         case e1000_i350:
2169         case e1000_i210:
2170         case e1000_i211:
2171                 igb_set_eee_i350(hw);
2172                 break;
2173         default:
2174                 break;
2175         }
2176
2177         pm_runtime_put_noidle(&pdev->dev);
2178         return 0;
2179
2180 err_register:
2181         igb_release_hw_control(adapter);
2182 err_eeprom:
2183         if (!igb_check_reset_block(hw))
2184                 igb_reset_phy(hw);
2185
2186         if (hw->flash_address)
2187                 iounmap(hw->flash_address);
2188 err_sw_init:
2189         igb_clear_interrupt_scheme(adapter);
2190         iounmap(hw->hw_addr);
2191 err_ioremap:
2192         free_netdev(netdev);
2193 err_alloc_etherdev:
2194         pci_release_selected_regions(pdev,
2195                                      pci_select_bars(pdev, IORESOURCE_MEM));
2196 err_pci_reg:
2197 err_dma:
2198         pci_disable_device(pdev);
2199         return err;
2200 }
2201
2202 /**
2203  * igb_remove - Device Removal Routine
2204  * @pdev: PCI device information struct
2205  *
2206  * igb_remove is called by the PCI subsystem to alert the driver
2207  * that it should release a PCI device.  The could be caused by a
2208  * Hot-Plug event, or because the driver is going to be removed from
2209  * memory.
2210  **/
2211 static void __devexit igb_remove(struct pci_dev *pdev)
2212 {
2213         struct net_device *netdev = pci_get_drvdata(pdev);
2214         struct igb_adapter *adapter = netdev_priv(netdev);
2215         struct e1000_hw *hw = &adapter->hw;
2216
2217         pm_runtime_get_noresume(&pdev->dev);
2218 #ifdef CONFIG_IGB_PTP
2219         igb_ptp_stop(adapter);
2220 #endif /* CONFIG_IGB_PTP */
2221
2222         /*
2223          * The watchdog timer may be rescheduled, so explicitly
2224          * disable watchdog from being rescheduled.
2225          */
2226         set_bit(__IGB_DOWN, &adapter->state);
2227         del_timer_sync(&adapter->watchdog_timer);
2228         del_timer_sync(&adapter->phy_info_timer);
2229
2230         cancel_work_sync(&adapter->reset_task);
2231         cancel_work_sync(&adapter->watchdog_task);
2232
2233 #ifdef CONFIG_IGB_DCA
2234         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2235                 dev_info(&pdev->dev, "DCA disabled\n");
2236                 dca_remove_requester(&pdev->dev);
2237                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2238                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2239         }
2240 #endif
2241
2242         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2243          * would have already happened in close and is redundant. */
2244         igb_release_hw_control(adapter);
2245
2246         unregister_netdev(netdev);
2247
2248         igb_clear_interrupt_scheme(adapter);
2249
2250 #ifdef CONFIG_PCI_IOV
2251         /* reclaim resources allocated to VFs */
2252         if (adapter->vf_data) {
2253                 /* disable iov and allow time for transactions to clear */
2254                 if (igb_vfs_are_assigned(adapter)) {
2255                         dev_info(&pdev->dev, "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2256                 } else {
2257                         pci_disable_sriov(pdev);
2258                         msleep(500);
2259                 }
2260
2261                 kfree(adapter->vf_data);
2262                 adapter->vf_data = NULL;
2263                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2264                 wrfl();
2265                 msleep(100);
2266                 dev_info(&pdev->dev, "IOV Disabled\n");
2267         }
2268 #endif
2269
2270         iounmap(hw->hw_addr);
2271         if (hw->flash_address)
2272                 iounmap(hw->flash_address);
2273         pci_release_selected_regions(pdev,
2274                                      pci_select_bars(pdev, IORESOURCE_MEM));
2275
2276         kfree(adapter->shadow_vfta);
2277         free_netdev(netdev);
2278
2279         pci_disable_pcie_error_reporting(pdev);
2280
2281         pci_disable_device(pdev);
2282 }
2283
2284 /**
2285  * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2286  * @adapter: board private structure to initialize
2287  *
2288  * This function initializes the vf specific data storage and then attempts to
2289  * allocate the VFs.  The reason for ordering it this way is because it is much
2290  * mor expensive time wise to disable SR-IOV than it is to allocate and free
2291  * the memory for the VFs.
2292  **/
2293 static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
2294 {
2295 #ifdef CONFIG_PCI_IOV
2296         struct pci_dev *pdev = adapter->pdev;
2297         struct e1000_hw *hw = &adapter->hw;
2298         int old_vfs = pci_num_vf(adapter->pdev);
2299         int i;
2300
2301         /* Virtualization features not supported on i210 family. */
2302         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2303                 return;
2304
2305         if (old_vfs) {
2306                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override "
2307                          "max_vfs setting of %d\n", old_vfs, max_vfs);
2308                 adapter->vfs_allocated_count = old_vfs;
2309         }
2310
2311         if (!adapter->vfs_allocated_count)
2312                 return;
2313
2314         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2315                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2316
2317         /* if allocation failed then we do not support SR-IOV */
2318         if (!adapter->vf_data) {
2319                 adapter->vfs_allocated_count = 0;
2320                 dev_err(&pdev->dev, "Unable to allocate memory for VF "
2321                         "Data Storage\n");
2322                 goto out;
2323         }
2324
2325         if (!old_vfs) {
2326                 if (pci_enable_sriov(pdev, adapter->vfs_allocated_count))
2327                         goto err_out;
2328         }
2329         dev_info(&pdev->dev, "%d VFs allocated\n",
2330                  adapter->vfs_allocated_count);
2331         for (i = 0; i < adapter->vfs_allocated_count; i++)
2332                 igb_vf_configure(adapter, i);
2333
2334         /* DMA Coalescing is not supported in IOV mode. */
2335         adapter->flags &= ~IGB_FLAG_DMAC;
2336         goto out;
2337 err_out:
2338         kfree(adapter->vf_data);
2339         adapter->vf_data = NULL;
2340         adapter->vfs_allocated_count = 0;
2341 out:
2342         return;
2343 #endif /* CONFIG_PCI_IOV */
2344 }
2345
2346 /**
2347  * igb_sw_init - Initialize general software structures (struct igb_adapter)
2348  * @adapter: board private structure to initialize
2349  *
2350  * igb_sw_init initializes the Adapter private data structure.
2351  * Fields are initialized based on PCI device information and
2352  * OS network device settings (MTU size).
2353  **/
2354 static int __devinit igb_sw_init(struct igb_adapter *adapter)
2355 {
2356         struct e1000_hw *hw = &adapter->hw;
2357         struct net_device *netdev = adapter->netdev;
2358         struct pci_dev *pdev = adapter->pdev;
2359         u32 max_rss_queues;
2360
2361         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2362
2363         /* set default ring sizes */
2364         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2365         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2366
2367         /* set default ITR values */
2368         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2369         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2370
2371         /* set default work limits */
2372         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2373
2374         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2375                                   VLAN_HLEN;
2376         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2377
2378         spin_lock_init(&adapter->stats64_lock);
2379 #ifdef CONFIG_PCI_IOV
2380         switch (hw->mac.type) {
2381         case e1000_82576:
2382         case e1000_i350:
2383                 if (max_vfs > 7) {
2384                         dev_warn(&pdev->dev,
2385                                  "Maximum of 7 VFs per PF, using max\n");
2386                         adapter->vfs_allocated_count = 7;
2387                 } else
2388                         adapter->vfs_allocated_count = max_vfs;
2389                 break;
2390         default:
2391                 break;
2392         }
2393 #endif /* CONFIG_PCI_IOV */
2394
2395         /* Determine the maximum number of RSS queues supported. */
2396         switch (hw->mac.type) {
2397         case e1000_i211:
2398                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2399                 break;
2400         case e1000_82575:
2401         case e1000_i210:
2402                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2403                 break;
2404         case e1000_i350:
2405                 /* I350 cannot do RSS and SR-IOV at the same time */
2406                 if (!!adapter->vfs_allocated_count) {
2407                         max_rss_queues = 1;
2408                         break;
2409                 }
2410                 /* fall through */
2411         case e1000_82576:
2412                 if (!!adapter->vfs_allocated_count) {
2413                         max_rss_queues = 2;
2414                         break;
2415                 }
2416                 /* fall through */
2417         case e1000_82580:
2418         default:
2419                 max_rss_queues = IGB_MAX_RX_QUEUES;
2420                 break;
2421         }
2422
2423         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2424
2425         /* Determine if we need to pair queues. */
2426         switch (hw->mac.type) {
2427         case e1000_82575:
2428         case e1000_i211:
2429                 /* Device supports enough interrupts without queue pairing. */
2430                 break;
2431         case e1000_82576:
2432                 /*
2433                  * If VFs are going to be allocated with RSS queues then we
2434                  * should pair the queues in order to conserve interrupts due
2435                  * to limited supply.
2436                  */
2437                 if ((adapter->rss_queues > 1) &&
2438                     (adapter->vfs_allocated_count > 6))
2439                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2440                 /* fall through */
2441         case e1000_82580:
2442         case e1000_i350:
2443         case e1000_i210:
2444         default:
2445                 /*
2446                  * If rss_queues > half of max_rss_queues, pair the queues in
2447                  * order to conserve interrupts due to limited supply.
2448                  */
2449                 if (adapter->rss_queues > (max_rss_queues / 2))
2450                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2451                 break;
2452         }
2453
2454         /* Setup and initialize a copy of the hw vlan table array */
2455         adapter->shadow_vfta = kzalloc(sizeof(u32) *
2456                                 E1000_VLAN_FILTER_TBL_SIZE,
2457                                 GFP_ATOMIC);
2458
2459         /* This call may decrease the number of queues */
2460         if (igb_init_interrupt_scheme(adapter)) {
2461                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2462                 return -ENOMEM;
2463         }
2464
2465         igb_probe_vfs(adapter);
2466
2467         /* Explicitly disable IRQ since the NIC can be in any state. */
2468         igb_irq_disable(adapter);
2469
2470         if (hw->mac.type >= e1000_i350)
2471                 adapter->flags &= ~IGB_FLAG_DMAC;
2472
2473         set_bit(__IGB_DOWN, &adapter->state);
2474         return 0;
2475 }
2476
2477 /**
2478  * igb_open - Called when a network interface is made active
2479  * @netdev: network interface device structure
2480  *
2481  * Returns 0 on success, negative value on failure
2482  *
2483  * The open entry point is called when a network interface is made
2484  * active by the system (IFF_UP).  At this point all resources needed
2485  * for transmit and receive operations are allocated, the interrupt
2486  * handler is registered with the OS, the watchdog timer is started,
2487  * and the stack is notified that the interface is ready.
2488  **/
2489 static int __igb_open(struct net_device *netdev, bool resuming)
2490 {
2491         struct igb_adapter *adapter = netdev_priv(netdev);
2492         struct e1000_hw *hw = &adapter->hw;
2493         struct pci_dev *pdev = adapter->pdev;
2494         int err;
2495         int i;
2496
2497         /* disallow open during test */
2498         if (test_bit(__IGB_TESTING, &adapter->state)) {
2499                 WARN_ON(resuming);
2500                 return -EBUSY;
2501         }
2502
2503         if (!resuming)
2504                 pm_runtime_get_sync(&pdev->dev);
2505
2506         netif_carrier_off(netdev);
2507
2508         /* allocate transmit descriptors */
2509         err = igb_setup_all_tx_resources(adapter);
2510         if (err)
2511                 goto err_setup_tx;
2512
2513         /* allocate receive descriptors */
2514         err = igb_setup_all_rx_resources(adapter);
2515         if (err)
2516                 goto err_setup_rx;
2517
2518         igb_power_up_link(adapter);
2519
2520         /* before we allocate an interrupt, we must be ready to handle it.
2521          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2522          * as soon as we call pci_request_irq, so we have to setup our
2523          * clean_rx handler before we do so.  */
2524         igb_configure(adapter);
2525
2526         err = igb_request_irq(adapter);
2527         if (err)
2528                 goto err_req_irq;
2529
2530         /* From here on the code is the same as igb_up() */
2531         clear_bit(__IGB_DOWN, &adapter->state);
2532
2533         for (i = 0; i < adapter->num_q_vectors; i++)
2534                 napi_enable(&(adapter->q_vector[i]->napi));
2535
2536         /* Clear any pending interrupts. */
2537         rd32(E1000_ICR);
2538
2539         igb_irq_enable(adapter);
2540
2541         /* notify VFs that reset has been completed */
2542         if (adapter->vfs_allocated_count) {
2543                 u32 reg_data = rd32(E1000_CTRL_EXT);
2544                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2545                 wr32(E1000_CTRL_EXT, reg_data);
2546         }
2547
2548         netif_tx_start_all_queues(netdev);
2549
2550         if (!resuming)
2551                 pm_runtime_put(&pdev->dev);
2552
2553         /* start the watchdog. */
2554         hw->mac.get_link_status = 1;
2555         schedule_work(&adapter->watchdog_task);
2556
2557         return 0;
2558
2559 err_req_irq:
2560         igb_release_hw_control(adapter);
2561         igb_power_down_link(adapter);
2562         igb_free_all_rx_resources(adapter);
2563 err_setup_rx:
2564         igb_free_all_tx_resources(adapter);
2565 err_setup_tx:
2566         igb_reset(adapter);
2567         if (!resuming)
2568                 pm_runtime_put(&pdev->dev);
2569
2570         return err;
2571 }
2572
2573 static int igb_open(struct net_device *netdev)
2574 {
2575         return __igb_open(netdev, false);
2576 }
2577
2578 /**
2579  * igb_close - Disables a network interface
2580  * @netdev: network interface device structure
2581  *
2582  * Returns 0, this is not allowed to fail
2583  *
2584  * The close entry point is called when an interface is de-activated
2585  * by the OS.  The hardware is still under the driver's control, but
2586  * needs to be disabled.  A global MAC reset is issued to stop the
2587  * hardware, and all transmit and receive resources are freed.
2588  **/
2589 static int __igb_close(struct net_device *netdev, bool suspending)
2590 {
2591         struct igb_adapter *adapter = netdev_priv(netdev);
2592         struct pci_dev *pdev = adapter->pdev;
2593
2594         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2595
2596         if (!suspending)
2597                 pm_runtime_get_sync(&pdev->dev);
2598
2599         igb_down(adapter);
2600         igb_free_irq(adapter);
2601
2602         igb_free_all_tx_resources(adapter);
2603         igb_free_all_rx_resources(adapter);
2604
2605         if (!suspending)
2606                 pm_runtime_put_sync(&pdev->dev);
2607         return 0;
2608 }
2609
2610 static int igb_close(struct net_device *netdev)
2611 {
2612         return __igb_close(netdev, false);
2613 }
2614
2615 /**
2616  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2617  * @tx_ring: tx descriptor ring (for a specific queue) to setup
2618  *
2619  * Return 0 on success, negative on failure
2620  **/
2621 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2622 {
2623         struct device *dev = tx_ring->dev;
2624         int size;
2625
2626         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2627
2628         tx_ring->tx_buffer_info = vzalloc(size);
2629         if (!tx_ring->tx_buffer_info)
2630                 goto err;
2631
2632         /* round up to nearest 4K */
2633         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2634         tx_ring->size = ALIGN(tx_ring->size, 4096);
2635
2636         tx_ring->desc = dma_alloc_coherent(dev,
2637                                            tx_ring->size,
2638                                            &tx_ring->dma,
2639                                            GFP_KERNEL);
2640         if (!tx_ring->desc)
2641                 goto err;
2642
2643         tx_ring->next_to_use = 0;
2644         tx_ring->next_to_clean = 0;
2645
2646         return 0;
2647
2648 err:
2649         vfree(tx_ring->tx_buffer_info);
2650         tx_ring->tx_buffer_info = NULL;
2651         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2652         return -ENOMEM;
2653 }
2654
2655 /**
2656  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2657  *                                (Descriptors) for all queues
2658  * @adapter: board private structure
2659  *
2660  * Return 0 on success, negative on failure
2661  **/
2662 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2663 {
2664         struct pci_dev *pdev = adapter->pdev;
2665         int i, err = 0;
2666
2667         for (i = 0; i < adapter->num_tx_queues; i++) {
2668                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2669                 if (err) {
2670                         dev_err(&pdev->dev,
2671                                 "Allocation for Tx Queue %u failed\n", i);
2672                         for (i--; i >= 0; i--)
2673                                 igb_free_tx_resources(adapter->tx_ring[i]);
2674                         break;
2675                 }
2676         }
2677
2678         return err;
2679 }
2680
2681 /**
2682  * igb_setup_tctl - configure the transmit control registers
2683  * @adapter: Board private structure
2684  **/
2685 void igb_setup_tctl(struct igb_adapter *adapter)
2686 {
2687         struct e1000_hw *hw = &adapter->hw;
2688         u32 tctl;
2689
2690         /* disable queue 0 which is enabled by default on 82575 and 82576 */
2691         wr32(E1000_TXDCTL(0), 0);
2692
2693         /* Program the Transmit Control Register */
2694         tctl = rd32(E1000_TCTL);
2695         tctl &= ~E1000_TCTL_CT;
2696         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2697                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2698
2699         igb_config_collision_dist(hw);
2700
2701         /* Enable transmits */
2702         tctl |= E1000_TCTL_EN;
2703
2704         wr32(E1000_TCTL, tctl);
2705 }
2706
2707 /**
2708  * igb_configure_tx_ring - Configure transmit ring after Reset
2709  * @adapter: board private structure
2710  * @ring: tx ring to configure
2711  *
2712  * Configure a transmit ring after a reset.
2713  **/
2714 void igb_configure_tx_ring(struct igb_adapter *adapter,
2715                            struct igb_ring *ring)
2716 {
2717         struct e1000_hw *hw = &adapter->hw;
2718         u32 txdctl = 0;
2719         u64 tdba = ring->dma;
2720         int reg_idx = ring->reg_idx;
2721
2722         /* disable the queue */
2723         wr32(E1000_TXDCTL(reg_idx), 0);
2724         wrfl();
2725         mdelay(10);
2726
2727         wr32(E1000_TDLEN(reg_idx),
2728                         ring->count * sizeof(union e1000_adv_tx_desc));
2729         wr32(E1000_TDBAL(reg_idx),
2730                         tdba & 0x00000000ffffffffULL);
2731         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2732
2733         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
2734         wr32(E1000_TDH(reg_idx), 0);
2735         writel(0, ring->tail);
2736
2737         txdctl |= IGB_TX_PTHRESH;
2738         txdctl |= IGB_TX_HTHRESH << 8;
2739         txdctl |= IGB_TX_WTHRESH << 16;
2740
2741         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
2742         wr32(E1000_TXDCTL(reg_idx), txdctl);
2743 }
2744
2745 /**
2746  * igb_configure_tx - Configure transmit Unit after Reset
2747  * @adapter: board private structure
2748  *
2749  * Configure the Tx unit of the MAC after a reset.
2750  **/
2751 static void igb_configure_tx(struct igb_adapter *adapter)
2752 {
2753         int i;
2754
2755         for (i = 0; i < adapter->num_tx_queues; i++)
2756                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
2757 }
2758
2759 /**
2760  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
2761  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2762  *
2763  * Returns 0 on success, negative on failure
2764  **/
2765 int igb_setup_rx_resources(struct igb_ring *rx_ring)
2766 {
2767         struct device *dev = rx_ring->dev;
2768         int size;
2769
2770         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
2771
2772         rx_ring->rx_buffer_info = vzalloc(size);
2773         if (!rx_ring->rx_buffer_info)
2774                 goto err;
2775
2776
2777         /* Round up to nearest 4K */
2778         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
2779         rx_ring->size = ALIGN(rx_ring->size, 4096);
2780
2781         rx_ring->desc = dma_alloc_coherent(dev,
2782                                            rx_ring->size,
2783                                            &rx_ring->dma,
2784                                            GFP_KERNEL);
2785         if (!rx_ring->desc)
2786                 goto err;
2787
2788         rx_ring->next_to_alloc = 0;
2789         rx_ring->next_to_clean = 0;
2790         rx_ring->next_to_use = 0;
2791
2792         return 0;
2793
2794 err:
2795         vfree(rx_ring->rx_buffer_info);
2796         rx_ring->rx_buffer_info = NULL;
2797         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
2798         return -ENOMEM;
2799 }
2800
2801 /**
2802  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
2803  *                                (Descriptors) for all queues
2804  * @adapter: board private structure
2805  *
2806  * Return 0 on success, negative on failure
2807  **/
2808 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
2809 {
2810         struct pci_dev *pdev = adapter->pdev;
2811         int i, err = 0;
2812
2813         for (i = 0; i < adapter->num_rx_queues; i++) {
2814                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
2815                 if (err) {
2816                         dev_err(&pdev->dev,
2817                                 "Allocation for Rx Queue %u failed\n", i);
2818                         for (i--; i >= 0; i--)
2819                                 igb_free_rx_resources(adapter->rx_ring[i]);
2820                         break;
2821                 }
2822         }
2823
2824         return err;
2825 }
2826
2827 /**
2828  * igb_setup_mrqc - configure the multiple receive queue control registers
2829  * @adapter: Board private structure
2830  **/
2831 static void igb_setup_mrqc(struct igb_adapter *adapter)
2832 {
2833         struct e1000_hw *hw = &adapter->hw;
2834         u32 mrqc, rxcsum;
2835         u32 j, num_rx_queues, shift = 0;
2836         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
2837                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
2838                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
2839                                         0xFA01ACBE };
2840
2841         /* Fill out hash function seeds */
2842         for (j = 0; j < 10; j++)
2843                 wr32(E1000_RSSRK(j), rsskey[j]);
2844
2845         num_rx_queues = adapter->rss_queues;
2846
2847         switch (hw->mac.type) {
2848         case e1000_82575:
2849                 shift = 6;
2850                 break;
2851         case e1000_82576:
2852                 /* 82576 supports 2 RSS queues for SR-IOV */
2853                 if (adapter->vfs_allocated_count) {
2854                         shift = 3;
2855                         num_rx_queues = 2;
2856                 }
2857                 break;
2858         default:
2859                 break;
2860         }
2861
2862         /*
2863          * Populate the indirection table 4 entries at a time.  To do this
2864          * we are generating the results for n and n+2 and then interleaving
2865          * those with the results with n+1 and n+3.
2866          */
2867         for (j = 0; j < 32; j++) {
2868                 /* first pass generates n and n+2 */
2869                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
2870                 u32 reta = (base & 0x07800780) >> (7 - shift);
2871
2872                 /* second pass generates n+1 and n+3 */
2873                 base += 0x00010001 * num_rx_queues;
2874                 reta |= (base & 0x07800780) << (1 + shift);
2875
2876                 wr32(E1000_RETA(j), reta);
2877         }
2878
2879         /*
2880          * Disable raw packet checksumming so that RSS hash is placed in
2881          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
2882          * offloads as they are enabled by default
2883          */
2884         rxcsum = rd32(E1000_RXCSUM);
2885         rxcsum |= E1000_RXCSUM_PCSD;
2886
2887         if (adapter->hw.mac.type >= e1000_82576)
2888                 /* Enable Receive Checksum Offload for SCTP */
2889                 rxcsum |= E1000_RXCSUM_CRCOFL;
2890
2891         /* Don't need to set TUOFL or IPOFL, they default to 1 */
2892         wr32(E1000_RXCSUM, rxcsum);
2893         /*
2894          * Generate RSS hash based on TCP port numbers and/or
2895          * IPv4/v6 src and dst addresses since UDP cannot be
2896          * hashed reliably due to IP fragmentation
2897          */
2898
2899         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
2900                E1000_MRQC_RSS_FIELD_IPV4_TCP |
2901                E1000_MRQC_RSS_FIELD_IPV6 |
2902                E1000_MRQC_RSS_FIELD_IPV6_TCP |
2903                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
2904
2905         /* If VMDq is enabled then we set the appropriate mode for that, else
2906          * we default to RSS so that an RSS hash is calculated per packet even
2907          * if we are only using one queue */
2908         if (adapter->vfs_allocated_count) {
2909                 if (hw->mac.type > e1000_82575) {
2910                         /* Set the default pool for the PF's first queue */
2911                         u32 vtctl = rd32(E1000_VT_CTL);
2912                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
2913                                    E1000_VT_CTL_DISABLE_DEF_POOL);
2914                         vtctl |= adapter->vfs_allocated_count <<
2915                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
2916                         wr32(E1000_VT_CTL, vtctl);
2917                 }
2918                 if (adapter->rss_queues > 1)
2919                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
2920                 else
2921                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
2922         } else {
2923                 if (hw->mac.type != e1000_i211)
2924                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
2925         }
2926         igb_vmm_control(adapter);
2927
2928         wr32(E1000_MRQC, mrqc);
2929 }
2930
2931 /**
2932  * igb_setup_rctl - configure the receive control registers
2933  * @adapter: Board private structure
2934  **/
2935 void igb_setup_rctl(struct igb_adapter *adapter)
2936 {
2937         struct e1000_hw *hw = &adapter->hw;
2938         u32 rctl;
2939
2940         rctl = rd32(E1000_RCTL);
2941
2942         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2943         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
2944
2945         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
2946                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2947
2948         /*
2949          * enable stripping of CRC. It's unlikely this will break BMC
2950          * redirection as it did with e1000. Newer features require
2951          * that the HW strips the CRC.
2952          */
2953         rctl |= E1000_RCTL_SECRC;
2954
2955         /* disable store bad packets and clear size bits. */
2956         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
2957
2958         /* enable LPE to prevent packets larger than max_frame_size */
2959         rctl |= E1000_RCTL_LPE;
2960
2961         /* disable queue 0 to prevent tail write w/o re-config */
2962         wr32(E1000_RXDCTL(0), 0);
2963
2964         /* Attention!!!  For SR-IOV PF driver operations you must enable
2965          * queue drop for all VF and PF queues to prevent head of line blocking
2966          * if an un-trusted VF does not provide descriptors to hardware.
2967          */
2968         if (adapter->vfs_allocated_count) {
2969                 /* set all queue drop enable bits */
2970                 wr32(E1000_QDE, ALL_QUEUES);
2971         }
2972
2973         /* This is useful for sniffing bad packets. */
2974         if (adapter->netdev->features & NETIF_F_RXALL) {
2975                 /* UPE and MPE will be handled by normal PROMISC logic
2976                  * in e1000e_set_rx_mode */
2977                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
2978                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
2979                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
2980
2981                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
2982                           E1000_RCTL_DPF | /* Allow filtered pause */
2983                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
2984                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
2985                  * and that breaks VLANs.
2986                  */
2987         }
2988
2989         wr32(E1000_RCTL, rctl);
2990 }
2991
2992 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
2993                                    int vfn)
2994 {
2995         struct e1000_hw *hw = &adapter->hw;
2996         u32 vmolr;
2997
2998         /* if it isn't the PF check to see if VFs are enabled and
2999          * increase the size to support vlan tags */
3000         if (vfn < adapter->vfs_allocated_count &&
3001             adapter->vf_data[vfn].vlans_enabled)
3002                 size += VLAN_TAG_SIZE;
3003
3004         vmolr = rd32(E1000_VMOLR(vfn));
3005         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3006         vmolr |= size | E1000_VMOLR_LPE;
3007         wr32(E1000_VMOLR(vfn), vmolr);
3008
3009         return 0;
3010 }
3011
3012 /**
3013  * igb_rlpml_set - set maximum receive packet size
3014  * @adapter: board private structure
3015  *
3016  * Configure maximum receivable packet size.
3017  **/
3018 static void igb_rlpml_set(struct igb_adapter *adapter)
3019 {
3020         u32 max_frame_size = adapter->max_frame_size;
3021         struct e1000_hw *hw = &adapter->hw;
3022         u16 pf_id = adapter->vfs_allocated_count;
3023
3024         if (pf_id) {
3025                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3026                 /*
3027                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3028                  * to our max jumbo frame size, in case we need to enable
3029                  * jumbo frames on one of the rings later.
3030                  * This will not pass over-length frames into the default
3031                  * queue because it's gated by the VMOLR.RLPML.
3032                  */
3033                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3034         }
3035
3036         wr32(E1000_RLPML, max_frame_size);
3037 }
3038
3039 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3040                                  int vfn, bool aupe)
3041 {
3042         struct e1000_hw *hw = &adapter->hw;
3043         u32 vmolr;
3044
3045         /*
3046          * This register exists only on 82576 and newer so if we are older then
3047          * we should exit and do nothing
3048          */
3049         if (hw->mac.type < e1000_82576)
3050                 return;
3051
3052         vmolr = rd32(E1000_VMOLR(vfn));
3053         vmolr |= E1000_VMOLR_STRVLAN;      /* Strip vlan tags */
3054         if (aupe)
3055                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3056         else
3057                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3058
3059         /* clear all bits that might not be set */
3060         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3061
3062         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3063                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3064         /*
3065          * for VMDq only allow the VFs and pool 0 to accept broadcast and
3066          * multicast packets
3067          */
3068         if (vfn <= adapter->vfs_allocated_count)
3069                 vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3070
3071         wr32(E1000_VMOLR(vfn), vmolr);
3072 }
3073
3074 /**
3075  * igb_configure_rx_ring - Configure a receive ring after Reset
3076  * @adapter: board private structure
3077  * @ring: receive ring to be configured
3078  *
3079  * Configure the Rx unit of the MAC after a reset.
3080  **/
3081 void igb_configure_rx_ring(struct igb_adapter *adapter,
3082                            struct igb_ring *ring)
3083 {
3084         struct e1000_hw *hw = &adapter->hw;
3085         u64 rdba = ring->dma;
3086         int reg_idx = ring->reg_idx;
3087         u32 srrctl = 0, rxdctl = 0;
3088
3089         /* disable the queue */
3090         wr32(E1000_RXDCTL(reg_idx), 0);
3091
3092         /* Set DMA base address registers */
3093         wr32(E1000_RDBAL(reg_idx),
3094              rdba & 0x00000000ffffffffULL);
3095         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3096         wr32(E1000_RDLEN(reg_idx),
3097                        ring->count * sizeof(union e1000_adv_rx_desc));
3098
3099         /* initialize head and tail */
3100         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3101         wr32(E1000_RDH(reg_idx), 0);
3102         writel(0, ring->tail);
3103
3104         /* set descriptor configuration */
3105         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3106         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3107         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3108 #ifdef CONFIG_IGB_PTP
3109         if (hw->mac.type >= e1000_82580)
3110                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3111 #endif /* CONFIG_IGB_PTP */
3112         /* Only set Drop Enable if we are supporting multiple queues */
3113         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3114                 srrctl |= E1000_SRRCTL_DROP_EN;
3115
3116         wr32(E1000_SRRCTL(reg_idx), srrctl);
3117
3118         /* set filtering for VMDQ pools */
3119         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3120
3121         rxdctl |= IGB_RX_PTHRESH;
3122         rxdctl |= IGB_RX_HTHRESH << 8;
3123         rxdctl |= IGB_RX_WTHRESH << 16;
3124
3125         /* enable receive descriptor fetching */
3126         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3127         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3128 }
3129
3130 /**
3131  * igb_configure_rx - Configure receive Unit after Reset
3132  * @adapter: board private structure
3133  *
3134  * Configure the Rx unit of the MAC after a reset.
3135  **/
3136 static void igb_configure_rx(struct igb_adapter *adapter)
3137 {
3138         int i;
3139
3140         /* set UTA to appropriate mode */
3141         igb_set_uta(adapter);
3142
3143         /* set the correct pool for the PF default MAC address in entry 0 */
3144         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3145                          adapter->vfs_allocated_count);
3146
3147         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3148          * the Base and Length of the Rx Descriptor Ring */
3149         for (i = 0; i < adapter->num_rx_queues; i++)
3150                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3151 }
3152
3153 /**
3154  * igb_free_tx_resources - Free Tx Resources per Queue
3155  * @tx_ring: Tx descriptor ring for a specific queue
3156  *
3157  * Free all transmit software resources
3158  **/
3159 void igb_free_tx_resources(struct igb_ring *tx_ring)
3160 {
3161         igb_clean_tx_ring(tx_ring);
3162
3163         vfree(tx_ring->tx_buffer_info);
3164         tx_ring->tx_buffer_info = NULL;
3165
3166         /* if not set, then don't free */
3167         if (!tx_ring->desc)
3168                 return;
3169
3170         dma_free_coherent(tx_ring->dev, tx_ring->size,
3171                           tx_ring->desc, tx_ring->dma);
3172
3173         tx_ring->desc = NULL;
3174 }
3175
3176 /**
3177  * igb_free_all_tx_resources - Free Tx Resources for All Queues
3178  * @adapter: board private structure
3179  *
3180  * Free all transmit software resources
3181  **/
3182 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3183 {
3184         int i;
3185
3186         for (i = 0; i < adapter->num_tx_queues; i++)
3187                 igb_free_tx_resources(adapter->tx_ring[i]);
3188 }
3189
3190 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3191                                     struct igb_tx_buffer *tx_buffer)
3192 {
3193         if (tx_buffer->skb) {
3194                 dev_kfree_skb_any(tx_buffer->skb);
3195                 if (dma_unmap_len(tx_buffer, len))
3196                         dma_unmap_single(ring->dev,
3197                                          dma_unmap_addr(tx_buffer, dma),
3198                                          dma_unmap_len(tx_buffer, len),
3199                                          DMA_TO_DEVICE);
3200         } else if (dma_unmap_len(tx_buffer, len)) {
3201                 dma_unmap_page(ring->dev,
3202                                dma_unmap_addr(tx_buffer, dma),
3203                                dma_unmap_len(tx_buffer, len),
3204                                DMA_TO_DEVICE);
3205         }
3206         tx_buffer->next_to_watch = NULL;
3207         tx_buffer->skb = NULL;
3208         dma_unmap_len_set(tx_buffer, len, 0);
3209         /* buffer_info must be completely set up in the transmit path */
3210 }
3211
3212 /**
3213  * igb_clean_tx_ring - Free Tx Buffers
3214  * @tx_ring: ring to be cleaned
3215  **/
3216 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3217 {
3218         struct igb_tx_buffer *buffer_info;
3219         unsigned long size;
3220         u16 i;
3221
3222         if (!tx_ring->tx_buffer_info)
3223                 return;
3224         /* Free all the Tx ring sk_buffs */
3225
3226         for (i = 0; i < tx_ring->count; i++) {
3227                 buffer_info = &tx_ring->tx_buffer_info[i];
3228                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3229         }
3230
3231         netdev_tx_reset_queue(txring_txq(tx_ring));
3232
3233         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3234         memset(tx_ring->tx_buffer_info, 0, size);
3235
3236         /* Zero out the descriptor ring */
3237         memset(tx_ring->desc, 0, tx_ring->size);
3238
3239         tx_ring->next_to_use = 0;
3240         tx_ring->next_to_clean = 0;
3241 }
3242
3243 /**
3244  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3245  * @adapter: board private structure
3246  **/
3247 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3248 {
3249         int i;
3250
3251         for (i = 0; i < adapter->num_tx_queues; i++)
3252                 igb_clean_tx_ring(adapter->tx_ring[i]);
3253 }
3254
3255 /**
3256  * igb_free_rx_resources - Free Rx Resources
3257  * @rx_ring: ring to clean the resources from
3258  *
3259  * Free all receive software resources
3260  **/
3261 void igb_free_rx_resources(struct igb_ring *rx_ring)
3262 {
3263         igb_clean_rx_ring(rx_ring);
3264
3265         vfree(rx_ring->rx_buffer_info);
3266         rx_ring->rx_buffer_info = NULL;
3267
3268         /* if not set, then don't free */
3269         if (!rx_ring->desc)
3270                 return;
3271
3272         dma_free_coherent(rx_ring->dev, rx_ring->size,
3273                           rx_ring->desc, rx_ring->dma);
3274
3275         rx_ring->desc = NULL;
3276 }
3277
3278 /**
3279  * igb_free_all_rx_resources - Free Rx Resources for All Queues
3280  * @adapter: board private structure
3281  *
3282  * Free all receive software resources
3283  **/
3284 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3285 {
3286         int i;
3287
3288         for (i = 0; i < adapter->num_rx_queues; i++)
3289                 igb_free_rx_resources(adapter->rx_ring[i]);
3290 }
3291
3292 /**
3293  * igb_clean_rx_ring - Free Rx Buffers per Queue
3294  * @rx_ring: ring to free buffers from
3295  **/
3296 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3297 {
3298         unsigned long size;
3299         u16 i;
3300
3301         if (rx_ring->skb)
3302                 dev_kfree_skb(rx_ring->skb);
3303         rx_ring->skb = NULL;
3304
3305         if (!rx_ring->rx_buffer_info)
3306                 return;
3307
3308         /* Free all the Rx ring sk_buffs */
3309         for (i = 0; i < rx_ring->count; i++) {
3310                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3311
3312                 if (!buffer_info->page)
3313                         continue;
3314
3315                 dma_unmap_page(rx_ring->dev,
3316                                buffer_info->dma,
3317                                PAGE_SIZE,
3318                                DMA_FROM_DEVICE);
3319                 __free_page(buffer_info->page);
3320
3321                 buffer_info->page = NULL;
3322         }
3323
3324         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3325         memset(rx_ring->rx_buffer_info, 0, size);
3326
3327         /* Zero out the descriptor ring */
3328         memset(rx_ring->desc, 0, rx_ring->size);
3329
3330         rx_ring->next_to_alloc = 0;
3331         rx_ring->next_to_clean = 0;
3332         rx_ring->next_to_use = 0;
3333 }
3334
3335 /**
3336  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3337  * @adapter: board private structure
3338  **/
3339 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3340 {
3341         int i;
3342
3343         for (i = 0; i < adapter->num_rx_queues; i++)
3344                 igb_clean_rx_ring(adapter->rx_ring[i]);
3345 }
3346
3347 /**
3348  * igb_set_mac - Change the Ethernet Address of the NIC
3349  * @netdev: network interface device structure
3350  * @p: pointer to an address structure
3351  *
3352  * Returns 0 on success, negative on failure
3353  **/
3354 static int igb_set_mac(struct net_device *netdev, void *p)
3355 {
3356         struct igb_adapter *adapter = netdev_priv(netdev);
3357         struct e1000_hw *hw = &adapter->hw;
3358         struct sockaddr *addr = p;
3359
3360         if (!is_valid_ether_addr(addr->sa_data))
3361                 return -EADDRNOTAVAIL;
3362
3363         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3364         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3365
3366         /* set the correct pool for the new PF MAC address in entry 0 */
3367         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3368                          adapter->vfs_allocated_count);
3369
3370         return 0;
3371 }
3372
3373 /**
3374  * igb_write_mc_addr_list - write multicast addresses to MTA
3375  * @netdev: network interface device structure
3376  *
3377  * Writes multicast address list to the MTA hash table.
3378  * Returns: -ENOMEM on failure
3379  *                0 on no addresses written
3380  *                X on writing X addresses to MTA
3381  **/
3382 static int igb_write_mc_addr_list(struct net_device *netdev)
3383 {
3384         struct igb_adapter *adapter = netdev_priv(netdev);
3385         struct e1000_hw *hw = &adapter->hw;
3386         struct netdev_hw_addr *ha;
3387         u8  *mta_list;
3388         int i;
3389
3390         if (netdev_mc_empty(netdev)) {
3391                 /* nothing to program, so clear mc list */
3392                 igb_update_mc_addr_list(hw, NULL, 0);
3393                 igb_restore_vf_multicasts(adapter);
3394                 return 0;
3395         }
3396
3397         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3398         if (!mta_list)
3399                 return -ENOMEM;
3400
3401         /* The shared function expects a packed array of only addresses. */
3402         i = 0;
3403         netdev_for_each_mc_addr(ha, netdev)
3404                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3405
3406         igb_update_mc_addr_list(hw, mta_list, i);
3407         kfree(mta_list);
3408
3409         return netdev_mc_count(netdev);
3410 }
3411
3412 /**
3413  * igb_write_uc_addr_list - write unicast addresses to RAR table
3414  * @netdev: network interface device structure
3415  *
3416  * Writes unicast address list to the RAR table.
3417  * Returns: -ENOMEM on failure/insufficient address space
3418  *                0 on no addresses written
3419  *                X on writing X addresses to the RAR table
3420  **/
3421 static int igb_write_uc_addr_list(struct net_device *netdev)
3422 {
3423         struct igb_adapter *adapter = netdev_priv(netdev);
3424         struct e1000_hw *hw = &adapter->hw;
3425         unsigned int vfn = adapter->vfs_allocated_count;
3426         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3427         int count = 0;
3428
3429         /* return ENOMEM indicating insufficient memory for addresses */
3430         if (netdev_uc_count(netdev) > rar_entries)
3431                 return -ENOMEM;
3432
3433         if (!netdev_uc_empty(netdev) && rar_entries) {
3434                 struct netdev_hw_addr *ha;
3435
3436                 netdev_for_each_uc_addr(ha, netdev) {
3437                         if (!rar_entries)
3438                                 break;
3439                         igb_rar_set_qsel(adapter, ha->addr,
3440                                          rar_entries--,
3441                                          vfn);
3442                         count++;
3443                 }
3444         }
3445         /* write the addresses in reverse order to avoid write combining */
3446         for (; rar_entries > 0 ; rar_entries--) {
3447                 wr32(E1000_RAH(rar_entries), 0);
3448                 wr32(E1000_RAL(rar_entries), 0);
3449         }
3450         wrfl();
3451
3452         return count;
3453 }
3454
3455 /**
3456  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3457  * @netdev: network interface device structure
3458  *
3459  * The set_rx_mode entry point is called whenever the unicast or multicast
3460  * address lists or the network interface flags are updated.  This routine is
3461  * responsible for configuring the hardware for proper unicast, multicast,
3462  * promiscuous mode, and all-multi behavior.
3463  **/
3464 static void igb_set_rx_mode(struct net_device *netdev)
3465 {
3466         struct igb_adapter *adapter = netdev_priv(netdev);
3467         struct e1000_hw *hw = &adapter->hw;
3468         unsigned int vfn = adapter->vfs_allocated_count;
3469         u32 rctl, vmolr = 0;
3470         int count;
3471
3472         /* Check for Promiscuous and All Multicast modes */
3473         rctl = rd32(E1000_RCTL);
3474
3475         /* clear the effected bits */
3476         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3477
3478         if (netdev->flags & IFF_PROMISC) {
3479                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3480                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3481         } else {
3482                 if (netdev->flags & IFF_ALLMULTI) {
3483                         rctl |= E1000_RCTL_MPE;
3484                         vmolr |= E1000_VMOLR_MPME;
3485                 } else {
3486                         /*
3487                          * Write addresses to the MTA, if the attempt fails
3488                          * then we should just turn on promiscuous mode so
3489                          * that we can at least receive multicast traffic
3490                          */
3491                         count = igb_write_mc_addr_list(netdev);
3492                         if (count < 0) {
3493                                 rctl |= E1000_RCTL_MPE;
3494                                 vmolr |= E1000_VMOLR_MPME;
3495                         } else if (count) {
3496                                 vmolr |= E1000_VMOLR_ROMPE;
3497                         }
3498                 }
3499                 /*
3500                  * Write addresses to available RAR registers, if there is not
3501                  * sufficient space to store all the addresses then enable
3502                  * unicast promiscuous mode
3503                  */
3504                 count = igb_write_uc_addr_list(netdev);
3505                 if (count < 0) {
3506                         rctl |= E1000_RCTL_UPE;
3507                         vmolr |= E1000_VMOLR_ROPE;
3508                 }
3509                 rctl |= E1000_RCTL_VFE;
3510         }
3511         wr32(E1000_RCTL, rctl);
3512
3513         /*
3514          * In order to support SR-IOV and eventually VMDq it is necessary to set
3515          * the VMOLR to enable the appropriate modes.  Without this workaround
3516          * we will have issues with VLAN tag stripping not being done for frames
3517          * that are only arriving because we are the default pool
3518          */
3519         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3520                 return;
3521
3522         vmolr |= rd32(E1000_VMOLR(vfn)) &
3523                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3524         wr32(E1000_VMOLR(vfn), vmolr);
3525         igb_restore_vf_multicasts(adapter);
3526 }
3527
3528 static void igb_check_wvbr(struct igb_adapter *adapter)
3529 {
3530         struct e1000_hw *hw = &adapter->hw;
3531         u32 wvbr = 0;
3532
3533         switch (hw->mac.type) {
3534         case e1000_82576:
3535         case e1000_i350:
3536                 if (!(wvbr = rd32(E1000_WVBR)))
3537                         return;
3538                 break;
3539         default:
3540                 break;
3541         }
3542
3543         adapter->wvbr |= wvbr;
3544 }
3545
3546 #define IGB_STAGGERED_QUEUE_OFFSET 8
3547
3548 static void igb_spoof_check(struct igb_adapter *adapter)
3549 {
3550         int j;
3551
3552         if (!adapter->wvbr)
3553                 return;
3554
3555         for(j = 0; j < adapter->vfs_allocated_count; j++) {
3556                 if (adapter->wvbr & (1 << j) ||
3557                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3558                         dev_warn(&adapter->pdev->dev,
3559                                 "Spoof event(s) detected on VF %d\n", j);
3560                         adapter->wvbr &=
3561                                 ~((1 << j) |
3562                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3563                 }
3564         }
3565 }
3566
3567 /* Need to wait a few seconds after link up to get diagnostic information from
3568  * the phy */
3569 static void igb_update_phy_info(unsigned long data)
3570 {
3571         struct igb_adapter *adapter = (struct igb_adapter *) data;
3572         igb_get_phy_info(&adapter->hw);
3573 }
3574
3575 /**
3576  * igb_has_link - check shared code for link and determine up/down
3577  * @adapter: pointer to driver private info
3578  **/
3579 bool igb_has_link(struct igb_adapter *adapter)
3580 {
3581         struct e1000_hw *hw = &adapter->hw;
3582         bool link_active = false;
3583         s32 ret_val = 0;
3584
3585         /* get_link_status is set on LSC (link status) interrupt or
3586          * rx sequence error interrupt.  get_link_status will stay
3587          * false until the e1000_check_for_link establishes link
3588          * for copper adapters ONLY
3589          */
3590         switch (hw->phy.media_type) {
3591         case e1000_media_type_copper:
3592                 if (hw->mac.get_link_status) {
3593                         ret_val = hw->mac.ops.check_for_link(hw);
3594                         link_active = !hw->mac.get_link_status;
3595                 } else {
3596                         link_active = true;
3597                 }
3598                 break;
3599         case e1000_media_type_internal_serdes:
3600                 ret_val = hw->mac.ops.check_for_link(hw);
3601                 link_active = hw->mac.serdes_has_link;
3602                 break;
3603         default:
3604         case e1000_media_type_unknown:
3605                 break;
3606         }
3607
3608         return link_active;
3609 }
3610
3611 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3612 {
3613         bool ret = false;
3614         u32 ctrl_ext, thstat;
3615
3616         /* check for thermal sensor event on i350 copper only */
3617         if (hw->mac.type == e1000_i350) {
3618                 thstat = rd32(E1000_THSTAT);
3619                 ctrl_ext = rd32(E1000_CTRL_EXT);
3620
3621                 if ((hw->phy.media_type == e1000_media_type_copper) &&
3622                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3623                         ret = !!(thstat & event);
3624                 }
3625         }
3626
3627         return ret;
3628 }
3629
3630 /**
3631  * igb_watchdog - Timer Call-back
3632  * @data: pointer to adapter cast into an unsigned long
3633  **/
3634 static void igb_watchdog(unsigned long data)
3635 {
3636         struct igb_adapter *adapter = (struct igb_adapter *)data;
3637         /* Do the rest outside of interrupt context */
3638         schedule_work(&adapter->watchdog_task);
3639 }
3640
3641 static void igb_watchdog_task(struct work_struct *work)
3642 {
3643         struct igb_adapter *adapter = container_of(work,
3644                                                    struct igb_adapter,
3645                                                    watchdog_task);
3646         struct e1000_hw *hw = &adapter->hw;
3647         struct net_device *netdev = adapter->netdev;
3648         u32 link;
3649         int i;
3650
3651         link = igb_has_link(adapter);
3652         if (link) {
3653                 /* Cancel scheduled suspend requests. */
3654                 pm_runtime_resume(netdev->dev.parent);
3655
3656                 if (!netif_carrier_ok(netdev)) {
3657                         u32 ctrl;
3658                         hw->mac.ops.get_speed_and_duplex(hw,
3659                                                          &adapter->link_speed,
3660                                                          &adapter->link_duplex);
3661
3662                         ctrl = rd32(E1000_CTRL);
3663                         /* Links status message must follow this format */
3664                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3665                                "Duplex, Flow Control: %s\n",
3666                                netdev->name,
3667                                adapter->link_speed,
3668                                adapter->link_duplex == FULL_DUPLEX ?
3669                                "Full" : "Half",
3670                                (ctrl & E1000_CTRL_TFCE) &&
3671                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3672                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
3673                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
3674
3675                         /* check for thermal sensor event */
3676                         if (igb_thermal_sensor_event(hw,
3677                             E1000_THSTAT_LINK_THROTTLE)) {
3678                                 netdev_info(netdev, "The network adapter link "
3679                                             "speed was downshifted because it "
3680                                             "overheated\n");
3681                         }
3682
3683                         /* adjust timeout factor according to speed/duplex */
3684                         adapter->tx_timeout_factor = 1;
3685                         switch (adapter->link_speed) {
3686                         case SPEED_10:
3687                                 adapter->tx_timeout_factor = 14;
3688                                 break;
3689                         case SPEED_100:
3690                                 /* maybe add some timeout factor ? */
3691                                 break;
3692                         }
3693
3694                         netif_carrier_on(netdev);
3695
3696                         igb_ping_all_vfs(adapter);
3697                         igb_check_vf_rate_limit(adapter);
3698
3699                         /* link state has changed, schedule phy info update */
3700                         if (!test_bit(__IGB_DOWN, &adapter->state))
3701                                 mod_timer(&adapter->phy_info_timer,
3702                                           round_jiffies(jiffies + 2 * HZ));
3703                 }
3704         } else {
3705                 if (netif_carrier_ok(netdev)) {
3706                         adapter->link_speed = 0;
3707                         adapter->link_duplex = 0;
3708
3709                         /* check for thermal sensor event */
3710                         if (igb_thermal_sensor_event(hw,
3711                             E1000_THSTAT_PWR_DOWN)) {
3712                                 netdev_err(netdev, "The network adapter was "
3713                                            "stopped because it overheated\n");
3714                         }
3715
3716                         /* Links status message must follow this format */
3717                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
3718                                netdev->name);
3719                         netif_carrier_off(netdev);
3720
3721                         igb_ping_all_vfs(adapter);
3722
3723                         /* link state has changed, schedule phy info update */
3724                         if (!test_bit(__IGB_DOWN, &adapter->state))
3725                                 mod_timer(&adapter->phy_info_timer,
3726                                           round_jiffies(jiffies + 2 * HZ));
3727
3728                         pm_schedule_suspend(netdev->dev.parent,
3729                                             MSEC_PER_SEC * 5);
3730                 }
3731         }
3732
3733         spin_lock(&adapter->stats64_lock);
3734         igb_update_stats(adapter, &adapter->stats64);
3735         spin_unlock(&adapter->stats64_lock);
3736
3737         for (i = 0; i < adapter->num_tx_queues; i++) {
3738                 struct igb_ring *tx_ring = adapter->tx_ring[i];
3739                 if (!netif_carrier_ok(netdev)) {
3740                         /* We've lost link, so the controller stops DMA,
3741                          * but we've got queued Tx work that's never going
3742                          * to get done, so reset controller to flush Tx.
3743                          * (Do the reset outside of interrupt context). */
3744                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
3745                                 adapter->tx_timeout_count++;
3746                                 schedule_work(&adapter->reset_task);
3747                                 /* return immediately since reset is imminent */
3748                                 return;
3749                         }
3750                 }
3751
3752                 /* Force detection of hung controller every watchdog period */
3753                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
3754         }
3755
3756         /* Cause software interrupt to ensure rx ring is cleaned */
3757         if (adapter->msix_entries) {
3758                 u32 eics = 0;
3759                 for (i = 0; i < adapter->num_q_vectors; i++)
3760                         eics |= adapter->q_vector[i]->eims_value;
3761                 wr32(E1000_EICS, eics);
3762         } else {
3763                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
3764         }
3765
3766         igb_spoof_check(adapter);
3767
3768         /* Reset the timer */
3769         if (!test_bit(__IGB_DOWN, &adapter->state))
3770                 mod_timer(&adapter->watchdog_timer,
3771                           round_jiffies(jiffies + 2 * HZ));
3772 }
3773
3774 enum latency_range {
3775         lowest_latency = 0,
3776         low_latency = 1,
3777         bulk_latency = 2,
3778         latency_invalid = 255
3779 };
3780
3781 /**
3782  * igb_update_ring_itr - update the dynamic ITR value based on packet size
3783  *
3784  *      Stores a new ITR value based on strictly on packet size.  This
3785  *      algorithm is less sophisticated than that used in igb_update_itr,
3786  *      due to the difficulty of synchronizing statistics across multiple
3787  *      receive rings.  The divisors and thresholds used by this function
3788  *      were determined based on theoretical maximum wire speed and testing
3789  *      data, in order to minimize response time while increasing bulk
3790  *      throughput.
3791  *      This functionality is controlled by the InterruptThrottleRate module
3792  *      parameter (see igb_param.c)
3793  *      NOTE:  This function is called only when operating in a multiqueue
3794  *             receive environment.
3795  * @q_vector: pointer to q_vector
3796  **/
3797 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
3798 {
3799         int new_val = q_vector->itr_val;
3800         int avg_wire_size = 0;
3801         struct igb_adapter *adapter = q_vector->adapter;
3802         unsigned int packets;
3803
3804         /* For non-gigabit speeds, just fix the interrupt rate at 4000
3805          * ints/sec - ITR timer value of 120 ticks.
3806          */
3807         if (adapter->link_speed != SPEED_1000) {
3808                 new_val = IGB_4K_ITR;
3809                 goto set_itr_val;
3810         }
3811
3812         packets = q_vector->rx.total_packets;
3813         if (packets)
3814                 avg_wire_size = q_vector->rx.total_bytes / packets;
3815
3816         packets = q_vector->tx.total_packets;
3817         if (packets)
3818                 avg_wire_size = max_t(u32, avg_wire_size,
3819                                       q_vector->tx.total_bytes / packets);
3820
3821         /* if avg_wire_size isn't set no work was done */
3822         if (!avg_wire_size)
3823                 goto clear_counts;
3824
3825         /* Add 24 bytes to size to account for CRC, preamble, and gap */
3826         avg_wire_size += 24;
3827
3828         /* Don't starve jumbo frames */
3829         avg_wire_size = min(avg_wire_size, 3000);
3830
3831         /* Give a little boost to mid-size frames */
3832         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
3833                 new_val = avg_wire_size / 3;
3834         else
3835                 new_val = avg_wire_size / 2;
3836
3837         /* conservative mode (itr 3) eliminates the lowest_latency setting */
3838         if (new_val < IGB_20K_ITR &&
3839             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
3840              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
3841                 new_val = IGB_20K_ITR;
3842
3843 set_itr_val:
3844         if (new_val != q_vector->itr_val) {
3845                 q_vector->itr_val = new_val;
3846                 q_vector->set_itr = 1;
3847         }
3848 clear_counts:
3849         q_vector->rx.total_bytes = 0;
3850         q_vector->rx.total_packets = 0;
3851         q_vector->tx.total_bytes = 0;
3852         q_vector->tx.total_packets = 0;
3853 }
3854
3855 /**
3856  * igb_update_itr - update the dynamic ITR value based on statistics
3857  *      Stores a new ITR value based on packets and byte
3858  *      counts during the last interrupt.  The advantage of per interrupt
3859  *      computation is faster updates and more accurate ITR for the current
3860  *      traffic pattern.  Constants in this function were computed
3861  *      based on theoretical maximum wire speed and thresholds were set based
3862  *      on testing data as well as attempting to minimize response time
3863  *      while increasing bulk throughput.
3864  *      this functionality is controlled by the InterruptThrottleRate module
3865  *      parameter (see igb_param.c)
3866  *      NOTE:  These calculations are only valid when operating in a single-
3867  *             queue environment.
3868  * @q_vector: pointer to q_vector
3869  * @ring_container: ring info to update the itr for
3870  **/
3871 static void igb_update_itr(struct igb_q_vector *q_vector,
3872                            struct igb_ring_container *ring_container)
3873 {
3874         unsigned int packets = ring_container->total_packets;
3875         unsigned int bytes = ring_container->total_bytes;
3876         u8 itrval = ring_container->itr;
3877
3878         /* no packets, exit with status unchanged */
3879         if (packets == 0)
3880                 return;
3881
3882         switch (itrval) {
3883         case lowest_latency:
3884                 /* handle TSO and jumbo frames */
3885                 if (bytes/packets > 8000)
3886                         itrval = bulk_latency;
3887                 else if ((packets < 5) && (bytes > 512))
3888                         itrval = low_latency;
3889                 break;
3890         case low_latency:  /* 50 usec aka 20000 ints/s */
3891                 if (bytes > 10000) {
3892                         /* this if handles the TSO accounting */
3893                         if (bytes/packets > 8000) {
3894                                 itrval = bulk_latency;
3895                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
3896                                 itrval = bulk_latency;
3897                         } else if ((packets > 35)) {
3898                                 itrval = lowest_latency;
3899                         }
3900                 } else if (bytes/packets > 2000) {
3901                         itrval = bulk_latency;
3902                 } else if (packets <= 2 && bytes < 512) {
3903                         itrval = lowest_latency;
3904                 }
3905                 break;
3906         case bulk_latency: /* 250 usec aka 4000 ints/s */
3907                 if (bytes > 25000) {
3908                         if (packets > 35)
3909                                 itrval = low_latency;
3910                 } else if (bytes < 1500) {
3911                         itrval = low_latency;
3912                 }
3913                 break;
3914         }
3915
3916         /* clear work counters since we have the values we need */
3917         ring_container->total_bytes = 0;
3918         ring_container->total_packets = 0;
3919
3920         /* write updated itr to ring container */
3921         ring_container->itr = itrval;
3922 }
3923
3924 static void igb_set_itr(struct igb_q_vector *q_vector)
3925 {
3926         struct igb_adapter *adapter = q_vector->adapter;
3927         u32 new_itr = q_vector->itr_val;
3928         u8 current_itr = 0;
3929
3930         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
3931         if (adapter->link_speed != SPEED_1000) {
3932                 current_itr = 0;
3933                 new_itr = IGB_4K_ITR;
3934                 goto set_itr_now;
3935         }
3936
3937         igb_update_itr(q_vector, &q_vector->tx);
3938         igb_update_itr(q_vector, &q_vector->rx);
3939
3940         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
3941
3942         /* conservative mode (itr 3) eliminates the lowest_latency setting */
3943         if (current_itr == lowest_latency &&
3944             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
3945              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
3946                 current_itr = low_latency;
3947
3948         switch (current_itr) {
3949         /* counts and packets in update_itr are dependent on these numbers */
3950         case lowest_latency:
3951                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
3952                 break;
3953         case low_latency:
3954                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
3955                 break;
3956         case bulk_latency:
3957                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
3958                 break;
3959         default:
3960                 break;
3961         }
3962
3963 set_itr_now:
3964         if (new_itr != q_vector->itr_val) {
3965                 /* this attempts to bias the interrupt rate towards Bulk
3966                  * by adding intermediate steps when interrupt rate is
3967                  * increasing */
3968                 new_itr = new_itr > q_vector->itr_val ?
3969                              max((new_itr * q_vector->itr_val) /
3970                                  (new_itr + (q_vector->itr_val >> 2)),
3971                                  new_itr) :
3972                              new_itr;
3973                 /* Don't write the value here; it resets the adapter's
3974                  * internal timer, and causes us to delay far longer than
3975                  * we should between interrupts.  Instead, we write the ITR
3976                  * value at the beginning of the next interrupt so the timing
3977                  * ends up being correct.
3978                  */
3979                 q_vector->itr_val = new_itr;
3980                 q_vector->set_itr = 1;
3981         }
3982 }
3983
3984 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
3985                             u32 type_tucmd, u32 mss_l4len_idx)
3986 {
3987         struct e1000_adv_tx_context_desc *context_desc;
3988         u16 i = tx_ring->next_to_use;
3989
3990         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
3991
3992         i++;
3993         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
3994
3995         /* set bits to identify this as an advanced context descriptor */
3996         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
3997
3998         /* For 82575, context index must be unique per ring. */
3999         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4000                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4001
4002         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4003         context_desc->seqnum_seed       = 0;
4004         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4005         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4006 }
4007
4008 static int igb_tso(struct igb_ring *tx_ring,
4009                    struct igb_tx_buffer *first,
4010                    u8 *hdr_len)
4011 {
4012         struct sk_buff *skb = first->skb;
4013         u32 vlan_macip_lens, type_tucmd;
4014         u32 mss_l4len_idx, l4len;
4015
4016         if (!skb_is_gso(skb))
4017                 return 0;
4018
4019         if (skb_header_cloned(skb)) {
4020                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4021                 if (err)
4022                         return err;
4023         }
4024
4025         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4026         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4027
4028         if (first->protocol == __constant_htons(ETH_P_IP)) {
4029                 struct iphdr *iph = ip_hdr(skb);
4030                 iph->tot_len = 0;
4031                 iph->check = 0;
4032                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4033                                                          iph->daddr, 0,
4034                                                          IPPROTO_TCP,
4035                                                          0);
4036                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4037                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4038                                    IGB_TX_FLAGS_CSUM |
4039                                    IGB_TX_FLAGS_IPV4;
4040         } else if (skb_is_gso_v6(skb)) {
4041                 ipv6_hdr(skb)->payload_len = 0;
4042                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4043                                                        &ipv6_hdr(skb)->daddr,
4044                                                        0, IPPROTO_TCP, 0);
4045                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4046                                    IGB_TX_FLAGS_CSUM;
4047         }
4048
4049         /* compute header lengths */
4050         l4len = tcp_hdrlen(skb);
4051         *hdr_len = skb_transport_offset(skb) + l4len;
4052
4053         /* update gso size and bytecount with header size */
4054         first->gso_segs = skb_shinfo(skb)->gso_segs;
4055         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4056
4057         /* MSS L4LEN IDX */
4058         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4059         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4060
4061         /* VLAN MACLEN IPLEN */
4062         vlan_macip_lens = skb_network_header_len(skb);
4063         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4064         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4065
4066         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4067
4068         return 1;
4069 }
4070
4071 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4072 {
4073         struct sk_buff *skb = first->skb;
4074         u32 vlan_macip_lens = 0;
4075         u32 mss_l4len_idx = 0;
4076         u32 type_tucmd = 0;
4077
4078         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4079                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4080                         return;
4081         } else {
4082                 u8 l4_hdr = 0;
4083                 switch (first->protocol) {
4084                 case __constant_htons(ETH_P_IP):
4085                         vlan_macip_lens |= skb_network_header_len(skb);
4086                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4087                         l4_hdr = ip_hdr(skb)->protocol;
4088                         break;
4089                 case __constant_htons(ETH_P_IPV6):
4090                         vlan_macip_lens |= skb_network_header_len(skb);
4091                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4092                         break;
4093                 default:
4094                         if (unlikely(net_ratelimit())) {
4095                                 dev_warn(tx_ring->dev,
4096                                  "partial checksum but proto=%x!\n",
4097                                  first->protocol);
4098                         }
4099                         break;
4100                 }
4101
4102                 switch (l4_hdr) {
4103                 case IPPROTO_TCP:
4104                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4105                         mss_l4len_idx = tcp_hdrlen(skb) <<
4106                                         E1000_ADVTXD_L4LEN_SHIFT;
4107                         break;
4108                 case IPPROTO_SCTP:
4109                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4110                         mss_l4len_idx = sizeof(struct sctphdr) <<
4111                                         E1000_ADVTXD_L4LEN_SHIFT;
4112                         break;
4113                 case IPPROTO_UDP:
4114                         mss_l4len_idx = sizeof(struct udphdr) <<
4115                                         E1000_ADVTXD_L4LEN_SHIFT;
4116                         break;
4117                 default:
4118                         if (unlikely(net_ratelimit())) {
4119                                 dev_warn(tx_ring->dev,
4120                                  "partial checksum but l4 proto=%x!\n",
4121                                  l4_hdr);
4122                         }
4123                         break;
4124                 }
4125
4126                 /* update TX checksum flag */
4127                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4128         }
4129
4130         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4131         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4132
4133         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4134 }
4135
4136 static __le32 igb_tx_cmd_type(u32 tx_flags)
4137 {
4138         /* set type for advanced descriptor with frame checksum insertion */
4139         __le32 cmd_type = cpu_to_le32(E1000_ADVTXD_DTYP_DATA |
4140                                       E1000_ADVTXD_DCMD_IFCS |
4141                                       E1000_ADVTXD_DCMD_DEXT);
4142
4143         /* set HW vlan bit if vlan is present */
4144         if (tx_flags & IGB_TX_FLAGS_VLAN)
4145                 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_VLE);
4146
4147 #ifdef CONFIG_IGB_PTP
4148         /* set timestamp bit if present */
4149         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP))
4150                 cmd_type |= cpu_to_le32(E1000_ADVTXD_MAC_TSTAMP);
4151 #endif /* CONFIG_IGB_PTP */
4152
4153         /* set segmentation bits for TSO */
4154         if (tx_flags & IGB_TX_FLAGS_TSO)
4155                 cmd_type |= cpu_to_le32(E1000_ADVTXD_DCMD_TSE);
4156
4157         return cmd_type;
4158 }
4159
4160 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4161                                  union e1000_adv_tx_desc *tx_desc,
4162                                  u32 tx_flags, unsigned int paylen)
4163 {
4164         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4165
4166         /* 82575 requires a unique index per ring if any offload is enabled */
4167         if ((tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_VLAN)) &&
4168             test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4169                 olinfo_status |= tx_ring->reg_idx << 4;
4170
4171         /* insert L4 checksum */
4172         if (tx_flags & IGB_TX_FLAGS_CSUM) {
4173                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
4174
4175                 /* insert IPv4 checksum */
4176                 if (tx_flags & IGB_TX_FLAGS_IPV4)
4177                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
4178         }
4179
4180         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4181 }
4182
4183 /*
4184  * The largest size we can write to the descriptor is 65535.  In order to
4185  * maintain a power of two alignment we have to limit ourselves to 32K.
4186  */
4187 #define IGB_MAX_TXD_PWR 15
4188 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
4189
4190 static void igb_tx_map(struct igb_ring *tx_ring,
4191                        struct igb_tx_buffer *first,
4192                        const u8 hdr_len)
4193 {
4194         struct sk_buff *skb = first->skb;
4195         struct igb_tx_buffer *tx_buffer;
4196         union e1000_adv_tx_desc *tx_desc;
4197         dma_addr_t dma;
4198         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
4199         unsigned int data_len = skb->data_len;
4200         unsigned int size = skb_headlen(skb);
4201         unsigned int paylen = skb->len - hdr_len;
4202         __le32 cmd_type;
4203         u32 tx_flags = first->tx_flags;
4204         u16 i = tx_ring->next_to_use;
4205
4206         tx_desc = IGB_TX_DESC(tx_ring, i);
4207
4208         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, paylen);
4209         cmd_type = igb_tx_cmd_type(tx_flags);
4210
4211         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4212         if (dma_mapping_error(tx_ring->dev, dma))
4213                 goto dma_error;
4214
4215         /* record length, and DMA address */
4216         dma_unmap_len_set(first, len, size);
4217         dma_unmap_addr_set(first, dma, dma);
4218         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4219
4220         for (;;) {
4221                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4222                         tx_desc->read.cmd_type_len =
4223                                 cmd_type | cpu_to_le32(IGB_MAX_DATA_PER_TXD);
4224
4225                         i++;
4226                         tx_desc++;
4227                         if (i == tx_ring->count) {
4228                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4229                                 i = 0;
4230                         }
4231
4232                         dma += IGB_MAX_DATA_PER_TXD;
4233                         size -= IGB_MAX_DATA_PER_TXD;
4234
4235                         tx_desc->read.olinfo_status = 0;
4236                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4237                 }
4238
4239                 if (likely(!data_len))
4240                         break;
4241
4242                 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
4243
4244                 i++;
4245                 tx_desc++;
4246                 if (i == tx_ring->count) {
4247                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4248                         i = 0;
4249                 }
4250
4251                 size = skb_frag_size(frag);
4252                 data_len -= size;
4253
4254                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4255                                    size, DMA_TO_DEVICE);
4256                 if (dma_mapping_error(tx_ring->dev, dma))
4257                         goto dma_error;
4258
4259                 tx_buffer = &tx_ring->tx_buffer_info[i];
4260                 dma_unmap_len_set(tx_buffer, len, size);
4261                 dma_unmap_addr_set(tx_buffer, dma, dma);
4262
4263                 tx_desc->read.olinfo_status = 0;
4264                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4265
4266                 frag++;
4267         }
4268
4269         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4270
4271         /* write last descriptor with RS and EOP bits */
4272         cmd_type |= cpu_to_le32(size) | cpu_to_le32(IGB_TXD_DCMD);
4273         if (unlikely(skb->no_fcs))
4274                 cmd_type &= ~(cpu_to_le32(E1000_ADVTXD_DCMD_IFCS));
4275         tx_desc->read.cmd_type_len = cmd_type;
4276
4277         /* set the timestamp */
4278         first->time_stamp = jiffies;
4279
4280         /*
4281          * Force memory writes to complete before letting h/w know there
4282          * are new descriptors to fetch.  (Only applicable for weak-ordered
4283          * memory model archs, such as IA-64).
4284          *
4285          * We also need this memory barrier to make certain all of the
4286          * status bits have been updated before next_to_watch is written.
4287          */
4288         wmb();
4289
4290         /* set next_to_watch value indicating a packet is present */
4291         first->next_to_watch = tx_desc;
4292
4293         i++;
4294         if (i == tx_ring->count)
4295                 i = 0;
4296
4297         tx_ring->next_to_use = i;
4298
4299         writel(i, tx_ring->tail);
4300
4301         /* we need this if more than one processor can write to our tail
4302          * at a time, it syncronizes IO on IA64/Altix systems */
4303         mmiowb();
4304
4305         return;
4306
4307 dma_error:
4308         dev_err(tx_ring->dev, "TX DMA map failed\n");
4309
4310         /* clear dma mappings for failed tx_buffer_info map */
4311         for (;;) {
4312                 tx_buffer = &tx_ring->tx_buffer_info[i];
4313                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4314                 if (tx_buffer == first)
4315                         break;
4316                 if (i == 0)
4317                         i = tx_ring->count;
4318                 i--;
4319         }
4320
4321         tx_ring->next_to_use = i;
4322 }
4323
4324 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4325 {
4326         struct net_device *netdev = tx_ring->netdev;
4327
4328         netif_stop_subqueue(netdev, tx_ring->queue_index);
4329
4330         /* Herbert's original patch had:
4331          *  smp_mb__after_netif_stop_queue();
4332          * but since that doesn't exist yet, just open code it. */
4333         smp_mb();
4334
4335         /* We need to check again in a case another CPU has just
4336          * made room available. */
4337         if (igb_desc_unused(tx_ring) < size)
4338                 return -EBUSY;
4339
4340         /* A reprieve! */
4341         netif_wake_subqueue(netdev, tx_ring->queue_index);
4342
4343         u64_stats_update_begin(&tx_ring->tx_syncp2);
4344         tx_ring->tx_stats.restart_queue2++;
4345         u64_stats_update_end(&tx_ring->tx_syncp2);
4346
4347         return 0;
4348 }
4349
4350 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4351 {
4352         if (igb_desc_unused(tx_ring) >= size)
4353                 return 0;
4354         return __igb_maybe_stop_tx(tx_ring, size);
4355 }
4356
4357 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4358                                 struct igb_ring *tx_ring)
4359 {
4360 #ifdef CONFIG_IGB_PTP
4361         struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4362 #endif /* CONFIG_IGB_PTP */
4363         struct igb_tx_buffer *first;
4364         int tso;
4365         u32 tx_flags = 0;
4366         __be16 protocol = vlan_get_protocol(skb);
4367         u8 hdr_len = 0;
4368
4369         /* need: 1 descriptor per page,
4370          *       + 2 desc gap to keep tail from touching head,
4371          *       + 1 desc for skb->data,
4372          *       + 1 desc for context descriptor,
4373          * otherwise try next time */
4374         if (igb_maybe_stop_tx(tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
4375                 /* this is a hard error */
4376                 return NETDEV_TX_BUSY;
4377         }
4378
4379         /* record the location of the first descriptor for this packet */
4380         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4381         first->skb = skb;
4382         first->bytecount = skb->len;
4383         first->gso_segs = 1;
4384
4385 #ifdef CONFIG_IGB_PTP
4386         if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
4387                      !(adapter->ptp_tx_skb))) {
4388                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4389                 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4390
4391                 adapter->ptp_tx_skb = skb_get(skb);
4392                 if (adapter->hw.mac.type == e1000_82576)
4393                         schedule_work(&adapter->ptp_tx_work);
4394         }
4395 #endif /* CONFIG_IGB_PTP */
4396
4397         if (vlan_tx_tag_present(skb)) {
4398                 tx_flags |= IGB_TX_FLAGS_VLAN;
4399                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4400         }
4401
4402         /* record initial flags and protocol */
4403         first->tx_flags = tx_flags;
4404         first->protocol = protocol;
4405
4406         tso = igb_tso(tx_ring, first, &hdr_len);
4407         if (tso < 0)
4408                 goto out_drop;
4409         else if (!tso)
4410                 igb_tx_csum(tx_ring, first);
4411
4412         igb_tx_map(tx_ring, first, hdr_len);
4413
4414         /* Make sure there is space in the ring for the next send. */
4415         igb_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 4);
4416
4417         return NETDEV_TX_OK;
4418
4419 out_drop:
4420         igb_unmap_and_free_tx_resource(tx_ring, first);
4421
4422         return NETDEV_TX_OK;
4423 }
4424
4425 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4426                                                     struct sk_buff *skb)
4427 {
4428         unsigned int r_idx = skb->queue_mapping;
4429
4430         if (r_idx >= adapter->num_tx_queues)
4431                 r_idx = r_idx % adapter->num_tx_queues;
4432
4433         return adapter->tx_ring[r_idx];
4434 }
4435
4436 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4437                                   struct net_device *netdev)
4438 {
4439         struct igb_adapter *adapter = netdev_priv(netdev);
4440
4441         if (test_bit(__IGB_DOWN, &adapter->state)) {
4442                 dev_kfree_skb_any(skb);
4443                 return NETDEV_TX_OK;
4444         }
4445
4446         if (skb->len <= 0) {
4447                 dev_kfree_skb_any(skb);
4448                 return NETDEV_TX_OK;
4449         }
4450
4451         /*
4452          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
4453          * in order to meet this minimum size requirement.
4454          */
4455         if (unlikely(skb->len < 17)) {
4456                 if (skb_pad(skb, 17 - skb->len))
4457                         return NETDEV_TX_OK;
4458                 skb->len = 17;
4459                 skb_set_tail_pointer(skb, 17);
4460         }
4461
4462         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4463 }
4464
4465 /**
4466  * igb_tx_timeout - Respond to a Tx Hang
4467  * @netdev: network interface device structure
4468  **/
4469 static void igb_tx_timeout(struct net_device *netdev)
4470 {
4471         struct igb_adapter *adapter = netdev_priv(netdev);
4472         struct e1000_hw *hw = &adapter->hw;
4473
4474         /* Do the reset outside of interrupt context */
4475         adapter->tx_timeout_count++;
4476
4477         if (hw->mac.type >= e1000_82580)
4478                 hw->dev_spec._82575.global_device_reset = true;
4479
4480         schedule_work(&adapter->reset_task);
4481         wr32(E1000_EICS,
4482              (adapter->eims_enable_mask & ~adapter->eims_other));
4483 }
4484
4485 static void igb_reset_task(struct work_struct *work)
4486 {
4487         struct igb_adapter *adapter;
4488         adapter = container_of(work, struct igb_adapter, reset_task);
4489
4490         igb_dump(adapter);
4491         netdev_err(adapter->netdev, "Reset adapter\n");
4492         igb_reinit_locked(adapter);
4493 }
4494
4495 /**
4496  * igb_get_stats64 - Get System Network Statistics
4497  * @netdev: network interface device structure
4498  * @stats: rtnl_link_stats64 pointer
4499  *
4500  **/
4501 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4502                                                  struct rtnl_link_stats64 *stats)
4503 {
4504         struct igb_adapter *adapter = netdev_priv(netdev);
4505
4506         spin_lock(&adapter->stats64_lock);
4507         igb_update_stats(adapter, &adapter->stats64);
4508         memcpy(stats, &adapter->stats64, sizeof(*stats));
4509         spin_unlock(&adapter->stats64_lock);
4510
4511         return stats;
4512 }
4513
4514 /**
4515  * igb_change_mtu - Change the Maximum Transfer Unit
4516  * @netdev: network interface device structure
4517  * @new_mtu: new value for maximum frame size
4518  *
4519  * Returns 0 on success, negative on failure
4520  **/
4521 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4522 {
4523         struct igb_adapter *adapter = netdev_priv(netdev);
4524         struct pci_dev *pdev = adapter->pdev;
4525         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4526
4527         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4528                 dev_err(&pdev->dev, "Invalid MTU setting\n");
4529                 return -EINVAL;
4530         }
4531
4532 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4533         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4534                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4535                 return -EINVAL;
4536         }
4537
4538         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4539                 msleep(1);
4540
4541         /* igb_down has a dependency on max_frame_size */
4542         adapter->max_frame_size = max_frame;
4543
4544         if (netif_running(netdev))
4545                 igb_down(adapter);
4546
4547         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4548                  netdev->mtu, new_mtu);
4549         netdev->mtu = new_mtu;
4550
4551         if (netif_running(netdev))
4552                 igb_up(adapter);
4553         else
4554                 igb_reset(adapter);
4555
4556         clear_bit(__IGB_RESETTING, &adapter->state);
4557
4558         return 0;
4559 }
4560
4561 /**
4562  * igb_update_stats - Update the board statistics counters
4563  * @adapter: board private structure
4564  **/
4565
4566 void igb_update_stats(struct igb_adapter *adapter,
4567                       struct rtnl_link_stats64 *net_stats)
4568 {
4569         struct e1000_hw *hw = &adapter->hw;
4570         struct pci_dev *pdev = adapter->pdev;
4571         u32 reg, mpc;
4572         u16 phy_tmp;
4573         int i;
4574         u64 bytes, packets;
4575         unsigned int start;
4576         u64 _bytes, _packets;
4577
4578 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4579
4580         /*
4581          * Prevent stats update while adapter is being reset, or if the pci
4582          * connection is down.
4583          */
4584         if (adapter->link_speed == 0)
4585                 return;
4586         if (pci_channel_offline(pdev))
4587                 return;
4588
4589         bytes = 0;
4590         packets = 0;
4591         for (i = 0; i < adapter->num_rx_queues; i++) {
4592                 u32 rqdpc = rd32(E1000_RQDPC(i));
4593                 struct igb_ring *ring = adapter->rx_ring[i];
4594
4595                 if (rqdpc) {
4596                         ring->rx_stats.drops += rqdpc;
4597                         net_stats->rx_fifo_errors += rqdpc;
4598                 }
4599
4600                 do {
4601                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4602                         _bytes = ring->rx_stats.bytes;
4603                         _packets = ring->rx_stats.packets;
4604                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4605                 bytes += _bytes;
4606                 packets += _packets;
4607         }
4608
4609         net_stats->rx_bytes = bytes;
4610         net_stats->rx_packets = packets;
4611
4612         bytes = 0;
4613         packets = 0;
4614         for (i = 0; i < adapter->num_tx_queues; i++) {
4615                 struct igb_ring *ring = adapter->tx_ring[i];
4616                 do {
4617                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4618                         _bytes = ring->tx_stats.bytes;
4619                         _packets = ring->tx_stats.packets;
4620                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4621                 bytes += _bytes;
4622                 packets += _packets;
4623         }
4624         net_stats->tx_bytes = bytes;
4625         net_stats->tx_packets = packets;
4626
4627         /* read stats registers */
4628         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4629         adapter->stats.gprc += rd32(E1000_GPRC);
4630         adapter->stats.gorc += rd32(E1000_GORCL);
4631         rd32(E1000_GORCH); /* clear GORCL */
4632         adapter->stats.bprc += rd32(E1000_BPRC);
4633         adapter->stats.mprc += rd32(E1000_MPRC);
4634         adapter->stats.roc += rd32(E1000_ROC);
4635
4636         adapter->stats.prc64 += rd32(E1000_PRC64);
4637         adapter->stats.prc127 += rd32(E1000_PRC127);
4638         adapter->stats.prc255 += rd32(E1000_PRC255);
4639         adapter->stats.prc511 += rd32(E1000_PRC511);
4640         adapter->stats.prc1023 += rd32(E1000_PRC1023);
4641         adapter->stats.prc1522 += rd32(E1000_PRC1522);
4642         adapter->stats.symerrs += rd32(E1000_SYMERRS);
4643         adapter->stats.sec += rd32(E1000_SEC);
4644
4645         mpc = rd32(E1000_MPC);
4646         adapter->stats.mpc += mpc;
4647         net_stats->rx_fifo_errors += mpc;
4648         adapter->stats.scc += rd32(E1000_SCC);
4649         adapter->stats.ecol += rd32(E1000_ECOL);
4650         adapter->stats.mcc += rd32(E1000_MCC);
4651         adapter->stats.latecol += rd32(E1000_LATECOL);
4652         adapter->stats.dc += rd32(E1000_DC);
4653         adapter->stats.rlec += rd32(E1000_RLEC);
4654         adapter->stats.xonrxc += rd32(E1000_XONRXC);
4655         adapter->stats.xontxc += rd32(E1000_XONTXC);
4656         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4657         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4658         adapter->stats.fcruc += rd32(E1000_FCRUC);
4659         adapter->stats.gptc += rd32(E1000_GPTC);
4660         adapter->stats.gotc += rd32(E1000_GOTCL);
4661         rd32(E1000_GOTCH); /* clear GOTCL */
4662         adapter->stats.rnbc += rd32(E1000_RNBC);
4663         adapter->stats.ruc += rd32(E1000_RUC);
4664         adapter->stats.rfc += rd32(E1000_RFC);
4665         adapter->stats.rjc += rd32(E1000_RJC);
4666         adapter->stats.tor += rd32(E1000_TORH);
4667         adapter->stats.tot += rd32(E1000_TOTH);
4668         adapter->stats.tpr += rd32(E1000_TPR);
4669
4670         adapter->stats.ptc64 += rd32(E1000_PTC64);
4671         adapter->stats.ptc127 += rd32(E1000_PTC127);
4672         adapter->stats.ptc255 += rd32(E1000_PTC255);
4673         adapter->stats.ptc511 += rd32(E1000_PTC511);
4674         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4675         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4676
4677         adapter->stats.mptc += rd32(E1000_MPTC);
4678         adapter->stats.bptc += rd32(E1000_BPTC);
4679
4680         adapter->stats.tpt += rd32(E1000_TPT);
4681         adapter->stats.colc += rd32(E1000_COLC);
4682
4683         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4684         /* read internal phy specific stats */
4685         reg = rd32(E1000_CTRL_EXT);
4686         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4687                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4688
4689                 /* this stat has invalid values on i210/i211 */
4690                 if ((hw->mac.type != e1000_i210) &&
4691                     (hw->mac.type != e1000_i211))
4692                         adapter->stats.tncrs += rd32(E1000_TNCRS);
4693         }
4694
4695         adapter->stats.tsctc += rd32(E1000_TSCTC);
4696         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4697
4698         adapter->stats.iac += rd32(E1000_IAC);
4699         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4700         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4701         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4702         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4703         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4704         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4705         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4706         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4707
4708         /* Fill out the OS statistics structure */
4709         net_stats->multicast = adapter->stats.mprc;
4710         net_stats->collisions = adapter->stats.colc;
4711
4712         /* Rx Errors */
4713
4714         /* RLEC on some newer hardware can be incorrect so build
4715          * our own version based on RUC and ROC */
4716         net_stats->rx_errors = adapter->stats.rxerrc +
4717                 adapter->stats.crcerrs + adapter->stats.algnerrc +
4718                 adapter->stats.ruc + adapter->stats.roc +
4719                 adapter->stats.cexterr;
4720         net_stats->rx_length_errors = adapter->stats.ruc +
4721                                       adapter->stats.roc;
4722         net_stats->rx_crc_errors = adapter->stats.crcerrs;
4723         net_stats->rx_frame_errors = adapter->stats.algnerrc;
4724         net_stats->rx_missed_errors = adapter->stats.mpc;
4725
4726         /* Tx Errors */
4727         net_stats->tx_errors = adapter->stats.ecol +
4728                                adapter->stats.latecol;
4729         net_stats->tx_aborted_errors = adapter->stats.ecol;
4730         net_stats->tx_window_errors = adapter->stats.latecol;
4731         net_stats->tx_carrier_errors = adapter->stats.tncrs;
4732
4733         /* Tx Dropped needs to be maintained elsewhere */
4734
4735         /* Phy Stats */
4736         if (hw->phy.media_type == e1000_media_type_copper) {
4737                 if ((adapter->link_speed == SPEED_1000) &&
4738                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
4739                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
4740                         adapter->phy_stats.idle_errors += phy_tmp;
4741                 }
4742         }
4743
4744         /* Management Stats */
4745         adapter->stats.mgptc += rd32(E1000_MGTPTC);
4746         adapter->stats.mgprc += rd32(E1000_MGTPRC);
4747         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
4748
4749         /* OS2BMC Stats */
4750         reg = rd32(E1000_MANC);
4751         if (reg & E1000_MANC_EN_BMC2OS) {
4752                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
4753                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
4754                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
4755                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
4756         }
4757 }
4758
4759 static irqreturn_t igb_msix_other(int irq, void *data)
4760 {
4761         struct igb_adapter *adapter = data;
4762         struct e1000_hw *hw = &adapter->hw;
4763         u32 icr = rd32(E1000_ICR);
4764         /* reading ICR causes bit 31 of EICR to be cleared */
4765
4766         if (icr & E1000_ICR_DRSTA)
4767                 schedule_work(&adapter->reset_task);
4768
4769         if (icr & E1000_ICR_DOUTSYNC) {
4770                 /* HW is reporting DMA is out of sync */
4771                 adapter->stats.doosync++;
4772                 /* The DMA Out of Sync is also indication of a spoof event
4773                  * in IOV mode. Check the Wrong VM Behavior register to
4774                  * see if it is really a spoof event. */
4775                 igb_check_wvbr(adapter);
4776         }
4777
4778         /* Check for a mailbox event */
4779         if (icr & E1000_ICR_VMMB)
4780                 igb_msg_task(adapter);
4781
4782         if (icr & E1000_ICR_LSC) {
4783                 hw->mac.get_link_status = 1;
4784                 /* guard against interrupt when we're going down */
4785                 if (!test_bit(__IGB_DOWN, &adapter->state))
4786                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
4787         }
4788
4789 #ifdef CONFIG_IGB_PTP
4790         if (icr & E1000_ICR_TS) {
4791                 u32 tsicr = rd32(E1000_TSICR);
4792
4793                 if (tsicr & E1000_TSICR_TXTS) {
4794                         /* acknowledge the interrupt */
4795                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
4796                         /* retrieve hardware timestamp */
4797                         schedule_work(&adapter->ptp_tx_work);
4798                 }
4799         }
4800 #endif /* CONFIG_IGB_PTP */
4801
4802         wr32(E1000_EIMS, adapter->eims_other);
4803
4804         return IRQ_HANDLED;
4805 }
4806
4807 static void igb_write_itr(struct igb_q_vector *q_vector)
4808 {
4809         struct igb_adapter *adapter = q_vector->adapter;
4810         u32 itr_val = q_vector->itr_val & 0x7FFC;
4811
4812         if (!q_vector->set_itr)
4813                 return;
4814
4815         if (!itr_val)
4816                 itr_val = 0x4;
4817
4818         if (adapter->hw.mac.type == e1000_82575)
4819                 itr_val |= itr_val << 16;
4820         else
4821                 itr_val |= E1000_EITR_CNT_IGNR;
4822
4823         writel(itr_val, q_vector->itr_register);
4824         q_vector->set_itr = 0;
4825 }
4826
4827 static irqreturn_t igb_msix_ring(int irq, void *data)
4828 {
4829         struct igb_q_vector *q_vector = data;
4830
4831         /* Write the ITR value calculated from the previous interrupt. */
4832         igb_write_itr(q_vector);
4833
4834         napi_schedule(&q_vector->napi);
4835
4836         return IRQ_HANDLED;
4837 }
4838
4839 #ifdef CONFIG_IGB_DCA
4840 static void igb_update_dca(struct igb_q_vector *q_vector)
4841 {
4842         struct igb_adapter *adapter = q_vector->adapter;
4843         struct e1000_hw *hw = &adapter->hw;
4844         int cpu = get_cpu();
4845
4846         if (q_vector->cpu == cpu)
4847                 goto out_no_update;
4848
4849         if (q_vector->tx.ring) {
4850                 int q = q_vector->tx.ring->reg_idx;
4851                 u32 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
4852                 if (hw->mac.type == e1000_82575) {
4853                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
4854                         dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4855                 } else {
4856                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
4857                         dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
4858                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
4859                 }
4860                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
4861                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
4862         }
4863         if (q_vector->rx.ring) {
4864                 int q = q_vector->rx.ring->reg_idx;
4865                 u32 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
4866                 if (hw->mac.type == e1000_82575) {
4867                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
4868                         dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4869                 } else {
4870                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
4871                         dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
4872                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
4873                 }
4874                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
4875                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
4876                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
4877                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
4878         }
4879         q_vector->cpu = cpu;
4880 out_no_update:
4881         put_cpu();
4882 }
4883
4884 static void igb_setup_dca(struct igb_adapter *adapter)
4885 {
4886         struct e1000_hw *hw = &adapter->hw;
4887         int i;
4888
4889         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
4890                 return;
4891
4892         /* Always use CB2 mode, difference is masked in the CB driver. */
4893         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
4894
4895         for (i = 0; i < adapter->num_q_vectors; i++) {
4896                 adapter->q_vector[i]->cpu = -1;
4897                 igb_update_dca(adapter->q_vector[i]);
4898         }
4899 }
4900
4901 static int __igb_notify_dca(struct device *dev, void *data)
4902 {
4903         struct net_device *netdev = dev_get_drvdata(dev);
4904         struct igb_adapter *adapter = netdev_priv(netdev);
4905         struct pci_dev *pdev = adapter->pdev;
4906         struct e1000_hw *hw = &adapter->hw;
4907         unsigned long event = *(unsigned long *)data;
4908
4909         switch (event) {
4910         case DCA_PROVIDER_ADD:
4911                 /* if already enabled, don't do it again */
4912                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
4913                         break;
4914                 if (dca_add_requester(dev) == 0) {
4915                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
4916                         dev_info(&pdev->dev, "DCA enabled\n");
4917                         igb_setup_dca(adapter);
4918                         break;
4919                 }
4920                 /* Fall Through since DCA is disabled. */
4921         case DCA_PROVIDER_REMOVE:
4922                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
4923                         /* without this a class_device is left
4924                          * hanging around in the sysfs model */
4925                         dca_remove_requester(dev);
4926                         dev_info(&pdev->dev, "DCA disabled\n");
4927                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
4928                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
4929                 }
4930                 break;
4931         }
4932
4933         return 0;
4934 }
4935
4936 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
4937                           void *p)
4938 {
4939         int ret_val;
4940
4941         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
4942                                          __igb_notify_dca);
4943
4944         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4945 }
4946 #endif /* CONFIG_IGB_DCA */
4947
4948 #ifdef CONFIG_PCI_IOV
4949 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
4950 {
4951         unsigned char mac_addr[ETH_ALEN];
4952
4953         eth_random_addr(mac_addr);
4954         igb_set_vf_mac(adapter, vf, mac_addr);
4955
4956         return 0;
4957 }
4958
4959 static bool igb_vfs_are_assigned(struct igb_adapter *adapter)
4960 {
4961         struct pci_dev *pdev = adapter->pdev;
4962         struct pci_dev *vfdev;
4963         int dev_id;
4964
4965         switch (adapter->hw.mac.type) {
4966         case e1000_82576:
4967                 dev_id = IGB_82576_VF_DEV_ID;
4968                 break;
4969         case e1000_i350:
4970                 dev_id = IGB_I350_VF_DEV_ID;
4971                 break;
4972         default:
4973                 return false;
4974         }
4975
4976         /* loop through all the VFs to see if we own any that are assigned */
4977         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, NULL);
4978         while (vfdev) {
4979                 /* if we don't own it we don't care */
4980                 if (vfdev->is_virtfn && vfdev->physfn == pdev) {
4981                         /* if it is assigned we cannot release it */
4982                         if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
4983                                 return true;
4984                 }
4985
4986                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, vfdev);
4987         }
4988
4989         return false;
4990 }
4991
4992 #endif
4993 static void igb_ping_all_vfs(struct igb_adapter *adapter)
4994 {
4995         struct e1000_hw *hw = &adapter->hw;
4996         u32 ping;
4997         int i;
4998
4999         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5000                 ping = E1000_PF_CONTROL_MSG;
5001                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5002                         ping |= E1000_VT_MSGTYPE_CTS;
5003                 igb_write_mbx(hw, &ping, 1, i);
5004         }
5005 }
5006
5007 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5008 {
5009         struct e1000_hw *hw = &adapter->hw;
5010         u32 vmolr = rd32(E1000_VMOLR(vf));
5011         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5012
5013         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5014                             IGB_VF_FLAG_MULTI_PROMISC);
5015         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5016
5017         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5018                 vmolr |= E1000_VMOLR_MPME;
5019                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5020                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5021         } else {
5022                 /*
5023                  * if we have hashes and we are clearing a multicast promisc
5024                  * flag we need to write the hashes to the MTA as this step
5025                  * was previously skipped
5026                  */
5027                 if (vf_data->num_vf_mc_hashes > 30) {
5028                         vmolr |= E1000_VMOLR_MPME;
5029                 } else if (vf_data->num_vf_mc_hashes) {
5030                         int j;
5031                         vmolr |= E1000_VMOLR_ROMPE;
5032                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5033                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5034                 }
5035         }
5036
5037         wr32(E1000_VMOLR(vf), vmolr);
5038
5039         /* there are flags left unprocessed, likely not supported */
5040         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5041                 return -EINVAL;
5042
5043         return 0;
5044
5045 }
5046
5047 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5048                                   u32 *msgbuf, u32 vf)
5049 {
5050         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5051         u16 *hash_list = (u16 *)&msgbuf[1];
5052         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5053         int i;
5054
5055         /* salt away the number of multicast addresses assigned
5056          * to this VF for later use to restore when the PF multi cast
5057          * list changes
5058          */
5059         vf_data->num_vf_mc_hashes = n;
5060
5061         /* only up to 30 hash values supported */
5062         if (n > 30)
5063                 n = 30;
5064
5065         /* store the hashes for later use */
5066         for (i = 0; i < n; i++)
5067                 vf_data->vf_mc_hashes[i] = hash_list[i];
5068
5069         /* Flush and reset the mta with the new values */
5070         igb_set_rx_mode(adapter->netdev);
5071
5072         return 0;
5073 }
5074
5075 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5076 {
5077         struct e1000_hw *hw = &adapter->hw;
5078         struct vf_data_storage *vf_data;
5079         int i, j;
5080
5081         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5082                 u32 vmolr = rd32(E1000_VMOLR(i));
5083                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5084
5085                 vf_data = &adapter->vf_data[i];
5086
5087                 if ((vf_data->num_vf_mc_hashes > 30) ||
5088                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5089                         vmolr |= E1000_VMOLR_MPME;
5090                 } else if (vf_data->num_vf_mc_hashes) {
5091                         vmolr |= E1000_VMOLR_ROMPE;
5092                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5093                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5094                 }
5095                 wr32(E1000_VMOLR(i), vmolr);
5096         }
5097 }
5098
5099 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5100 {
5101         struct e1000_hw *hw = &adapter->hw;
5102         u32 pool_mask, reg, vid;
5103         int i;
5104
5105         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5106
5107         /* Find the vlan filter for this id */
5108         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5109                 reg = rd32(E1000_VLVF(i));
5110
5111                 /* remove the vf from the pool */
5112                 reg &= ~pool_mask;
5113
5114                 /* if pool is empty then remove entry from vfta */
5115                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5116                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5117                         reg = 0;
5118                         vid = reg & E1000_VLVF_VLANID_MASK;
5119                         igb_vfta_set(hw, vid, false);
5120                 }
5121
5122                 wr32(E1000_VLVF(i), reg);
5123         }
5124
5125         adapter->vf_data[vf].vlans_enabled = 0;
5126 }
5127
5128 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5129 {
5130         struct e1000_hw *hw = &adapter->hw;
5131         u32 reg, i;
5132
5133         /* The vlvf table only exists on 82576 hardware and newer */
5134         if (hw->mac.type < e1000_82576)
5135                 return -1;
5136
5137         /* we only need to do this if VMDq is enabled */
5138         if (!adapter->vfs_allocated_count)
5139                 return -1;
5140
5141         /* Find the vlan filter for this id */
5142         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5143                 reg = rd32(E1000_VLVF(i));
5144                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5145                     vid == (reg & E1000_VLVF_VLANID_MASK))
5146                         break;
5147         }
5148
5149         if (add) {
5150                 if (i == E1000_VLVF_ARRAY_SIZE) {
5151                         /* Did not find a matching VLAN ID entry that was
5152                          * enabled.  Search for a free filter entry, i.e.
5153                          * one without the enable bit set
5154                          */
5155                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5156                                 reg = rd32(E1000_VLVF(i));
5157                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5158                                         break;
5159                         }
5160                 }
5161                 if (i < E1000_VLVF_ARRAY_SIZE) {
5162                         /* Found an enabled/available entry */
5163                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5164
5165                         /* if !enabled we need to set this up in vfta */
5166                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5167                                 /* add VID to filter table */
5168                                 igb_vfta_set(hw, vid, true);
5169                                 reg |= E1000_VLVF_VLANID_ENABLE;
5170                         }
5171                         reg &= ~E1000_VLVF_VLANID_MASK;
5172                         reg |= vid;
5173                         wr32(E1000_VLVF(i), reg);
5174
5175                         /* do not modify RLPML for PF devices */
5176                         if (vf >= adapter->vfs_allocated_count)
5177                                 return 0;
5178
5179                         if (!adapter->vf_data[vf].vlans_enabled) {
5180                                 u32 size;
5181                                 reg = rd32(E1000_VMOLR(vf));
5182                                 size = reg & E1000_VMOLR_RLPML_MASK;
5183                                 size += 4;
5184                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5185                                 reg |= size;
5186                                 wr32(E1000_VMOLR(vf), reg);
5187                         }
5188
5189                         adapter->vf_data[vf].vlans_enabled++;
5190                 }
5191         } else {
5192                 if (i < E1000_VLVF_ARRAY_SIZE) {
5193                         /* remove vf from the pool */
5194                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5195                         /* if pool is empty then remove entry from vfta */
5196                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5197                                 reg = 0;
5198                                 igb_vfta_set(hw, vid, false);
5199                         }
5200                         wr32(E1000_VLVF(i), reg);
5201
5202                         /* do not modify RLPML for PF devices */
5203                         if (vf >= adapter->vfs_allocated_count)
5204                                 return 0;
5205
5206                         adapter->vf_data[vf].vlans_enabled--;
5207                         if (!adapter->vf_data[vf].vlans_enabled) {
5208                                 u32 size;
5209                                 reg = rd32(E1000_VMOLR(vf));
5210                                 size = reg & E1000_VMOLR_RLPML_MASK;
5211                                 size -= 4;
5212                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5213                                 reg |= size;
5214                                 wr32(E1000_VMOLR(vf), reg);
5215                         }
5216                 }
5217         }
5218         return 0;
5219 }
5220
5221 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5222 {
5223         struct e1000_hw *hw = &adapter->hw;
5224
5225         if (vid)
5226                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5227         else
5228                 wr32(E1000_VMVIR(vf), 0);
5229 }
5230
5231 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5232                                int vf, u16 vlan, u8 qos)
5233 {
5234         int err = 0;
5235         struct igb_adapter *adapter = netdev_priv(netdev);
5236
5237         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5238                 return -EINVAL;
5239         if (vlan || qos) {
5240                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5241                 if (err)
5242                         goto out;
5243                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5244                 igb_set_vmolr(adapter, vf, !vlan);
5245                 adapter->vf_data[vf].pf_vlan = vlan;
5246                 adapter->vf_data[vf].pf_qos = qos;
5247                 dev_info(&adapter->pdev->dev,
5248                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5249                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5250                         dev_warn(&adapter->pdev->dev,
5251                                  "The VF VLAN has been set,"
5252                                  " but the PF device is not up.\n");
5253                         dev_warn(&adapter->pdev->dev,
5254                                  "Bring the PF device up before"
5255                                  " attempting to use the VF device.\n");
5256                 }
5257         } else {
5258                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5259                                    false, vf);
5260                 igb_set_vmvir(adapter, vlan, vf);
5261                 igb_set_vmolr(adapter, vf, true);
5262                 adapter->vf_data[vf].pf_vlan = 0;
5263                 adapter->vf_data[vf].pf_qos = 0;
5264        }
5265 out:
5266        return err;
5267 }
5268
5269 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5270 {
5271         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5272         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5273
5274         return igb_vlvf_set(adapter, vid, add, vf);
5275 }
5276
5277 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5278 {
5279         /* clear flags - except flag that indicates PF has set the MAC */
5280         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5281         adapter->vf_data[vf].last_nack = jiffies;
5282
5283         /* reset offloads to defaults */
5284         igb_set_vmolr(adapter, vf, true);
5285
5286         /* reset vlans for device */
5287         igb_clear_vf_vfta(adapter, vf);
5288         if (adapter->vf_data[vf].pf_vlan)
5289                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5290                                     adapter->vf_data[vf].pf_vlan,
5291                                     adapter->vf_data[vf].pf_qos);
5292         else
5293                 igb_clear_vf_vfta(adapter, vf);
5294
5295         /* reset multicast table array for vf */
5296         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5297
5298         /* Flush and reset the mta with the new values */
5299         igb_set_rx_mode(adapter->netdev);
5300 }
5301
5302 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5303 {
5304         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5305
5306         /* generate a new mac address as we were hotplug removed/added */
5307         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5308                 eth_random_addr(vf_mac);
5309
5310         /* process remaining reset events */
5311         igb_vf_reset(adapter, vf);
5312 }
5313
5314 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5315 {
5316         struct e1000_hw *hw = &adapter->hw;
5317         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5318         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5319         u32 reg, msgbuf[3];
5320         u8 *addr = (u8 *)(&msgbuf[1]);
5321
5322         /* process all the same items cleared in a function level reset */
5323         igb_vf_reset(adapter, vf);
5324
5325         /* set vf mac address */
5326         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5327
5328         /* enable transmit and receive for vf */
5329         reg = rd32(E1000_VFTE);
5330         wr32(E1000_VFTE, reg | (1 << vf));
5331         reg = rd32(E1000_VFRE);
5332         wr32(E1000_VFRE, reg | (1 << vf));
5333
5334         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5335
5336         /* reply to reset with ack and vf mac address */
5337         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5338         memcpy(addr, vf_mac, 6);
5339         igb_write_mbx(hw, msgbuf, 3, vf);
5340 }
5341
5342 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5343 {
5344         /*
5345          * The VF MAC Address is stored in a packed array of bytes
5346          * starting at the second 32 bit word of the msg array
5347          */
5348         unsigned char *addr = (char *)&msg[1];
5349         int err = -1;
5350
5351         if (is_valid_ether_addr(addr))
5352                 err = igb_set_vf_mac(adapter, vf, addr);
5353
5354         return err;
5355 }
5356
5357 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5358 {
5359         struct e1000_hw *hw = &adapter->hw;
5360         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5361         u32 msg = E1000_VT_MSGTYPE_NACK;
5362
5363         /* if device isn't clear to send it shouldn't be reading either */
5364         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5365             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5366                 igb_write_mbx(hw, &msg, 1, vf);
5367                 vf_data->last_nack = jiffies;
5368         }
5369 }
5370
5371 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5372 {
5373         struct pci_dev *pdev = adapter->pdev;
5374         u32 msgbuf[E1000_VFMAILBOX_SIZE];
5375         struct e1000_hw *hw = &adapter->hw;
5376         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5377         s32 retval;
5378
5379         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5380
5381         if (retval) {
5382                 /* if receive failed revoke VF CTS stats and restart init */
5383                 dev_err(&pdev->dev, "Error receiving message from VF\n");
5384                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5385                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5386                         return;
5387                 goto out;
5388         }
5389
5390         /* this is a message we already processed, do nothing */
5391         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5392                 return;
5393
5394         /*
5395          * until the vf completes a reset it should not be
5396          * allowed to start any configuration.
5397          */
5398
5399         if (msgbuf[0] == E1000_VF_RESET) {
5400                 igb_vf_reset_msg(adapter, vf);
5401                 return;
5402         }
5403
5404         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5405                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5406                         return;
5407                 retval = -1;
5408                 goto out;
5409         }
5410
5411         switch ((msgbuf[0] & 0xFFFF)) {
5412         case E1000_VF_SET_MAC_ADDR:
5413                 retval = -EINVAL;
5414                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5415                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5416                 else
5417                         dev_warn(&pdev->dev,
5418                                  "VF %d attempted to override administratively "
5419                                  "set MAC address\nReload the VF driver to "
5420                                  "resume operations\n", vf);
5421                 break;
5422         case E1000_VF_SET_PROMISC:
5423                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5424                 break;
5425         case E1000_VF_SET_MULTICAST:
5426                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5427                 break;
5428         case E1000_VF_SET_LPE:
5429                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5430                 break;
5431         case E1000_VF_SET_VLAN:
5432                 retval = -1;
5433                 if (vf_data->pf_vlan)
5434                         dev_warn(&pdev->dev,
5435                                  "VF %d attempted to override administratively "
5436                                  "set VLAN tag\nReload the VF driver to "
5437                                  "resume operations\n", vf);
5438                 else
5439                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5440                 break;
5441         default:
5442                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5443                 retval = -1;
5444                 break;
5445         }
5446
5447         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5448 out:
5449         /* notify the VF of the results of what it sent us */
5450         if (retval)
5451                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5452         else
5453                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5454
5455         igb_write_mbx(hw, msgbuf, 1, vf);
5456 }
5457
5458 static void igb_msg_task(struct igb_adapter *adapter)
5459 {
5460         struct e1000_hw *hw = &adapter->hw;
5461         u32 vf;
5462
5463         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5464                 /* process any reset requests */
5465                 if (!igb_check_for_rst(hw, vf))
5466                         igb_vf_reset_event(adapter, vf);
5467
5468                 /* process any messages pending */
5469                 if (!igb_check_for_msg(hw, vf))
5470                         igb_rcv_msg_from_vf(adapter, vf);
5471
5472                 /* process any acks */
5473                 if (!igb_check_for_ack(hw, vf))
5474                         igb_rcv_ack_from_vf(adapter, vf);
5475         }
5476 }
5477
5478 /**
5479  *  igb_set_uta - Set unicast filter table address
5480  *  @adapter: board private structure
5481  *
5482  *  The unicast table address is a register array of 32-bit registers.
5483  *  The table is meant to be used in a way similar to how the MTA is used
5484  *  however due to certain limitations in the hardware it is necessary to
5485  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5486  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
5487  **/
5488 static void igb_set_uta(struct igb_adapter *adapter)
5489 {
5490         struct e1000_hw *hw = &adapter->hw;
5491         int i;
5492
5493         /* The UTA table only exists on 82576 hardware and newer */
5494         if (hw->mac.type < e1000_82576)
5495                 return;
5496
5497         /* we only need to do this if VMDq is enabled */
5498         if (!adapter->vfs_allocated_count)
5499                 return;
5500
5501         for (i = 0; i < hw->mac.uta_reg_count; i++)
5502                 array_wr32(E1000_UTA, i, ~0);
5503 }
5504
5505 /**
5506  * igb_intr_msi - Interrupt Handler
5507  * @irq: interrupt number
5508  * @data: pointer to a network interface device structure
5509  **/
5510 static irqreturn_t igb_intr_msi(int irq, void *data)
5511 {
5512         struct igb_adapter *adapter = data;
5513         struct igb_q_vector *q_vector = adapter->q_vector[0];
5514         struct e1000_hw *hw = &adapter->hw;
5515         /* read ICR disables interrupts using IAM */
5516         u32 icr = rd32(E1000_ICR);
5517
5518         igb_write_itr(q_vector);
5519
5520         if (icr & E1000_ICR_DRSTA)
5521                 schedule_work(&adapter->reset_task);
5522
5523         if (icr & E1000_ICR_DOUTSYNC) {
5524                 /* HW is reporting DMA is out of sync */
5525                 adapter->stats.doosync++;
5526         }
5527
5528         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5529                 hw->mac.get_link_status = 1;
5530                 if (!test_bit(__IGB_DOWN, &adapter->state))
5531                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5532         }
5533
5534 #ifdef CONFIG_IGB_PTP
5535         if (icr & E1000_ICR_TS) {
5536                 u32 tsicr = rd32(E1000_TSICR);
5537
5538                 if (tsicr & E1000_TSICR_TXTS) {
5539                         /* acknowledge the interrupt */
5540                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5541                         /* retrieve hardware timestamp */
5542                         schedule_work(&adapter->ptp_tx_work);
5543                 }
5544         }
5545 #endif /* CONFIG_IGB_PTP */
5546
5547         napi_schedule(&q_vector->napi);
5548
5549         return IRQ_HANDLED;
5550 }
5551
5552 /**
5553  * igb_intr - Legacy Interrupt Handler
5554  * @irq: interrupt number
5555  * @data: pointer to a network interface device structure
5556  **/
5557 static irqreturn_t igb_intr(int irq, void *data)
5558 {
5559         struct igb_adapter *adapter = data;
5560         struct igb_q_vector *q_vector = adapter->q_vector[0];
5561         struct e1000_hw *hw = &adapter->hw;
5562         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
5563          * need for the IMC write */
5564         u32 icr = rd32(E1000_ICR);
5565
5566         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5567          * not set, then the adapter didn't send an interrupt */
5568         if (!(icr & E1000_ICR_INT_ASSERTED))
5569                 return IRQ_NONE;
5570
5571         igb_write_itr(q_vector);
5572
5573         if (icr & E1000_ICR_DRSTA)
5574                 schedule_work(&adapter->reset_task);
5575
5576         if (icr & E1000_ICR_DOUTSYNC) {
5577                 /* HW is reporting DMA is out of sync */
5578                 adapter->stats.doosync++;
5579         }
5580
5581         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5582                 hw->mac.get_link_status = 1;
5583                 /* guard against interrupt when we're going down */
5584                 if (!test_bit(__IGB_DOWN, &adapter->state))
5585                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5586         }
5587
5588 #ifdef CONFIG_IGB_PTP
5589         if (icr & E1000_ICR_TS) {
5590                 u32 tsicr = rd32(E1000_TSICR);
5591
5592                 if (tsicr & E1000_TSICR_TXTS) {
5593                         /* acknowledge the interrupt */
5594                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5595                         /* retrieve hardware timestamp */
5596                         schedule_work(&adapter->ptp_tx_work);
5597                 }
5598         }
5599 #endif /* CONFIG_IGB_PTP */
5600
5601         napi_schedule(&q_vector->napi);
5602
5603         return IRQ_HANDLED;
5604 }
5605
5606 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5607 {
5608         struct igb_adapter *adapter = q_vector->adapter;
5609         struct e1000_hw *hw = &adapter->hw;
5610
5611         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5612             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5613                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5614                         igb_set_itr(q_vector);
5615                 else
5616                         igb_update_ring_itr(q_vector);
5617         }
5618
5619         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5620                 if (adapter->msix_entries)
5621                         wr32(E1000_EIMS, q_vector->eims_value);
5622                 else
5623                         igb_irq_enable(adapter);
5624         }
5625 }
5626
5627 /**
5628  * igb_poll - NAPI Rx polling callback
5629  * @napi: napi polling structure
5630  * @budget: count of how many packets we should handle
5631  **/
5632 static int igb_poll(struct napi_struct *napi, int budget)
5633 {
5634         struct igb_q_vector *q_vector = container_of(napi,
5635                                                      struct igb_q_vector,
5636                                                      napi);
5637         bool clean_complete = true;
5638
5639 #ifdef CONFIG_IGB_DCA
5640         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5641                 igb_update_dca(q_vector);
5642 #endif
5643         if (q_vector->tx.ring)
5644                 clean_complete = igb_clean_tx_irq(q_vector);
5645
5646         if (q_vector->rx.ring)
5647                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
5648
5649         /* If all work not completed, return budget and keep polling */
5650         if (!clean_complete)
5651                 return budget;
5652
5653         /* If not enough Rx work done, exit the polling mode */
5654         napi_complete(napi);
5655         igb_ring_irq_enable(q_vector);
5656
5657         return 0;
5658 }
5659
5660 /**
5661  * igb_clean_tx_irq - Reclaim resources after transmit completes
5662  * @q_vector: pointer to q_vector containing needed info
5663  *
5664  * returns true if ring is completely cleaned
5665  **/
5666 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5667 {
5668         struct igb_adapter *adapter = q_vector->adapter;
5669         struct igb_ring *tx_ring = q_vector->tx.ring;
5670         struct igb_tx_buffer *tx_buffer;
5671         union e1000_adv_tx_desc *tx_desc;
5672         unsigned int total_bytes = 0, total_packets = 0;
5673         unsigned int budget = q_vector->tx.work_limit;
5674         unsigned int i = tx_ring->next_to_clean;
5675
5676         if (test_bit(__IGB_DOWN, &adapter->state))
5677                 return true;
5678
5679         tx_buffer = &tx_ring->tx_buffer_info[i];
5680         tx_desc = IGB_TX_DESC(tx_ring, i);
5681         i -= tx_ring->count;
5682
5683         do {
5684                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
5685
5686                 /* if next_to_watch is not set then there is no work pending */
5687                 if (!eop_desc)
5688                         break;
5689
5690                 /* prevent any other reads prior to eop_desc */
5691                 rmb();
5692
5693                 /* if DD is not set pending work has not been completed */
5694                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
5695                         break;
5696
5697                 /* clear next_to_watch to prevent false hangs */
5698                 tx_buffer->next_to_watch = NULL;
5699
5700                 /* update the statistics for this packet */
5701                 total_bytes += tx_buffer->bytecount;
5702                 total_packets += tx_buffer->gso_segs;
5703
5704                 /* free the skb */
5705                 dev_kfree_skb_any(tx_buffer->skb);
5706
5707                 /* unmap skb header data */
5708                 dma_unmap_single(tx_ring->dev,
5709                                  dma_unmap_addr(tx_buffer, dma),
5710                                  dma_unmap_len(tx_buffer, len),
5711                                  DMA_TO_DEVICE);
5712
5713                 /* clear tx_buffer data */
5714                 tx_buffer->skb = NULL;
5715                 dma_unmap_len_set(tx_buffer, len, 0);
5716
5717                 /* clear last DMA location and unmap remaining buffers */
5718                 while (tx_desc != eop_desc) {
5719                         tx_buffer++;
5720                         tx_desc++;
5721                         i++;
5722                         if (unlikely(!i)) {
5723                                 i -= tx_ring->count;
5724                                 tx_buffer = tx_ring->tx_buffer_info;
5725                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5726                         }
5727
5728                         /* unmap any remaining paged data */
5729                         if (dma_unmap_len(tx_buffer, len)) {
5730                                 dma_unmap_page(tx_ring->dev,
5731                                                dma_unmap_addr(tx_buffer, dma),
5732                                                dma_unmap_len(tx_buffer, len),
5733                                                DMA_TO_DEVICE);
5734                                 dma_unmap_len_set(tx_buffer, len, 0);
5735                         }
5736                 }
5737
5738                 /* move us one more past the eop_desc for start of next pkt */
5739                 tx_buffer++;
5740                 tx_desc++;
5741                 i++;
5742                 if (unlikely(!i)) {
5743                         i -= tx_ring->count;
5744                         tx_buffer = tx_ring->tx_buffer_info;
5745                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5746                 }
5747
5748                 /* issue prefetch for next Tx descriptor */
5749                 prefetch(tx_desc);
5750
5751                 /* update budget accounting */
5752                 budget--;
5753         } while (likely(budget));
5754
5755         netdev_tx_completed_queue(txring_txq(tx_ring),
5756                                   total_packets, total_bytes);
5757         i += tx_ring->count;
5758         tx_ring->next_to_clean = i;
5759         u64_stats_update_begin(&tx_ring->tx_syncp);
5760         tx_ring->tx_stats.bytes += total_bytes;
5761         tx_ring->tx_stats.packets += total_packets;
5762         u64_stats_update_end(&tx_ring->tx_syncp);
5763         q_vector->tx.total_bytes += total_bytes;
5764         q_vector->tx.total_packets += total_packets;
5765
5766         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
5767                 struct e1000_hw *hw = &adapter->hw;
5768
5769                 /* Detect a transmit hang in hardware, this serializes the
5770                  * check with the clearing of time_stamp and movement of i */
5771                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5772                 if (tx_buffer->next_to_watch &&
5773                     time_after(jiffies, tx_buffer->time_stamp +
5774                                (adapter->tx_timeout_factor * HZ)) &&
5775                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
5776
5777                         /* detected Tx unit hang */
5778                         dev_err(tx_ring->dev,
5779                                 "Detected Tx Unit Hang\n"
5780                                 "  Tx Queue             <%d>\n"
5781                                 "  TDH                  <%x>\n"
5782                                 "  TDT                  <%x>\n"
5783                                 "  next_to_use          <%x>\n"
5784                                 "  next_to_clean        <%x>\n"
5785                                 "buffer_info[next_to_clean]\n"
5786                                 "  time_stamp           <%lx>\n"
5787                                 "  next_to_watch        <%p>\n"
5788                                 "  jiffies              <%lx>\n"
5789                                 "  desc.status          <%x>\n",
5790                                 tx_ring->queue_index,
5791                                 rd32(E1000_TDH(tx_ring->reg_idx)),
5792                                 readl(tx_ring->tail),
5793                                 tx_ring->next_to_use,
5794                                 tx_ring->next_to_clean,
5795                                 tx_buffer->time_stamp,
5796                                 tx_buffer->next_to_watch,
5797                                 jiffies,
5798                                 tx_buffer->next_to_watch->wb.status);
5799                         netif_stop_subqueue(tx_ring->netdev,
5800                                             tx_ring->queue_index);
5801
5802                         /* we are about to reset, no point in enabling stuff */
5803                         return true;
5804                 }
5805         }
5806
5807         if (unlikely(total_packets &&
5808                      netif_carrier_ok(tx_ring->netdev) &&
5809                      igb_desc_unused(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
5810                 /* Make sure that anybody stopping the queue after this
5811                  * sees the new next_to_clean.
5812                  */
5813                 smp_mb();
5814                 if (__netif_subqueue_stopped(tx_ring->netdev,
5815                                              tx_ring->queue_index) &&
5816                     !(test_bit(__IGB_DOWN, &adapter->state))) {
5817                         netif_wake_subqueue(tx_ring->netdev,
5818                                             tx_ring->queue_index);
5819
5820                         u64_stats_update_begin(&tx_ring->tx_syncp);
5821                         tx_ring->tx_stats.restart_queue++;
5822                         u64_stats_update_end(&tx_ring->tx_syncp);
5823                 }
5824         }
5825
5826         return !!budget;
5827 }
5828
5829 /**
5830  * igb_reuse_rx_page - page flip buffer and store it back on the ring
5831  * @rx_ring: rx descriptor ring to store buffers on
5832  * @old_buff: donor buffer to have page reused
5833  *
5834  * Synchronizes page for reuse by the adapter
5835  **/
5836 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
5837                               struct igb_rx_buffer *old_buff)
5838 {
5839         struct igb_rx_buffer *new_buff;
5840         u16 nta = rx_ring->next_to_alloc;
5841
5842         new_buff = &rx_ring->rx_buffer_info[nta];
5843
5844         /* update, and store next to alloc */
5845         nta++;
5846         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
5847
5848         /* transfer page from old buffer to new buffer */
5849         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
5850
5851         /* sync the buffer for use by the device */
5852         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
5853                                          old_buff->page_offset,
5854                                          IGB_RX_BUFSZ,
5855                                          DMA_FROM_DEVICE);
5856 }
5857
5858 /**
5859  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
5860  * @rx_ring: rx descriptor ring to transact packets on
5861  * @rx_buffer: buffer containing page to add
5862  * @rx_desc: descriptor containing length of buffer written by hardware
5863  * @skb: sk_buff to place the data into
5864  *
5865  * This function will add the data contained in rx_buffer->page to the skb.
5866  * This is done either through a direct copy if the data in the buffer is
5867  * less than the skb header size, otherwise it will just attach the page as
5868  * a frag to the skb.
5869  *
5870  * The function will then update the page offset if necessary and return
5871  * true if the buffer can be reused by the adapter.
5872  **/
5873 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
5874                             struct igb_rx_buffer *rx_buffer,
5875                             union e1000_adv_rx_desc *rx_desc,
5876                             struct sk_buff *skb)
5877 {
5878         struct page *page = rx_buffer->page;
5879         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
5880
5881         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
5882                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
5883
5884 #ifdef CONFIG_IGB_PTP
5885                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
5886                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
5887                         va += IGB_TS_HDR_LEN;
5888                         size -= IGB_TS_HDR_LEN;
5889                 }
5890
5891 #endif
5892                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
5893
5894                 /* we can reuse buffer as-is, just make sure it is local */
5895                 if (likely(page_to_nid(page) == numa_node_id()))
5896                         return true;
5897
5898                 /* this page cannot be reused so discard it */
5899                 put_page(page);
5900                 return false;
5901         }
5902
5903         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5904                         rx_buffer->page_offset, size, IGB_RX_BUFSZ);
5905
5906         /* avoid re-using remote pages */
5907         if (unlikely(page_to_nid(page) != numa_node_id()))
5908                 return false;
5909
5910 #if (PAGE_SIZE < 8192)
5911         /* if we are only owner of page we can reuse it */
5912         if (unlikely(page_count(page) != 1))
5913                 return false;
5914
5915         /* flip page offset to other buffer */
5916         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
5917
5918         /*
5919          * since we are the only owner of the page and we need to
5920          * increment it, just set the value to 2 in order to avoid
5921          * an unnecessary locked operation
5922          */
5923         atomic_set(&page->_count, 2);
5924 #else
5925         /* move offset up to the next cache line */
5926         rx_buffer->page_offset += SKB_DATA_ALIGN(size);
5927
5928         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
5929                 return false;
5930
5931         /* bump ref count on page before it is given to the stack */
5932         get_page(page);
5933 #endif
5934
5935         return true;
5936 }
5937
5938 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
5939                                            union e1000_adv_rx_desc *rx_desc,
5940                                            struct sk_buff *skb)
5941 {
5942         struct igb_rx_buffer *rx_buffer;
5943         struct page *page;
5944
5945         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
5946
5947         /*
5948          * This memory barrier is needed to keep us from reading
5949          * any other fields out of the rx_desc until we know the
5950          * RXD_STAT_DD bit is set
5951          */
5952         rmb();
5953
5954         page = rx_buffer->page;
5955         prefetchw(page);
5956
5957         if (likely(!skb)) {
5958                 void *page_addr = page_address(page) +
5959                                   rx_buffer->page_offset;
5960
5961                 /* prefetch first cache line of first page */
5962                 prefetch(page_addr);
5963 #if L1_CACHE_BYTES < 128
5964                 prefetch(page_addr + L1_CACHE_BYTES);
5965 #endif
5966
5967                 /* allocate a skb to store the frags */
5968                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
5969                                                 IGB_RX_HDR_LEN);
5970                 if (unlikely(!skb)) {
5971                         rx_ring->rx_stats.alloc_failed++;
5972                         return NULL;
5973                 }
5974
5975                 /*
5976                  * we will be copying header into skb->data in
5977                  * pskb_may_pull so it is in our interest to prefetch
5978                  * it now to avoid a possible cache miss
5979                  */
5980                 prefetchw(skb->data);
5981         }
5982
5983         /* we are reusing so sync this buffer for CPU use */
5984         dma_sync_single_range_for_cpu(rx_ring->dev,
5985                                       rx_buffer->dma,
5986                                       rx_buffer->page_offset,
5987                                       IGB_RX_BUFSZ,
5988                                       DMA_FROM_DEVICE);
5989
5990         /* pull page into skb */
5991         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
5992                 /* hand second half of page back to the ring */
5993                 igb_reuse_rx_page(rx_ring, rx_buffer);
5994         } else {
5995                 /* we are not reusing the buffer so unmap it */
5996                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
5997                                PAGE_SIZE, DMA_FROM_DEVICE);
5998         }
5999
6000         /* clear contents of rx_buffer */
6001         rx_buffer->page = NULL;
6002
6003         return skb;
6004 }
6005
6006 static inline void igb_rx_checksum(struct igb_ring *ring,
6007                                    union e1000_adv_rx_desc *rx_desc,
6008                                    struct sk_buff *skb)
6009 {
6010         skb_checksum_none_assert(skb);
6011
6012         /* Ignore Checksum bit is set */
6013         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6014                 return;
6015
6016         /* Rx checksum disabled via ethtool */
6017         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6018                 return;
6019
6020         /* TCP/UDP checksum error bit is set */
6021         if (igb_test_staterr(rx_desc,
6022                              E1000_RXDEXT_STATERR_TCPE |
6023                              E1000_RXDEXT_STATERR_IPE)) {
6024                 /*
6025                  * work around errata with sctp packets where the TCPE aka
6026                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6027                  * packets, (aka let the stack check the crc32c)
6028                  */
6029                 if (!((skb->len == 60) &&
6030                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6031                         u64_stats_update_begin(&ring->rx_syncp);
6032                         ring->rx_stats.csum_err++;
6033                         u64_stats_update_end(&ring->rx_syncp);
6034                 }
6035                 /* let the stack verify checksum errors */
6036                 return;
6037         }
6038         /* It must be a TCP or UDP packet with a valid checksum */
6039         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6040                                       E1000_RXD_STAT_UDPCS))
6041                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6042
6043         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6044                 le32_to_cpu(rx_desc->wb.upper.status_error));
6045 }
6046
6047 static inline void igb_rx_hash(struct igb_ring *ring,
6048                                union e1000_adv_rx_desc *rx_desc,
6049                                struct sk_buff *skb)
6050 {
6051         if (ring->netdev->features & NETIF_F_RXHASH)
6052                 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6053 }
6054
6055 /**
6056  * igb_is_non_eop - process handling of non-EOP buffers
6057  * @rx_ring: Rx ring being processed
6058  * @rx_desc: Rx descriptor for current buffer
6059  * @skb: current socket buffer containing buffer in progress
6060  *
6061  * This function updates next to clean.  If the buffer is an EOP buffer
6062  * this function exits returning false, otherwise it will place the
6063  * sk_buff in the next buffer to be chained and return true indicating
6064  * that this is in fact a non-EOP buffer.
6065  **/
6066 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6067                            union e1000_adv_rx_desc *rx_desc)
6068 {
6069         u32 ntc = rx_ring->next_to_clean + 1;
6070
6071         /* fetch, update, and store next to clean */
6072         ntc = (ntc < rx_ring->count) ? ntc : 0;
6073         rx_ring->next_to_clean = ntc;
6074
6075         prefetch(IGB_RX_DESC(rx_ring, ntc));
6076
6077         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6078                 return false;
6079
6080         return true;
6081 }
6082
6083 /**
6084  * igb_get_headlen - determine size of header for LRO/GRO
6085  * @data: pointer to the start of the headers
6086  * @max_len: total length of section to find headers in
6087  *
6088  * This function is meant to determine the length of headers that will
6089  * be recognized by hardware for LRO, and GRO offloads.  The main
6090  * motivation of doing this is to only perform one pull for IPv4 TCP
6091  * packets so that we can do basic things like calculating the gso_size
6092  * based on the average data per packet.
6093  **/
6094 static unsigned int igb_get_headlen(unsigned char *data,
6095                                     unsigned int max_len)
6096 {
6097         union {
6098                 unsigned char *network;
6099                 /* l2 headers */
6100                 struct ethhdr *eth;
6101                 struct vlan_hdr *vlan;
6102                 /* l3 headers */
6103                 struct iphdr *ipv4;
6104                 struct ipv6hdr *ipv6;
6105         } hdr;
6106         __be16 protocol;
6107         u8 nexthdr = 0; /* default to not TCP */
6108         u8 hlen;
6109
6110         /* this should never happen, but better safe than sorry */
6111         if (max_len < ETH_HLEN)
6112                 return max_len;
6113
6114         /* initialize network frame pointer */
6115         hdr.network = data;
6116
6117         /* set first protocol and move network header forward */
6118         protocol = hdr.eth->h_proto;
6119         hdr.network += ETH_HLEN;
6120
6121         /* handle any vlan tag if present */
6122         if (protocol == __constant_htons(ETH_P_8021Q)) {
6123                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6124                         return max_len;
6125
6126                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6127                 hdr.network += VLAN_HLEN;
6128         }
6129
6130         /* handle L3 protocols */
6131         if (protocol == __constant_htons(ETH_P_IP)) {
6132                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6133                         return max_len;
6134
6135                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6136                 hlen = (hdr.network[0] & 0x0F) << 2;
6137
6138                 /* verify hlen meets minimum size requirements */
6139                 if (hlen < sizeof(struct iphdr))
6140                         return hdr.network - data;
6141
6142                 /* record next protocol */
6143                 nexthdr = hdr.ipv4->protocol;
6144                 hdr.network += hlen;
6145         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6146                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6147                         return max_len;
6148
6149                 /* record next protocol */
6150                 nexthdr = hdr.ipv6->nexthdr;
6151                 hdr.network += sizeof(struct ipv6hdr);
6152         } else {
6153                 return hdr.network - data;
6154         }
6155
6156         /* finally sort out TCP */
6157         if (nexthdr == IPPROTO_TCP) {
6158                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6159                         return max_len;
6160
6161                 /* access doff as a u8 to avoid unaligned access on ia64 */
6162                 hlen = (hdr.network[12] & 0xF0) >> 2;
6163
6164                 /* verify hlen meets minimum size requirements */
6165                 if (hlen < sizeof(struct tcphdr))
6166                         return hdr.network - data;
6167
6168                 hdr.network += hlen;
6169         } else if (nexthdr == IPPROTO_UDP) {
6170                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6171                         return max_len;
6172
6173                 hdr.network += sizeof(struct udphdr);
6174         }
6175
6176         /*
6177          * If everything has gone correctly hdr.network should be the
6178          * data section of the packet and will be the end of the header.
6179          * If not then it probably represents the end of the last recognized
6180          * header.
6181          */
6182         if ((hdr.network - data) < max_len)
6183                 return hdr.network - data;
6184         else
6185                 return max_len;
6186 }
6187
6188 /**
6189  * igb_pull_tail - igb specific version of skb_pull_tail
6190  * @rx_ring: rx descriptor ring packet is being transacted on
6191  * @rx_desc: pointer to the EOP Rx descriptor
6192  * @skb: pointer to current skb being adjusted
6193  *
6194  * This function is an igb specific version of __pskb_pull_tail.  The
6195  * main difference between this version and the original function is that
6196  * this function can make several assumptions about the state of things
6197  * that allow for significant optimizations versus the standard function.
6198  * As a result we can do things like drop a frag and maintain an accurate
6199  * truesize for the skb.
6200  */
6201 static void igb_pull_tail(struct igb_ring *rx_ring,
6202                           union e1000_adv_rx_desc *rx_desc,
6203                           struct sk_buff *skb)
6204 {
6205         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6206         unsigned char *va;
6207         unsigned int pull_len;
6208
6209         /*
6210          * it is valid to use page_address instead of kmap since we are
6211          * working with pages allocated out of the lomem pool per
6212          * alloc_page(GFP_ATOMIC)
6213          */
6214         va = skb_frag_address(frag);
6215
6216 #ifdef CONFIG_IGB_PTP
6217         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6218                 /* retrieve timestamp from buffer */
6219                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6220
6221                 /* update pointers to remove timestamp header */
6222                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6223                 frag->page_offset += IGB_TS_HDR_LEN;
6224                 skb->data_len -= IGB_TS_HDR_LEN;
6225                 skb->len -= IGB_TS_HDR_LEN;
6226
6227                 /* move va to start of packet data */
6228                 va += IGB_TS_HDR_LEN;
6229         }
6230
6231 #endif
6232         /*
6233          * we need the header to contain the greater of either ETH_HLEN or
6234          * 60 bytes if the skb->len is less than 60 for skb_pad.
6235          */
6236         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6237
6238         /* align pull length to size of long to optimize memcpy performance */
6239         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6240
6241         /* update all of the pointers */
6242         skb_frag_size_sub(frag, pull_len);
6243         frag->page_offset += pull_len;
6244         skb->data_len -= pull_len;
6245         skb->tail += pull_len;
6246 }
6247
6248 /**
6249  * igb_cleanup_headers - Correct corrupted or empty headers
6250  * @rx_ring: rx descriptor ring packet is being transacted on
6251  * @rx_desc: pointer to the EOP Rx descriptor
6252  * @skb: pointer to current skb being fixed
6253  *
6254  * Address the case where we are pulling data in on pages only
6255  * and as such no data is present in the skb header.
6256  *
6257  * In addition if skb is not at least 60 bytes we need to pad it so that
6258  * it is large enough to qualify as a valid Ethernet frame.
6259  *
6260  * Returns true if an error was encountered and skb was freed.
6261  **/
6262 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6263                                 union e1000_adv_rx_desc *rx_desc,
6264                                 struct sk_buff *skb)
6265 {
6266
6267         if (unlikely((igb_test_staterr(rx_desc,
6268                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6269                 struct net_device *netdev = rx_ring->netdev;
6270                 if (!(netdev->features & NETIF_F_RXALL)) {
6271                         dev_kfree_skb_any(skb);
6272                         return true;
6273                 }
6274         }
6275
6276         /* place header in linear portion of buffer */
6277         if (skb_is_nonlinear(skb))
6278                 igb_pull_tail(rx_ring, rx_desc, skb);
6279
6280         /* if skb_pad returns an error the skb was freed */
6281         if (unlikely(skb->len < 60)) {
6282                 int pad_len = 60 - skb->len;
6283
6284                 if (skb_pad(skb, pad_len))
6285                         return true;
6286                 __skb_put(skb, pad_len);
6287         }
6288
6289         return false;
6290 }
6291
6292 /**
6293  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6294  * @rx_ring: rx descriptor ring packet is being transacted on
6295  * @rx_desc: pointer to the EOP Rx descriptor
6296  * @skb: pointer to current skb being populated
6297  *
6298  * This function checks the ring, descriptor, and packet information in
6299  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6300  * other fields within the skb.
6301  **/
6302 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6303                                    union e1000_adv_rx_desc *rx_desc,
6304                                    struct sk_buff *skb)
6305 {
6306         struct net_device *dev = rx_ring->netdev;
6307
6308         igb_rx_hash(rx_ring, rx_desc, skb);
6309
6310         igb_rx_checksum(rx_ring, rx_desc, skb);
6311
6312 #ifdef CONFIG_IGB_PTP
6313         igb_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
6314 #endif /* CONFIG_IGB_PTP */
6315
6316         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
6317             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6318                 u16 vid;
6319                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6320                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6321                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6322                 else
6323                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6324
6325                 __vlan_hwaccel_put_tag(skb, vid);
6326         }
6327
6328         skb_record_rx_queue(skb, rx_ring->queue_index);
6329
6330         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6331 }
6332
6333 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6334 {
6335         struct igb_ring *rx_ring = q_vector->rx.ring;
6336         struct sk_buff *skb = rx_ring->skb;
6337         unsigned int total_bytes = 0, total_packets = 0;
6338         u16 cleaned_count = igb_desc_unused(rx_ring);
6339
6340         do {
6341                 union e1000_adv_rx_desc *rx_desc;
6342
6343                 /* return some buffers to hardware, one at a time is too slow */
6344                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6345                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6346                         cleaned_count = 0;
6347                 }
6348
6349                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6350
6351                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6352                         break;
6353
6354                 /* retrieve a buffer from the ring */
6355                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6356
6357                 /* exit if we failed to retrieve a buffer */
6358                 if (!skb)
6359                         break;
6360
6361                 cleaned_count++;
6362
6363                 /* fetch next buffer in frame if non-eop */
6364                 if (igb_is_non_eop(rx_ring, rx_desc))
6365                         continue;
6366
6367                 /* verify the packet layout is correct */
6368                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6369                         skb = NULL;
6370                         continue;
6371                 }
6372
6373                 /* probably a little skewed due to removing CRC */
6374                 total_bytes += skb->len;
6375
6376                 /* populate checksum, timestamp, VLAN, and protocol */
6377                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6378
6379                 napi_gro_receive(&q_vector->napi, skb);
6380
6381                 /* reset skb pointer */
6382                 skb = NULL;
6383
6384                 /* update budget accounting */
6385                 total_packets++;
6386         } while (likely(total_packets < budget));
6387
6388         /* place incomplete frames back on ring for completion */
6389         rx_ring->skb = skb;
6390
6391         u64_stats_update_begin(&rx_ring->rx_syncp);
6392         rx_ring->rx_stats.packets += total_packets;
6393         rx_ring->rx_stats.bytes += total_bytes;
6394         u64_stats_update_end(&rx_ring->rx_syncp);
6395         q_vector->rx.total_packets += total_packets;
6396         q_vector->rx.total_bytes += total_bytes;
6397
6398         if (cleaned_count)
6399                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6400
6401         return (total_packets < budget);
6402 }
6403
6404 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6405                                   struct igb_rx_buffer *bi)
6406 {
6407         struct page *page = bi->page;
6408         dma_addr_t dma;
6409
6410         /* since we are recycling buffers we should seldom need to alloc */
6411         if (likely(page))
6412                 return true;
6413
6414         /* alloc new page for storage */
6415         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6416         if (unlikely(!page)) {
6417                 rx_ring->rx_stats.alloc_failed++;
6418                 return false;
6419         }
6420
6421         /* map page for use */
6422         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6423
6424         /*
6425          * if mapping failed free memory back to system since
6426          * there isn't much point in holding memory we can't use
6427          */
6428         if (dma_mapping_error(rx_ring->dev, dma)) {
6429                 __free_page(page);
6430
6431                 rx_ring->rx_stats.alloc_failed++;
6432                 return false;
6433         }
6434
6435         bi->dma = dma;
6436         bi->page = page;
6437         bi->page_offset = 0;
6438
6439         return true;
6440 }
6441
6442 /**
6443  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6444  * @adapter: address of board private structure
6445  **/
6446 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6447 {
6448         union e1000_adv_rx_desc *rx_desc;
6449         struct igb_rx_buffer *bi;
6450         u16 i = rx_ring->next_to_use;
6451
6452         /* nothing to do */
6453         if (!cleaned_count)
6454                 return;
6455
6456         rx_desc = IGB_RX_DESC(rx_ring, i);
6457         bi = &rx_ring->rx_buffer_info[i];
6458         i -= rx_ring->count;
6459
6460         do {
6461                 if (!igb_alloc_mapped_page(rx_ring, bi))
6462                         break;
6463
6464                 /*
6465                  * Refresh the desc even if buffer_addrs didn't change
6466                  * because each write-back erases this info.
6467                  */
6468                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6469
6470                 rx_desc++;
6471                 bi++;
6472                 i++;
6473                 if (unlikely(!i)) {
6474                         rx_desc = IGB_RX_DESC(rx_ring, 0);
6475                         bi = rx_ring->rx_buffer_info;
6476                         i -= rx_ring->count;
6477                 }
6478
6479                 /* clear the hdr_addr for the next_to_use descriptor */
6480                 rx_desc->read.hdr_addr = 0;
6481
6482                 cleaned_count--;
6483         } while (cleaned_count);
6484
6485         i += rx_ring->count;
6486
6487         if (rx_ring->next_to_use != i) {
6488                 /* record the next descriptor to use */
6489                 rx_ring->next_to_use = i;
6490
6491                 /* update next to alloc since we have filled the ring */
6492                 rx_ring->next_to_alloc = i;
6493
6494                 /*
6495                  * Force memory writes to complete before letting h/w
6496                  * know there are new descriptors to fetch.  (Only
6497                  * applicable for weak-ordered memory model archs,
6498                  * such as IA-64).
6499                  */
6500                 wmb();
6501                 writel(i, rx_ring->tail);
6502         }
6503 }
6504
6505 /**
6506  * igb_mii_ioctl -
6507  * @netdev:
6508  * @ifreq:
6509  * @cmd:
6510  **/
6511 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6512 {
6513         struct igb_adapter *adapter = netdev_priv(netdev);
6514         struct mii_ioctl_data *data = if_mii(ifr);
6515
6516         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6517                 return -EOPNOTSUPP;
6518
6519         switch (cmd) {
6520         case SIOCGMIIPHY:
6521                 data->phy_id = adapter->hw.phy.addr;
6522                 break;
6523         case SIOCGMIIREG:
6524                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6525                                      &data->val_out))
6526                         return -EIO;
6527                 break;
6528         case SIOCSMIIREG:
6529         default:
6530                 return -EOPNOTSUPP;
6531         }
6532         return 0;
6533 }
6534
6535 /**
6536  * igb_ioctl -
6537  * @netdev:
6538  * @ifreq:
6539  * @cmd:
6540  **/
6541 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6542 {
6543         switch (cmd) {
6544         case SIOCGMIIPHY:
6545         case SIOCGMIIREG:
6546         case SIOCSMIIREG:
6547                 return igb_mii_ioctl(netdev, ifr, cmd);
6548 #ifdef CONFIG_IGB_PTP
6549         case SIOCSHWTSTAMP:
6550                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6551 #endif /* CONFIG_IGB_PTP */
6552         default:
6553                 return -EOPNOTSUPP;
6554         }
6555 }
6556
6557 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6558 {
6559         struct igb_adapter *adapter = hw->back;
6560
6561         if (pcie_capability_read_word(adapter->pdev, reg, value))
6562                 return -E1000_ERR_CONFIG;
6563
6564         return 0;
6565 }
6566
6567 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6568 {
6569         struct igb_adapter *adapter = hw->back;
6570
6571         if (pcie_capability_write_word(adapter->pdev, reg, *value))
6572                 return -E1000_ERR_CONFIG;
6573
6574         return 0;
6575 }
6576
6577 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6578 {
6579         struct igb_adapter *adapter = netdev_priv(netdev);
6580         struct e1000_hw *hw = &adapter->hw;
6581         u32 ctrl, rctl;
6582         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
6583
6584         if (enable) {
6585                 /* enable VLAN tag insert/strip */
6586                 ctrl = rd32(E1000_CTRL);
6587                 ctrl |= E1000_CTRL_VME;
6588                 wr32(E1000_CTRL, ctrl);
6589
6590                 /* Disable CFI check */
6591                 rctl = rd32(E1000_RCTL);
6592                 rctl &= ~E1000_RCTL_CFIEN;
6593                 wr32(E1000_RCTL, rctl);
6594         } else {
6595                 /* disable VLAN tag insert/strip */
6596                 ctrl = rd32(E1000_CTRL);
6597                 ctrl &= ~E1000_CTRL_VME;
6598                 wr32(E1000_CTRL, ctrl);
6599         }
6600
6601         igb_rlpml_set(adapter);
6602 }
6603
6604 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
6605 {
6606         struct igb_adapter *adapter = netdev_priv(netdev);
6607         struct e1000_hw *hw = &adapter->hw;
6608         int pf_id = adapter->vfs_allocated_count;
6609
6610         /* attempt to add filter to vlvf array */
6611         igb_vlvf_set(adapter, vid, true, pf_id);
6612
6613         /* add the filter since PF can receive vlans w/o entry in vlvf */
6614         igb_vfta_set(hw, vid, true);
6615
6616         set_bit(vid, adapter->active_vlans);
6617
6618         return 0;
6619 }
6620
6621 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
6622 {
6623         struct igb_adapter *adapter = netdev_priv(netdev);
6624         struct e1000_hw *hw = &adapter->hw;
6625         int pf_id = adapter->vfs_allocated_count;
6626         s32 err;
6627
6628         /* remove vlan from VLVF table array */
6629         err = igb_vlvf_set(adapter, vid, false, pf_id);
6630
6631         /* if vid was not present in VLVF just remove it from table */
6632         if (err)
6633                 igb_vfta_set(hw, vid, false);
6634
6635         clear_bit(vid, adapter->active_vlans);
6636
6637         return 0;
6638 }
6639
6640 static void igb_restore_vlan(struct igb_adapter *adapter)
6641 {
6642         u16 vid;
6643
6644         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
6645
6646         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
6647                 igb_vlan_rx_add_vid(adapter->netdev, vid);
6648 }
6649
6650 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
6651 {
6652         struct pci_dev *pdev = adapter->pdev;
6653         struct e1000_mac_info *mac = &adapter->hw.mac;
6654
6655         mac->autoneg = 0;
6656
6657         /* Make sure dplx is at most 1 bit and lsb of speed is not set
6658          * for the switch() below to work */
6659         if ((spd & 1) || (dplx & ~1))
6660                 goto err_inval;
6661
6662         /* Fiber NIC's only allow 1000 Gbps Full duplex */
6663         if ((adapter->hw.phy.media_type == e1000_media_type_internal_serdes) &&
6664             spd != SPEED_1000 &&
6665             dplx != DUPLEX_FULL)
6666                 goto err_inval;
6667
6668         switch (spd + dplx) {
6669         case SPEED_10 + DUPLEX_HALF:
6670                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
6671                 break;
6672         case SPEED_10 + DUPLEX_FULL:
6673                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
6674                 break;
6675         case SPEED_100 + DUPLEX_HALF:
6676                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
6677                 break;
6678         case SPEED_100 + DUPLEX_FULL:
6679                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
6680                 break;
6681         case SPEED_1000 + DUPLEX_FULL:
6682                 mac->autoneg = 1;
6683                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
6684                 break;
6685         case SPEED_1000 + DUPLEX_HALF: /* not supported */
6686         default:
6687                 goto err_inval;
6688         }
6689
6690         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
6691         adapter->hw.phy.mdix = AUTO_ALL_MODES;
6692
6693         return 0;
6694
6695 err_inval:
6696         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
6697         return -EINVAL;
6698 }
6699
6700 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
6701                           bool runtime)
6702 {
6703         struct net_device *netdev = pci_get_drvdata(pdev);
6704         struct igb_adapter *adapter = netdev_priv(netdev);
6705         struct e1000_hw *hw = &adapter->hw;
6706         u32 ctrl, rctl, status;
6707         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6708 #ifdef CONFIG_PM
6709         int retval = 0;
6710 #endif
6711
6712         netif_device_detach(netdev);
6713
6714         if (netif_running(netdev))
6715                 __igb_close(netdev, true);
6716
6717         igb_clear_interrupt_scheme(adapter);
6718
6719 #ifdef CONFIG_PM
6720         retval = pci_save_state(pdev);
6721         if (retval)
6722                 return retval;
6723 #endif
6724
6725         status = rd32(E1000_STATUS);
6726         if (status & E1000_STATUS_LU)
6727                 wufc &= ~E1000_WUFC_LNKC;
6728
6729         if (wufc) {
6730                 igb_setup_rctl(adapter);
6731                 igb_set_rx_mode(netdev);
6732
6733                 /* turn on all-multi mode if wake on multicast is enabled */
6734                 if (wufc & E1000_WUFC_MC) {
6735                         rctl = rd32(E1000_RCTL);
6736                         rctl |= E1000_RCTL_MPE;
6737                         wr32(E1000_RCTL, rctl);
6738                 }
6739
6740                 ctrl = rd32(E1000_CTRL);
6741                 /* advertise wake from D3Cold */
6742                 #define E1000_CTRL_ADVD3WUC 0x00100000
6743                 /* phy power management enable */
6744                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
6745                 ctrl |= E1000_CTRL_ADVD3WUC;
6746                 wr32(E1000_CTRL, ctrl);
6747
6748                 /* Allow time for pending master requests to run */
6749                 igb_disable_pcie_master(hw);
6750
6751                 wr32(E1000_WUC, E1000_WUC_PME_EN);
6752                 wr32(E1000_WUFC, wufc);
6753         } else {
6754                 wr32(E1000_WUC, 0);
6755                 wr32(E1000_WUFC, 0);
6756         }
6757
6758         *enable_wake = wufc || adapter->en_mng_pt;
6759         if (!*enable_wake)
6760                 igb_power_down_link(adapter);
6761         else
6762                 igb_power_up_link(adapter);
6763
6764         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6765          * would have already happened in close and is redundant. */
6766         igb_release_hw_control(adapter);
6767
6768         pci_disable_device(pdev);
6769
6770         return 0;
6771 }
6772
6773 #ifdef CONFIG_PM
6774 #ifdef CONFIG_PM_SLEEP
6775 static int igb_suspend(struct device *dev)
6776 {
6777         int retval;
6778         bool wake;
6779         struct pci_dev *pdev = to_pci_dev(dev);
6780
6781         retval = __igb_shutdown(pdev, &wake, 0);
6782         if (retval)
6783                 return retval;
6784
6785         if (wake) {
6786                 pci_prepare_to_sleep(pdev);
6787         } else {
6788                 pci_wake_from_d3(pdev, false);
6789                 pci_set_power_state(pdev, PCI_D3hot);
6790         }
6791
6792         return 0;
6793 }
6794 #endif /* CONFIG_PM_SLEEP */
6795
6796 static int igb_resume(struct device *dev)
6797 {
6798         struct pci_dev *pdev = to_pci_dev(dev);
6799         struct net_device *netdev = pci_get_drvdata(pdev);
6800         struct igb_adapter *adapter = netdev_priv(netdev);
6801         struct e1000_hw *hw = &adapter->hw;
6802         u32 err;
6803
6804         pci_set_power_state(pdev, PCI_D0);
6805         pci_restore_state(pdev);
6806         pci_save_state(pdev);
6807
6808         err = pci_enable_device_mem(pdev);
6809         if (err) {
6810                 dev_err(&pdev->dev,
6811                         "igb: Cannot enable PCI device from suspend\n");
6812                 return err;
6813         }
6814         pci_set_master(pdev);
6815
6816         pci_enable_wake(pdev, PCI_D3hot, 0);
6817         pci_enable_wake(pdev, PCI_D3cold, 0);
6818
6819         if (igb_init_interrupt_scheme(adapter)) {
6820                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
6821                 return -ENOMEM;
6822         }
6823
6824         igb_reset(adapter);
6825
6826         /* let the f/w know that the h/w is now under the control of the
6827          * driver. */
6828         igb_get_hw_control(adapter);
6829
6830         wr32(E1000_WUS, ~0);
6831
6832         if (netdev->flags & IFF_UP) {
6833                 err = __igb_open(netdev, true);
6834                 if (err)
6835                         return err;
6836         }
6837
6838         netif_device_attach(netdev);
6839         return 0;
6840 }
6841
6842 #ifdef CONFIG_PM_RUNTIME
6843 static int igb_runtime_idle(struct device *dev)
6844 {
6845         struct pci_dev *pdev = to_pci_dev(dev);
6846         struct net_device *netdev = pci_get_drvdata(pdev);
6847         struct igb_adapter *adapter = netdev_priv(netdev);
6848
6849         if (!igb_has_link(adapter))
6850                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
6851
6852         return -EBUSY;
6853 }
6854
6855 static int igb_runtime_suspend(struct device *dev)
6856 {
6857         struct pci_dev *pdev = to_pci_dev(dev);
6858         int retval;
6859         bool wake;
6860
6861         retval = __igb_shutdown(pdev, &wake, 1);
6862         if (retval)
6863                 return retval;
6864
6865         if (wake) {
6866                 pci_prepare_to_sleep(pdev);
6867         } else {
6868                 pci_wake_from_d3(pdev, false);
6869                 pci_set_power_state(pdev, PCI_D3hot);
6870         }
6871
6872         return 0;
6873 }
6874
6875 static int igb_runtime_resume(struct device *dev)
6876 {
6877         return igb_resume(dev);
6878 }
6879 #endif /* CONFIG_PM_RUNTIME */
6880 #endif
6881
6882 static void igb_shutdown(struct pci_dev *pdev)
6883 {
6884         bool wake;
6885
6886         __igb_shutdown(pdev, &wake, 0);
6887
6888         if (system_state == SYSTEM_POWER_OFF) {
6889                 pci_wake_from_d3(pdev, wake);
6890                 pci_set_power_state(pdev, PCI_D3hot);
6891         }
6892 }
6893
6894 #ifdef CONFIG_NET_POLL_CONTROLLER
6895 /*
6896  * Polling 'interrupt' - used by things like netconsole to send skbs
6897  * without having to re-enable interrupts. It's not called while
6898  * the interrupt routine is executing.
6899  */
6900 static void igb_netpoll(struct net_device *netdev)
6901 {
6902         struct igb_adapter *adapter = netdev_priv(netdev);
6903         struct e1000_hw *hw = &adapter->hw;
6904         struct igb_q_vector *q_vector;
6905         int i;
6906
6907         for (i = 0; i < adapter->num_q_vectors; i++) {
6908                 q_vector = adapter->q_vector[i];
6909                 if (adapter->msix_entries)
6910                         wr32(E1000_EIMC, q_vector->eims_value);
6911                 else
6912                         igb_irq_disable(adapter);
6913                 napi_schedule(&q_vector->napi);
6914         }
6915 }
6916 #endif /* CONFIG_NET_POLL_CONTROLLER */
6917
6918 /**
6919  * igb_io_error_detected - called when PCI error is detected
6920  * @pdev: Pointer to PCI device
6921  * @state: The current pci connection state
6922  *
6923  * This function is called after a PCI bus error affecting
6924  * this device has been detected.
6925  */
6926 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
6927                                               pci_channel_state_t state)
6928 {
6929         struct net_device *netdev = pci_get_drvdata(pdev);
6930         struct igb_adapter *adapter = netdev_priv(netdev);
6931
6932         netif_device_detach(netdev);
6933
6934         if (state == pci_channel_io_perm_failure)
6935                 return PCI_ERS_RESULT_DISCONNECT;
6936
6937         if (netif_running(netdev))
6938                 igb_down(adapter);
6939         pci_disable_device(pdev);
6940
6941         /* Request a slot slot reset. */
6942         return PCI_ERS_RESULT_NEED_RESET;
6943 }
6944
6945 /**
6946  * igb_io_slot_reset - called after the pci bus has been reset.
6947  * @pdev: Pointer to PCI device
6948  *
6949  * Restart the card from scratch, as if from a cold-boot. Implementation
6950  * resembles the first-half of the igb_resume routine.
6951  */
6952 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
6953 {
6954         struct net_device *netdev = pci_get_drvdata(pdev);
6955         struct igb_adapter *adapter = netdev_priv(netdev);
6956         struct e1000_hw *hw = &adapter->hw;
6957         pci_ers_result_t result;
6958         int err;
6959
6960         if (pci_enable_device_mem(pdev)) {
6961                 dev_err(&pdev->dev,
6962                         "Cannot re-enable PCI device after reset.\n");
6963                 result = PCI_ERS_RESULT_DISCONNECT;
6964         } else {
6965                 pci_set_master(pdev);
6966                 pci_restore_state(pdev);
6967                 pci_save_state(pdev);
6968
6969                 pci_enable_wake(pdev, PCI_D3hot, 0);
6970                 pci_enable_wake(pdev, PCI_D3cold, 0);
6971
6972                 igb_reset(adapter);
6973                 wr32(E1000_WUS, ~0);
6974                 result = PCI_ERS_RESULT_RECOVERED;
6975         }
6976
6977         err = pci_cleanup_aer_uncorrect_error_status(pdev);
6978         if (err) {
6979                 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
6980                         "failed 0x%0x\n", err);
6981                 /* non-fatal, continue */
6982         }
6983
6984         return result;
6985 }
6986
6987 /**
6988  * igb_io_resume - called when traffic can start flowing again.
6989  * @pdev: Pointer to PCI device
6990  *
6991  * This callback is called when the error recovery driver tells us that
6992  * its OK to resume normal operation. Implementation resembles the
6993  * second-half of the igb_resume routine.
6994  */
6995 static void igb_io_resume(struct pci_dev *pdev)
6996 {
6997         struct net_device *netdev = pci_get_drvdata(pdev);
6998         struct igb_adapter *adapter = netdev_priv(netdev);
6999
7000         if (netif_running(netdev)) {
7001                 if (igb_up(adapter)) {
7002                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7003                         return;
7004                 }
7005         }
7006
7007         netif_device_attach(netdev);
7008
7009         /* let the f/w know that the h/w is now under the control of the
7010          * driver. */
7011         igb_get_hw_control(adapter);
7012 }
7013
7014 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7015                              u8 qsel)
7016 {
7017         u32 rar_low, rar_high;
7018         struct e1000_hw *hw = &adapter->hw;
7019
7020         /* HW expects these in little endian so we reverse the byte order
7021          * from network order (big endian) to little endian
7022          */
7023         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7024                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7025         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7026
7027         /* Indicate to hardware the Address is Valid. */
7028         rar_high |= E1000_RAH_AV;
7029
7030         if (hw->mac.type == e1000_82575)
7031                 rar_high |= E1000_RAH_POOL_1 * qsel;
7032         else
7033                 rar_high |= E1000_RAH_POOL_1 << qsel;
7034
7035         wr32(E1000_RAL(index), rar_low);
7036         wrfl();
7037         wr32(E1000_RAH(index), rar_high);
7038         wrfl();
7039 }
7040
7041 static int igb_set_vf_mac(struct igb_adapter *adapter,
7042                           int vf, unsigned char *mac_addr)
7043 {
7044         struct e1000_hw *hw = &adapter->hw;
7045         /* VF MAC addresses start at end of receive addresses and moves
7046          * torwards the first, as a result a collision should not be possible */
7047         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7048
7049         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7050
7051         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7052
7053         return 0;
7054 }
7055
7056 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7057 {
7058         struct igb_adapter *adapter = netdev_priv(netdev);
7059         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7060                 return -EINVAL;
7061         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7062         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7063         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
7064                                       " change effective.");
7065         if (test_bit(__IGB_DOWN, &adapter->state)) {
7066                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
7067                          " but the PF device is not up.\n");
7068                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
7069                          " attempting to use the VF device.\n");
7070         }
7071         return igb_set_vf_mac(adapter, vf, mac);
7072 }
7073
7074 static int igb_link_mbps(int internal_link_speed)
7075 {
7076         switch (internal_link_speed) {
7077         case SPEED_100:
7078                 return 100;
7079         case SPEED_1000:
7080                 return 1000;
7081         default:
7082                 return 0;
7083         }
7084 }
7085
7086 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7087                                   int link_speed)
7088 {
7089         int rf_dec, rf_int;
7090         u32 bcnrc_val;
7091
7092         if (tx_rate != 0) {
7093                 /* Calculate the rate factor values to set */
7094                 rf_int = link_speed / tx_rate;
7095                 rf_dec = (link_speed - (rf_int * tx_rate));
7096                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
7097
7098                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7099                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
7100                                E1000_RTTBCNRC_RF_INT_MASK);
7101                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7102         } else {
7103                 bcnrc_val = 0;
7104         }
7105
7106         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7107         /*
7108          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7109          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7110          */
7111         wr32(E1000_RTTBCNRM, 0x14);
7112         wr32(E1000_RTTBCNRC, bcnrc_val);
7113 }
7114
7115 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7116 {
7117         int actual_link_speed, i;
7118         bool reset_rate = false;
7119
7120         /* VF TX rate limit was not set or not supported */
7121         if ((adapter->vf_rate_link_speed == 0) ||
7122             (adapter->hw.mac.type != e1000_82576))
7123                 return;
7124
7125         actual_link_speed = igb_link_mbps(adapter->link_speed);
7126         if (actual_link_speed != adapter->vf_rate_link_speed) {
7127                 reset_rate = true;
7128                 adapter->vf_rate_link_speed = 0;
7129                 dev_info(&adapter->pdev->dev,
7130                          "Link speed has been changed. VF Transmit "
7131                          "rate is disabled\n");
7132         }
7133
7134         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7135                 if (reset_rate)
7136                         adapter->vf_data[i].tx_rate = 0;
7137
7138                 igb_set_vf_rate_limit(&adapter->hw, i,
7139                                       adapter->vf_data[i].tx_rate,
7140                                       actual_link_speed);
7141         }
7142 }
7143
7144 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7145 {
7146         struct igb_adapter *adapter = netdev_priv(netdev);
7147         struct e1000_hw *hw = &adapter->hw;
7148         int actual_link_speed;
7149
7150         if (hw->mac.type != e1000_82576)
7151                 return -EOPNOTSUPP;
7152
7153         actual_link_speed = igb_link_mbps(adapter->link_speed);
7154         if ((vf >= adapter->vfs_allocated_count) ||
7155             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7156             (tx_rate < 0) || (tx_rate > actual_link_speed))
7157                 return -EINVAL;
7158
7159         adapter->vf_rate_link_speed = actual_link_speed;
7160         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7161         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7162
7163         return 0;
7164 }
7165
7166 static int igb_ndo_get_vf_config(struct net_device *netdev,
7167                                  int vf, struct ifla_vf_info *ivi)
7168 {
7169         struct igb_adapter *adapter = netdev_priv(netdev);
7170         if (vf >= adapter->vfs_allocated_count)
7171                 return -EINVAL;
7172         ivi->vf = vf;
7173         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7174         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7175         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7176         ivi->qos = adapter->vf_data[vf].pf_qos;
7177         return 0;
7178 }
7179
7180 static void igb_vmm_control(struct igb_adapter *adapter)
7181 {
7182         struct e1000_hw *hw = &adapter->hw;
7183         u32 reg;
7184
7185         switch (hw->mac.type) {
7186         case e1000_82575:
7187         case e1000_i210:
7188         case e1000_i211:
7189         default:
7190                 /* replication is not supported for 82575 */
7191                 return;
7192         case e1000_82576:
7193                 /* notify HW that the MAC is adding vlan tags */
7194                 reg = rd32(E1000_DTXCTL);
7195                 reg |= E1000_DTXCTL_VLAN_ADDED;
7196                 wr32(E1000_DTXCTL, reg);
7197         case e1000_82580:
7198                 /* enable replication vlan tag stripping */
7199                 reg = rd32(E1000_RPLOLR);
7200                 reg |= E1000_RPLOLR_STRVLAN;
7201                 wr32(E1000_RPLOLR, reg);
7202         case e1000_i350:
7203                 /* none of the above registers are supported by i350 */
7204                 break;
7205         }
7206
7207         if (adapter->vfs_allocated_count) {
7208                 igb_vmdq_set_loopback_pf(hw, true);
7209                 igb_vmdq_set_replication_pf(hw, true);
7210                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7211                                                 adapter->vfs_allocated_count);
7212         } else {
7213                 igb_vmdq_set_loopback_pf(hw, false);
7214                 igb_vmdq_set_replication_pf(hw, false);
7215         }
7216 }
7217
7218 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7219 {
7220         struct e1000_hw *hw = &adapter->hw;
7221         u32 dmac_thr;
7222         u16 hwm;
7223
7224         if (hw->mac.type > e1000_82580) {
7225                 if (adapter->flags & IGB_FLAG_DMAC) {
7226                         u32 reg;
7227
7228                         /* force threshold to 0. */
7229                         wr32(E1000_DMCTXTH, 0);
7230
7231                         /*
7232                          * DMA Coalescing high water mark needs to be greater
7233                          * than the Rx threshold. Set hwm to PBA - max frame
7234                          * size in 16B units, capping it at PBA - 6KB.
7235                          */
7236                         hwm = 64 * pba - adapter->max_frame_size / 16;
7237                         if (hwm < 64 * (pba - 6))
7238                                 hwm = 64 * (pba - 6);
7239                         reg = rd32(E1000_FCRTC);
7240                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7241                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7242                                 & E1000_FCRTC_RTH_COAL_MASK);
7243                         wr32(E1000_FCRTC, reg);
7244
7245                         /*
7246                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
7247                          * frame size, capping it at PBA - 10KB.
7248                          */
7249                         dmac_thr = pba - adapter->max_frame_size / 512;
7250                         if (dmac_thr < pba - 10)
7251                                 dmac_thr = pba - 10;
7252                         reg = rd32(E1000_DMACR);
7253                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7254                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7255                                 & E1000_DMACR_DMACTHR_MASK);
7256
7257                         /* transition to L0x or L1 if available..*/
7258                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7259
7260                         /* watchdog timer= +-1000 usec in 32usec intervals */
7261                         reg |= (1000 >> 5);
7262
7263                         /* Disable BMC-to-OS Watchdog Enable */
7264                         reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7265                         wr32(E1000_DMACR, reg);
7266
7267                         /*
7268                          * no lower threshold to disable
7269                          * coalescing(smart fifb)-UTRESH=0
7270                          */
7271                         wr32(E1000_DMCRTRH, 0);
7272
7273                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7274
7275                         wr32(E1000_DMCTLX, reg);
7276
7277                         /*
7278                          * free space in tx packet buffer to wake from
7279                          * DMA coal
7280                          */
7281                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7282                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7283
7284                         /*
7285                          * make low power state decision controlled
7286                          * by DMA coal
7287                          */
7288                         reg = rd32(E1000_PCIEMISC);
7289                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7290                         wr32(E1000_PCIEMISC, reg);
7291                 } /* endif adapter->dmac is not disabled */
7292         } else if (hw->mac.type == e1000_82580) {
7293                 u32 reg = rd32(E1000_PCIEMISC);
7294                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7295                 wr32(E1000_DMACR, 0);
7296         }
7297 }
7298
7299 /* igb_main.c */