1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2019, Intel Corporation. */
7 struct ice_orom_civd_info {
8 u8 signature[4]; /* Must match ASCII '$CIV' characters */
9 u8 checksum; /* Simple modulo 256 sum of all structure bytes must equal 0 */
10 __le32 combo_ver; /* Combo Image Version number */
11 u8 combo_name_len; /* Length of the unicode combo image version string, max of 32 */
12 __le16 combo_name[32]; /* Unicode string representing the Combo Image version */
15 int ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
16 void ice_release_nvm(struct ice_hw *hw);
18 ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
19 bool read_shadow_ram);
21 ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
23 int ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom);
24 int ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm);
26 ice_get_inactive_netlist_ver(struct ice_hw *hw, struct ice_netlist_info *netlist);
27 int ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
28 int ice_init_nvm(struct ice_hw *hw);
29 int ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
31 ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,
32 u16 length, void *data, bool last_command, u8 command_flags,
33 struct ice_sq_cd *cd);
35 ice_aq_erase_nvm(struct ice_hw *hw, u16 module_typeid, struct ice_sq_cd *cd);
36 int ice_nvm_validate_checksum(struct ice_hw *hw);
37 int ice_nvm_write_activate(struct ice_hw *hw, u16 cmd_flags, u8 *response_flags);
38 int ice_aq_nvm_update_empr(struct ice_hw *hw);
40 ice_nvm_set_pkg_data(struct ice_hw *hw, bool del_pkg_data_flag, u8 *data,
41 u16 length, struct ice_sq_cd *cd);
43 ice_nvm_pass_component_tbl(struct ice_hw *hw, u8 *data, u16 length,
44 u8 transfer_flag, u8 *comp_response,
45 u8 *comp_response_code, struct ice_sq_cd *cd);
46 #endif /* _ICE_NVM_H_ */