1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
9 #include "ice_dcb_lib.h"
10 #include "ice_devlink.h"
11 #include "ice_vsi_vlan_ops.h"
14 * ice_vsi_type_str - maps VSI type enum to string equivalents
15 * @vsi_type: VSI type enum
17 const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
25 return "ICE_VSI_CTRL";
27 return "ICE_VSI_CHNL";
30 case ICE_VSI_SWITCHDEV_CTRL:
31 return "ICE_VSI_SWITCHDEV_CTRL";
38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
39 * @vsi: the VSI being configured
40 * @ena: start or stop the Rx rings
42 * First enable/disable all of the Rx rings, flush any remaining writes, and
43 * then verify that they have all been enabled/disabled successfully. This will
44 * let all of the register writes complete when enabling/disabling the Rx rings
45 * before waiting for the change in hardware to complete.
47 static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
52 ice_for_each_rxq(vsi, i)
53 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false);
55 ice_flush(&vsi->back->hw);
57 ice_for_each_rxq(vsi, i) {
58 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i);
67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
70 * On error: returns error code (negative)
71 * On success: returns 0
73 static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
75 struct ice_pf *pf = vsi->back;
78 dev = ice_pf_to_dev(pf);
79 if (vsi->type == ICE_VSI_CHNL)
82 /* allocate memory for both Tx and Rx ring pointers */
83 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq,
84 sizeof(*vsi->tx_rings), GFP_KERNEL);
88 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq,
89 sizeof(*vsi->rx_rings), GFP_KERNEL);
93 /* txq_map needs to have enough space to track both Tx (stack) rings
94 * and XDP rings; at this point vsi->num_xdp_txq might not be set,
95 * so use num_possible_cpus() as we want to always provide XDP ring
96 * per CPU, regardless of queue count settings from user that might
97 * have come from ethtool's set_channels() callback;
99 vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()),
100 sizeof(*vsi->txq_map), GFP_KERNEL);
105 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq,
106 sizeof(*vsi->rxq_map), GFP_KERNEL);
110 /* There is no need to allocate q_vectors for a loopback VSI. */
111 if (vsi->type == ICE_VSI_LB)
114 /* allocate memory for q_vector pointers */
115 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors,
116 sizeof(*vsi->q_vectors), GFP_KERNEL);
120 vsi->af_xdp_zc_qps = bitmap_zalloc(max_t(int, vsi->alloc_txq, vsi->alloc_rxq), GFP_KERNEL);
121 if (!vsi->af_xdp_zc_qps)
127 devm_kfree(dev, vsi->q_vectors);
129 devm_kfree(dev, vsi->rxq_map);
131 devm_kfree(dev, vsi->txq_map);
133 devm_kfree(dev, vsi->rx_rings);
135 devm_kfree(dev, vsi->tx_rings);
140 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
141 * @vsi: the VSI being configured
143 static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
147 case ICE_VSI_SWITCHDEV_CTRL:
150 /* a user could change the values of num_[tr]x_desc using
151 * ethtool -G so we should keep those values instead of
152 * overwriting them with the defaults.
154 if (!vsi->num_rx_desc)
155 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
156 if (!vsi->num_tx_desc)
157 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
160 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
167 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
168 * @vsi: the VSI being configured
169 * @vf: the VF associated with this VSI, if any
171 * Return 0 on success and a negative value on error
173 static void ice_vsi_set_num_qs(struct ice_vsi *vsi, struct ice_vf *vf)
175 enum ice_vsi_type vsi_type = vsi->type;
176 struct ice_pf *pf = vsi->back;
178 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
184 vsi->alloc_txq = vsi->req_txq;
185 vsi->num_txq = vsi->req_txq;
187 vsi->alloc_txq = min3(pf->num_lan_msix,
188 ice_get_avail_txq_count(pf),
189 (u16)num_online_cpus());
192 pf->num_lan_tx = vsi->alloc_txq;
194 /* only 1 Rx queue unless RSS is enabled */
195 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
199 vsi->alloc_rxq = vsi->req_rxq;
200 vsi->num_rxq = vsi->req_rxq;
202 vsi->alloc_rxq = min3(pf->num_lan_msix,
203 ice_get_avail_rxq_count(pf),
204 (u16)num_online_cpus());
208 pf->num_lan_rx = vsi->alloc_rxq;
210 vsi->num_q_vectors = min_t(int, pf->num_lan_msix,
211 max_t(int, vsi->alloc_rxq,
214 case ICE_VSI_SWITCHDEV_CTRL:
215 /* The number of queues for ctrl VSI is equal to number of VFs.
216 * Each ring is associated to the corresponding VF_PR netdev.
218 vsi->alloc_txq = ice_get_num_vfs(pf);
219 vsi->alloc_rxq = vsi->alloc_txq;
220 vsi->num_q_vectors = 1;
224 vf->num_vf_qs = vf->num_req_qs;
225 vsi->alloc_txq = vf->num_vf_qs;
226 vsi->alloc_rxq = vf->num_vf_qs;
227 /* pf->vfs.num_msix_per includes (VF miscellaneous vector +
228 * data queue interrupts). Since vsi->num_q_vectors is number
229 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the
230 * original vector count
232 vsi->num_q_vectors = pf->vfs.num_msix_per - ICE_NONQ_VECS_VF;
237 vsi->num_q_vectors = 1;
248 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type);
252 ice_vsi_set_num_desc(vsi);
256 * ice_get_free_slot - get the next non-NULL location index in array
257 * @array: array to search
258 * @size: size of the array
259 * @curr: last known occupied index to be used as a search hint
261 * void * is being used to keep the functionality generic. This lets us use this
262 * function on any array of pointers.
264 static int ice_get_free_slot(void *array, int size, int curr)
266 int **tmp_array = (int **)array;
269 if (curr < (size - 1) && !tmp_array[curr + 1]) {
274 while ((i < size) && (tmp_array[i]))
285 * ice_vsi_delete - delete a VSI from the switch
286 * @vsi: pointer to VSI being removed
288 void ice_vsi_delete(struct ice_vsi *vsi)
290 struct ice_pf *pf = vsi->back;
291 struct ice_vsi_ctx *ctxt;
294 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
298 if (vsi->type == ICE_VSI_VF)
299 ctxt->vf_num = vsi->vf->vf_id;
300 ctxt->vsi_num = vsi->vsi_num;
302 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
304 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
306 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n",
307 vsi->vsi_num, status);
313 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI
314 * @vsi: pointer to VSI being cleared
316 static void ice_vsi_free_arrays(struct ice_vsi *vsi)
318 struct ice_pf *pf = vsi->back;
321 dev = ice_pf_to_dev(pf);
323 if (vsi->af_xdp_zc_qps) {
324 bitmap_free(vsi->af_xdp_zc_qps);
325 vsi->af_xdp_zc_qps = NULL;
327 /* free the ring and vector containers */
328 if (vsi->q_vectors) {
329 devm_kfree(dev, vsi->q_vectors);
330 vsi->q_vectors = NULL;
333 devm_kfree(dev, vsi->tx_rings);
334 vsi->tx_rings = NULL;
337 devm_kfree(dev, vsi->rx_rings);
338 vsi->rx_rings = NULL;
341 devm_kfree(dev, vsi->txq_map);
345 devm_kfree(dev, vsi->rxq_map);
351 * ice_vsi_clear - clean up and deallocate the provided VSI
352 * @vsi: pointer to VSI being cleared
354 * This deallocates the VSI's queue resources, removes it from the PF's
355 * VSI array if necessary, and deallocates the VSI
357 * Returns 0 on success, negative on failure
359 int ice_vsi_clear(struct ice_vsi *vsi)
361 struct ice_pf *pf = NULL;
371 dev = ice_pf_to_dev(pf);
373 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
374 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
378 mutex_lock(&pf->sw_mutex);
379 /* updates the PF for this cleared VSI */
381 pf->vsi[vsi->idx] = NULL;
382 if (vsi->idx < pf->next_vsi && vsi->type != ICE_VSI_CTRL)
383 pf->next_vsi = vsi->idx;
384 if (vsi->idx < pf->next_vsi && vsi->type == ICE_VSI_CTRL && vsi->vf)
385 pf->next_vsi = vsi->idx;
387 ice_vsi_free_arrays(vsi);
388 mutex_unlock(&pf->sw_mutex);
389 devm_kfree(dev, vsi);
395 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI
396 * @irq: interrupt number
397 * @data: pointer to a q_vector
399 static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
401 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
403 if (!q_vector->tx.tx_ring)
406 #define FDIR_RX_DESC_CLEAN_BUDGET 64
407 ice_clean_rx_irq(q_vector->rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET);
408 ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring);
414 * ice_msix_clean_rings - MSIX mode Interrupt Handler
415 * @irq: interrupt number
416 * @data: pointer to a q_vector
418 static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
420 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
422 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
425 q_vector->total_events++;
427 napi_schedule(&q_vector->napi);
432 static irqreturn_t ice_eswitch_msix_clean_rings(int __always_unused irq, void *data)
434 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
435 struct ice_pf *pf = q_vector->vsi->back;
439 if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
443 ice_for_each_vf_rcu(pf, bkt, vf)
444 napi_schedule(&vf->repr->q_vector->napi);
451 * ice_vsi_alloc - Allocates the next available struct VSI in the PF
452 * @pf: board private structure
453 * @vsi_type: type of VSI
454 * @ch: ptr to channel
455 * @vf: VF for ICE_VSI_VF and ICE_VSI_CTRL
457 * The VF pointer is used for ICE_VSI_VF and ICE_VSI_CTRL. For ICE_VSI_CTRL,
458 * it may be NULL in the case there is no association with a VF. For
459 * ICE_VSI_VF the VF pointer *must not* be NULL.
461 * returns a pointer to a VSI on success, NULL on failure.
463 static struct ice_vsi *
464 ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type vsi_type,
465 struct ice_channel *ch, struct ice_vf *vf)
467 struct device *dev = ice_pf_to_dev(pf);
468 struct ice_vsi *vsi = NULL;
470 if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
473 /* Need to protect the allocation of the VSIs at the PF level */
474 mutex_lock(&pf->sw_mutex);
476 /* If we have already allocated our maximum number of VSIs,
477 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
478 * is available to be populated
480 if (pf->next_vsi == ICE_NO_VSI) {
481 dev_dbg(dev, "out of VSI slots!\n");
485 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL);
489 vsi->type = vsi_type;
491 set_bit(ICE_VSI_DOWN, vsi->state);
493 if (vsi_type == ICE_VSI_VF)
494 ice_vsi_set_num_qs(vsi, vf);
495 else if (vsi_type != ICE_VSI_CHNL)
496 ice_vsi_set_num_qs(vsi, NULL);
499 case ICE_VSI_SWITCHDEV_CTRL:
500 if (ice_vsi_alloc_arrays(vsi))
503 /* Setup eswitch MSIX irq handler for VSI */
504 vsi->irq_handler = ice_eswitch_msix_clean_rings;
507 if (ice_vsi_alloc_arrays(vsi))
510 /* Setup default MSIX irq handler for VSI */
511 vsi->irq_handler = ice_msix_clean_rings;
514 if (ice_vsi_alloc_arrays(vsi))
517 /* Setup ctrl VSI MSIX irq handler */
518 vsi->irq_handler = ice_msix_clean_ctrl_vsi;
520 /* For the PF control VSI this is NULL, for the VF control VSI
521 * this will be the first VF to allocate it.
526 if (ice_vsi_alloc_arrays(vsi))
533 vsi->num_rxq = ch->num_rxq;
534 vsi->num_txq = ch->num_txq;
535 vsi->next_base_q = ch->base_q;
538 if (ice_vsi_alloc_arrays(vsi))
542 dev_warn(dev, "Unknown VSI type %d\n", vsi->type);
546 if (vsi->type == ICE_VSI_CTRL && !vf) {
547 /* Use the last VSI slot as the index for PF control VSI */
548 vsi->idx = pf->num_alloc_vsi - 1;
549 pf->ctrl_vsi_idx = vsi->idx;
550 pf->vsi[vsi->idx] = vsi;
552 /* fill slot and make note of the index */
553 vsi->idx = pf->next_vsi;
554 pf->vsi[pf->next_vsi] = vsi;
556 /* prepare pf->next_vsi for next use */
557 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
561 if (vsi->type == ICE_VSI_CTRL && vf)
562 vf->ctrl_vsi_idx = vsi->idx;
566 devm_kfree(dev, vsi);
569 mutex_unlock(&pf->sw_mutex);
574 * ice_alloc_fd_res - Allocate FD resource for a VSI
575 * @vsi: pointer to the ice_vsi
577 * This allocates the FD resources
579 * Returns 0 on success, -EPERM on no-op or -EIO on failure
581 static int ice_alloc_fd_res(struct ice_vsi *vsi)
583 struct ice_pf *pf = vsi->back;
586 /* Flow Director filters are only allocated/assigned to the PF VSI or
587 * CHNL VSI which passes the traffic. The CTRL VSI is only used to
588 * add/delete filters so resources are not allocated to it
590 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
593 if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF ||
594 vsi->type == ICE_VSI_CHNL))
597 /* FD filters from guaranteed pool per VSI */
598 g_val = pf->hw.func_caps.fd_fltr_guar;
602 /* FD filters from best effort pool */
603 b_val = pf->hw.func_caps.fd_fltr_best_effort;
607 /* PF main VSI gets only 64 FD resources from guaranteed pool
608 * when ADQ is configured.
610 #define ICE_PF_VSI_GFLTR 64
612 /* determine FD filter resources per VSI from shared(best effort) and
615 if (vsi->type == ICE_VSI_PF) {
616 vsi->num_gfltr = g_val;
617 /* if MQPRIO is configured, main VSI doesn't get all FD
618 * resources from guaranteed pool. PF VSI gets 64 FD resources
620 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) {
621 if (g_val < ICE_PF_VSI_GFLTR)
623 /* allow bare minimum entries for PF VSI */
624 vsi->num_gfltr = ICE_PF_VSI_GFLTR;
627 /* each VSI gets same "best_effort" quota */
628 vsi->num_bfltr = b_val;
629 } else if (vsi->type == ICE_VSI_VF) {
632 /* each VSI gets same "best_effort" quota */
633 vsi->num_bfltr = b_val;
635 struct ice_vsi *main_vsi;
638 main_vsi = ice_get_main_vsi(pf);
642 if (!main_vsi->all_numtc)
645 /* figure out ADQ numtc */
646 numtc = main_vsi->all_numtc - ICE_CHNL_START_TC;
648 /* only one TC but still asking resources for channels,
651 if (numtc < ICE_CHNL_START_TC)
654 g_val -= ICE_PF_VSI_GFLTR;
655 /* channel VSIs gets equal share from guaranteed pool */
656 vsi->num_gfltr = g_val / numtc;
658 /* each VSI gets same "best_effort" quota */
659 vsi->num_bfltr = b_val;
666 * ice_vsi_get_qs - Assign queues from PF to VSI
667 * @vsi: the VSI to assign queues to
669 * Returns 0 on success and a negative value on error
671 static int ice_vsi_get_qs(struct ice_vsi *vsi)
673 struct ice_pf *pf = vsi->back;
674 struct ice_qs_cfg tx_qs_cfg = {
675 .qs_mutex = &pf->avail_q_mutex,
676 .pf_map = pf->avail_txqs,
677 .pf_map_size = pf->max_pf_txqs,
678 .q_count = vsi->alloc_txq,
679 .scatter_count = ICE_MAX_SCATTER_TXQS,
680 .vsi_map = vsi->txq_map,
682 .mapping_mode = ICE_VSI_MAP_CONTIG
684 struct ice_qs_cfg rx_qs_cfg = {
685 .qs_mutex = &pf->avail_q_mutex,
686 .pf_map = pf->avail_rxqs,
687 .pf_map_size = pf->max_pf_rxqs,
688 .q_count = vsi->alloc_rxq,
689 .scatter_count = ICE_MAX_SCATTER_RXQS,
690 .vsi_map = vsi->rxq_map,
692 .mapping_mode = ICE_VSI_MAP_CONTIG
696 if (vsi->type == ICE_VSI_CHNL)
699 ret = __ice_vsi_get_qs(&tx_qs_cfg);
702 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
704 ret = __ice_vsi_get_qs(&rx_qs_cfg);
707 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
713 * ice_vsi_put_qs - Release queues from VSI to PF
714 * @vsi: the VSI that is going to release queues
716 static void ice_vsi_put_qs(struct ice_vsi *vsi)
718 struct ice_pf *pf = vsi->back;
721 mutex_lock(&pf->avail_q_mutex);
723 ice_for_each_alloc_txq(vsi, i) {
724 clear_bit(vsi->txq_map[i], pf->avail_txqs);
725 vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
728 ice_for_each_alloc_rxq(vsi, i) {
729 clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
730 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
733 mutex_unlock(&pf->avail_q_mutex);
738 * @pf: pointer to the PF struct
740 * returns true if driver is in safe mode, false otherwise
742 bool ice_is_safe_mode(struct ice_pf *pf)
744 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
749 * @pf: pointer to the PF struct
751 * returns true if RDMA is currently supported, false otherwise
753 bool ice_is_rdma_ena(struct ice_pf *pf)
755 return test_bit(ICE_FLAG_RDMA_ENA, pf->flags);
759 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration
760 * @vsi: the VSI being cleaned up
762 * This function deletes RSS input set for all flows that were configured
765 static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
767 struct ice_pf *pf = vsi->back;
770 if (ice_is_safe_mode(pf))
773 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx);
775 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n",
776 vsi->vsi_num, status);
780 * ice_rss_clean - Delete RSS related VSI structures and configuration
781 * @vsi: the VSI being removed
783 static void ice_rss_clean(struct ice_vsi *vsi)
785 struct ice_pf *pf = vsi->back;
788 dev = ice_pf_to_dev(pf);
790 if (vsi->rss_hkey_user)
791 devm_kfree(dev, vsi->rss_hkey_user);
792 if (vsi->rss_lut_user)
793 devm_kfree(dev, vsi->rss_lut_user);
795 ice_vsi_clean_rss_flow_fld(vsi);
796 /* remove RSS replay list */
797 if (!ice_is_safe_mode(pf))
798 ice_rem_vsi_rss_list(&pf->hw, vsi->idx);
802 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
803 * @vsi: the VSI being configured
805 static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
807 struct ice_hw_common_caps *cap;
808 struct ice_pf *pf = vsi->back;
810 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
815 cap = &pf->hw.func_caps.common_cap;
819 /* PF VSI will inherit RSS instance of PF */
820 vsi->rss_table_size = (u16)cap->rss_table_size;
821 if (vsi->type == ICE_VSI_CHNL)
822 vsi->rss_size = min_t(u16, vsi->num_rxq,
823 BIT(cap->rss_table_entry_width));
825 vsi->rss_size = min_t(u16, num_online_cpus(),
826 BIT(cap->rss_table_entry_width));
827 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
829 case ICE_VSI_SWITCHDEV_CTRL:
830 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
831 vsi->rss_size = min_t(u16, num_online_cpus(),
832 BIT(cap->rss_table_entry_width));
833 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
836 /* VF VSI will get a small RSS table.
837 * For VSI_LUT, LUT size should be set to 64 bytes.
839 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
840 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
841 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
846 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
847 ice_vsi_type_str(vsi->type));
853 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
854 * @hw: HW structure used to determine the VLAN mode of the device
855 * @ctxt: the VSI context being set
857 * This initializes a default VSI context for all sections except the Queues.
859 static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt)
863 memset(&ctxt->info, 0, sizeof(ctxt->info));
864 /* VSI's should be allocated from shared pool */
865 ctxt->alloc_from_pool = true;
866 /* Src pruning enabled by default */
867 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
868 /* Traffic from VSI can be sent to LAN */
869 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
870 /* allow all untagged/tagged packets by default on Tx */
871 ctxt->info.inner_vlan_flags = ((ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL &
872 ICE_AQ_VSI_INNER_VLAN_TX_MODE_M) >>
873 ICE_AQ_VSI_INNER_VLAN_TX_MODE_S);
874 /* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which
875 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor.
877 * DVM - leave inner VLAN in packet by default
879 if (ice_is_dvm_ena(hw)) {
880 ctxt->info.inner_vlan_flags |=
881 ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING;
882 ctxt->info.outer_vlan_flags =
883 (ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL <<
884 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S) &
885 ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M;
886 ctxt->info.outer_vlan_flags |=
887 (ICE_AQ_VSI_OUTER_TAG_VLAN_8100 <<
888 ICE_AQ_VSI_OUTER_TAG_TYPE_S) &
889 ICE_AQ_VSI_OUTER_TAG_TYPE_M;
890 ctxt->info.outer_vlan_flags |=
891 FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M,
892 ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING);
894 /* Have 1:1 UP mapping for both ingress/egress tables */
895 table |= ICE_UP_TABLE_TRANSLATE(0, 0);
896 table |= ICE_UP_TABLE_TRANSLATE(1, 1);
897 table |= ICE_UP_TABLE_TRANSLATE(2, 2);
898 table |= ICE_UP_TABLE_TRANSLATE(3, 3);
899 table |= ICE_UP_TABLE_TRANSLATE(4, 4);
900 table |= ICE_UP_TABLE_TRANSLATE(5, 5);
901 table |= ICE_UP_TABLE_TRANSLATE(6, 6);
902 table |= ICE_UP_TABLE_TRANSLATE(7, 7);
903 ctxt->info.ingress_table = cpu_to_le32(table);
904 ctxt->info.egress_table = cpu_to_le32(table);
905 /* Have 1:1 UP mapping for outer to inner UP table */
906 ctxt->info.outer_up_table = cpu_to_le32(table);
907 /* No Outer tag support outer_tag_flags remains to zero */
911 * ice_vsi_setup_q_map - Setup a VSI queue map
912 * @vsi: the VSI being configured
913 * @ctxt: VSI context structure
915 static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
917 u16 offset = 0, qmap = 0, tx_count = 0, pow = 0;
918 u16 num_txq_per_tc, num_rxq_per_tc;
919 u16 qcount_tx = vsi->alloc_txq;
920 u16 qcount_rx = vsi->alloc_rxq;
924 if (!vsi->tc_cfg.numtc) {
925 /* at least TC0 should be enabled by default */
926 vsi->tc_cfg.numtc = 1;
927 vsi->tc_cfg.ena_tc = 1;
930 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);
933 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;
937 /* find the (rounded up) power-of-2 of qcount */
938 pow = (u16)order_base_2(num_rxq_per_tc);
940 /* TC mapping is a function of the number of Rx queues assigned to the
941 * VSI for each traffic class and the offset of these queues.
942 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
943 * queues allocated to TC0. No:of queues is a power-of-2.
945 * If TC is not enabled, the queue offset is set to 0, and allocate one
946 * queue, this way, traffic for the given TC will be sent to the default
949 * Setup number and offset of Rx queues for all TCs for the VSI
951 ice_for_each_traffic_class(i) {
952 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
953 /* TC is not enabled */
954 vsi->tc_cfg.tc_info[i].qoffset = 0;
955 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
956 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
957 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
958 ctxt->info.tc_mapping[i] = 0;
963 vsi->tc_cfg.tc_info[i].qoffset = offset;
964 vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;
965 vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;
966 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
968 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
969 ICE_AQ_VSI_TC_Q_OFFSET_M) |
970 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
971 ICE_AQ_VSI_TC_Q_NUM_M);
972 offset += num_rxq_per_tc;
973 tx_count += num_txq_per_tc;
974 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
977 /* if offset is non-zero, means it is calculated correctly based on
978 * enabled TCs for a given VSI otherwise qcount_rx will always
979 * be correct and non-zero because it is based off - VSI's
980 * allocated Rx queues which is at least 1 (hence qcount_tx will be
984 vsi->num_rxq = offset;
986 vsi->num_rxq = num_rxq_per_tc;
988 if (vsi->num_rxq > vsi->alloc_rxq) {
989 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
990 vsi->num_rxq, vsi->alloc_rxq);
994 vsi->num_txq = tx_count;
995 if (vsi->num_txq > vsi->alloc_txq) {
996 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
997 vsi->num_txq, vsi->alloc_txq);
1001 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
1002 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
1003 /* since there is a chance that num_rxq could have been changed
1004 * in the above for loop, make num_txq equal to num_rxq.
1006 vsi->num_txq = vsi->num_rxq;
1009 /* Rx queue mapping */
1010 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1011 /* q_mapping buffer holds the info for the first queue allocated for
1012 * this VSI in the PF space and also the number of queues associated
1015 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
1016 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
1022 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI
1023 * @ctxt: the VSI context being set
1024 * @vsi: the VSI being configured
1026 static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1028 u8 dflt_q_group, dflt_q_prio;
1029 u16 dflt_q, report_q, val;
1031 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL &&
1032 vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL)
1035 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
1036 ctxt->info.valid_sections |= cpu_to_le16(val);
1042 /* enable flow director filtering/programming */
1043 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
1044 ctxt->info.fd_options = cpu_to_le16(val);
1045 /* max of allocated flow director filters */
1046 ctxt->info.max_fd_fltr_dedicated =
1047 cpu_to_le16(vsi->num_gfltr);
1048 /* max of shared flow director filters any VSI may program */
1049 ctxt->info.max_fd_fltr_shared =
1050 cpu_to_le16(vsi->num_bfltr);
1051 /* default queue index within the VSI of the default FD */
1052 val = ((dflt_q << ICE_AQ_VSI_FD_DEF_Q_S) &
1053 ICE_AQ_VSI_FD_DEF_Q_M);
1054 /* target queue or queue group to the FD filter */
1055 val |= ((dflt_q_group << ICE_AQ_VSI_FD_DEF_GRP_S) &
1056 ICE_AQ_VSI_FD_DEF_GRP_M);
1057 ctxt->info.fd_def_q = cpu_to_le16(val);
1058 /* queue index on which FD filter completion is reported */
1059 val = ((report_q << ICE_AQ_VSI_FD_REPORT_Q_S) &
1060 ICE_AQ_VSI_FD_REPORT_Q_M);
1061 /* priority of the default qindex action */
1062 val |= ((dflt_q_prio << ICE_AQ_VSI_FD_DEF_PRIORITY_S) &
1063 ICE_AQ_VSI_FD_DEF_PRIORITY_M);
1064 ctxt->info.fd_report_opt = cpu_to_le16(val);
1068 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
1069 * @ctxt: the VSI context being set
1070 * @vsi: the VSI being configured
1072 static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1074 u8 lut_type, hash_type;
1079 dev = ice_pf_to_dev(pf);
1081 switch (vsi->type) {
1084 /* PF VSI will inherit RSS instance of PF */
1085 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
1086 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1089 /* VF VSI will gets a small RSS table which is a VSI LUT type */
1090 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
1091 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1094 dev_dbg(dev, "Unsupported VSI type %s\n",
1095 ice_vsi_type_str(vsi->type));
1099 ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
1100 ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
1101 ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
1102 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
1106 ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1108 struct ice_pf *pf = vsi->back;
1113 qcount = min_t(int, vsi->num_rxq, pf->num_lan_msix);
1115 pow = order_base_2(qcount);
1116 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
1117 ICE_AQ_VSI_TC_Q_OFFSET_M) |
1118 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
1119 ICE_AQ_VSI_TC_Q_NUM_M);
1121 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1122 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1123 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q);
1124 ctxt->info.q_mapping[1] = cpu_to_le16(qcount);
1128 * ice_vsi_init - Create and initialize a VSI
1129 * @vsi: the VSI being configured
1130 * @init_vsi: is this call creating a VSI
1132 * This initializes a VSI context depending on the VSI type to be added and
1133 * passes it down to the add_vsi aq command to create a new VSI.
1135 static int ice_vsi_init(struct ice_vsi *vsi, bool init_vsi)
1137 struct ice_pf *pf = vsi->back;
1138 struct ice_hw *hw = &pf->hw;
1139 struct ice_vsi_ctx *ctxt;
1143 dev = ice_pf_to_dev(pf);
1144 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1148 switch (vsi->type) {
1152 ctxt->flags = ICE_AQ_VSI_TYPE_PF;
1154 case ICE_VSI_SWITCHDEV_CTRL:
1156 ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2;
1159 ctxt->flags = ICE_AQ_VSI_TYPE_VF;
1160 /* VF number here is the absolute VF number (0-255) */
1161 ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id;
1168 /* Handle VLAN pruning for channel VSI if main VSI has VLAN
1171 if (vsi->type == ICE_VSI_CHNL) {
1172 struct ice_vsi *main_vsi;
1174 main_vsi = ice_get_main_vsi(pf);
1175 if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi))
1176 ctxt->info.sw_flags2 |=
1177 ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1179 ctxt->info.sw_flags2 &=
1180 ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1183 ice_set_dflt_vsi_ctx(hw, ctxt);
1184 if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
1185 ice_set_fd_vsi_ctx(ctxt, vsi);
1186 /* if the switch is in VEB mode, allow VSI loopback */
1187 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
1188 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
1190 /* Set LUT type and HASH type if RSS is enabled */
1191 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
1192 vsi->type != ICE_VSI_CTRL) {
1193 ice_set_rss_vsi_ctx(ctxt, vsi);
1194 /* if updating VSI context, make sure to set valid_section:
1195 * to indicate which section of VSI context being updated
1198 ctxt->info.valid_sections |=
1199 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1202 ctxt->info.sw_id = vsi->port_info->sw_id;
1203 if (vsi->type == ICE_VSI_CHNL) {
1204 ice_chnl_vsi_setup_q_map(vsi, ctxt);
1206 ret = ice_vsi_setup_q_map(vsi, ctxt);
1210 if (!init_vsi) /* means VSI being updated */
1211 /* must to indicate which section of VSI context are
1214 ctxt->info.valid_sections |=
1215 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
1218 /* Allow control frames out of main VSI */
1219 if (vsi->type == ICE_VSI_PF) {
1220 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1221 ctxt->info.valid_sections |=
1222 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1226 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
1228 dev_err(dev, "Add VSI failed, err %d\n", ret);
1233 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1235 dev_err(dev, "Update VSI failed, err %d\n", ret);
1241 /* keep context for update VSI operations */
1242 vsi->info = ctxt->info;
1244 /* record VSI number returned */
1245 vsi->vsi_num = ctxt->vsi_num;
1253 * ice_free_res - free a block of resources
1254 * @res: pointer to the resource
1255 * @index: starting index previously returned by ice_get_res
1256 * @id: identifier to track owner
1258 * Returns number of resources freed
1260 int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
1265 if (!res || index >= res->end)
1268 id |= ICE_RES_VALID_BIT;
1269 for (i = index; i < res->end && res->list[i] == id; i++) {
1278 * ice_search_res - Search the tracker for a block of resources
1279 * @res: pointer to the resource
1280 * @needed: size of the block needed
1281 * @id: identifier to track owner
1283 * Returns the base item index of the block, or -ENOMEM for error
1285 static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
1287 u16 start = 0, end = 0;
1289 if (needed > res->end)
1292 id |= ICE_RES_VALID_BIT;
1295 /* skip already allocated entries */
1296 if (res->list[end++] & ICE_RES_VALID_BIT) {
1298 if ((start + needed) > res->end)
1302 if (end == (start + needed)) {
1305 /* there was enough, so assign it to the requestor */
1307 res->list[i++] = id;
1311 } while (end < res->end);
1317 * ice_get_free_res_count - Get free count from a resource tracker
1318 * @res: Resource tracker instance
1320 static u16 ice_get_free_res_count(struct ice_res_tracker *res)
1324 for (i = 0; i < res->end; i++)
1325 if (!(res->list[i] & ICE_RES_VALID_BIT))
1332 * ice_get_res - get a block of resources
1333 * @pf: board private structure
1334 * @res: pointer to the resource
1335 * @needed: size of the block needed
1336 * @id: identifier to track owner
1338 * Returns the base item index of the block, or negative for error
1341 ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
1346 if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
1347 dev_err(ice_pf_to_dev(pf), "param err: needed=%d, num_entries = %d id=0x%04x\n",
1348 needed, res->num_entries, id);
1352 return ice_search_res(res, needed, id);
1356 * ice_get_vf_ctrl_res - Get VF control VSI resource
1357 * @pf: pointer to the PF structure
1358 * @vsi: the VSI to allocate a resource for
1360 * Look up whether another VF has already allocated the control VSI resource.
1361 * If so, re-use this resource so that we share it among all VFs.
1363 * Otherwise, allocate the resource and return it.
1365 static int ice_get_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi)
1372 ice_for_each_vf_rcu(pf, bkt, vf) {
1373 if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) {
1374 base = pf->vsi[vf->ctrl_vsi_idx]->base_vector;
1381 return ice_get_res(pf, pf->irq_tracker, vsi->num_q_vectors,
1382 ICE_RES_VF_CTRL_VEC_ID);
1386 * ice_vsi_setup_vector_base - Set up the base vector for the given VSI
1387 * @vsi: ptr to the VSI
1389 * This should only be called after ice_vsi_alloc() which allocates the
1390 * corresponding SW VSI structure and initializes num_queue_pairs for the
1391 * newly allocated VSI.
1393 * Returns 0 on success or negative on failure
1395 static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
1397 struct ice_pf *pf = vsi->back;
1402 dev = ice_pf_to_dev(pf);
1403 /* SRIOV doesn't grab irq_tracker entries for each VSI */
1404 if (vsi->type == ICE_VSI_VF)
1406 if (vsi->type == ICE_VSI_CHNL)
1409 if (vsi->base_vector) {
1410 dev_dbg(dev, "VSI %d has non-zero base vector %d\n",
1411 vsi->vsi_num, vsi->base_vector);
1415 num_q_vectors = vsi->num_q_vectors;
1416 /* reserve slots from OS requested IRQs */
1417 if (vsi->type == ICE_VSI_CTRL && vsi->vf) {
1418 base = ice_get_vf_ctrl_res(pf, vsi);
1420 base = ice_get_res(pf, pf->irq_tracker, num_q_vectors,
1425 dev_err(dev, "%d MSI-X interrupts available. %s %d failed to get %d MSI-X vectors\n",
1426 ice_get_free_res_count(pf->irq_tracker),
1427 ice_vsi_type_str(vsi->type), vsi->idx, num_q_vectors);
1430 vsi->base_vector = (u16)base;
1431 pf->num_avail_sw_msix -= num_q_vectors;
1437 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1438 * @vsi: the VSI having rings deallocated
1440 static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1444 /* Avoid stale references by clearing map from vector to ring */
1445 if (vsi->q_vectors) {
1446 ice_for_each_q_vector(vsi, i) {
1447 struct ice_q_vector *q_vector = vsi->q_vectors[i];
1450 q_vector->tx.tx_ring = NULL;
1451 q_vector->rx.rx_ring = NULL;
1456 if (vsi->tx_rings) {
1457 ice_for_each_alloc_txq(vsi, i) {
1458 if (vsi->tx_rings[i]) {
1459 kfree_rcu(vsi->tx_rings[i], rcu);
1460 WRITE_ONCE(vsi->tx_rings[i], NULL);
1464 if (vsi->rx_rings) {
1465 ice_for_each_alloc_rxq(vsi, i) {
1466 if (vsi->rx_rings[i]) {
1467 kfree_rcu(vsi->rx_rings[i], rcu);
1468 WRITE_ONCE(vsi->rx_rings[i], NULL);
1475 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1476 * @vsi: VSI which is having rings allocated
1478 static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1480 bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw);
1481 struct ice_pf *pf = vsi->back;
1485 dev = ice_pf_to_dev(pf);
1486 /* Allocate Tx rings */
1487 ice_for_each_alloc_txq(vsi, i) {
1488 struct ice_tx_ring *ring;
1490 /* allocate with kzalloc(), free with kfree_rcu() */
1491 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1497 ring->reg_idx = vsi->txq_map[i];
1499 ring->tx_tstamps = &pf->ptp.port.tx;
1501 ring->count = vsi->num_tx_desc;
1502 ring->txq_teid = ICE_INVAL_TEID;
1504 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2;
1506 ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1;
1507 WRITE_ONCE(vsi->tx_rings[i], ring);
1510 /* Allocate Rx rings */
1511 ice_for_each_alloc_rxq(vsi, i) {
1512 struct ice_rx_ring *ring;
1514 /* allocate with kzalloc(), free with kfree_rcu() */
1515 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1520 ring->reg_idx = vsi->rxq_map[i];
1522 ring->netdev = vsi->netdev;
1524 ring->count = vsi->num_rx_desc;
1525 WRITE_ONCE(vsi->rx_rings[i], ring);
1531 ice_vsi_clear_rings(vsi);
1536 * ice_vsi_manage_rss_lut - disable/enable RSS
1537 * @vsi: the VSI being changed
1538 * @ena: boolean value indicating if this is an enable or disable request
1540 * In the event of disable request for RSS, this function will zero out RSS
1541 * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1544 void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1548 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1553 if (vsi->rss_lut_user)
1554 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1556 ice_fill_rss_lut(lut, vsi->rss_table_size,
1560 ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1565 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1566 * @vsi: VSI to be configured
1568 int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1570 struct ice_pf *pf = vsi->back;
1575 dev = ice_pf_to_dev(pf);
1576 if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size &&
1577 (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) {
1578 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size);
1580 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1582 /* If orig_rss_size is valid and it is less than determined
1583 * main VSI's rss_size, update main VSI's rss_size to be
1584 * orig_rss_size so that when tc-qdisc is deleted, main VSI
1585 * RSS table gets programmed to be correct (whatever it was
1586 * to begin with (prior to setup-tc for ADQ config)
1588 if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size &&
1589 vsi->orig_rss_size <= vsi->num_rxq) {
1590 vsi->rss_size = vsi->orig_rss_size;
1591 /* now orig_rss_size is used, reset it to zero */
1592 vsi->orig_rss_size = 0;
1596 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1600 if (vsi->rss_lut_user)
1601 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1603 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1605 err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1607 dev_err(dev, "set_rss_lut failed, error %d\n", err);
1608 goto ice_vsi_cfg_rss_exit;
1611 key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL);
1614 goto ice_vsi_cfg_rss_exit;
1617 if (vsi->rss_hkey_user)
1618 memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1620 netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1622 err = ice_set_rss_key(vsi, key);
1624 dev_err(dev, "set_rss_key failed, error %d\n", err);
1627 ice_vsi_cfg_rss_exit:
1633 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows
1634 * @vsi: VSI to be configured
1636 * This function will only be called during the VF VSI setup. Upon successful
1637 * completion of package download, this function will configure default RSS
1638 * input sets for VF VSI.
1640 static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1642 struct ice_pf *pf = vsi->back;
1646 dev = ice_pf_to_dev(pf);
1647 if (ice_is_safe_mode(pf)) {
1648 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1653 status = ice_add_avf_rss_cfg(&pf->hw, vsi->idx, ICE_DEFAULT_RSS_HENA);
1655 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",
1656 vsi->vsi_num, status);
1660 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows
1661 * @vsi: VSI to be configured
1663 * This function will only be called after successful download package call
1664 * during initialization of PF. Since the downloaded package will erase the
1665 * RSS section, this function will configure RSS input sets for different
1666 * flow types. The last profile added has the highest priority, therefore 2
1667 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles
1668 * (i.e. IPv4 src/dst TCP src/dst port).
1670 static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1672 u16 vsi_handle = vsi->idx, vsi_num = vsi->vsi_num;
1673 struct ice_pf *pf = vsi->back;
1674 struct ice_hw *hw = &pf->hw;
1678 dev = ice_pf_to_dev(pf);
1679 if (ice_is_safe_mode(pf)) {
1680 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1684 /* configure RSS for IPv4 with input set IP src/dst */
1685 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1686 ICE_FLOW_SEG_HDR_IPV4);
1688 dev_dbg(dev, "ice_add_rss_cfg failed for ipv4 flow, vsi = %d, error = %d\n",
1691 /* configure RSS for IPv6 with input set IPv6 src/dst */
1692 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1693 ICE_FLOW_SEG_HDR_IPV6);
1695 dev_dbg(dev, "ice_add_rss_cfg failed for ipv6 flow, vsi = %d, error = %d\n",
1698 /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1699 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV4,
1700 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1702 dev_dbg(dev, "ice_add_rss_cfg failed for tcp4 flow, vsi = %d, error = %d\n",
1705 /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1706 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV4,
1707 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1709 dev_dbg(dev, "ice_add_rss_cfg failed for udp4 flow, vsi = %d, error = %d\n",
1712 /* configure RSS for sctp4 with input set IP src/dst */
1713 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1714 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1716 dev_dbg(dev, "ice_add_rss_cfg failed for sctp4 flow, vsi = %d, error = %d\n",
1719 /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1720 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV6,
1721 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1723 dev_dbg(dev, "ice_add_rss_cfg failed for tcp6 flow, vsi = %d, error = %d\n",
1726 /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1727 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV6,
1728 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1730 dev_dbg(dev, "ice_add_rss_cfg failed for udp6 flow, vsi = %d, error = %d\n",
1733 /* configure RSS for sctp6 with input set IPv6 src/dst */
1734 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1735 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1737 dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n",
1740 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_ESP_SPI,
1741 ICE_FLOW_SEG_HDR_ESP);
1743 dev_dbg(dev, "ice_add_rss_cfg failed for esp/spi flow, vsi = %d, error = %d\n",
1748 * ice_pf_state_is_nominal - checks the PF for nominal state
1749 * @pf: pointer to PF to check
1751 * Check the PF's state for a collection of bits that would indicate
1752 * the PF is in a state that would inhibit normal operation for
1753 * driver functionality.
1755 * Returns true if PF is in a nominal state, false otherwise
1757 bool ice_pf_state_is_nominal(struct ice_pf *pf)
1759 DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 };
1764 bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS);
1765 if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS))
1772 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1773 * @vsi: the VSI to be updated
1775 void ice_update_eth_stats(struct ice_vsi *vsi)
1777 struct ice_eth_stats *prev_es, *cur_es;
1778 struct ice_hw *hw = &vsi->back->hw;
1779 u16 vsi_num = vsi->vsi_num; /* HW absolute index of a VSI */
1781 prev_es = &vsi->eth_stats_prev;
1782 cur_es = &vsi->eth_stats;
1784 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,
1785 &prev_es->rx_bytes, &cur_es->rx_bytes);
1787 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,
1788 &prev_es->rx_unicast, &cur_es->rx_unicast);
1790 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,
1791 &prev_es->rx_multicast, &cur_es->rx_multicast);
1793 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,
1794 &prev_es->rx_broadcast, &cur_es->rx_broadcast);
1796 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1797 &prev_es->rx_discards, &cur_es->rx_discards);
1799 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,
1800 &prev_es->tx_bytes, &cur_es->tx_bytes);
1802 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,
1803 &prev_es->tx_unicast, &cur_es->tx_unicast);
1805 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,
1806 &prev_es->tx_multicast, &cur_es->tx_multicast);
1808 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,
1809 &prev_es->tx_broadcast, &cur_es->tx_broadcast);
1811 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1812 &prev_es->tx_errors, &cur_es->tx_errors);
1814 vsi->stat_offsets_loaded = true;
1818 * ice_vsi_cfg_frame_size - setup max frame size and Rx buffer length
1821 void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)
1823 if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) {
1824 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1825 vsi->rx_buf_len = ICE_RXBUF_2048;
1826 #if (PAGE_SIZE < 8192)
1827 } else if (!ICE_2K_TOO_SMALL_WITH_PADDING &&
1828 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
1829 vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;
1830 vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;
1833 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1834 #if (PAGE_SIZE < 8192)
1835 vsi->rx_buf_len = ICE_RXBUF_3072;
1837 vsi->rx_buf_len = ICE_RXBUF_2048;
1843 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
1845 * @pf_q: index of the Rx queue in the PF's queue space
1846 * @rxdid: flexible descriptor RXDID
1847 * @prio: priority for the RXDID for this queue
1848 * @ena_ts: true to enable timestamp and false to disable timestamp
1851 ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,
1854 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1856 /* clear any previous values */
1857 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1858 QRXFLXP_CNTXT_RXDID_PRIO_M |
1859 QRXFLXP_CNTXT_TS_M);
1861 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
1862 QRXFLXP_CNTXT_RXDID_IDX_M;
1864 regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) &
1865 QRXFLXP_CNTXT_RXDID_PRIO_M;
1868 /* Enable TimeSync on this queue */
1869 regval |= QRXFLXP_CNTXT_TS_M;
1871 wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1874 int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx)
1876 if (q_idx >= vsi->num_rxq)
1879 return ice_vsi_cfg_rxq(vsi->rx_rings[q_idx]);
1882 int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings, u16 q_idx)
1884 struct ice_aqc_add_tx_qgrp *qg_buf;
1887 if (q_idx >= vsi->alloc_txq || !tx_rings || !tx_rings[q_idx])
1890 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1894 qg_buf->num_txqs = 1;
1896 err = ice_vsi_cfg_txq(vsi, tx_rings[q_idx], qg_buf);
1902 * ice_vsi_cfg_rxqs - Configure the VSI for Rx
1903 * @vsi: the VSI being configured
1905 * Return 0 on success and a negative value on error
1906 * Configure the Rx VSI for operation.
1908 int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1912 if (vsi->type == ICE_VSI_VF)
1915 ice_vsi_cfg_frame_size(vsi);
1917 /* set up individual rings */
1918 ice_for_each_rxq(vsi, i) {
1919 int err = ice_vsi_cfg_rxq(vsi->rx_rings[i]);
1929 * ice_vsi_cfg_txqs - Configure the VSI for Tx
1930 * @vsi: the VSI being configured
1931 * @rings: Tx ring array to be configured
1932 * @count: number of Tx ring array elements
1934 * Return 0 on success and a negative value on error
1935 * Configure the Tx VSI for operation.
1938 ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_tx_ring **rings, u16 count)
1940 struct ice_aqc_add_tx_qgrp *qg_buf;
1944 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1948 qg_buf->num_txqs = 1;
1950 for (q_idx = 0; q_idx < count; q_idx++) {
1951 err = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf);
1962 * ice_vsi_cfg_lan_txqs - Configure the VSI for Tx
1963 * @vsi: the VSI being configured
1965 * Return 0 on success and a negative value on error
1966 * Configure the Tx VSI for operation.
1968 int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)
1970 return ice_vsi_cfg_txqs(vsi, vsi->tx_rings, vsi->num_txq);
1974 * ice_vsi_cfg_xdp_txqs - Configure Tx queues dedicated for XDP in given VSI
1975 * @vsi: the VSI being configured
1977 * Return 0 on success and a negative value on error
1978 * Configure the Tx queues dedicated for XDP in given VSI for operation.
1980 int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi)
1985 ret = ice_vsi_cfg_txqs(vsi, vsi->xdp_rings, vsi->num_xdp_txq);
1989 ice_for_each_xdp_txq(vsi, i)
1990 vsi->xdp_rings[i]->xsk_pool = ice_tx_xsk_pool(vsi->xdp_rings[i]);
1996 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1997 * @intrl: interrupt rate limit in usecs
1998 * @gran: interrupt rate limit granularity in usecs
2000 * This function converts a decimal interrupt rate limit in usecs to the format
2001 * expected by firmware.
2003 static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
2005 u32 val = intrl / gran;
2008 return val | GLINT_RATE_INTRL_ENA_M;
2013 * ice_write_intrl - write throttle rate limit to interrupt specific register
2014 * @q_vector: pointer to interrupt specific structure
2015 * @intrl: throttle rate limit in microseconds to write
2017 void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl)
2019 struct ice_hw *hw = &q_vector->vsi->back->hw;
2021 wr32(hw, GLINT_RATE(q_vector->reg_idx),
2022 ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25));
2025 static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc)
2028 case ICE_RX_CONTAINER:
2030 return rc->rx_ring->q_vector;
2032 case ICE_TX_CONTAINER:
2034 return rc->tx_ring->q_vector;
2044 * __ice_write_itr - write throttle rate to register
2045 * @q_vector: pointer to interrupt data structure
2046 * @rc: pointer to ring container
2047 * @itr: throttle rate in microseconds to write
2049 static void __ice_write_itr(struct ice_q_vector *q_vector,
2050 struct ice_ring_container *rc, u16 itr)
2052 struct ice_hw *hw = &q_vector->vsi->back->hw;
2054 wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx),
2055 ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S);
2059 * ice_write_itr - write throttle rate to queue specific register
2060 * @rc: pointer to ring container
2061 * @itr: throttle rate in microseconds to write
2063 void ice_write_itr(struct ice_ring_container *rc, u16 itr)
2065 struct ice_q_vector *q_vector;
2067 q_vector = ice_pull_qvec_from_rc(rc);
2071 __ice_write_itr(q_vector, rc, itr);
2075 * ice_set_q_vector_intrl - set up interrupt rate limiting
2076 * @q_vector: the vector to be configured
2078 * Interrupt rate limiting is local to the vector, not per-queue so we must
2079 * detect if either ring container has dynamic moderation enabled to decide
2080 * what to set the interrupt rate limit to via INTRL settings. In the case that
2081 * dynamic moderation is disabled on both, write the value with the cached
2082 * setting to make sure INTRL register matches the user visible value.
2084 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector)
2086 if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) {
2087 /* in the case of dynamic enabled, cap each vector to no more
2088 * than (4 us) 250,000 ints/sec, which allows low latency
2089 * but still less than 500,000 interrupts per second, which
2090 * reduces CPU a bit in the case of the lowest latency
2091 * setting. The 4 here is a value in microseconds.
2093 ice_write_intrl(q_vector, 4);
2095 ice_write_intrl(q_vector, q_vector->intrl);
2100 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
2101 * @vsi: the VSI being configured
2103 * This configures MSIX mode interrupts for the PF VSI, and should not be used
2106 void ice_vsi_cfg_msix(struct ice_vsi *vsi)
2108 struct ice_pf *pf = vsi->back;
2109 struct ice_hw *hw = &pf->hw;
2110 u16 txq = 0, rxq = 0;
2113 ice_for_each_q_vector(vsi, i) {
2114 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2115 u16 reg_idx = q_vector->reg_idx;
2117 ice_cfg_itr(hw, q_vector);
2119 /* Both Transmit Queue Interrupt Cause Control register
2120 * and Receive Queue Interrupt Cause control register
2121 * expects MSIX_INDX field to be the vector index
2122 * within the function space and not the absolute
2123 * vector index across PF or across device.
2124 * For SR-IOV VF VSIs queue vector index always starts
2125 * with 1 since first vector index(0) is used for OICR
2126 * in VF space. Since VMDq and other PF VSIs are within
2127 * the PF function space, use the vector index that is
2128 * tracked for this PF.
2130 for (q = 0; q < q_vector->num_ring_tx; q++) {
2131 ice_cfg_txq_interrupt(vsi, txq, reg_idx,
2132 q_vector->tx.itr_idx);
2136 for (q = 0; q < q_vector->num_ring_rx; q++) {
2137 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx,
2138 q_vector->rx.itr_idx);
2145 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings
2146 * @vsi: the VSI whose rings are to be enabled
2148 * Returns 0 on success and a negative value on error
2150 int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
2152 return ice_vsi_ctrl_all_rx_rings(vsi, true);
2156 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings
2157 * @vsi: the VSI whose rings are to be disabled
2159 * Returns 0 on success and a negative value on error
2161 int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
2163 return ice_vsi_ctrl_all_rx_rings(vsi, false);
2167 * ice_vsi_stop_tx_rings - Disable Tx rings
2168 * @vsi: the VSI being configured
2169 * @rst_src: reset source
2170 * @rel_vmvf_num: Relative ID of VF/VM
2171 * @rings: Tx ring array to be stopped
2172 * @count: number of Tx ring array elements
2175 ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2176 u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count)
2180 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
2183 for (q_idx = 0; q_idx < count; q_idx++) {
2184 struct ice_txq_meta txq_meta = { };
2187 if (!rings || !rings[q_idx])
2190 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);
2191 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
2192 rings[q_idx], &txq_meta);
2202 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2203 * @vsi: the VSI being configured
2204 * @rst_src: reset source
2205 * @rel_vmvf_num: Relative ID of VF/VM
2208 ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2211 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq);
2215 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings
2216 * @vsi: the VSI being configured
2218 int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
2220 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq);
2224 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not
2225 * @vsi: VSI to check whether or not VLAN pruning is enabled.
2227 * returns true if Rx VLAN pruning is enabled and false otherwise.
2229 bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
2234 return (vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA);
2237 static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2239 if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
2240 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;
2241 vsi->tc_cfg.numtc = 1;
2245 /* set VSI TC information based on DCB config */
2246 ice_vsi_set_dcb_tc_cfg(vsi);
2250 * ice_vsi_set_q_vectors_reg_idx - set the HW register index for all q_vectors
2251 * @vsi: VSI to set the q_vectors register index on
2254 ice_vsi_set_q_vectors_reg_idx(struct ice_vsi *vsi)
2258 if (!vsi || !vsi->q_vectors)
2261 ice_for_each_q_vector(vsi, i) {
2262 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2265 dev_err(ice_pf_to_dev(vsi->back), "Failed to set reg_idx on q_vector %d VSI %d\n",
2270 if (vsi->type == ICE_VSI_VF) {
2271 struct ice_vf *vf = vsi->vf;
2273 q_vector->reg_idx = ice_calc_vf_reg_idx(vf, q_vector);
2276 q_vector->v_idx + vsi->base_vector;
2283 ice_for_each_q_vector(vsi, i) {
2284 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2287 q_vector->reg_idx = 0;
2294 * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling
2295 * @vsi: the VSI being configured
2296 * @tx: bool to determine Tx or Rx rule
2297 * @create: bool to determine create or remove Rule
2299 void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2301 int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2302 enum ice_sw_fwd_act_type act);
2303 struct ice_pf *pf = vsi->back;
2307 dev = ice_pf_to_dev(pf);
2308 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2311 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2314 if (ice_fw_supports_lldp_fltr_ctrl(&pf->hw)) {
2315 status = ice_lldp_fltr_add_remove(&pf->hw, vsi->vsi_num,
2318 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,
2324 dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n",
2325 create ? "adding" : "removing", tx ? "TX" : "RX",
2326 vsi->vsi_num, status);
2330 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it
2331 * @vsi: pointer to the VSI
2333 * This function will allocate new scheduler aggregator now if needed and will
2334 * move specified VSI into it.
2336 static void ice_set_agg_vsi(struct ice_vsi *vsi)
2338 struct device *dev = ice_pf_to_dev(vsi->back);
2339 struct ice_agg_node *agg_node_iter = NULL;
2340 u32 agg_id = ICE_INVALID_AGG_NODE_ID;
2341 struct ice_agg_node *agg_node = NULL;
2342 int node_offset, max_agg_nodes = 0;
2343 struct ice_port_info *port_info;
2344 struct ice_pf *pf = vsi->back;
2345 u32 agg_node_id_start = 0;
2348 /* create (as needed) scheduler aggregator node and move VSI into
2349 * corresponding aggregator node
2350 * - PF aggregator node to contains VSIs of type _PF and _CTRL
2351 * - VF aggregator nodes will contain VF VSI
2353 port_info = pf->hw.port_info;
2357 switch (vsi->type) {
2362 case ICE_VSI_SWITCHDEV_CTRL:
2363 max_agg_nodes = ICE_MAX_PF_AGG_NODES;
2364 agg_node_id_start = ICE_PF_AGG_NODE_ID_START;
2365 agg_node_iter = &pf->pf_agg_node[0];
2368 /* user can create 'n' VFs on a given PF, but since max children
2369 * per aggregator node can be only 64. Following code handles
2370 * aggregator(s) for VF VSIs, either selects a agg_node which
2371 * was already created provided num_vsis < 64, otherwise
2372 * select next available node, which will be created
2374 max_agg_nodes = ICE_MAX_VF_AGG_NODES;
2375 agg_node_id_start = ICE_VF_AGG_NODE_ID_START;
2376 agg_node_iter = &pf->vf_agg_node[0];
2379 /* other VSI type, handle later if needed */
2380 dev_dbg(dev, "unexpected VSI type %s\n",
2381 ice_vsi_type_str(vsi->type));
2385 /* find the appropriate aggregator node */
2386 for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) {
2387 /* see if we can find space in previously created
2388 * node if num_vsis < 64, otherwise skip
2390 if (agg_node_iter->num_vsis &&
2391 agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) {
2396 if (agg_node_iter->valid &&
2397 agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) {
2398 agg_id = agg_node_iter->agg_id;
2399 agg_node = agg_node_iter;
2403 /* find unclaimed agg_id */
2404 if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) {
2405 agg_id = node_offset + agg_node_id_start;
2406 agg_node = agg_node_iter;
2409 /* move to next agg_node */
2416 /* if selected aggregator node was not created, create it */
2417 if (!agg_node->valid) {
2418 status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG,
2419 (u8)vsi->tc_cfg.ena_tc);
2421 dev_err(dev, "unable to create aggregator node with agg_id %u\n",
2425 /* aggregator node is created, store the needed info */
2426 agg_node->valid = true;
2427 agg_node->agg_id = agg_id;
2430 /* move VSI to corresponding aggregator node */
2431 status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx,
2432 (u8)vsi->tc_cfg.ena_tc);
2434 dev_err(dev, "unable to move VSI idx %u into aggregator %u node",
2439 /* keep active children count for aggregator node */
2440 agg_node->num_vsis++;
2442 /* cache the 'agg_id' in VSI, so that after reset - VSI will be moved
2443 * to aggregator node
2445 vsi->agg_node = agg_node;
2446 dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n",
2447 vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,
2448 vsi->agg_node->num_vsis);
2452 * ice_vsi_setup - Set up a VSI by a given type
2453 * @pf: board private structure
2454 * @pi: pointer to the port_info instance
2455 * @vsi_type: VSI type
2456 * @vf: pointer to VF to which this VSI connects. This field is used primarily
2457 * for the ICE_VSI_VF type. Other VSI types should pass NULL.
2458 * @ch: ptr to channel
2460 * This allocates the sw VSI structure and its queue resources.
2462 * Returns pointer to the successfully allocated and configured VSI sw struct on
2463 * success, NULL on failure.
2466 ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
2467 enum ice_vsi_type vsi_type, struct ice_vf *vf,
2468 struct ice_channel *ch)
2470 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2471 struct device *dev = ice_pf_to_dev(pf);
2472 struct ice_vsi *vsi;
2475 if (vsi_type == ICE_VSI_CHNL)
2476 vsi = ice_vsi_alloc(pf, vsi_type, ch, NULL);
2477 else if (vsi_type == ICE_VSI_VF || vsi_type == ICE_VSI_CTRL)
2478 vsi = ice_vsi_alloc(pf, vsi_type, NULL, vf);
2480 vsi = ice_vsi_alloc(pf, vsi_type, NULL, NULL);
2483 dev_err(dev, "could not allocate VSI\n");
2487 vsi->port_info = pi;
2488 vsi->vsw = pf->first_sw;
2489 if (vsi->type == ICE_VSI_PF)
2490 vsi->ethtype = ETH_P_PAUSE;
2492 ice_alloc_fd_res(vsi);
2494 if (vsi_type != ICE_VSI_CHNL) {
2495 if (ice_vsi_get_qs(vsi)) {
2496 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2498 goto unroll_vsi_alloc;
2502 /* set RSS capabilities */
2503 ice_vsi_set_rss_params(vsi);
2505 /* set TC configuration */
2506 ice_vsi_set_tc_cfg(vsi);
2508 /* create the VSI */
2509 ret = ice_vsi_init(vsi, true);
2513 ice_vsi_init_vlan_ops(vsi);
2515 switch (vsi->type) {
2517 case ICE_VSI_SWITCHDEV_CTRL:
2519 ret = ice_vsi_alloc_q_vectors(vsi);
2521 goto unroll_vsi_init;
2523 ret = ice_vsi_setup_vector_base(vsi);
2525 goto unroll_alloc_q_vector;
2527 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2529 goto unroll_vector_base;
2531 ret = ice_vsi_alloc_rings(vsi);
2533 goto unroll_vector_base;
2535 ice_vsi_map_rings_to_vectors(vsi);
2537 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */
2538 if (vsi->type != ICE_VSI_CTRL)
2539 /* Do not exit if configuring RSS had an issue, at
2540 * least receive traffic on first queue. Hence no
2541 * need to capture return value
2543 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2544 ice_vsi_cfg_rss_lut_key(vsi);
2545 ice_vsi_set_rss_flow_fld(vsi);
2550 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2551 ice_vsi_cfg_rss_lut_key(vsi);
2552 ice_vsi_set_rss_flow_fld(vsi);
2556 /* VF driver will take care of creating netdev for this type and
2557 * map queues to vectors through Virtchnl, PF driver only
2558 * creates a VSI and corresponding structures for bookkeeping
2561 ret = ice_vsi_alloc_q_vectors(vsi);
2563 goto unroll_vsi_init;
2565 ret = ice_vsi_alloc_rings(vsi);
2567 goto unroll_alloc_q_vector;
2569 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2571 goto unroll_vector_base;
2573 /* Do not exit if configuring RSS had an issue, at least
2574 * receive traffic on first queue. Hence no need to capture
2577 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2578 ice_vsi_cfg_rss_lut_key(vsi);
2579 ice_vsi_set_vf_rss_flow_fld(vsi);
2583 ret = ice_vsi_alloc_rings(vsi);
2585 goto unroll_vsi_init;
2588 /* clean up the resources and exit */
2589 goto unroll_vsi_init;
2592 /* configure VSI nodes based on number of queues and TC's */
2593 ice_for_each_traffic_class(i) {
2594 if (!(vsi->tc_cfg.ena_tc & BIT(i)))
2597 if (vsi->type == ICE_VSI_CHNL) {
2598 if (!vsi->alloc_txq && vsi->num_txq)
2599 max_txqs[i] = vsi->num_txq;
2601 max_txqs[i] = pf->num_lan_tx;
2603 max_txqs[i] = vsi->alloc_txq;
2607 dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);
2608 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2611 dev_err(dev, "VSI %d failed lan queue config, error %d\n",
2613 goto unroll_clear_rings;
2616 /* Add switch rule to drop all Tx Flow Control Frames, of look up
2617 * type ETHERTYPE from VSIs, and restrict malicious VF from sending
2618 * out PAUSE or PFC frames. If enabled, FW can still send FC frames.
2619 * The rule is added once for PF VSI in order to create appropriate
2620 * recipe, since VSI/VSI list is ignored with drop action...
2621 * Also add rules to handle LLDP Tx packets. Tx LLDP packets need to
2622 * be dropped so that VFs cannot send LLDP packets to reconfig DCB
2623 * settings in the HW.
2625 if (!ice_is_safe_mode(pf))
2626 if (vsi->type == ICE_VSI_PF) {
2627 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2629 ice_cfg_sw_lldp(vsi, true, true);
2633 ice_set_agg_vsi(vsi);
2637 ice_vsi_clear_rings(vsi);
2639 /* reclaim SW interrupts back to the common pool */
2640 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2641 pf->num_avail_sw_msix += vsi->num_q_vectors;
2642 unroll_alloc_q_vector:
2643 ice_vsi_free_q_vectors(vsi);
2645 ice_vsi_delete(vsi);
2647 ice_vsi_put_qs(vsi);
2649 if (vsi_type == ICE_VSI_VF)
2650 ice_enable_lag(pf->lag);
2657 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2658 * @vsi: the VSI being cleaned up
2660 static void ice_vsi_release_msix(struct ice_vsi *vsi)
2662 struct ice_pf *pf = vsi->back;
2663 struct ice_hw *hw = &pf->hw;
2668 ice_for_each_q_vector(vsi, i) {
2669 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2671 ice_write_intrl(q_vector, 0);
2672 for (q = 0; q < q_vector->num_ring_tx; q++) {
2673 ice_write_itr(&q_vector->tx, 0);
2674 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2675 if (ice_is_xdp_ena_vsi(vsi)) {
2676 u32 xdp_txq = txq + vsi->num_xdp_txq;
2678 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2683 for (q = 0; q < q_vector->num_ring_rx; q++) {
2684 ice_write_itr(&q_vector->rx, 0);
2685 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2694 * ice_vsi_free_irq - Free the IRQ association with the OS
2695 * @vsi: the VSI being configured
2697 void ice_vsi_free_irq(struct ice_vsi *vsi)
2699 struct ice_pf *pf = vsi->back;
2700 int base = vsi->base_vector;
2703 if (!vsi->q_vectors || !vsi->irqs_ready)
2706 ice_vsi_release_msix(vsi);
2707 if (vsi->type == ICE_VSI_VF)
2710 vsi->irqs_ready = false;
2711 ice_free_cpu_rx_rmap(vsi);
2713 ice_for_each_q_vector(vsi, i) {
2714 u16 vector = i + base;
2717 irq_num = pf->msix_entries[vector].vector;
2719 /* free only the irqs that were actually requested */
2720 if (!vsi->q_vectors[i] ||
2721 !(vsi->q_vectors[i]->num_ring_tx ||
2722 vsi->q_vectors[i]->num_ring_rx))
2725 /* clear the affinity notifier in the IRQ descriptor */
2726 if (!IS_ENABLED(CONFIG_RFS_ACCEL))
2727 irq_set_affinity_notifier(irq_num, NULL);
2729 /* clear the affinity_mask in the IRQ descriptor */
2730 irq_set_affinity_hint(irq_num, NULL);
2731 synchronize_irq(irq_num);
2732 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]);
2737 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2738 * @vsi: the VSI having resources freed
2740 void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2747 ice_for_each_txq(vsi, i)
2748 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2749 ice_free_tx_ring(vsi->tx_rings[i]);
2753 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2754 * @vsi: the VSI having resources freed
2756 void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2763 ice_for_each_rxq(vsi, i)
2764 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2765 ice_free_rx_ring(vsi->rx_rings[i]);
2769 * ice_vsi_close - Shut down a VSI
2770 * @vsi: the VSI being shut down
2772 void ice_vsi_close(struct ice_vsi *vsi)
2774 if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state))
2777 ice_vsi_free_irq(vsi);
2778 ice_vsi_free_tx_rings(vsi);
2779 ice_vsi_free_rx_rings(vsi);
2783 * ice_ena_vsi - resume a VSI
2784 * @vsi: the VSI being resume
2785 * @locked: is the rtnl_lock already held
2787 int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2791 if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state))
2794 clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2796 if (vsi->netdev && vsi->type == ICE_VSI_PF) {
2797 if (netif_running(vsi->netdev)) {
2801 err = ice_open_internal(vsi->netdev);
2806 } else if (vsi->type == ICE_VSI_CTRL) {
2807 err = ice_vsi_open_ctrl(vsi);
2814 * ice_dis_vsi - pause a VSI
2815 * @vsi: the VSI being paused
2816 * @locked: is the rtnl_lock already held
2818 void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2820 if (test_bit(ICE_VSI_DOWN, vsi->state))
2823 set_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2825 if (vsi->type == ICE_VSI_PF && vsi->netdev) {
2826 if (netif_running(vsi->netdev)) {
2837 } else if (vsi->type == ICE_VSI_CTRL ||
2838 vsi->type == ICE_VSI_SWITCHDEV_CTRL) {
2844 * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI
2845 * @vsi: the VSI being un-configured
2847 void ice_vsi_dis_irq(struct ice_vsi *vsi)
2849 int base = vsi->base_vector;
2850 struct ice_pf *pf = vsi->back;
2851 struct ice_hw *hw = &pf->hw;
2855 /* disable interrupt causation from each queue */
2856 if (vsi->tx_rings) {
2857 ice_for_each_txq(vsi, i) {
2858 if (vsi->tx_rings[i]) {
2861 reg = vsi->tx_rings[i]->reg_idx;
2862 val = rd32(hw, QINT_TQCTL(reg));
2863 val &= ~QINT_TQCTL_CAUSE_ENA_M;
2864 wr32(hw, QINT_TQCTL(reg), val);
2869 if (vsi->rx_rings) {
2870 ice_for_each_rxq(vsi, i) {
2871 if (vsi->rx_rings[i]) {
2874 reg = vsi->rx_rings[i]->reg_idx;
2875 val = rd32(hw, QINT_RQCTL(reg));
2876 val &= ~QINT_RQCTL_CAUSE_ENA_M;
2877 wr32(hw, QINT_RQCTL(reg), val);
2882 /* disable each interrupt */
2883 ice_for_each_q_vector(vsi, i) {
2884 if (!vsi->q_vectors[i])
2886 wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0);
2891 /* don't call synchronize_irq() for VF's from the host */
2892 if (vsi->type == ICE_VSI_VF)
2895 ice_for_each_q_vector(vsi, i)
2896 synchronize_irq(pf->msix_entries[i + base].vector);
2900 * ice_napi_del - Remove NAPI handler for the VSI
2901 * @vsi: VSI for which NAPI handler is to be removed
2903 void ice_napi_del(struct ice_vsi *vsi)
2910 ice_for_each_q_vector(vsi, v_idx)
2911 netif_napi_del(&vsi->q_vectors[v_idx]->napi);
2915 * ice_free_vf_ctrl_res - Free the VF control VSI resource
2916 * @pf: pointer to PF structure
2917 * @vsi: the VSI to free resources for
2919 * Check if the VF control VSI resource is still in use. If no VF is using it
2920 * any more, release the VSI resource. Otherwise, leave it to be cleaned up
2921 * once no other VF uses it.
2923 static void ice_free_vf_ctrl_res(struct ice_pf *pf, struct ice_vsi *vsi)
2929 ice_for_each_vf_rcu(pf, bkt, vf) {
2930 if (vf != vsi->vf && vf->ctrl_vsi_idx != ICE_NO_VSI) {
2937 /* No other VFs left that have control VSI. It is now safe to reclaim
2938 * SW interrupts back to the common pool.
2940 ice_free_res(pf->irq_tracker, vsi->base_vector,
2941 ICE_RES_VF_CTRL_VEC_ID);
2942 pf->num_avail_sw_msix += vsi->num_q_vectors;
2946 * ice_vsi_release - Delete a VSI and free its resources
2947 * @vsi: the VSI being removed
2949 * Returns 0 on success or < 0 on error
2951 int ice_vsi_release(struct ice_vsi *vsi)
2960 /* do not unregister while driver is in the reset recovery pending
2961 * state. Since reset/rebuild happens through PF service task workqueue,
2962 * it's not a good idea to unregister netdev that is associated to the
2963 * PF that is running the work queue items currently. This is done to
2964 * avoid check_flush_dependency() warning on this wq
2966 if (vsi->netdev && !ice_is_reset_in_progress(pf->state) &&
2967 (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state))) {
2968 unregister_netdev(vsi->netdev);
2969 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
2972 if (vsi->type == ICE_VSI_PF)
2973 ice_devlink_destroy_pf_port(pf);
2975 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2978 /* Disable VSI and free resources */
2979 if (vsi->type != ICE_VSI_LB)
2980 ice_vsi_dis_irq(vsi);
2983 /* SR-IOV determines needed MSIX resources all at once instead of per
2984 * VSI since when VFs are spawned we know how many VFs there are and how
2985 * many interrupts each VF needs. SR-IOV MSIX resources are also
2986 * cleared in the same manner.
2988 if (vsi->type == ICE_VSI_CTRL && vsi->vf) {
2989 ice_free_vf_ctrl_res(pf, vsi);
2990 } else if (vsi->type != ICE_VSI_VF) {
2991 /* reclaim SW interrupts back to the common pool */
2992 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2993 pf->num_avail_sw_msix += vsi->num_q_vectors;
2996 if (!ice_is_safe_mode(pf)) {
2997 if (vsi->type == ICE_VSI_PF) {
2998 ice_fltr_remove_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
3000 ice_cfg_sw_lldp(vsi, true, false);
3001 /* The Rx rule will only exist to remove if the LLDP FW
3002 * engine is currently stopped
3004 if (!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags))
3005 ice_cfg_sw_lldp(vsi, false, false);
3009 if (ice_is_vsi_dflt_vsi(vsi))
3010 ice_clear_dflt_vsi(vsi);
3011 ice_fltr_remove_all(vsi);
3012 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3013 err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3015 dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3017 ice_vsi_delete(vsi);
3018 ice_vsi_free_q_vectors(vsi);
3021 if (test_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state)) {
3022 unregister_netdev(vsi->netdev);
3023 clear_bit(ICE_VSI_NETDEV_REGISTERED, vsi->state);
3025 if (test_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state)) {
3026 free_netdev(vsi->netdev);
3028 clear_bit(ICE_VSI_NETDEV_ALLOCD, vsi->state);
3032 if (vsi->type == ICE_VSI_VF &&
3033 vsi->agg_node && vsi->agg_node->valid)
3034 vsi->agg_node->num_vsis--;
3035 ice_vsi_clear_rings(vsi);
3037 ice_vsi_put_qs(vsi);
3039 /* retain SW VSI data structure since it is needed to unregister and
3040 * free VSI netdev when PF is not in reset recovery pending state,\
3041 * for ex: during rmmod.
3043 if (!ice_is_reset_in_progress(pf->state))
3050 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors
3051 * @vsi: VSI connected with q_vectors
3052 * @coalesce: array of struct with stored coalesce
3054 * Returns array size.
3057 ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
3058 struct ice_coalesce_stored *coalesce)
3062 ice_for_each_q_vector(vsi, i) {
3063 struct ice_q_vector *q_vector = vsi->q_vectors[i];
3065 coalesce[i].itr_tx = q_vector->tx.itr_settings;
3066 coalesce[i].itr_rx = q_vector->rx.itr_settings;
3067 coalesce[i].intrl = q_vector->intrl;
3069 if (i < vsi->num_txq)
3070 coalesce[i].tx_valid = true;
3071 if (i < vsi->num_rxq)
3072 coalesce[i].rx_valid = true;
3075 return vsi->num_q_vectors;
3079 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays
3080 * @vsi: VSI connected with q_vectors
3081 * @coalesce: pointer to array of struct with stored coalesce
3082 * @size: size of coalesce array
3084 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save
3085 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce
3089 ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
3090 struct ice_coalesce_stored *coalesce, int size)
3092 struct ice_ring_container *rc;
3095 if ((size && !coalesce) || !vsi)
3098 /* There are a couple of cases that have to be handled here:
3099 * 1. The case where the number of queue vectors stays the same, but
3100 * the number of Tx or Rx rings changes (the first for loop)
3101 * 2. The case where the number of queue vectors increased (the
3104 for (i = 0; i < size && i < vsi->num_q_vectors; i++) {
3105 /* There are 2 cases to handle here and they are the same for
3107 * if the entry was valid previously (coalesce[i].[tr]x_valid
3108 * and the loop variable is less than the number of rings
3109 * allocated, then write the previous values
3111 * if the entry was not valid previously, but the number of
3112 * rings is less than are allocated (this means the number of
3113 * rings increased from previously), then write out the
3114 * values in the first element
3116 * Also, always write the ITR, even if in ITR_IS_DYNAMIC
3117 * as there is no harm because the dynamic algorithm
3118 * will just overwrite.
3120 if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
3121 rc = &vsi->q_vectors[i]->rx;
3122 rc->itr_settings = coalesce[i].itr_rx;
3123 ice_write_itr(rc, rc->itr_setting);
3124 } else if (i < vsi->alloc_rxq) {
3125 rc = &vsi->q_vectors[i]->rx;
3126 rc->itr_settings = coalesce[0].itr_rx;
3127 ice_write_itr(rc, rc->itr_setting);
3130 if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
3131 rc = &vsi->q_vectors[i]->tx;
3132 rc->itr_settings = coalesce[i].itr_tx;
3133 ice_write_itr(rc, rc->itr_setting);
3134 } else if (i < vsi->alloc_txq) {
3135 rc = &vsi->q_vectors[i]->tx;
3136 rc->itr_settings = coalesce[0].itr_tx;
3137 ice_write_itr(rc, rc->itr_setting);
3140 vsi->q_vectors[i]->intrl = coalesce[i].intrl;
3141 ice_set_q_vector_intrl(vsi->q_vectors[i]);
3144 /* the number of queue vectors increased so write whatever is in
3147 for (; i < vsi->num_q_vectors; i++) {
3149 rc = &vsi->q_vectors[i]->tx;
3150 rc->itr_settings = coalesce[0].itr_tx;
3151 ice_write_itr(rc, rc->itr_setting);
3154 rc = &vsi->q_vectors[i]->rx;
3155 rc->itr_settings = coalesce[0].itr_rx;
3156 ice_write_itr(rc, rc->itr_setting);
3158 vsi->q_vectors[i]->intrl = coalesce[0].intrl;
3159 ice_set_q_vector_intrl(vsi->q_vectors[i]);
3164 * ice_vsi_rebuild - Rebuild VSI after reset
3165 * @vsi: VSI to be rebuild
3166 * @init_vsi: is this an initialization or a reconfigure of the VSI
3168 * Returns 0 on success and negative value on failure
3170 int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi)
3172 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3173 struct ice_coalesce_stored *coalesce;
3174 int prev_num_q_vectors = 0;
3175 enum ice_vsi_type vtype;
3184 if (WARN_ON(vtype == ICE_VSI_VF) && !vsi->vf)
3187 ice_vsi_init_vlan_ops(vsi);
3189 coalesce = kcalloc(vsi->num_q_vectors,
3190 sizeof(struct ice_coalesce_stored), GFP_KERNEL);
3194 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce);
3196 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
3197 ret = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
3199 dev_err(ice_pf_to_dev(vsi->back), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
3201 ice_vsi_free_q_vectors(vsi);
3203 /* SR-IOV determines needed MSIX resources all at once instead of per
3204 * VSI since when VFs are spawned we know how many VFs there are and how
3205 * many interrupts each VF needs. SR-IOV MSIX resources are also
3206 * cleared in the same manner.
3208 if (vtype != ICE_VSI_VF) {
3209 /* reclaim SW interrupts back to the common pool */
3210 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
3211 pf->num_avail_sw_msix += vsi->num_q_vectors;
3212 vsi->base_vector = 0;
3215 if (ice_is_xdp_ena_vsi(vsi))
3216 /* return value check can be skipped here, it always returns
3217 * 0 if reset is in progress
3219 ice_destroy_xdp_rings(vsi);
3220 ice_vsi_put_qs(vsi);
3221 ice_vsi_clear_rings(vsi);
3222 ice_vsi_free_arrays(vsi);
3223 if (vtype == ICE_VSI_VF)
3224 ice_vsi_set_num_qs(vsi, vsi->vf);
3226 ice_vsi_set_num_qs(vsi, NULL);
3228 ret = ice_vsi_alloc_arrays(vsi);
3232 ice_vsi_get_qs(vsi);
3234 ice_alloc_fd_res(vsi);
3235 ice_vsi_set_tc_cfg(vsi);
3237 /* Initialize VSI struct elements and create VSI in FW */
3238 ret = ice_vsi_init(vsi, init_vsi);
3244 case ICE_VSI_SWITCHDEV_CTRL:
3246 ret = ice_vsi_alloc_q_vectors(vsi);
3250 ret = ice_vsi_setup_vector_base(vsi);
3254 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3258 ret = ice_vsi_alloc_rings(vsi);
3262 ice_vsi_map_rings_to_vectors(vsi);
3263 if (ice_is_xdp_ena_vsi(vsi)) {
3264 ret = ice_vsi_determine_xdp_res(vsi);
3267 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog);
3271 /* ICE_VSI_CTRL does not need RSS so skip RSS processing */
3272 if (vtype != ICE_VSI_CTRL)
3273 /* Do not exit if configuring RSS had an issue, at
3274 * least receive traffic on first queue. Hence no
3275 * need to capture return value
3277 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
3278 ice_vsi_cfg_rss_lut_key(vsi);
3281 ret = ice_vsi_alloc_q_vectors(vsi);
3285 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
3289 ret = ice_vsi_alloc_rings(vsi);
3295 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
3296 ice_vsi_cfg_rss_lut_key(vsi);
3297 ice_vsi_set_rss_flow_fld(vsi);
3304 /* configure VSI nodes based on number of queues and TC's */
3305 for (i = 0; i < vsi->tc_cfg.numtc; i++) {
3306 /* configure VSI nodes based on number of queues and TC's.
3307 * ADQ creates VSIs for each TC/Channel but doesn't
3308 * allocate queues instead it reconfigures the PF queues
3309 * as per the TC command. So max_txqs should point to the
3312 if (vtype == ICE_VSI_CHNL)
3313 max_txqs[i] = pf->num_lan_tx;
3315 max_txqs[i] = vsi->alloc_txq;
3317 if (ice_is_xdp_ena_vsi(vsi))
3318 max_txqs[i] += vsi->num_xdp_txq;
3321 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3322 /* If MQPRIO is set, means channel code path, hence for main
3323 * VSI's, use TC as 1
3325 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3327 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3328 vsi->tc_cfg.ena_tc, max_txqs);
3331 dev_err(ice_pf_to_dev(pf), "VSI %d failed lan queue config, error %d\n",
3337 return ice_schedule_reset(pf, ICE_RESET_PFR);
3340 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors);
3346 ice_vsi_free_q_vectors(vsi);
3349 vsi->current_netdev_flags = 0;
3350 unregister_netdev(vsi->netdev);
3351 free_netdev(vsi->netdev);
3356 set_bit(ICE_RESET_FAILED, pf->state);
3362 * ice_is_reset_in_progress - check for a reset in progress
3363 * @state: PF state field
3365 bool ice_is_reset_in_progress(unsigned long *state)
3367 return test_bit(ICE_RESET_OICR_RECV, state) ||
3368 test_bit(ICE_PFR_REQ, state) ||
3369 test_bit(ICE_CORER_REQ, state) ||
3370 test_bit(ICE_GLOBR_REQ, state);
3374 * ice_wait_for_reset - Wait for driver to finish reset and rebuild
3375 * @pf: pointer to the PF structure
3376 * @timeout: length of time to wait, in jiffies
3378 * Wait (sleep) for a short time until the driver finishes cleaning up from
3379 * a device reset. The caller must be able to sleep. Use this to delay
3380 * operations that could fail while the driver is cleaning up after a device
3383 * Returns 0 on success, -EBUSY if the reset is not finished within the
3384 * timeout, and -ERESTARTSYS if the thread was interrupted.
3386 int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout)
3390 ret = wait_event_interruptible_timeout(pf->reset_wait_queue,
3391 !ice_is_reset_in_progress(pf->state),
3402 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map
3403 * @vsi: VSI being configured
3404 * @ctx: the context buffer returned from AQ VSI update command
3406 static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
3408 vsi->info.mapping_flags = ctx->info.mapping_flags;
3409 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
3410 sizeof(vsi->info.q_mapping));
3411 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
3412 sizeof(vsi->info.tc_mapping));
3416 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
3417 * @vsi: the VSI being configured
3418 * @ena_tc: TC map to be enabled
3420 void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
3422 struct net_device *netdev = vsi->netdev;
3423 struct ice_pf *pf = vsi->back;
3424 int numtc = vsi->tc_cfg.numtc;
3425 struct ice_dcbx_cfg *dcbcfg;
3432 /* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */
3433 if (vsi->type == ICE_VSI_CHNL)
3437 netdev_reset_tc(netdev);
3441 if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf))
3442 numtc = vsi->all_numtc;
3444 if (netdev_set_num_tc(netdev, numtc))
3447 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
3449 ice_for_each_traffic_class(i)
3450 if (vsi->tc_cfg.ena_tc & BIT(i))
3451 netdev_set_tc_queue(netdev,
3452 vsi->tc_cfg.tc_info[i].netdev_tc,
3453 vsi->tc_cfg.tc_info[i].qcount_tx,
3454 vsi->tc_cfg.tc_info[i].qoffset);
3455 /* setup TC queue map for CHNL TCs */
3456 ice_for_each_chnl_tc(i) {
3457 if (!(vsi->all_enatc & BIT(i)))
3459 if (!vsi->mqprio_qopt.qopt.count[i])
3461 netdev_set_tc_queue(netdev, i,
3462 vsi->mqprio_qopt.qopt.count[i],
3463 vsi->mqprio_qopt.qopt.offset[i]);
3466 if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3469 for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
3470 u8 ets_tc = dcbcfg->etscfg.prio_table[i];
3472 /* Get the mapped netdev TC# for the UP */
3473 netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
3474 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3479 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config
3480 * @vsi: the VSI being configured,
3481 * @ctxt: VSI context structure
3482 * @ena_tc: number of traffic classes to enable
3484 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
3487 ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt,
3490 u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap;
3491 u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0];
3492 int tc0_qcount = vsi->mqprio_qopt.qopt.count[0];
3496 vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;
3498 pow = order_base_2(tc0_qcount);
3499 qmap = ((tc0_offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
3500 ICE_AQ_VSI_TC_Q_OFFSET_M) |
3501 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) & ICE_AQ_VSI_TC_Q_NUM_M);
3503 ice_for_each_traffic_class(i) {
3504 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
3505 /* TC is not enabled */
3506 vsi->tc_cfg.tc_info[i].qoffset = 0;
3507 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
3508 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
3509 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
3510 ctxt->info.tc_mapping[i] = 0;
3514 offset = vsi->mqprio_qopt.qopt.offset[i];
3515 qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3516 qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3517 vsi->tc_cfg.tc_info[i].qoffset = offset;
3518 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
3519 vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;
3520 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
3523 if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {
3524 ice_for_each_chnl_tc(i) {
3525 if (!(vsi->all_enatc & BIT(i)))
3527 offset = vsi->mqprio_qopt.qopt.offset[i];
3528 qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3529 qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3533 /* Set actual Tx/Rx queue pairs */
3534 vsi->num_txq = offset + qcount_tx;
3535 if (vsi->num_txq > vsi->alloc_txq) {
3536 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
3537 vsi->num_txq, vsi->alloc_txq);
3541 vsi->num_rxq = offset + qcount_rx;
3542 if (vsi->num_rxq > vsi->alloc_rxq) {
3543 dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
3544 vsi->num_rxq, vsi->alloc_rxq);
3548 /* Setup queue TC[0].qmap for given VSI context */
3549 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
3550 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
3551 ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount);
3553 /* Find queue count available for channel VSIs and starting offset
3556 if (tc0_qcount && tc0_qcount < vsi->num_rxq) {
3557 vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount;
3558 vsi->next_base_q = tc0_qcount;
3560 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n", vsi->num_txq);
3561 dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n", vsi->num_rxq);
3562 dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n",
3563 vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);
3569 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
3570 * @vsi: VSI to be configured
3571 * @ena_tc: TC bitmap
3573 * VSI queues expected to be quiesced before calling this function
3575 int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
3577 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3578 struct ice_pf *pf = vsi->back;
3579 struct ice_vsi_ctx *ctx;
3584 dev = ice_pf_to_dev(pf);
3585 if (vsi->tc_cfg.ena_tc == ena_tc &&
3586 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
3589 ice_for_each_traffic_class(i) {
3590 /* build bitmap of enabled TCs */
3591 if (ena_tc & BIT(i))
3593 /* populate max_txqs per TC */
3594 max_txqs[i] = vsi->alloc_txq;
3595 /* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are
3596 * zero for CHNL VSI, hence use num_txq instead as max_txqs
3598 if (vsi->type == ICE_VSI_CHNL &&
3599 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3600 max_txqs[i] = vsi->num_txq;
3603 vsi->tc_cfg.ena_tc = ena_tc;
3604 vsi->tc_cfg.numtc = num_tc;
3606 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
3611 ctx->info = vsi->info;
3613 if (vsi->type == ICE_VSI_PF &&
3614 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3615 ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc);
3617 ret = ice_vsi_setup_q_map(vsi, ctx);
3622 /* must to indicate which section of VSI context are being modified */
3623 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3624 ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
3626 dev_info(dev, "Failed VSI Update\n");
3630 if (vsi->type == ICE_VSI_PF &&
3631 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3632 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3634 ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3635 vsi->tc_cfg.ena_tc, max_txqs);
3638 dev_err(dev, "VSI %d failed TC config, error %d\n",
3642 ice_vsi_update_q_map(vsi, ctx);
3643 vsi->info.valid_sections = 0;
3645 ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3652 * ice_update_ring_stats - Update ring statistics
3653 * @stats: stats to be updated
3654 * @pkts: number of processed packets
3655 * @bytes: number of processed bytes
3657 * This function assumes that caller has acquired a u64_stats_sync lock.
3659 static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes)
3661 stats->bytes += bytes;
3662 stats->pkts += pkts;
3666 * ice_update_tx_ring_stats - Update Tx ring specific counters
3667 * @tx_ring: ring to update
3668 * @pkts: number of processed packets
3669 * @bytes: number of processed bytes
3671 void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes)
3673 u64_stats_update_begin(&tx_ring->syncp);
3674 ice_update_ring_stats(&tx_ring->stats, pkts, bytes);
3675 u64_stats_update_end(&tx_ring->syncp);
3679 * ice_update_rx_ring_stats - Update Rx ring specific counters
3680 * @rx_ring: ring to update
3681 * @pkts: number of processed packets
3682 * @bytes: number of processed bytes
3684 void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes)
3686 u64_stats_update_begin(&rx_ring->syncp);
3687 ice_update_ring_stats(&rx_ring->stats, pkts, bytes);
3688 u64_stats_update_end(&rx_ring->syncp);
3692 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used
3693 * @pi: port info of the switch with default VSI
3695 * Return true if the there is a single VSI in default forwarding VSI list
3697 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi)
3699 bool exists = false;
3701 ice_check_if_dflt_vsi(pi, 0, &exists);
3706 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI
3707 * @vsi: VSI to compare against default forwarding VSI
3709 * If this VSI passed in is the default forwarding VSI then return true, else
3712 bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi)
3714 return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL);
3718 * ice_set_dflt_vsi - set the default forwarding VSI
3719 * @vsi: VSI getting set as the default forwarding VSI on the switch
3721 * If the VSI passed in is already the default VSI and it's enabled just return
3724 * Otherwise try to set the VSI passed in as the switch's default VSI and
3725 * return the result.
3727 int ice_set_dflt_vsi(struct ice_vsi *vsi)
3735 dev = ice_pf_to_dev(vsi->back);
3737 /* the VSI passed in is already the default VSI */
3738 if (ice_is_vsi_dflt_vsi(vsi)) {
3739 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3744 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX);
3746 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n",
3747 vsi->vsi_num, status);
3755 * ice_clear_dflt_vsi - clear the default forwarding VSI
3756 * @vsi: VSI to remove from filter list
3758 * If the switch has no default VSI or it's not enabled then return error.
3760 * Otherwise try to clear the default VSI and return the result.
3762 int ice_clear_dflt_vsi(struct ice_vsi *vsi)
3770 dev = ice_pf_to_dev(vsi->back);
3772 /* there is no default VSI configured */
3773 if (!ice_is_dflt_vsi_in_use(vsi->port_info))
3776 status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false,
3779 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n",
3780 vsi->vsi_num, status);
3788 * ice_get_link_speed_mbps - get link speed in Mbps
3789 * @vsi: the VSI whose link speed is being queried
3791 * Return current VSI link speed and 0 if the speed is unknown.
3793 int ice_get_link_speed_mbps(struct ice_vsi *vsi)
3795 switch (vsi->port_info->phy.link_info.link_speed) {
3796 case ICE_AQ_LINK_SPEED_100GB:
3797 return SPEED_100000;
3798 case ICE_AQ_LINK_SPEED_50GB:
3800 case ICE_AQ_LINK_SPEED_40GB:
3802 case ICE_AQ_LINK_SPEED_25GB:
3804 case ICE_AQ_LINK_SPEED_20GB:
3806 case ICE_AQ_LINK_SPEED_10GB:
3808 case ICE_AQ_LINK_SPEED_5GB:
3810 case ICE_AQ_LINK_SPEED_2500MB:
3812 case ICE_AQ_LINK_SPEED_1000MB:
3814 case ICE_AQ_LINK_SPEED_100MB:
3816 case ICE_AQ_LINK_SPEED_10MB:
3818 case ICE_AQ_LINK_SPEED_UNKNOWN:
3825 * ice_get_link_speed_kbps - get link speed in Kbps
3826 * @vsi: the VSI whose link speed is being queried
3828 * Return current VSI link speed and 0 if the speed is unknown.
3830 int ice_get_link_speed_kbps(struct ice_vsi *vsi)
3834 speed_mbps = ice_get_link_speed_mbps(vsi);
3836 return speed_mbps * 1000;
3840 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate
3841 * @vsi: VSI to be configured
3842 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit
3844 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit
3845 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI
3848 int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate)
3850 struct ice_pf *pf = vsi->back;
3855 dev = ice_pf_to_dev(pf);
3856 if (!vsi->port_info) {
3857 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3858 vsi->idx, vsi->type);
3862 speed = ice_get_link_speed_kbps(vsi);
3863 if (min_tx_rate > (u64)speed) {
3864 dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3865 min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3870 /* Configure min BW for VSI limit */
3872 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3873 ICE_MIN_BW, min_tx_rate);
3875 dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n",
3876 min_tx_rate, ice_vsi_type_str(vsi->type),
3881 dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n",
3882 min_tx_rate, ice_vsi_type_str(vsi->type));
3884 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3888 dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n",
3889 ice_vsi_type_str(vsi->type), vsi->idx);
3893 dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n",
3894 ice_vsi_type_str(vsi->type), vsi->idx);
3901 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate
3902 * @vsi: VSI to be configured
3903 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit
3905 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit
3906 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI
3909 int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate)
3911 struct ice_pf *pf = vsi->back;
3916 dev = ice_pf_to_dev(pf);
3917 if (!vsi->port_info) {
3918 dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3919 vsi->idx, vsi->type);
3923 speed = ice_get_link_speed_kbps(vsi);
3924 if (max_tx_rate > (u64)speed) {
3925 dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3926 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3931 /* Configure max BW for VSI limit */
3933 status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3934 ICE_MAX_BW, max_tx_rate);
3936 dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n",
3937 max_tx_rate, ice_vsi_type_str(vsi->type),
3942 dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n",
3943 max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx);
3945 status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3949 dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n",
3950 ice_vsi_type_str(vsi->type), vsi->idx);
3954 dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n",
3955 ice_vsi_type_str(vsi->type), vsi->idx);
3962 * ice_set_link - turn on/off physical link
3963 * @vsi: VSI to modify physical link on
3964 * @ena: turn on/off physical link
3966 int ice_set_link(struct ice_vsi *vsi, bool ena)
3968 struct device *dev = ice_pf_to_dev(vsi->back);
3969 struct ice_port_info *pi = vsi->port_info;
3970 struct ice_hw *hw = pi->hw;
3973 if (vsi->type != ICE_VSI_PF)
3976 status = ice_aq_set_link_restart_an(pi, ena, NULL);
3978 /* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE.
3979 * this is not a fatal error, so print a warning message and return
3980 * a success code. Return an error if FW returns an error code other
3981 * than ICE_AQ_RC_EMODE
3983 if (status == -EIO) {
3984 if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)
3985 dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",
3986 (ena ? "ON" : "OFF"), status,
3987 ice_aq_str(hw->adminq.sq_last_status));
3988 } else if (status) {
3989 dev_err(dev, "can't set link to %s, err %d aq_err %s\n",
3990 (ena ? "ON" : "OFF"), status,
3991 ice_aq_str(hw->adminq.sq_last_status));
3999 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI
4000 * @vsi: VSI used to add VLAN filters
4002 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based
4003 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't
4004 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via
4005 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID.
4007 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic
4008 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged
4009 * traffic in SVM, since the VLAN TPID isn't part of filtering.
4011 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be
4012 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is
4013 * part of filtering.
4015 int ice_vsi_add_vlan_zero(struct ice_vsi *vsi)
4017 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
4018 struct ice_vlan vlan;
4021 vlan = ICE_VLAN(0, 0, 0);
4022 err = vlan_ops->add_vlan(vsi, &vlan);
4023 if (err && err != -EEXIST)
4026 /* in SVM both VLAN 0 filters are identical */
4027 if (!ice_is_dvm_ena(&vsi->back->hw))
4030 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
4031 err = vlan_ops->add_vlan(vsi, &vlan);
4032 if (err && err != -EEXIST)
4039 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI
4040 * @vsi: VSI used to add VLAN filters
4042 * Delete the VLAN 0 filters in the same manner that they were added in
4043 * ice_vsi_add_vlan_zero.
4045 int ice_vsi_del_vlan_zero(struct ice_vsi *vsi)
4047 struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
4048 struct ice_vlan vlan;
4051 vlan = ICE_VLAN(0, 0, 0);
4052 err = vlan_ops->del_vlan(vsi, &vlan);
4053 if (err && err != -EEXIST)
4056 /* in SVM both VLAN 0 filters are identical */
4057 if (!ice_is_dvm_ena(&vsi->back->hw))
4060 vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
4061 err = vlan_ops->del_vlan(vsi, &vlan);
4062 if (err && err != -EEXIST)
4069 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode
4070 * @vsi: VSI used to get the VLAN mode
4072 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled
4073 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details.
4075 static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi)
4077 #define ICE_DVM_NUM_ZERO_VLAN_FLTRS 2
4078 #define ICE_SVM_NUM_ZERO_VLAN_FLTRS 1
4079 /* no VLAN 0 filter is created when a port VLAN is active */
4080 if (vsi->type == ICE_VSI_VF) {
4081 if (WARN_ON(!vsi->vf))
4084 if (ice_vf_is_port_vlan_ena(vsi->vf))
4088 if (ice_is_dvm_ena(&vsi->back->hw))
4089 return ICE_DVM_NUM_ZERO_VLAN_FLTRS;
4091 return ICE_SVM_NUM_ZERO_VLAN_FLTRS;
4095 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs
4096 * @vsi: VSI used to determine if any non-zero VLANs have been added
4098 bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi)
4100 return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi));
4104 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI
4105 * @vsi: VSI used to get the number of non-zero VLANs added
4107 u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi)
4109 return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi));
4113 * ice_is_feature_supported
4114 * @pf: pointer to the struct ice_pf instance
4115 * @f: feature enum to be checked
4117 * returns true if feature is supported, false otherwise
4119 bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f)
4121 if (f < 0 || f >= ICE_F_MAX)
4124 return test_bit(f, pf->features);
4128 * ice_set_feature_support
4129 * @pf: pointer to the struct ice_pf instance
4130 * @f: feature enum to set
4132 static void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f)
4134 if (f < 0 || f >= ICE_F_MAX)
4137 set_bit(f, pf->features);
4141 * ice_clear_feature_support
4142 * @pf: pointer to the struct ice_pf instance
4143 * @f: feature enum to clear
4145 void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f)
4147 if (f < 0 || f >= ICE_F_MAX)
4150 clear_bit(f, pf->features);
4154 * ice_init_feature_support
4155 * @pf: pointer to the struct ice_pf instance
4157 * called during init to setup supported feature
4159 void ice_init_feature_support(struct ice_pf *pf)
4161 switch (pf->hw.device_id) {
4162 case ICE_DEV_ID_E810C_BACKPLANE:
4163 case ICE_DEV_ID_E810C_QSFP:
4164 case ICE_DEV_ID_E810C_SFP:
4165 ice_set_feature_support(pf, ICE_F_DSCP);
4166 ice_set_feature_support(pf, ICE_F_PTP_EXTTS);
4167 if (ice_is_e810t(&pf->hw)) {
4168 ice_set_feature_support(pf, ICE_F_SMA_CTRL);
4169 if (ice_gnss_is_gps_present(&pf->hw))
4170 ice_set_feature_support(pf, ICE_F_GNSS);
4179 * ice_vsi_update_security - update security block in VSI
4180 * @vsi: pointer to VSI structure
4181 * @fill: function pointer to fill ctx
4184 ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))
4186 struct ice_vsi_ctx ctx = { 0 };
4188 ctx.info = vsi->info;
4189 ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
4192 if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL))
4195 vsi->info = ctx.info;
4200 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx
4201 * @ctx: pointer to VSI ctx structure
4203 void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx)
4205 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
4206 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4207 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4211 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx
4212 * @ctx: pointer to VSI ctx structure
4214 void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)
4216 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF &
4217 ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4218 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4222 * ice_vsi_ctx_set_allow_override - allow destination override on VSI
4223 * @ctx: pointer to VSI ctx structure
4225 void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx)
4227 ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
4231 * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI
4232 * @ctx: pointer to VSI ctx structure
4234 void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx)
4236 ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;