1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
4 /* Machine-generated file */
6 #ifndef _ICE_HW_AUTOGEN_H_
7 #define _ICE_HW_AUTOGEN_H_
9 #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4))
10 #define PF_FW_ARQBAH 0x00080180
11 #define PF_FW_ARQBAL 0x00080080
12 #define PF_FW_ARQH 0x00080380
13 #define PF_FW_ARQH_ARQH_M ICE_M(0x3FF, 0)
14 #define PF_FW_ARQLEN 0x00080280
15 #define PF_FW_ARQLEN_ARQLEN_M ICE_M(0x3FF, 0)
16 #define PF_FW_ARQLEN_ARQVFE_M BIT(28)
17 #define PF_FW_ARQLEN_ARQOVFL_M BIT(29)
18 #define PF_FW_ARQLEN_ARQCRIT_M BIT(30)
19 #define PF_FW_ARQLEN_ARQENABLE_M BIT(31)
20 #define PF_FW_ARQT 0x00080480
21 #define PF_FW_ATQBAH 0x00080100
22 #define PF_FW_ATQBAL 0x00080000
23 #define PF_FW_ATQH 0x00080300
24 #define PF_FW_ATQH_ATQH_M ICE_M(0x3FF, 0)
25 #define PF_FW_ATQLEN 0x00080200
26 #define PF_FW_ATQLEN_ATQLEN_M ICE_M(0x3FF, 0)
27 #define PF_FW_ATQLEN_ATQVFE_M BIT(28)
28 #define PF_FW_ATQLEN_ATQOVFL_M BIT(29)
29 #define PF_FW_ATQLEN_ATQCRIT_M BIT(30)
30 #define PF_FW_ATQLEN_ATQENABLE_M BIT(31)
31 #define PF_FW_ATQT 0x00080400
32 #define PF_MBX_ARQBAH 0x0022E400
33 #define PF_MBX_ARQBAL 0x0022E380
34 #define PF_MBX_ARQH 0x0022E500
35 #define PF_MBX_ARQH_ARQH_M ICE_M(0x3FF, 0)
36 #define PF_MBX_ARQLEN 0x0022E480
37 #define PF_MBX_ARQLEN_ARQLEN_M ICE_M(0x3FF, 0)
38 #define PF_MBX_ARQLEN_ARQENABLE_M BIT(31)
39 #define PF_MBX_ARQT 0x0022E580
40 #define PF_MBX_ATQBAH 0x0022E180
41 #define PF_MBX_ATQBAL 0x0022E100
42 #define PF_MBX_ATQH 0x0022E280
43 #define PF_MBX_ATQH_ATQH_M ICE_M(0x3FF, 0)
44 #define PF_MBX_ATQLEN 0x0022E200
45 #define PF_MBX_ATQLEN_ATQLEN_M ICE_M(0x3FF, 0)
46 #define PF_MBX_ATQLEN_ATQENABLE_M BIT(31)
47 #define PF_MBX_ATQT 0x0022E300
48 #define GLFLXP_RXDID_FLAGS(_i, _j) (0x0045D000 + ((_i) * 4 + (_j) * 256))
49 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S 0
50 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M ICE_M(0x3F, 0)
51 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S 8
52 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M ICE_M(0x3F, 8)
53 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S 16
54 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M ICE_M(0x3F, 16)
55 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S 24
56 #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M ICE_M(0x3F, 24)
57 #define GLFLXP_RXDID_FLX_WRD_0(_i) (0x0045c800 + ((_i) * 4))
58 #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_S 0
59 #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_M ICE_M(0xFF, 0)
60 #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_S 30
61 #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_M ICE_M(0x3, 30)
62 #define GLFLXP_RXDID_FLX_WRD_1(_i) (0x0045c900 + ((_i) * 4))
63 #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_S 0
64 #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_M ICE_M(0xFF, 0)
65 #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_S 30
66 #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_M ICE_M(0x3, 30)
67 #define GLFLXP_RXDID_FLX_WRD_2(_i) (0x0045ca00 + ((_i) * 4))
68 #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_S 0
69 #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_M ICE_M(0xFF, 0)
70 #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_S 30
71 #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_M ICE_M(0x3, 30)
72 #define GLFLXP_RXDID_FLX_WRD_3(_i) (0x0045cb00 + ((_i) * 4))
73 #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_S 0
74 #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_M ICE_M(0xFF, 0)
75 #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_S 30
76 #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_M ICE_M(0x3, 30)
77 #define QRXFLXP_CNTXT(_QRX) (0x00480000 + ((_QRX) * 4))
78 #define QRXFLXP_CNTXT_RXDID_IDX_S 0
79 #define QRXFLXP_CNTXT_RXDID_IDX_M ICE_M(0x3F, 0)
80 #define QRXFLXP_CNTXT_RXDID_PRIO_S 8
81 #define QRXFLXP_CNTXT_RXDID_PRIO_M ICE_M(0x7, 8)
82 #define GLGEN_RSTAT 0x000B8188
83 #define GLGEN_RSTAT_DEVSTATE_M ICE_M(0x3, 0)
84 #define GLGEN_RSTCTL 0x000B8180
85 #define GLGEN_RSTCTL_GRSTDEL_S 0
86 #define GLGEN_RSTCTL_GRSTDEL_M ICE_M(0x3F, GLGEN_RSTCTL_GRSTDEL_S)
87 #define GLGEN_RSTAT_RESET_TYPE_S 2
88 #define GLGEN_RSTAT_RESET_TYPE_M ICE_M(0x3, 2)
89 #define GLGEN_RTRIG 0x000B8190
90 #define GLGEN_RTRIG_CORER_M BIT(0)
91 #define GLGEN_RTRIG_GLOBR_M BIT(1)
92 #define GLGEN_STAT 0x000B612C
93 #define GLGEN_VFLRSTAT(_i) (0x00093A04 + ((_i) * 4))
94 #define PFGEN_CTRL 0x00091000
95 #define PFGEN_CTRL_PFSWR_M BIT(0)
96 #define PFGEN_STATE 0x00088000
97 #define PRTGEN_STATUS 0x000B8100
98 #define VFGEN_RSTAT(_VF) (0x00074000 + ((_VF) * 4))
99 #define VPGEN_VFRSTAT(_VF) (0x00090800 + ((_VF) * 4))
100 #define VPGEN_VFRSTAT_VFRD_M BIT(0)
101 #define VPGEN_VFRTRIG(_VF) (0x00090000 + ((_VF) * 4))
102 #define VPGEN_VFRTRIG_VFSWR_M BIT(0)
103 #define PFHMC_ERRORDATA 0x00520500
104 #define PFHMC_ERRORINFO 0x00520400
105 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4))
106 #define GLINT_DYN_CTL_INTENA_M BIT(0)
107 #define GLINT_DYN_CTL_CLEARPBA_M BIT(1)
108 #define GLINT_DYN_CTL_SWINT_TRIG_M BIT(2)
109 #define GLINT_DYN_CTL_ITR_INDX_S 3
110 #define GLINT_DYN_CTL_SW_ITR_INDX_M ICE_M(0x3, 25)
111 #define GLINT_DYN_CTL_INTENA_MSK_M BIT(31)
112 #define GLINT_ITR(_i, _INT) (0x00154000 + ((_i) * 8192 + (_INT) * 4))
113 #define GLINT_RATE(_INT) (0x0015A000 + ((_INT) * 4))
114 #define GLINT_RATE_INTRL_ENA_M BIT(6)
115 #define GLINT_VECT2FUNC(_INT) (0x00162000 + ((_INT) * 4))
116 #define GLINT_VECT2FUNC_VF_NUM_S 0
117 #define GLINT_VECT2FUNC_VF_NUM_M ICE_M(0xFF, 0)
118 #define GLINT_VECT2FUNC_PF_NUM_S 12
119 #define GLINT_VECT2FUNC_PF_NUM_M ICE_M(0x7, 12)
120 #define GLINT_VECT2FUNC_IS_PF_S 16
121 #define GLINT_VECT2FUNC_IS_PF_M BIT(16)
122 #define PFINT_FW_CTL 0x0016C800
123 #define PFINT_FW_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
124 #define PFINT_FW_CTL_ITR_INDX_S 11
125 #define PFINT_FW_CTL_ITR_INDX_M ICE_M(0x3, 11)
126 #define PFINT_FW_CTL_CAUSE_ENA_M BIT(30)
127 #define PFINT_MBX_CTL 0x0016B280
128 #define PFINT_MBX_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
129 #define PFINT_MBX_CTL_ITR_INDX_S 11
130 #define PFINT_MBX_CTL_ITR_INDX_M ICE_M(0x3, 11)
131 #define PFINT_MBX_CTL_CAUSE_ENA_M BIT(30)
132 #define PFINT_OICR 0x0016CA00
133 #define PFINT_OICR_ECC_ERR_M BIT(16)
134 #define PFINT_OICR_MAL_DETECT_M BIT(19)
135 #define PFINT_OICR_GRST_M BIT(20)
136 #define PFINT_OICR_PCI_EXCEPTION_M BIT(21)
137 #define PFINT_OICR_HMC_ERR_M BIT(26)
138 #define PFINT_OICR_PE_CRITERR_M BIT(28)
139 #define PFINT_OICR_CTL 0x0016CA80
140 #define PFINT_OICR_CTL_MSIX_INDX_M ICE_M(0x7FF, 0)
141 #define PFINT_OICR_CTL_ITR_INDX_S 11
142 #define PFINT_OICR_CTL_ITR_INDX_M ICE_M(0x3, 11)
143 #define PFINT_OICR_CTL_CAUSE_ENA_M BIT(30)
144 #define PFINT_OICR_ENA 0x0016C900
145 #define QINT_RQCTL(_QRX) (0x00150000 + ((_QRX) * 4))
146 #define QINT_RQCTL_MSIX_INDX_S 0
147 #define QINT_RQCTL_ITR_INDX_S 11
148 #define QINT_RQCTL_CAUSE_ENA_M BIT(30)
149 #define QINT_TQCTL(_DBQM) (0x00140000 + ((_DBQM) * 4))
150 #define QINT_TQCTL_MSIX_INDX_S 0
151 #define QINT_TQCTL_ITR_INDX_S 11
152 #define QINT_TQCTL_CAUSE_ENA_M BIT(30)
153 #define VPINT_ALLOC(_VF) (0x001D1000 + ((_VF) * 4))
154 #define VPINT_ALLOC_FIRST_S 0
155 #define VPINT_ALLOC_FIRST_M ICE_M(0x7FF, 0)
156 #define VPINT_ALLOC_LAST_S 12
157 #define VPINT_ALLOC_LAST_M ICE_M(0x7FF, 12)
158 #define VPINT_ALLOC_VALID_M BIT(31)
159 #define QRX_CONTEXT(_i, _QRX) (0x00280000 + ((_i) * 8192 + (_QRX) * 4))
160 #define QRX_CTRL(_QRX) (0x00120000 + ((_QRX) * 4))
161 #define QRX_CTRL_MAX_INDEX 2047
162 #define QRX_CTRL_QENA_REQ_S 0
163 #define QRX_CTRL_QENA_REQ_M BIT(0)
164 #define QRX_CTRL_QENA_STAT_S 2
165 #define QRX_CTRL_QENA_STAT_M BIT(2)
166 #define QRX_ITR(_QRX) (0x00292000 + ((_QRX) * 4))
167 #define QRX_TAIL(_QRX) (0x00290000 + ((_QRX) * 4))
168 #define QRX_TAIL_MAX_INDEX 2047
169 #define QRX_TAIL_TAIL_S 0
170 #define QRX_TAIL_TAIL_M ICE_M(0x1FFF, 0)
171 #define VPLAN_RX_QBASE(_VF) (0x00072000 + ((_VF) * 4))
172 #define VPLAN_RX_QBASE_VFFIRSTQ_S 0
173 #define VPLAN_RX_QBASE_VFFIRSTQ_M ICE_M(0x7FF, 0)
174 #define VPLAN_RX_QBASE_VFNUMQ_S 16
175 #define VPLAN_RX_QBASE_VFNUMQ_M ICE_M(0xFF, 16)
176 #define VPLAN_RXQ_MAPENA(_VF) (0x00073000 + ((_VF) * 4))
177 #define VPLAN_RXQ_MAPENA_RX_ENA_M BIT(0)
178 #define VPLAN_TX_QBASE(_VF) (0x001D1800 + ((_VF) * 4))
179 #define VPLAN_TX_QBASE_VFFIRSTQ_S 0
180 #define VPLAN_TX_QBASE_VFFIRSTQ_M ICE_M(0x3FFF, 0)
181 #define VPLAN_TX_QBASE_VFNUMQ_S 16
182 #define VPLAN_TX_QBASE_VFNUMQ_M ICE_M(0xFF, 16)
183 #define VPLAN_TXQ_MAPENA(_VF) (0x00073800 + ((_VF) * 4))
184 #define VPLAN_TXQ_MAPENA_TX_ENA_M BIT(0)
185 #define GL_MDET_RX 0x00294C00
186 #define GL_MDET_RX_QNUM_S 0
187 #define GL_MDET_RX_QNUM_M ICE_M(0x7FFF, 0)
188 #define GL_MDET_RX_VF_NUM_S 15
189 #define GL_MDET_RX_VF_NUM_M ICE_M(0xFF, 15)
190 #define GL_MDET_RX_PF_NUM_S 23
191 #define GL_MDET_RX_PF_NUM_M ICE_M(0x7, 23)
192 #define GL_MDET_RX_MAL_TYPE_S 26
193 #define GL_MDET_RX_MAL_TYPE_M ICE_M(0x1F, 26)
194 #define GL_MDET_RX_VALID_M BIT(31)
195 #define GL_MDET_TX_PQM 0x002D2E00
196 #define GL_MDET_TX_PQM_PF_NUM_S 0
197 #define GL_MDET_TX_PQM_PF_NUM_M ICE_M(0x7, 0)
198 #define GL_MDET_TX_PQM_VF_NUM_S 4
199 #define GL_MDET_TX_PQM_VF_NUM_M ICE_M(0xFF, 4)
200 #define GL_MDET_TX_PQM_QNUM_S 12
201 #define GL_MDET_TX_PQM_QNUM_M ICE_M(0x3FFF, 12)
202 #define GL_MDET_TX_PQM_MAL_TYPE_S 26
203 #define GL_MDET_TX_PQM_MAL_TYPE_M ICE_M(0x1F, 26)
204 #define GL_MDET_TX_PQM_VALID_M BIT(31)
205 #define GL_MDET_TX_TCLAN 0x000FC068
206 #define GL_MDET_TX_TCLAN_QNUM_S 0
207 #define GL_MDET_TX_TCLAN_QNUM_M ICE_M(0x7FFF, 0)
208 #define GL_MDET_TX_TCLAN_VF_NUM_S 15
209 #define GL_MDET_TX_TCLAN_VF_NUM_M ICE_M(0xFF, 15)
210 #define GL_MDET_TX_TCLAN_PF_NUM_S 23
211 #define GL_MDET_TX_TCLAN_PF_NUM_M ICE_M(0x7, 23)
212 #define GL_MDET_TX_TCLAN_MAL_TYPE_S 26
213 #define GL_MDET_TX_TCLAN_MAL_TYPE_M ICE_M(0x1F, 26)
214 #define GL_MDET_TX_TCLAN_VALID_M BIT(31)
215 #define PF_MDET_RX 0x00294280
216 #define PF_MDET_RX_VALID_M BIT(0)
217 #define PF_MDET_TX_PQM 0x002D2C80
218 #define PF_MDET_TX_PQM_VALID_M BIT(0)
219 #define PF_MDET_TX_TCLAN 0x000FC000
220 #define PF_MDET_TX_TCLAN_VALID_M BIT(0)
221 #define GLNVM_FLA 0x000B6108
222 #define GLNVM_FLA_LOCKED_M BIT(6)
223 #define GLNVM_GENS 0x000B6100
224 #define GLNVM_GENS_SR_SIZE_S 5
225 #define GLNVM_GENS_SR_SIZE_M ICE_M(0x7, 5)
226 #define GLNVM_ULD 0x000B6008
227 #define GLNVM_ULD_CORER_DONE_M BIT(3)
228 #define GLNVM_ULD_GLOBR_DONE_M BIT(4)
229 #define PF_FUNC_RID 0x0009E880
230 #define PF_FUNC_RID_FUNC_NUM_S 0
231 #define PF_FUNC_RID_FUNC_NUM_M ICE_M(0x7, 0)
232 #define PF_PCI_CIAA 0x0009E580
233 #define PF_PCI_CIAA_VF_NUM_S 12
234 #define PF_PCI_CIAD 0x0009E500
235 #define GL_PWR_MODE_CTL 0x000B820C
236 #define GL_PWR_MODE_CTL_CAR_MAX_BW_S 30
237 #define GL_PWR_MODE_CTL_CAR_MAX_BW_M ICE_M(0x3, 30)
238 #define GLPRT_BPRCH(_i) (0x00381384 + ((_i) * 8))
239 #define GLPRT_BPRCL(_i) (0x00381380 + ((_i) * 8))
240 #define GLPRT_BPTCH(_i) (0x00381244 + ((_i) * 8))
241 #define GLPRT_BPTCL(_i) (0x00381240 + ((_i) * 8))
242 #define GLPRT_CRCERRS(_i) (0x00380100 + ((_i) * 8))
243 #define GLPRT_GORCH(_i) (0x00380004 + ((_i) * 8))
244 #define GLPRT_GORCL(_i) (0x00380000 + ((_i) * 8))
245 #define GLPRT_GOTCH(_i) (0x00380B44 + ((_i) * 8))
246 #define GLPRT_GOTCL(_i) (0x00380B40 + ((_i) * 8))
247 #define GLPRT_ILLERRC(_i) (0x003801C0 + ((_i) * 8))
248 #define GLPRT_LXOFFRXC(_i) (0x003802C0 + ((_i) * 8))
249 #define GLPRT_LXOFFTXC(_i) (0x00381180 + ((_i) * 8))
250 #define GLPRT_LXONRXC(_i) (0x00380280 + ((_i) * 8))
251 #define GLPRT_LXONTXC(_i) (0x00381140 + ((_i) * 8))
252 #define GLPRT_MLFC(_i) (0x00380040 + ((_i) * 8))
253 #define GLPRT_MPRCH(_i) (0x00381344 + ((_i) * 8))
254 #define GLPRT_MPRCL(_i) (0x00381340 + ((_i) * 8))
255 #define GLPRT_MPTCH(_i) (0x00381204 + ((_i) * 8))
256 #define GLPRT_MPTCL(_i) (0x00381200 + ((_i) * 8))
257 #define GLPRT_MRFC(_i) (0x00380080 + ((_i) * 8))
258 #define GLPRT_PRC1023H(_i) (0x00380A04 + ((_i) * 8))
259 #define GLPRT_PRC1023L(_i) (0x00380A00 + ((_i) * 8))
260 #define GLPRT_PRC127H(_i) (0x00380944 + ((_i) * 8))
261 #define GLPRT_PRC127L(_i) (0x00380940 + ((_i) * 8))
262 #define GLPRT_PRC1522H(_i) (0x00380A44 + ((_i) * 8))
263 #define GLPRT_PRC1522L(_i) (0x00380A40 + ((_i) * 8))
264 #define GLPRT_PRC255H(_i) (0x00380984 + ((_i) * 8))
265 #define GLPRT_PRC255L(_i) (0x00380980 + ((_i) * 8))
266 #define GLPRT_PRC511H(_i) (0x003809C4 + ((_i) * 8))
267 #define GLPRT_PRC511L(_i) (0x003809C0 + ((_i) * 8))
268 #define GLPRT_PRC64H(_i) (0x00380904 + ((_i) * 8))
269 #define GLPRT_PRC64L(_i) (0x00380900 + ((_i) * 8))
270 #define GLPRT_PRC9522H(_i) (0x00380A84 + ((_i) * 8))
271 #define GLPRT_PRC9522L(_i) (0x00380A80 + ((_i) * 8))
272 #define GLPRT_PTC1023H(_i) (0x00380C84 + ((_i) * 8))
273 #define GLPRT_PTC1023L(_i) (0x00380C80 + ((_i) * 8))
274 #define GLPRT_PTC127H(_i) (0x00380BC4 + ((_i) * 8))
275 #define GLPRT_PTC127L(_i) (0x00380BC0 + ((_i) * 8))
276 #define GLPRT_PTC1522H(_i) (0x00380CC4 + ((_i) * 8))
277 #define GLPRT_PTC1522L(_i) (0x00380CC0 + ((_i) * 8))
278 #define GLPRT_PTC255H(_i) (0x00380C04 + ((_i) * 8))
279 #define GLPRT_PTC255L(_i) (0x00380C00 + ((_i) * 8))
280 #define GLPRT_PTC511H(_i) (0x00380C44 + ((_i) * 8))
281 #define GLPRT_PTC511L(_i) (0x00380C40 + ((_i) * 8))
282 #define GLPRT_PTC64H(_i) (0x00380B84 + ((_i) * 8))
283 #define GLPRT_PTC64L(_i) (0x00380B80 + ((_i) * 8))
284 #define GLPRT_PTC9522H(_i) (0x00380D04 + ((_i) * 8))
285 #define GLPRT_PTC9522L(_i) (0x00380D00 + ((_i) * 8))
286 #define GLPRT_RFC(_i) (0x00380AC0 + ((_i) * 8))
287 #define GLPRT_RJC(_i) (0x00380B00 + ((_i) * 8))
288 #define GLPRT_RLEC(_i) (0x00380140 + ((_i) * 8))
289 #define GLPRT_ROC(_i) (0x00380240 + ((_i) * 8))
290 #define GLPRT_RUC(_i) (0x00380200 + ((_i) * 8))
291 #define GLPRT_TDOLD(_i) (0x00381280 + ((_i) * 8))
292 #define GLPRT_UPRCH(_i) (0x00381304 + ((_i) * 8))
293 #define GLPRT_UPRCL(_i) (0x00381300 + ((_i) * 8))
294 #define GLPRT_UPTCH(_i) (0x003811C4 + ((_i) * 8))
295 #define GLPRT_UPTCL(_i) (0x003811C0 + ((_i) * 8))
296 #define GLV_BPRCH(_i) (0x003B6004 + ((_i) * 8))
297 #define GLV_BPRCL(_i) (0x003B6000 + ((_i) * 8))
298 #define GLV_BPTCH(_i) (0x0030E004 + ((_i) * 8))
299 #define GLV_BPTCL(_i) (0x0030E000 + ((_i) * 8))
300 #define GLV_GORCH(_i) (0x003B0004 + ((_i) * 8))
301 #define GLV_GORCL(_i) (0x003B0000 + ((_i) * 8))
302 #define GLV_GOTCH(_i) (0x00300004 + ((_i) * 8))
303 #define GLV_GOTCL(_i) (0x00300000 + ((_i) * 8))
304 #define GLV_MPRCH(_i) (0x003B4004 + ((_i) * 8))
305 #define GLV_MPRCL(_i) (0x003B4000 + ((_i) * 8))
306 #define GLV_MPTCH(_i) (0x0030C004 + ((_i) * 8))
307 #define GLV_MPTCL(_i) (0x0030C000 + ((_i) * 8))
308 #define GLV_RDPC(_i) (0x00294C04 + ((_i) * 4))
309 #define GLV_TEPC(_VSI) (0x00312000 + ((_VSI) * 4))
310 #define GLV_UPRCH(_i) (0x003B2004 + ((_i) * 8))
311 #define GLV_UPRCL(_i) (0x003B2000 + ((_i) * 8))
312 #define GLV_UPTCH(_i) (0x0030A004 + ((_i) * 8))
313 #define GLV_UPTCL(_i) (0x0030A000 + ((_i) * 8))
314 #define VSIQF_HKEY_MAX_INDEX 12
315 #define VSIQF_HLUT_MAX_INDEX 15
316 #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4))
317 #define VFINT_DYN_CTLN_CLEARPBA_M BIT(1)
319 #endif /* _ICE_HW_AUTOGEN_H_ */