drivers/net/ethernet/intel/ice/ice_flow.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (c) 2019, Intel Corporation. */
   3
   4 #ifndef _ICE_FLOW_H_
   5 #define _ICE_FLOW_H_
   6
   7 #include "ice_flex_type.h"
   8
   9 #define ICE_FLOW_ENTRY_HANDLE_INVAL     0
  10 #define ICE_FLOW_FLD_OFF_INVAL          0xffff
  11
  12 /* Generate flow hash field from flow field type(s) */
  13 #define ICE_FLOW_HASH_ETH       \
  14         (BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_DA) | \
  15          BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_SA))
  16 #define ICE_FLOW_HASH_IPV4      \
  17         (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \
  18          BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA))
  19 #define ICE_FLOW_HASH_IPV6      \
  20         (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
  21          BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
  22 #define ICE_FLOW_HASH_TCP_PORT  \
  23         (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
  24          BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
  25 #define ICE_FLOW_HASH_UDP_PORT  \
  26         (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \
  27          BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT))
  28 #define ICE_FLOW_HASH_SCTP_PORT \
  29         (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \
  30          BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT))
  31
  32 #define ICE_HASH_INVALID        0
  33 #define ICE_HASH_TCP_IPV4       (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT)
  34 #define ICE_HASH_TCP_IPV6       (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT)
  35 #define ICE_HASH_UDP_IPV4       (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT)
  36 #define ICE_HASH_UDP_IPV6       (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT)
  37 #define ICE_HASH_SCTP_IPV4      (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)
  38 #define ICE_HASH_SCTP_IPV6      (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)
  39
  40 #define ICE_FLOW_HASH_GTP_TEID \
  41         (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID))
  42
  43 #define ICE_FLOW_HASH_GTP_IPV4_TEID \
  44         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_TEID)
  45 #define ICE_FLOW_HASH_GTP_IPV6_TEID \
  46         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_TEID)
  47
  48 #define ICE_FLOW_HASH_GTP_U_TEID \
  49         (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID))
  50
  51 #define ICE_FLOW_HASH_GTP_U_IPV4_TEID \
  52         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_TEID)
  53 #define ICE_FLOW_HASH_GTP_U_IPV6_TEID \
  54         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_TEID)
  55
  56 #define ICE_FLOW_HASH_GTP_U_EH_TEID \
  57         (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID))
  58
  59 #define ICE_FLOW_HASH_GTP_U_EH_QFI \
  60         (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_QFI))
  61
  62 #define ICE_FLOW_HASH_GTP_U_IPV4_EH \
  63         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_EH_TEID | \
  64          ICE_FLOW_HASH_GTP_U_EH_QFI)
  65 #define ICE_FLOW_HASH_GTP_U_IPV6_EH \
  66         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_EH_TEID | \
  67          ICE_FLOW_HASH_GTP_U_EH_QFI)
  68
  69 #define ICE_FLOW_HASH_PPPOE_SESS_ID \
  70         (BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID))
  71
  72 #define ICE_FLOW_HASH_PPPOE_SESS_ID_ETH \
  73         (ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_PPPOE_SESS_ID)
  74 #define ICE_FLOW_HASH_PPPOE_TCP_ID \
  75         (ICE_FLOW_HASH_TCP_PORT | ICE_FLOW_HASH_PPPOE_SESS_ID)
  76 #define ICE_FLOW_HASH_PPPOE_UDP_ID \
  77         (ICE_FLOW_HASH_UDP_PORT | ICE_FLOW_HASH_PPPOE_SESS_ID)
  78
  79 #define ICE_FLOW_HASH_PFCP_SEID \
  80         (BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID))
  81 #define ICE_FLOW_HASH_PFCP_IPV4_SEID \
  82         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_PFCP_SEID)
  83 #define ICE_FLOW_HASH_PFCP_IPV6_SEID \
  84         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_PFCP_SEID)
  85
  86 #define ICE_FLOW_HASH_L2TPV3_SESS_ID \
  87         (BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID))
  88 #define ICE_FLOW_HASH_L2TPV3_IPV4_SESS_ID \
  89         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_L2TPV3_SESS_ID)
  90 #define ICE_FLOW_HASH_L2TPV3_IPV6_SESS_ID \
  91         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_L2TPV3_SESS_ID)
  92
  93 #define ICE_FLOW_HASH_ESP_SPI \
  94         (BIT_ULL(ICE_FLOW_FIELD_IDX_ESP_SPI))
  95 #define ICE_FLOW_HASH_ESP_IPV4_SPI \
  96         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_ESP_SPI)
  97 #define ICE_FLOW_HASH_ESP_IPV6_SPI \
  98         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_ESP_SPI)
  99
 100 #define ICE_FLOW_HASH_AH_SPI \
 101         (BIT_ULL(ICE_FLOW_FIELD_IDX_AH_SPI))
 102 #define ICE_FLOW_HASH_AH_IPV4_SPI \
 103         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_AH_SPI)
 104 #define ICE_FLOW_HASH_AH_IPV6_SPI \
 105         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_AH_SPI)
 106
 107 #define ICE_FLOW_HASH_NAT_T_ESP_SPI \
 108         (BIT_ULL(ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI))
 109 #define ICE_FLOW_HASH_NAT_T_ESP_IPV4_SPI \
 110         (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_NAT_T_ESP_SPI)
 111 #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \
 112         (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI)
 113
 114 /* Protocol header fields within a packet segment. A segment consists of one or
 115  * more protocol headers that make up a logical group of protocol headers. Each
 116  * logical group of protocol headers encapsulates or is encapsulated using/by
 117  * tunneling or encapsulation protocols for network virtualization such as GRE,
 118  * VxLAN, etc.
 119  */
 120 enum ice_flow_seg_hdr {
 121         ICE_FLOW_SEG_HDR_NONE           = 0x00000000,
 122         ICE_FLOW_SEG_HDR_ETH            = 0x00000001,
 123         ICE_FLOW_SEG_HDR_VLAN           = 0x00000002,
 124         ICE_FLOW_SEG_HDR_IPV4           = 0x00000004,
 125         ICE_FLOW_SEG_HDR_IPV6           = 0x00000008,
 126         ICE_FLOW_SEG_HDR_ARP            = 0x00000010,
 127         ICE_FLOW_SEG_HDR_ICMP           = 0x00000020,
 128         ICE_FLOW_SEG_HDR_TCP            = 0x00000040,
 129         ICE_FLOW_SEG_HDR_UDP            = 0x00000080,
 130         ICE_FLOW_SEG_HDR_SCTP           = 0x00000100,
 131         ICE_FLOW_SEG_HDR_GRE            = 0x00000200,
 132         ICE_FLOW_SEG_HDR_GTPC           = 0x00000400,
 133         ICE_FLOW_SEG_HDR_GTPC_TEID      = 0x00000800,
 134         ICE_FLOW_SEG_HDR_GTPU_IP        = 0x00001000,
 135         ICE_FLOW_SEG_HDR_GTPU_EH        = 0x00002000,
 136         ICE_FLOW_SEG_HDR_GTPU_DWN       = 0x00004000,
 137         ICE_FLOW_SEG_HDR_GTPU_UP        = 0x00008000,
 138         ICE_FLOW_SEG_HDR_PPPOE          = 0x00010000,
 139         ICE_FLOW_SEG_HDR_PFCP_NODE      = 0x00020000,
 140         ICE_FLOW_SEG_HDR_PFCP_SESSION   = 0x00040000,
 141         ICE_FLOW_SEG_HDR_L2TPV3         = 0x00080000,
 142         ICE_FLOW_SEG_HDR_ESP            = 0x00100000,
 143         ICE_FLOW_SEG_HDR_AH             = 0x00200000,
 144         ICE_FLOW_SEG_HDR_NAT_T_ESP      = 0x00400000,
 145         ICE_FLOW_SEG_HDR_ETH_NON_IP     = 0x00800000,
 146         /* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
 147          * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs
 148          */
 149         ICE_FLOW_SEG_HDR_IPV_OTHER      = 0x20000000,
 150 };
 151
 152 /* These segments all have the same PTYPES, but are otherwise distinguished by
 153  * the value of the gtp_eh_pdu and gtp_eh_pdu_link flags:
 154  *
 155  *                                gtp_eh_pdu     gtp_eh_pdu_link
 156  * ICE_FLOW_SEG_HDR_GTPU_IP           0              0
 157  * ICE_FLOW_SEG_HDR_GTPU_EH           1              don't care
 158  * ICE_FLOW_SEG_HDR_GTPU_DWN          1              0
 159  * ICE_FLOW_SEG_HDR_GTPU_UP           1              1
 160  */
 161 #define ICE_FLOW_SEG_HDR_GTPU (ICE_FLOW_SEG_HDR_GTPU_IP | \
 162                                ICE_FLOW_SEG_HDR_GTPU_EH | \
 163                                ICE_FLOW_SEG_HDR_GTPU_DWN | \
 164                                ICE_FLOW_SEG_HDR_GTPU_UP)
 165 #define ICE_FLOW_SEG_HDR_PFCP (ICE_FLOW_SEG_HDR_PFCP_NODE | \
 166                                ICE_FLOW_SEG_HDR_PFCP_SESSION)
 167
 168 enum ice_flow_field {
 169         /* L2 */
 170         ICE_FLOW_FIELD_IDX_ETH_DA,
 171         ICE_FLOW_FIELD_IDX_ETH_SA,
 172         ICE_FLOW_FIELD_IDX_S_VLAN,
 173         ICE_FLOW_FIELD_IDX_C_VLAN,
 174         ICE_FLOW_FIELD_IDX_ETH_TYPE,
 175         /* L3 */
 176         ICE_FLOW_FIELD_IDX_IPV4_DSCP,
 177         ICE_FLOW_FIELD_IDX_IPV6_DSCP,
 178         ICE_FLOW_FIELD_IDX_IPV4_TTL,
 179         ICE_FLOW_FIELD_IDX_IPV4_PROT,
 180         ICE_FLOW_FIELD_IDX_IPV6_TTL,
 181         ICE_FLOW_FIELD_IDX_IPV6_PROT,
 182         ICE_FLOW_FIELD_IDX_IPV4_SA,
 183         ICE_FLOW_FIELD_IDX_IPV4_DA,
 184         ICE_FLOW_FIELD_IDX_IPV6_SA,
 185         ICE_FLOW_FIELD_IDX_IPV6_DA,
 186         /* L4 */
 187         ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
 188         ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
 189         ICE_FLOW_FIELD_IDX_UDP_SRC_PORT,
 190         ICE_FLOW_FIELD_IDX_UDP_DST_PORT,
 191         ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,
 192         ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,
 193         ICE_FLOW_FIELD_IDX_TCP_FLAGS,
 194         /* ARP */
 195         ICE_FLOW_FIELD_IDX_ARP_SIP,
 196         ICE_FLOW_FIELD_IDX_ARP_DIP,
 197         ICE_FLOW_FIELD_IDX_ARP_SHA,
 198         ICE_FLOW_FIELD_IDX_ARP_DHA,
 199         ICE_FLOW_FIELD_IDX_ARP_OP,
 200         /* ICMP */
 201         ICE_FLOW_FIELD_IDX_ICMP_TYPE,
 202         ICE_FLOW_FIELD_IDX_ICMP_CODE,
 203         /* GRE */
 204         ICE_FLOW_FIELD_IDX_GRE_KEYID,
 205         /* GTPC_TEID */
 206         ICE_FLOW_FIELD_IDX_GTPC_TEID,
 207         /* GTPU_IP */
 208         ICE_FLOW_FIELD_IDX_GTPU_IP_TEID,
 209         /* GTPU_EH */
 210         ICE_FLOW_FIELD_IDX_GTPU_EH_TEID,
 211         ICE_FLOW_FIELD_IDX_GTPU_EH_QFI,
 212         /* GTPU_UP */
 213         ICE_FLOW_FIELD_IDX_GTPU_UP_TEID,
 214         /* GTPU_DWN */
 215         ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID,
 216         /* PPPoE */
 217         ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID,
 218         /* PFCP */
 219         ICE_FLOW_FIELD_IDX_PFCP_SEID,
 220         /* L2TPv3 */
 221         ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID,
 222         /* ESP */
 223         ICE_FLOW_FIELD_IDX_ESP_SPI,
 224         /* AH */
 225         ICE_FLOW_FIELD_IDX_AH_SPI,
 226         /* NAT_T ESP */
 227         ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI,
 228          /* The total number of enums must not exceed 64 */
 229         ICE_FLOW_FIELD_IDX_MAX
 230 };
 231
 232 #define ICE_FLOW_HASH_FLD_IPV4_SA       BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)
 233 #define ICE_FLOW_HASH_FLD_IPV6_SA       BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA)
 234 #define ICE_FLOW_HASH_FLD_IPV4_DA       BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)
 235 #define ICE_FLOW_HASH_FLD_IPV6_DA       BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)
 236 #define ICE_FLOW_HASH_FLD_TCP_SRC_PORT  BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)
 237 #define ICE_FLOW_HASH_FLD_TCP_DST_PORT  BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)
 238 #define ICE_FLOW_HASH_FLD_UDP_SRC_PORT  BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)
 239 #define ICE_FLOW_HASH_FLD_UDP_DST_PORT  BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)
 240 #define ICE_FLOW_HASH_FLD_SCTP_SRC_PORT \
 241         BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)
 242 #define ICE_FLOW_HASH_FLD_SCTP_DST_PORT \
 243         BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)
 244
 245 /* Flow headers and fields for AVF support */
 246 enum ice_flow_avf_hdr_field {
 247         /* Values 0 - 28 are reserved for future use */
 248         ICE_AVF_FLOW_FIELD_INVALID              = 0,
 249         ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP     = 29,
 250         ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,
 251         ICE_AVF_FLOW_FIELD_IPV4_UDP,
 252         ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,
 253         ICE_AVF_FLOW_FIELD_IPV4_TCP,
 254         ICE_AVF_FLOW_FIELD_IPV4_SCTP,
 255         ICE_AVF_FLOW_FIELD_IPV4_OTHER,
 256         ICE_AVF_FLOW_FIELD_FRAG_IPV4,
 257         /* Values 37-38 are reserved */
 258         ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP     = 39,
 259         ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,
 260         ICE_AVF_FLOW_FIELD_IPV6_UDP,
 261         ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,
 262         ICE_AVF_FLOW_FIELD_IPV6_TCP,
 263         ICE_AVF_FLOW_FIELD_IPV6_SCTP,
 264         ICE_AVF_FLOW_FIELD_IPV6_OTHER,
 265         ICE_AVF_FLOW_FIELD_FRAG_IPV6,
 266         ICE_AVF_FLOW_FIELD_RSVD47,
 267         ICE_AVF_FLOW_FIELD_FCOE_OX,
 268         ICE_AVF_FLOW_FIELD_FCOE_RX,
 269         ICE_AVF_FLOW_FIELD_FCOE_OTHER,
 270         /* Values 51-62 are reserved */
 271         ICE_AVF_FLOW_FIELD_L2_PAYLOAD           = 63,
 272         ICE_AVF_FLOW_FIELD_MAX
 273 };
 274
 275 /* Supported RSS offloads  This macro is defined to support
 276  * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware
 277  * capabilities to the caller of this ops.
 278  */
 279 #define ICE_DEFAULT_RSS_HENA ( \
 280         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \
 281         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \
 282         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \
 283         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
 284         BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \
 285         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \
 286         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \
 287         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \
 288         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
 289         BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \
 290         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
 291         BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
 292         BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
 293         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
 294         BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
 295         BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))
 296
 297 enum ice_rss_cfg_hdr_type {
 298         ICE_RSS_OUTER_HEADERS, /* take outer headers as inputset. */
 299         ICE_RSS_INNER_HEADERS, /* take inner headers as inputset. */
 300         /* take inner headers as inputset for packet with outer ipv4. */
 301         ICE_RSS_INNER_HEADERS_W_OUTER_IPV4,
 302         /* take inner headers as inputset for packet with outer ipv6. */
 303         ICE_RSS_INNER_HEADERS_W_OUTER_IPV6,
 304         /* take outer headers first then inner headers as inputset */
 305         ICE_RSS_ANY_HEADERS
 306 };
 307
 308 struct ice_rss_hash_cfg {
 309         u32 addl_hdrs; /* protocol header fields */
 310         u64 hash_flds; /* hash bit field (ICE_FLOW_HASH_*) to configure */
 311         enum ice_rss_cfg_hdr_type hdr_type; /* to specify inner or outer */
 312         bool symm; /* symmetric or asymmetric hash */
 313 };
 314
 315 enum ice_flow_dir {
 316         ICE_FLOW_RX             = 0x02,
 317 };
 318
 319 enum ice_flow_priority {
 320         ICE_FLOW_PRIO_LOW,
 321         ICE_FLOW_PRIO_NORMAL,
 322         ICE_FLOW_PRIO_HIGH
 323 };
 324
 325 #define ICE_FLOW_SEG_SINGLE             1
 326 #define ICE_FLOW_SEG_MAX                2
 327 #define ICE_FLOW_SEG_RAW_FLD_MAX        2
 328 #define ICE_FLOW_SW_FIELD_VECTOR_MAX    48
 329 #define ICE_FLOW_FV_EXTRACT_SZ          2
 330
 331 #define ICE_FLOW_SET_HDRS(seg, val)     ((seg)->hdrs |= (u32)(val))
 332
 333 struct ice_flow_seg_xtrct {
 334         u8 prot_id;     /* Protocol ID of extracted header field */
 335         u16 off;        /* Starting offset of the field in header in bytes */
 336         u8 idx;         /* Index of FV entry used */
 337         u8 disp;        /* Displacement of field in bits fr. FV entry's start */
 338         u16 mask;       /* Mask for field */
 339 };
 340
 341 enum ice_flow_fld_match_type {
 342         ICE_FLOW_FLD_TYPE_REG,          /* Value, mask */
 343         ICE_FLOW_FLD_TYPE_RANGE,        /* Value, mask, last (upper bound) */
 344         ICE_FLOW_FLD_TYPE_PREFIX,       /* IP address, prefix, size of prefix */
 345         ICE_FLOW_FLD_TYPE_SIZE,         /* Value, mask, size of match */
 346 };
 347
 348 struct ice_flow_fld_loc {
 349         /* Describe offsets of field information relative to the beginning of
 350          * input buffer provided when adding flow entries.
 351          */
 352         u16 val;        /* Offset where the value is located */
 353         u16 mask;       /* Offset where the mask/prefix value is located */
 354         u16 last;       /* Length or offset where the upper value is located */
 355 };
 356
 357 struct ice_flow_fld_info {
 358         enum ice_flow_fld_match_type type;
 359         /* Location where to retrieve data from an input buffer */
 360         struct ice_flow_fld_loc src;
 361         /* Location where to put the data into the final entry buffer */
 362         struct ice_flow_fld_loc entry;
 363         struct ice_flow_seg_xtrct xtrct;
 364 };
 365
 366 struct ice_flow_seg_fld_raw {
 367         struct ice_flow_fld_info info;
 368         u16 off;        /* Offset from the start of the segment */
 369 };
 370
 371 struct ice_flow_seg_info {
 372         u32 hdrs;       /* Bitmask indicating protocol headers present */
 373         u64 match;      /* Bitmask indicating header fields to be matched */
 374         u64 range;      /* Bitmask indicating header fields matched as ranges */
 375
 376         struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX];
 377
 378         u8 raws_cnt;    /* Number of raw fields to be matched */
 379         struct ice_flow_seg_fld_raw raws[ICE_FLOW_SEG_RAW_FLD_MAX];
 380 };
 381
 382 /* This structure describes a flow entry, and is tracked only in this file */
 383 struct ice_flow_entry {
 384         struct list_head l_entry;
 385
 386         u64 id;
 387         struct ice_flow_prof *prof;
 388         enum ice_flow_priority priority;
 389         u16 vsi_handle;
 390 };
 391
 392 #define ICE_FLOW_ENTRY_HNDL(e)  ((u64)(uintptr_t)e)
 393 #define ICE_FLOW_ENTRY_PTR(h)   ((struct ice_flow_entry *)(uintptr_t)(h))
 394
 395 struct ice_flow_prof {
 396         struct list_head l_entry;
 397
 398         u64 id;
 399         enum ice_flow_dir dir;
 400         u8 segs_cnt;
 401
 402         /* Keep track of flow entries associated with this flow profile */
 403         struct mutex entries_lock;
 404         struct list_head entries;
 405
 406         struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];
 407
 408         /* software VSI handles referenced by this flow profile */
 409         DECLARE_BITMAP(vsis, ICE_MAX_VSI);
 410
 411         bool symm; /* Symmetric Hash for RSS */
 412 };
 413
 414 struct ice_rss_cfg {
 415         struct list_head l_entry;
 416         /* bitmap of VSIs added to the RSS entry */
 417         DECLARE_BITMAP(vsis, ICE_MAX_VSI);
 418         struct ice_rss_hash_cfg hash;
 419 };
 420
 421 int
 422 ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
 423                   struct ice_flow_seg_info *segs, u8 segs_cnt,
 424                   bool symm, struct ice_flow_prof **prof);
 425 int ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id);
 426 int
 427 ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
 428                    u64 entry_id, u16 vsi, enum ice_flow_priority prio,
 429                    void *data, u64 *entry_h);
 430 int ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h);
 431 void
 432 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
 433                  u16 val_loc, u16 mask_loc, u16 last_loc, bool range);
 434 void
 435 ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
 436                      u16 val_loc, u16 mask_loc);
 437 int ice_flow_rem_vsi_prof(struct ice_hw *hw, u16 vsi_handle, u64 prof_id);
 438 void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
 439 int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
 440 int ice_set_rss_cfg_symm(struct ice_hw *hw, struct ice_vsi *vsi, bool symm);
 441 int ice_add_avf_rss_cfg(struct ice_hw *hw, struct ice_vsi *vsi,
 442                         u64 hashed_flds);
 443 int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
 444 int ice_add_rss_cfg(struct ice_hw *hw, struct ice_vsi *vsi,
 445                     const struct ice_rss_hash_cfg *cfg);
 446 int ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
 447                     const struct ice_rss_hash_cfg *cfg);
 448 u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs, bool *symm);
 449 #endif /* _ICE_FLOW_H_ */