1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
4 #include <linux/etherdevice.h>
5 #include <linux/of_net.h>
11 #include "i40e_diag.h"
13 #include <net/udp_tunnel.h>
14 #include <net/xdp_sock.h>
15 /* All i40e tracepoints are defined by the include below, which
16 * must be included exactly once across the whole kernel with
17 * CREATE_TRACE_POINTS defined
19 #define CREATE_TRACE_POINTS
20 #include "i40e_trace.h"
22 const char i40e_driver_name[] = "i40e";
23 static const char i40e_driver_string[] =
24 "Intel(R) Ethernet Connection XL710 Network Driver";
28 #define DRV_VERSION_MAJOR 2
29 #define DRV_VERSION_MINOR 7
30 #define DRV_VERSION_BUILD 6
31 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
32 __stringify(DRV_VERSION_MINOR) "." \
33 __stringify(DRV_VERSION_BUILD) DRV_KERN
34 const char i40e_driver_version_str[] = DRV_VERSION;
35 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
37 /* a bit of forward declarations */
38 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
39 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
40 static int i40e_add_vsi(struct i40e_vsi *vsi);
41 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
42 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
43 static int i40e_setup_misc_vector(struct i40e_pf *pf);
44 static void i40e_determine_queue_usage(struct i40e_pf *pf);
45 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
46 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired);
47 static int i40e_reset(struct i40e_pf *pf);
48 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
49 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
50 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
51 static int i40e_get_capabilities(struct i40e_pf *pf,
52 enum i40e_admin_queue_opc list_type);
55 /* i40e_pci_tbl - PCI Device ID Table
57 * Last entry must be all 0s
59 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
60 * Class, Class Mask, private data (not used) }
62 static const struct pci_device_id i40e_pci_tbl[] = {
63 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
64 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
82 /* required last entry */
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, uint, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL v2");
95 MODULE_VERSION(DRV_VERSION);
97 static struct workqueue_struct *i40e_wq;
100 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
101 * @hw: pointer to the HW structure
102 * @mem: ptr to mem struct to fill out
103 * @size: size of memory requested
104 * @alignment: what to align the allocation to
106 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
107 u64 size, u32 alignment)
109 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
111 mem->size = ALIGN(size, alignment);
112 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
121 * i40e_free_dma_mem_d - OS specific memory free for shared code
122 * @hw: pointer to the HW structure
123 * @mem: ptr to mem struct to free
125 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
127 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
129 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
138 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
139 * @hw: pointer to the HW structure
140 * @mem: ptr to mem struct to fill out
141 * @size: size of memory requested
143 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
147 mem->va = kzalloc(size, GFP_KERNEL);
156 * i40e_free_virt_mem_d - OS specific memory free for shared code
157 * @hw: pointer to the HW structure
158 * @mem: ptr to mem struct to free
160 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
162 /* it's ok to kfree a NULL pointer */
171 * i40e_get_lump - find a lump of free generic resource
172 * @pf: board private structure
173 * @pile: the pile of resource to search
174 * @needed: the number of items needed
175 * @id: an owner id to stick on the items assigned
177 * Returns the base item index of the lump, or negative for error
179 * The search_hint trick and lack of advanced fit-finding only work
180 * because we're highly likely to have all the same size lump requests.
181 * Linear search time and any fragmentation should be minimal.
183 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
189 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
190 dev_info(&pf->pdev->dev,
191 "param err: pile=%s needed=%d id=0x%04x\n",
192 pile ? "<valid>" : "<null>", needed, id);
196 /* start the linear search with an imperfect hint */
197 i = pile->search_hint;
198 while (i < pile->num_entries) {
199 /* skip already allocated entries */
200 if (pile->list[i] & I40E_PILE_VALID_BIT) {
205 /* do we have enough in this lump? */
206 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
207 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
212 /* there was enough, so assign it to the requestor */
213 for (j = 0; j < needed; j++)
214 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
216 pile->search_hint = i + j;
220 /* not enough, so skip over it and continue looking */
228 * i40e_put_lump - return a lump of generic resource
229 * @pile: the pile of resource to search
230 * @index: the base item index
231 * @id: the owner id of the items assigned
233 * Returns the count of items in the lump
235 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
237 int valid_id = (id | I40E_PILE_VALID_BIT);
241 if (!pile || index >= pile->num_entries)
245 i < pile->num_entries && pile->list[i] == valid_id;
251 if (count && index < pile->search_hint)
252 pile->search_hint = index;
258 * i40e_find_vsi_from_id - searches for the vsi with the given id
259 * @pf: the pf structure to search for the vsi
260 * @id: id of the vsi it is searching for
262 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
266 for (i = 0; i < pf->num_alloc_vsi; i++)
267 if (pf->vsi[i] && (pf->vsi[i]->id == id))
274 * i40e_service_event_schedule - Schedule the service task to wake up
275 * @pf: board private structure
277 * If not already scheduled, this puts the task into the work queue
279 void i40e_service_event_schedule(struct i40e_pf *pf)
281 if (!test_bit(__I40E_DOWN, pf->state) &&
282 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
283 queue_work(i40e_wq, &pf->service_task);
287 * i40e_tx_timeout - Respond to a Tx Hang
288 * @netdev: network interface device structure
290 * If any port has noticed a Tx timeout, it is likely that the whole
291 * device is munged, not just the one netdev port, so go for the full
294 static void i40e_tx_timeout(struct net_device *netdev)
296 struct i40e_netdev_priv *np = netdev_priv(netdev);
297 struct i40e_vsi *vsi = np->vsi;
298 struct i40e_pf *pf = vsi->back;
299 struct i40e_ring *tx_ring = NULL;
300 unsigned int i, hung_queue = 0;
303 pf->tx_timeout_count++;
305 /* find the stopped queue the same way the stack does */
306 for (i = 0; i < netdev->num_tx_queues; i++) {
307 struct netdev_queue *q;
308 unsigned long trans_start;
310 q = netdev_get_tx_queue(netdev, i);
311 trans_start = q->trans_start;
312 if (netif_xmit_stopped(q) &&
314 (trans_start + netdev->watchdog_timeo))) {
320 if (i == netdev->num_tx_queues) {
321 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
323 /* now that we have an index, find the tx_ring struct */
324 for (i = 0; i < vsi->num_queue_pairs; i++) {
325 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
327 vsi->tx_rings[i]->queue_index) {
328 tx_ring = vsi->tx_rings[i];
335 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
336 pf->tx_timeout_recovery_level = 1; /* reset after some time */
337 else if (time_before(jiffies,
338 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
339 return; /* don't do any new action before the next timeout */
341 /* don't kick off another recovery if one is already pending */
342 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
346 head = i40e_get_head(tx_ring);
347 /* Read interrupt register */
348 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
350 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
351 tx_ring->vsi->base_vector - 1));
353 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
355 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
356 vsi->seid, hung_queue, tx_ring->next_to_clean,
357 head, tx_ring->next_to_use,
358 readl(tx_ring->tail), val);
361 pf->tx_timeout_last_recovery = jiffies;
362 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
363 pf->tx_timeout_recovery_level, hung_queue);
365 switch (pf->tx_timeout_recovery_level) {
367 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
370 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
373 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
376 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
380 i40e_service_event_schedule(pf);
381 pf->tx_timeout_recovery_level++;
385 * i40e_get_vsi_stats_struct - Get System Network Statistics
386 * @vsi: the VSI we care about
388 * Returns the address of the device statistics structure.
389 * The statistics are actually updated from the service task.
391 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
393 return &vsi->net_stats;
397 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
398 * @ring: Tx ring to get statistics from
399 * @stats: statistics entry to be updated
401 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
402 struct rtnl_link_stats64 *stats)
408 start = u64_stats_fetch_begin_irq(&ring->syncp);
409 packets = ring->stats.packets;
410 bytes = ring->stats.bytes;
411 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
413 stats->tx_packets += packets;
414 stats->tx_bytes += bytes;
418 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
419 * @netdev: network interface device structure
420 * @stats: data structure to store statistics
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
425 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 struct i40e_netdev_priv *np = netdev_priv(netdev);
429 struct i40e_vsi *vsi = np->vsi;
430 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
431 struct i40e_ring *ring;
434 if (test_bit(__I40E_VSI_DOWN, vsi->state))
441 for (i = 0; i < vsi->num_queue_pairs; i++) {
445 ring = READ_ONCE(vsi->tx_rings[i]);
448 i40e_get_netdev_stats_struct_tx(ring, stats);
450 if (i40e_enabled_xdp_vsi(vsi)) {
452 i40e_get_netdev_stats_struct_tx(ring, stats);
457 start = u64_stats_fetch_begin_irq(&ring->syncp);
458 packets = ring->stats.packets;
459 bytes = ring->stats.bytes;
460 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
462 stats->rx_packets += packets;
463 stats->rx_bytes += bytes;
468 /* following stats updated by i40e_watchdog_subtask() */
469 stats->multicast = vsi_stats->multicast;
470 stats->tx_errors = vsi_stats->tx_errors;
471 stats->tx_dropped = vsi_stats->tx_dropped;
472 stats->rx_errors = vsi_stats->rx_errors;
473 stats->rx_dropped = vsi_stats->rx_dropped;
474 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
475 stats->rx_length_errors = vsi_stats->rx_length_errors;
479 * i40e_vsi_reset_stats - Resets all stats of the given vsi
480 * @vsi: the VSI to have its stats reset
482 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
484 struct rtnl_link_stats64 *ns;
490 ns = i40e_get_vsi_stats_struct(vsi);
491 memset(ns, 0, sizeof(*ns));
492 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
493 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
494 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
495 if (vsi->rx_rings && vsi->rx_rings[0]) {
496 for (i = 0; i < vsi->num_queue_pairs; i++) {
497 memset(&vsi->rx_rings[i]->stats, 0,
498 sizeof(vsi->rx_rings[i]->stats));
499 memset(&vsi->rx_rings[i]->rx_stats, 0,
500 sizeof(vsi->rx_rings[i]->rx_stats));
501 memset(&vsi->tx_rings[i]->stats, 0,
502 sizeof(vsi->tx_rings[i]->stats));
503 memset(&vsi->tx_rings[i]->tx_stats, 0,
504 sizeof(vsi->tx_rings[i]->tx_stats));
507 vsi->stat_offsets_loaded = false;
511 * i40e_pf_reset_stats - Reset all of the stats for the given PF
512 * @pf: the PF to be reset
514 void i40e_pf_reset_stats(struct i40e_pf *pf)
518 memset(&pf->stats, 0, sizeof(pf->stats));
519 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
520 pf->stat_offsets_loaded = false;
522 for (i = 0; i < I40E_MAX_VEB; i++) {
524 memset(&pf->veb[i]->stats, 0,
525 sizeof(pf->veb[i]->stats));
526 memset(&pf->veb[i]->stats_offsets, 0,
527 sizeof(pf->veb[i]->stats_offsets));
528 pf->veb[i]->stat_offsets_loaded = false;
531 pf->hw_csum_rx_error = 0;
535 * i40e_stat_update48 - read and update a 48 bit stat from the chip
536 * @hw: ptr to the hardware info
537 * @hireg: the high 32 bit reg to read
538 * @loreg: the low 32 bit reg to read
539 * @offset_loaded: has the initial offset been loaded yet
540 * @offset: ptr to current offset value
541 * @stat: ptr to the stat
543 * Since the device stats are not reset at PFReset, they likely will not
544 * be zeroed when the driver starts. We'll save the first values read
545 * and use them as offsets to be subtracted from the raw values in order
546 * to report stats that count from zero. In the process, we also manage
547 * the potential roll-over.
549 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
550 bool offset_loaded, u64 *offset, u64 *stat)
554 if (hw->device_id == I40E_DEV_ID_QEMU) {
555 new_data = rd32(hw, loreg);
556 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
558 new_data = rd64(hw, loreg);
562 if (likely(new_data >= *offset))
563 *stat = new_data - *offset;
565 *stat = (new_data + BIT_ULL(48)) - *offset;
566 *stat &= 0xFFFFFFFFFFFFULL;
570 * i40e_stat_update32 - read and update a 32 bit stat from the chip
571 * @hw: ptr to the hardware info
572 * @reg: the hw reg to read
573 * @offset_loaded: has the initial offset been loaded yet
574 * @offset: ptr to current offset value
575 * @stat: ptr to the stat
577 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
578 bool offset_loaded, u64 *offset, u64 *stat)
582 new_data = rd32(hw, reg);
585 if (likely(new_data >= *offset))
586 *stat = (u32)(new_data - *offset);
588 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
592 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
593 * @hw: ptr to the hardware info
594 * @reg: the hw reg to read and clear
595 * @stat: ptr to the stat
597 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
599 u32 new_data = rd32(hw, reg);
601 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
606 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
607 * @vsi: the VSI to be updated
609 void i40e_update_eth_stats(struct i40e_vsi *vsi)
611 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
612 struct i40e_pf *pf = vsi->back;
613 struct i40e_hw *hw = &pf->hw;
614 struct i40e_eth_stats *oes;
615 struct i40e_eth_stats *es; /* device's eth stats */
617 es = &vsi->eth_stats;
618 oes = &vsi->eth_stats_offsets;
620 /* Gather up the stats that the hw collects */
621 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->tx_errors, &es->tx_errors);
624 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_discards, &es->rx_discards);
627 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
628 vsi->stat_offsets_loaded,
629 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
630 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->tx_errors, &es->tx_errors);
634 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
635 I40E_GLV_GORCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_bytes, &es->rx_bytes);
638 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
639 I40E_GLV_UPRCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->rx_unicast, &es->rx_unicast);
642 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
643 I40E_GLV_MPRCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->rx_multicast, &es->rx_multicast);
646 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
647 I40E_GLV_BPRCL(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->rx_broadcast, &es->rx_broadcast);
651 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
652 I40E_GLV_GOTCL(stat_idx),
653 vsi->stat_offsets_loaded,
654 &oes->tx_bytes, &es->tx_bytes);
655 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
656 I40E_GLV_UPTCL(stat_idx),
657 vsi->stat_offsets_loaded,
658 &oes->tx_unicast, &es->tx_unicast);
659 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
660 I40E_GLV_MPTCL(stat_idx),
661 vsi->stat_offsets_loaded,
662 &oes->tx_multicast, &es->tx_multicast);
663 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
664 I40E_GLV_BPTCL(stat_idx),
665 vsi->stat_offsets_loaded,
666 &oes->tx_broadcast, &es->tx_broadcast);
667 vsi->stat_offsets_loaded = true;
671 * i40e_update_veb_stats - Update Switch component statistics
672 * @veb: the VEB being updated
674 static void i40e_update_veb_stats(struct i40e_veb *veb)
676 struct i40e_pf *pf = veb->pf;
677 struct i40e_hw *hw = &pf->hw;
678 struct i40e_eth_stats *oes;
679 struct i40e_eth_stats *es; /* device's eth stats */
680 struct i40e_veb_tc_stats *veb_oes;
681 struct i40e_veb_tc_stats *veb_es;
684 idx = veb->stats_idx;
686 oes = &veb->stats_offsets;
687 veb_es = &veb->tc_stats;
688 veb_oes = &veb->tc_stats_offsets;
690 /* Gather up the stats that the hw collects */
691 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
692 veb->stat_offsets_loaded,
693 &oes->tx_discards, &es->tx_discards);
694 if (hw->revision_id > 0)
695 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_unknown_protocol,
698 &es->rx_unknown_protocol);
699 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_bytes, &es->rx_bytes);
702 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_unicast, &es->rx_unicast);
705 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
706 veb->stat_offsets_loaded,
707 &oes->rx_multicast, &es->rx_multicast);
708 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->rx_broadcast, &es->rx_broadcast);
712 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_bytes, &es->tx_bytes);
715 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_unicast, &es->tx_unicast);
718 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
719 veb->stat_offsets_loaded,
720 &oes->tx_multicast, &es->tx_multicast);
721 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
722 veb->stat_offsets_loaded,
723 &oes->tx_broadcast, &es->tx_broadcast);
724 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
725 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
726 I40E_GLVEBTC_RPCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_rx_packets[i],
729 &veb_es->tc_rx_packets[i]);
730 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
731 I40E_GLVEBTC_RBCL(i, idx),
732 veb->stat_offsets_loaded,
733 &veb_oes->tc_rx_bytes[i],
734 &veb_es->tc_rx_bytes[i]);
735 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
736 I40E_GLVEBTC_TPCL(i, idx),
737 veb->stat_offsets_loaded,
738 &veb_oes->tc_tx_packets[i],
739 &veb_es->tc_tx_packets[i]);
740 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
741 I40E_GLVEBTC_TBCL(i, idx),
742 veb->stat_offsets_loaded,
743 &veb_oes->tc_tx_bytes[i],
744 &veb_es->tc_tx_bytes[i]);
746 veb->stat_offsets_loaded = true;
750 * i40e_update_vsi_stats - Update the vsi statistics counters.
751 * @vsi: the VSI to be updated
753 * There are a few instances where we store the same stat in a
754 * couple of different structs. This is partly because we have
755 * the netdev stats that need to be filled out, which is slightly
756 * different from the "eth_stats" defined by the chip and used in
757 * VF communications. We sort it out here.
759 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
761 struct i40e_pf *pf = vsi->back;
762 struct rtnl_link_stats64 *ons;
763 struct rtnl_link_stats64 *ns; /* netdev stats */
764 struct i40e_eth_stats *oes;
765 struct i40e_eth_stats *es; /* device's eth stats */
766 u32 tx_restart, tx_busy;
777 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
778 test_bit(__I40E_CONFIG_BUSY, pf->state))
781 ns = i40e_get_vsi_stats_struct(vsi);
782 ons = &vsi->net_stats_offsets;
783 es = &vsi->eth_stats;
784 oes = &vsi->eth_stats_offsets;
786 /* Gather up the netdev and vsi stats that the driver collects
787 * on the fly during packet processing
791 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
795 for (q = 0; q < vsi->num_queue_pairs; q++) {
797 p = READ_ONCE(vsi->tx_rings[q]);
800 start = u64_stats_fetch_begin_irq(&p->syncp);
801 packets = p->stats.packets;
802 bytes = p->stats.bytes;
803 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
806 tx_restart += p->tx_stats.restart_queue;
807 tx_busy += p->tx_stats.tx_busy;
808 tx_linearize += p->tx_stats.tx_linearize;
809 tx_force_wb += p->tx_stats.tx_force_wb;
811 /* Rx queue is part of the same block as Tx queue */
814 start = u64_stats_fetch_begin_irq(&p->syncp);
815 packets = p->stats.packets;
816 bytes = p->stats.bytes;
817 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
820 rx_buf += p->rx_stats.alloc_buff_failed;
821 rx_page += p->rx_stats.alloc_page_failed;
824 vsi->tx_restart = tx_restart;
825 vsi->tx_busy = tx_busy;
826 vsi->tx_linearize = tx_linearize;
827 vsi->tx_force_wb = tx_force_wb;
828 vsi->rx_page_failed = rx_page;
829 vsi->rx_buf_failed = rx_buf;
831 ns->rx_packets = rx_p;
833 ns->tx_packets = tx_p;
836 /* update netdev stats from eth stats */
837 i40e_update_eth_stats(vsi);
838 ons->tx_errors = oes->tx_errors;
839 ns->tx_errors = es->tx_errors;
840 ons->multicast = oes->rx_multicast;
841 ns->multicast = es->rx_multicast;
842 ons->rx_dropped = oes->rx_discards;
843 ns->rx_dropped = es->rx_discards;
844 ons->tx_dropped = oes->tx_discards;
845 ns->tx_dropped = es->tx_discards;
847 /* pull in a couple PF stats if this is the main vsi */
848 if (vsi == pf->vsi[pf->lan_vsi]) {
849 ns->rx_crc_errors = pf->stats.crc_errors;
850 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
851 ns->rx_length_errors = pf->stats.rx_length_errors;
856 * i40e_update_pf_stats - Update the PF statistics counters.
857 * @pf: the PF to be updated
859 static void i40e_update_pf_stats(struct i40e_pf *pf)
861 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
862 struct i40e_hw_port_stats *nsd = &pf->stats;
863 struct i40e_hw *hw = &pf->hw;
867 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
868 I40E_GLPRT_GORCL(hw->port),
869 pf->stat_offsets_loaded,
870 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
871 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
872 I40E_GLPRT_GOTCL(hw->port),
873 pf->stat_offsets_loaded,
874 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
875 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
876 pf->stat_offsets_loaded,
877 &osd->eth.rx_discards,
878 &nsd->eth.rx_discards);
879 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
880 I40E_GLPRT_UPRCL(hw->port),
881 pf->stat_offsets_loaded,
882 &osd->eth.rx_unicast,
883 &nsd->eth.rx_unicast);
884 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
885 I40E_GLPRT_MPRCL(hw->port),
886 pf->stat_offsets_loaded,
887 &osd->eth.rx_multicast,
888 &nsd->eth.rx_multicast);
889 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
890 I40E_GLPRT_BPRCL(hw->port),
891 pf->stat_offsets_loaded,
892 &osd->eth.rx_broadcast,
893 &nsd->eth.rx_broadcast);
894 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
895 I40E_GLPRT_UPTCL(hw->port),
896 pf->stat_offsets_loaded,
897 &osd->eth.tx_unicast,
898 &nsd->eth.tx_unicast);
899 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
900 I40E_GLPRT_MPTCL(hw->port),
901 pf->stat_offsets_loaded,
902 &osd->eth.tx_multicast,
903 &nsd->eth.tx_multicast);
904 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
905 I40E_GLPRT_BPTCL(hw->port),
906 pf->stat_offsets_loaded,
907 &osd->eth.tx_broadcast,
908 &nsd->eth.tx_broadcast);
910 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->tx_dropped_link_down,
913 &nsd->tx_dropped_link_down);
915 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->crc_errors, &nsd->crc_errors);
919 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
920 pf->stat_offsets_loaded,
921 &osd->illegal_bytes, &nsd->illegal_bytes);
923 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->mac_local_faults,
926 &nsd->mac_local_faults);
927 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
928 pf->stat_offsets_loaded,
929 &osd->mac_remote_faults,
930 &nsd->mac_remote_faults);
932 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
933 pf->stat_offsets_loaded,
934 &osd->rx_length_errors,
935 &nsd->rx_length_errors);
937 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
938 pf->stat_offsets_loaded,
939 &osd->link_xon_rx, &nsd->link_xon_rx);
940 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->link_xon_tx, &nsd->link_xon_tx);
943 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->link_xoff_rx, &nsd->link_xoff_rx);
946 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->link_xoff_tx, &nsd->link_xoff_tx);
950 for (i = 0; i < 8; i++) {
951 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
952 pf->stat_offsets_loaded,
953 &osd->priority_xoff_rx[i],
954 &nsd->priority_xoff_rx[i]);
955 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
956 pf->stat_offsets_loaded,
957 &osd->priority_xon_rx[i],
958 &nsd->priority_xon_rx[i]);
959 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
960 pf->stat_offsets_loaded,
961 &osd->priority_xon_tx[i],
962 &nsd->priority_xon_tx[i]);
963 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
964 pf->stat_offsets_loaded,
965 &osd->priority_xoff_tx[i],
966 &nsd->priority_xoff_tx[i]);
967 i40e_stat_update32(hw,
968 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
969 pf->stat_offsets_loaded,
970 &osd->priority_xon_2_xoff[i],
971 &nsd->priority_xon_2_xoff[i]);
974 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
975 I40E_GLPRT_PRC64L(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->rx_size_64, &nsd->rx_size_64);
978 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
979 I40E_GLPRT_PRC127L(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->rx_size_127, &nsd->rx_size_127);
982 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
983 I40E_GLPRT_PRC255L(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->rx_size_255, &nsd->rx_size_255);
986 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
987 I40E_GLPRT_PRC511L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->rx_size_511, &nsd->rx_size_511);
990 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
991 I40E_GLPRT_PRC1023L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->rx_size_1023, &nsd->rx_size_1023);
994 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
995 I40E_GLPRT_PRC1522L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->rx_size_1522, &nsd->rx_size_1522);
998 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
999 I40E_GLPRT_PRC9522L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->rx_size_big, &nsd->rx_size_big);
1003 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1004 I40E_GLPRT_PTC64L(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->tx_size_64, &nsd->tx_size_64);
1007 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1008 I40E_GLPRT_PTC127L(hw->port),
1009 pf->stat_offsets_loaded,
1010 &osd->tx_size_127, &nsd->tx_size_127);
1011 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1012 I40E_GLPRT_PTC255L(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->tx_size_255, &nsd->tx_size_255);
1015 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1016 I40E_GLPRT_PTC511L(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->tx_size_511, &nsd->tx_size_511);
1019 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1020 I40E_GLPRT_PTC1023L(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->tx_size_1023, &nsd->tx_size_1023);
1023 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1024 I40E_GLPRT_PTC1522L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->tx_size_1522, &nsd->tx_size_1522);
1027 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1028 I40E_GLPRT_PTC9522L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->tx_size_big, &nsd->tx_size_big);
1032 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_undersize, &nsd->rx_undersize);
1035 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_fragments, &nsd->rx_fragments);
1038 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->rx_oversize, &nsd->rx_oversize);
1041 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_jabber, &nsd->rx_jabber);
1046 i40e_stat_update_and_clear32(hw,
1047 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1048 &nsd->fd_atr_match);
1049 i40e_stat_update_and_clear32(hw,
1050 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1052 i40e_stat_update_and_clear32(hw,
1053 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1054 &nsd->fd_atr_tunnel_match);
1056 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1057 nsd->tx_lpi_status =
1058 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1059 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1060 nsd->rx_lpi_status =
1061 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1062 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1063 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1064 pf->stat_offsets_loaded,
1065 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1066 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1067 pf->stat_offsets_loaded,
1068 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1070 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1071 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1072 nsd->fd_sb_status = true;
1074 nsd->fd_sb_status = false;
1076 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1077 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1078 nsd->fd_atr_status = true;
1080 nsd->fd_atr_status = false;
1082 pf->stat_offsets_loaded = true;
1086 * i40e_update_stats - Update the various statistics counters.
1087 * @vsi: the VSI to be updated
1089 * Update the various stats for this VSI and its related entities.
1091 void i40e_update_stats(struct i40e_vsi *vsi)
1093 struct i40e_pf *pf = vsi->back;
1095 if (vsi == pf->vsi[pf->lan_vsi])
1096 i40e_update_pf_stats(pf);
1098 i40e_update_vsi_stats(vsi);
1102 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1103 * @vsi: the VSI to be searched
1104 * @macaddr: the MAC address
1107 * Returns ptr to the filter object or NULL
1109 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1110 const u8 *macaddr, s16 vlan)
1112 struct i40e_mac_filter *f;
1115 if (!vsi || !macaddr)
1118 key = i40e_addr_to_hkey(macaddr);
1119 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1120 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1128 * i40e_find_mac - Find a mac addr in the macvlan filters list
1129 * @vsi: the VSI to be searched
1130 * @macaddr: the MAC address we are searching for
1132 * Returns the first filter with the provided MAC address or NULL if
1133 * MAC address was not found
1135 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1137 struct i40e_mac_filter *f;
1140 if (!vsi || !macaddr)
1143 key = i40e_addr_to_hkey(macaddr);
1144 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1145 if ((ether_addr_equal(macaddr, f->macaddr)))
1152 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1153 * @vsi: the VSI to be searched
1155 * Returns true if VSI is in vlan mode or false otherwise
1157 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1159 /* If we have a PVID, always operate in VLAN mode */
1163 /* We need to operate in VLAN mode whenever we have any filters with
1164 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1165 * time, incurring search cost repeatedly. However, we can notice two
1168 * 1) the only place where we can gain a VLAN filter is in
1171 * 2) the only place where filters are actually removed is in
1172 * i40e_sync_filters_subtask.
1174 * Thus, we can simply use a boolean value, has_vlan_filters which we
1175 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1176 * we have to perform the full search after deleting filters in
1177 * i40e_sync_filters_subtask, but we already have to search
1178 * filters here and can perform the check at the same time. This
1179 * results in avoiding embedding a loop for VLAN mode inside another
1180 * loop over all the filters, and should maintain correctness as noted
1183 return vsi->has_vlan_filter;
1187 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1188 * @vsi: the VSI to configure
1189 * @tmp_add_list: list of filters ready to be added
1190 * @tmp_del_list: list of filters ready to be deleted
1191 * @vlan_filters: the number of active VLAN filters
1193 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1194 * behave as expected. If we have any active VLAN filters remaining or about
1195 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1196 * so that they only match against untagged traffic. If we no longer have any
1197 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1198 * so that they match against both tagged and untagged traffic. In this way,
1199 * we ensure that we correctly receive the desired traffic. This ensures that
1200 * when we have an active VLAN we will receive only untagged traffic and
1201 * traffic matching active VLANs. If we have no active VLANs then we will
1202 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1204 * Finally, in a similar fashion, this function also corrects filters when
1205 * there is an active PVID assigned to this VSI.
1207 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1209 * This function is only expected to be called from within
1210 * i40e_sync_vsi_filters.
1212 * NOTE: This function expects to be called while under the
1213 * mac_filter_hash_lock
1215 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1216 struct hlist_head *tmp_add_list,
1217 struct hlist_head *tmp_del_list,
1220 s16 pvid = le16_to_cpu(vsi->info.pvid);
1221 struct i40e_mac_filter *f, *add_head;
1222 struct i40e_new_mac_filter *new;
1223 struct hlist_node *h;
1226 /* To determine if a particular filter needs to be replaced we
1227 * have the three following conditions:
1229 * a) if we have a PVID assigned, then all filters which are
1230 * not marked as VLAN=PVID must be replaced with filters that
1232 * b) otherwise, if we have any active VLANS, all filters
1233 * which are marked as VLAN=-1 must be replaced with
1234 * filters marked as VLAN=0
1235 * c) finally, if we do not have any active VLANS, all filters
1236 * which are marked as VLAN=0 must be replaced with filters
1240 /* Update the filters about to be added in place */
1241 hlist_for_each_entry(new, tmp_add_list, hlist) {
1242 if (pvid && new->f->vlan != pvid)
1243 new->f->vlan = pvid;
1244 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1246 else if (!vlan_filters && new->f->vlan == 0)
1247 new->f->vlan = I40E_VLAN_ANY;
1250 /* Update the remaining active filters */
1251 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1252 /* Combine the checks for whether a filter needs to be changed
1253 * and then determine the new VLAN inside the if block, in
1254 * order to avoid duplicating code for adding the new filter
1255 * then deleting the old filter.
1257 if ((pvid && f->vlan != pvid) ||
1258 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1259 (!vlan_filters && f->vlan == 0)) {
1260 /* Determine the new vlan we will be adding */
1263 else if (vlan_filters)
1266 new_vlan = I40E_VLAN_ANY;
1268 /* Create the new filter */
1269 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1273 /* Create a temporary i40e_new_mac_filter */
1274 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1279 new->state = add_head->state;
1281 /* Add the new filter to the tmp list */
1282 hlist_add_head(&new->hlist, tmp_add_list);
1284 /* Put the original filter into the delete list */
1285 f->state = I40E_FILTER_REMOVE;
1286 hash_del(&f->hlist);
1287 hlist_add_head(&f->hlist, tmp_del_list);
1291 vsi->has_vlan_filter = !!vlan_filters;
1297 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1298 * @vsi: the PF Main VSI - inappropriate for any other VSI
1299 * @macaddr: the MAC address
1301 * Remove whatever filter the firmware set up so the driver can manage
1302 * its own filtering intelligently.
1304 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1306 struct i40e_aqc_remove_macvlan_element_data element;
1307 struct i40e_pf *pf = vsi->back;
1309 /* Only appropriate for the PF main VSI */
1310 if (vsi->type != I40E_VSI_MAIN)
1313 memset(&element, 0, sizeof(element));
1314 ether_addr_copy(element.mac_addr, macaddr);
1315 element.vlan_tag = 0;
1316 /* Ignore error returns, some firmware does it this way... */
1317 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1318 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1320 memset(&element, 0, sizeof(element));
1321 ether_addr_copy(element.mac_addr, macaddr);
1322 element.vlan_tag = 0;
1323 /* ...and some firmware does it this way. */
1324 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1325 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1326 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1330 * i40e_add_filter - Add a mac/vlan filter to the VSI
1331 * @vsi: the VSI to be searched
1332 * @macaddr: the MAC address
1335 * Returns ptr to the filter object or NULL when no memory available.
1337 * NOTE: This function is expected to be called with mac_filter_hash_lock
1340 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1341 const u8 *macaddr, s16 vlan)
1343 struct i40e_mac_filter *f;
1346 if (!vsi || !macaddr)
1349 f = i40e_find_filter(vsi, macaddr, vlan);
1351 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1355 /* Update the boolean indicating if we need to function in
1359 vsi->has_vlan_filter = true;
1361 ether_addr_copy(f->macaddr, macaddr);
1363 f->state = I40E_FILTER_NEW;
1364 INIT_HLIST_NODE(&f->hlist);
1366 key = i40e_addr_to_hkey(macaddr);
1367 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1369 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1370 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1373 /* If we're asked to add a filter that has been marked for removal, it
1374 * is safe to simply restore it to active state. __i40e_del_filter
1375 * will have simply deleted any filters which were previously marked
1376 * NEW or FAILED, so if it is currently marked REMOVE it must have
1377 * previously been ACTIVE. Since we haven't yet run the sync filters
1378 * task, just restore this filter to the ACTIVE state so that the
1379 * sync task leaves it in place
1381 if (f->state == I40E_FILTER_REMOVE)
1382 f->state = I40E_FILTER_ACTIVE;
1388 * __i40e_del_filter - Remove a specific filter from the VSI
1389 * @vsi: VSI to remove from
1390 * @f: the filter to remove from the list
1392 * This function should be called instead of i40e_del_filter only if you know
1393 * the exact filter you will remove already, such as via i40e_find_filter or
1396 * NOTE: This function is expected to be called with mac_filter_hash_lock
1398 * ANOTHER NOTE: This function MUST be called from within the context of
1399 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1400 * instead of list_for_each_entry().
1402 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1407 /* If the filter was never added to firmware then we can just delete it
1408 * directly and we don't want to set the status to remove or else an
1409 * admin queue command will unnecessarily fire.
1411 if ((f->state == I40E_FILTER_FAILED) ||
1412 (f->state == I40E_FILTER_NEW)) {
1413 hash_del(&f->hlist);
1416 f->state = I40E_FILTER_REMOVE;
1419 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1420 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1424 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1425 * @vsi: the VSI to be searched
1426 * @macaddr: the MAC address
1429 * NOTE: This function is expected to be called with mac_filter_hash_lock
1431 * ANOTHER NOTE: This function MUST be called from within the context of
1432 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1433 * instead of list_for_each_entry().
1435 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1437 struct i40e_mac_filter *f;
1439 if (!vsi || !macaddr)
1442 f = i40e_find_filter(vsi, macaddr, vlan);
1443 __i40e_del_filter(vsi, f);
1447 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1448 * @vsi: the VSI to be searched
1449 * @macaddr: the mac address to be filtered
1451 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1452 * go through all the macvlan filters and add a macvlan filter for each
1453 * unique vlan that already exists. If a PVID has been assigned, instead only
1454 * add the macaddr to that VLAN.
1456 * Returns last filter added on success, else NULL
1458 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1461 struct i40e_mac_filter *f, *add = NULL;
1462 struct hlist_node *h;
1466 return i40e_add_filter(vsi, macaddr,
1467 le16_to_cpu(vsi->info.pvid));
1469 if (!i40e_is_vsi_in_vlan(vsi))
1470 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1472 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1473 if (f->state == I40E_FILTER_REMOVE)
1475 add = i40e_add_filter(vsi, macaddr, f->vlan);
1484 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1485 * @vsi: the VSI to be searched
1486 * @macaddr: the mac address to be removed
1488 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1491 * Returns 0 for success, or error
1493 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1495 struct i40e_mac_filter *f;
1496 struct hlist_node *h;
1500 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1501 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1502 if (ether_addr_equal(macaddr, f->macaddr)) {
1503 __i40e_del_filter(vsi, f);
1515 * i40e_set_mac - NDO callback to set mac address
1516 * @netdev: network interface device structure
1517 * @p: pointer to an address structure
1519 * Returns 0 on success, negative on failure
1521 static int i40e_set_mac(struct net_device *netdev, void *p)
1523 struct i40e_netdev_priv *np = netdev_priv(netdev);
1524 struct i40e_vsi *vsi = np->vsi;
1525 struct i40e_pf *pf = vsi->back;
1526 struct i40e_hw *hw = &pf->hw;
1527 struct sockaddr *addr = p;
1529 if (!is_valid_ether_addr(addr->sa_data))
1530 return -EADDRNOTAVAIL;
1532 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1533 netdev_info(netdev, "already using mac address %pM\n",
1538 if (test_bit(__I40E_DOWN, pf->state) ||
1539 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1540 return -EADDRNOTAVAIL;
1542 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1543 netdev_info(netdev, "returning to hw mac address %pM\n",
1546 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1548 /* Copy the address first, so that we avoid a possible race with
1550 * - Remove old address from MAC filter
1551 * - Copy new address
1552 * - Add new address to MAC filter
1554 spin_lock_bh(&vsi->mac_filter_hash_lock);
1555 i40e_del_mac_filter(vsi, netdev->dev_addr);
1556 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1557 i40e_add_mac_filter(vsi, netdev->dev_addr);
1558 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1560 if (vsi->type == I40E_VSI_MAIN) {
1563 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1564 addr->sa_data, NULL);
1566 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1567 i40e_stat_str(hw, ret),
1568 i40e_aq_str(hw, hw->aq.asq_last_status));
1571 /* schedule our worker thread which will take care of
1572 * applying the new filter changes
1574 i40e_service_event_schedule(pf);
1579 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1580 * @vsi: vsi structure
1581 * @seed: RSS hash seed
1583 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1584 u8 *lut, u16 lut_size)
1586 struct i40e_pf *pf = vsi->back;
1587 struct i40e_hw *hw = &pf->hw;
1591 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1592 (struct i40e_aqc_get_set_rss_key_data *)seed;
1593 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1595 dev_info(&pf->pdev->dev,
1596 "Cannot set RSS key, err %s aq_err %s\n",
1597 i40e_stat_str(hw, ret),
1598 i40e_aq_str(hw, hw->aq.asq_last_status));
1603 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
1605 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1607 dev_info(&pf->pdev->dev,
1608 "Cannot set RSS lut, err %s aq_err %s\n",
1609 i40e_stat_str(hw, ret),
1610 i40e_aq_str(hw, hw->aq.asq_last_status));
1618 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1619 * @vsi: VSI structure
1621 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1623 struct i40e_pf *pf = vsi->back;
1624 u8 seed[I40E_HKEY_ARRAY_SIZE];
1628 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1631 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1632 vsi->num_queue_pairs);
1635 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1639 /* Use the user configured hash keys and lookup table if there is one,
1640 * otherwise use default
1642 if (vsi->rss_lut_user)
1643 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1645 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1646 if (vsi->rss_hkey_user)
1647 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1649 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1650 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1656 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1657 * @vsi: the VSI being configured,
1658 * @ctxt: VSI context structure
1659 * @enabled_tc: number of traffic classes to enable
1661 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1663 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1664 struct i40e_vsi_context *ctxt,
1667 u16 qcount = 0, max_qcount, qmap, sections = 0;
1668 int i, override_q, pow, num_qps, ret;
1669 u8 netdev_tc = 0, offset = 0;
1671 if (vsi->type != I40E_VSI_MAIN)
1673 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1674 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1675 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1676 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1677 num_qps = vsi->mqprio_qopt.qopt.count[0];
1679 /* find the next higher power-of-2 of num queue pairs */
1680 pow = ilog2(num_qps);
1681 if (!is_power_of_2(num_qps))
1683 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1684 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1686 /* Setup queue offset/count for all TCs for given VSI */
1687 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1688 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1689 /* See if the given TC is enabled for the given VSI */
1690 if (vsi->tc_config.enabled_tc & BIT(i)) {
1691 offset = vsi->mqprio_qopt.qopt.offset[i];
1692 qcount = vsi->mqprio_qopt.qopt.count[i];
1693 if (qcount > max_qcount)
1694 max_qcount = qcount;
1695 vsi->tc_config.tc_info[i].qoffset = offset;
1696 vsi->tc_config.tc_info[i].qcount = qcount;
1697 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1699 /* TC is not enabled so set the offset to
1700 * default queue and allocate one queue
1703 vsi->tc_config.tc_info[i].qoffset = 0;
1704 vsi->tc_config.tc_info[i].qcount = 1;
1705 vsi->tc_config.tc_info[i].netdev_tc = 0;
1709 /* Set actual Tx/Rx queue pairs */
1710 vsi->num_queue_pairs = offset + qcount;
1712 /* Setup queue TC[0].qmap for given VSI context */
1713 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1714 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1715 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1716 ctxt->info.valid_sections |= cpu_to_le16(sections);
1718 /* Reconfigure RSS for main VSI with max queue count */
1719 vsi->rss_size = max_qcount;
1720 ret = i40e_vsi_config_rss(vsi);
1722 dev_info(&vsi->back->pdev->dev,
1723 "Failed to reconfig rss for num_queues (%u)\n",
1727 vsi->reconfig_rss = true;
1728 dev_dbg(&vsi->back->pdev->dev,
1729 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1731 /* Find queue count available for channel VSIs and starting offset
1734 override_q = vsi->mqprio_qopt.qopt.count[0];
1735 if (override_q && override_q < vsi->num_queue_pairs) {
1736 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1737 vsi->next_base_queue = override_q;
1743 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1744 * @vsi: the VSI being setup
1745 * @ctxt: VSI context structure
1746 * @enabled_tc: Enabled TCs bitmap
1747 * @is_add: True if called before Add VSI
1749 * Setup VSI queue mapping for enabled traffic classes.
1751 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1752 struct i40e_vsi_context *ctxt,
1756 struct i40e_pf *pf = vsi->back;
1766 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1769 /* Number of queues per enabled TC */
1770 num_tc_qps = vsi->alloc_queue_pairs;
1771 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1772 /* Find numtc from enabled TC bitmap */
1773 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1774 if (enabled_tc & BIT(i)) /* TC is enabled */
1778 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1781 num_tc_qps = num_tc_qps / numtc;
1782 num_tc_qps = min_t(int, num_tc_qps,
1783 i40e_pf_get_max_q_per_tc(pf));
1786 vsi->tc_config.numtc = numtc;
1787 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1789 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1790 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1791 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1793 /* Setup queue offset/count for all TCs for given VSI */
1794 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1795 /* See if the given TC is enabled for the given VSI */
1796 if (vsi->tc_config.enabled_tc & BIT(i)) {
1800 switch (vsi->type) {
1802 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1803 I40E_FLAG_FD_ATR_ENABLED)) ||
1804 vsi->tc_config.enabled_tc != 1) {
1805 qcount = min_t(int, pf->alloc_rss_size,
1811 case I40E_VSI_SRIOV:
1812 case I40E_VSI_VMDQ2:
1814 qcount = num_tc_qps;
1818 vsi->tc_config.tc_info[i].qoffset = offset;
1819 vsi->tc_config.tc_info[i].qcount = qcount;
1821 /* find the next higher power-of-2 of num queue pairs */
1824 while (num_qps && (BIT_ULL(pow) < qcount)) {
1829 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1831 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1832 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1836 /* TC is not enabled so set the offset to
1837 * default queue and allocate one queue
1840 vsi->tc_config.tc_info[i].qoffset = 0;
1841 vsi->tc_config.tc_info[i].qcount = 1;
1842 vsi->tc_config.tc_info[i].netdev_tc = 0;
1846 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1849 /* Set actual Tx/Rx queue pairs */
1850 vsi->num_queue_pairs = offset;
1851 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1852 if (vsi->req_queue_pairs > 0)
1853 vsi->num_queue_pairs = vsi->req_queue_pairs;
1854 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1855 vsi->num_queue_pairs = pf->num_lan_msix;
1858 /* Scheduler section valid can only be set for ADD VSI */
1860 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1862 ctxt->info.up_enable_bits = enabled_tc;
1864 if (vsi->type == I40E_VSI_SRIOV) {
1865 ctxt->info.mapping_flags |=
1866 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1867 for (i = 0; i < vsi->num_queue_pairs; i++)
1868 ctxt->info.queue_mapping[i] =
1869 cpu_to_le16(vsi->base_queue + i);
1871 ctxt->info.mapping_flags |=
1872 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1873 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1875 ctxt->info.valid_sections |= cpu_to_le16(sections);
1879 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1880 * @netdev: the netdevice
1881 * @addr: address to add
1883 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1884 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1886 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1888 struct i40e_netdev_priv *np = netdev_priv(netdev);
1889 struct i40e_vsi *vsi = np->vsi;
1891 if (i40e_add_mac_filter(vsi, addr))
1898 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1899 * @netdev: the netdevice
1900 * @addr: address to add
1902 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1903 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1905 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1907 struct i40e_netdev_priv *np = netdev_priv(netdev);
1908 struct i40e_vsi *vsi = np->vsi;
1910 /* Under some circumstances, we might receive a request to delete
1911 * our own device address from our uc list. Because we store the
1912 * device address in the VSI's MAC/VLAN filter list, we need to ignore
1913 * such requests and not delete our device address from this list.
1915 if (ether_addr_equal(addr, netdev->dev_addr))
1918 i40e_del_mac_filter(vsi, addr);
1924 * i40e_set_rx_mode - NDO callback to set the netdev filters
1925 * @netdev: network interface device structure
1927 static void i40e_set_rx_mode(struct net_device *netdev)
1929 struct i40e_netdev_priv *np = netdev_priv(netdev);
1930 struct i40e_vsi *vsi = np->vsi;
1932 spin_lock_bh(&vsi->mac_filter_hash_lock);
1934 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1935 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1937 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1939 /* check for other flag changes */
1940 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1941 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1942 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1947 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1948 * @vsi: Pointer to VSI struct
1949 * @from: Pointer to list which contains MAC filter entries - changes to
1950 * those entries needs to be undone.
1952 * MAC filter entries from this list were slated for deletion.
1954 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1955 struct hlist_head *from)
1957 struct i40e_mac_filter *f;
1958 struct hlist_node *h;
1960 hlist_for_each_entry_safe(f, h, from, hlist) {
1961 u64 key = i40e_addr_to_hkey(f->macaddr);
1963 /* Move the element back into MAC filter list*/
1964 hlist_del(&f->hlist);
1965 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1970 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1971 * @vsi: Pointer to vsi struct
1972 * @from: Pointer to list which contains MAC filter entries - changes to
1973 * those entries needs to be undone.
1975 * MAC filter entries from this list were slated for addition.
1977 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1978 struct hlist_head *from)
1980 struct i40e_new_mac_filter *new;
1981 struct hlist_node *h;
1983 hlist_for_each_entry_safe(new, h, from, hlist) {
1984 /* We can simply free the wrapper structure */
1985 hlist_del(&new->hlist);
1991 * i40e_next_entry - Get the next non-broadcast filter from a list
1992 * @next: pointer to filter in list
1994 * Returns the next non-broadcast filter in the list. Required so that we
1995 * ignore broadcast filters within the list, since these are not handled via
1996 * the normal firmware update path.
1999 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2001 hlist_for_each_entry_continue(next, hlist) {
2002 if (!is_broadcast_ether_addr(next->f->macaddr))
2010 * i40e_update_filter_state - Update filter state based on return data
2012 * @count: Number of filters added
2013 * @add_list: return data from fw
2014 * @add_head: pointer to first filter in current batch
2016 * MAC filter entries from list were slated to be added to device. Returns
2017 * number of successful filters. Note that 0 does NOT mean success!
2020 i40e_update_filter_state(int count,
2021 struct i40e_aqc_add_macvlan_element_data *add_list,
2022 struct i40e_new_mac_filter *add_head)
2027 for (i = 0; i < count; i++) {
2028 /* Always check status of each filter. We don't need to check
2029 * the firmware return status because we pre-set the filter
2030 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2031 * request to the adminq. Thus, if it no longer matches then
2032 * we know the filter is active.
2034 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2035 add_head->state = I40E_FILTER_FAILED;
2037 add_head->state = I40E_FILTER_ACTIVE;
2041 add_head = i40e_next_filter(add_head);
2050 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2051 * @vsi: ptr to the VSI
2052 * @vsi_name: name to display in messages
2053 * @list: the list of filters to send to firmware
2054 * @num_del: the number of filters to delete
2055 * @retval: Set to -EIO on failure to delete
2057 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2058 * *retval instead of a return value so that success does not force ret_val to
2059 * be set to 0. This ensures that a sequence of calls to this function
2060 * preserve the previous value of *retval on successful delete.
2063 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2064 struct i40e_aqc_remove_macvlan_element_data *list,
2065 int num_del, int *retval)
2067 struct i40e_hw *hw = &vsi->back->hw;
2071 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2072 aq_err = hw->aq.asq_last_status;
2074 /* Explicitly ignore and do not report when firmware returns ENOENT */
2075 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2077 dev_info(&vsi->back->pdev->dev,
2078 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2079 vsi_name, i40e_stat_str(hw, aq_ret),
2080 i40e_aq_str(hw, aq_err));
2085 * i40e_aqc_add_filters - Request firmware to add a set of filters
2086 * @vsi: ptr to the VSI
2087 * @vsi_name: name to display in messages
2088 * @list: the list of filters to send to firmware
2089 * @add_head: Position in the add hlist
2090 * @num_add: the number of filters to add
2092 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2093 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2094 * space for more filters.
2097 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2098 struct i40e_aqc_add_macvlan_element_data *list,
2099 struct i40e_new_mac_filter *add_head,
2102 struct i40e_hw *hw = &vsi->back->hw;
2105 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2106 aq_err = hw->aq.asq_last_status;
2107 fcnt = i40e_update_filter_state(num_add, list, add_head);
2109 if (fcnt != num_add) {
2110 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2111 dev_warn(&vsi->back->pdev->dev,
2112 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2113 i40e_aq_str(hw, aq_err),
2119 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2120 * @vsi: pointer to the VSI
2121 * @vsi_name: the VSI name
2124 * This function sets or clears the promiscuous broadcast flags for VLAN
2125 * filters in order to properly receive broadcast frames. Assumes that only
2126 * broadcast filters are passed.
2128 * Returns status indicating success or failure;
2131 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2132 struct i40e_mac_filter *f)
2134 bool enable = f->state == I40E_FILTER_NEW;
2135 struct i40e_hw *hw = &vsi->back->hw;
2138 if (f->vlan == I40E_VLAN_ANY) {
2139 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2144 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2152 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2153 dev_warn(&vsi->back->pdev->dev,
2154 "Error %s, forcing overflow promiscuous on %s\n",
2155 i40e_aq_str(hw, hw->aq.asq_last_status),
2163 * i40e_set_promiscuous - set promiscuous mode
2164 * @pf: board private structure
2165 * @promisc: promisc on or off
2167 * There are different ways of setting promiscuous mode on a PF depending on
2168 * what state/environment we're in. This identifies and sets it appropriately.
2169 * Returns 0 on success.
2171 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2173 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2174 struct i40e_hw *hw = &pf->hw;
2177 if (vsi->type == I40E_VSI_MAIN &&
2178 pf->lan_veb != I40E_NO_VEB &&
2179 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2180 /* set defport ON for Main VSI instead of true promisc
2181 * this way we will get all unicast/multicast and VLAN
2182 * promisc behavior but will not get VF or VMDq traffic
2183 * replicated on the Main VSI.
2186 aq_ret = i40e_aq_set_default_vsi(hw,
2190 aq_ret = i40e_aq_clear_default_vsi(hw,
2194 dev_info(&pf->pdev->dev,
2195 "Set default VSI failed, err %s, aq_err %s\n",
2196 i40e_stat_str(hw, aq_ret),
2197 i40e_aq_str(hw, hw->aq.asq_last_status));
2200 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2206 dev_info(&pf->pdev->dev,
2207 "set unicast promisc failed, err %s, aq_err %s\n",
2208 i40e_stat_str(hw, aq_ret),
2209 i40e_aq_str(hw, hw->aq.asq_last_status));
2211 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2216 dev_info(&pf->pdev->dev,
2217 "set multicast promisc failed, err %s, aq_err %s\n",
2218 i40e_stat_str(hw, aq_ret),
2219 i40e_aq_str(hw, hw->aq.asq_last_status));
2224 pf->cur_promisc = promisc;
2230 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2231 * @vsi: ptr to the VSI
2233 * Push any outstanding VSI filter changes through the AdminQ.
2235 * Returns 0 or error value
2237 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2239 struct hlist_head tmp_add_list, tmp_del_list;
2240 struct i40e_mac_filter *f;
2241 struct i40e_new_mac_filter *new, *add_head = NULL;
2242 struct i40e_hw *hw = &vsi->back->hw;
2243 bool old_overflow, new_overflow;
2244 unsigned int failed_filters = 0;
2245 unsigned int vlan_filters = 0;
2246 char vsi_name[16] = "PF";
2247 int filter_list_len = 0;
2248 i40e_status aq_ret = 0;
2249 u32 changed_flags = 0;
2250 struct hlist_node *h;
2259 /* empty array typed pointers, kcalloc later */
2260 struct i40e_aqc_add_macvlan_element_data *add_list;
2261 struct i40e_aqc_remove_macvlan_element_data *del_list;
2263 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2264 usleep_range(1000, 2000);
2267 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2270 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2271 vsi->current_netdev_flags = vsi->netdev->flags;
2274 INIT_HLIST_HEAD(&tmp_add_list);
2275 INIT_HLIST_HEAD(&tmp_del_list);
2277 if (vsi->type == I40E_VSI_SRIOV)
2278 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2279 else if (vsi->type != I40E_VSI_MAIN)
2280 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2282 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2283 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2285 spin_lock_bh(&vsi->mac_filter_hash_lock);
2286 /* Create a list of filters to delete. */
2287 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2288 if (f->state == I40E_FILTER_REMOVE) {
2289 /* Move the element into temporary del_list */
2290 hash_del(&f->hlist);
2291 hlist_add_head(&f->hlist, &tmp_del_list);
2293 /* Avoid counting removed filters */
2296 if (f->state == I40E_FILTER_NEW) {
2297 /* Create a temporary i40e_new_mac_filter */
2298 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2300 goto err_no_memory_locked;
2302 /* Store pointer to the real filter */
2304 new->state = f->state;
2306 /* Add it to the hash list */
2307 hlist_add_head(&new->hlist, &tmp_add_list);
2310 /* Count the number of active (current and new) VLAN
2311 * filters we have now. Does not count filters which
2312 * are marked for deletion.
2318 retval = i40e_correct_mac_vlan_filters(vsi,
2323 goto err_no_memory_locked;
2325 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2328 /* Now process 'del_list' outside the lock */
2329 if (!hlist_empty(&tmp_del_list)) {
2330 filter_list_len = hw->aq.asq_buf_size /
2331 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2332 list_size = filter_list_len *
2333 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2334 del_list = kzalloc(list_size, GFP_ATOMIC);
2338 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2341 /* handle broadcast filters by updating the broadcast
2342 * promiscuous flag and release filter list.
2344 if (is_broadcast_ether_addr(f->macaddr)) {
2345 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2347 hlist_del(&f->hlist);
2352 /* add to delete list */
2353 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2354 if (f->vlan == I40E_VLAN_ANY) {
2355 del_list[num_del].vlan_tag = 0;
2356 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2358 del_list[num_del].vlan_tag =
2359 cpu_to_le16((u16)(f->vlan));
2362 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2363 del_list[num_del].flags = cmd_flags;
2366 /* flush a full buffer */
2367 if (num_del == filter_list_len) {
2368 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2370 memset(del_list, 0, list_size);
2373 /* Release memory for MAC filter entries which were
2374 * synced up with HW.
2376 hlist_del(&f->hlist);
2381 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2389 if (!hlist_empty(&tmp_add_list)) {
2390 /* Do all the adds now. */
2391 filter_list_len = hw->aq.asq_buf_size /
2392 sizeof(struct i40e_aqc_add_macvlan_element_data);
2393 list_size = filter_list_len *
2394 sizeof(struct i40e_aqc_add_macvlan_element_data);
2395 add_list = kzalloc(list_size, GFP_ATOMIC);
2400 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2401 /* handle broadcast filters by updating the broadcast
2402 * promiscuous flag instead of adding a MAC filter.
2404 if (is_broadcast_ether_addr(new->f->macaddr)) {
2405 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2407 new->state = I40E_FILTER_FAILED;
2409 new->state = I40E_FILTER_ACTIVE;
2413 /* add to add array */
2417 ether_addr_copy(add_list[num_add].mac_addr,
2419 if (new->f->vlan == I40E_VLAN_ANY) {
2420 add_list[num_add].vlan_tag = 0;
2421 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2423 add_list[num_add].vlan_tag =
2424 cpu_to_le16((u16)(new->f->vlan));
2426 add_list[num_add].queue_number = 0;
2427 /* set invalid match method for later detection */
2428 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2429 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2430 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2433 /* flush a full buffer */
2434 if (num_add == filter_list_len) {
2435 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2437 memset(add_list, 0, list_size);
2442 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2445 /* Now move all of the filters from the temp add list back to
2448 spin_lock_bh(&vsi->mac_filter_hash_lock);
2449 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2450 /* Only update the state if we're still NEW */
2451 if (new->f->state == I40E_FILTER_NEW)
2452 new->f->state = new->state;
2453 hlist_del(&new->hlist);
2456 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2461 /* Determine the number of active and failed filters. */
2462 spin_lock_bh(&vsi->mac_filter_hash_lock);
2463 vsi->active_filters = 0;
2464 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2465 if (f->state == I40E_FILTER_ACTIVE)
2466 vsi->active_filters++;
2467 else if (f->state == I40E_FILTER_FAILED)
2470 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2472 /* Check if we are able to exit overflow promiscuous mode. We can
2473 * safely exit if we didn't just enter, we no longer have any failed
2474 * filters, and we have reduced filters below the threshold value.
2476 if (old_overflow && !failed_filters &&
2477 vsi->active_filters < vsi->promisc_threshold) {
2478 dev_info(&pf->pdev->dev,
2479 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2481 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2482 vsi->promisc_threshold = 0;
2485 /* if the VF is not trusted do not do promisc */
2486 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2487 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2491 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2493 /* If we are entering overflow promiscuous, we need to calculate a new
2494 * threshold for when we are safe to exit
2496 if (!old_overflow && new_overflow)
2497 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2499 /* check for changes in promiscuous modes */
2500 if (changed_flags & IFF_ALLMULTI) {
2501 bool cur_multipromisc;
2503 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2504 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2509 retval = i40e_aq_rc_to_posix(aq_ret,
2510 hw->aq.asq_last_status);
2511 dev_info(&pf->pdev->dev,
2512 "set multi promisc failed on %s, err %s aq_err %s\n",
2514 i40e_stat_str(hw, aq_ret),
2515 i40e_aq_str(hw, hw->aq.asq_last_status));
2519 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2522 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2524 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2526 retval = i40e_aq_rc_to_posix(aq_ret,
2527 hw->aq.asq_last_status);
2528 dev_info(&pf->pdev->dev,
2529 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2530 cur_promisc ? "on" : "off",
2532 i40e_stat_str(hw, aq_ret),
2533 i40e_aq_str(hw, hw->aq.asq_last_status));
2537 /* if something went wrong then set the changed flag so we try again */
2539 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2541 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2545 /* Restore elements on the temporary add and delete lists */
2546 spin_lock_bh(&vsi->mac_filter_hash_lock);
2547 err_no_memory_locked:
2548 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2549 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2550 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2552 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2553 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2558 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2559 * @pf: board private structure
2561 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2567 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2570 for (v = 0; v < pf->num_alloc_vsi; v++) {
2572 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2573 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2576 /* come back and try again later */
2577 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2586 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2589 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2591 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2592 return I40E_RXBUFFER_2048;
2594 return I40E_RXBUFFER_3072;
2598 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2599 * @netdev: network interface device structure
2600 * @new_mtu: new value for maximum frame size
2602 * Returns 0 on success, negative on failure
2604 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2606 struct i40e_netdev_priv *np = netdev_priv(netdev);
2607 struct i40e_vsi *vsi = np->vsi;
2608 struct i40e_pf *pf = vsi->back;
2610 if (i40e_enabled_xdp_vsi(vsi)) {
2611 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2613 if (frame_size > i40e_max_xdp_frame_size(vsi))
2617 netdev_info(netdev, "changing MTU from %d to %d\n",
2618 netdev->mtu, new_mtu);
2619 netdev->mtu = new_mtu;
2620 if (netif_running(netdev))
2621 i40e_vsi_reinit_locked(vsi);
2622 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2623 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2628 * i40e_ioctl - Access the hwtstamp interface
2629 * @netdev: network interface device structure
2630 * @ifr: interface request data
2631 * @cmd: ioctl command
2633 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2635 struct i40e_netdev_priv *np = netdev_priv(netdev);
2636 struct i40e_pf *pf = np->vsi->back;
2640 return i40e_ptp_get_ts_config(pf, ifr);
2642 return i40e_ptp_set_ts_config(pf, ifr);
2649 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2650 * @vsi: the vsi being adjusted
2652 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2654 struct i40e_vsi_context ctxt;
2657 if ((vsi->info.valid_sections &
2658 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2659 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2660 return; /* already enabled */
2662 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2663 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2664 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2666 ctxt.seid = vsi->seid;
2667 ctxt.info = vsi->info;
2668 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2670 dev_info(&vsi->back->pdev->dev,
2671 "update vlan stripping failed, err %s aq_err %s\n",
2672 i40e_stat_str(&vsi->back->hw, ret),
2673 i40e_aq_str(&vsi->back->hw,
2674 vsi->back->hw.aq.asq_last_status));
2679 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2680 * @vsi: the vsi being adjusted
2682 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2684 struct i40e_vsi_context ctxt;
2687 if ((vsi->info.valid_sections &
2688 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2689 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2690 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2691 return; /* already disabled */
2693 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2694 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2695 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2697 ctxt.seid = vsi->seid;
2698 ctxt.info = vsi->info;
2699 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2701 dev_info(&vsi->back->pdev->dev,
2702 "update vlan stripping failed, err %s aq_err %s\n",
2703 i40e_stat_str(&vsi->back->hw, ret),
2704 i40e_aq_str(&vsi->back->hw,
2705 vsi->back->hw.aq.asq_last_status));
2710 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2711 * @vsi: the vsi being configured
2712 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2714 * This is a helper function for adding a new MAC/VLAN filter with the
2715 * specified VLAN for each existing MAC address already in the hash table.
2716 * This function does *not* perform any accounting to update filters based on
2719 * NOTE: this function expects to be called while under the
2720 * mac_filter_hash_lock
2722 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2724 struct i40e_mac_filter *f, *add_f;
2725 struct hlist_node *h;
2728 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2729 if (f->state == I40E_FILTER_REMOVE)
2731 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2733 dev_info(&vsi->back->pdev->dev,
2734 "Could not add vlan filter %d for %pM\n",
2744 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2745 * @vsi: the VSI being configured
2746 * @vid: VLAN id to be added
2748 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2755 /* The network stack will attempt to add VID=0, with the intention to
2756 * receive priority tagged packets with a VLAN of 0. Our HW receives
2757 * these packets by default when configured to receive untagged
2758 * packets, so we don't need to add a filter for this case.
2759 * Additionally, HW interprets adding a VID=0 filter as meaning to
2760 * receive *only* tagged traffic and stops receiving untagged traffic.
2761 * Thus, we do not want to actually add a filter for VID=0
2766 /* Locked once because all functions invoked below iterates list*/
2767 spin_lock_bh(&vsi->mac_filter_hash_lock);
2768 err = i40e_add_vlan_all_mac(vsi, vid);
2769 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2773 /* schedule our worker thread which will take care of
2774 * applying the new filter changes
2776 i40e_service_event_schedule(vsi->back);
2781 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2782 * @vsi: the vsi being configured
2783 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2785 * This function should be used to remove all VLAN filters which match the
2786 * given VID. It does not schedule the service event and does not take the
2787 * mac_filter_hash_lock so it may be combined with other operations under
2788 * a single invocation of the mac_filter_hash_lock.
2790 * NOTE: this function expects to be called while under the
2791 * mac_filter_hash_lock
2793 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2795 struct i40e_mac_filter *f;
2796 struct hlist_node *h;
2799 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2801 __i40e_del_filter(vsi, f);
2806 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2807 * @vsi: the VSI being configured
2808 * @vid: VLAN id to be removed
2810 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2812 if (!vid || vsi->info.pvid)
2815 spin_lock_bh(&vsi->mac_filter_hash_lock);
2816 i40e_rm_vlan_all_mac(vsi, vid);
2817 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2819 /* schedule our worker thread which will take care of
2820 * applying the new filter changes
2822 i40e_service_event_schedule(vsi->back);
2826 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2827 * @netdev: network interface to be adjusted
2828 * @proto: unused protocol value
2829 * @vid: vlan id to be added
2831 * net_device_ops implementation for adding vlan ids
2833 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2834 __always_unused __be16 proto, u16 vid)
2836 struct i40e_netdev_priv *np = netdev_priv(netdev);
2837 struct i40e_vsi *vsi = np->vsi;
2840 if (vid >= VLAN_N_VID)
2843 ret = i40e_vsi_add_vlan(vsi, vid);
2845 set_bit(vid, vsi->active_vlans);
2851 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2852 * @netdev: network interface to be adjusted
2853 * @proto: unused protocol value
2854 * @vid: vlan id to be added
2856 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
2857 __always_unused __be16 proto, u16 vid)
2859 struct i40e_netdev_priv *np = netdev_priv(netdev);
2860 struct i40e_vsi *vsi = np->vsi;
2862 if (vid >= VLAN_N_VID)
2864 set_bit(vid, vsi->active_vlans);
2868 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2869 * @netdev: network interface to be adjusted
2870 * @proto: unused protocol value
2871 * @vid: vlan id to be removed
2873 * net_device_ops implementation for removing vlan ids
2875 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2876 __always_unused __be16 proto, u16 vid)
2878 struct i40e_netdev_priv *np = netdev_priv(netdev);
2879 struct i40e_vsi *vsi = np->vsi;
2881 /* return code is ignored as there is nothing a user
2882 * can do about failure to remove and a log message was
2883 * already printed from the other function
2885 i40e_vsi_kill_vlan(vsi, vid);
2887 clear_bit(vid, vsi->active_vlans);
2893 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2894 * @vsi: the vsi being brought back up
2896 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2903 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2904 i40e_vlan_stripping_enable(vsi);
2906 i40e_vlan_stripping_disable(vsi);
2908 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2909 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
2914 * i40e_vsi_add_pvid - Add pvid for the VSI
2915 * @vsi: the vsi being adjusted
2916 * @vid: the vlan id to set as a PVID
2918 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2920 struct i40e_vsi_context ctxt;
2923 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2924 vsi->info.pvid = cpu_to_le16(vid);
2925 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2926 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2927 I40E_AQ_VSI_PVLAN_EMOD_STR;
2929 ctxt.seid = vsi->seid;
2930 ctxt.info = vsi->info;
2931 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2933 dev_info(&vsi->back->pdev->dev,
2934 "add pvid failed, err %s aq_err %s\n",
2935 i40e_stat_str(&vsi->back->hw, ret),
2936 i40e_aq_str(&vsi->back->hw,
2937 vsi->back->hw.aq.asq_last_status));
2945 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2946 * @vsi: the vsi being adjusted
2948 * Just use the vlan_rx_register() service to put it back to normal
2950 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2952 i40e_vlan_stripping_disable(vsi);
2958 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2959 * @vsi: ptr to the VSI
2961 * If this function returns with an error, then it's possible one or
2962 * more of the rings is populated (while the rest are not). It is the
2963 * callers duty to clean those orphaned rings.
2965 * Return 0 on success, negative on failure
2967 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2971 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2972 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2974 if (!i40e_enabled_xdp_vsi(vsi))
2977 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2978 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
2984 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2985 * @vsi: ptr to the VSI
2987 * Free VSI's transmit software resources
2989 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2993 if (vsi->tx_rings) {
2994 for (i = 0; i < vsi->num_queue_pairs; i++)
2995 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2996 i40e_free_tx_resources(vsi->tx_rings[i]);
2999 if (vsi->xdp_rings) {
3000 for (i = 0; i < vsi->num_queue_pairs; i++)
3001 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3002 i40e_free_tx_resources(vsi->xdp_rings[i]);
3007 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3008 * @vsi: ptr to the VSI
3010 * If this function returns with an error, then it's possible one or
3011 * more of the rings is populated (while the rest are not). It is the
3012 * callers duty to clean those orphaned rings.
3014 * Return 0 on success, negative on failure
3016 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3020 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3021 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3026 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3027 * @vsi: ptr to the VSI
3029 * Free all receive software resources
3031 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3038 for (i = 0; i < vsi->num_queue_pairs; i++)
3039 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3040 i40e_free_rx_resources(vsi->rx_rings[i]);
3044 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3045 * @ring: The Tx ring to configure
3047 * This enables/disables XPS for a given Tx descriptor ring
3048 * based on the TCs enabled for the VSI that ring belongs to.
3050 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3054 if (!ring->q_vector || !ring->netdev || ring->ch)
3057 /* We only initialize XPS once, so as not to overwrite user settings */
3058 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3061 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3062 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3067 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3068 * @ring: The Tx ring to configure
3070 * Configure the Tx descriptor ring in the HMC context.
3072 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3074 struct i40e_vsi *vsi = ring->vsi;
3075 u16 pf_q = vsi->base_queue + ring->queue_index;
3076 struct i40e_hw *hw = &vsi->back->hw;
3077 struct i40e_hmc_obj_txq tx_ctx;
3078 i40e_status err = 0;
3081 if (ring_is_xdp(ring))
3082 ring->xsk_umem = i40e_xsk_umem(ring);
3084 /* some ATR related tx ring init */
3085 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3086 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3087 ring->atr_count = 0;
3089 ring->atr_sample_rate = 0;
3093 i40e_config_xps_tx_ring(ring);
3095 /* clear the context structure first */
3096 memset(&tx_ctx, 0, sizeof(tx_ctx));
3098 tx_ctx.new_context = 1;
3099 tx_ctx.base = (ring->dma / 128);
3100 tx_ctx.qlen = ring->count;
3101 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3102 I40E_FLAG_FD_ATR_ENABLED));
3103 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3104 /* FDIR VSI tx ring can still use RS bit and writebacks */
3105 if (vsi->type != I40E_VSI_FDIR)
3106 tx_ctx.head_wb_ena = 1;
3107 tx_ctx.head_wb_addr = ring->dma +
3108 (ring->count * sizeof(struct i40e_tx_desc));
3110 /* As part of VSI creation/update, FW allocates certain
3111 * Tx arbitration queue sets for each TC enabled for
3112 * the VSI. The FW returns the handles to these queue
3113 * sets as part of the response buffer to Add VSI,
3114 * Update VSI, etc. AQ commands. It is expected that
3115 * these queue set handles be associated with the Tx
3116 * queues by the driver as part of the TX queue context
3117 * initialization. This has to be done regardless of
3118 * DCB as by default everything is mapped to TC0.
3123 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3126 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3128 tx_ctx.rdylist_act = 0;
3130 /* clear the context in the HMC */
3131 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3133 dev_info(&vsi->back->pdev->dev,
3134 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3135 ring->queue_index, pf_q, err);
3139 /* set the context in the HMC */
3140 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3142 dev_info(&vsi->back->pdev->dev,
3143 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3144 ring->queue_index, pf_q, err);
3148 /* Now associate this queue with this PCI function */
3150 if (ring->ch->type == I40E_VSI_VMDQ2)
3151 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3155 qtx_ctl |= (ring->ch->vsi_number <<
3156 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3157 I40E_QTX_CTL_VFVM_INDX_MASK;
3159 if (vsi->type == I40E_VSI_VMDQ2) {
3160 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3161 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3162 I40E_QTX_CTL_VFVM_INDX_MASK;
3164 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3168 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3169 I40E_QTX_CTL_PF_INDX_MASK);
3170 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3173 /* cache tail off for easier writes later */
3174 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3180 * i40e_configure_rx_ring - Configure a receive ring context
3181 * @ring: The Rx ring to configure
3183 * Configure the Rx descriptor ring in the HMC context.
3185 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3187 struct i40e_vsi *vsi = ring->vsi;
3188 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3189 u16 pf_q = vsi->base_queue + ring->queue_index;
3190 struct i40e_hw *hw = &vsi->back->hw;
3191 struct i40e_hmc_obj_rxq rx_ctx;
3192 i40e_status err = 0;
3196 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3198 /* clear the context structure first */
3199 memset(&rx_ctx, 0, sizeof(rx_ctx));
3201 if (ring->vsi->type == I40E_VSI_MAIN)
3202 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3204 ring->xsk_umem = i40e_xsk_umem(ring);
3205 if (ring->xsk_umem) {
3206 ring->rx_buf_len = ring->xsk_umem->chunk_size_nohr -
3207 XDP_PACKET_HEADROOM;
3208 /* For AF_XDP ZC, we disallow packets to span on
3209 * multiple buffers, thus letting us skip that
3210 * handling in the fast-path.
3213 ring->zca.free = i40e_zca_free;
3214 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3219 dev_info(&vsi->back->pdev->dev,
3220 "Registered XDP mem model MEM_TYPE_ZERO_COPY on Rx ring %d\n",
3224 ring->rx_buf_len = vsi->rx_buf_len;
3225 if (ring->vsi->type == I40E_VSI_MAIN) {
3226 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3227 MEM_TYPE_PAGE_SHARED,
3234 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3235 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3237 rx_ctx.base = (ring->dma / 128);
3238 rx_ctx.qlen = ring->count;
3240 /* use 32 byte descriptors */
3243 /* descriptor type is always zero
3246 rx_ctx.hsplit_0 = 0;
3248 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3249 if (hw->revision_id == 0)
3250 rx_ctx.lrxqthresh = 0;
3252 rx_ctx.lrxqthresh = 1;
3253 rx_ctx.crcstrip = 1;
3255 /* this controls whether VLAN is stripped from inner headers */
3257 /* set the prefena field to 1 because the manual says to */
3260 /* clear the context in the HMC */
3261 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3263 dev_info(&vsi->back->pdev->dev,
3264 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3265 ring->queue_index, pf_q, err);
3269 /* set the context in the HMC */
3270 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3272 dev_info(&vsi->back->pdev->dev,
3273 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3274 ring->queue_index, pf_q, err);
3278 /* configure Rx buffer alignment */
3279 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3280 clear_ring_build_skb_enabled(ring);
3282 set_ring_build_skb_enabled(ring);
3284 /* cache tail for quicker writes, and clear the reg before use */
3285 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3286 writel(0, ring->tail);
3288 ok = ring->xsk_umem ?
3289 i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring)) :
3290 !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3292 /* Log this in case the user has forgotten to give the kernel
3293 * any buffers, even later in the application.
3295 dev_info(&vsi->back->pdev->dev,
3296 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3297 ring->xsk_umem ? "UMEM enabled " : "",
3298 ring->queue_index, pf_q);
3305 * i40e_vsi_configure_tx - Configure the VSI for Tx
3306 * @vsi: VSI structure describing this set of rings and resources
3308 * Configure the Tx VSI for operation.
3310 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3315 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3316 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3318 if (!i40e_enabled_xdp_vsi(vsi))
3321 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3322 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3328 * i40e_vsi_configure_rx - Configure the VSI for Rx
3329 * @vsi: the VSI being configured
3331 * Configure the Rx VSI for operation.
3333 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3338 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3339 vsi->max_frame = I40E_MAX_RXBUFFER;
3340 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3341 #if (PAGE_SIZE < 8192)
3342 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3343 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3344 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3345 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3348 vsi->max_frame = I40E_MAX_RXBUFFER;
3349 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3353 /* set up individual rings */
3354 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3355 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3361 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3362 * @vsi: ptr to the VSI
3364 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3366 struct i40e_ring *tx_ring, *rx_ring;
3367 u16 qoffset, qcount;
3370 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3371 /* Reset the TC information */
3372 for (i = 0; i < vsi->num_queue_pairs; i++) {
3373 rx_ring = vsi->rx_rings[i];
3374 tx_ring = vsi->tx_rings[i];
3375 rx_ring->dcb_tc = 0;
3376 tx_ring->dcb_tc = 0;
3381 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3382 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3385 qoffset = vsi->tc_config.tc_info[n].qoffset;
3386 qcount = vsi->tc_config.tc_info[n].qcount;
3387 for (i = qoffset; i < (qoffset + qcount); i++) {
3388 rx_ring = vsi->rx_rings[i];
3389 tx_ring = vsi->tx_rings[i];
3390 rx_ring->dcb_tc = n;
3391 tx_ring->dcb_tc = n;
3397 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3398 * @vsi: ptr to the VSI
3400 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3403 i40e_set_rx_mode(vsi->netdev);
3407 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3408 * @vsi: Pointer to the targeted VSI
3410 * This function replays the hlist on the hw where all the SB Flow Director
3411 * filters were saved.
3413 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3415 struct i40e_fdir_filter *filter;
3416 struct i40e_pf *pf = vsi->back;
3417 struct hlist_node *node;
3419 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3422 /* Reset FDir counters as we're replaying all existing filters */
3423 pf->fd_tcp4_filter_cnt = 0;
3424 pf->fd_udp4_filter_cnt = 0;
3425 pf->fd_sctp4_filter_cnt = 0;
3426 pf->fd_ip4_filter_cnt = 0;
3428 hlist_for_each_entry_safe(filter, node,
3429 &pf->fdir_filter_list, fdir_node) {
3430 i40e_add_del_fdir(vsi, filter, true);
3435 * i40e_vsi_configure - Set up the VSI for action
3436 * @vsi: the VSI being configured
3438 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3442 i40e_set_vsi_rx_mode(vsi);
3443 i40e_restore_vlan(vsi);
3444 i40e_vsi_config_dcb_rings(vsi);
3445 err = i40e_vsi_configure_tx(vsi);
3447 err = i40e_vsi_configure_rx(vsi);
3453 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3454 * @vsi: the VSI being configured
3456 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3458 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3459 struct i40e_pf *pf = vsi->back;
3460 struct i40e_hw *hw = &pf->hw;
3465 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3466 * and PFINT_LNKLSTn registers, e.g.:
3467 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3469 qp = vsi->base_queue;
3470 vector = vsi->base_vector;
3471 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3472 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3474 q_vector->rx.next_update = jiffies + 1;
3475 q_vector->rx.target_itr =
3476 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3477 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3478 q_vector->rx.target_itr);
3479 q_vector->rx.current_itr = q_vector->rx.target_itr;
3481 q_vector->tx.next_update = jiffies + 1;
3482 q_vector->tx.target_itr =
3483 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3484 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3485 q_vector->tx.target_itr);
3486 q_vector->tx.current_itr = q_vector->tx.target_itr;
3488 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3489 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3491 /* Linked list for the queuepairs assigned to this vector */
3492 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3493 for (q = 0; q < q_vector->num_ringpairs; q++) {
3494 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3497 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3498 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3499 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3500 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3501 (I40E_QUEUE_TYPE_TX <<
3502 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3504 wr32(hw, I40E_QINT_RQCTL(qp), val);
3507 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3508 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3509 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3510 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3511 (I40E_QUEUE_TYPE_TX <<
3512 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3514 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3517 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3518 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3519 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3520 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3521 (I40E_QUEUE_TYPE_RX <<
3522 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3524 /* Terminate the linked list */
3525 if (q == (q_vector->num_ringpairs - 1))
3526 val |= (I40E_QUEUE_END_OF_LIST <<
3527 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3529 wr32(hw, I40E_QINT_TQCTL(qp), val);
3538 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3539 * @pf: pointer to private device data structure
3541 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3543 struct i40e_hw *hw = &pf->hw;
3546 /* clear things first */
3547 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3548 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3550 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3551 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3552 I40E_PFINT_ICR0_ENA_GRST_MASK |
3553 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3554 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3555 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3556 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3557 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3559 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3560 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3562 if (pf->flags & I40E_FLAG_PTP)
3563 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3565 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3567 /* SW_ITR_IDX = 0, but don't change INTENA */
3568 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3569 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3571 /* OTHER_ITR_IDX = 0 */
3572 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3576 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3577 * @vsi: the VSI being configured
3579 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3581 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3582 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3583 struct i40e_pf *pf = vsi->back;
3584 struct i40e_hw *hw = &pf->hw;
3587 /* set the ITR configuration */
3588 q_vector->rx.next_update = jiffies + 1;
3589 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3590 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr);
3591 q_vector->rx.current_itr = q_vector->rx.target_itr;
3592 q_vector->tx.next_update = jiffies + 1;
3593 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3594 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr);
3595 q_vector->tx.current_itr = q_vector->tx.target_itr;
3597 i40e_enable_misc_int_causes(pf);
3599 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3600 wr32(hw, I40E_PFINT_LNKLST0, 0);
3602 /* Associate the queue pair to the vector and enable the queue int */
3603 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3604 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3605 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3606 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3608 wr32(hw, I40E_QINT_RQCTL(0), val);
3610 if (i40e_enabled_xdp_vsi(vsi)) {
3611 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3612 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3614 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3616 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3619 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3620 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3621 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3623 wr32(hw, I40E_QINT_TQCTL(0), val);
3628 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3629 * @pf: board private structure
3631 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3633 struct i40e_hw *hw = &pf->hw;
3635 wr32(hw, I40E_PFINT_DYN_CTL0,
3636 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3641 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3642 * @pf: board private structure
3644 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3646 struct i40e_hw *hw = &pf->hw;
3649 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3650 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3651 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3653 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3658 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3659 * @irq: interrupt number
3660 * @data: pointer to a q_vector
3662 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3664 struct i40e_q_vector *q_vector = data;
3666 if (!q_vector->tx.ring && !q_vector->rx.ring)
3669 napi_schedule_irqoff(&q_vector->napi);
3675 * i40e_irq_affinity_notify - Callback for affinity changes
3676 * @notify: context as to what irq was changed
3677 * @mask: the new affinity mask
3679 * This is a callback function used by the irq_set_affinity_notifier function
3680 * so that we may register to receive changes to the irq affinity masks.
3682 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3683 const cpumask_t *mask)
3685 struct i40e_q_vector *q_vector =
3686 container_of(notify, struct i40e_q_vector, affinity_notify);
3688 cpumask_copy(&q_vector->affinity_mask, mask);
3692 * i40e_irq_affinity_release - Callback for affinity notifier release
3693 * @ref: internal core kernel usage
3695 * This is a callback function used by the irq_set_affinity_notifier function
3696 * to inform the current notification subscriber that they will no longer
3697 * receive notifications.
3699 static void i40e_irq_affinity_release(struct kref *ref) {}
3702 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3703 * @vsi: the VSI being configured
3704 * @basename: name for the vector
3706 * Allocates MSI-X vectors and requests interrupts from the kernel.
3708 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3710 int q_vectors = vsi->num_q_vectors;
3711 struct i40e_pf *pf = vsi->back;
3712 int base = vsi->base_vector;
3719 for (vector = 0; vector < q_vectors; vector++) {
3720 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3722 irq_num = pf->msix_entries[base + vector].vector;
3724 if (q_vector->tx.ring && q_vector->rx.ring) {
3725 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3726 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3728 } else if (q_vector->rx.ring) {
3729 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3730 "%s-%s-%d", basename, "rx", rx_int_idx++);
3731 } else if (q_vector->tx.ring) {
3732 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3733 "%s-%s-%d", basename, "tx", tx_int_idx++);
3735 /* skip this unused q_vector */
3738 err = request_irq(irq_num,
3744 dev_info(&pf->pdev->dev,
3745 "MSIX request_irq failed, error: %d\n", err);
3746 goto free_queue_irqs;
3749 /* register for affinity change notifications */
3750 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3751 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3752 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3753 /* Spread affinity hints out across online CPUs.
3755 * get_cpu_mask returns a static constant mask with
3756 * a permanent lifetime so it's ok to pass to
3757 * irq_set_affinity_hint without making a copy.
3759 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3760 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3763 vsi->irqs_ready = true;
3769 irq_num = pf->msix_entries[base + vector].vector;
3770 irq_set_affinity_notifier(irq_num, NULL);
3771 irq_set_affinity_hint(irq_num, NULL);
3772 free_irq(irq_num, &vsi->q_vectors[vector]);
3778 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3779 * @vsi: the VSI being un-configured
3781 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3783 struct i40e_pf *pf = vsi->back;
3784 struct i40e_hw *hw = &pf->hw;
3785 int base = vsi->base_vector;
3788 /* disable interrupt causation from each queue */
3789 for (i = 0; i < vsi->num_queue_pairs; i++) {
3792 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3793 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3794 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3796 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3797 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3798 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3800 if (!i40e_enabled_xdp_vsi(vsi))
3802 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3805 /* disable each interrupt */
3806 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3807 for (i = vsi->base_vector;
3808 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3809 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3812 for (i = 0; i < vsi->num_q_vectors; i++)
3813 synchronize_irq(pf->msix_entries[i + base].vector);
3815 /* Legacy and MSI mode - this stops all interrupt handling */
3816 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3817 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3819 synchronize_irq(pf->pdev->irq);
3824 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3825 * @vsi: the VSI being configured
3827 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3829 struct i40e_pf *pf = vsi->back;
3832 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3833 for (i = 0; i < vsi->num_q_vectors; i++)
3834 i40e_irq_dynamic_enable(vsi, i);
3836 i40e_irq_dynamic_enable_icr0(pf);
3839 i40e_flush(&pf->hw);
3844 * i40e_free_misc_vector - Free the vector that handles non-queue events
3845 * @pf: board private structure
3847 static void i40e_free_misc_vector(struct i40e_pf *pf)
3850 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3851 i40e_flush(&pf->hw);
3853 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3854 synchronize_irq(pf->msix_entries[0].vector);
3855 free_irq(pf->msix_entries[0].vector, pf);
3856 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3861 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3862 * @irq: interrupt number
3863 * @data: pointer to a q_vector
3865 * This is the handler used for all MSI/Legacy interrupts, and deals
3866 * with both queue and non-queue interrupts. This is also used in
3867 * MSIX mode to handle the non-queue interrupts.
3869 static irqreturn_t i40e_intr(int irq, void *data)
3871 struct i40e_pf *pf = (struct i40e_pf *)data;
3872 struct i40e_hw *hw = &pf->hw;
3873 irqreturn_t ret = IRQ_NONE;
3874 u32 icr0, icr0_remaining;
3877 icr0 = rd32(hw, I40E_PFINT_ICR0);
3878 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3880 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3881 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3884 /* if interrupt but no bits showing, must be SWINT */
3885 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3886 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3889 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3890 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3891 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3892 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3893 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
3896 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3897 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3898 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3899 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3901 /* We do not have a way to disarm Queue causes while leaving
3902 * interrupt enabled for all other causes, ideally
3903 * interrupt should be disabled while we are in NAPI but
3904 * this is not a performance path and napi_schedule()
3905 * can deal with rescheduling.
3907 if (!test_bit(__I40E_DOWN, pf->state))
3908 napi_schedule_irqoff(&q_vector->napi);
3911 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3912 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3913 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
3914 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3917 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3918 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3919 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
3922 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3923 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3924 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
3927 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3928 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
3929 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
3930 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3931 val = rd32(hw, I40E_GLGEN_RSTAT);
3932 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3933 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3934 if (val == I40E_RESET_CORER) {
3936 } else if (val == I40E_RESET_GLOBR) {
3938 } else if (val == I40E_RESET_EMPR) {
3940 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
3944 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3945 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3946 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3947 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3948 rd32(hw, I40E_PFHMC_ERRORINFO),
3949 rd32(hw, I40E_PFHMC_ERRORDATA));
3952 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3953 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3955 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3956 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3957 i40e_ptp_tx_hwtstamp(pf);
3961 /* If a critical error is pending we have no choice but to reset the
3963 * Report and mask out any remaining unexpected interrupts.
3965 icr0_remaining = icr0 & ena_mask;
3966 if (icr0_remaining) {
3967 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3969 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3970 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3971 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3972 dev_info(&pf->pdev->dev, "device will be reset\n");
3973 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
3974 i40e_service_event_schedule(pf);
3976 ena_mask &= ~icr0_remaining;
3981 /* re-enable interrupt causes */
3982 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3983 if (!test_bit(__I40E_DOWN, pf->state)) {
3984 i40e_service_event_schedule(pf);
3985 i40e_irq_dynamic_enable_icr0(pf);
3992 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3993 * @tx_ring: tx ring to clean
3994 * @budget: how many cleans we're allowed
3996 * Returns true if there's any budget left (e.g. the clean is finished)
3998 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4000 struct i40e_vsi *vsi = tx_ring->vsi;
4001 u16 i = tx_ring->next_to_clean;
4002 struct i40e_tx_buffer *tx_buf;
4003 struct i40e_tx_desc *tx_desc;
4005 tx_buf = &tx_ring->tx_bi[i];
4006 tx_desc = I40E_TX_DESC(tx_ring, i);
4007 i -= tx_ring->count;
4010 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4012 /* if next_to_watch is not set then there is no work pending */
4016 /* prevent any other reads prior to eop_desc */
4019 /* if the descriptor isn't done, no work yet to do */
4020 if (!(eop_desc->cmd_type_offset_bsz &
4021 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4024 /* clear next_to_watch to prevent false hangs */
4025 tx_buf->next_to_watch = NULL;
4027 tx_desc->buffer_addr = 0;
4028 tx_desc->cmd_type_offset_bsz = 0;
4029 /* move past filter desc */
4034 i -= tx_ring->count;
4035 tx_buf = tx_ring->tx_bi;
4036 tx_desc = I40E_TX_DESC(tx_ring, 0);
4038 /* unmap skb header data */
4039 dma_unmap_single(tx_ring->dev,
4040 dma_unmap_addr(tx_buf, dma),
4041 dma_unmap_len(tx_buf, len),
4043 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4044 kfree(tx_buf->raw_buf);
4046 tx_buf->raw_buf = NULL;
4047 tx_buf->tx_flags = 0;
4048 tx_buf->next_to_watch = NULL;
4049 dma_unmap_len_set(tx_buf, len, 0);
4050 tx_desc->buffer_addr = 0;
4051 tx_desc->cmd_type_offset_bsz = 0;
4053 /* move us past the eop_desc for start of next FD desc */
4058 i -= tx_ring->count;
4059 tx_buf = tx_ring->tx_bi;
4060 tx_desc = I40E_TX_DESC(tx_ring, 0);
4063 /* update budget accounting */
4065 } while (likely(budget));
4067 i += tx_ring->count;
4068 tx_ring->next_to_clean = i;
4070 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4071 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4077 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4078 * @irq: interrupt number
4079 * @data: pointer to a q_vector
4081 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4083 struct i40e_q_vector *q_vector = data;
4084 struct i40e_vsi *vsi;
4086 if (!q_vector->tx.ring)
4089 vsi = q_vector->tx.ring->vsi;
4090 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4096 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4097 * @vsi: the VSI being configured
4098 * @v_idx: vector index
4099 * @qp_idx: queue pair index
4101 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4103 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4104 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4105 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4107 tx_ring->q_vector = q_vector;
4108 tx_ring->next = q_vector->tx.ring;
4109 q_vector->tx.ring = tx_ring;
4110 q_vector->tx.count++;
4112 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4113 if (i40e_enabled_xdp_vsi(vsi)) {
4114 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4116 xdp_ring->q_vector = q_vector;
4117 xdp_ring->next = q_vector->tx.ring;
4118 q_vector->tx.ring = xdp_ring;
4119 q_vector->tx.count++;
4122 rx_ring->q_vector = q_vector;
4123 rx_ring->next = q_vector->rx.ring;
4124 q_vector->rx.ring = rx_ring;
4125 q_vector->rx.count++;
4129 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4130 * @vsi: the VSI being configured
4132 * This function maps descriptor rings to the queue-specific vectors
4133 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4134 * one vector per queue pair, but on a constrained vector budget, we
4135 * group the queue pairs as "efficiently" as possible.
4137 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4139 int qp_remaining = vsi->num_queue_pairs;
4140 int q_vectors = vsi->num_q_vectors;
4145 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4146 * group them so there are multiple queues per vector.
4147 * It is also important to go through all the vectors available to be
4148 * sure that if we don't use all the vectors, that the remaining vectors
4149 * are cleared. This is especially important when decreasing the
4150 * number of queues in use.
4152 for (; v_start < q_vectors; v_start++) {
4153 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4155 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4157 q_vector->num_ringpairs = num_ringpairs;
4158 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4160 q_vector->rx.count = 0;
4161 q_vector->tx.count = 0;
4162 q_vector->rx.ring = NULL;
4163 q_vector->tx.ring = NULL;
4165 while (num_ringpairs--) {
4166 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4174 * i40e_vsi_request_irq - Request IRQ from the OS
4175 * @vsi: the VSI being configured
4176 * @basename: name for the vector
4178 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4180 struct i40e_pf *pf = vsi->back;
4183 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4184 err = i40e_vsi_request_irq_msix(vsi, basename);
4185 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4186 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4189 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4193 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4198 #ifdef CONFIG_NET_POLL_CONTROLLER
4200 * i40e_netpoll - A Polling 'interrupt' handler
4201 * @netdev: network interface device structure
4203 * This is used by netconsole to send skbs without having to re-enable
4204 * interrupts. It's not called while the normal interrupt routine is executing.
4206 static void i40e_netpoll(struct net_device *netdev)
4208 struct i40e_netdev_priv *np = netdev_priv(netdev);
4209 struct i40e_vsi *vsi = np->vsi;
4210 struct i40e_pf *pf = vsi->back;
4213 /* if interface is down do nothing */
4214 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4217 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4218 for (i = 0; i < vsi->num_q_vectors; i++)
4219 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4221 i40e_intr(pf->pdev->irq, netdev);
4226 #define I40E_QTX_ENA_WAIT_COUNT 50
4229 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4230 * @pf: the PF being configured
4231 * @pf_q: the PF queue
4232 * @enable: enable or disable state of the queue
4234 * This routine will wait for the given Tx queue of the PF to reach the
4235 * enabled or disabled state.
4236 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4237 * multiple retries; else will return 0 in case of success.
4239 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4244 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4245 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4246 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4249 usleep_range(10, 20);
4251 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4258 * i40e_control_tx_q - Start or stop a particular Tx queue
4259 * @pf: the PF structure
4260 * @pf_q: the PF queue to configure
4261 * @enable: start or stop the queue
4263 * This function enables or disables a single queue. Note that any delay
4264 * required after the operation is expected to be handled by the caller of
4267 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4269 struct i40e_hw *hw = &pf->hw;
4273 /* warn the TX unit of coming changes */
4274 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4276 usleep_range(10, 20);
4278 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4279 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4280 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4281 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4283 usleep_range(1000, 2000);
4286 /* Skip if the queue is already in the requested state */
4287 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4290 /* turn on/off the queue */
4292 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4293 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4295 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4298 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4302 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4304 * @pf: the PF structure
4305 * @pf_q: the PF queue to configure
4306 * @is_xdp: true if the queue is used for XDP
4307 * @enable: start or stop the queue
4309 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4310 bool is_xdp, bool enable)
4314 i40e_control_tx_q(pf, pf_q, enable);
4316 /* wait for the change to finish */
4317 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4319 dev_info(&pf->pdev->dev,
4320 "VSI seid %d %sTx ring %d %sable timeout\n",
4321 seid, (is_xdp ? "XDP " : ""), pf_q,
4322 (enable ? "en" : "dis"));
4329 * i40e_vsi_control_tx - Start or stop a VSI's rings
4330 * @vsi: the VSI being configured
4331 * @enable: start or stop the rings
4333 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4335 struct i40e_pf *pf = vsi->back;
4336 int i, pf_q, ret = 0;
4338 pf_q = vsi->base_queue;
4339 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4340 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4342 false /*is xdp*/, enable);
4346 if (!i40e_enabled_xdp_vsi(vsi))
4349 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4350 pf_q + vsi->alloc_queue_pairs,
4351 true /*is xdp*/, enable);
4359 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4360 * @pf: the PF being configured
4361 * @pf_q: the PF queue
4362 * @enable: enable or disable state of the queue
4364 * This routine will wait for the given Rx queue of the PF to reach the
4365 * enabled or disabled state.
4366 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4367 * multiple retries; else will return 0 in case of success.
4369 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4374 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4375 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4376 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4379 usleep_range(10, 20);
4381 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4388 * i40e_control_rx_q - Start or stop a particular Rx queue
4389 * @pf: the PF structure
4390 * @pf_q: the PF queue to configure
4391 * @enable: start or stop the queue
4393 * This function enables or disables a single queue. Note that
4394 * any delay required after the operation is expected to be
4395 * handled by the caller of this function.
4397 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4399 struct i40e_hw *hw = &pf->hw;
4403 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4404 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4405 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4406 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4408 usleep_range(1000, 2000);
4411 /* Skip if the queue is already in the requested state */
4412 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4415 /* turn on/off the queue */
4417 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4419 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4421 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4425 * i40e_control_wait_rx_q
4426 * @pf: the PF structure
4427 * @pf_q: queue being configured
4428 * @enable: start or stop the rings
4430 * This function enables or disables a single queue along with waiting
4431 * for the change to finish. The caller of this function should handle
4432 * the delays needed in the case of disabling queues.
4434 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4438 i40e_control_rx_q(pf, pf_q, enable);
4440 /* wait for the change to finish */
4441 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4449 * i40e_vsi_control_rx - Start or stop a VSI's rings
4450 * @vsi: the VSI being configured
4451 * @enable: start or stop the rings
4453 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4455 struct i40e_pf *pf = vsi->back;
4456 int i, pf_q, ret = 0;
4458 pf_q = vsi->base_queue;
4459 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4460 ret = i40e_control_wait_rx_q(pf, pf_q, enable);
4462 dev_info(&pf->pdev->dev,
4463 "VSI seid %d Rx ring %d %sable timeout\n",
4464 vsi->seid, pf_q, (enable ? "en" : "dis"));
4469 /* Due to HW errata, on Rx disable only, the register can indicate done
4470 * before it really is. Needs 50ms to be sure
4479 * i40e_vsi_start_rings - Start a VSI's rings
4480 * @vsi: the VSI being configured
4482 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4486 /* do rx first for enable and last for disable */
4487 ret = i40e_vsi_control_rx(vsi, true);
4490 ret = i40e_vsi_control_tx(vsi, true);
4496 * i40e_vsi_stop_rings - Stop a VSI's rings
4497 * @vsi: the VSI being configured
4499 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4501 /* When port TX is suspended, don't wait */
4502 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4503 return i40e_vsi_stop_rings_no_wait(vsi);
4505 /* do rx first for enable and last for disable
4506 * Ignore return value, we need to shutdown whatever we can
4508 i40e_vsi_control_tx(vsi, false);
4509 i40e_vsi_control_rx(vsi, false);
4513 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4514 * @vsi: the VSI being shutdown
4516 * This function stops all the rings for a VSI but does not delay to verify
4517 * that rings have been disabled. It is expected that the caller is shutting
4518 * down multiple VSIs at once and will delay together for all the VSIs after
4519 * initiating the shutdown. This is particularly useful for shutting down lots
4520 * of VFs together. Otherwise, a large delay can be incurred while configuring
4521 * each VSI in serial.
4523 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4525 struct i40e_pf *pf = vsi->back;
4528 pf_q = vsi->base_queue;
4529 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4530 i40e_control_tx_q(pf, pf_q, false);
4531 i40e_control_rx_q(pf, pf_q, false);
4536 * i40e_vsi_free_irq - Free the irq association with the OS
4537 * @vsi: the VSI being configured
4539 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4541 struct i40e_pf *pf = vsi->back;
4542 struct i40e_hw *hw = &pf->hw;
4543 int base = vsi->base_vector;
4547 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4548 if (!vsi->q_vectors)
4551 if (!vsi->irqs_ready)
4554 vsi->irqs_ready = false;
4555 for (i = 0; i < vsi->num_q_vectors; i++) {
4560 irq_num = pf->msix_entries[vector].vector;
4562 /* free only the irqs that were actually requested */
4563 if (!vsi->q_vectors[i] ||
4564 !vsi->q_vectors[i]->num_ringpairs)
4567 /* clear the affinity notifier in the IRQ descriptor */
4568 irq_set_affinity_notifier(irq_num, NULL);
4569 /* remove our suggested affinity mask for this IRQ */
4570 irq_set_affinity_hint(irq_num, NULL);
4571 synchronize_irq(irq_num);
4572 free_irq(irq_num, vsi->q_vectors[i]);
4574 /* Tear down the interrupt queue link list
4576 * We know that they come in pairs and always
4577 * the Rx first, then the Tx. To clear the
4578 * link list, stick the EOL value into the
4579 * next_q field of the registers.
4581 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4582 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4583 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4584 val |= I40E_QUEUE_END_OF_LIST
4585 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4586 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4588 while (qp != I40E_QUEUE_END_OF_LIST) {
4591 val = rd32(hw, I40E_QINT_RQCTL(qp));
4593 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4594 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4595 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4596 I40E_QINT_RQCTL_INTEVENT_MASK);
4598 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4599 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4601 wr32(hw, I40E_QINT_RQCTL(qp), val);
4603 val = rd32(hw, I40E_QINT_TQCTL(qp));
4605 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4606 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4608 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4609 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4610 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4611 I40E_QINT_TQCTL_INTEVENT_MASK);
4613 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4614 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4616 wr32(hw, I40E_QINT_TQCTL(qp), val);
4621 free_irq(pf->pdev->irq, pf);
4623 val = rd32(hw, I40E_PFINT_LNKLST0);
4624 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4625 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4626 val |= I40E_QUEUE_END_OF_LIST
4627 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4628 wr32(hw, I40E_PFINT_LNKLST0, val);
4630 val = rd32(hw, I40E_QINT_RQCTL(qp));
4631 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4632 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4633 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4634 I40E_QINT_RQCTL_INTEVENT_MASK);
4636 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4637 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4639 wr32(hw, I40E_QINT_RQCTL(qp), val);
4641 val = rd32(hw, I40E_QINT_TQCTL(qp));
4643 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4644 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4645 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4646 I40E_QINT_TQCTL_INTEVENT_MASK);
4648 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4649 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4651 wr32(hw, I40E_QINT_TQCTL(qp), val);
4656 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4657 * @vsi: the VSI being configured
4658 * @v_idx: Index of vector to be freed
4660 * This function frees the memory allocated to the q_vector. In addition if
4661 * NAPI is enabled it will delete any references to the NAPI struct prior
4662 * to freeing the q_vector.
4664 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4666 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4667 struct i40e_ring *ring;
4672 /* disassociate q_vector from rings */
4673 i40e_for_each_ring(ring, q_vector->tx)
4674 ring->q_vector = NULL;
4676 i40e_for_each_ring(ring, q_vector->rx)
4677 ring->q_vector = NULL;
4679 /* only VSI w/ an associated netdev is set up w/ NAPI */
4681 netif_napi_del(&q_vector->napi);
4683 vsi->q_vectors[v_idx] = NULL;
4685 kfree_rcu(q_vector, rcu);
4689 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4690 * @vsi: the VSI being un-configured
4692 * This frees the memory allocated to the q_vectors and
4693 * deletes references to the NAPI struct.
4695 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4699 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4700 i40e_free_q_vector(vsi, v_idx);
4704 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4705 * @pf: board private structure
4707 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4709 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4710 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4711 pci_disable_msix(pf->pdev);
4712 kfree(pf->msix_entries);
4713 pf->msix_entries = NULL;
4714 kfree(pf->irq_pile);
4715 pf->irq_pile = NULL;
4716 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4717 pci_disable_msi(pf->pdev);
4719 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4723 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4724 * @pf: board private structure
4726 * We go through and clear interrupt specific resources and reset the structure
4727 * to pre-load conditions
4729 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4733 i40e_free_misc_vector(pf);
4735 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4736 I40E_IWARP_IRQ_PILE_ID);
4738 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4739 for (i = 0; i < pf->num_alloc_vsi; i++)
4741 i40e_vsi_free_q_vectors(pf->vsi[i]);
4742 i40e_reset_interrupt_capability(pf);
4746 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4747 * @vsi: the VSI being configured
4749 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4756 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4757 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4759 if (q_vector->rx.ring || q_vector->tx.ring)
4760 napi_enable(&q_vector->napi);
4765 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4766 * @vsi: the VSI being configured
4768 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4775 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4776 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4778 if (q_vector->rx.ring || q_vector->tx.ring)
4779 napi_disable(&q_vector->napi);
4784 * i40e_vsi_close - Shut down a VSI
4785 * @vsi: the vsi to be quelled
4787 static void i40e_vsi_close(struct i40e_vsi *vsi)
4789 struct i40e_pf *pf = vsi->back;
4790 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4792 i40e_vsi_free_irq(vsi);
4793 i40e_vsi_free_tx_resources(vsi);
4794 i40e_vsi_free_rx_resources(vsi);
4795 vsi->current_netdev_flags = 0;
4796 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
4797 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4798 set_bit(__I40E_CLIENT_RESET, pf->state);
4802 * i40e_quiesce_vsi - Pause a given VSI
4803 * @vsi: the VSI being paused
4805 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4807 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4810 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4811 if (vsi->netdev && netif_running(vsi->netdev))
4812 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4814 i40e_vsi_close(vsi);
4818 * i40e_unquiesce_vsi - Resume a given VSI
4819 * @vsi: the VSI being resumed
4821 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4823 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4826 if (vsi->netdev && netif_running(vsi->netdev))
4827 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4829 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4833 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4836 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4840 for (v = 0; v < pf->num_alloc_vsi; v++) {
4842 i40e_quiesce_vsi(pf->vsi[v]);
4847 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4850 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4854 for (v = 0; v < pf->num_alloc_vsi; v++) {
4856 i40e_unquiesce_vsi(pf->vsi[v]);
4861 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4862 * @vsi: the VSI being configured
4864 * Wait until all queues on a given VSI have been disabled.
4866 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4868 struct i40e_pf *pf = vsi->back;
4871 pf_q = vsi->base_queue;
4872 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4873 /* Check and wait for the Tx queue */
4874 ret = i40e_pf_txq_wait(pf, pf_q, false);
4876 dev_info(&pf->pdev->dev,
4877 "VSI seid %d Tx ring %d disable timeout\n",
4882 if (!i40e_enabled_xdp_vsi(vsi))
4885 /* Check and wait for the XDP Tx queue */
4886 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
4889 dev_info(&pf->pdev->dev,
4890 "VSI seid %d XDP Tx ring %d disable timeout\n",
4895 /* Check and wait for the Rx queue */
4896 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4898 dev_info(&pf->pdev->dev,
4899 "VSI seid %d Rx ring %d disable timeout\n",
4908 #ifdef CONFIG_I40E_DCB
4910 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4913 * This function waits for the queues to be in disabled state for all the
4914 * VSIs that are managed by this PF.
4916 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4920 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4922 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4934 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4935 * @pf: pointer to PF
4937 * Get TC map for ISCSI PF type that will include iSCSI TC
4940 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4942 struct i40e_dcb_app_priority_table app;
4943 struct i40e_hw *hw = &pf->hw;
4944 u8 enabled_tc = 1; /* TC0 is always enabled */
4946 /* Get the iSCSI APP TLV */
4947 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4949 for (i = 0; i < dcbcfg->numapps; i++) {
4950 app = dcbcfg->app[i];
4951 if (app.selector == I40E_APP_SEL_TCPIP &&
4952 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4953 tc = dcbcfg->etscfg.prioritytable[app.priority];
4954 enabled_tc |= BIT(tc);
4963 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4964 * @dcbcfg: the corresponding DCBx configuration structure
4966 * Return the number of TCs from given DCBx configuration
4968 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4970 int i, tc_unused = 0;
4974 /* Scan the ETS Config Priority Table to find
4975 * traffic class enabled for a given priority
4976 * and create a bitmask of enabled TCs
4978 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4979 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4981 /* Now scan the bitmask to check for
4982 * contiguous TCs starting with TC0
4984 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4985 if (num_tc & BIT(i)) {
4989 pr_err("Non-contiguous TC - Disabling DCB\n");
4997 /* There is always at least TC0 */
5005 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5006 * @dcbcfg: the corresponding DCBx configuration structure
5008 * Query the current DCB configuration and return the number of
5009 * traffic classes enabled from the given DCBX config
5011 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5013 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5017 for (i = 0; i < num_tc; i++)
5018 enabled_tc |= BIT(i);
5024 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5025 * @pf: PF being queried
5027 * Query the current MQPRIO configuration and return the number of
5028 * traffic classes enabled.
5030 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5032 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5033 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5034 u8 enabled_tc = 1, i;
5036 for (i = 1; i < num_tc; i++)
5037 enabled_tc |= BIT(i);
5042 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5043 * @pf: PF being queried
5045 * Return number of traffic classes enabled for the given PF
5047 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5049 struct i40e_hw *hw = &pf->hw;
5050 u8 i, enabled_tc = 1;
5052 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5054 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5055 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5057 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5058 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5061 /* SFP mode will be enabled for all TCs on port */
5062 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5063 return i40e_dcb_get_num_tc(dcbcfg);
5065 /* MFP mode return count of enabled TCs for this PF */
5066 if (pf->hw.func_caps.iscsi)
5067 enabled_tc = i40e_get_iscsi_tc_map(pf);
5069 return 1; /* Only TC0 */
5071 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5072 if (enabled_tc & BIT(i))
5079 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5080 * @pf: PF being queried
5082 * Return a bitmap for enabled traffic classes for this PF.
5084 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5086 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5087 return i40e_mqprio_get_enabled_tc(pf);
5089 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5092 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5093 return I40E_DEFAULT_TRAFFIC_CLASS;
5095 /* SFP mode we want PF to be enabled for all TCs */
5096 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5097 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5099 /* MFP enabled and iSCSI PF type */
5100 if (pf->hw.func_caps.iscsi)
5101 return i40e_get_iscsi_tc_map(pf);
5103 return I40E_DEFAULT_TRAFFIC_CLASS;
5107 * i40e_vsi_get_bw_info - Query VSI BW Information
5108 * @vsi: the VSI being queried
5110 * Returns 0 on success, negative value on failure
5112 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5114 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5115 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5116 struct i40e_pf *pf = vsi->back;
5117 struct i40e_hw *hw = &pf->hw;
5122 /* Get the VSI level BW configuration */
5123 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5125 dev_info(&pf->pdev->dev,
5126 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5127 i40e_stat_str(&pf->hw, ret),
5128 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5132 /* Get the VSI level BW configuration per TC */
5133 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5136 dev_info(&pf->pdev->dev,
5137 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5138 i40e_stat_str(&pf->hw, ret),
5139 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5143 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5144 dev_info(&pf->pdev->dev,
5145 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5146 bw_config.tc_valid_bits,
5147 bw_ets_config.tc_valid_bits);
5148 /* Still continuing */
5151 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5152 vsi->bw_max_quanta = bw_config.max_bw;
5153 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5154 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5155 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5156 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5157 vsi->bw_ets_limit_credits[i] =
5158 le16_to_cpu(bw_ets_config.credits[i]);
5159 /* 3 bits out of 4 for each TC */
5160 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5167 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5168 * @vsi: the VSI being configured
5169 * @enabled_tc: TC bitmap
5170 * @bw_share: BW shared credits per TC
5172 * Returns 0 on success, negative value on failure
5174 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5177 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5178 struct i40e_pf *pf = vsi->back;
5182 /* There is no need to reset BW when mqprio mode is on. */
5183 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5185 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5186 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5188 dev_info(&pf->pdev->dev,
5189 "Failed to reset tx rate for vsi->seid %u\n",
5193 bw_data.tc_valid_bits = enabled_tc;
5194 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5195 bw_data.tc_bw_credits[i] = bw_share[i];
5197 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5199 dev_info(&pf->pdev->dev,
5200 "AQ command Config VSI BW allocation per TC failed = %d\n",
5201 pf->hw.aq.asq_last_status);
5205 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5206 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5212 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5213 * @vsi: the VSI being configured
5214 * @enabled_tc: TC map to be enabled
5217 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5219 struct net_device *netdev = vsi->netdev;
5220 struct i40e_pf *pf = vsi->back;
5221 struct i40e_hw *hw = &pf->hw;
5224 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5230 netdev_reset_tc(netdev);
5234 /* Set up actual enabled TCs on the VSI */
5235 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5238 /* set per TC queues for the VSI */
5239 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5240 /* Only set TC queues for enabled tcs
5242 * e.g. For a VSI that has TC0 and TC3 enabled the
5243 * enabled_tc bitmap would be 0x00001001; the driver
5244 * will set the numtc for netdev as 2 that will be
5245 * referenced by the netdev layer as TC 0 and 1.
5247 if (vsi->tc_config.enabled_tc & BIT(i))
5248 netdev_set_tc_queue(netdev,
5249 vsi->tc_config.tc_info[i].netdev_tc,
5250 vsi->tc_config.tc_info[i].qcount,
5251 vsi->tc_config.tc_info[i].qoffset);
5254 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5257 /* Assign UP2TC map for the VSI */
5258 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5259 /* Get the actual TC# for the UP */
5260 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5261 /* Get the mapped netdev TC# for the UP */
5262 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5263 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5268 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5269 * @vsi: the VSI being configured
5270 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5272 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5273 struct i40e_vsi_context *ctxt)
5275 /* copy just the sections touched not the entire info
5276 * since not all sections are valid as returned by
5279 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5280 memcpy(&vsi->info.queue_mapping,
5281 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5282 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5283 sizeof(vsi->info.tc_mapping));
5287 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5288 * @vsi: VSI to be configured
5289 * @enabled_tc: TC bitmap
5291 * This configures a particular VSI for TCs that are mapped to the
5292 * given TC bitmap. It uses default bandwidth share for TCs across
5293 * VSIs to configure TC for a particular VSI.
5296 * It is expected that the VSI queues have been quisced before calling
5299 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5301 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5302 struct i40e_pf *pf = vsi->back;
5303 struct i40e_hw *hw = &pf->hw;
5304 struct i40e_vsi_context ctxt;
5308 /* Check if enabled_tc is same as existing or new TCs */
5309 if (vsi->tc_config.enabled_tc == enabled_tc &&
5310 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5313 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5314 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5315 if (enabled_tc & BIT(i))
5319 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5321 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5323 dev_info(&pf->pdev->dev,
5324 "Failed configuring TC map %d for VSI %d\n",
5325 enabled_tc, vsi->seid);
5326 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5329 dev_info(&pf->pdev->dev,
5330 "Failed querying vsi bw info, err %s aq_err %s\n",
5331 i40e_stat_str(hw, ret),
5332 i40e_aq_str(hw, hw->aq.asq_last_status));
5335 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5336 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5339 valid_tc = bw_config.tc_valid_bits;
5340 /* Always enable TC0, no matter what */
5342 dev_info(&pf->pdev->dev,
5343 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5344 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5345 enabled_tc = valid_tc;
5348 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5350 dev_err(&pf->pdev->dev,
5351 "Unable to configure TC map %d for VSI %d\n",
5352 enabled_tc, vsi->seid);
5357 /* Update Queue Pairs Mapping for currently enabled UPs */
5358 ctxt.seid = vsi->seid;
5359 ctxt.pf_num = vsi->back->hw.pf_id;
5361 ctxt.uplink_seid = vsi->uplink_seid;
5362 ctxt.info = vsi->info;
5363 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5364 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5368 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5371 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5374 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5375 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5376 vsi->num_queue_pairs);
5377 ret = i40e_vsi_config_rss(vsi);
5379 dev_info(&vsi->back->pdev->dev,
5380 "Failed to reconfig rss for num_queues\n");
5383 vsi->reconfig_rss = false;
5385 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5386 ctxt.info.valid_sections |=
5387 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5388 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5391 /* Update the VSI after updating the VSI queue-mapping
5394 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5396 dev_info(&pf->pdev->dev,
5397 "Update vsi tc config failed, err %s aq_err %s\n",
5398 i40e_stat_str(hw, ret),
5399 i40e_aq_str(hw, hw->aq.asq_last_status));
5402 /* update the local VSI info with updated queue map */
5403 i40e_vsi_update_queue_map(vsi, &ctxt);
5404 vsi->info.valid_sections = 0;
5406 /* Update current VSI BW information */
5407 ret = i40e_vsi_get_bw_info(vsi);
5409 dev_info(&pf->pdev->dev,
5410 "Failed updating vsi bw info, err %s aq_err %s\n",
5411 i40e_stat_str(hw, ret),
5412 i40e_aq_str(hw, hw->aq.asq_last_status));
5416 /* Update the netdev TC setup */
5417 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5423 * i40e_get_link_speed - Returns link speed for the interface
5424 * @vsi: VSI to be configured
5427 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5429 struct i40e_pf *pf = vsi->back;
5431 switch (pf->hw.phy.link_info.link_speed) {
5432 case I40E_LINK_SPEED_40GB:
5434 case I40E_LINK_SPEED_25GB:
5436 case I40E_LINK_SPEED_20GB:
5438 case I40E_LINK_SPEED_10GB:
5440 case I40E_LINK_SPEED_1GB:
5448 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5449 * @vsi: VSI to be configured
5450 * @seid: seid of the channel/VSI
5451 * @max_tx_rate: max TX rate to be configured as BW limit
5453 * Helper function to set BW limit for a given VSI
5455 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5457 struct i40e_pf *pf = vsi->back;
5462 speed = i40e_get_link_speed(vsi);
5463 if (max_tx_rate > speed) {
5464 dev_err(&pf->pdev->dev,
5465 "Invalid max tx rate %llu specified for VSI seid %d.",
5469 if (max_tx_rate && max_tx_rate < 50) {
5470 dev_warn(&pf->pdev->dev,
5471 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5475 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5476 credits = max_tx_rate;
5477 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5478 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5479 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5481 dev_err(&pf->pdev->dev,
5482 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5483 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5484 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5489 * i40e_remove_queue_channels - Remove queue channels for the TCs
5490 * @vsi: VSI to be configured
5492 * Remove queue channels for the TCs
5494 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5496 enum i40e_admin_queue_err last_aq_status;
5497 struct i40e_cloud_filter *cfilter;
5498 struct i40e_channel *ch, *ch_tmp;
5499 struct i40e_pf *pf = vsi->back;
5500 struct hlist_node *node;
5503 /* Reset rss size that was stored when reconfiguring rss for
5504 * channel VSIs with non-power-of-2 queue count.
5506 vsi->current_rss_size = 0;
5508 /* perform cleanup for channels if they exist */
5509 if (list_empty(&vsi->ch_list))
5512 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5513 struct i40e_vsi *p_vsi;
5515 list_del(&ch->list);
5516 p_vsi = ch->parent_vsi;
5517 if (!p_vsi || !ch->initialized) {
5521 /* Reset queue contexts */
5522 for (i = 0; i < ch->num_queue_pairs; i++) {
5523 struct i40e_ring *tx_ring, *rx_ring;
5526 pf_q = ch->base_queue + i;
5527 tx_ring = vsi->tx_rings[pf_q];
5530 rx_ring = vsi->rx_rings[pf_q];
5534 /* Reset BW configured for this VSI via mqprio */
5535 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5537 dev_info(&vsi->back->pdev->dev,
5538 "Failed to reset tx rate for ch->seid %u\n",
5541 /* delete cloud filters associated with this channel */
5542 hlist_for_each_entry_safe(cfilter, node,
5543 &pf->cloud_filter_list, cloud_node) {
5544 if (cfilter->seid != ch->seid)
5547 hash_del(&cfilter->cloud_node);
5548 if (cfilter->dst_port)
5549 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5553 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5555 last_aq_status = pf->hw.aq.asq_last_status;
5557 dev_info(&pf->pdev->dev,
5558 "Failed to delete cloud filter, err %s aq_err %s\n",
5559 i40e_stat_str(&pf->hw, ret),
5560 i40e_aq_str(&pf->hw, last_aq_status));
5564 /* delete VSI from FW */
5565 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5568 dev_err(&vsi->back->pdev->dev,
5569 "unable to remove channel (%d) for parent VSI(%d)\n",
5570 ch->seid, p_vsi->seid);
5573 INIT_LIST_HEAD(&vsi->ch_list);
5577 * i40e_is_any_channel - channel exist or not
5578 * @vsi: ptr to VSI to which channels are associated with
5580 * Returns true or false if channel(s) exist for associated VSI or not
5582 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5584 struct i40e_channel *ch, *ch_tmp;
5586 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5587 if (ch->initialized)
5595 * i40e_get_max_queues_for_channel
5596 * @vsi: ptr to VSI to which channels are associated with
5598 * Helper function which returns max value among the queue counts set on the
5599 * channels/TCs created.
5601 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5603 struct i40e_channel *ch, *ch_tmp;
5606 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5607 if (!ch->initialized)
5609 if (ch->num_queue_pairs > max)
5610 max = ch->num_queue_pairs;
5617 * i40e_validate_num_queues - validate num_queues w.r.t channel
5618 * @pf: ptr to PF device
5619 * @num_queues: number of queues
5620 * @vsi: the parent VSI
5621 * @reconfig_rss: indicates should the RSS be reconfigured or not
5623 * This function validates number of queues in the context of new channel
5624 * which is being established and determines if RSS should be reconfigured
5625 * or not for parent VSI.
5627 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5628 struct i40e_vsi *vsi, bool *reconfig_rss)
5635 *reconfig_rss = false;
5636 if (vsi->current_rss_size) {
5637 if (num_queues > vsi->current_rss_size) {
5638 dev_dbg(&pf->pdev->dev,
5639 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5640 num_queues, vsi->current_rss_size);
5642 } else if ((num_queues < vsi->current_rss_size) &&
5643 (!is_power_of_2(num_queues))) {
5644 dev_dbg(&pf->pdev->dev,
5645 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5646 num_queues, vsi->current_rss_size);
5651 if (!is_power_of_2(num_queues)) {
5652 /* Find the max num_queues configured for channel if channel
5654 * if channel exist, then enforce 'num_queues' to be more than
5655 * max ever queues configured for channel.
5657 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5658 if (num_queues < max_ch_queues) {
5659 dev_dbg(&pf->pdev->dev,
5660 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5661 num_queues, max_ch_queues);
5664 *reconfig_rss = true;
5671 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5672 * @vsi: the VSI being setup
5673 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5675 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5677 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5679 struct i40e_pf *pf = vsi->back;
5680 u8 seed[I40E_HKEY_ARRAY_SIZE];
5681 struct i40e_hw *hw = &pf->hw;
5689 if (rss_size > vsi->rss_size)
5692 local_rss_size = min_t(int, vsi->rss_size, rss_size);
5693 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5697 /* Ignoring user configured lut if there is one */
5698 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5700 /* Use user configured hash key if there is one, otherwise
5703 if (vsi->rss_hkey_user)
5704 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5706 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5708 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5710 dev_info(&pf->pdev->dev,
5711 "Cannot set RSS lut, err %s aq_err %s\n",
5712 i40e_stat_str(hw, ret),
5713 i40e_aq_str(hw, hw->aq.asq_last_status));
5719 /* Do the update w.r.t. storing rss_size */
5720 if (!vsi->orig_rss_size)
5721 vsi->orig_rss_size = vsi->rss_size;
5722 vsi->current_rss_size = local_rss_size;
5728 * i40e_channel_setup_queue_map - Setup a channel queue map
5729 * @pf: ptr to PF device
5730 * @vsi: the VSI being setup
5731 * @ctxt: VSI context structure
5732 * @ch: ptr to channel structure
5734 * Setup queue map for a specific channel
5736 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5737 struct i40e_vsi_context *ctxt,
5738 struct i40e_channel *ch)
5740 u16 qcount, qmap, sections = 0;
5744 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5745 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5747 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5748 ch->num_queue_pairs = qcount;
5750 /* find the next higher power-of-2 of num queue pairs */
5751 pow = ilog2(qcount);
5752 if (!is_power_of_2(qcount))
5755 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5756 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5758 /* Setup queue TC[0].qmap for given VSI context */
5759 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5761 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5762 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5763 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5764 ctxt->info.valid_sections |= cpu_to_le16(sections);
5768 * i40e_add_channel - add a channel by adding VSI
5769 * @pf: ptr to PF device
5770 * @uplink_seid: underlying HW switching element (VEB) ID
5771 * @ch: ptr to channel structure
5773 * Add a channel (VSI) using add_vsi and queue_map
5775 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5776 struct i40e_channel *ch)
5778 struct i40e_hw *hw = &pf->hw;
5779 struct i40e_vsi_context ctxt;
5780 u8 enabled_tc = 0x1; /* TC0 enabled */
5783 if (ch->type != I40E_VSI_VMDQ2) {
5784 dev_info(&pf->pdev->dev,
5785 "add new vsi failed, ch->type %d\n", ch->type);
5789 memset(&ctxt, 0, sizeof(ctxt));
5790 ctxt.pf_num = hw->pf_id;
5792 ctxt.uplink_seid = uplink_seid;
5793 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5794 if (ch->type == I40E_VSI_VMDQ2)
5795 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5797 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5798 ctxt.info.valid_sections |=
5799 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5800 ctxt.info.switch_id =
5801 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5804 /* Set queue map for a given VSI context */
5805 i40e_channel_setup_queue_map(pf, &ctxt, ch);
5807 /* Now time to create VSI */
5808 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5810 dev_info(&pf->pdev->dev,
5811 "add new vsi failed, err %s aq_err %s\n",
5812 i40e_stat_str(&pf->hw, ret),
5813 i40e_aq_str(&pf->hw,
5814 pf->hw.aq.asq_last_status));
5818 /* Success, update channel */
5819 ch->enabled_tc = enabled_tc;
5820 ch->seid = ctxt.seid;
5821 ch->vsi_number = ctxt.vsi_number;
5822 ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx);
5824 /* copy just the sections touched not the entire info
5825 * since not all sections are valid as returned by
5828 ch->info.mapping_flags = ctxt.info.mapping_flags;
5829 memcpy(&ch->info.queue_mapping,
5830 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5831 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5832 sizeof(ctxt.info.tc_mapping));
5837 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5840 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5844 bw_data.tc_valid_bits = ch->enabled_tc;
5845 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5846 bw_data.tc_bw_credits[i] = bw_share[i];
5848 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5851 dev_info(&vsi->back->pdev->dev,
5852 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5853 vsi->back->hw.aq.asq_last_status, ch->seid);
5857 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5858 ch->info.qs_handle[i] = bw_data.qs_handles[i];
5864 * i40e_channel_config_tx_ring - config TX ring associated with new channel
5865 * @pf: ptr to PF device
5866 * @vsi: the VSI being setup
5867 * @ch: ptr to channel structure
5869 * Configure TX rings associated with channel (VSI) since queues are being
5872 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
5873 struct i40e_vsi *vsi,
5874 struct i40e_channel *ch)
5878 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5880 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5881 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5882 if (ch->enabled_tc & BIT(i))
5886 /* configure BW for new VSI */
5887 ret = i40e_channel_config_bw(vsi, ch, bw_share);
5889 dev_info(&vsi->back->pdev->dev,
5890 "Failed configuring TC map %d for channel (seid %u)\n",
5891 ch->enabled_tc, ch->seid);
5895 for (i = 0; i < ch->num_queue_pairs; i++) {
5896 struct i40e_ring *tx_ring, *rx_ring;
5899 pf_q = ch->base_queue + i;
5901 /* Get to TX ring ptr of main VSI, for re-setup TX queue
5904 tx_ring = vsi->tx_rings[pf_q];
5907 /* Get the RX ring ptr */
5908 rx_ring = vsi->rx_rings[pf_q];
5916 * i40e_setup_hw_channel - setup new channel
5917 * @pf: ptr to PF device
5918 * @vsi: the VSI being setup
5919 * @ch: ptr to channel structure
5920 * @uplink_seid: underlying HW switching element (VEB) ID
5921 * @type: type of channel to be created (VMDq2/VF)
5923 * Setup new channel (VSI) based on specified type (VMDq2/VF)
5924 * and configures TX rings accordingly
5926 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
5927 struct i40e_vsi *vsi,
5928 struct i40e_channel *ch,
5929 u16 uplink_seid, u8 type)
5933 ch->initialized = false;
5934 ch->base_queue = vsi->next_base_queue;
5937 /* Proceed with creation of channel (VMDq2) VSI */
5938 ret = i40e_add_channel(pf, uplink_seid, ch);
5940 dev_info(&pf->pdev->dev,
5941 "failed to add_channel using uplink_seid %u\n",
5946 /* Mark the successful creation of channel */
5947 ch->initialized = true;
5949 /* Reconfigure TX queues using QTX_CTL register */
5950 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
5952 dev_info(&pf->pdev->dev,
5953 "failed to configure TX rings for channel %u\n",
5958 /* update 'next_base_queue' */
5959 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
5960 dev_dbg(&pf->pdev->dev,
5961 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
5962 ch->seid, ch->vsi_number, ch->stat_counter_idx,
5963 ch->num_queue_pairs,
5964 vsi->next_base_queue);
5969 * i40e_setup_channel - setup new channel using uplink element
5970 * @pf: ptr to PF device
5971 * @type: type of channel to be created (VMDq2/VF)
5972 * @uplink_seid: underlying HW switching element (VEB) ID
5973 * @ch: ptr to channel structure
5975 * Setup new channel (VSI) based on specified type (VMDq2/VF)
5976 * and uplink switching element (uplink_seid)
5978 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
5979 struct i40e_channel *ch)
5985 if (vsi->type == I40E_VSI_MAIN) {
5986 vsi_type = I40E_VSI_VMDQ2;
5988 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
5993 /* underlying switching element */
5994 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5996 /* create channel (VSI), configure TX rings */
5997 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
5999 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6003 return ch->initialized ? true : false;
6007 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6008 * @vsi: ptr to VSI which has PF backing
6010 * Sets up switch mode correctly if it needs to be changed and perform
6011 * what are allowed modes.
6013 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6016 struct i40e_pf *pf = vsi->back;
6017 struct i40e_hw *hw = &pf->hw;
6020 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6024 if (hw->dev_caps.switch_mode) {
6025 /* if switch mode is set, support mode2 (non-tunneled for
6026 * cloud filter) for now
6028 u32 switch_mode = hw->dev_caps.switch_mode &
6029 I40E_SWITCH_MODE_MASK;
6030 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6031 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6033 dev_err(&pf->pdev->dev,
6034 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6035 hw->dev_caps.switch_mode);
6040 /* Set Bit 7 to be valid */
6041 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6043 /* Set L4type for TCP support */
6044 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6046 /* Set cloud filter mode */
6047 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6049 /* Prep mode field for set_switch_config */
6050 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6051 pf->last_sw_conf_valid_flags,
6053 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6054 dev_err(&pf->pdev->dev,
6055 "couldn't set switch config bits, err %s aq_err %s\n",
6056 i40e_stat_str(hw, ret),
6058 hw->aq.asq_last_status));
6064 * i40e_create_queue_channel - function to create channel
6065 * @vsi: VSI to be configured
6066 * @ch: ptr to channel (it contains channel specific params)
6068 * This function creates channel (VSI) using num_queues specified by user,
6069 * reconfigs RSS if needed.
6071 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6072 struct i40e_channel *ch)
6074 struct i40e_pf *pf = vsi->back;
6081 if (!ch->num_queue_pairs) {
6082 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6083 ch->num_queue_pairs);
6087 /* validate user requested num_queues for channel */
6088 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6091 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6092 ch->num_queue_pairs);
6096 /* By default we are in VEPA mode, if this is the first VF/VMDq
6097 * VSI to be added switch to VEB mode.
6099 if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6100 (!i40e_is_any_channel(vsi))) {
6101 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6102 dev_dbg(&pf->pdev->dev,
6103 "Failed to create channel. Override queues (%u) not power of 2\n",
6104 vsi->tc_config.tc_info[0].qcount);
6108 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6109 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6111 if (vsi->type == I40E_VSI_MAIN) {
6112 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6113 i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6116 i40e_do_reset_safe(pf,
6117 I40E_PF_RESET_FLAG);
6120 /* now onwards for main VSI, number of queues will be value
6121 * of TC0's queue count
6125 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6126 * it should be more than num_queues
6128 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6129 dev_dbg(&pf->pdev->dev,
6130 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6131 vsi->cnt_q_avail, ch->num_queue_pairs);
6135 /* reconfig_rss only if vsi type is MAIN_VSI */
6136 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6137 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6139 dev_info(&pf->pdev->dev,
6140 "Error: unable to reconfig rss for num_queues (%u)\n",
6141 ch->num_queue_pairs);
6146 if (!i40e_setup_channel(pf, vsi, ch)) {
6147 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6151 dev_info(&pf->pdev->dev,
6152 "Setup channel (id:%u) utilizing num_queues %d\n",
6153 ch->seid, ch->num_queue_pairs);
6155 /* configure VSI for BW limit */
6156 if (ch->max_tx_rate) {
6157 u64 credits = ch->max_tx_rate;
6159 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6162 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6163 dev_dbg(&pf->pdev->dev,
6164 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6170 /* in case of VF, this will be main SRIOV VSI */
6171 ch->parent_vsi = vsi;
6173 /* and update main_vsi's count for queue_available to use */
6174 vsi->cnt_q_avail -= ch->num_queue_pairs;
6180 * i40e_configure_queue_channels - Add queue channel for the given TCs
6181 * @vsi: VSI to be configured
6183 * Configures queue channel mapping to the given TCs
6185 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6187 struct i40e_channel *ch;
6191 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6192 vsi->tc_seid_map[0] = vsi->seid;
6193 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6194 if (vsi->tc_config.enabled_tc & BIT(i)) {
6195 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6201 INIT_LIST_HEAD(&ch->list);
6202 ch->num_queue_pairs =
6203 vsi->tc_config.tc_info[i].qcount;
6205 vsi->tc_config.tc_info[i].qoffset;
6207 /* Bandwidth limit through tc interface is in bytes/s,
6210 max_rate = vsi->mqprio_qopt.max_rate[i];
6211 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6212 ch->max_tx_rate = max_rate;
6214 list_add_tail(&ch->list, &vsi->ch_list);
6216 ret = i40e_create_queue_channel(vsi, ch);
6218 dev_err(&vsi->back->pdev->dev,
6219 "Failed creating queue channel with TC%d: queues %d\n",
6220 i, ch->num_queue_pairs);
6223 vsi->tc_seid_map[i] = ch->seid;
6229 i40e_remove_queue_channels(vsi);
6234 * i40e_veb_config_tc - Configure TCs for given VEB
6236 * @enabled_tc: TC bitmap
6238 * Configures given TC bitmap for VEB (switching) element
6240 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6242 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6243 struct i40e_pf *pf = veb->pf;
6247 /* No TCs or already enabled TCs just return */
6248 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6251 bw_data.tc_valid_bits = enabled_tc;
6252 /* bw_data.absolute_credits is not set (relative) */
6254 /* Enable ETS TCs with equal BW Share for now */
6255 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6256 if (enabled_tc & BIT(i))
6257 bw_data.tc_bw_share_credits[i] = 1;
6260 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6263 dev_info(&pf->pdev->dev,
6264 "VEB bw config failed, err %s aq_err %s\n",
6265 i40e_stat_str(&pf->hw, ret),
6266 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6270 /* Update the BW information */
6271 ret = i40e_veb_get_bw_info(veb);
6273 dev_info(&pf->pdev->dev,
6274 "Failed getting veb bw config, err %s aq_err %s\n",
6275 i40e_stat_str(&pf->hw, ret),
6276 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6283 #ifdef CONFIG_I40E_DCB
6285 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6288 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6289 * the caller would've quiesce all the VSIs before calling
6292 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6298 /* Enable the TCs available on PF to all VEBs */
6299 tc_map = i40e_pf_get_tc_map(pf);
6300 for (v = 0; v < I40E_MAX_VEB; v++) {
6303 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6305 dev_info(&pf->pdev->dev,
6306 "Failed configuring TC for VEB seid=%d\n",
6308 /* Will try to configure as many components */
6312 /* Update each VSI */
6313 for (v = 0; v < pf->num_alloc_vsi; v++) {
6317 /* - Enable all TCs for the LAN VSI
6318 * - For all others keep them at TC0 for now
6320 if (v == pf->lan_vsi)
6321 tc_map = i40e_pf_get_tc_map(pf);
6323 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6325 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6327 dev_info(&pf->pdev->dev,
6328 "Failed configuring TC for VSI seid=%d\n",
6330 /* Will try to configure as many components */
6332 /* Re-configure VSI vectors based on updated TC map */
6333 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6334 if (pf->vsi[v]->netdev)
6335 i40e_dcbnl_set_all(pf->vsi[v]);
6341 * i40e_resume_port_tx - Resume port Tx
6344 * Resume a port's Tx and issue a PF reset in case of failure to
6347 static int i40e_resume_port_tx(struct i40e_pf *pf)
6349 struct i40e_hw *hw = &pf->hw;
6352 ret = i40e_aq_resume_port_tx(hw, NULL);
6354 dev_info(&pf->pdev->dev,
6355 "Resume Port Tx failed, err %s aq_err %s\n",
6356 i40e_stat_str(&pf->hw, ret),
6357 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6358 /* Schedule PF reset to recover */
6359 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6360 i40e_service_event_schedule(pf);
6367 * i40e_init_pf_dcb - Initialize DCB configuration
6368 * @pf: PF being configured
6370 * Query the current DCB configuration and cache it
6371 * in the hardware structure
6373 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6375 struct i40e_hw *hw = &pf->hw;
6378 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6379 * Also do not enable DCBx if FW LLDP agent is disabled
6381 if ((pf->hw_features & I40E_HW_NO_DCB_SUPPORT) ||
6382 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP))
6385 /* Get the initial DCB configuration */
6386 err = i40e_init_dcb(hw);
6388 /* Device/Function is not DCBX capable */
6389 if ((!hw->func_caps.dcb) ||
6390 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6391 dev_info(&pf->pdev->dev,
6392 "DCBX offload is not supported or is disabled for this PF.\n");
6394 /* When status is not DISABLED then DCBX in FW */
6395 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6396 DCB_CAP_DCBX_VER_IEEE;
6398 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6399 /* Enable DCB tagging only when more than one TC
6400 * or explicitly disable if only one TC
6402 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6403 pf->flags |= I40E_FLAG_DCB_ENABLED;
6405 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6406 dev_dbg(&pf->pdev->dev,
6407 "DCBX offload is supported for this PF.\n");
6409 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
6410 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
6411 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
6413 dev_info(&pf->pdev->dev,
6414 "Query for DCB configuration failed, err %s aq_err %s\n",
6415 i40e_stat_str(&pf->hw, err),
6416 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6422 #endif /* CONFIG_I40E_DCB */
6423 #define SPEED_SIZE 14
6426 * i40e_print_link_message - print link up or down
6427 * @vsi: the VSI for which link needs a message
6428 * @isup: true of link is up, false otherwise
6430 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6432 enum i40e_aq_link_speed new_speed;
6433 struct i40e_pf *pf = vsi->back;
6434 char *speed = "Unknown";
6435 char *fc = "Unknown";
6441 new_speed = pf->hw.phy.link_info.link_speed;
6443 new_speed = I40E_LINK_SPEED_UNKNOWN;
6445 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6447 vsi->current_isup = isup;
6448 vsi->current_speed = new_speed;
6450 netdev_info(vsi->netdev, "NIC Link is Down\n");
6454 /* Warn user if link speed on NPAR enabled partition is not at
6457 if (pf->hw.func_caps.npar_enable &&
6458 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6459 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6460 netdev_warn(vsi->netdev,
6461 "The partition detected link speed that is less than 10Gbps\n");
6463 switch (pf->hw.phy.link_info.link_speed) {
6464 case I40E_LINK_SPEED_40GB:
6467 case I40E_LINK_SPEED_20GB:
6470 case I40E_LINK_SPEED_25GB:
6473 case I40E_LINK_SPEED_10GB:
6476 case I40E_LINK_SPEED_1GB:
6479 case I40E_LINK_SPEED_100MB:
6486 switch (pf->hw.fc.current_mode) {
6490 case I40E_FC_TX_PAUSE:
6493 case I40E_FC_RX_PAUSE:
6501 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6502 req_fec = ", Requested FEC: None";
6503 fec = ", FEC: None";
6504 an = ", Autoneg: False";
6506 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
6507 an = ", Autoneg: True";
6509 if (pf->hw.phy.link_info.fec_info &
6510 I40E_AQ_CONFIG_FEC_KR_ENA)
6511 fec = ", FEC: CL74 FC-FEC/BASE-R";
6512 else if (pf->hw.phy.link_info.fec_info &
6513 I40E_AQ_CONFIG_FEC_RS_ENA)
6514 fec = ", FEC: CL108 RS-FEC";
6516 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
6517 * both RS and FC are requested
6519 if (vsi->back->hw.phy.link_info.req_fec_info &
6520 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
6521 if (vsi->back->hw.phy.link_info.req_fec_info &
6522 I40E_AQ_REQUEST_FEC_RS)
6523 req_fec = ", Requested FEC: CL108 RS-FEC";
6525 req_fec = ", Requested FEC: CL74 FC-FEC/BASE-R";
6529 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s%s, Flow Control: %s\n",
6530 speed, req_fec, fec, an, fc);
6534 * i40e_up_complete - Finish the last steps of bringing up a connection
6535 * @vsi: the VSI being configured
6537 static int i40e_up_complete(struct i40e_vsi *vsi)
6539 struct i40e_pf *pf = vsi->back;
6542 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6543 i40e_vsi_configure_msix(vsi);
6545 i40e_configure_msi_and_legacy(vsi);
6548 err = i40e_vsi_start_rings(vsi);
6552 clear_bit(__I40E_VSI_DOWN, vsi->state);
6553 i40e_napi_enable_all(vsi);
6554 i40e_vsi_enable_irq(vsi);
6556 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
6558 i40e_print_link_message(vsi, true);
6559 netif_tx_start_all_queues(vsi->netdev);
6560 netif_carrier_on(vsi->netdev);
6563 /* replay FDIR SB filters */
6564 if (vsi->type == I40E_VSI_FDIR) {
6565 /* reset fd counters */
6568 i40e_fdir_filter_restore(vsi);
6571 /* On the next run of the service_task, notify any clients of the new
6574 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6575 i40e_service_event_schedule(pf);
6581 * i40e_vsi_reinit_locked - Reset the VSI
6582 * @vsi: the VSI being configured
6584 * Rebuild the ring structs after some configuration
6585 * has changed, e.g. MTU size.
6587 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
6589 struct i40e_pf *pf = vsi->back;
6591 WARN_ON(in_interrupt());
6592 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
6593 usleep_range(1000, 2000);
6597 clear_bit(__I40E_CONFIG_BUSY, pf->state);
6601 * i40e_up - Bring the connection back up after being down
6602 * @vsi: the VSI being configured
6604 int i40e_up(struct i40e_vsi *vsi)
6608 err = i40e_vsi_configure(vsi);
6610 err = i40e_up_complete(vsi);
6616 * i40e_force_link_state - Force the link status
6617 * @pf: board private structure
6618 * @is_up: whether the link state should be forced up or down
6620 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
6622 struct i40e_aq_get_phy_abilities_resp abilities;
6623 struct i40e_aq_set_phy_config config = {0};
6624 struct i40e_hw *hw = &pf->hw;
6629 /* Card might've been put in an unstable state by other drivers
6630 * and applications, which causes incorrect speed values being
6631 * set on startup. In order to clear speed registers, we call
6632 * get_phy_capabilities twice, once to get initial state of
6633 * available speeds, and once to get current PHY config.
6635 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
6638 dev_err(&pf->pdev->dev,
6639 "failed to get phy cap., ret = %s last_status = %s\n",
6640 i40e_stat_str(hw, err),
6641 i40e_aq_str(hw, hw->aq.asq_last_status));
6644 speed = abilities.link_speed;
6646 /* Get the current phy config */
6647 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
6650 dev_err(&pf->pdev->dev,
6651 "failed to get phy cap., ret = %s last_status = %s\n",
6652 i40e_stat_str(hw, err),
6653 i40e_aq_str(hw, hw->aq.asq_last_status));
6657 /* If link needs to go up, but was not forced to go down,
6658 * and its speed values are OK, no need for a flap
6660 if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
6661 return I40E_SUCCESS;
6663 /* To force link we need to set bits for all supported PHY types,
6664 * but there are now more than 32, so we need to split the bitmap
6665 * across two fields.
6667 mask = I40E_PHY_TYPES_BITMASK;
6668 config.phy_type = is_up ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
6669 config.phy_type_ext = is_up ? (u8)((mask >> 32) & 0xff) : 0;
6670 /* Copy the old settings, except of phy_type */
6671 config.abilities = abilities.abilities;
6672 if (abilities.link_speed != 0)
6673 config.link_speed = abilities.link_speed;
6675 config.link_speed = speed;
6676 config.eee_capability = abilities.eee_capability;
6677 config.eeer = abilities.eeer_val;
6678 config.low_power_ctrl = abilities.d3_lpan;
6679 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
6680 I40E_AQ_PHY_FEC_CONFIG_MASK;
6681 err = i40e_aq_set_phy_config(hw, &config, NULL);
6684 dev_err(&pf->pdev->dev,
6685 "set phy config ret = %s last_status = %s\n",
6686 i40e_stat_str(&pf->hw, err),
6687 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6691 /* Update the link info */
6692 err = i40e_update_link_info(hw);
6694 /* Wait a little bit (on 40G cards it sometimes takes a really
6695 * long time for link to come back from the atomic reset)
6699 i40e_update_link_info(hw);
6702 i40e_aq_set_link_restart_an(hw, true, NULL);
6704 return I40E_SUCCESS;
6708 * i40e_down - Shutdown the connection processing
6709 * @vsi: the VSI being stopped
6711 void i40e_down(struct i40e_vsi *vsi)
6715 /* It is assumed that the caller of this function
6716 * sets the vsi->state __I40E_VSI_DOWN bit.
6719 netif_carrier_off(vsi->netdev);
6720 netif_tx_disable(vsi->netdev);
6722 i40e_vsi_disable_irq(vsi);
6723 i40e_vsi_stop_rings(vsi);
6724 if (vsi->type == I40E_VSI_MAIN &&
6725 vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED)
6726 i40e_force_link_state(vsi->back, false);
6727 i40e_napi_disable_all(vsi);
6729 for (i = 0; i < vsi->num_queue_pairs; i++) {
6730 i40e_clean_tx_ring(vsi->tx_rings[i]);
6731 if (i40e_enabled_xdp_vsi(vsi)) {
6732 /* Make sure that in-progress ndo_xdp_xmit
6733 * calls are completed.
6736 i40e_clean_tx_ring(vsi->xdp_rings[i]);
6738 i40e_clean_rx_ring(vsi->rx_rings[i]);
6744 * i40e_validate_mqprio_qopt- validate queue mapping info
6745 * @vsi: the VSI being configured
6746 * @mqprio_qopt: queue parametrs
6748 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
6749 struct tc_mqprio_qopt_offload *mqprio_qopt)
6751 u64 sum_max_rate = 0;
6755 if (mqprio_qopt->qopt.offset[0] != 0 ||
6756 mqprio_qopt->qopt.num_tc < 1 ||
6757 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
6759 for (i = 0; ; i++) {
6760 if (!mqprio_qopt->qopt.count[i])
6762 if (mqprio_qopt->min_rate[i]) {
6763 dev_err(&vsi->back->pdev->dev,
6764 "Invalid min tx rate (greater than 0) specified\n");
6767 max_rate = mqprio_qopt->max_rate[i];
6768 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6769 sum_max_rate += max_rate;
6771 if (i >= mqprio_qopt->qopt.num_tc - 1)
6773 if (mqprio_qopt->qopt.offset[i + 1] !=
6774 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
6777 if (vsi->num_queue_pairs <
6778 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
6781 if (sum_max_rate > i40e_get_link_speed(vsi)) {
6782 dev_err(&vsi->back->pdev->dev,
6783 "Invalid max tx rate specified\n");
6790 * i40e_vsi_set_default_tc_config - set default values for tc configuration
6791 * @vsi: the VSI being configured
6793 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
6798 /* Only TC0 is enabled */
6799 vsi->tc_config.numtc = 1;
6800 vsi->tc_config.enabled_tc = 1;
6801 qcount = min_t(int, vsi->alloc_queue_pairs,
6802 i40e_pf_get_max_q_per_tc(vsi->back));
6803 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6804 /* For the TC that is not enabled set the offset to to default
6805 * queue and allocate one queue for the given TC.
6807 vsi->tc_config.tc_info[i].qoffset = 0;
6809 vsi->tc_config.tc_info[i].qcount = qcount;
6811 vsi->tc_config.tc_info[i].qcount = 1;
6812 vsi->tc_config.tc_info[i].netdev_tc = 0;
6817 * i40e_setup_tc - configure multiple traffic classes
6818 * @netdev: net device to configure
6819 * @type_data: tc offload data
6821 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
6823 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
6824 struct i40e_netdev_priv *np = netdev_priv(netdev);
6825 struct i40e_vsi *vsi = np->vsi;
6826 struct i40e_pf *pf = vsi->back;
6827 u8 enabled_tc = 0, num_tc, hw;
6828 bool need_reset = false;
6833 num_tc = mqprio_qopt->qopt.num_tc;
6834 hw = mqprio_qopt->qopt.hw;
6835 mode = mqprio_qopt->mode;
6837 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
6838 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
6842 /* Check if MFP enabled */
6843 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6845 "Configuring TC not supported in MFP mode\n");
6849 case TC_MQPRIO_MODE_DCB:
6850 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
6852 /* Check if DCB enabled to continue */
6853 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
6855 "DCB is not enabled for adapter\n");
6859 /* Check whether tc count is within enabled limit */
6860 if (num_tc > i40e_pf_get_num_tc(pf)) {
6862 "TC count greater than enabled on link for adapter\n");
6866 case TC_MQPRIO_MODE_CHANNEL:
6867 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
6869 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
6872 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6874 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
6877 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
6878 sizeof(*mqprio_qopt));
6879 pf->flags |= I40E_FLAG_TC_MQPRIO;
6880 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6887 /* Generate TC map for number of tc requested */
6888 for (i = 0; i < num_tc; i++)
6889 enabled_tc |= BIT(i);
6891 /* Requesting same TC configuration as already enabled */
6892 if (enabled_tc == vsi->tc_config.enabled_tc &&
6893 mode != TC_MQPRIO_MODE_CHANNEL)
6896 /* Quiesce VSI queues */
6897 i40e_quiesce_vsi(vsi);
6899 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
6900 i40e_remove_queue_channels(vsi);
6902 /* Configure VSI for enabled TCs */
6903 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6905 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
6911 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
6912 if (vsi->mqprio_qopt.max_rate[0]) {
6913 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
6915 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
6916 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
6918 u64 credits = max_tx_rate;
6920 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6921 dev_dbg(&vsi->back->pdev->dev,
6922 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6931 ret = i40e_configure_queue_channels(vsi);
6934 "Failed configuring queue channels\n");
6941 /* Reset the configuration data to defaults, only TC0 is enabled */
6943 i40e_vsi_set_default_tc_config(vsi);
6948 i40e_unquiesce_vsi(vsi);
6953 * i40e_set_cld_element - sets cloud filter element data
6954 * @filter: cloud filter rule
6955 * @cld: ptr to cloud filter element data
6957 * This is helper function to copy data into cloud filter element
6960 i40e_set_cld_element(struct i40e_cloud_filter *filter,
6961 struct i40e_aqc_cloud_filters_element_data *cld)
6966 memset(cld, 0, sizeof(*cld));
6967 ether_addr_copy(cld->outer_mac, filter->dst_mac);
6968 ether_addr_copy(cld->inner_mac, filter->src_mac);
6970 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
6973 if (filter->n_proto == ETH_P_IPV6) {
6974 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
6975 for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);
6977 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
6978 ipa = cpu_to_le32(ipa);
6979 memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));
6982 ipa = be32_to_cpu(filter->dst_ipv4);
6983 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
6986 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
6988 /* tenant_id is not supported by FW now, once the support is enabled
6989 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
6991 if (filter->tenant_id)
6996 * i40e_add_del_cloud_filter - Add/del cloud filter
6997 * @vsi: pointer to VSI
6998 * @filter: cloud filter rule
6999 * @add: if true, add, if false, delete
7001 * Add or delete a cloud filter for a specific flow spec.
7002 * Returns 0 if the filter were successfully added.
7004 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
7005 struct i40e_cloud_filter *filter, bool add)
7007 struct i40e_aqc_cloud_filters_element_data cld_filter;
7008 struct i40e_pf *pf = vsi->back;
7010 static const u16 flag_table[128] = {
7011 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
7012 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
7013 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
7014 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
7015 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
7016 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
7017 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
7018 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
7019 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
7020 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
7021 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
7022 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
7023 [I40E_CLOUD_FILTER_FLAGS_IIP] =
7024 I40E_AQC_ADD_CLOUD_FILTER_IIP,
7027 if (filter->flags >= ARRAY_SIZE(flag_table))
7028 return I40E_ERR_CONFIG;
7030 /* copy element needed to add cloud filter from filter */
7031 i40e_set_cld_element(filter, &cld_filter);
7033 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
7034 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
7035 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
7037 if (filter->n_proto == ETH_P_IPV6)
7038 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
7039 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7041 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
7042 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7045 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
7048 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
7051 dev_dbg(&pf->pdev->dev,
7052 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
7053 add ? "add" : "delete", filter->dst_port, ret,
7054 pf->hw.aq.asq_last_status);
7056 dev_info(&pf->pdev->dev,
7057 "%s cloud filter for VSI: %d\n",
7058 add ? "Added" : "Deleted", filter->seid);
7063 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
7064 * @vsi: pointer to VSI
7065 * @filter: cloud filter rule
7066 * @add: if true, add, if false, delete
7068 * Add or delete a cloud filter for a specific flow spec using big buffer.
7069 * Returns 0 if the filter were successfully added.
7071 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
7072 struct i40e_cloud_filter *filter,
7075 struct i40e_aqc_cloud_filters_element_bb cld_filter;
7076 struct i40e_pf *pf = vsi->back;
7079 /* Both (src/dst) valid mac_addr are not supported */
7080 if ((is_valid_ether_addr(filter->dst_mac) &&
7081 is_valid_ether_addr(filter->src_mac)) ||
7082 (is_multicast_ether_addr(filter->dst_mac) &&
7083 is_multicast_ether_addr(filter->src_mac)))
7086 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
7087 * ports are not supported via big buffer now.
7089 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
7092 /* adding filter using src_port/src_ip is not supported at this stage */
7093 if (filter->src_port || filter->src_ipv4 ||
7094 !ipv6_addr_any(&filter->ip.v6.src_ip6))
7097 /* copy element needed to add cloud filter from filter */
7098 i40e_set_cld_element(filter, &cld_filter.element);
7100 if (is_valid_ether_addr(filter->dst_mac) ||
7101 is_valid_ether_addr(filter->src_mac) ||
7102 is_multicast_ether_addr(filter->dst_mac) ||
7103 is_multicast_ether_addr(filter->src_mac)) {
7104 /* MAC + IP : unsupported mode */
7105 if (filter->dst_ipv4)
7108 /* since we validated that L4 port must be valid before
7109 * we get here, start with respective "flags" value
7110 * and update if vlan is present or not
7112 cld_filter.element.flags =
7113 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
7115 if (filter->vlan_id) {
7116 cld_filter.element.flags =
7117 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
7120 } else if (filter->dst_ipv4 ||
7121 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
7122 cld_filter.element.flags =
7123 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
7124 if (filter->n_proto == ETH_P_IPV6)
7125 cld_filter.element.flags |=
7126 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7128 cld_filter.element.flags |=
7129 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7131 dev_err(&pf->pdev->dev,
7132 "either mac or ip has to be valid for cloud filter\n");
7136 /* Now copy L4 port in Byte 6..7 in general fields */
7137 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
7138 be16_to_cpu(filter->dst_port);
7141 /* Validate current device switch mode, change if necessary */
7142 ret = i40e_validate_and_set_switch_mode(vsi);
7144 dev_err(&pf->pdev->dev,
7145 "failed to set switch mode, ret %d\n",
7150 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
7153 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
7158 dev_dbg(&pf->pdev->dev,
7159 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
7160 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
7162 dev_info(&pf->pdev->dev,
7163 "%s cloud filter for VSI: %d, L4 port: %d\n",
7164 add ? "add" : "delete", filter->seid,
7165 ntohs(filter->dst_port));
7170 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
7171 * @vsi: Pointer to VSI
7172 * @cls_flower: Pointer to struct tc_cls_flower_offload
7173 * @filter: Pointer to cloud filter structure
7176 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
7177 struct tc_cls_flower_offload *f,
7178 struct i40e_cloud_filter *filter)
7180 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
7181 struct i40e_pf *pf = vsi->back;
7184 if (f->dissector->used_keys &
7185 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
7186 BIT(FLOW_DISSECTOR_KEY_BASIC) |
7187 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
7188 BIT(FLOW_DISSECTOR_KEY_VLAN) |
7189 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
7190 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
7191 BIT(FLOW_DISSECTOR_KEY_PORTS) |
7192 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
7193 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
7194 f->dissector->used_keys);
7198 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
7199 struct flow_dissector_key_keyid *key =
7200 skb_flow_dissector_target(f->dissector,
7201 FLOW_DISSECTOR_KEY_ENC_KEYID,
7204 struct flow_dissector_key_keyid *mask =
7205 skb_flow_dissector_target(f->dissector,
7206 FLOW_DISSECTOR_KEY_ENC_KEYID,
7209 if (mask->keyid != 0)
7210 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
7212 filter->tenant_id = be32_to_cpu(key->keyid);
7215 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
7216 struct flow_dissector_key_basic *key =
7217 skb_flow_dissector_target(f->dissector,
7218 FLOW_DISSECTOR_KEY_BASIC,
7221 struct flow_dissector_key_basic *mask =
7222 skb_flow_dissector_target(f->dissector,
7223 FLOW_DISSECTOR_KEY_BASIC,
7226 n_proto_key = ntohs(key->n_proto);
7227 n_proto_mask = ntohs(mask->n_proto);
7229 if (n_proto_key == ETH_P_ALL) {
7233 filter->n_proto = n_proto_key & n_proto_mask;
7234 filter->ip_proto = key->ip_proto;
7237 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
7238 struct flow_dissector_key_eth_addrs *key =
7239 skb_flow_dissector_target(f->dissector,
7240 FLOW_DISSECTOR_KEY_ETH_ADDRS,
7243 struct flow_dissector_key_eth_addrs *mask =
7244 skb_flow_dissector_target(f->dissector,
7245 FLOW_DISSECTOR_KEY_ETH_ADDRS,
7248 /* use is_broadcast and is_zero to check for all 0xf or 0 */
7249 if (!is_zero_ether_addr(mask->dst)) {
7250 if (is_broadcast_ether_addr(mask->dst)) {
7251 field_flags |= I40E_CLOUD_FIELD_OMAC;
7253 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
7255 return I40E_ERR_CONFIG;
7259 if (!is_zero_ether_addr(mask->src)) {
7260 if (is_broadcast_ether_addr(mask->src)) {
7261 field_flags |= I40E_CLOUD_FIELD_IMAC;
7263 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
7265 return I40E_ERR_CONFIG;
7268 ether_addr_copy(filter->dst_mac, key->dst);
7269 ether_addr_copy(filter->src_mac, key->src);
7272 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
7273 struct flow_dissector_key_vlan *key =
7274 skb_flow_dissector_target(f->dissector,
7275 FLOW_DISSECTOR_KEY_VLAN,
7277 struct flow_dissector_key_vlan *mask =
7278 skb_flow_dissector_target(f->dissector,
7279 FLOW_DISSECTOR_KEY_VLAN,
7282 if (mask->vlan_id) {
7283 if (mask->vlan_id == VLAN_VID_MASK) {
7284 field_flags |= I40E_CLOUD_FIELD_IVLAN;
7287 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
7289 return I40E_ERR_CONFIG;
7293 filter->vlan_id = cpu_to_be16(key->vlan_id);
7296 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) {
7297 struct flow_dissector_key_control *key =
7298 skb_flow_dissector_target(f->dissector,
7299 FLOW_DISSECTOR_KEY_CONTROL,
7302 addr_type = key->addr_type;
7305 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
7306 struct flow_dissector_key_ipv4_addrs *key =
7307 skb_flow_dissector_target(f->dissector,
7308 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
7310 struct flow_dissector_key_ipv4_addrs *mask =
7311 skb_flow_dissector_target(f->dissector,
7312 FLOW_DISSECTOR_KEY_IPV4_ADDRS,
7316 if (mask->dst == cpu_to_be32(0xffffffff)) {
7317 field_flags |= I40E_CLOUD_FIELD_IIP;
7319 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
7321 return I40E_ERR_CONFIG;
7326 if (mask->src == cpu_to_be32(0xffffffff)) {
7327 field_flags |= I40E_CLOUD_FIELD_IIP;
7329 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
7331 return I40E_ERR_CONFIG;
7335 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
7336 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
7337 return I40E_ERR_CONFIG;
7339 filter->dst_ipv4 = key->dst;
7340 filter->src_ipv4 = key->src;
7343 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
7344 struct flow_dissector_key_ipv6_addrs *key =
7345 skb_flow_dissector_target(f->dissector,
7346 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
7348 struct flow_dissector_key_ipv6_addrs *mask =
7349 skb_flow_dissector_target(f->dissector,
7350 FLOW_DISSECTOR_KEY_IPV6_ADDRS,
7353 /* src and dest IPV6 address should not be LOOPBACK
7354 * (0:0:0:0:0:0:0:1), which can be represented as ::1
7356 if (ipv6_addr_loopback(&key->dst) ||
7357 ipv6_addr_loopback(&key->src)) {
7358 dev_err(&pf->pdev->dev,
7359 "Bad ipv6, addr is LOOPBACK\n");
7360 return I40E_ERR_CONFIG;
7362 if (!ipv6_addr_any(&mask->dst) || !ipv6_addr_any(&mask->src))
7363 field_flags |= I40E_CLOUD_FIELD_IIP;
7365 memcpy(&filter->src_ipv6, &key->src.s6_addr32,
7366 sizeof(filter->src_ipv6));
7367 memcpy(&filter->dst_ipv6, &key->dst.s6_addr32,
7368 sizeof(filter->dst_ipv6));
7371 if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) {
7372 struct flow_dissector_key_ports *key =
7373 skb_flow_dissector_target(f->dissector,
7374 FLOW_DISSECTOR_KEY_PORTS,
7376 struct flow_dissector_key_ports *mask =
7377 skb_flow_dissector_target(f->dissector,
7378 FLOW_DISSECTOR_KEY_PORTS,
7382 if (mask->src == cpu_to_be16(0xffff)) {
7383 field_flags |= I40E_CLOUD_FIELD_IIP;
7385 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
7386 be16_to_cpu(mask->src));
7387 return I40E_ERR_CONFIG;
7392 if (mask->dst == cpu_to_be16(0xffff)) {
7393 field_flags |= I40E_CLOUD_FIELD_IIP;
7395 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
7396 be16_to_cpu(mask->dst));
7397 return I40E_ERR_CONFIG;
7401 filter->dst_port = key->dst;
7402 filter->src_port = key->src;
7404 switch (filter->ip_proto) {
7409 dev_err(&pf->pdev->dev,
7410 "Only UDP and TCP transport are supported\n");
7414 filter->flags = field_flags;
7419 * i40e_handle_tclass: Forward to a traffic class on the device
7420 * @vsi: Pointer to VSI
7421 * @tc: traffic class index on the device
7422 * @filter: Pointer to cloud filter structure
7425 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
7426 struct i40e_cloud_filter *filter)
7428 struct i40e_channel *ch, *ch_tmp;
7430 /* direct to a traffic class on the same device */
7432 filter->seid = vsi->seid;
7434 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
7435 if (!filter->dst_port) {
7436 dev_err(&vsi->back->pdev->dev,
7437 "Specify destination port to direct to traffic class that is not default\n");
7440 if (list_empty(&vsi->ch_list))
7442 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
7444 if (ch->seid == vsi->tc_seid_map[tc])
7445 filter->seid = ch->seid;
7449 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
7454 * i40e_configure_clsflower - Configure tc flower filters
7455 * @vsi: Pointer to VSI
7456 * @cls_flower: Pointer to struct tc_cls_flower_offload
7459 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
7460 struct tc_cls_flower_offload *cls_flower)
7462 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
7463 struct i40e_cloud_filter *filter = NULL;
7464 struct i40e_pf *pf = vsi->back;
7468 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
7472 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
7473 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
7476 if (pf->fdir_pf_active_filters ||
7477 (!hlist_empty(&pf->fdir_filter_list))) {
7478 dev_err(&vsi->back->pdev->dev,
7479 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
7483 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
7484 dev_err(&vsi->back->pdev->dev,
7485 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
7486 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7487 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
7490 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
7494 filter->cookie = cls_flower->cookie;
7496 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
7500 err = i40e_handle_tclass(vsi, tc, filter);
7504 /* Add cloud filter */
7505 if (filter->dst_port)
7506 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
7508 err = i40e_add_del_cloud_filter(vsi, filter, true);
7511 dev_err(&pf->pdev->dev,
7512 "Failed to add cloud filter, err %s\n",
7513 i40e_stat_str(&pf->hw, err));
7517 /* add filter to the ordered list */
7518 INIT_HLIST_NODE(&filter->cloud_node);
7520 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
7522 pf->num_cloud_filters++;
7531 * i40e_find_cloud_filter - Find the could filter in the list
7532 * @vsi: Pointer to VSI
7533 * @cookie: filter specific cookie
7536 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
7537 unsigned long *cookie)
7539 struct i40e_cloud_filter *filter = NULL;
7540 struct hlist_node *node2;
7542 hlist_for_each_entry_safe(filter, node2,
7543 &vsi->back->cloud_filter_list, cloud_node)
7544 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
7550 * i40e_delete_clsflower - Remove tc flower filters
7551 * @vsi: Pointer to VSI
7552 * @cls_flower: Pointer to struct tc_cls_flower_offload
7555 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
7556 struct tc_cls_flower_offload *cls_flower)
7558 struct i40e_cloud_filter *filter = NULL;
7559 struct i40e_pf *pf = vsi->back;
7562 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
7567 hash_del(&filter->cloud_node);
7569 if (filter->dst_port)
7570 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
7572 err = i40e_add_del_cloud_filter(vsi, filter, false);
7576 dev_err(&pf->pdev->dev,
7577 "Failed to delete cloud filter, err %s\n",
7578 i40e_stat_str(&pf->hw, err));
7579 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
7582 pf->num_cloud_filters--;
7583 if (!pf->num_cloud_filters)
7584 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
7585 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
7586 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7587 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
7588 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
7594 * i40e_setup_tc_cls_flower - flower classifier offloads
7595 * @netdev: net device to configure
7596 * @type_data: offload data
7598 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
7599 struct tc_cls_flower_offload *cls_flower)
7601 struct i40e_vsi *vsi = np->vsi;
7603 switch (cls_flower->command) {
7604 case TC_CLSFLOWER_REPLACE:
7605 return i40e_configure_clsflower(vsi, cls_flower);
7606 case TC_CLSFLOWER_DESTROY:
7607 return i40e_delete_clsflower(vsi, cls_flower);
7608 case TC_CLSFLOWER_STATS:
7615 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
7618 struct i40e_netdev_priv *np = cb_priv;
7620 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
7624 case TC_SETUP_CLSFLOWER:
7625 return i40e_setup_tc_cls_flower(np, type_data);
7632 static int i40e_setup_tc_block(struct net_device *dev,
7633 struct tc_block_offload *f)
7635 struct i40e_netdev_priv *np = netdev_priv(dev);
7637 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
7640 switch (f->command) {
7642 return tcf_block_cb_register(f->block, i40e_setup_tc_block_cb,
7644 case TC_BLOCK_UNBIND:
7645 tcf_block_cb_unregister(f->block, i40e_setup_tc_block_cb, np);
7652 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
7656 case TC_SETUP_QDISC_MQPRIO:
7657 return i40e_setup_tc(netdev, type_data);
7658 case TC_SETUP_BLOCK:
7659 return i40e_setup_tc_block(netdev, type_data);
7666 * i40e_open - Called when a network interface is made active
7667 * @netdev: network interface device structure
7669 * The open entry point is called when a network interface is made
7670 * active by the system (IFF_UP). At this point all resources needed
7671 * for transmit and receive operations are allocated, the interrupt
7672 * handler is registered with the OS, the netdev watchdog subtask is
7673 * enabled, and the stack is notified that the interface is ready.
7675 * Returns 0 on success, negative value on failure
7677 int i40e_open(struct net_device *netdev)
7679 struct i40e_netdev_priv *np = netdev_priv(netdev);
7680 struct i40e_vsi *vsi = np->vsi;
7681 struct i40e_pf *pf = vsi->back;
7684 /* disallow open during test or if eeprom is broken */
7685 if (test_bit(__I40E_TESTING, pf->state) ||
7686 test_bit(__I40E_BAD_EEPROM, pf->state))
7689 netif_carrier_off(netdev);
7691 if (i40e_force_link_state(pf, true))
7694 err = i40e_vsi_open(vsi);
7698 /* configure global TSO hardware offload settings */
7699 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
7700 TCP_FLAG_FIN) >> 16);
7701 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
7703 TCP_FLAG_CWR) >> 16);
7704 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
7706 udp_tunnel_get_rx_info(netdev);
7713 * @vsi: the VSI to open
7715 * Finish initialization of the VSI.
7717 * Returns 0 on success, negative value on failure
7719 * Note: expects to be called while under rtnl_lock()
7721 int i40e_vsi_open(struct i40e_vsi *vsi)
7723 struct i40e_pf *pf = vsi->back;
7724 char int_name[I40E_INT_NAME_STR_LEN];
7727 /* allocate descriptors */
7728 err = i40e_vsi_setup_tx_resources(vsi);
7731 err = i40e_vsi_setup_rx_resources(vsi);
7735 err = i40e_vsi_configure(vsi);
7740 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
7741 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
7742 err = i40e_vsi_request_irq(vsi, int_name);
7746 /* Notify the stack of the actual queue counts. */
7747 err = netif_set_real_num_tx_queues(vsi->netdev,
7748 vsi->num_queue_pairs);
7750 goto err_set_queues;
7752 err = netif_set_real_num_rx_queues(vsi->netdev,
7753 vsi->num_queue_pairs);
7755 goto err_set_queues;
7757 } else if (vsi->type == I40E_VSI_FDIR) {
7758 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
7759 dev_driver_string(&pf->pdev->dev),
7760 dev_name(&pf->pdev->dev));
7761 err = i40e_vsi_request_irq(vsi, int_name);
7768 err = i40e_up_complete(vsi);
7770 goto err_up_complete;
7777 i40e_vsi_free_irq(vsi);
7779 i40e_vsi_free_rx_resources(vsi);
7781 i40e_vsi_free_tx_resources(vsi);
7782 if (vsi == pf->vsi[pf->lan_vsi])
7783 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
7789 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
7790 * @pf: Pointer to PF
7792 * This function destroys the hlist where all the Flow Director
7793 * filters were saved.
7795 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
7797 struct i40e_fdir_filter *filter;
7798 struct i40e_flex_pit *pit_entry, *tmp;
7799 struct hlist_node *node2;
7801 hlist_for_each_entry_safe(filter, node2,
7802 &pf->fdir_filter_list, fdir_node) {
7803 hlist_del(&filter->fdir_node);
7807 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
7808 list_del(&pit_entry->list);
7811 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
7813 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
7814 list_del(&pit_entry->list);
7817 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
7819 pf->fdir_pf_active_filters = 0;
7820 pf->fd_tcp4_filter_cnt = 0;
7821 pf->fd_udp4_filter_cnt = 0;
7822 pf->fd_sctp4_filter_cnt = 0;
7823 pf->fd_ip4_filter_cnt = 0;
7825 /* Reprogram the default input set for TCP/IPv4 */
7826 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
7827 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
7828 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
7830 /* Reprogram the default input set for UDP/IPv4 */
7831 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
7832 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
7833 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
7835 /* Reprogram the default input set for SCTP/IPv4 */
7836 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
7837 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
7838 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
7840 /* Reprogram the default input set for Other/IPv4 */
7841 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
7842 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
7844 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
7845 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
7849 * i40e_cloud_filter_exit - Cleans up the cloud filters
7850 * @pf: Pointer to PF
7852 * This function destroys the hlist where all the cloud filters
7855 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
7857 struct i40e_cloud_filter *cfilter;
7858 struct hlist_node *node;
7860 hlist_for_each_entry_safe(cfilter, node,
7861 &pf->cloud_filter_list, cloud_node) {
7862 hlist_del(&cfilter->cloud_node);
7865 pf->num_cloud_filters = 0;
7867 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
7868 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
7869 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7870 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
7871 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
7876 * i40e_close - Disables a network interface
7877 * @netdev: network interface device structure
7879 * The close entry point is called when an interface is de-activated
7880 * by the OS. The hardware is still under the driver's control, but
7881 * this netdev interface is disabled.
7883 * Returns 0, this is not allowed to fail
7885 int i40e_close(struct net_device *netdev)
7887 struct i40e_netdev_priv *np = netdev_priv(netdev);
7888 struct i40e_vsi *vsi = np->vsi;
7890 i40e_vsi_close(vsi);
7896 * i40e_do_reset - Start a PF or Core Reset sequence
7897 * @pf: board private structure
7898 * @reset_flags: which reset is requested
7899 * @lock_acquired: indicates whether or not the lock has been acquired
7900 * before this function was called.
7902 * The essential difference in resets is that the PF Reset
7903 * doesn't clear the packet buffers, doesn't reset the PE
7904 * firmware, and doesn't bother the other PFs on the chip.
7906 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
7910 WARN_ON(in_interrupt());
7913 /* do the biggest reset indicated */
7914 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
7916 /* Request a Global Reset
7918 * This will start the chip's countdown to the actual full
7919 * chip reset event, and a warning interrupt to be sent
7920 * to all PFs, including the requestor. Our handler
7921 * for the warning interrupt will deal with the shutdown
7922 * and recovery of the switch setup.
7924 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
7925 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
7926 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
7927 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
7929 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
7931 /* Request a Core Reset
7933 * Same as Global Reset, except does *not* include the MAC/PHY
7935 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
7936 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
7937 val |= I40E_GLGEN_RTRIG_CORER_MASK;
7938 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
7939 i40e_flush(&pf->hw);
7941 } else if (reset_flags & I40E_PF_RESET_FLAG) {
7943 /* Request a PF Reset
7945 * Resets only the PF-specific registers
7947 * This goes directly to the tear-down and rebuild of
7948 * the switch, since we need to do all the recovery as
7949 * for the Core Reset.
7951 dev_dbg(&pf->pdev->dev, "PFR requested\n");
7952 i40e_handle_reset_warning(pf, lock_acquired);
7954 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
7957 /* Find the VSI(s) that requested a re-init */
7958 dev_info(&pf->pdev->dev,
7959 "VSI reinit requested\n");
7960 for (v = 0; v < pf->num_alloc_vsi; v++) {
7961 struct i40e_vsi *vsi = pf->vsi[v];
7964 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
7966 i40e_vsi_reinit_locked(pf->vsi[v]);
7968 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
7971 /* Find the VSI(s) that needs to be brought down */
7972 dev_info(&pf->pdev->dev, "VSI down requested\n");
7973 for (v = 0; v < pf->num_alloc_vsi; v++) {
7974 struct i40e_vsi *vsi = pf->vsi[v];
7977 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
7979 set_bit(__I40E_VSI_DOWN, vsi->state);
7984 dev_info(&pf->pdev->dev,
7985 "bad reset request 0x%08x\n", reset_flags);
7989 #ifdef CONFIG_I40E_DCB
7991 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
7992 * @pf: board private structure
7993 * @old_cfg: current DCB config
7994 * @new_cfg: new DCB config
7996 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
7997 struct i40e_dcbx_config *old_cfg,
7998 struct i40e_dcbx_config *new_cfg)
8000 bool need_reconfig = false;
8002 /* Check if ETS configuration has changed */
8003 if (memcmp(&new_cfg->etscfg,
8005 sizeof(new_cfg->etscfg))) {
8006 /* If Priority Table has changed reconfig is needed */
8007 if (memcmp(&new_cfg->etscfg.prioritytable,
8008 &old_cfg->etscfg.prioritytable,
8009 sizeof(new_cfg->etscfg.prioritytable))) {
8010 need_reconfig = true;
8011 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
8014 if (memcmp(&new_cfg->etscfg.tcbwtable,
8015 &old_cfg->etscfg.tcbwtable,
8016 sizeof(new_cfg->etscfg.tcbwtable)))
8017 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
8019 if (memcmp(&new_cfg->etscfg.tsatable,
8020 &old_cfg->etscfg.tsatable,
8021 sizeof(new_cfg->etscfg.tsatable)))
8022 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
8025 /* Check if PFC configuration has changed */
8026 if (memcmp(&new_cfg->pfc,
8028 sizeof(new_cfg->pfc))) {
8029 need_reconfig = true;
8030 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
8033 /* Check if APP Table has changed */
8034 if (memcmp(&new_cfg->app,
8036 sizeof(new_cfg->app))) {
8037 need_reconfig = true;
8038 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
8041 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
8042 return need_reconfig;
8046 * i40e_handle_lldp_event - Handle LLDP Change MIB event
8047 * @pf: board private structure
8048 * @e: event info posted on ARQ
8050 static int i40e_handle_lldp_event(struct i40e_pf *pf,
8051 struct i40e_arq_event_info *e)
8053 struct i40e_aqc_lldp_get_mib *mib =
8054 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
8055 struct i40e_hw *hw = &pf->hw;
8056 struct i40e_dcbx_config tmp_dcbx_cfg;
8057 bool need_reconfig = false;
8061 /* Not DCB capable or capability disabled */
8062 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
8065 /* Ignore if event is not for Nearest Bridge */
8066 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
8067 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
8068 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
8069 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
8072 /* Check MIB Type and return if event for Remote MIB update */
8073 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
8074 dev_dbg(&pf->pdev->dev,
8075 "LLDP event mib type %s\n", type ? "remote" : "local");
8076 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
8077 /* Update the remote cached instance and return */
8078 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
8079 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
8080 &hw->remote_dcbx_config);
8084 /* Store the old configuration */
8085 tmp_dcbx_cfg = hw->local_dcbx_config;
8087 /* Reset the old DCBx configuration data */
8088 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
8089 /* Get updated DCBX data from firmware */
8090 ret = i40e_get_dcb_config(&pf->hw);
8092 dev_info(&pf->pdev->dev,
8093 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
8094 i40e_stat_str(&pf->hw, ret),
8095 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8099 /* No change detected in DCBX configs */
8100 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
8101 sizeof(tmp_dcbx_cfg))) {
8102 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
8106 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
8107 &hw->local_dcbx_config);
8109 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
8114 /* Enable DCB tagging only when more than one TC */
8115 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
8116 pf->flags |= I40E_FLAG_DCB_ENABLED;
8118 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8120 set_bit(__I40E_PORT_SUSPENDED, pf->state);
8121 /* Reconfiguration needed quiesce all VSIs */
8122 i40e_pf_quiesce_all_vsi(pf);
8124 /* Changes in configuration update VEB/VSI */
8125 i40e_dcb_reconfigure(pf);
8127 ret = i40e_resume_port_tx(pf);
8129 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
8130 /* In case of error no point in resuming VSIs */
8134 /* Wait for the PF's queues to be disabled */
8135 ret = i40e_pf_wait_queues_disabled(pf);
8137 /* Schedule PF reset to recover */
8138 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
8139 i40e_service_event_schedule(pf);
8141 i40e_pf_unquiesce_all_vsi(pf);
8142 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
8143 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
8149 #endif /* CONFIG_I40E_DCB */
8152 * i40e_do_reset_safe - Protected reset path for userland calls.
8153 * @pf: board private structure
8154 * @reset_flags: which reset is requested
8157 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
8160 i40e_do_reset(pf, reset_flags, true);
8165 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
8166 * @pf: board private structure
8167 * @e: event info posted on ARQ
8169 * Handler for LAN Queue Overflow Event generated by the firmware for PF
8172 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
8173 struct i40e_arq_event_info *e)
8175 struct i40e_aqc_lan_overflow *data =
8176 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
8177 u32 queue = le32_to_cpu(data->prtdcb_rupto);
8178 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
8179 struct i40e_hw *hw = &pf->hw;
8183 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
8186 /* Queue belongs to VF, find the VF and issue VF reset */
8187 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
8188 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
8189 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
8190 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
8191 vf_id -= hw->func_caps.vf_base_id;
8192 vf = &pf->vf[vf_id];
8193 i40e_vc_notify_vf_reset(vf);
8194 /* Allow VF to process pending reset notification */
8196 i40e_reset_vf(vf, false);
8201 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
8202 * @pf: board private structure
8204 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
8208 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8209 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
8214 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
8215 * @pf: board private structure
8217 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
8221 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8222 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
8223 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
8224 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
8229 * i40e_get_global_fd_count - Get total FD filters programmed on device
8230 * @pf: board private structure
8232 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
8236 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
8237 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
8238 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
8239 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
8244 * i40e_reenable_fdir_sb - Restore FDir SB capability
8245 * @pf: board private structure
8247 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
8249 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
8250 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8251 (I40E_DEBUG_FD & pf->hw.debug_mask))
8252 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
8256 * i40e_reenable_fdir_atr - Restore FDir ATR capability
8257 * @pf: board private structure
8259 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
8261 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
8262 /* ATR uses the same filtering logic as SB rules. It only
8263 * functions properly if the input set mask is at the default
8264 * settings. It is safe to restore the default input set
8265 * because there are no active TCPv4 filter rules.
8267 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8268 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8269 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8271 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8272 (I40E_DEBUG_FD & pf->hw.debug_mask))
8273 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
8278 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
8279 * @pf: board private structure
8280 * @filter: FDir filter to remove
8282 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
8283 struct i40e_fdir_filter *filter)
8285 /* Update counters */
8286 pf->fdir_pf_active_filters--;
8289 switch (filter->flow_type) {
8291 pf->fd_tcp4_filter_cnt--;
8294 pf->fd_udp4_filter_cnt--;
8297 pf->fd_sctp4_filter_cnt--;
8300 switch (filter->ip4_proto) {
8302 pf->fd_tcp4_filter_cnt--;
8305 pf->fd_udp4_filter_cnt--;
8308 pf->fd_sctp4_filter_cnt--;
8311 pf->fd_ip4_filter_cnt--;
8317 /* Remove the filter from the list and free memory */
8318 hlist_del(&filter->fdir_node);
8323 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
8324 * @pf: board private structure
8326 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
8328 struct i40e_fdir_filter *filter;
8329 u32 fcnt_prog, fcnt_avail;
8330 struct hlist_node *node;
8332 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8335 /* Check if we have enough room to re-enable FDir SB capability. */
8336 fcnt_prog = i40e_get_global_fd_count(pf);
8337 fcnt_avail = pf->fdir_pf_filter_count;
8338 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
8339 (pf->fd_add_err == 0) ||
8340 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
8341 i40e_reenable_fdir_sb(pf);
8343 /* We should wait for even more space before re-enabling ATR.
8344 * Additionally, we cannot enable ATR as long as we still have TCP SB
8347 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
8348 (pf->fd_tcp4_filter_cnt == 0))
8349 i40e_reenable_fdir_atr(pf);
8351 /* if hw had a problem adding a filter, delete it */
8352 if (pf->fd_inv > 0) {
8353 hlist_for_each_entry_safe(filter, node,
8354 &pf->fdir_filter_list, fdir_node)
8355 if (filter->fd_id == pf->fd_inv)
8356 i40e_delete_invalid_filter(pf, filter);
8360 #define I40E_MIN_FD_FLUSH_INTERVAL 10
8361 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
8363 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
8364 * @pf: board private structure
8366 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
8368 unsigned long min_flush_time;
8369 int flush_wait_retry = 50;
8370 bool disable_atr = false;
8374 if (!time_after(jiffies, pf->fd_flush_timestamp +
8375 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
8378 /* If the flush is happening too quick and we have mostly SB rules we
8379 * should not re-enable ATR for some time.
8381 min_flush_time = pf->fd_flush_timestamp +
8382 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
8383 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
8385 if (!(time_after(jiffies, min_flush_time)) &&
8386 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
8387 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8388 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
8392 pf->fd_flush_timestamp = jiffies;
8393 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
8394 /* flush all filters */
8395 wr32(&pf->hw, I40E_PFQF_CTL_1,
8396 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
8397 i40e_flush(&pf->hw);
8401 /* Check FD flush status every 5-6msec */
8402 usleep_range(5000, 6000);
8403 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
8404 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
8406 } while (flush_wait_retry--);
8407 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
8408 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
8410 /* replay sideband filters */
8411 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
8412 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
8413 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
8414 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
8415 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8416 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
8421 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
8422 * @pf: board private structure
8424 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
8426 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
8429 /* We can see up to 256 filter programming desc in transit if the filters are
8430 * being applied really fast; before we see the first
8431 * filter miss error on Rx queue 0. Accumulating enough error messages before
8432 * reacting will make sure we don't cause flush too often.
8434 #define I40E_MAX_FD_PROGRAM_ERROR 256
8437 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
8438 * @pf: board private structure
8440 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
8443 /* if interface is down do nothing */
8444 if (test_bit(__I40E_DOWN, pf->state))
8447 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8448 i40e_fdir_flush_and_replay(pf);
8450 i40e_fdir_check_and_reenable(pf);
8455 * i40e_vsi_link_event - notify VSI of a link event
8456 * @vsi: vsi to be notified
8457 * @link_up: link up or down
8459 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
8461 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
8464 switch (vsi->type) {
8466 if (!vsi->netdev || !vsi->netdev_registered)
8470 netif_carrier_on(vsi->netdev);
8471 netif_tx_wake_all_queues(vsi->netdev);
8473 netif_carrier_off(vsi->netdev);
8474 netif_tx_stop_all_queues(vsi->netdev);
8478 case I40E_VSI_SRIOV:
8479 case I40E_VSI_VMDQ2:
8481 case I40E_VSI_IWARP:
8482 case I40E_VSI_MIRROR:
8484 /* there is no notification for other VSIs */
8490 * i40e_veb_link_event - notify elements on the veb of a link event
8491 * @veb: veb to be notified
8492 * @link_up: link up or down
8494 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
8499 if (!veb || !veb->pf)
8503 /* depth first... */
8504 for (i = 0; i < I40E_MAX_VEB; i++)
8505 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
8506 i40e_veb_link_event(pf->veb[i], link_up);
8508 /* ... now the local VSIs */
8509 for (i = 0; i < pf->num_alloc_vsi; i++)
8510 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
8511 i40e_vsi_link_event(pf->vsi[i], link_up);
8515 * i40e_link_event - Update netif_carrier status
8516 * @pf: board private structure
8518 static void i40e_link_event(struct i40e_pf *pf)
8520 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8521 u8 new_link_speed, old_link_speed;
8523 bool new_link, old_link;
8525 /* set this to force the get_link_status call to refresh state */
8526 pf->hw.phy.get_link_info = true;
8527 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
8528 status = i40e_get_link_status(&pf->hw, &new_link);
8530 /* On success, disable temp link polling */
8531 if (status == I40E_SUCCESS) {
8532 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
8534 /* Enable link polling temporarily until i40e_get_link_status
8535 * returns I40E_SUCCESS
8537 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
8538 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
8543 old_link_speed = pf->hw.phy.link_info_old.link_speed;
8544 new_link_speed = pf->hw.phy.link_info.link_speed;
8546 if (new_link == old_link &&
8547 new_link_speed == old_link_speed &&
8548 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
8549 new_link == netif_carrier_ok(vsi->netdev)))
8552 i40e_print_link_message(vsi, new_link);
8554 /* Notify the base of the switch tree connected to
8555 * the link. Floating VEBs are not notified.
8557 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8558 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
8560 i40e_vsi_link_event(vsi, new_link);
8563 i40e_vc_notify_link_state(pf);
8565 if (pf->flags & I40E_FLAG_PTP)
8566 i40e_ptp_set_increment(pf);
8570 * i40e_watchdog_subtask - periodic checks not using event driven response
8571 * @pf: board private structure
8573 static void i40e_watchdog_subtask(struct i40e_pf *pf)
8577 /* if interface is down do nothing */
8578 if (test_bit(__I40E_DOWN, pf->state) ||
8579 test_bit(__I40E_CONFIG_BUSY, pf->state))
8582 /* make sure we don't do these things too often */
8583 if (time_before(jiffies, (pf->service_timer_previous +
8584 pf->service_timer_period)))
8586 pf->service_timer_previous = jiffies;
8588 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
8589 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
8590 i40e_link_event(pf);
8592 /* Update the stats for active netdevs so the network stack
8593 * can look at updated numbers whenever it cares to
8595 for (i = 0; i < pf->num_alloc_vsi; i++)
8596 if (pf->vsi[i] && pf->vsi[i]->netdev)
8597 i40e_update_stats(pf->vsi[i]);
8599 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
8600 /* Update the stats for the active switching components */
8601 for (i = 0; i < I40E_MAX_VEB; i++)
8603 i40e_update_veb_stats(pf->veb[i]);
8606 i40e_ptp_rx_hang(pf);
8607 i40e_ptp_tx_hang(pf);
8611 * i40e_reset_subtask - Set up for resetting the device and driver
8612 * @pf: board private structure
8614 static void i40e_reset_subtask(struct i40e_pf *pf)
8616 u32 reset_flags = 0;
8618 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
8619 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
8620 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
8622 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
8623 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
8624 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
8626 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
8627 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
8628 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
8630 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
8631 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
8632 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
8634 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
8635 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
8636 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
8639 /* If there's a recovery already waiting, it takes
8640 * precedence before starting a new reset sequence.
8642 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
8643 i40e_prep_for_reset(pf, false);
8645 i40e_rebuild(pf, false, false);
8648 /* If we're already down or resetting, just bail */
8650 !test_bit(__I40E_DOWN, pf->state) &&
8651 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
8652 i40e_do_reset(pf, reset_flags, false);
8657 * i40e_handle_link_event - Handle link event
8658 * @pf: board private structure
8659 * @e: event info posted on ARQ
8661 static void i40e_handle_link_event(struct i40e_pf *pf,
8662 struct i40e_arq_event_info *e)
8664 struct i40e_aqc_get_link_status *status =
8665 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
8667 /* Do a new status request to re-enable LSE reporting
8668 * and load new status information into the hw struct
8669 * This completely ignores any state information
8670 * in the ARQ event info, instead choosing to always
8671 * issue the AQ update link status command.
8673 i40e_link_event(pf);
8675 /* Check if module meets thermal requirements */
8676 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
8677 dev_err(&pf->pdev->dev,
8678 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
8679 dev_err(&pf->pdev->dev,
8680 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
8682 /* check for unqualified module, if link is down, suppress
8683 * the message if link was forced to be down.
8685 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
8686 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
8687 (!(status->link_info & I40E_AQ_LINK_UP)) &&
8688 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
8689 dev_err(&pf->pdev->dev,
8690 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
8691 dev_err(&pf->pdev->dev,
8692 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
8698 * i40e_clean_adminq_subtask - Clean the AdminQ rings
8699 * @pf: board private structure
8701 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
8703 struct i40e_arq_event_info event;
8704 struct i40e_hw *hw = &pf->hw;
8711 /* Do not run clean AQ when PF reset fails */
8712 if (test_bit(__I40E_RESET_FAILED, pf->state))
8715 /* check for error indications */
8716 val = rd32(&pf->hw, pf->hw.aq.arq.len);
8718 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
8719 if (hw->debug_mask & I40E_DEBUG_AQ)
8720 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
8721 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
8723 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
8724 if (hw->debug_mask & I40E_DEBUG_AQ)
8725 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
8726 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
8727 pf->arq_overflows++;
8729 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
8730 if (hw->debug_mask & I40E_DEBUG_AQ)
8731 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
8732 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
8735 wr32(&pf->hw, pf->hw.aq.arq.len, val);
8737 val = rd32(&pf->hw, pf->hw.aq.asq.len);
8739 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
8740 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
8741 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
8742 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
8744 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
8745 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
8746 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
8747 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
8749 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
8750 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
8751 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
8752 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
8755 wr32(&pf->hw, pf->hw.aq.asq.len, val);
8757 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
8758 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
8763 ret = i40e_clean_arq_element(hw, &event, &pending);
8764 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
8767 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
8771 opcode = le16_to_cpu(event.desc.opcode);
8774 case i40e_aqc_opc_get_link_status:
8775 i40e_handle_link_event(pf, &event);
8777 case i40e_aqc_opc_send_msg_to_pf:
8778 ret = i40e_vc_process_vf_msg(pf,
8779 le16_to_cpu(event.desc.retval),
8780 le32_to_cpu(event.desc.cookie_high),
8781 le32_to_cpu(event.desc.cookie_low),
8785 case i40e_aqc_opc_lldp_update_mib:
8786 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
8787 #ifdef CONFIG_I40E_DCB
8789 ret = i40e_handle_lldp_event(pf, &event);
8791 #endif /* CONFIG_I40E_DCB */
8793 case i40e_aqc_opc_event_lan_overflow:
8794 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
8795 i40e_handle_lan_overflow_event(pf, &event);
8797 case i40e_aqc_opc_send_msg_to_peer:
8798 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
8800 case i40e_aqc_opc_nvm_erase:
8801 case i40e_aqc_opc_nvm_update:
8802 case i40e_aqc_opc_oem_post_update:
8803 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
8804 "ARQ NVM operation 0x%04x completed\n",
8808 dev_info(&pf->pdev->dev,
8809 "ARQ: Unknown event 0x%04x ignored\n",
8813 } while (i++ < pf->adminq_work_limit);
8815 if (i < pf->adminq_work_limit)
8816 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
8818 /* re-enable Admin queue interrupt cause */
8819 val = rd32(hw, I40E_PFINT_ICR0_ENA);
8820 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
8821 wr32(hw, I40E_PFINT_ICR0_ENA, val);
8824 kfree(event.msg_buf);
8828 * i40e_verify_eeprom - make sure eeprom is good to use
8829 * @pf: board private structure
8831 static void i40e_verify_eeprom(struct i40e_pf *pf)
8835 err = i40e_diag_eeprom_test(&pf->hw);
8837 /* retry in case of garbage read */
8838 err = i40e_diag_eeprom_test(&pf->hw);
8840 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
8842 set_bit(__I40E_BAD_EEPROM, pf->state);
8846 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
8847 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
8848 clear_bit(__I40E_BAD_EEPROM, pf->state);
8853 * i40e_enable_pf_switch_lb
8854 * @pf: pointer to the PF structure
8856 * enable switch loop back or die - no point in a return value
8858 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
8860 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8861 struct i40e_vsi_context ctxt;
8864 ctxt.seid = pf->main_vsi_seid;
8865 ctxt.pf_num = pf->hw.pf_id;
8867 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8869 dev_info(&pf->pdev->dev,
8870 "couldn't get PF vsi config, err %s aq_err %s\n",
8871 i40e_stat_str(&pf->hw, ret),
8872 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8875 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8876 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8877 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8879 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
8881 dev_info(&pf->pdev->dev,
8882 "update vsi switch failed, err %s aq_err %s\n",
8883 i40e_stat_str(&pf->hw, ret),
8884 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8889 * i40e_disable_pf_switch_lb
8890 * @pf: pointer to the PF structure
8892 * disable switch loop back or die - no point in a return value
8894 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
8896 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8897 struct i40e_vsi_context ctxt;
8900 ctxt.seid = pf->main_vsi_seid;
8901 ctxt.pf_num = pf->hw.pf_id;
8903 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8905 dev_info(&pf->pdev->dev,
8906 "couldn't get PF vsi config, err %s aq_err %s\n",
8907 i40e_stat_str(&pf->hw, ret),
8908 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8911 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8912 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8913 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8915 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
8917 dev_info(&pf->pdev->dev,
8918 "update vsi switch failed, err %s aq_err %s\n",
8919 i40e_stat_str(&pf->hw, ret),
8920 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8925 * i40e_config_bridge_mode - Configure the HW bridge mode
8926 * @veb: pointer to the bridge instance
8928 * Configure the loop back mode for the LAN VSI that is downlink to the
8929 * specified HW bridge instance. It is expected this function is called
8930 * when a new HW bridge is instantiated.
8932 static void i40e_config_bridge_mode(struct i40e_veb *veb)
8934 struct i40e_pf *pf = veb->pf;
8936 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
8937 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
8938 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8939 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
8940 i40e_disable_pf_switch_lb(pf);
8942 i40e_enable_pf_switch_lb(pf);
8946 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
8947 * @veb: pointer to the VEB instance
8949 * This is a recursive function that first builds the attached VSIs then
8950 * recurses in to build the next layer of VEB. We track the connections
8951 * through our own index numbers because the seid's from the HW could
8952 * change across the reset.
8954 static int i40e_reconstitute_veb(struct i40e_veb *veb)
8956 struct i40e_vsi *ctl_vsi = NULL;
8957 struct i40e_pf *pf = veb->pf;
8961 /* build VSI that owns this VEB, temporarily attached to base VEB */
8962 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
8964 pf->vsi[v]->veb_idx == veb->idx &&
8965 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
8966 ctl_vsi = pf->vsi[v];
8971 dev_info(&pf->pdev->dev,
8972 "missing owner VSI for veb_idx %d\n", veb->idx);
8974 goto end_reconstitute;
8976 if (ctl_vsi != pf->vsi[pf->lan_vsi])
8977 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8978 ret = i40e_add_vsi(ctl_vsi);
8980 dev_info(&pf->pdev->dev,
8981 "rebuild of veb_idx %d owner VSI failed: %d\n",
8983 goto end_reconstitute;
8985 i40e_vsi_reset_stats(ctl_vsi);
8987 /* create the VEB in the switch and move the VSI onto the VEB */
8988 ret = i40e_add_veb(veb, ctl_vsi);
8990 goto end_reconstitute;
8992 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
8993 veb->bridge_mode = BRIDGE_MODE_VEB;
8995 veb->bridge_mode = BRIDGE_MODE_VEPA;
8996 i40e_config_bridge_mode(veb);
8998 /* create the remaining VSIs attached to this VEB */
8999 for (v = 0; v < pf->num_alloc_vsi; v++) {
9000 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
9003 if (pf->vsi[v]->veb_idx == veb->idx) {
9004 struct i40e_vsi *vsi = pf->vsi[v];
9006 vsi->uplink_seid = veb->seid;
9007 ret = i40e_add_vsi(vsi);
9009 dev_info(&pf->pdev->dev,
9010 "rebuild of vsi_idx %d failed: %d\n",
9012 goto end_reconstitute;
9014 i40e_vsi_reset_stats(vsi);
9018 /* create any VEBs attached to this VEB - RECURSION */
9019 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9020 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
9021 pf->veb[veb_idx]->uplink_seid = veb->seid;
9022 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
9033 * i40e_get_capabilities - get info about the HW
9034 * @pf: the PF struct
9036 static int i40e_get_capabilities(struct i40e_pf *pf,
9037 enum i40e_admin_queue_opc list_type)
9039 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
9044 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
9046 cap_buf = kzalloc(buf_len, GFP_KERNEL);
9050 /* this loads the data into the hw struct for us */
9051 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
9052 &data_size, list_type,
9054 /* data loaded, buffer no longer needed */
9057 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
9058 /* retry with a larger buffer */
9059 buf_len = data_size;
9060 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
9061 dev_info(&pf->pdev->dev,
9062 "capability discovery failed, err %s aq_err %s\n",
9063 i40e_stat_str(&pf->hw, err),
9064 i40e_aq_str(&pf->hw,
9065 pf->hw.aq.asq_last_status));
9070 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
9071 if (list_type == i40e_aqc_opc_list_func_capabilities) {
9072 dev_info(&pf->pdev->dev,
9073 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
9074 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
9075 pf->hw.func_caps.num_msix_vectors,
9076 pf->hw.func_caps.num_msix_vectors_vf,
9077 pf->hw.func_caps.fd_filters_guaranteed,
9078 pf->hw.func_caps.fd_filters_best_effort,
9079 pf->hw.func_caps.num_tx_qp,
9080 pf->hw.func_caps.num_vsis);
9081 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
9082 dev_info(&pf->pdev->dev,
9083 "switch_mode=0x%04x, function_valid=0x%08x\n",
9084 pf->hw.dev_caps.switch_mode,
9085 pf->hw.dev_caps.valid_functions);
9086 dev_info(&pf->pdev->dev,
9087 "SR-IOV=%d, num_vfs for all function=%u\n",
9088 pf->hw.dev_caps.sr_iov_1_1,
9089 pf->hw.dev_caps.num_vfs);
9090 dev_info(&pf->pdev->dev,
9091 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
9092 pf->hw.dev_caps.num_vsis,
9093 pf->hw.dev_caps.num_rx_qp,
9094 pf->hw.dev_caps.num_tx_qp);
9097 if (list_type == i40e_aqc_opc_list_func_capabilities) {
9098 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
9099 + pf->hw.func_caps.num_vfs)
9100 if (pf->hw.revision_id == 0 &&
9101 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
9102 dev_info(&pf->pdev->dev,
9103 "got num_vsis %d, setting num_vsis to %d\n",
9104 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
9105 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
9111 static int i40e_vsi_clear(struct i40e_vsi *vsi);
9114 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
9115 * @pf: board private structure
9117 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
9119 struct i40e_vsi *vsi;
9121 /* quick workaround for an NVM issue that leaves a critical register
9124 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
9125 static const u32 hkey[] = {
9126 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
9127 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
9128 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
9132 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
9133 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
9136 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
9139 /* find existing VSI and see if it needs configuring */
9140 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9142 /* create a new VSI if none exists */
9144 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
9145 pf->vsi[pf->lan_vsi]->seid, 0);
9147 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
9148 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9149 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
9154 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
9158 * i40e_fdir_teardown - release the Flow Director resources
9159 * @pf: board private structure
9161 static void i40e_fdir_teardown(struct i40e_pf *pf)
9163 struct i40e_vsi *vsi;
9165 i40e_fdir_filter_exit(pf);
9166 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9168 i40e_vsi_release(vsi);
9172 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
9174 * @seid: seid of main or channel VSIs
9176 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
9177 * existed before reset
9179 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
9181 struct i40e_cloud_filter *cfilter;
9182 struct i40e_pf *pf = vsi->back;
9183 struct hlist_node *node;
9186 /* Add cloud filters back if they exist */
9187 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
9189 if (cfilter->seid != seid)
9192 if (cfilter->dst_port)
9193 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
9196 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
9199 dev_dbg(&pf->pdev->dev,
9200 "Failed to rebuild cloud filter, err %s aq_err %s\n",
9201 i40e_stat_str(&pf->hw, ret),
9202 i40e_aq_str(&pf->hw,
9203 pf->hw.aq.asq_last_status));
9211 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
9214 * Rebuilds channel VSIs if they existed before reset
9216 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
9218 struct i40e_channel *ch, *ch_tmp;
9221 if (list_empty(&vsi->ch_list))
9224 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
9225 if (!ch->initialized)
9227 /* Proceed with creation of channel (VMDq2) VSI */
9228 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
9230 dev_info(&vsi->back->pdev->dev,
9231 "failed to rebuild channels using uplink_seid %u\n",
9235 /* Reconfigure TX queues using QTX_CTL register */
9236 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
9238 dev_info(&vsi->back->pdev->dev,
9239 "failed to configure TX rings for channel %u\n",
9243 /* update 'next_base_queue' */
9244 vsi->next_base_queue = vsi->next_base_queue +
9245 ch->num_queue_pairs;
9246 if (ch->max_tx_rate) {
9247 u64 credits = ch->max_tx_rate;
9249 if (i40e_set_bw_limit(vsi, ch->seid,
9253 do_div(credits, I40E_BW_CREDIT_DIVISOR);
9254 dev_dbg(&vsi->back->pdev->dev,
9255 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9260 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
9262 dev_dbg(&vsi->back->pdev->dev,
9263 "Failed to rebuild cloud filters for channel VSI %u\n",
9272 * i40e_prep_for_reset - prep for the core to reset
9273 * @pf: board private structure
9274 * @lock_acquired: indicates whether or not the lock has been acquired
9275 * before this function was called.
9277 * Close up the VFs and other things in prep for PF Reset.
9279 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired)
9281 struct i40e_hw *hw = &pf->hw;
9282 i40e_status ret = 0;
9285 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
9286 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
9288 if (i40e_check_asq_alive(&pf->hw))
9289 i40e_vc_notify_reset(pf);
9291 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
9293 /* quiesce the VSIs and their queues that are not already DOWN */
9294 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
9297 i40e_pf_quiesce_all_vsi(pf);
9301 for (v = 0; v < pf->num_alloc_vsi; v++) {
9303 pf->vsi[v]->seid = 0;
9306 i40e_shutdown_adminq(&pf->hw);
9308 /* call shutdown HMC */
9309 if (hw->hmc.hmc_obj) {
9310 ret = i40e_shutdown_lan_hmc(hw);
9312 dev_warn(&pf->pdev->dev,
9313 "shutdown_lan_hmc failed: %d\n", ret);
9318 * i40e_send_version - update firmware with driver version
9321 static void i40e_send_version(struct i40e_pf *pf)
9323 struct i40e_driver_version dv;
9325 dv.major_version = DRV_VERSION_MAJOR;
9326 dv.minor_version = DRV_VERSION_MINOR;
9327 dv.build_version = DRV_VERSION_BUILD;
9328 dv.subbuild_version = 0;
9329 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
9330 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
9334 * i40e_get_oem_version - get OEM specific version information
9335 * @hw: pointer to the hardware structure
9337 static void i40e_get_oem_version(struct i40e_hw *hw)
9339 u16 block_offset = 0xffff;
9340 u16 block_length = 0;
9341 u16 capabilities = 0;
9345 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
9346 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
9347 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
9348 #define I40E_NVM_OEM_GEN_OFFSET 0x02
9349 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
9350 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
9351 #define I40E_NVM_OEM_LENGTH 3
9353 /* Check if pointer to OEM version block is valid. */
9354 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
9355 if (block_offset == 0xffff)
9358 /* Check if OEM version block has correct length. */
9359 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
9361 if (block_length < I40E_NVM_OEM_LENGTH)
9364 /* Check if OEM version format is as expected. */
9365 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
9367 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
9370 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
9372 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
9374 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
9375 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
9379 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
9380 * @pf: board private structure
9382 static int i40e_reset(struct i40e_pf *pf)
9384 struct i40e_hw *hw = &pf->hw;
9387 ret = i40e_pf_reset(hw);
9389 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
9390 set_bit(__I40E_RESET_FAILED, pf->state);
9391 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
9399 * i40e_rebuild - rebuild using a saved config
9400 * @pf: board private structure
9401 * @reinit: if the Main VSI needs to re-initialized.
9402 * @lock_acquired: indicates whether or not the lock has been acquired
9403 * before this function was called.
9405 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
9407 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9408 struct i40e_hw *hw = &pf->hw;
9409 u8 set_fc_aq_fail = 0;
9414 if (test_bit(__I40E_DOWN, pf->state))
9415 goto clear_recovery;
9416 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
9418 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
9419 ret = i40e_init_adminq(&pf->hw);
9421 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
9422 i40e_stat_str(&pf->hw, ret),
9423 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9424 goto clear_recovery;
9426 i40e_get_oem_version(&pf->hw);
9428 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
9429 ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
9430 hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
9431 /* The following delay is necessary for 4.33 firmware and older
9432 * to recover after EMP reset. 200 ms should suffice but we
9433 * put here 300 ms to be sure that FW is ready to operate
9439 /* re-verify the eeprom if we just had an EMP reset */
9440 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
9441 i40e_verify_eeprom(pf);
9443 i40e_clear_pxe_mode(hw);
9444 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
9446 goto end_core_reset;
9448 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9449 hw->func_caps.num_rx_qp, 0, 0);
9451 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
9452 goto end_core_reset;
9454 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9456 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
9457 goto end_core_reset;
9460 /* Enable FW to write a default DCB config on link-up */
9461 i40e_aq_set_dcb_parameters(hw, true, NULL);
9463 #ifdef CONFIG_I40E_DCB
9464 ret = i40e_init_pf_dcb(pf);
9466 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
9467 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9468 /* Continue without DCB enabled */
9470 #endif /* CONFIG_I40E_DCB */
9471 /* do basic switch setup */
9474 ret = i40e_setup_pf_switch(pf, reinit);
9478 /* The driver only wants link up/down and module qualification
9479 * reports from firmware. Note the negative logic.
9481 ret = i40e_aq_set_phy_int_mask(&pf->hw,
9482 ~(I40E_AQ_EVENT_LINK_UPDOWN |
9483 I40E_AQ_EVENT_MEDIA_NA |
9484 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
9486 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
9487 i40e_stat_str(&pf->hw, ret),
9488 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9490 /* make sure our flow control settings are restored */
9491 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
9493 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
9494 i40e_stat_str(&pf->hw, ret),
9495 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9497 /* Rebuild the VSIs and VEBs that existed before reset.
9498 * They are still in our local switch element arrays, so only
9499 * need to rebuild the switch model in the HW.
9501 * If there were VEBs but the reconstitution failed, we'll try
9502 * try to recover minimal use by getting the basic PF VSI working.
9504 if (vsi->uplink_seid != pf->mac_seid) {
9505 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
9506 /* find the one VEB connected to the MAC, and find orphans */
9507 for (v = 0; v < I40E_MAX_VEB; v++) {
9511 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
9512 pf->veb[v]->uplink_seid == 0) {
9513 ret = i40e_reconstitute_veb(pf->veb[v]);
9518 /* If Main VEB failed, we're in deep doodoo,
9519 * so give up rebuilding the switch and set up
9520 * for minimal rebuild of PF VSI.
9521 * If orphan failed, we'll report the error
9522 * but try to keep going.
9524 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
9525 dev_info(&pf->pdev->dev,
9526 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
9528 vsi->uplink_seid = pf->mac_seid;
9530 } else if (pf->veb[v]->uplink_seid == 0) {
9531 dev_info(&pf->pdev->dev,
9532 "rebuild of orphan VEB failed: %d\n",
9539 if (vsi->uplink_seid == pf->mac_seid) {
9540 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
9541 /* no VEB, so rebuild only the Main VSI */
9542 ret = i40e_add_vsi(vsi);
9544 dev_info(&pf->pdev->dev,
9545 "rebuild of Main VSI failed: %d\n", ret);
9550 if (vsi->mqprio_qopt.max_rate[0]) {
9551 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
9554 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
9555 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
9559 credits = max_tx_rate;
9560 do_div(credits, I40E_BW_CREDIT_DIVISOR);
9561 dev_dbg(&vsi->back->pdev->dev,
9562 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9568 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
9572 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
9573 * for this main VSI if they exist
9575 ret = i40e_rebuild_channels(vsi);
9579 /* Reconfigure hardware for allowing smaller MSS in the case
9580 * of TSO, so that we avoid the MDD being fired and causing
9581 * a reset in the case of small MSS+TSO.
9583 #define I40E_REG_MSS 0x000E64DC
9584 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
9585 #define I40E_64BYTE_MSS 0x400000
9586 val = rd32(hw, I40E_REG_MSS);
9587 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
9588 val &= ~I40E_REG_MSS_MIN_MASK;
9589 val |= I40E_64BYTE_MSS;
9590 wr32(hw, I40E_REG_MSS, val);
9593 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
9595 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9597 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
9598 i40e_stat_str(&pf->hw, ret),
9599 i40e_aq_str(&pf->hw,
9600 pf->hw.aq.asq_last_status));
9602 /* reinit the misc interrupt */
9603 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
9604 ret = i40e_setup_misc_vector(pf);
9606 /* Add a filter to drop all Flow control frames from any VSI from being
9607 * transmitted. By doing so we stop a malicious VF from sending out
9608 * PAUSE or PFC frames and potentially controlling traffic for other
9610 * The FW can still send Flow control frames if enabled.
9612 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
9615 /* restart the VSIs that were rebuilt and running before the reset */
9616 i40e_pf_unquiesce_all_vsi(pf);
9618 /* Release the RTNL lock before we start resetting VFs */
9622 /* Restore promiscuous settings */
9623 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
9625 dev_warn(&pf->pdev->dev,
9626 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
9627 pf->cur_promisc ? "on" : "off",
9628 i40e_stat_str(&pf->hw, ret),
9629 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9631 i40e_reset_all_vfs(pf, true);
9633 /* tell the firmware that we're starting */
9634 i40e_send_version(pf);
9636 /* We've already released the lock, so don't do it again */
9637 goto end_core_reset;
9643 clear_bit(__I40E_RESET_FAILED, pf->state);
9645 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
9646 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
9650 * i40e_reset_and_rebuild - reset and rebuild using a saved config
9651 * @pf: board private structure
9652 * @reinit: if the Main VSI needs to re-initialized.
9653 * @lock_acquired: indicates whether or not the lock has been acquired
9654 * before this function was called.
9656 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
9660 /* Now we wait for GRST to settle out.
9661 * We don't have to delete the VEBs or VSIs from the hw switch
9662 * because the reset will make them disappear.
9664 ret = i40e_reset(pf);
9666 i40e_rebuild(pf, reinit, lock_acquired);
9670 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
9671 * @pf: board private structure
9673 * Close up the VFs and other things in prep for a Core Reset,
9674 * then get ready to rebuild the world.
9675 * @lock_acquired: indicates whether or not the lock has been acquired
9676 * before this function was called.
9678 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
9680 i40e_prep_for_reset(pf, lock_acquired);
9681 i40e_reset_and_rebuild(pf, false, lock_acquired);
9685 * i40e_handle_mdd_event
9686 * @pf: pointer to the PF structure
9688 * Called from the MDD irq handler to identify possibly malicious vfs
9690 static void i40e_handle_mdd_event(struct i40e_pf *pf)
9692 struct i40e_hw *hw = &pf->hw;
9693 bool mdd_detected = false;
9694 bool pf_mdd_detected = false;
9699 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
9702 /* find what triggered the MDD event */
9703 reg = rd32(hw, I40E_GL_MDET_TX);
9704 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
9705 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
9706 I40E_GL_MDET_TX_PF_NUM_SHIFT;
9707 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
9708 I40E_GL_MDET_TX_VF_NUM_SHIFT;
9709 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
9710 I40E_GL_MDET_TX_EVENT_SHIFT;
9711 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
9712 I40E_GL_MDET_TX_QUEUE_SHIFT) -
9713 pf->hw.func_caps.base_queue;
9714 if (netif_msg_tx_err(pf))
9715 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
9716 event, queue, pf_num, vf_num);
9717 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
9718 mdd_detected = true;
9720 reg = rd32(hw, I40E_GL_MDET_RX);
9721 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
9722 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
9723 I40E_GL_MDET_RX_FUNCTION_SHIFT;
9724 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
9725 I40E_GL_MDET_RX_EVENT_SHIFT;
9726 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
9727 I40E_GL_MDET_RX_QUEUE_SHIFT) -
9728 pf->hw.func_caps.base_queue;
9729 if (netif_msg_rx_err(pf))
9730 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
9731 event, queue, func);
9732 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
9733 mdd_detected = true;
9737 reg = rd32(hw, I40E_PF_MDET_TX);
9738 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
9739 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
9740 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
9741 pf_mdd_detected = true;
9743 reg = rd32(hw, I40E_PF_MDET_RX);
9744 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
9745 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
9746 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
9747 pf_mdd_detected = true;
9749 /* Queue belongs to the PF, initiate a reset */
9750 if (pf_mdd_detected) {
9751 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9752 i40e_service_event_schedule(pf);
9756 /* see if one of the VFs needs its hand slapped */
9757 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
9759 reg = rd32(hw, I40E_VP_MDET_TX(i));
9760 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
9761 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
9762 vf->num_mdd_events++;
9763 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
9767 reg = rd32(hw, I40E_VP_MDET_RX(i));
9768 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
9769 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
9770 vf->num_mdd_events++;
9771 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
9775 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
9776 dev_info(&pf->pdev->dev,
9777 "Too many MDD events on VF %d, disabled\n", i);
9778 dev_info(&pf->pdev->dev,
9779 "Use PF Control I/F to re-enable the VF\n");
9780 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
9784 /* re-enable mdd interrupt cause */
9785 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
9786 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
9787 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
9788 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
9792 static const char *i40e_tunnel_name(u8 type)
9795 case UDP_TUNNEL_TYPE_VXLAN:
9797 case UDP_TUNNEL_TYPE_GENEVE:
9805 * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters
9806 * @pf: board private structure
9808 static void i40e_sync_udp_filters(struct i40e_pf *pf)
9812 /* loop through and set pending bit for all active UDP filters */
9813 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
9814 if (pf->udp_ports[i].port)
9815 pf->pending_udp_bitmap |= BIT_ULL(i);
9818 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
9822 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
9823 * @pf: board private structure
9825 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
9827 struct i40e_hw *hw = &pf->hw;
9828 u8 filter_index, type;
9832 if (!test_and_clear_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state))
9835 /* acquire RTNL to maintain state of flags and port requests */
9838 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
9839 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
9840 struct i40e_udp_port_config *udp_port;
9841 i40e_status ret = 0;
9843 udp_port = &pf->udp_ports[i];
9844 pf->pending_udp_bitmap &= ~BIT_ULL(i);
9846 port = READ_ONCE(udp_port->port);
9847 type = READ_ONCE(udp_port->type);
9848 filter_index = READ_ONCE(udp_port->filter_index);
9850 /* release RTNL while we wait on AQ command */
9854 ret = i40e_aq_add_udp_tunnel(hw, port,
9858 else if (filter_index != I40E_UDP_PORT_INDEX_UNUSED)
9859 ret = i40e_aq_del_udp_tunnel(hw, filter_index,
9862 /* reacquire RTNL so we can update filter_index */
9866 dev_info(&pf->pdev->dev,
9867 "%s %s port %d, index %d failed, err %s aq_err %s\n",
9868 i40e_tunnel_name(type),
9869 port ? "add" : "delete",
9872 i40e_stat_str(&pf->hw, ret),
9873 i40e_aq_str(&pf->hw,
9874 pf->hw.aq.asq_last_status));
9876 /* failed to add, just reset port,
9877 * drop pending bit for any deletion
9880 pf->pending_udp_bitmap &= ~BIT_ULL(i);
9883 /* record filter index on success */
9884 udp_port->filter_index = filter_index;
9893 * i40e_service_task - Run the driver's async subtasks
9894 * @work: pointer to work_struct containing our data
9896 static void i40e_service_task(struct work_struct *work)
9898 struct i40e_pf *pf = container_of(work,
9901 unsigned long start_time = jiffies;
9903 /* don't bother with service tasks if a reset is in progress */
9904 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
9907 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
9910 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
9911 i40e_sync_filters_subtask(pf);
9912 i40e_reset_subtask(pf);
9913 i40e_handle_mdd_event(pf);
9914 i40e_vc_process_vflr_event(pf);
9915 i40e_watchdog_subtask(pf);
9916 i40e_fdir_reinit_subtask(pf);
9917 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
9918 /* Client subtask will reopen next time through. */
9919 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true);
9921 i40e_client_subtask(pf);
9922 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
9924 i40e_notify_client_of_l2_param_changes(
9925 pf->vsi[pf->lan_vsi]);
9927 i40e_sync_filters_subtask(pf);
9928 i40e_sync_udp_filters_subtask(pf);
9929 i40e_clean_adminq_subtask(pf);
9931 /* flush memory to make sure state is correct before next watchdog */
9932 smp_mb__before_atomic();
9933 clear_bit(__I40E_SERVICE_SCHED, pf->state);
9935 /* If the tasks have taken longer than one timer cycle or there
9936 * is more work to be done, reschedule the service task now
9937 * rather than wait for the timer to tick again.
9939 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
9940 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
9941 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
9942 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
9943 i40e_service_event_schedule(pf);
9947 * i40e_service_timer - timer callback
9948 * @data: pointer to PF struct
9950 static void i40e_service_timer(struct timer_list *t)
9952 struct i40e_pf *pf = from_timer(pf, t, service_timer);
9954 mod_timer(&pf->service_timer,
9955 round_jiffies(jiffies + pf->service_timer_period));
9956 i40e_service_event_schedule(pf);
9960 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
9961 * @vsi: the VSI being configured
9963 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
9965 struct i40e_pf *pf = vsi->back;
9967 switch (vsi->type) {
9969 vsi->alloc_queue_pairs = pf->num_lan_qps;
9970 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
9971 I40E_REQ_DESCRIPTOR_MULTIPLE);
9972 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
9973 vsi->num_q_vectors = pf->num_lan_msix;
9975 vsi->num_q_vectors = 1;
9980 vsi->alloc_queue_pairs = 1;
9981 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
9982 I40E_REQ_DESCRIPTOR_MULTIPLE);
9983 vsi->num_q_vectors = pf->num_fdsb_msix;
9986 case I40E_VSI_VMDQ2:
9987 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
9988 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
9989 I40E_REQ_DESCRIPTOR_MULTIPLE);
9990 vsi->num_q_vectors = pf->num_vmdq_msix;
9993 case I40E_VSI_SRIOV:
9994 vsi->alloc_queue_pairs = pf->num_vf_qps;
9995 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
9996 I40E_REQ_DESCRIPTOR_MULTIPLE);
10008 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
10009 * @vsi: VSI pointer
10010 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
10012 * On error: returns error code (negative)
10013 * On success: returns 0
10015 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
10017 struct i40e_ring **next_rings;
10021 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
10022 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
10023 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
10024 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
10025 if (!vsi->tx_rings)
10027 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
10028 if (i40e_enabled_xdp_vsi(vsi)) {
10029 vsi->xdp_rings = next_rings;
10030 next_rings += vsi->alloc_queue_pairs;
10032 vsi->rx_rings = next_rings;
10034 if (alloc_qvectors) {
10035 /* allocate memory for q_vector pointers */
10036 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
10037 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
10038 if (!vsi->q_vectors) {
10046 kfree(vsi->tx_rings);
10051 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
10052 * @pf: board private structure
10053 * @type: type of VSI
10055 * On error: returns error code (negative)
10056 * On success: returns vsi index in PF (positive)
10058 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
10061 struct i40e_vsi *vsi;
10065 /* Need to protect the allocation of the VSIs at the PF level */
10066 mutex_lock(&pf->switch_mutex);
10068 /* VSI list may be fragmented if VSI creation/destruction has
10069 * been happening. We can afford to do a quick scan to look
10070 * for any free VSIs in the list.
10072 * find next empty vsi slot, looping back around if necessary
10075 while (i < pf->num_alloc_vsi && pf->vsi[i])
10077 if (i >= pf->num_alloc_vsi) {
10079 while (i < pf->next_vsi && pf->vsi[i])
10083 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
10084 vsi_idx = i; /* Found one! */
10087 goto unlock_pf; /* out of VSI slots! */
10089 pf->next_vsi = ++i;
10091 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
10098 set_bit(__I40E_VSI_DOWN, vsi->state);
10100 vsi->idx = vsi_idx;
10101 vsi->int_rate_limit = 0;
10102 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
10103 pf->rss_table_size : 64;
10104 vsi->netdev_registered = false;
10105 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
10106 hash_init(vsi->mac_filter_hash);
10107 vsi->irqs_ready = false;
10109 ret = i40e_set_num_rings_in_vsi(vsi);
10113 ret = i40e_vsi_alloc_arrays(vsi, true);
10117 /* Setup default MSIX irq handler for VSI */
10118 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
10120 /* Initialize VSI lock */
10121 spin_lock_init(&vsi->mac_filter_hash_lock);
10122 pf->vsi[vsi_idx] = vsi;
10127 pf->next_vsi = i - 1;
10130 mutex_unlock(&pf->switch_mutex);
10135 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
10136 * @vsi: VSI pointer
10137 * @free_qvectors: a bool to specify if q_vectors need to be freed.
10139 * On error: returns error code (negative)
10140 * On success: returns 0
10142 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
10144 /* free the ring and vector containers */
10145 if (free_qvectors) {
10146 kfree(vsi->q_vectors);
10147 vsi->q_vectors = NULL;
10149 kfree(vsi->tx_rings);
10150 vsi->tx_rings = NULL;
10151 vsi->rx_rings = NULL;
10152 vsi->xdp_rings = NULL;
10156 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
10158 * @vsi: Pointer to VSI structure
10160 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
10165 kfree(vsi->rss_hkey_user);
10166 vsi->rss_hkey_user = NULL;
10168 kfree(vsi->rss_lut_user);
10169 vsi->rss_lut_user = NULL;
10173 * i40e_vsi_clear - Deallocate the VSI provided
10174 * @vsi: the VSI being un-configured
10176 static int i40e_vsi_clear(struct i40e_vsi *vsi)
10178 struct i40e_pf *pf;
10187 mutex_lock(&pf->switch_mutex);
10188 if (!pf->vsi[vsi->idx]) {
10189 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
10190 vsi->idx, vsi->idx, vsi->type);
10194 if (pf->vsi[vsi->idx] != vsi) {
10195 dev_err(&pf->pdev->dev,
10196 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
10197 pf->vsi[vsi->idx]->idx,
10198 pf->vsi[vsi->idx]->type,
10199 vsi->idx, vsi->type);
10203 /* updates the PF for this cleared vsi */
10204 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
10205 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
10207 i40e_vsi_free_arrays(vsi, true);
10208 i40e_clear_rss_config_user(vsi);
10210 pf->vsi[vsi->idx] = NULL;
10211 if (vsi->idx < pf->next_vsi)
10212 pf->next_vsi = vsi->idx;
10215 mutex_unlock(&pf->switch_mutex);
10223 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
10224 * @vsi: the VSI being cleaned
10226 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
10230 if (vsi->tx_rings && vsi->tx_rings[0]) {
10231 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10232 kfree_rcu(vsi->tx_rings[i], rcu);
10233 vsi->tx_rings[i] = NULL;
10234 vsi->rx_rings[i] = NULL;
10235 if (vsi->xdp_rings)
10236 vsi->xdp_rings[i] = NULL;
10242 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
10243 * @vsi: the VSI being configured
10245 static int i40e_alloc_rings(struct i40e_vsi *vsi)
10247 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
10248 struct i40e_pf *pf = vsi->back;
10249 struct i40e_ring *ring;
10251 /* Set basic values in the rings to be used later during open() */
10252 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10253 /* allocate space for both Tx and Rx in one shot */
10254 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
10258 ring->queue_index = i;
10259 ring->reg_idx = vsi->base_queue + i;
10260 ring->ring_active = false;
10262 ring->netdev = vsi->netdev;
10263 ring->dev = &pf->pdev->dev;
10264 ring->count = vsi->num_desc;
10267 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10268 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10269 ring->itr_setting = pf->tx_itr_default;
10270 vsi->tx_rings[i] = ring++;
10272 if (!i40e_enabled_xdp_vsi(vsi))
10275 ring->queue_index = vsi->alloc_queue_pairs + i;
10276 ring->reg_idx = vsi->base_queue + ring->queue_index;
10277 ring->ring_active = false;
10279 ring->netdev = NULL;
10280 ring->dev = &pf->pdev->dev;
10281 ring->count = vsi->num_desc;
10284 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10285 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10286 set_ring_xdp(ring);
10287 ring->itr_setting = pf->tx_itr_default;
10288 vsi->xdp_rings[i] = ring++;
10291 ring->queue_index = i;
10292 ring->reg_idx = vsi->base_queue + i;
10293 ring->ring_active = false;
10295 ring->netdev = vsi->netdev;
10296 ring->dev = &pf->pdev->dev;
10297 ring->count = vsi->num_desc;
10300 ring->itr_setting = pf->rx_itr_default;
10301 vsi->rx_rings[i] = ring;
10307 i40e_vsi_clear_rings(vsi);
10312 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
10313 * @pf: board private structure
10314 * @vectors: the number of MSI-X vectors to request
10316 * Returns the number of vectors reserved, or error
10318 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
10320 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
10321 I40E_MIN_MSIX, vectors);
10323 dev_info(&pf->pdev->dev,
10324 "MSI-X vector reservation failed: %d\n", vectors);
10332 * i40e_init_msix - Setup the MSIX capability
10333 * @pf: board private structure
10335 * Work with the OS to set up the MSIX vectors needed.
10337 * Returns the number of vectors reserved or negative on failure
10339 static int i40e_init_msix(struct i40e_pf *pf)
10341 struct i40e_hw *hw = &pf->hw;
10342 int cpus, extra_vectors;
10346 int iwarp_requested = 0;
10348 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
10351 /* The number of vectors we'll request will be comprised of:
10352 * - Add 1 for "other" cause for Admin Queue events, etc.
10353 * - The number of LAN queue pairs
10354 * - Queues being used for RSS.
10355 * We don't need as many as max_rss_size vectors.
10356 * use rss_size instead in the calculation since that
10357 * is governed by number of cpus in the system.
10358 * - assumes symmetric Tx/Rx pairing
10359 * - The number of VMDq pairs
10360 * - The CPU count within the NUMA node if iWARP is enabled
10361 * Once we count this up, try the request.
10363 * If we can't get what we want, we'll simplify to nearly nothing
10364 * and try again. If that still fails, we punt.
10366 vectors_left = hw->func_caps.num_msix_vectors;
10369 /* reserve one vector for miscellaneous handler */
10370 if (vectors_left) {
10375 /* reserve some vectors for the main PF traffic queues. Initially we
10376 * only reserve at most 50% of the available vectors, in the case that
10377 * the number of online CPUs is large. This ensures that we can enable
10378 * extra features as well. Once we've enabled the other features, we
10379 * will use any remaining vectors to reach as close as we can to the
10380 * number of online CPUs.
10382 cpus = num_online_cpus();
10383 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
10384 vectors_left -= pf->num_lan_msix;
10386 /* reserve one vector for sideband flow director */
10387 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10388 if (vectors_left) {
10389 pf->num_fdsb_msix = 1;
10393 pf->num_fdsb_msix = 0;
10397 /* can we reserve enough for iWARP? */
10398 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
10399 iwarp_requested = pf->num_iwarp_msix;
10402 pf->num_iwarp_msix = 0;
10403 else if (vectors_left < pf->num_iwarp_msix)
10404 pf->num_iwarp_msix = 1;
10405 v_budget += pf->num_iwarp_msix;
10406 vectors_left -= pf->num_iwarp_msix;
10409 /* any vectors left over go for VMDq support */
10410 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
10411 if (!vectors_left) {
10412 pf->num_vmdq_msix = 0;
10413 pf->num_vmdq_qps = 0;
10415 int vmdq_vecs_wanted =
10416 pf->num_vmdq_vsis * pf->num_vmdq_qps;
10418 min_t(int, vectors_left, vmdq_vecs_wanted);
10420 /* if we're short on vectors for what's desired, we limit
10421 * the queues per vmdq. If this is still more than are
10422 * available, the user will need to change the number of
10423 * queues/vectors used by the PF later with the ethtool
10426 if (vectors_left < vmdq_vecs_wanted) {
10427 pf->num_vmdq_qps = 1;
10428 vmdq_vecs_wanted = pf->num_vmdq_vsis;
10429 vmdq_vecs = min_t(int,
10433 pf->num_vmdq_msix = pf->num_vmdq_qps;
10435 v_budget += vmdq_vecs;
10436 vectors_left -= vmdq_vecs;
10440 /* On systems with a large number of SMP cores, we previously limited
10441 * the number of vectors for num_lan_msix to be at most 50% of the
10442 * available vectors, to allow for other features. Now, we add back
10443 * the remaining vectors. However, we ensure that the total
10444 * num_lan_msix will not exceed num_online_cpus(). To do this, we
10445 * calculate the number of vectors we can add without going over the
10446 * cap of CPUs. For systems with a small number of CPUs this will be
10449 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
10450 pf->num_lan_msix += extra_vectors;
10451 vectors_left -= extra_vectors;
10453 WARN(vectors_left < 0,
10454 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
10456 v_budget += pf->num_lan_msix;
10457 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
10459 if (!pf->msix_entries)
10462 for (i = 0; i < v_budget; i++)
10463 pf->msix_entries[i].entry = i;
10464 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
10466 if (v_actual < I40E_MIN_MSIX) {
10467 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
10468 kfree(pf->msix_entries);
10469 pf->msix_entries = NULL;
10470 pci_disable_msix(pf->pdev);
10473 } else if (v_actual == I40E_MIN_MSIX) {
10474 /* Adjust for minimal MSIX use */
10475 pf->num_vmdq_vsis = 0;
10476 pf->num_vmdq_qps = 0;
10477 pf->num_lan_qps = 1;
10478 pf->num_lan_msix = 1;
10480 } else if (v_actual != v_budget) {
10481 /* If we have limited resources, we will start with no vectors
10482 * for the special features and then allocate vectors to some
10483 * of these features based on the policy and at the end disable
10484 * the features that did not get any vectors.
10488 dev_info(&pf->pdev->dev,
10489 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
10490 v_actual, v_budget);
10491 /* reserve the misc vector */
10492 vec = v_actual - 1;
10494 /* Scale vector usage down */
10495 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
10496 pf->num_vmdq_vsis = 1;
10497 pf->num_vmdq_qps = 1;
10499 /* partition out the remaining vectors */
10502 pf->num_lan_msix = 1;
10505 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
10506 pf->num_lan_msix = 1;
10507 pf->num_iwarp_msix = 1;
10509 pf->num_lan_msix = 2;
10513 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
10514 pf->num_iwarp_msix = min_t(int, (vec / 3),
10516 pf->num_vmdq_vsis = min_t(int, (vec / 3),
10517 I40E_DEFAULT_NUM_VMDQ_VSI);
10519 pf->num_vmdq_vsis = min_t(int, (vec / 2),
10520 I40E_DEFAULT_NUM_VMDQ_VSI);
10522 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10523 pf->num_fdsb_msix = 1;
10526 pf->num_lan_msix = min_t(int,
10527 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
10529 pf->num_lan_qps = pf->num_lan_msix;
10534 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
10535 (pf->num_fdsb_msix == 0)) {
10536 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
10537 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10538 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10540 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10541 (pf->num_vmdq_msix == 0)) {
10542 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
10543 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
10546 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
10547 (pf->num_iwarp_msix == 0)) {
10548 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
10549 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
10551 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
10552 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
10554 pf->num_vmdq_msix * pf->num_vmdq_vsis,
10556 pf->num_iwarp_msix);
10562 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
10563 * @vsi: the VSI being configured
10564 * @v_idx: index of the vector in the vsi struct
10565 * @cpu: cpu to be used on affinity_mask
10567 * We allocate one q_vector. If allocation fails we return -ENOMEM.
10569 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
10571 struct i40e_q_vector *q_vector;
10573 /* allocate q_vector */
10574 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
10578 q_vector->vsi = vsi;
10579 q_vector->v_idx = v_idx;
10580 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
10583 netif_napi_add(vsi->netdev, &q_vector->napi,
10584 i40e_napi_poll, NAPI_POLL_WEIGHT);
10586 /* tie q_vector and vsi together */
10587 vsi->q_vectors[v_idx] = q_vector;
10593 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
10594 * @vsi: the VSI being configured
10596 * We allocate one q_vector per queue interrupt. If allocation fails we
10599 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
10601 struct i40e_pf *pf = vsi->back;
10602 int err, v_idx, num_q_vectors, current_cpu;
10604 /* if not MSIX, give the one vector only to the LAN VSI */
10605 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10606 num_q_vectors = vsi->num_q_vectors;
10607 else if (vsi == pf->vsi[pf->lan_vsi])
10612 current_cpu = cpumask_first(cpu_online_mask);
10614 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
10615 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
10618 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
10619 if (unlikely(current_cpu >= nr_cpu_ids))
10620 current_cpu = cpumask_first(cpu_online_mask);
10627 i40e_free_q_vector(vsi, v_idx);
10633 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
10634 * @pf: board private structure to initialize
10636 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
10641 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10642 vectors = i40e_init_msix(pf);
10644 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
10645 I40E_FLAG_IWARP_ENABLED |
10646 I40E_FLAG_RSS_ENABLED |
10647 I40E_FLAG_DCB_CAPABLE |
10648 I40E_FLAG_DCB_ENABLED |
10649 I40E_FLAG_SRIOV_ENABLED |
10650 I40E_FLAG_FD_SB_ENABLED |
10651 I40E_FLAG_FD_ATR_ENABLED |
10652 I40E_FLAG_VMDQ_ENABLED);
10653 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10655 /* rework the queue expectations without MSIX */
10656 i40e_determine_queue_usage(pf);
10660 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10661 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
10662 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
10663 vectors = pci_enable_msi(pf->pdev);
10665 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
10667 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
10669 vectors = 1; /* one MSI or Legacy vector */
10672 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
10673 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
10675 /* set up vector assignment tracking */
10676 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
10677 pf->irq_pile = kzalloc(size, GFP_KERNEL);
10681 pf->irq_pile->num_entries = vectors;
10682 pf->irq_pile->search_hint = 0;
10684 /* track first vector for misc interrupts, ignore return */
10685 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
10691 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
10692 * @pf: private board data structure
10694 * Restore the interrupt scheme that was cleared when we suspended the
10695 * device. This should be called during resume to re-allocate the q_vectors
10696 * and reacquire IRQs.
10698 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
10702 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
10703 * scheme. We need to re-enabled them here in order to attempt to
10704 * re-acquire the MSI or MSI-X vectors
10706 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
10708 err = i40e_init_interrupt_scheme(pf);
10712 /* Now that we've re-acquired IRQs, we need to remap the vectors and
10713 * rings together again.
10715 for (i = 0; i < pf->num_alloc_vsi; i++) {
10717 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
10720 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
10724 err = i40e_setup_misc_vector(pf);
10728 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
10729 i40e_client_update_msix_info(pf);
10736 i40e_vsi_free_q_vectors(pf->vsi[i]);
10743 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
10744 * @pf: board private structure
10746 * This sets up the handler for MSIX 0, which is used to manage the
10747 * non-queue interrupts, e.g. AdminQ and errors. This is not used
10748 * when in MSI or Legacy interrupt mode.
10750 static int i40e_setup_misc_vector(struct i40e_pf *pf)
10752 struct i40e_hw *hw = &pf->hw;
10755 /* Only request the IRQ once, the first time through. */
10756 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
10757 err = request_irq(pf->msix_entries[0].vector,
10758 i40e_intr, 0, pf->int_name, pf);
10760 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
10761 dev_info(&pf->pdev->dev,
10762 "request_irq for %s failed: %d\n",
10763 pf->int_name, err);
10768 i40e_enable_misc_int_causes(pf);
10770 /* associate no queues to the misc vector */
10771 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
10772 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
10776 i40e_irq_dynamic_enable_icr0(pf);
10782 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
10783 * @vsi: Pointer to vsi structure
10784 * @seed: Buffter to store the hash keys
10785 * @lut: Buffer to store the lookup table entries
10786 * @lut_size: Size of buffer to store the lookup table entries
10788 * Return 0 on success, negative on failure
10790 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
10791 u8 *lut, u16 lut_size)
10793 struct i40e_pf *pf = vsi->back;
10794 struct i40e_hw *hw = &pf->hw;
10798 ret = i40e_aq_get_rss_key(hw, vsi->id,
10799 (struct i40e_aqc_get_set_rss_key_data *)seed);
10801 dev_info(&pf->pdev->dev,
10802 "Cannot get RSS key, err %s aq_err %s\n",
10803 i40e_stat_str(&pf->hw, ret),
10804 i40e_aq_str(&pf->hw,
10805 pf->hw.aq.asq_last_status));
10811 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
10813 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
10815 dev_info(&pf->pdev->dev,
10816 "Cannot get RSS lut, err %s aq_err %s\n",
10817 i40e_stat_str(&pf->hw, ret),
10818 i40e_aq_str(&pf->hw,
10819 pf->hw.aq.asq_last_status));
10828 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
10829 * @vsi: Pointer to vsi structure
10830 * @seed: RSS hash seed
10831 * @lut: Lookup table
10832 * @lut_size: Lookup table size
10834 * Returns 0 on success, negative on failure
10836 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
10837 const u8 *lut, u16 lut_size)
10839 struct i40e_pf *pf = vsi->back;
10840 struct i40e_hw *hw = &pf->hw;
10841 u16 vf_id = vsi->vf_id;
10844 /* Fill out hash function seed */
10846 u32 *seed_dw = (u32 *)seed;
10848 if (vsi->type == I40E_VSI_MAIN) {
10849 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
10850 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
10851 } else if (vsi->type == I40E_VSI_SRIOV) {
10852 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
10853 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
10855 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
10860 u32 *lut_dw = (u32 *)lut;
10862 if (vsi->type == I40E_VSI_MAIN) {
10863 if (lut_size != I40E_HLUT_ARRAY_SIZE)
10865 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
10866 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
10867 } else if (vsi->type == I40E_VSI_SRIOV) {
10868 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
10870 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
10871 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
10873 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
10882 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
10883 * @vsi: Pointer to VSI structure
10884 * @seed: Buffer to store the keys
10885 * @lut: Buffer to store the lookup table entries
10886 * @lut_size: Size of buffer to store the lookup table entries
10888 * Returns 0 on success, negative on failure
10890 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
10891 u8 *lut, u16 lut_size)
10893 struct i40e_pf *pf = vsi->back;
10894 struct i40e_hw *hw = &pf->hw;
10898 u32 *seed_dw = (u32 *)seed;
10900 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
10901 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
10904 u32 *lut_dw = (u32 *)lut;
10906 if (lut_size != I40E_HLUT_ARRAY_SIZE)
10908 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
10909 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
10916 * i40e_config_rss - Configure RSS keys and lut
10917 * @vsi: Pointer to VSI structure
10918 * @seed: RSS hash seed
10919 * @lut: Lookup table
10920 * @lut_size: Lookup table size
10922 * Returns 0 on success, negative on failure
10924 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
10926 struct i40e_pf *pf = vsi->back;
10928 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
10929 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
10931 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
10935 * i40e_get_rss - Get RSS keys and lut
10936 * @vsi: Pointer to VSI structure
10937 * @seed: Buffer to store the keys
10938 * @lut: Buffer to store the lookup table entries
10939 * @lut_size: Size of buffer to store the lookup table entries
10941 * Returns 0 on success, negative on failure
10943 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
10945 struct i40e_pf *pf = vsi->back;
10947 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
10948 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
10950 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
10954 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
10955 * @pf: Pointer to board private structure
10956 * @lut: Lookup table
10957 * @rss_table_size: Lookup table size
10958 * @rss_size: Range of queue number for hashing
10960 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
10961 u16 rss_table_size, u16 rss_size)
10965 for (i = 0; i < rss_table_size; i++)
10966 lut[i] = i % rss_size;
10970 * i40e_pf_config_rss - Prepare for RSS if used
10971 * @pf: board private structure
10973 static int i40e_pf_config_rss(struct i40e_pf *pf)
10975 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10976 u8 seed[I40E_HKEY_ARRAY_SIZE];
10978 struct i40e_hw *hw = &pf->hw;
10983 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
10984 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
10985 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
10986 hena |= i40e_pf_get_default_rss_hena(pf);
10988 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
10989 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
10991 /* Determine the RSS table size based on the hardware capabilities */
10992 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
10993 reg_val = (pf->rss_table_size == 512) ?
10994 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
10995 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
10996 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
10998 /* Determine the RSS size of the VSI */
10999 if (!vsi->rss_size) {
11001 /* If the firmware does something weird during VSI init, we
11002 * could end up with zero TCs. Check for that to avoid
11003 * divide-by-zero. It probably won't pass traffic, but it also
11006 qcount = vsi->num_queue_pairs /
11007 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
11008 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
11010 if (!vsi->rss_size)
11013 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
11017 /* Use user configured lut if there is one, otherwise use default */
11018 if (vsi->rss_lut_user)
11019 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
11021 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
11023 /* Use user configured hash key if there is one, otherwise
11026 if (vsi->rss_hkey_user)
11027 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
11029 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
11030 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
11037 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
11038 * @pf: board private structure
11039 * @queue_count: the requested queue count for rss.
11041 * returns 0 if rss is not enabled, if enabled returns the final rss queue
11042 * count which may be different from the requested queue count.
11043 * Note: expects to be called while under rtnl_lock()
11045 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
11047 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
11050 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
11053 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
11055 if (queue_count != vsi->num_queue_pairs) {
11058 vsi->req_queue_pairs = queue_count;
11059 i40e_prep_for_reset(pf, true);
11061 pf->alloc_rss_size = new_rss_size;
11063 i40e_reset_and_rebuild(pf, true, true);
11065 /* Discard the user configured hash keys and lut, if less
11066 * queues are enabled.
11068 if (queue_count < vsi->rss_size) {
11069 i40e_clear_rss_config_user(vsi);
11070 dev_dbg(&pf->pdev->dev,
11071 "discard user configured hash keys and lut\n");
11074 /* Reset vsi->rss_size, as number of enabled queues changed */
11075 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
11076 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
11078 i40e_pf_config_rss(pf);
11080 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
11081 vsi->req_queue_pairs, pf->rss_size_max);
11082 return pf->alloc_rss_size;
11086 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
11087 * @pf: board private structure
11089 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
11091 i40e_status status;
11092 bool min_valid, max_valid;
11093 u32 max_bw, min_bw;
11095 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
11096 &min_valid, &max_valid);
11100 pf->min_bw = min_bw;
11102 pf->max_bw = max_bw;
11109 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
11110 * @pf: board private structure
11112 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
11114 struct i40e_aqc_configure_partition_bw_data bw_data;
11115 i40e_status status;
11117 /* Set the valid bit for this PF */
11118 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
11119 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
11120 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
11122 /* Set the new bandwidths */
11123 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
11129 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
11130 * @pf: board private structure
11132 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
11134 /* Commit temporary BW setting to permanent NVM image */
11135 enum i40e_admin_queue_err last_aq_status;
11139 if (pf->hw.partition_id != 1) {
11140 dev_info(&pf->pdev->dev,
11141 "Commit BW only works on partition 1! This is partition %d",
11142 pf->hw.partition_id);
11143 ret = I40E_NOT_SUPPORTED;
11144 goto bw_commit_out;
11147 /* Acquire NVM for read access */
11148 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
11149 last_aq_status = pf->hw.aq.asq_last_status;
11151 dev_info(&pf->pdev->dev,
11152 "Cannot acquire NVM for read access, err %s aq_err %s\n",
11153 i40e_stat_str(&pf->hw, ret),
11154 i40e_aq_str(&pf->hw, last_aq_status));
11155 goto bw_commit_out;
11158 /* Read word 0x10 of NVM - SW compatibility word 1 */
11159 ret = i40e_aq_read_nvm(&pf->hw,
11160 I40E_SR_NVM_CONTROL_WORD,
11161 0x10, sizeof(nvm_word), &nvm_word,
11163 /* Save off last admin queue command status before releasing
11166 last_aq_status = pf->hw.aq.asq_last_status;
11167 i40e_release_nvm(&pf->hw);
11169 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
11170 i40e_stat_str(&pf->hw, ret),
11171 i40e_aq_str(&pf->hw, last_aq_status));
11172 goto bw_commit_out;
11175 /* Wait a bit for NVM release to complete */
11178 /* Acquire NVM for write access */
11179 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
11180 last_aq_status = pf->hw.aq.asq_last_status;
11182 dev_info(&pf->pdev->dev,
11183 "Cannot acquire NVM for write access, err %s aq_err %s\n",
11184 i40e_stat_str(&pf->hw, ret),
11185 i40e_aq_str(&pf->hw, last_aq_status));
11186 goto bw_commit_out;
11188 /* Write it back out unchanged to initiate update NVM,
11189 * which will force a write of the shadow (alt) RAM to
11190 * the NVM - thus storing the bandwidth values permanently.
11192 ret = i40e_aq_update_nvm(&pf->hw,
11193 I40E_SR_NVM_CONTROL_WORD,
11194 0x10, sizeof(nvm_word),
11195 &nvm_word, true, 0, NULL);
11196 /* Save off last admin queue command status before releasing
11199 last_aq_status = pf->hw.aq.asq_last_status;
11200 i40e_release_nvm(&pf->hw);
11202 dev_info(&pf->pdev->dev,
11203 "BW settings NOT SAVED, err %s aq_err %s\n",
11204 i40e_stat_str(&pf->hw, ret),
11205 i40e_aq_str(&pf->hw, last_aq_status));
11212 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
11213 * @pf: board private structure to initialize
11215 * i40e_sw_init initializes the Adapter private data structure.
11216 * Fields are initialized based on PCI device information and
11217 * OS network device settings (MTU size).
11219 static int i40e_sw_init(struct i40e_pf *pf)
11224 /* Set default capability flags */
11225 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
11226 I40E_FLAG_MSI_ENABLED |
11227 I40E_FLAG_MSIX_ENABLED;
11229 /* Set default ITR */
11230 pf->rx_itr_default = I40E_ITR_RX_DEF;
11231 pf->tx_itr_default = I40E_ITR_TX_DEF;
11233 /* Depending on PF configurations, it is possible that the RSS
11234 * maximum might end up larger than the available queues
11236 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
11237 pf->alloc_rss_size = 1;
11238 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
11239 pf->rss_size_max = min_t(int, pf->rss_size_max,
11240 pf->hw.func_caps.num_tx_qp);
11241 if (pf->hw.func_caps.rss) {
11242 pf->flags |= I40E_FLAG_RSS_ENABLED;
11243 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
11244 num_online_cpus());
11247 /* MFP mode enabled */
11248 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
11249 pf->flags |= I40E_FLAG_MFP_ENABLED;
11250 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
11251 if (i40e_get_partition_bw_setting(pf)) {
11252 dev_warn(&pf->pdev->dev,
11253 "Could not get partition bw settings\n");
11255 dev_info(&pf->pdev->dev,
11256 "Partition BW Min = %8.8x, Max = %8.8x\n",
11257 pf->min_bw, pf->max_bw);
11259 /* nudge the Tx scheduler */
11260 i40e_set_partition_bw_setting(pf);
11264 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
11265 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
11266 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
11267 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
11268 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
11269 pf->hw.num_partitions > 1)
11270 dev_info(&pf->pdev->dev,
11271 "Flow Director Sideband mode Disabled in MFP mode\n");
11273 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
11274 pf->fdir_pf_filter_count =
11275 pf->hw.func_caps.fd_filters_guaranteed;
11276 pf->hw.fdir_shared_filter_count =
11277 pf->hw.func_caps.fd_filters_best_effort;
11280 if (pf->hw.mac.type == I40E_MAC_X722) {
11281 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
11282 I40E_HW_128_QP_RSS_CAPABLE |
11283 I40E_HW_ATR_EVICT_CAPABLE |
11284 I40E_HW_WB_ON_ITR_CAPABLE |
11285 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
11286 I40E_HW_NO_PCI_LINK_CHECK |
11287 I40E_HW_USE_SET_LLDP_MIB |
11288 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
11289 I40E_HW_PTP_L4_CAPABLE |
11290 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
11291 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
11293 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
11294 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
11295 I40E_FDEVICT_PCTYPE_DEFAULT) {
11296 dev_warn(&pf->pdev->dev,
11297 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
11298 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
11300 } else if ((pf->hw.aq.api_maj_ver > 1) ||
11301 ((pf->hw.aq.api_maj_ver == 1) &&
11302 (pf->hw.aq.api_min_ver > 4))) {
11303 /* Supported in FW API version higher than 1.4 */
11304 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
11307 /* Enable HW ATR eviction if possible */
11308 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
11309 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
11311 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11312 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
11313 (pf->hw.aq.fw_maj_ver < 4))) {
11314 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
11315 /* No DCB support for FW < v4.33 */
11316 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
11319 /* Disable FW LLDP if FW < v4.3 */
11320 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11321 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
11322 (pf->hw.aq.fw_maj_ver < 4)))
11323 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
11325 /* Use the FW Set LLDP MIB API if FW > v4.40 */
11326 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11327 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
11328 (pf->hw.aq.fw_maj_ver >= 5)))
11329 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
11331 /* Enable PTP L4 if FW > v6.0 */
11332 if (pf->hw.mac.type == I40E_MAC_XL710 &&
11333 pf->hw.aq.fw_maj_ver >= 6)
11334 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
11336 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
11337 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
11338 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
11339 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
11342 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
11343 pf->flags |= I40E_FLAG_IWARP_ENABLED;
11344 /* IWARP needs one extra vector for CQP just like MISC.*/
11345 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
11347 /* Stopping FW LLDP engine is supported on XL710 and X722
11348 * starting from FW versions determined in i40e_init_adminq.
11349 * Stopping the FW LLDP engine is not supported on XL710
11350 * if NPAR is functioning so unset this hw flag in this case.
11352 if (pf->hw.mac.type == I40E_MAC_XL710 &&
11353 pf->hw.func_caps.npar_enable &&
11354 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
11355 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
11357 #ifdef CONFIG_PCI_IOV
11358 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
11359 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
11360 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
11361 pf->num_req_vfs = min_t(int,
11362 pf->hw.func_caps.num_vfs,
11363 I40E_MAX_VF_COUNT);
11365 #endif /* CONFIG_PCI_IOV */
11366 pf->eeprom_version = 0xDEAD;
11367 pf->lan_veb = I40E_NO_VEB;
11368 pf->lan_vsi = I40E_NO_VSI;
11370 /* By default FW has this off for performance reasons */
11371 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
11373 /* set up queue assignment tracking */
11374 size = sizeof(struct i40e_lump_tracking)
11375 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
11376 pf->qp_pile = kzalloc(size, GFP_KERNEL);
11377 if (!pf->qp_pile) {
11381 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
11382 pf->qp_pile->search_hint = 0;
11384 pf->tx_timeout_recovery_level = 1;
11386 mutex_init(&pf->switch_mutex);
11393 * i40e_set_ntuple - set the ntuple feature flag and take action
11394 * @pf: board private structure to initialize
11395 * @features: the feature set that the stack is suggesting
11397 * returns a bool to indicate if reset needs to happen
11399 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
11401 bool need_reset = false;
11403 /* Check if Flow Director n-tuple support was enabled or disabled. If
11404 * the state changed, we need to reset.
11406 if (features & NETIF_F_NTUPLE) {
11407 /* Enable filters and mark for reset */
11408 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
11410 /* enable FD_SB only if there is MSI-X vector and no cloud
11413 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
11414 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
11415 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
11418 /* turn off filters, mark for reset and clear SW filter list */
11419 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11421 i40e_fdir_filter_exit(pf);
11423 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11424 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
11425 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11427 /* reset fd counters */
11428 pf->fd_add_err = 0;
11429 pf->fd_atr_cnt = 0;
11430 /* if ATR was auto disabled it can be re-enabled. */
11431 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
11432 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
11433 (I40E_DEBUG_FD & pf->hw.debug_mask))
11434 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
11440 * i40e_clear_rss_lut - clear the rx hash lookup table
11441 * @vsi: the VSI being configured
11443 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
11445 struct i40e_pf *pf = vsi->back;
11446 struct i40e_hw *hw = &pf->hw;
11447 u16 vf_id = vsi->vf_id;
11450 if (vsi->type == I40E_VSI_MAIN) {
11451 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11452 wr32(hw, I40E_PFQF_HLUT(i), 0);
11453 } else if (vsi->type == I40E_VSI_SRIOV) {
11454 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11455 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
11457 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11462 * i40e_set_features - set the netdev feature flags
11463 * @netdev: ptr to the netdev being adjusted
11464 * @features: the feature set that the stack is suggesting
11465 * Note: expects to be called while under rtnl_lock()
11467 static int i40e_set_features(struct net_device *netdev,
11468 netdev_features_t features)
11470 struct i40e_netdev_priv *np = netdev_priv(netdev);
11471 struct i40e_vsi *vsi = np->vsi;
11472 struct i40e_pf *pf = vsi->back;
11475 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
11476 i40e_pf_config_rss(pf);
11477 else if (!(features & NETIF_F_RXHASH) &&
11478 netdev->features & NETIF_F_RXHASH)
11479 i40e_clear_rss_lut(vsi);
11481 if (features & NETIF_F_HW_VLAN_CTAG_RX)
11482 i40e_vlan_stripping_enable(vsi);
11484 i40e_vlan_stripping_disable(vsi);
11486 if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
11487 dev_err(&pf->pdev->dev,
11488 "Offloaded tc filters active, can't turn hw_tc_offload off");
11492 need_reset = i40e_set_ntuple(pf, features);
11495 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
11501 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
11502 * @pf: board private structure
11503 * @port: The UDP port to look up
11505 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
11507 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
11511 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
11512 /* Do not report ports with pending deletions as
11515 if (!port && (pf->pending_udp_bitmap & BIT_ULL(i)))
11517 if (pf->udp_ports[i].port == port)
11525 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
11526 * @netdev: This physical port's netdev
11527 * @ti: Tunnel endpoint information
11529 static void i40e_udp_tunnel_add(struct net_device *netdev,
11530 struct udp_tunnel_info *ti)
11532 struct i40e_netdev_priv *np = netdev_priv(netdev);
11533 struct i40e_vsi *vsi = np->vsi;
11534 struct i40e_pf *pf = vsi->back;
11535 u16 port = ntohs(ti->port);
11539 idx = i40e_get_udp_port_idx(pf, port);
11541 /* Check if port already exists */
11542 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
11543 netdev_info(netdev, "port %d already offloaded\n", port);
11547 /* Now check if there is space to add the new port */
11548 next_idx = i40e_get_udp_port_idx(pf, 0);
11550 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
11551 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
11556 switch (ti->type) {
11557 case UDP_TUNNEL_TYPE_VXLAN:
11558 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
11560 case UDP_TUNNEL_TYPE_GENEVE:
11561 if (!(pf->hw_features & I40E_HW_GENEVE_OFFLOAD_CAPABLE))
11563 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
11569 /* New port: add it and mark its index in the bitmap */
11570 pf->udp_ports[next_idx].port = port;
11571 pf->udp_ports[next_idx].filter_index = I40E_UDP_PORT_INDEX_UNUSED;
11572 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
11573 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
11577 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
11578 * @netdev: This physical port's netdev
11579 * @ti: Tunnel endpoint information
11581 static void i40e_udp_tunnel_del(struct net_device *netdev,
11582 struct udp_tunnel_info *ti)
11584 struct i40e_netdev_priv *np = netdev_priv(netdev);
11585 struct i40e_vsi *vsi = np->vsi;
11586 struct i40e_pf *pf = vsi->back;
11587 u16 port = ntohs(ti->port);
11590 idx = i40e_get_udp_port_idx(pf, port);
11592 /* Check if port already exists */
11593 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
11596 switch (ti->type) {
11597 case UDP_TUNNEL_TYPE_VXLAN:
11598 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
11601 case UDP_TUNNEL_TYPE_GENEVE:
11602 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
11609 /* if port exists, set it to 0 (mark for deletion)
11610 * and make it pending
11612 pf->udp_ports[idx].port = 0;
11614 /* Toggle pending bit instead of setting it. This way if we are
11615 * deleting a port that has yet to be added we just clear the pending
11616 * bit and don't have to worry about it.
11618 pf->pending_udp_bitmap ^= BIT_ULL(idx);
11619 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
11623 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
11627 static int i40e_get_phys_port_id(struct net_device *netdev,
11628 struct netdev_phys_item_id *ppid)
11630 struct i40e_netdev_priv *np = netdev_priv(netdev);
11631 struct i40e_pf *pf = np->vsi->back;
11632 struct i40e_hw *hw = &pf->hw;
11634 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
11635 return -EOPNOTSUPP;
11637 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
11638 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
11644 * i40e_ndo_fdb_add - add an entry to the hardware database
11645 * @ndm: the input from the stack
11646 * @tb: pointer to array of nladdr (unused)
11647 * @dev: the net device pointer
11648 * @addr: the MAC address entry being added
11650 * @flags: instructions from stack about fdb operation
11652 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
11653 struct net_device *dev,
11654 const unsigned char *addr, u16 vid,
11657 struct i40e_netdev_priv *np = netdev_priv(dev);
11658 struct i40e_pf *pf = np->vsi->back;
11661 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
11662 return -EOPNOTSUPP;
11665 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
11669 /* Hardware does not support aging addresses so if a
11670 * ndm_state is given only allow permanent addresses
11672 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
11673 netdev_info(dev, "FDB only supports static addresses\n");
11677 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
11678 err = dev_uc_add_excl(dev, addr);
11679 else if (is_multicast_ether_addr(addr))
11680 err = dev_mc_add_excl(dev, addr);
11684 /* Only return duplicate errors if NLM_F_EXCL is set */
11685 if (err == -EEXIST && !(flags & NLM_F_EXCL))
11692 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
11693 * @dev: the netdev being configured
11694 * @nlh: RTNL message
11695 * @flags: bridge flags
11696 * @extack: netlink extended ack
11698 * Inserts a new hardware bridge if not already created and
11699 * enables the bridging mode requested (VEB or VEPA). If the
11700 * hardware bridge has already been inserted and the request
11701 * is to change the mode then that requires a PF reset to
11702 * allow rebuild of the components with required hardware
11703 * bridge mode enabled.
11705 * Note: expects to be called while under rtnl_lock()
11707 static int i40e_ndo_bridge_setlink(struct net_device *dev,
11708 struct nlmsghdr *nlh,
11710 struct netlink_ext_ack *extack)
11712 struct i40e_netdev_priv *np = netdev_priv(dev);
11713 struct i40e_vsi *vsi = np->vsi;
11714 struct i40e_pf *pf = vsi->back;
11715 struct i40e_veb *veb = NULL;
11716 struct nlattr *attr, *br_spec;
11719 /* Only for PF VSI for now */
11720 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
11721 return -EOPNOTSUPP;
11723 /* Find the HW bridge for PF VSI */
11724 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
11725 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
11729 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
11731 nla_for_each_nested(attr, br_spec, rem) {
11734 if (nla_type(attr) != IFLA_BRIDGE_MODE)
11737 mode = nla_get_u16(attr);
11738 if ((mode != BRIDGE_MODE_VEPA) &&
11739 (mode != BRIDGE_MODE_VEB))
11742 /* Insert a new HW bridge */
11744 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
11745 vsi->tc_config.enabled_tc);
11747 veb->bridge_mode = mode;
11748 i40e_config_bridge_mode(veb);
11750 /* No Bridge HW offload available */
11754 } else if (mode != veb->bridge_mode) {
11755 /* Existing HW bridge but different mode needs reset */
11756 veb->bridge_mode = mode;
11757 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
11758 if (mode == BRIDGE_MODE_VEB)
11759 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11761 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
11762 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
11771 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
11774 * @seq: RTNL message seq #
11775 * @dev: the netdev being configured
11776 * @filter_mask: unused
11777 * @nlflags: netlink flags passed in
11779 * Return the mode in which the hardware bridge is operating in
11782 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
11783 struct net_device *dev,
11784 u32 __always_unused filter_mask,
11787 struct i40e_netdev_priv *np = netdev_priv(dev);
11788 struct i40e_vsi *vsi = np->vsi;
11789 struct i40e_pf *pf = vsi->back;
11790 struct i40e_veb *veb = NULL;
11793 /* Only for PF VSI for now */
11794 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
11795 return -EOPNOTSUPP;
11797 /* Find the HW bridge for the PF VSI */
11798 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
11799 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
11806 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
11807 0, 0, nlflags, filter_mask, NULL);
11811 * i40e_features_check - Validate encapsulated packet conforms to limits
11813 * @dev: This physical port's netdev
11814 * @features: Offload features that the stack believes apply
11816 static netdev_features_t i40e_features_check(struct sk_buff *skb,
11817 struct net_device *dev,
11818 netdev_features_t features)
11822 /* No point in doing any of this if neither checksum nor GSO are
11823 * being requested for this frame. We can rule out both by just
11824 * checking for CHECKSUM_PARTIAL
11826 if (skb->ip_summed != CHECKSUM_PARTIAL)
11829 /* We cannot support GSO if the MSS is going to be less than
11830 * 64 bytes. If it is then we need to drop support for GSO.
11832 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
11833 features &= ~NETIF_F_GSO_MASK;
11835 /* MACLEN can support at most 63 words */
11836 len = skb_network_header(skb) - skb->data;
11837 if (len & ~(63 * 2))
11840 /* IPLEN and EIPLEN can support at most 127 dwords */
11841 len = skb_transport_header(skb) - skb_network_header(skb);
11842 if (len & ~(127 * 4))
11845 if (skb->encapsulation) {
11846 /* L4TUNLEN can support 127 words */
11847 len = skb_inner_network_header(skb) - skb_transport_header(skb);
11848 if (len & ~(127 * 2))
11851 /* IPLEN can support at most 127 dwords */
11852 len = skb_inner_transport_header(skb) -
11853 skb_inner_network_header(skb);
11854 if (len & ~(127 * 4))
11858 /* No need to validate L4LEN as TCP is the only protocol with a
11859 * a flexible value and we support all possible values supported
11860 * by TCP, which is at most 15 dwords
11865 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
11869 * i40e_xdp_setup - add/remove an XDP program
11870 * @vsi: VSI to changed
11871 * @prog: XDP program
11873 static int i40e_xdp_setup(struct i40e_vsi *vsi,
11874 struct bpf_prog *prog)
11876 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
11877 struct i40e_pf *pf = vsi->back;
11878 struct bpf_prog *old_prog;
11882 /* Don't allow frames that span over multiple buffers */
11883 if (frame_size > vsi->rx_buf_len)
11886 if (!i40e_enabled_xdp_vsi(vsi) && !prog)
11889 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
11890 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
11893 i40e_prep_for_reset(pf, true);
11895 old_prog = xchg(&vsi->xdp_prog, prog);
11898 i40e_reset_and_rebuild(pf, true, true);
11900 for (i = 0; i < vsi->num_queue_pairs; i++)
11901 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
11904 bpf_prog_put(old_prog);
11906 /* Kick start the NAPI context if there is an AF_XDP socket open
11907 * on that queue id. This so that receiving will start.
11909 if (need_reset && prog)
11910 for (i = 0; i < vsi->num_queue_pairs; i++)
11911 if (vsi->xdp_rings[i]->xsk_umem)
11912 (void)i40e_xsk_async_xmit(vsi->netdev, i);
11918 * i40e_enter_busy_conf - Enters busy config state
11921 * Returns 0 on success, <0 for failure.
11923 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
11925 struct i40e_pf *pf = vsi->back;
11928 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
11932 usleep_range(1000, 2000);
11939 * i40e_exit_busy_conf - Exits busy config state
11942 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
11944 struct i40e_pf *pf = vsi->back;
11946 clear_bit(__I40E_CONFIG_BUSY, pf->state);
11950 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
11952 * @queue_pair: queue pair
11954 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
11956 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
11957 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
11958 memset(&vsi->tx_rings[queue_pair]->stats, 0,
11959 sizeof(vsi->tx_rings[queue_pair]->stats));
11960 if (i40e_enabled_xdp_vsi(vsi)) {
11961 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
11962 sizeof(vsi->xdp_rings[queue_pair]->stats));
11967 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
11969 * @queue_pair: queue pair
11971 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
11973 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
11974 if (i40e_enabled_xdp_vsi(vsi)) {
11975 /* Make sure that in-progress ndo_xdp_xmit calls are
11979 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
11981 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
11985 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
11987 * @queue_pair: queue pair
11988 * @enable: true for enable, false for disable
11990 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
11993 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
11994 struct i40e_q_vector *q_vector = rxr->q_vector;
11999 /* All rings in a qp belong to the same qvector. */
12000 if (q_vector->rx.ring || q_vector->tx.ring) {
12002 napi_enable(&q_vector->napi);
12004 napi_disable(&q_vector->napi);
12009 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
12011 * @queue_pair: queue pair
12012 * @enable: true for enable, false for disable
12014 * Returns 0 on success, <0 on failure.
12016 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
12019 struct i40e_pf *pf = vsi->back;
12022 pf_q = vsi->base_queue + queue_pair;
12023 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
12024 false /*is xdp*/, enable);
12026 dev_info(&pf->pdev->dev,
12027 "VSI seid %d Tx ring %d %sable timeout\n",
12028 vsi->seid, pf_q, (enable ? "en" : "dis"));
12032 i40e_control_rx_q(pf, pf_q, enable);
12033 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
12035 dev_info(&pf->pdev->dev,
12036 "VSI seid %d Rx ring %d %sable timeout\n",
12037 vsi->seid, pf_q, (enable ? "en" : "dis"));
12041 /* Due to HW errata, on Rx disable only, the register can
12042 * indicate done before it really is. Needs 50ms to be sure
12047 if (!i40e_enabled_xdp_vsi(vsi))
12050 ret = i40e_control_wait_tx_q(vsi->seid, pf,
12051 pf_q + vsi->alloc_queue_pairs,
12052 true /*is xdp*/, enable);
12054 dev_info(&pf->pdev->dev,
12055 "VSI seid %d XDP Tx ring %d %sable timeout\n",
12056 vsi->seid, pf_q, (enable ? "en" : "dis"));
12063 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
12065 * @queue_pair: queue_pair
12067 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
12069 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12070 struct i40e_pf *pf = vsi->back;
12071 struct i40e_hw *hw = &pf->hw;
12073 /* All rings in a qp belong to the same qvector. */
12074 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
12075 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
12077 i40e_irq_dynamic_enable_icr0(pf);
12083 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
12085 * @queue_pair: queue_pair
12087 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
12089 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12090 struct i40e_pf *pf = vsi->back;
12091 struct i40e_hw *hw = &pf->hw;
12093 /* For simplicity, instead of removing the qp interrupt causes
12094 * from the interrupt linked list, we simply disable the interrupt, and
12095 * leave the list intact.
12097 * All rings in a qp belong to the same qvector.
12099 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12100 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
12102 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
12104 synchronize_irq(pf->msix_entries[intpf].vector);
12106 /* Legacy and MSI mode - this stops all interrupt handling */
12107 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
12108 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
12110 synchronize_irq(pf->pdev->irq);
12115 * i40e_queue_pair_disable - Disables a queue pair
12117 * @queue_pair: queue pair
12119 * Returns 0 on success, <0 on failure.
12121 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
12125 err = i40e_enter_busy_conf(vsi);
12129 i40e_queue_pair_disable_irq(vsi, queue_pair);
12130 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
12131 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
12132 i40e_queue_pair_clean_rings(vsi, queue_pair);
12133 i40e_queue_pair_reset_stats(vsi, queue_pair);
12139 * i40e_queue_pair_enable - Enables a queue pair
12141 * @queue_pair: queue pair
12143 * Returns 0 on success, <0 on failure.
12145 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
12149 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
12153 if (i40e_enabled_xdp_vsi(vsi)) {
12154 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
12159 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
12163 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
12164 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
12165 i40e_queue_pair_enable_irq(vsi, queue_pair);
12167 i40e_exit_busy_conf(vsi);
12173 * i40e_xdp - implements ndo_bpf for i40e
12175 * @xdp: XDP command
12177 static int i40e_xdp(struct net_device *dev,
12178 struct netdev_bpf *xdp)
12180 struct i40e_netdev_priv *np = netdev_priv(dev);
12181 struct i40e_vsi *vsi = np->vsi;
12183 if (vsi->type != I40E_VSI_MAIN)
12186 switch (xdp->command) {
12187 case XDP_SETUP_PROG:
12188 return i40e_xdp_setup(vsi, xdp->prog);
12189 case XDP_QUERY_PROG:
12190 xdp->prog_id = vsi->xdp_prog ? vsi->xdp_prog->aux->id : 0;
12192 case XDP_QUERY_XSK_UMEM:
12193 return i40e_xsk_umem_query(vsi, &xdp->xsk.umem,
12194 xdp->xsk.queue_id);
12195 case XDP_SETUP_XSK_UMEM:
12196 return i40e_xsk_umem_setup(vsi, xdp->xsk.umem,
12197 xdp->xsk.queue_id);
12203 static const struct net_device_ops i40e_netdev_ops = {
12204 .ndo_open = i40e_open,
12205 .ndo_stop = i40e_close,
12206 .ndo_start_xmit = i40e_lan_xmit_frame,
12207 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
12208 .ndo_set_rx_mode = i40e_set_rx_mode,
12209 .ndo_validate_addr = eth_validate_addr,
12210 .ndo_set_mac_address = i40e_set_mac,
12211 .ndo_change_mtu = i40e_change_mtu,
12212 .ndo_do_ioctl = i40e_ioctl,
12213 .ndo_tx_timeout = i40e_tx_timeout,
12214 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
12215 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
12216 #ifdef CONFIG_NET_POLL_CONTROLLER
12217 .ndo_poll_controller = i40e_netpoll,
12219 .ndo_setup_tc = __i40e_setup_tc,
12220 .ndo_set_features = i40e_set_features,
12221 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
12222 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
12223 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
12224 .ndo_get_vf_config = i40e_ndo_get_vf_config,
12225 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
12226 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
12227 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
12228 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
12229 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
12230 .ndo_get_phys_port_id = i40e_get_phys_port_id,
12231 .ndo_fdb_add = i40e_ndo_fdb_add,
12232 .ndo_features_check = i40e_features_check,
12233 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
12234 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
12235 .ndo_bpf = i40e_xdp,
12236 .ndo_xdp_xmit = i40e_xdp_xmit,
12237 .ndo_xsk_async_xmit = i40e_xsk_async_xmit,
12241 * i40e_config_netdev - Setup the netdev flags
12242 * @vsi: the VSI being configured
12244 * Returns 0 on success, negative value on failure
12246 static int i40e_config_netdev(struct i40e_vsi *vsi)
12248 struct i40e_pf *pf = vsi->back;
12249 struct i40e_hw *hw = &pf->hw;
12250 struct i40e_netdev_priv *np;
12251 struct net_device *netdev;
12252 u8 broadcast[ETH_ALEN];
12253 u8 mac_addr[ETH_ALEN];
12255 netdev_features_t hw_enc_features;
12256 netdev_features_t hw_features;
12258 etherdev_size = sizeof(struct i40e_netdev_priv);
12259 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
12263 vsi->netdev = netdev;
12264 np = netdev_priv(netdev);
12267 hw_enc_features = NETIF_F_SG |
12269 NETIF_F_IPV6_CSUM |
12271 NETIF_F_SOFT_FEATURES |
12276 NETIF_F_GSO_GRE_CSUM |
12277 NETIF_F_GSO_PARTIAL |
12278 NETIF_F_GSO_IPXIP4 |
12279 NETIF_F_GSO_IPXIP6 |
12280 NETIF_F_GSO_UDP_TUNNEL |
12281 NETIF_F_GSO_UDP_TUNNEL_CSUM |
12287 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
12288 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
12290 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
12292 netdev->hw_enc_features |= hw_enc_features;
12294 /* record features VLANs can make use of */
12295 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
12297 hw_features = hw_enc_features |
12298 NETIF_F_HW_VLAN_CTAG_TX |
12299 NETIF_F_HW_VLAN_CTAG_RX;
12301 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
12302 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
12304 netdev->hw_features |= hw_features;
12306 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
12307 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
12309 if (vsi->type == I40E_VSI_MAIN) {
12310 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
12311 ether_addr_copy(mac_addr, hw->mac.perm_addr);
12312 /* The following steps are necessary for two reasons. First,
12313 * some older NVM configurations load a default MAC-VLAN
12314 * filter that will accept any tagged packet, and we want to
12315 * replace this with a normal filter. Additionally, it is
12316 * possible our MAC address was provided by the platform using
12317 * Open Firmware or similar.
12319 * Thus, we need to remove the default filter and install one
12320 * specific to the MAC address.
12322 i40e_rm_default_mac_filter(vsi, mac_addr);
12323 spin_lock_bh(&vsi->mac_filter_hash_lock);
12324 i40e_add_mac_filter(vsi, mac_addr);
12325 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12327 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
12328 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
12329 * the end, which is 4 bytes long, so force truncation of the
12330 * original name by IFNAMSIZ - 4
12332 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
12334 pf->vsi[pf->lan_vsi]->netdev->name);
12335 eth_random_addr(mac_addr);
12337 spin_lock_bh(&vsi->mac_filter_hash_lock);
12338 i40e_add_mac_filter(vsi, mac_addr);
12339 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12342 /* Add the broadcast filter so that we initially will receive
12343 * broadcast packets. Note that when a new VLAN is first added the
12344 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
12345 * specific filters as part of transitioning into "vlan" operation.
12346 * When more VLANs are added, the driver will copy each existing MAC
12347 * filter and add it for the new VLAN.
12349 * Broadcast filters are handled specially by
12350 * i40e_sync_filters_subtask, as the driver must to set the broadcast
12351 * promiscuous bit instead of adding this directly as a MAC/VLAN
12352 * filter. The subtask will update the correct broadcast promiscuous
12353 * bits as VLANs become active or inactive.
12355 eth_broadcast_addr(broadcast);
12356 spin_lock_bh(&vsi->mac_filter_hash_lock);
12357 i40e_add_mac_filter(vsi, broadcast);
12358 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12360 ether_addr_copy(netdev->dev_addr, mac_addr);
12361 ether_addr_copy(netdev->perm_addr, mac_addr);
12363 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
12364 netdev->neigh_priv_len = sizeof(u32) * 4;
12366 netdev->priv_flags |= IFF_UNICAST_FLT;
12367 netdev->priv_flags |= IFF_SUPP_NOFCS;
12368 /* Setup netdev TC information */
12369 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
12371 netdev->netdev_ops = &i40e_netdev_ops;
12372 netdev->watchdog_timeo = 5 * HZ;
12373 i40e_set_ethtool_ops(netdev);
12375 /* MTU range: 68 - 9706 */
12376 netdev->min_mtu = ETH_MIN_MTU;
12377 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
12383 * i40e_vsi_delete - Delete a VSI from the switch
12384 * @vsi: the VSI being removed
12386 * Returns 0 on success, negative value on failure
12388 static void i40e_vsi_delete(struct i40e_vsi *vsi)
12390 /* remove default VSI is not allowed */
12391 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
12394 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
12398 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
12399 * @vsi: the VSI being queried
12401 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
12403 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
12405 struct i40e_veb *veb;
12406 struct i40e_pf *pf = vsi->back;
12408 /* Uplink is not a bridge so default to VEB */
12409 if (vsi->veb_idx == I40E_NO_VEB)
12412 veb = pf->veb[vsi->veb_idx];
12414 dev_info(&pf->pdev->dev,
12415 "There is no veb associated with the bridge\n");
12419 /* Uplink is a bridge in VEPA mode */
12420 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
12423 /* Uplink is a bridge in VEB mode */
12427 /* VEPA is now default bridge, so return 0 */
12432 * i40e_add_vsi - Add a VSI to the switch
12433 * @vsi: the VSI being configured
12435 * This initializes a VSI context depending on the VSI type to be added and
12436 * passes it down to the add_vsi aq command.
12438 static int i40e_add_vsi(struct i40e_vsi *vsi)
12441 struct i40e_pf *pf = vsi->back;
12442 struct i40e_hw *hw = &pf->hw;
12443 struct i40e_vsi_context ctxt;
12444 struct i40e_mac_filter *f;
12445 struct hlist_node *h;
12448 u8 enabled_tc = 0x1; /* TC0 enabled */
12451 memset(&ctxt, 0, sizeof(ctxt));
12452 switch (vsi->type) {
12453 case I40E_VSI_MAIN:
12454 /* The PF's main VSI is already setup as part of the
12455 * device initialization, so we'll not bother with
12456 * the add_vsi call, but we will retrieve the current
12459 ctxt.seid = pf->main_vsi_seid;
12460 ctxt.pf_num = pf->hw.pf_id;
12462 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
12463 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
12465 dev_info(&pf->pdev->dev,
12466 "couldn't get PF vsi config, err %s aq_err %s\n",
12467 i40e_stat_str(&pf->hw, ret),
12468 i40e_aq_str(&pf->hw,
12469 pf->hw.aq.asq_last_status));
12472 vsi->info = ctxt.info;
12473 vsi->info.valid_sections = 0;
12475 vsi->seid = ctxt.seid;
12476 vsi->id = ctxt.vsi_number;
12478 enabled_tc = i40e_pf_get_tc_map(pf);
12480 /* Source pruning is enabled by default, so the flag is
12481 * negative logic - if it's set, we need to fiddle with
12482 * the VSI to disable source pruning.
12484 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
12485 memset(&ctxt, 0, sizeof(ctxt));
12486 ctxt.seid = pf->main_vsi_seid;
12487 ctxt.pf_num = pf->hw.pf_id;
12489 ctxt.info.valid_sections |=
12490 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12491 ctxt.info.switch_id =
12492 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
12493 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
12495 dev_info(&pf->pdev->dev,
12496 "update vsi failed, err %s aq_err %s\n",
12497 i40e_stat_str(&pf->hw, ret),
12498 i40e_aq_str(&pf->hw,
12499 pf->hw.aq.asq_last_status));
12505 /* MFP mode setup queue map and update VSI */
12506 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
12507 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
12508 memset(&ctxt, 0, sizeof(ctxt));
12509 ctxt.seid = pf->main_vsi_seid;
12510 ctxt.pf_num = pf->hw.pf_id;
12512 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
12513 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
12515 dev_info(&pf->pdev->dev,
12516 "update vsi failed, err %s aq_err %s\n",
12517 i40e_stat_str(&pf->hw, ret),
12518 i40e_aq_str(&pf->hw,
12519 pf->hw.aq.asq_last_status));
12523 /* update the local VSI info queue map */
12524 i40e_vsi_update_queue_map(vsi, &ctxt);
12525 vsi->info.valid_sections = 0;
12527 /* Default/Main VSI is only enabled for TC0
12528 * reconfigure it to enable all TCs that are
12529 * available on the port in SFP mode.
12530 * For MFP case the iSCSI PF would use this
12531 * flow to enable LAN+iSCSI TC.
12533 ret = i40e_vsi_config_tc(vsi, enabled_tc);
12535 /* Single TC condition is not fatal,
12536 * message and continue
12538 dev_info(&pf->pdev->dev,
12539 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
12541 i40e_stat_str(&pf->hw, ret),
12542 i40e_aq_str(&pf->hw,
12543 pf->hw.aq.asq_last_status));
12548 case I40E_VSI_FDIR:
12549 ctxt.pf_num = hw->pf_id;
12551 ctxt.uplink_seid = vsi->uplink_seid;
12552 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
12553 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
12554 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
12555 (i40e_is_vsi_uplink_mode_veb(vsi))) {
12556 ctxt.info.valid_sections |=
12557 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12558 ctxt.info.switch_id =
12559 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
12561 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
12564 case I40E_VSI_VMDQ2:
12565 ctxt.pf_num = hw->pf_id;
12567 ctxt.uplink_seid = vsi->uplink_seid;
12568 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
12569 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
12571 /* This VSI is connected to VEB so the switch_id
12572 * should be set to zero by default.
12574 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
12575 ctxt.info.valid_sections |=
12576 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12577 ctxt.info.switch_id =
12578 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
12581 /* Setup the VSI tx/rx queue map for TC0 only for now */
12582 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
12585 case I40E_VSI_SRIOV:
12586 ctxt.pf_num = hw->pf_id;
12587 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
12588 ctxt.uplink_seid = vsi->uplink_seid;
12589 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
12590 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
12592 /* This VSI is connected to VEB so the switch_id
12593 * should be set to zero by default.
12595 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
12596 ctxt.info.valid_sections |=
12597 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
12598 ctxt.info.switch_id =
12599 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
12602 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
12603 ctxt.info.valid_sections |=
12604 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
12605 ctxt.info.queueing_opt_flags |=
12606 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
12607 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
12610 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
12611 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
12612 if (pf->vf[vsi->vf_id].spoofchk) {
12613 ctxt.info.valid_sections |=
12614 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
12615 ctxt.info.sec_flags |=
12616 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
12617 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
12619 /* Setup the VSI tx/rx queue map for TC0 only for now */
12620 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
12623 case I40E_VSI_IWARP:
12624 /* send down message to iWARP */
12631 if (vsi->type != I40E_VSI_MAIN) {
12632 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
12634 dev_info(&vsi->back->pdev->dev,
12635 "add vsi failed, err %s aq_err %s\n",
12636 i40e_stat_str(&pf->hw, ret),
12637 i40e_aq_str(&pf->hw,
12638 pf->hw.aq.asq_last_status));
12642 vsi->info = ctxt.info;
12643 vsi->info.valid_sections = 0;
12644 vsi->seid = ctxt.seid;
12645 vsi->id = ctxt.vsi_number;
12648 vsi->active_filters = 0;
12649 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
12650 spin_lock_bh(&vsi->mac_filter_hash_lock);
12651 /* If macvlan filters already exist, force them to get loaded */
12652 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
12653 f->state = I40E_FILTER_NEW;
12656 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12659 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
12660 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
12663 /* Update VSI BW information */
12664 ret = i40e_vsi_get_bw_info(vsi);
12666 dev_info(&pf->pdev->dev,
12667 "couldn't get vsi bw info, err %s aq_err %s\n",
12668 i40e_stat_str(&pf->hw, ret),
12669 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
12670 /* VSI is already added so not tearing that up */
12679 * i40e_vsi_release - Delete a VSI and free its resources
12680 * @vsi: the VSI being removed
12682 * Returns 0 on success or < 0 on error
12684 int i40e_vsi_release(struct i40e_vsi *vsi)
12686 struct i40e_mac_filter *f;
12687 struct hlist_node *h;
12688 struct i40e_veb *veb = NULL;
12689 struct i40e_pf *pf;
12695 /* release of a VEB-owner or last VSI is not allowed */
12696 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
12697 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
12698 vsi->seid, vsi->uplink_seid);
12701 if (vsi == pf->vsi[pf->lan_vsi] &&
12702 !test_bit(__I40E_DOWN, pf->state)) {
12703 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
12707 uplink_seid = vsi->uplink_seid;
12708 if (vsi->type != I40E_VSI_SRIOV) {
12709 if (vsi->netdev_registered) {
12710 vsi->netdev_registered = false;
12712 /* results in a call to i40e_close() */
12713 unregister_netdev(vsi->netdev);
12716 i40e_vsi_close(vsi);
12718 i40e_vsi_disable_irq(vsi);
12721 spin_lock_bh(&vsi->mac_filter_hash_lock);
12723 /* clear the sync flag on all filters */
12725 __dev_uc_unsync(vsi->netdev, NULL);
12726 __dev_mc_unsync(vsi->netdev, NULL);
12729 /* make sure any remaining filters are marked for deletion */
12730 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
12731 __i40e_del_filter(vsi, f);
12733 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12735 i40e_sync_vsi_filters(vsi);
12737 i40e_vsi_delete(vsi);
12738 i40e_vsi_free_q_vectors(vsi);
12740 free_netdev(vsi->netdev);
12741 vsi->netdev = NULL;
12743 i40e_vsi_clear_rings(vsi);
12744 i40e_vsi_clear(vsi);
12746 /* If this was the last thing on the VEB, except for the
12747 * controlling VSI, remove the VEB, which puts the controlling
12748 * VSI onto the next level down in the switch.
12750 * Well, okay, there's one more exception here: don't remove
12751 * the orphan VEBs yet. We'll wait for an explicit remove request
12752 * from up the network stack.
12754 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
12756 pf->vsi[i]->uplink_seid == uplink_seid &&
12757 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
12758 n++; /* count the VSIs */
12761 for (i = 0; i < I40E_MAX_VEB; i++) {
12764 if (pf->veb[i]->uplink_seid == uplink_seid)
12765 n++; /* count the VEBs */
12766 if (pf->veb[i]->seid == uplink_seid)
12769 if (n == 0 && veb && veb->uplink_seid != 0)
12770 i40e_veb_release(veb);
12776 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
12777 * @vsi: ptr to the VSI
12779 * This should only be called after i40e_vsi_mem_alloc() which allocates the
12780 * corresponding SW VSI structure and initializes num_queue_pairs for the
12781 * newly allocated VSI.
12783 * Returns 0 on success or negative on failure
12785 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
12788 struct i40e_pf *pf = vsi->back;
12790 if (vsi->q_vectors[0]) {
12791 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
12796 if (vsi->base_vector) {
12797 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
12798 vsi->seid, vsi->base_vector);
12802 ret = i40e_vsi_alloc_q_vectors(vsi);
12804 dev_info(&pf->pdev->dev,
12805 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
12806 vsi->num_q_vectors, vsi->seid, ret);
12807 vsi->num_q_vectors = 0;
12808 goto vector_setup_out;
12811 /* In Legacy mode, we do not have to get any other vector since we
12812 * piggyback on the misc/ICR0 for queue interrupts.
12814 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
12816 if (vsi->num_q_vectors)
12817 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
12818 vsi->num_q_vectors, vsi->idx);
12819 if (vsi->base_vector < 0) {
12820 dev_info(&pf->pdev->dev,
12821 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
12822 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
12823 i40e_vsi_free_q_vectors(vsi);
12825 goto vector_setup_out;
12833 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
12834 * @vsi: pointer to the vsi.
12836 * This re-allocates a vsi's queue resources.
12838 * Returns pointer to the successfully allocated and configured VSI sw struct
12839 * on success, otherwise returns NULL on failure.
12841 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
12843 u16 alloc_queue_pairs;
12844 struct i40e_pf *pf;
12853 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
12854 i40e_vsi_clear_rings(vsi);
12856 i40e_vsi_free_arrays(vsi, false);
12857 i40e_set_num_rings_in_vsi(vsi);
12858 ret = i40e_vsi_alloc_arrays(vsi, false);
12862 alloc_queue_pairs = vsi->alloc_queue_pairs *
12863 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
12865 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
12867 dev_info(&pf->pdev->dev,
12868 "failed to get tracking for %d queues for VSI %d err %d\n",
12869 alloc_queue_pairs, vsi->seid, ret);
12872 vsi->base_queue = ret;
12874 /* Update the FW view of the VSI. Force a reset of TC and queue
12875 * layout configurations.
12877 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
12878 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
12879 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
12880 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
12881 if (vsi->type == I40E_VSI_MAIN)
12882 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
12884 /* assign it some queues */
12885 ret = i40e_alloc_rings(vsi);
12889 /* map all of the rings to the q_vectors */
12890 i40e_vsi_map_rings_to_vectors(vsi);
12894 i40e_vsi_free_q_vectors(vsi);
12895 if (vsi->netdev_registered) {
12896 vsi->netdev_registered = false;
12897 unregister_netdev(vsi->netdev);
12898 free_netdev(vsi->netdev);
12899 vsi->netdev = NULL;
12901 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
12903 i40e_vsi_clear(vsi);
12908 * i40e_vsi_setup - Set up a VSI by a given type
12909 * @pf: board private structure
12911 * @uplink_seid: the switch element to link to
12912 * @param1: usage depends upon VSI type. For VF types, indicates VF id
12914 * This allocates the sw VSI structure and its queue resources, then add a VSI
12915 * to the identified VEB.
12917 * Returns pointer to the successfully allocated and configure VSI sw struct on
12918 * success, otherwise returns NULL on failure.
12920 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
12921 u16 uplink_seid, u32 param1)
12923 struct i40e_vsi *vsi = NULL;
12924 struct i40e_veb *veb = NULL;
12925 u16 alloc_queue_pairs;
12929 /* The requested uplink_seid must be either
12930 * - the PF's port seid
12931 * no VEB is needed because this is the PF
12932 * or this is a Flow Director special case VSI
12933 * - seid of an existing VEB
12934 * - seid of a VSI that owns an existing VEB
12935 * - seid of a VSI that doesn't own a VEB
12936 * a new VEB is created and the VSI becomes the owner
12937 * - seid of the PF VSI, which is what creates the first VEB
12938 * this is a special case of the previous
12940 * Find which uplink_seid we were given and create a new VEB if needed
12942 for (i = 0; i < I40E_MAX_VEB; i++) {
12943 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
12949 if (!veb && uplink_seid != pf->mac_seid) {
12951 for (i = 0; i < pf->num_alloc_vsi; i++) {
12952 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
12958 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
12963 if (vsi->uplink_seid == pf->mac_seid)
12964 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
12965 vsi->tc_config.enabled_tc);
12966 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
12967 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12968 vsi->tc_config.enabled_tc);
12970 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
12971 dev_info(&vsi->back->pdev->dev,
12972 "New VSI creation error, uplink seid of LAN VSI expected.\n");
12975 /* We come up by default in VEPA mode if SRIOV is not
12976 * already enabled, in which case we can't force VEPA
12979 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
12980 veb->bridge_mode = BRIDGE_MODE_VEPA;
12981 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12983 i40e_config_bridge_mode(veb);
12985 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12986 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12990 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
12994 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
12995 uplink_seid = veb->seid;
12998 /* get vsi sw struct */
12999 v_idx = i40e_vsi_mem_alloc(pf, type);
13002 vsi = pf->vsi[v_idx];
13006 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
13008 if (type == I40E_VSI_MAIN)
13009 pf->lan_vsi = v_idx;
13010 else if (type == I40E_VSI_SRIOV)
13011 vsi->vf_id = param1;
13012 /* assign it some queues */
13013 alloc_queue_pairs = vsi->alloc_queue_pairs *
13014 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13016 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13018 dev_info(&pf->pdev->dev,
13019 "failed to get tracking for %d queues for VSI %d err=%d\n",
13020 alloc_queue_pairs, vsi->seid, ret);
13023 vsi->base_queue = ret;
13025 /* get a VSI from the hardware */
13026 vsi->uplink_seid = uplink_seid;
13027 ret = i40e_add_vsi(vsi);
13031 switch (vsi->type) {
13032 /* setup the netdev if needed */
13033 case I40E_VSI_MAIN:
13034 case I40E_VSI_VMDQ2:
13035 ret = i40e_config_netdev(vsi);
13038 ret = register_netdev(vsi->netdev);
13041 vsi->netdev_registered = true;
13042 netif_carrier_off(vsi->netdev);
13043 #ifdef CONFIG_I40E_DCB
13044 /* Setup DCB netlink interface */
13045 i40e_dcbnl_setup(vsi);
13046 #endif /* CONFIG_I40E_DCB */
13049 case I40E_VSI_FDIR:
13050 /* set up vectors and rings if needed */
13051 ret = i40e_vsi_setup_vectors(vsi);
13055 ret = i40e_alloc_rings(vsi);
13059 /* map all of the rings to the q_vectors */
13060 i40e_vsi_map_rings_to_vectors(vsi);
13062 i40e_vsi_reset_stats(vsi);
13066 /* no netdev or rings for the other VSI types */
13070 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
13071 (vsi->type == I40E_VSI_VMDQ2)) {
13072 ret = i40e_vsi_config_rss(vsi);
13077 i40e_vsi_free_q_vectors(vsi);
13079 if (vsi->netdev_registered) {
13080 vsi->netdev_registered = false;
13081 unregister_netdev(vsi->netdev);
13082 free_netdev(vsi->netdev);
13083 vsi->netdev = NULL;
13086 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13088 i40e_vsi_clear(vsi);
13094 * i40e_veb_get_bw_info - Query VEB BW information
13095 * @veb: the veb to query
13097 * Query the Tx scheduler BW configuration data for given VEB
13099 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
13101 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
13102 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
13103 struct i40e_pf *pf = veb->pf;
13104 struct i40e_hw *hw = &pf->hw;
13109 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
13112 dev_info(&pf->pdev->dev,
13113 "query veb bw config failed, err %s aq_err %s\n",
13114 i40e_stat_str(&pf->hw, ret),
13115 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
13119 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
13122 dev_info(&pf->pdev->dev,
13123 "query veb bw ets config failed, err %s aq_err %s\n",
13124 i40e_stat_str(&pf->hw, ret),
13125 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
13129 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
13130 veb->bw_max_quanta = ets_data.tc_bw_max;
13131 veb->is_abs_credits = bw_data.absolute_credits_enable;
13132 veb->enabled_tc = ets_data.tc_valid_bits;
13133 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
13134 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
13135 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
13136 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
13137 veb->bw_tc_limit_credits[i] =
13138 le16_to_cpu(bw_data.tc_bw_limits[i]);
13139 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
13147 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
13148 * @pf: board private structure
13150 * On error: returns error code (negative)
13151 * On success: returns vsi index in PF (positive)
13153 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
13156 struct i40e_veb *veb;
13159 /* Need to protect the allocation of switch elements at the PF level */
13160 mutex_lock(&pf->switch_mutex);
13162 /* VEB list may be fragmented if VEB creation/destruction has
13163 * been happening. We can afford to do a quick scan to look
13164 * for any free slots in the list.
13166 * find next empty veb slot, looping back around if necessary
13169 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
13171 if (i >= I40E_MAX_VEB) {
13173 goto err_alloc_veb; /* out of VEB slots! */
13176 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
13179 goto err_alloc_veb;
13183 veb->enabled_tc = 1;
13188 mutex_unlock(&pf->switch_mutex);
13193 * i40e_switch_branch_release - Delete a branch of the switch tree
13194 * @branch: where to start deleting
13196 * This uses recursion to find the tips of the branch to be
13197 * removed, deleting until we get back to and can delete this VEB.
13199 static void i40e_switch_branch_release(struct i40e_veb *branch)
13201 struct i40e_pf *pf = branch->pf;
13202 u16 branch_seid = branch->seid;
13203 u16 veb_idx = branch->idx;
13206 /* release any VEBs on this VEB - RECURSION */
13207 for (i = 0; i < I40E_MAX_VEB; i++) {
13210 if (pf->veb[i]->uplink_seid == branch->seid)
13211 i40e_switch_branch_release(pf->veb[i]);
13214 /* Release the VSIs on this VEB, but not the owner VSI.
13216 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
13217 * the VEB itself, so don't use (*branch) after this loop.
13219 for (i = 0; i < pf->num_alloc_vsi; i++) {
13222 if (pf->vsi[i]->uplink_seid == branch_seid &&
13223 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13224 i40e_vsi_release(pf->vsi[i]);
13228 /* There's one corner case where the VEB might not have been
13229 * removed, so double check it here and remove it if needed.
13230 * This case happens if the veb was created from the debugfs
13231 * commands and no VSIs were added to it.
13233 if (pf->veb[veb_idx])
13234 i40e_veb_release(pf->veb[veb_idx]);
13238 * i40e_veb_clear - remove veb struct
13239 * @veb: the veb to remove
13241 static void i40e_veb_clear(struct i40e_veb *veb)
13247 struct i40e_pf *pf = veb->pf;
13249 mutex_lock(&pf->switch_mutex);
13250 if (pf->veb[veb->idx] == veb)
13251 pf->veb[veb->idx] = NULL;
13252 mutex_unlock(&pf->switch_mutex);
13259 * i40e_veb_release - Delete a VEB and free its resources
13260 * @veb: the VEB being removed
13262 void i40e_veb_release(struct i40e_veb *veb)
13264 struct i40e_vsi *vsi = NULL;
13265 struct i40e_pf *pf;
13270 /* find the remaining VSI and check for extras */
13271 for (i = 0; i < pf->num_alloc_vsi; i++) {
13272 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
13278 dev_info(&pf->pdev->dev,
13279 "can't remove VEB %d with %d VSIs left\n",
13284 /* move the remaining VSI to uplink veb */
13285 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
13286 if (veb->uplink_seid) {
13287 vsi->uplink_seid = veb->uplink_seid;
13288 if (veb->uplink_seid == pf->mac_seid)
13289 vsi->veb_idx = I40E_NO_VEB;
13291 vsi->veb_idx = veb->veb_idx;
13294 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
13295 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
13298 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
13299 i40e_veb_clear(veb);
13303 * i40e_add_veb - create the VEB in the switch
13304 * @veb: the VEB to be instantiated
13305 * @vsi: the controlling VSI
13307 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
13309 struct i40e_pf *pf = veb->pf;
13310 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
13313 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
13314 veb->enabled_tc, false,
13315 &veb->seid, enable_stats, NULL);
13317 /* get a VEB from the hardware */
13319 dev_info(&pf->pdev->dev,
13320 "couldn't add VEB, err %s aq_err %s\n",
13321 i40e_stat_str(&pf->hw, ret),
13322 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13326 /* get statistics counter */
13327 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
13328 &veb->stats_idx, NULL, NULL, NULL);
13330 dev_info(&pf->pdev->dev,
13331 "couldn't get VEB statistics idx, err %s aq_err %s\n",
13332 i40e_stat_str(&pf->hw, ret),
13333 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13336 ret = i40e_veb_get_bw_info(veb);
13338 dev_info(&pf->pdev->dev,
13339 "couldn't get VEB bw info, err %s aq_err %s\n",
13340 i40e_stat_str(&pf->hw, ret),
13341 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13342 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
13346 vsi->uplink_seid = veb->seid;
13347 vsi->veb_idx = veb->idx;
13348 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
13354 * i40e_veb_setup - Set up a VEB
13355 * @pf: board private structure
13356 * @flags: VEB setup flags
13357 * @uplink_seid: the switch element to link to
13358 * @vsi_seid: the initial VSI seid
13359 * @enabled_tc: Enabled TC bit-map
13361 * This allocates the sw VEB structure and links it into the switch
13362 * It is possible and legal for this to be a duplicate of an already
13363 * existing VEB. It is also possible for both uplink and vsi seids
13364 * to be zero, in order to create a floating VEB.
13366 * Returns pointer to the successfully allocated VEB sw struct on
13367 * success, otherwise returns NULL on failure.
13369 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
13370 u16 uplink_seid, u16 vsi_seid,
13373 struct i40e_veb *veb, *uplink_veb = NULL;
13374 int vsi_idx, veb_idx;
13377 /* if one seid is 0, the other must be 0 to create a floating relay */
13378 if ((uplink_seid == 0 || vsi_seid == 0) &&
13379 (uplink_seid + vsi_seid != 0)) {
13380 dev_info(&pf->pdev->dev,
13381 "one, not both seid's are 0: uplink=%d vsi=%d\n",
13382 uplink_seid, vsi_seid);
13386 /* make sure there is such a vsi and uplink */
13387 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
13388 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
13390 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
13391 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
13396 if (uplink_seid && uplink_seid != pf->mac_seid) {
13397 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
13398 if (pf->veb[veb_idx] &&
13399 pf->veb[veb_idx]->seid == uplink_seid) {
13400 uplink_veb = pf->veb[veb_idx];
13405 dev_info(&pf->pdev->dev,
13406 "uplink seid %d not found\n", uplink_seid);
13411 /* get veb sw struct */
13412 veb_idx = i40e_veb_mem_alloc(pf);
13415 veb = pf->veb[veb_idx];
13416 veb->flags = flags;
13417 veb->uplink_seid = uplink_seid;
13418 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
13419 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
13421 /* create the VEB in the switch */
13422 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
13425 if (vsi_idx == pf->lan_vsi)
13426 pf->lan_veb = veb->idx;
13431 i40e_veb_clear(veb);
13437 * i40e_setup_pf_switch_element - set PF vars based on switch type
13438 * @pf: board private structure
13439 * @ele: element we are building info from
13440 * @num_reported: total number of elements
13441 * @printconfig: should we print the contents
13443 * helper function to assist in extracting a few useful SEID values.
13445 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
13446 struct i40e_aqc_switch_config_element_resp *ele,
13447 u16 num_reported, bool printconfig)
13449 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
13450 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
13451 u8 element_type = ele->element_type;
13452 u16 seid = le16_to_cpu(ele->seid);
13455 dev_info(&pf->pdev->dev,
13456 "type=%d seid=%d uplink=%d downlink=%d\n",
13457 element_type, seid, uplink_seid, downlink_seid);
13459 switch (element_type) {
13460 case I40E_SWITCH_ELEMENT_TYPE_MAC:
13461 pf->mac_seid = seid;
13463 case I40E_SWITCH_ELEMENT_TYPE_VEB:
13465 if (uplink_seid != pf->mac_seid)
13467 if (pf->lan_veb == I40E_NO_VEB) {
13470 /* find existing or else empty VEB */
13471 for (v = 0; v < I40E_MAX_VEB; v++) {
13472 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
13477 if (pf->lan_veb == I40E_NO_VEB) {
13478 v = i40e_veb_mem_alloc(pf);
13485 pf->veb[pf->lan_veb]->seid = seid;
13486 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
13487 pf->veb[pf->lan_veb]->pf = pf;
13488 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
13490 case I40E_SWITCH_ELEMENT_TYPE_VSI:
13491 if (num_reported != 1)
13493 /* This is immediately after a reset so we can assume this is
13496 pf->mac_seid = uplink_seid;
13497 pf->pf_seid = downlink_seid;
13498 pf->main_vsi_seid = seid;
13500 dev_info(&pf->pdev->dev,
13501 "pf_seid=%d main_vsi_seid=%d\n",
13502 pf->pf_seid, pf->main_vsi_seid);
13504 case I40E_SWITCH_ELEMENT_TYPE_PF:
13505 case I40E_SWITCH_ELEMENT_TYPE_VF:
13506 case I40E_SWITCH_ELEMENT_TYPE_EMP:
13507 case I40E_SWITCH_ELEMENT_TYPE_BMC:
13508 case I40E_SWITCH_ELEMENT_TYPE_PE:
13509 case I40E_SWITCH_ELEMENT_TYPE_PA:
13510 /* ignore these for now */
13513 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
13514 element_type, seid);
13520 * i40e_fetch_switch_configuration - Get switch config from firmware
13521 * @pf: board private structure
13522 * @printconfig: should we print the contents
13524 * Get the current switch configuration from the device and
13525 * extract a few useful SEID values.
13527 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
13529 struct i40e_aqc_get_switch_config_resp *sw_config;
13535 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
13539 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
13541 u16 num_reported, num_total;
13543 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
13547 dev_info(&pf->pdev->dev,
13548 "get switch config failed err %s aq_err %s\n",
13549 i40e_stat_str(&pf->hw, ret),
13550 i40e_aq_str(&pf->hw,
13551 pf->hw.aq.asq_last_status));
13556 num_reported = le16_to_cpu(sw_config->header.num_reported);
13557 num_total = le16_to_cpu(sw_config->header.num_total);
13560 dev_info(&pf->pdev->dev,
13561 "header: %d reported %d total\n",
13562 num_reported, num_total);
13564 for (i = 0; i < num_reported; i++) {
13565 struct i40e_aqc_switch_config_element_resp *ele =
13566 &sw_config->element[i];
13568 i40e_setup_pf_switch_element(pf, ele, num_reported,
13571 } while (next_seid != 0);
13578 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
13579 * @pf: board private structure
13580 * @reinit: if the Main VSI needs to re-initialized.
13582 * Returns 0 on success, negative value on failure
13584 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
13589 /* find out what's out there already */
13590 ret = i40e_fetch_switch_configuration(pf, false);
13592 dev_info(&pf->pdev->dev,
13593 "couldn't fetch switch config, err %s aq_err %s\n",
13594 i40e_stat_str(&pf->hw, ret),
13595 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13598 i40e_pf_reset_stats(pf);
13600 /* set the switch config bit for the whole device to
13601 * support limited promisc or true promisc
13602 * when user requests promisc. The default is limited
13606 if ((pf->hw.pf_id == 0) &&
13607 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
13608 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
13609 pf->last_sw_conf_flags = flags;
13612 if (pf->hw.pf_id == 0) {
13615 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
13616 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
13618 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
13619 dev_info(&pf->pdev->dev,
13620 "couldn't set switch config bits, err %s aq_err %s\n",
13621 i40e_stat_str(&pf->hw, ret),
13622 i40e_aq_str(&pf->hw,
13623 pf->hw.aq.asq_last_status));
13624 /* not a fatal problem, just keep going */
13626 pf->last_sw_conf_valid_flags = valid_flags;
13629 /* first time setup */
13630 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
13631 struct i40e_vsi *vsi = NULL;
13634 /* Set up the PF VSI associated with the PF's main VSI
13635 * that is already in the HW switch
13637 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
13638 uplink_seid = pf->veb[pf->lan_veb]->seid;
13640 uplink_seid = pf->mac_seid;
13641 if (pf->lan_vsi == I40E_NO_VSI)
13642 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
13644 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
13646 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
13647 i40e_cloud_filter_exit(pf);
13648 i40e_fdir_teardown(pf);
13652 /* force a reset of TC and queue layout configurations */
13653 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13655 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13656 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13657 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13659 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
13661 i40e_fdir_sb_setup(pf);
13663 /* Setup static PF queue filter control settings */
13664 ret = i40e_setup_pf_filter_control(pf);
13666 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
13668 /* Failure here should not stop continuing other steps */
13671 /* enable RSS in the HW, even for only one queue, as the stack can use
13674 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
13675 i40e_pf_config_rss(pf);
13677 /* fill in link information and enable LSE reporting */
13678 i40e_link_event(pf);
13680 /* Initialize user-specific link properties */
13681 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
13682 I40E_AQ_AN_COMPLETED) ? true : false);
13686 /* repopulate tunnel port filters */
13687 i40e_sync_udp_filters(pf);
13693 * i40e_determine_queue_usage - Work out queue distribution
13694 * @pf: board private structure
13696 static void i40e_determine_queue_usage(struct i40e_pf *pf)
13701 pf->num_lan_qps = 0;
13703 /* Find the max queues to be put into basic use. We'll always be
13704 * using TC0, whether or not DCB is running, and TC0 will get the
13707 queues_left = pf->hw.func_caps.num_tx_qp;
13709 if ((queues_left == 1) ||
13710 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
13711 /* one qp for PF, no queues for anything else */
13713 pf->alloc_rss_size = pf->num_lan_qps = 1;
13715 /* make sure all the fancies are disabled */
13716 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
13717 I40E_FLAG_IWARP_ENABLED |
13718 I40E_FLAG_FD_SB_ENABLED |
13719 I40E_FLAG_FD_ATR_ENABLED |
13720 I40E_FLAG_DCB_CAPABLE |
13721 I40E_FLAG_DCB_ENABLED |
13722 I40E_FLAG_SRIOV_ENABLED |
13723 I40E_FLAG_VMDQ_ENABLED);
13724 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
13725 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
13726 I40E_FLAG_FD_SB_ENABLED |
13727 I40E_FLAG_FD_ATR_ENABLED |
13728 I40E_FLAG_DCB_CAPABLE))) {
13729 /* one qp for PF */
13730 pf->alloc_rss_size = pf->num_lan_qps = 1;
13731 queues_left -= pf->num_lan_qps;
13733 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
13734 I40E_FLAG_IWARP_ENABLED |
13735 I40E_FLAG_FD_SB_ENABLED |
13736 I40E_FLAG_FD_ATR_ENABLED |
13737 I40E_FLAG_DCB_ENABLED |
13738 I40E_FLAG_VMDQ_ENABLED);
13739 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
13741 /* Not enough queues for all TCs */
13742 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
13743 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
13744 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
13745 I40E_FLAG_DCB_ENABLED);
13746 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
13749 /* limit lan qps to the smaller of qps, cpus or msix */
13750 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
13751 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
13752 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
13753 pf->num_lan_qps = q_max;
13755 queues_left -= pf->num_lan_qps;
13758 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
13759 if (queues_left > 1) {
13760 queues_left -= 1; /* save 1 queue for FD */
13762 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
13763 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
13764 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
13768 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
13769 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
13770 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
13771 (queues_left / pf->num_vf_qps));
13772 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
13775 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
13776 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
13777 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
13778 (queues_left / pf->num_vmdq_qps));
13779 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
13782 pf->queues_left = queues_left;
13783 dev_dbg(&pf->pdev->dev,
13784 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
13785 pf->hw.func_caps.num_tx_qp,
13786 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
13787 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
13788 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
13793 * i40e_setup_pf_filter_control - Setup PF static filter control
13794 * @pf: PF to be setup
13796 * i40e_setup_pf_filter_control sets up a PF's initial filter control
13797 * settings. If PE/FCoE are enabled then it will also set the per PF
13798 * based filter sizes required for them. It also enables Flow director,
13799 * ethertype and macvlan type filter settings for the pf.
13801 * Returns 0 on success, negative on failure
13803 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
13805 struct i40e_filter_control_settings *settings = &pf->filter_settings;
13807 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
13809 /* Flow Director is enabled */
13810 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
13811 settings->enable_fdir = true;
13813 /* Ethtype and MACVLAN filters enabled for PF */
13814 settings->enable_ethtype = true;
13815 settings->enable_macvlan = true;
13817 if (i40e_set_filter_control(&pf->hw, settings))
13823 #define INFO_STRING_LEN 255
13824 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
13825 static void i40e_print_features(struct i40e_pf *pf)
13827 struct i40e_hw *hw = &pf->hw;
13831 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
13835 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
13836 #ifdef CONFIG_PCI_IOV
13837 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
13839 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
13840 pf->hw.func_caps.num_vsis,
13841 pf->vsi[pf->lan_vsi]->num_queue_pairs);
13842 if (pf->flags & I40E_FLAG_RSS_ENABLED)
13843 i += snprintf(&buf[i], REMAIN(i), " RSS");
13844 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
13845 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
13846 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
13847 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
13848 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
13850 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
13851 i += snprintf(&buf[i], REMAIN(i), " DCB");
13852 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
13853 i += snprintf(&buf[i], REMAIN(i), " Geneve");
13854 if (pf->flags & I40E_FLAG_PTP)
13855 i += snprintf(&buf[i], REMAIN(i), " PTP");
13856 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
13857 i += snprintf(&buf[i], REMAIN(i), " VEB");
13859 i += snprintf(&buf[i], REMAIN(i), " VEPA");
13861 dev_info(&pf->pdev->dev, "%s\n", buf);
13863 WARN_ON(i > INFO_STRING_LEN);
13867 * i40e_get_platform_mac_addr - get platform-specific MAC address
13868 * @pdev: PCI device information struct
13869 * @pf: board private structure
13871 * Look up the MAC address for the device. First we'll try
13872 * eth_platform_get_mac_address, which will check Open Firmware, or arch
13873 * specific fallback. Otherwise, we'll default to the stored value in
13876 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
13878 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
13879 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
13883 * i40e_probe - Device initialization routine
13884 * @pdev: PCI device information struct
13885 * @ent: entry in i40e_pci_tbl
13887 * i40e_probe initializes a PF identified by a pci_dev structure.
13888 * The OS initialization, configuring of the PF private structure,
13889 * and a hardware reset occur.
13891 * Returns 0 on success, negative on failure
13893 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
13895 struct i40e_aq_get_phy_abilities_resp abilities;
13896 struct i40e_pf *pf;
13897 struct i40e_hw *hw;
13898 static u16 pfs_found;
13906 err = pci_enable_device_mem(pdev);
13910 /* set up for high or low dma */
13911 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
13913 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
13915 dev_err(&pdev->dev,
13916 "DMA configuration failed: 0x%x\n", err);
13921 /* set up pci connections */
13922 err = pci_request_mem_regions(pdev, i40e_driver_name);
13924 dev_info(&pdev->dev,
13925 "pci_request_selected_regions failed %d\n", err);
13929 pci_enable_pcie_error_reporting(pdev);
13930 pci_set_master(pdev);
13932 /* Now that we have a PCI connection, we need to do the
13933 * low level device setup. This is primarily setting up
13934 * the Admin Queue structures and then querying for the
13935 * device's current profile information.
13937 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
13944 set_bit(__I40E_DOWN, pf->state);
13949 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
13950 I40E_MAX_CSR_SPACE);
13952 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
13953 if (!hw->hw_addr) {
13955 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
13956 (unsigned int)pci_resource_start(pdev, 0),
13957 pf->ioremap_len, err);
13960 hw->vendor_id = pdev->vendor;
13961 hw->device_id = pdev->device;
13962 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
13963 hw->subsystem_vendor_id = pdev->subsystem_vendor;
13964 hw->subsystem_device_id = pdev->subsystem_device;
13965 hw->bus.device = PCI_SLOT(pdev->devfn);
13966 hw->bus.func = PCI_FUNC(pdev->devfn);
13967 hw->bus.bus_id = pdev->bus->number;
13968 pf->instance = pfs_found;
13970 /* Select something other than the 802.1ad ethertype for the
13971 * switch to use internally and drop on ingress.
13973 hw->switch_tag = 0xffff;
13974 hw->first_tag = ETH_P_8021AD;
13975 hw->second_tag = ETH_P_8021Q;
13977 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
13978 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
13980 /* set up the locks for the AQ, do this only once in probe
13981 * and destroy them only once in remove
13983 mutex_init(&hw->aq.asq_mutex);
13984 mutex_init(&hw->aq.arq_mutex);
13986 pf->msg_enable = netif_msg_init(debug,
13991 pf->hw.debug_mask = debug;
13993 /* do a special CORER for clearing PXE mode once at init */
13994 if (hw->revision_id == 0 &&
13995 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
13996 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
14001 i40e_clear_pxe_mode(hw);
14004 /* Reset here to make sure all is clean and to define PF 'n' */
14006 err = i40e_pf_reset(hw);
14008 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
14013 hw->aq.num_arq_entries = I40E_AQ_LEN;
14014 hw->aq.num_asq_entries = I40E_AQ_LEN;
14015 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
14016 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
14017 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
14019 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
14021 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
14023 err = i40e_init_shared_code(hw);
14025 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
14030 /* set up a default setting for link flow control */
14031 pf->hw.fc.requested_mode = I40E_FC_NONE;
14033 err = i40e_init_adminq(hw);
14035 if (err == I40E_ERR_FIRMWARE_API_VERSION)
14036 dev_info(&pdev->dev,
14037 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
14039 dev_info(&pdev->dev,
14040 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
14044 i40e_get_oem_version(hw);
14046 /* provide nvm, fw, api versions */
14047 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
14048 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
14049 hw->aq.api_maj_ver, hw->aq.api_min_ver,
14050 i40e_nvm_version_str(hw));
14052 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
14053 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
14054 dev_info(&pdev->dev,
14055 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
14056 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
14057 dev_info(&pdev->dev,
14058 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
14060 i40e_verify_eeprom(pf);
14062 /* Rev 0 hardware was never productized */
14063 if (hw->revision_id < 1)
14064 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
14066 i40e_clear_pxe_mode(hw);
14067 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
14069 goto err_adminq_setup;
14071 err = i40e_sw_init(pf);
14073 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
14077 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
14078 hw->func_caps.num_rx_qp, 0, 0);
14080 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
14081 goto err_init_lan_hmc;
14084 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
14086 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
14088 goto err_configure_lan_hmc;
14091 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
14092 * Ignore error return codes because if it was already disabled via
14093 * hardware settings this will fail
14095 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
14096 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
14097 i40e_aq_stop_lldp(hw, true, NULL);
14100 /* allow a platform config to override the HW addr */
14101 i40e_get_platform_mac_addr(pdev, pf);
14103 if (!is_valid_ether_addr(hw->mac.addr)) {
14104 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
14108 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
14109 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
14110 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
14111 if (is_valid_ether_addr(hw->mac.port_addr))
14112 pf->hw_features |= I40E_HW_PORT_ID_VALID;
14114 pci_set_drvdata(pdev, pf);
14115 pci_save_state(pdev);
14117 /* Enable FW to write default DCB config on link-up */
14118 i40e_aq_set_dcb_parameters(hw, true, NULL);
14120 #ifdef CONFIG_I40E_DCB
14121 err = i40e_init_pf_dcb(pf);
14123 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
14124 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
14125 /* Continue without DCB enabled */
14127 #endif /* CONFIG_I40E_DCB */
14129 /* set up periodic task facility */
14130 timer_setup(&pf->service_timer, i40e_service_timer, 0);
14131 pf->service_timer_period = HZ;
14133 INIT_WORK(&pf->service_task, i40e_service_task);
14134 clear_bit(__I40E_SERVICE_SCHED, pf->state);
14136 /* NVM bit on means WoL disabled for the port */
14137 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
14138 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
14139 pf->wol_en = false;
14142 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
14144 /* set up the main switch operations */
14145 i40e_determine_queue_usage(pf);
14146 err = i40e_init_interrupt_scheme(pf);
14148 goto err_switch_setup;
14150 /* The number of VSIs reported by the FW is the minimum guaranteed
14151 * to us; HW supports far more and we share the remaining pool with
14152 * the other PFs. We allocate space for more than the guarantee with
14153 * the understanding that we might not get them all later.
14155 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
14156 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
14158 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
14160 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
14161 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
14165 goto err_switch_setup;
14168 #ifdef CONFIG_PCI_IOV
14169 /* prep for VF support */
14170 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14171 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
14172 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
14173 if (pci_num_vf(pdev))
14174 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
14177 err = i40e_setup_pf_switch(pf, false);
14179 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
14182 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
14184 /* Make sure flow control is set according to current settings */
14185 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
14186 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
14187 dev_dbg(&pf->pdev->dev,
14188 "Set fc with err %s aq_err %s on get_phy_cap\n",
14189 i40e_stat_str(hw, err),
14190 i40e_aq_str(hw, hw->aq.asq_last_status));
14191 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
14192 dev_dbg(&pf->pdev->dev,
14193 "Set fc with err %s aq_err %s on set_phy_config\n",
14194 i40e_stat_str(hw, err),
14195 i40e_aq_str(hw, hw->aq.asq_last_status));
14196 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
14197 dev_dbg(&pf->pdev->dev,
14198 "Set fc with err %s aq_err %s on get_link_info\n",
14199 i40e_stat_str(hw, err),
14200 i40e_aq_str(hw, hw->aq.asq_last_status));
14202 /* if FDIR VSI was set up, start it now */
14203 for (i = 0; i < pf->num_alloc_vsi; i++) {
14204 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
14205 i40e_vsi_open(pf->vsi[i]);
14210 /* The driver only wants link up/down and module qualification
14211 * reports from firmware. Note the negative logic.
14213 err = i40e_aq_set_phy_int_mask(&pf->hw,
14214 ~(I40E_AQ_EVENT_LINK_UPDOWN |
14215 I40E_AQ_EVENT_MEDIA_NA |
14216 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
14218 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
14219 i40e_stat_str(&pf->hw, err),
14220 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14222 /* Reconfigure hardware for allowing smaller MSS in the case
14223 * of TSO, so that we avoid the MDD being fired and causing
14224 * a reset in the case of small MSS+TSO.
14226 val = rd32(hw, I40E_REG_MSS);
14227 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
14228 val &= ~I40E_REG_MSS_MIN_MASK;
14229 val |= I40E_64BYTE_MSS;
14230 wr32(hw, I40E_REG_MSS, val);
14233 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
14235 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
14237 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
14238 i40e_stat_str(&pf->hw, err),
14239 i40e_aq_str(&pf->hw,
14240 pf->hw.aq.asq_last_status));
14242 /* The main driver is (mostly) up and happy. We need to set this state
14243 * before setting up the misc vector or we get a race and the vector
14244 * ends up disabled forever.
14246 clear_bit(__I40E_DOWN, pf->state);
14248 /* In case of MSIX we are going to setup the misc vector right here
14249 * to handle admin queue events etc. In case of legacy and MSI
14250 * the misc functionality and queue processing is combined in
14251 * the same vector and that gets setup at open.
14253 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
14254 err = i40e_setup_misc_vector(pf);
14256 dev_info(&pdev->dev,
14257 "setup of misc vector failed: %d\n", err);
14262 #ifdef CONFIG_PCI_IOV
14263 /* prep for VF support */
14264 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14265 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
14266 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
14267 /* disable link interrupts for VFs */
14268 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
14269 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
14270 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
14273 if (pci_num_vf(pdev)) {
14274 dev_info(&pdev->dev,
14275 "Active VFs found, allocating resources.\n");
14276 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
14278 dev_info(&pdev->dev,
14279 "Error %d allocating resources for existing VFs\n",
14283 #endif /* CONFIG_PCI_IOV */
14285 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
14286 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
14287 pf->num_iwarp_msix,
14288 I40E_IWARP_IRQ_PILE_ID);
14289 if (pf->iwarp_base_vector < 0) {
14290 dev_info(&pdev->dev,
14291 "failed to get tracking for %d vectors for IWARP err=%d\n",
14292 pf->num_iwarp_msix, pf->iwarp_base_vector);
14293 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
14297 i40e_dbg_pf_init(pf);
14299 /* tell the firmware that we're starting */
14300 i40e_send_version(pf);
14302 /* since everything's happy, start the service_task timer */
14303 mod_timer(&pf->service_timer,
14304 round_jiffies(jiffies + pf->service_timer_period));
14306 /* add this PF to client device list and launch a client service task */
14307 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
14308 err = i40e_lan_add_device(pf);
14310 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
14314 #define PCI_SPEED_SIZE 8
14315 #define PCI_WIDTH_SIZE 8
14316 /* Devices on the IOSF bus do not have this information
14317 * and will report PCI Gen 1 x 1 by default so don't bother
14320 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
14321 char speed[PCI_SPEED_SIZE] = "Unknown";
14322 char width[PCI_WIDTH_SIZE] = "Unknown";
14324 /* Get the negotiated link width and speed from PCI config
14327 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
14330 i40e_set_pci_config_data(hw, link_status);
14332 switch (hw->bus.speed) {
14333 case i40e_bus_speed_8000:
14334 strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
14335 case i40e_bus_speed_5000:
14336 strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
14337 case i40e_bus_speed_2500:
14338 strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
14342 switch (hw->bus.width) {
14343 case i40e_bus_width_pcie_x8:
14344 strlcpy(width, "8", PCI_WIDTH_SIZE); break;
14345 case i40e_bus_width_pcie_x4:
14346 strlcpy(width, "4", PCI_WIDTH_SIZE); break;
14347 case i40e_bus_width_pcie_x2:
14348 strlcpy(width, "2", PCI_WIDTH_SIZE); break;
14349 case i40e_bus_width_pcie_x1:
14350 strlcpy(width, "1", PCI_WIDTH_SIZE); break;
14355 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
14358 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
14359 hw->bus.speed < i40e_bus_speed_8000) {
14360 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
14361 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
14365 /* get the requested speeds from the fw */
14366 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
14368 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
14369 i40e_stat_str(&pf->hw, err),
14370 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14371 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
14373 /* get the supported phy types from the fw */
14374 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
14376 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
14377 i40e_stat_str(&pf->hw, err),
14378 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14380 /* Add a filter to drop all Flow control frames from any VSI from being
14381 * transmitted. By doing so we stop a malicious VF from sending out
14382 * PAUSE or PFC frames and potentially controlling traffic for other
14384 * The FW can still send Flow control frames if enabled.
14386 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
14387 pf->main_vsi_seid);
14389 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
14390 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
14391 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
14392 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
14393 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
14394 /* print a string summarizing features */
14395 i40e_print_features(pf);
14399 /* Unwind what we've done if something failed in the setup */
14401 set_bit(__I40E_DOWN, pf->state);
14402 i40e_clear_interrupt_scheme(pf);
14405 i40e_reset_interrupt_capability(pf);
14406 del_timer_sync(&pf->service_timer);
14408 err_configure_lan_hmc:
14409 (void)i40e_shutdown_lan_hmc(hw);
14411 kfree(pf->qp_pile);
14415 iounmap(hw->hw_addr);
14419 pci_disable_pcie_error_reporting(pdev);
14420 pci_release_mem_regions(pdev);
14423 pci_disable_device(pdev);
14428 * i40e_remove - Device removal routine
14429 * @pdev: PCI device information struct
14431 * i40e_remove is called by the PCI subsystem to alert the driver
14432 * that is should release a PCI device. This could be caused by a
14433 * Hot-Plug event, or because the driver is going to be removed from
14436 static void i40e_remove(struct pci_dev *pdev)
14438 struct i40e_pf *pf = pci_get_drvdata(pdev);
14439 struct i40e_hw *hw = &pf->hw;
14440 i40e_status ret_code;
14443 i40e_dbg_pf_exit(pf);
14447 /* Disable RSS in hw */
14448 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
14449 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
14451 /* no more scheduling of any task */
14452 set_bit(__I40E_SUSPENDED, pf->state);
14453 set_bit(__I40E_DOWN, pf->state);
14454 if (pf->service_timer.function)
14455 del_timer_sync(&pf->service_timer);
14456 if (pf->service_task.func)
14457 cancel_work_sync(&pf->service_task);
14459 /* Client close must be called explicitly here because the timer
14460 * has been stopped.
14462 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
14464 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
14466 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
14469 i40e_fdir_teardown(pf);
14471 /* If there is a switch structure or any orphans, remove them.
14472 * This will leave only the PF's VSI remaining.
14474 for (i = 0; i < I40E_MAX_VEB; i++) {
14478 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
14479 pf->veb[i]->uplink_seid == 0)
14480 i40e_switch_branch_release(pf->veb[i]);
14483 /* Now we can shutdown the PF's VSI, just before we kill
14486 if (pf->vsi[pf->lan_vsi])
14487 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
14489 i40e_cloud_filter_exit(pf);
14491 /* remove attached clients */
14492 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
14493 ret_code = i40e_lan_del_device(pf);
14495 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
14499 /* shutdown and destroy the HMC */
14500 if (hw->hmc.hmc_obj) {
14501 ret_code = i40e_shutdown_lan_hmc(hw);
14503 dev_warn(&pdev->dev,
14504 "Failed to destroy the HMC resources: %d\n",
14508 /* shutdown the adminq */
14509 i40e_shutdown_adminq(hw);
14511 /* destroy the locks only once, here */
14512 mutex_destroy(&hw->aq.arq_mutex);
14513 mutex_destroy(&hw->aq.asq_mutex);
14515 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
14517 i40e_clear_interrupt_scheme(pf);
14518 for (i = 0; i < pf->num_alloc_vsi; i++) {
14520 i40e_vsi_clear_rings(pf->vsi[i]);
14521 i40e_vsi_clear(pf->vsi[i]);
14527 for (i = 0; i < I40E_MAX_VEB; i++) {
14532 kfree(pf->qp_pile);
14535 iounmap(hw->hw_addr);
14537 pci_release_mem_regions(pdev);
14539 pci_disable_pcie_error_reporting(pdev);
14540 pci_disable_device(pdev);
14544 * i40e_pci_error_detected - warning that something funky happened in PCI land
14545 * @pdev: PCI device information struct
14546 * @error: the type of PCI error
14548 * Called to warn that something happened and the error handling steps
14549 * are in progress. Allows the driver to quiesce things, be ready for
14552 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
14553 enum pci_channel_state error)
14555 struct i40e_pf *pf = pci_get_drvdata(pdev);
14557 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
14560 dev_info(&pdev->dev,
14561 "Cannot recover - error happened during device probe\n");
14562 return PCI_ERS_RESULT_DISCONNECT;
14565 /* shutdown all operations */
14566 if (!test_bit(__I40E_SUSPENDED, pf->state))
14567 i40e_prep_for_reset(pf, false);
14569 /* Request a slot reset */
14570 return PCI_ERS_RESULT_NEED_RESET;
14574 * i40e_pci_error_slot_reset - a PCI slot reset just happened
14575 * @pdev: PCI device information struct
14577 * Called to find if the driver can work with the device now that
14578 * the pci slot has been reset. If a basic connection seems good
14579 * (registers are readable and have sane content) then return a
14580 * happy little PCI_ERS_RESULT_xxx.
14582 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
14584 struct i40e_pf *pf = pci_get_drvdata(pdev);
14585 pci_ers_result_t result;
14588 dev_dbg(&pdev->dev, "%s\n", __func__);
14589 if (pci_enable_device_mem(pdev)) {
14590 dev_info(&pdev->dev,
14591 "Cannot re-enable PCI device after reset.\n");
14592 result = PCI_ERS_RESULT_DISCONNECT;
14594 pci_set_master(pdev);
14595 pci_restore_state(pdev);
14596 pci_save_state(pdev);
14597 pci_wake_from_d3(pdev, false);
14599 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
14601 result = PCI_ERS_RESULT_RECOVERED;
14603 result = PCI_ERS_RESULT_DISCONNECT;
14610 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
14611 * @pdev: PCI device information struct
14613 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
14615 struct i40e_pf *pf = pci_get_drvdata(pdev);
14617 i40e_prep_for_reset(pf, false);
14621 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
14622 * @pdev: PCI device information struct
14624 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
14626 struct i40e_pf *pf = pci_get_drvdata(pdev);
14628 i40e_reset_and_rebuild(pf, false, false);
14632 * i40e_pci_error_resume - restart operations after PCI error recovery
14633 * @pdev: PCI device information struct
14635 * Called to allow the driver to bring things back up after PCI error
14636 * and/or reset recovery has finished.
14638 static void i40e_pci_error_resume(struct pci_dev *pdev)
14640 struct i40e_pf *pf = pci_get_drvdata(pdev);
14642 dev_dbg(&pdev->dev, "%s\n", __func__);
14643 if (test_bit(__I40E_SUSPENDED, pf->state))
14646 i40e_handle_reset_warning(pf, false);
14650 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
14651 * using the mac_address_write admin q function
14652 * @pf: pointer to i40e_pf struct
14654 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
14656 struct i40e_hw *hw = &pf->hw;
14661 /* Get current MAC address in case it's an LAA */
14662 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
14663 ether_addr_copy(mac_addr,
14664 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
14666 dev_err(&pf->pdev->dev,
14667 "Failed to retrieve MAC address; using default\n");
14668 ether_addr_copy(mac_addr, hw->mac.addr);
14671 /* The FW expects the mac address write cmd to first be called with
14672 * one of these flags before calling it again with the multicast
14675 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
14677 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
14678 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
14680 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
14682 dev_err(&pf->pdev->dev,
14683 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
14687 flags = I40E_AQC_MC_MAG_EN
14688 | I40E_AQC_WOL_PRESERVE_ON_PFR
14689 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
14690 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
14692 dev_err(&pf->pdev->dev,
14693 "Failed to enable Multicast Magic Packet wake up\n");
14697 * i40e_shutdown - PCI callback for shutting down
14698 * @pdev: PCI device information struct
14700 static void i40e_shutdown(struct pci_dev *pdev)
14702 struct i40e_pf *pf = pci_get_drvdata(pdev);
14703 struct i40e_hw *hw = &pf->hw;
14705 set_bit(__I40E_SUSPENDED, pf->state);
14706 set_bit(__I40E_DOWN, pf->state);
14708 del_timer_sync(&pf->service_timer);
14709 cancel_work_sync(&pf->service_task);
14710 i40e_cloud_filter_exit(pf);
14711 i40e_fdir_teardown(pf);
14713 /* Client close must be called explicitly here because the timer
14714 * has been stopped.
14716 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
14718 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
14719 i40e_enable_mc_magic_wake(pf);
14721 i40e_prep_for_reset(pf, false);
14723 wr32(hw, I40E_PFPM_APM,
14724 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
14725 wr32(hw, I40E_PFPM_WUFC,
14726 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
14728 /* Since we're going to destroy queues during the
14729 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
14733 i40e_clear_interrupt_scheme(pf);
14736 if (system_state == SYSTEM_POWER_OFF) {
14737 pci_wake_from_d3(pdev, pf->wol_en);
14738 pci_set_power_state(pdev, PCI_D3hot);
14743 * i40e_suspend - PM callback for moving to D3
14744 * @dev: generic device information structure
14746 static int __maybe_unused i40e_suspend(struct device *dev)
14748 struct pci_dev *pdev = to_pci_dev(dev);
14749 struct i40e_pf *pf = pci_get_drvdata(pdev);
14750 struct i40e_hw *hw = &pf->hw;
14752 /* If we're already suspended, then there is nothing to do */
14753 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
14756 set_bit(__I40E_DOWN, pf->state);
14758 /* Ensure service task will not be running */
14759 del_timer_sync(&pf->service_timer);
14760 cancel_work_sync(&pf->service_task);
14762 /* Client close must be called explicitly here because the timer
14763 * has been stopped.
14765 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
14767 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
14768 i40e_enable_mc_magic_wake(pf);
14770 /* Since we're going to destroy queues during the
14771 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
14776 i40e_prep_for_reset(pf, true);
14778 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
14779 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
14781 /* Clear the interrupt scheme and release our IRQs so that the system
14782 * can safely hibernate even when there are a large number of CPUs.
14783 * Otherwise hibernation might fail when mapping all the vectors back
14786 i40e_clear_interrupt_scheme(pf);
14794 * i40e_resume - PM callback for waking up from D3
14795 * @dev: generic device information structure
14797 static int __maybe_unused i40e_resume(struct device *dev)
14799 struct pci_dev *pdev = to_pci_dev(dev);
14800 struct i40e_pf *pf = pci_get_drvdata(pdev);
14803 /* If we're not suspended, then there is nothing to do */
14804 if (!test_bit(__I40E_SUSPENDED, pf->state))
14807 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
14808 * since we're going to be restoring queues
14812 /* We cleared the interrupt scheme when we suspended, so we need to
14813 * restore it now to resume device functionality.
14815 err = i40e_restore_interrupt_scheme(pf);
14817 dev_err(&pdev->dev, "Cannot restore interrupt scheme: %d\n",
14821 clear_bit(__I40E_DOWN, pf->state);
14822 i40e_reset_and_rebuild(pf, false, true);
14826 /* Clear suspended state last after everything is recovered */
14827 clear_bit(__I40E_SUSPENDED, pf->state);
14829 /* Restart the service task */
14830 mod_timer(&pf->service_timer,
14831 round_jiffies(jiffies + pf->service_timer_period));
14836 static const struct pci_error_handlers i40e_err_handler = {
14837 .error_detected = i40e_pci_error_detected,
14838 .slot_reset = i40e_pci_error_slot_reset,
14839 .reset_prepare = i40e_pci_error_reset_prepare,
14840 .reset_done = i40e_pci_error_reset_done,
14841 .resume = i40e_pci_error_resume,
14844 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
14846 static struct pci_driver i40e_driver = {
14847 .name = i40e_driver_name,
14848 .id_table = i40e_pci_tbl,
14849 .probe = i40e_probe,
14850 .remove = i40e_remove,
14852 .pm = &i40e_pm_ops,
14854 .shutdown = i40e_shutdown,
14855 .err_handler = &i40e_err_handler,
14856 .sriov_configure = i40e_pci_sriov_configure,
14860 * i40e_init_module - Driver registration routine
14862 * i40e_init_module is the first routine called when the driver is
14863 * loaded. All it does is register with the PCI subsystem.
14865 static int __init i40e_init_module(void)
14867 pr_info("%s: %s - version %s\n", i40e_driver_name,
14868 i40e_driver_string, i40e_driver_version_str);
14869 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
14871 /* There is no need to throttle the number of active tasks because
14872 * each device limits its own task using a state bit for scheduling
14873 * the service task, and the device tasks do not interfere with each
14874 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
14875 * since we need to be able to guarantee forward progress even under
14878 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
14880 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
14885 return pci_register_driver(&i40e_driver);
14887 module_init(i40e_init_module);
14890 * i40e_exit_module - Driver exit cleanup routine
14892 * i40e_exit_module is called just before the driver is removed
14895 static void __exit i40e_exit_module(void)
14897 pci_unregister_driver(&i40e_driver);
14898 destroy_workqueue(i40e_wq);
14901 module_exit(i40e_exit_module);