1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 2
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
59 u16 rss_table_size, u16 rss_size);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 /* required last entry */
90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
92 #define I40E_MAX_VF_COUNT 128
93 static int debug = -1;
94 module_param(debug, int, 0);
95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
99 MODULE_LICENSE("GPL");
100 MODULE_VERSION(DRV_VERSION);
103 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
104 * @hw: pointer to the HW structure
105 * @mem: ptr to mem struct to fill out
106 * @size: size of memory requested
107 * @alignment: what to align the allocation to
109 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
110 u64 size, u32 alignment)
112 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
114 mem->size = ALIGN(size, alignment);
115 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
116 &mem->pa, GFP_KERNEL);
124 * i40e_free_dma_mem_d - OS specific memory free for shared code
125 * @hw: pointer to the HW structure
126 * @mem: ptr to mem struct to free
128 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
130 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
132 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
141 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
142 * @hw: pointer to the HW structure
143 * @mem: ptr to mem struct to fill out
144 * @size: size of memory requested
146 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
150 mem->va = kzalloc(size, GFP_KERNEL);
159 * i40e_free_virt_mem_d - OS specific memory free for shared code
160 * @hw: pointer to the HW structure
161 * @mem: ptr to mem struct to free
163 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
165 /* it's ok to kfree a NULL pointer */
174 * i40e_get_lump - find a lump of free generic resource
175 * @pf: board private structure
176 * @pile: the pile of resource to search
177 * @needed: the number of items needed
178 * @id: an owner id to stick on the items assigned
180 * Returns the base item index of the lump, or negative for error
182 * The search_hint trick and lack of advanced fit-finding only work
183 * because we're highly likely to have all the same size lump requests.
184 * Linear search time and any fragmentation should be minimal.
186 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
192 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
193 dev_info(&pf->pdev->dev,
194 "param err: pile=%p needed=%d id=0x%04x\n",
199 /* start the linear search with an imperfect hint */
200 i = pile->search_hint;
201 while (i < pile->num_entries) {
202 /* skip already allocated entries */
203 if (pile->list[i] & I40E_PILE_VALID_BIT) {
208 /* do we have enough in this lump? */
209 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
210 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
215 /* there was enough, so assign it to the requestor */
216 for (j = 0; j < needed; j++)
217 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
219 pile->search_hint = i + j;
223 /* not enough, so skip over it and continue looking */
231 * i40e_put_lump - return a lump of generic resource
232 * @pile: the pile of resource to search
233 * @index: the base item index
234 * @id: the owner id of the items assigned
236 * Returns the count of items in the lump
238 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
240 int valid_id = (id | I40E_PILE_VALID_BIT);
244 if (!pile || index >= pile->num_entries)
248 i < pile->num_entries && pile->list[i] == valid_id;
254 if (count && index < pile->search_hint)
255 pile->search_hint = index;
261 * i40e_find_vsi_from_id - searches for the vsi with the given id
262 * @pf - the pf structure to search for the vsi
263 * @id - id of the vsi it is searching for
265 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
269 for (i = 0; i < pf->num_alloc_vsi; i++)
270 if (pf->vsi[i] && (pf->vsi[i]->id == id))
277 * i40e_service_event_schedule - Schedule the service task to wake up
278 * @pf: board private structure
280 * If not already scheduled, this puts the task into the work queue
282 static void i40e_service_event_schedule(struct i40e_pf *pf)
284 if (!test_bit(__I40E_DOWN, &pf->state) &&
285 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
286 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
287 schedule_work(&pf->service_task);
291 * i40e_tx_timeout - Respond to a Tx Hang
292 * @netdev: network interface device structure
294 * If any port has noticed a Tx timeout, it is likely that the whole
295 * device is munged, not just the one netdev port, so go for the full
299 void i40e_tx_timeout(struct net_device *netdev)
301 static void i40e_tx_timeout(struct net_device *netdev)
304 struct i40e_netdev_priv *np = netdev_priv(netdev);
305 struct i40e_vsi *vsi = np->vsi;
306 struct i40e_pf *pf = vsi->back;
307 struct i40e_ring *tx_ring = NULL;
308 unsigned int i, hung_queue = 0;
311 pf->tx_timeout_count++;
313 /* find the stopped queue the same way the stack does */
314 for (i = 0; i < netdev->num_tx_queues; i++) {
315 struct netdev_queue *q;
316 unsigned long trans_start;
318 q = netdev_get_tx_queue(netdev, i);
319 trans_start = q->trans_start ? : netdev->trans_start;
320 if (netif_xmit_stopped(q) &&
322 (trans_start + netdev->watchdog_timeo))) {
328 if (i == netdev->num_tx_queues) {
329 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
331 /* now that we have an index, find the tx_ring struct */
332 for (i = 0; i < vsi->num_queue_pairs; i++) {
333 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
335 vsi->tx_rings[i]->queue_index) {
336 tx_ring = vsi->tx_rings[i];
343 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
344 pf->tx_timeout_recovery_level = 1; /* reset after some time */
345 else if (time_before(jiffies,
346 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
347 return; /* don't do any new action before the next timeout */
350 head = i40e_get_head(tx_ring);
351 /* Read interrupt register */
352 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
354 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
355 tx_ring->vsi->base_vector - 1));
357 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
359 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
360 vsi->seid, hung_queue, tx_ring->next_to_clean,
361 head, tx_ring->next_to_use,
362 readl(tx_ring->tail), val);
365 pf->tx_timeout_last_recovery = jiffies;
366 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
367 pf->tx_timeout_recovery_level, hung_queue);
369 switch (pf->tx_timeout_recovery_level) {
371 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
374 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
377 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
380 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
384 i40e_service_event_schedule(pf);
385 pf->tx_timeout_recovery_level++;
389 * i40e_release_rx_desc - Store the new tail and head values
390 * @rx_ring: ring to bump
391 * @val: new head index
393 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
395 rx_ring->next_to_use = val;
397 /* Force memory writes to complete before letting h/w
398 * know there are new descriptors to fetch. (Only
399 * applicable for weak-ordered memory model archs,
403 writel(val, rx_ring->tail);
407 * i40e_get_vsi_stats_struct - Get System Network Statistics
408 * @vsi: the VSI we care about
410 * Returns the address of the device statistics structure.
411 * The statistics are actually updated from the service task.
413 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
415 return &vsi->net_stats;
419 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
420 * @netdev: network interface device structure
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
426 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
427 struct net_device *netdev,
428 struct rtnl_link_stats64 *stats)
430 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
431 struct net_device *netdev,
432 struct rtnl_link_stats64 *stats)
435 struct i40e_netdev_priv *np = netdev_priv(netdev);
436 struct i40e_ring *tx_ring, *rx_ring;
437 struct i40e_vsi *vsi = np->vsi;
438 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
441 if (test_bit(__I40E_DOWN, &vsi->state))
448 for (i = 0; i < vsi->num_queue_pairs; i++) {
452 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
457 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
458 packets = tx_ring->stats.packets;
459 bytes = tx_ring->stats.bytes;
460 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
462 stats->tx_packets += packets;
463 stats->tx_bytes += bytes;
464 rx_ring = &tx_ring[1];
467 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
468 packets = rx_ring->stats.packets;
469 bytes = rx_ring->stats.bytes;
470 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
472 stats->rx_packets += packets;
473 stats->rx_bytes += bytes;
477 /* following stats updated by i40e_watchdog_subtask() */
478 stats->multicast = vsi_stats->multicast;
479 stats->tx_errors = vsi_stats->tx_errors;
480 stats->tx_dropped = vsi_stats->tx_dropped;
481 stats->rx_errors = vsi_stats->rx_errors;
482 stats->rx_dropped = vsi_stats->rx_dropped;
483 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
484 stats->rx_length_errors = vsi_stats->rx_length_errors;
490 * i40e_vsi_reset_stats - Resets all stats of the given vsi
491 * @vsi: the VSI to have its stats reset
493 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
495 struct rtnl_link_stats64 *ns;
501 ns = i40e_get_vsi_stats_struct(vsi);
502 memset(ns, 0, sizeof(*ns));
503 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
504 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
505 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
506 if (vsi->rx_rings && vsi->rx_rings[0]) {
507 for (i = 0; i < vsi->num_queue_pairs; i++) {
508 memset(&vsi->rx_rings[i]->stats, 0,
509 sizeof(vsi->rx_rings[i]->stats));
510 memset(&vsi->rx_rings[i]->rx_stats, 0,
511 sizeof(vsi->rx_rings[i]->rx_stats));
512 memset(&vsi->tx_rings[i]->stats, 0,
513 sizeof(vsi->tx_rings[i]->stats));
514 memset(&vsi->tx_rings[i]->tx_stats, 0,
515 sizeof(vsi->tx_rings[i]->tx_stats));
518 vsi->stat_offsets_loaded = false;
522 * i40e_pf_reset_stats - Reset all of the stats for the given PF
523 * @pf: the PF to be reset
525 void i40e_pf_reset_stats(struct i40e_pf *pf)
529 memset(&pf->stats, 0, sizeof(pf->stats));
530 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
531 pf->stat_offsets_loaded = false;
533 for (i = 0; i < I40E_MAX_VEB; i++) {
535 memset(&pf->veb[i]->stats, 0,
536 sizeof(pf->veb[i]->stats));
537 memset(&pf->veb[i]->stats_offsets, 0,
538 sizeof(pf->veb[i]->stats_offsets));
539 pf->veb[i]->stat_offsets_loaded = false;
545 * i40e_stat_update48 - read and update a 48 bit stat from the chip
546 * @hw: ptr to the hardware info
547 * @hireg: the high 32 bit reg to read
548 * @loreg: the low 32 bit reg to read
549 * @offset_loaded: has the initial offset been loaded yet
550 * @offset: ptr to current offset value
551 * @stat: ptr to the stat
553 * Since the device stats are not reset at PFReset, they likely will not
554 * be zeroed when the driver starts. We'll save the first values read
555 * and use them as offsets to be subtracted from the raw values in order
556 * to report stats that count from zero. In the process, we also manage
557 * the potential roll-over.
559 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
560 bool offset_loaded, u64 *offset, u64 *stat)
564 if (hw->device_id == I40E_DEV_ID_QEMU) {
565 new_data = rd32(hw, loreg);
566 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
568 new_data = rd64(hw, loreg);
572 if (likely(new_data >= *offset))
573 *stat = new_data - *offset;
575 *stat = (new_data + BIT_ULL(48)) - *offset;
576 *stat &= 0xFFFFFFFFFFFFULL;
580 * i40e_stat_update32 - read and update a 32 bit stat from the chip
581 * @hw: ptr to the hardware info
582 * @reg: the hw reg to read
583 * @offset_loaded: has the initial offset been loaded yet
584 * @offset: ptr to current offset value
585 * @stat: ptr to the stat
587 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
588 bool offset_loaded, u64 *offset, u64 *stat)
592 new_data = rd32(hw, reg);
595 if (likely(new_data >= *offset))
596 *stat = (u32)(new_data - *offset);
598 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
602 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
603 * @vsi: the VSI to be updated
605 void i40e_update_eth_stats(struct i40e_vsi *vsi)
607 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
608 struct i40e_pf *pf = vsi->back;
609 struct i40e_hw *hw = &pf->hw;
610 struct i40e_eth_stats *oes;
611 struct i40e_eth_stats *es; /* device's eth stats */
613 es = &vsi->eth_stats;
614 oes = &vsi->eth_stats_offsets;
616 /* Gather up the stats that the hw collects */
617 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->tx_errors, &es->tx_errors);
620 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_discards, &es->rx_discards);
623 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
626 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->tx_errors, &es->tx_errors);
630 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
631 I40E_GLV_GORCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_bytes, &es->rx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
635 I40E_GLV_UPRCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_unicast, &es->rx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
639 I40E_GLV_MPRCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->rx_multicast, &es->rx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
643 I40E_GLV_BPRCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->rx_broadcast, &es->rx_broadcast);
647 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
648 I40E_GLV_GOTCL(stat_idx),
649 vsi->stat_offsets_loaded,
650 &oes->tx_bytes, &es->tx_bytes);
651 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
652 I40E_GLV_UPTCL(stat_idx),
653 vsi->stat_offsets_loaded,
654 &oes->tx_unicast, &es->tx_unicast);
655 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
656 I40E_GLV_MPTCL(stat_idx),
657 vsi->stat_offsets_loaded,
658 &oes->tx_multicast, &es->tx_multicast);
659 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
660 I40E_GLV_BPTCL(stat_idx),
661 vsi->stat_offsets_loaded,
662 &oes->tx_broadcast, &es->tx_broadcast);
663 vsi->stat_offsets_loaded = true;
667 * i40e_update_veb_stats - Update Switch component statistics
668 * @veb: the VEB being updated
670 static void i40e_update_veb_stats(struct i40e_veb *veb)
672 struct i40e_pf *pf = veb->pf;
673 struct i40e_hw *hw = &pf->hw;
674 struct i40e_eth_stats *oes;
675 struct i40e_eth_stats *es; /* device's eth stats */
676 struct i40e_veb_tc_stats *veb_oes;
677 struct i40e_veb_tc_stats *veb_es;
680 idx = veb->stats_idx;
682 oes = &veb->stats_offsets;
683 veb_es = &veb->tc_stats;
684 veb_oes = &veb->tc_stats_offsets;
686 /* Gather up the stats that the hw collects */
687 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
688 veb->stat_offsets_loaded,
689 &oes->tx_discards, &es->tx_discards);
690 if (hw->revision_id > 0)
691 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_unknown_protocol,
694 &es->rx_unknown_protocol);
695 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_bytes, &es->rx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_unicast, &es->rx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_multicast, &es->rx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->rx_broadcast, &es->rx_broadcast);
708 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_bytes, &es->tx_bytes);
711 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_unicast, &es->tx_unicast);
714 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_multicast, &es->tx_multicast);
717 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
718 veb->stat_offsets_loaded,
719 &oes->tx_broadcast, &es->tx_broadcast);
720 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
721 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
722 I40E_GLVEBTC_RPCL(i, idx),
723 veb->stat_offsets_loaded,
724 &veb_oes->tc_rx_packets[i],
725 &veb_es->tc_rx_packets[i]);
726 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
727 I40E_GLVEBTC_RBCL(i, idx),
728 veb->stat_offsets_loaded,
729 &veb_oes->tc_rx_bytes[i],
730 &veb_es->tc_rx_bytes[i]);
731 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
732 I40E_GLVEBTC_TPCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_tx_packets[i],
735 &veb_es->tc_tx_packets[i]);
736 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
737 I40E_GLVEBTC_TBCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_tx_bytes[i],
740 &veb_es->tc_tx_bytes[i]);
742 veb->stat_offsets_loaded = true;
747 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
748 * @vsi: the VSI that is capable of doing FCoE
750 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
752 struct i40e_pf *pf = vsi->back;
753 struct i40e_hw *hw = &pf->hw;
754 struct i40e_fcoe_stats *ofs;
755 struct i40e_fcoe_stats *fs; /* device's eth stats */
758 if (vsi->type != I40E_VSI_FCOE)
761 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
762 fs = &vsi->fcoe_stats;
763 ofs = &vsi->fcoe_stats_offsets;
765 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
768 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
771 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
774 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
777 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
780 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
783 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->fcoe_last_error, &fs->fcoe_last_error);
786 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
790 vsi->fcoe_stat_offsets_loaded = true;
795 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
796 * @pf: the corresponding PF
798 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
800 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
802 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
803 struct i40e_hw_port_stats *nsd = &pf->stats;
804 struct i40e_hw *hw = &pf->hw;
807 if ((hw->fc.current_mode != I40E_FC_FULL) &&
808 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
811 xoff = nsd->link_xoff_rx;
812 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
813 pf->stat_offsets_loaded,
814 &osd->link_xoff_rx, &nsd->link_xoff_rx);
816 /* No new LFC xoff rx */
817 if (!(nsd->link_xoff_rx - xoff))
823 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
824 * @pf: the corresponding PF
826 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
828 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
830 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
831 struct i40e_hw_port_stats *nsd = &pf->stats;
832 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
833 struct i40e_dcbx_config *dcb_cfg;
834 struct i40e_hw *hw = &pf->hw;
838 dcb_cfg = &hw->local_dcbx_config;
840 /* Collect Link XOFF stats when PFC is disabled */
841 if (!dcb_cfg->pfc.pfcenable) {
842 i40e_update_link_xoff_rx(pf);
846 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
847 u64 prio_xoff = nsd->priority_xoff_rx[i];
849 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
850 pf->stat_offsets_loaded,
851 &osd->priority_xoff_rx[i],
852 &nsd->priority_xoff_rx[i]);
854 /* No new PFC xoff rx */
855 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
857 /* Get the TC for given priority */
858 tc = dcb_cfg->etscfg.prioritytable[i];
864 * i40e_update_vsi_stats - Update the vsi statistics counters.
865 * @vsi: the VSI to be updated
867 * There are a few instances where we store the same stat in a
868 * couple of different structs. This is partly because we have
869 * the netdev stats that need to be filled out, which is slightly
870 * different from the "eth_stats" defined by the chip and used in
871 * VF communications. We sort it out here.
873 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
875 struct i40e_pf *pf = vsi->back;
876 struct rtnl_link_stats64 *ons;
877 struct rtnl_link_stats64 *ns; /* netdev stats */
878 struct i40e_eth_stats *oes;
879 struct i40e_eth_stats *es; /* device's eth stats */
880 u32 tx_restart, tx_busy;
891 if (test_bit(__I40E_DOWN, &vsi->state) ||
892 test_bit(__I40E_CONFIG_BUSY, &pf->state))
895 ns = i40e_get_vsi_stats_struct(vsi);
896 ons = &vsi->net_stats_offsets;
897 es = &vsi->eth_stats;
898 oes = &vsi->eth_stats_offsets;
900 /* Gather up the netdev and vsi stats that the driver collects
901 * on the fly during packet processing
905 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
909 for (q = 0; q < vsi->num_queue_pairs; q++) {
911 p = ACCESS_ONCE(vsi->tx_rings[q]);
914 start = u64_stats_fetch_begin_irq(&p->syncp);
915 packets = p->stats.packets;
916 bytes = p->stats.bytes;
917 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
920 tx_restart += p->tx_stats.restart_queue;
921 tx_busy += p->tx_stats.tx_busy;
922 tx_linearize += p->tx_stats.tx_linearize;
923 tx_force_wb += p->tx_stats.tx_force_wb;
925 /* Rx queue is part of the same block as Tx queue */
928 start = u64_stats_fetch_begin_irq(&p->syncp);
929 packets = p->stats.packets;
930 bytes = p->stats.bytes;
931 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
934 rx_buf += p->rx_stats.alloc_buff_failed;
935 rx_page += p->rx_stats.alloc_page_failed;
938 vsi->tx_restart = tx_restart;
939 vsi->tx_busy = tx_busy;
940 vsi->tx_linearize = tx_linearize;
941 vsi->tx_force_wb = tx_force_wb;
942 vsi->rx_page_failed = rx_page;
943 vsi->rx_buf_failed = rx_buf;
945 ns->rx_packets = rx_p;
947 ns->tx_packets = tx_p;
950 /* update netdev stats from eth stats */
951 i40e_update_eth_stats(vsi);
952 ons->tx_errors = oes->tx_errors;
953 ns->tx_errors = es->tx_errors;
954 ons->multicast = oes->rx_multicast;
955 ns->multicast = es->rx_multicast;
956 ons->rx_dropped = oes->rx_discards;
957 ns->rx_dropped = es->rx_discards;
958 ons->tx_dropped = oes->tx_discards;
959 ns->tx_dropped = es->tx_discards;
961 /* pull in a couple PF stats if this is the main vsi */
962 if (vsi == pf->vsi[pf->lan_vsi]) {
963 ns->rx_crc_errors = pf->stats.crc_errors;
964 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
965 ns->rx_length_errors = pf->stats.rx_length_errors;
970 * i40e_update_pf_stats - Update the PF statistics counters.
971 * @pf: the PF to be updated
973 static void i40e_update_pf_stats(struct i40e_pf *pf)
975 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
976 struct i40e_hw_port_stats *nsd = &pf->stats;
977 struct i40e_hw *hw = &pf->hw;
981 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
982 I40E_GLPRT_GORCL(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
985 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
986 I40E_GLPRT_GOTCL(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
989 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_discards,
992 &nsd->eth.rx_discards);
993 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
994 I40E_GLPRT_UPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_unicast,
997 &nsd->eth.rx_unicast);
998 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
999 I40E_GLPRT_MPRCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.rx_multicast,
1002 &nsd->eth.rx_multicast);
1003 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1004 I40E_GLPRT_BPRCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.rx_broadcast,
1007 &nsd->eth.rx_broadcast);
1008 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1009 I40E_GLPRT_UPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_unicast,
1012 &nsd->eth.tx_unicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1014 I40E_GLPRT_MPTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_multicast,
1017 &nsd->eth.tx_multicast);
1018 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1019 I40E_GLPRT_BPTCL(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->eth.tx_broadcast,
1022 &nsd->eth.tx_broadcast);
1024 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->tx_dropped_link_down,
1027 &nsd->tx_dropped_link_down);
1029 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->crc_errors, &nsd->crc_errors);
1033 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->illegal_bytes, &nsd->illegal_bytes);
1037 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->mac_local_faults,
1040 &nsd->mac_local_faults);
1041 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->mac_remote_faults,
1044 &nsd->mac_remote_faults);
1046 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->rx_length_errors,
1049 &nsd->rx_length_errors);
1051 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->link_xon_rx, &nsd->link_xon_rx);
1054 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->link_xon_tx, &nsd->link_xon_tx);
1057 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1058 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1062 for (i = 0; i < 8; i++) {
1063 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1064 pf->stat_offsets_loaded,
1065 &osd->priority_xon_rx[i],
1066 &nsd->priority_xon_rx[i]);
1067 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1068 pf->stat_offsets_loaded,
1069 &osd->priority_xon_tx[i],
1070 &nsd->priority_xon_tx[i]);
1071 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1072 pf->stat_offsets_loaded,
1073 &osd->priority_xoff_tx[i],
1074 &nsd->priority_xoff_tx[i]);
1075 i40e_stat_update32(hw,
1076 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1077 pf->stat_offsets_loaded,
1078 &osd->priority_xon_2_xoff[i],
1079 &nsd->priority_xon_2_xoff[i]);
1082 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1083 I40E_GLPRT_PRC64L(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_size_64, &nsd->rx_size_64);
1086 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1087 I40E_GLPRT_PRC127L(hw->port),
1088 pf->stat_offsets_loaded,
1089 &osd->rx_size_127, &nsd->rx_size_127);
1090 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1091 I40E_GLPRT_PRC255L(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_size_255, &nsd->rx_size_255);
1094 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1095 I40E_GLPRT_PRC511L(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->rx_size_511, &nsd->rx_size_511);
1098 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1099 I40E_GLPRT_PRC1023L(hw->port),
1100 pf->stat_offsets_loaded,
1101 &osd->rx_size_1023, &nsd->rx_size_1023);
1102 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1103 I40E_GLPRT_PRC1522L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->rx_size_1522, &nsd->rx_size_1522);
1106 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1107 I40E_GLPRT_PRC9522L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->rx_size_big, &nsd->rx_size_big);
1111 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1112 I40E_GLPRT_PTC64L(hw->port),
1113 pf->stat_offsets_loaded,
1114 &osd->tx_size_64, &nsd->tx_size_64);
1115 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1116 I40E_GLPRT_PTC127L(hw->port),
1117 pf->stat_offsets_loaded,
1118 &osd->tx_size_127, &nsd->tx_size_127);
1119 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1120 I40E_GLPRT_PTC255L(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->tx_size_255, &nsd->tx_size_255);
1123 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1124 I40E_GLPRT_PTC511L(hw->port),
1125 pf->stat_offsets_loaded,
1126 &osd->tx_size_511, &nsd->tx_size_511);
1127 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1128 I40E_GLPRT_PTC1023L(hw->port),
1129 pf->stat_offsets_loaded,
1130 &osd->tx_size_1023, &nsd->tx_size_1023);
1131 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1132 I40E_GLPRT_PTC1522L(hw->port),
1133 pf->stat_offsets_loaded,
1134 &osd->tx_size_1522, &nsd->tx_size_1522);
1135 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1136 I40E_GLPRT_PTC9522L(hw->port),
1137 pf->stat_offsets_loaded,
1138 &osd->tx_size_big, &nsd->tx_size_big);
1140 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_undersize, &nsd->rx_undersize);
1143 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_fragments, &nsd->rx_fragments);
1146 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1147 pf->stat_offsets_loaded,
1148 &osd->rx_oversize, &nsd->rx_oversize);
1149 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1150 pf->stat_offsets_loaded,
1151 &osd->rx_jabber, &nsd->rx_jabber);
1154 i40e_stat_update32(hw,
1155 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1156 pf->stat_offsets_loaded,
1157 &osd->fd_atr_match, &nsd->fd_atr_match);
1158 i40e_stat_update32(hw,
1159 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1160 pf->stat_offsets_loaded,
1161 &osd->fd_sb_match, &nsd->fd_sb_match);
1162 i40e_stat_update32(hw,
1163 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1164 pf->stat_offsets_loaded,
1165 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1167 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1168 nsd->tx_lpi_status =
1169 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1170 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1171 nsd->rx_lpi_status =
1172 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1173 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1174 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1175 pf->stat_offsets_loaded,
1176 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1177 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1178 pf->stat_offsets_loaded,
1179 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1181 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1182 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1183 nsd->fd_sb_status = true;
1185 nsd->fd_sb_status = false;
1187 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1188 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1189 nsd->fd_atr_status = true;
1191 nsd->fd_atr_status = false;
1193 pf->stat_offsets_loaded = true;
1197 * i40e_update_stats - Update the various statistics counters.
1198 * @vsi: the VSI to be updated
1200 * Update the various stats for this VSI and its related entities.
1202 void i40e_update_stats(struct i40e_vsi *vsi)
1204 struct i40e_pf *pf = vsi->back;
1206 if (vsi == pf->vsi[pf->lan_vsi])
1207 i40e_update_pf_stats(pf);
1209 i40e_update_vsi_stats(vsi);
1211 i40e_update_fcoe_stats(vsi);
1216 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1217 * @vsi: the VSI to be searched
1218 * @macaddr: the MAC address
1220 * @is_vf: make sure its a VF filter, else doesn't matter
1221 * @is_netdev: make sure its a netdev filter, else doesn't matter
1223 * Returns ptr to the filter object or NULL
1225 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1226 u8 *macaddr, s16 vlan,
1227 bool is_vf, bool is_netdev)
1229 struct i40e_mac_filter *f;
1231 if (!vsi || !macaddr)
1234 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1235 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1236 (vlan == f->vlan) &&
1237 (!is_vf || f->is_vf) &&
1238 (!is_netdev || f->is_netdev))
1245 * i40e_find_mac - Find a mac addr in the macvlan filters list
1246 * @vsi: the VSI to be searched
1247 * @macaddr: the MAC address we are searching for
1248 * @is_vf: make sure its a VF filter, else doesn't matter
1249 * @is_netdev: make sure its a netdev filter, else doesn't matter
1251 * Returns the first filter with the provided MAC address or NULL if
1252 * MAC address was not found
1254 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1255 bool is_vf, bool is_netdev)
1257 struct i40e_mac_filter *f;
1259 if (!vsi || !macaddr)
1262 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1263 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1264 (!is_vf || f->is_vf) &&
1265 (!is_netdev || f->is_netdev))
1272 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1273 * @vsi: the VSI to be searched
1275 * Returns true if VSI is in vlan mode or false otherwise
1277 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1279 struct i40e_mac_filter *f;
1281 /* Only -1 for all the filters denotes not in vlan mode
1282 * so we have to go through all the list in order to make sure
1284 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1285 if (f->vlan >= 0 || vsi->info.pvid)
1293 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1294 * @vsi: the VSI to be searched
1295 * @macaddr: the mac address to be filtered
1296 * @is_vf: true if it is a VF
1297 * @is_netdev: true if it is a netdev
1299 * Goes through all the macvlan filters and adds a
1300 * macvlan filter for each unique vlan that already exists
1302 * Returns first filter found on success, else NULL
1304 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1305 bool is_vf, bool is_netdev)
1307 struct i40e_mac_filter *f;
1309 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1311 f->vlan = le16_to_cpu(vsi->info.pvid);
1312 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1313 is_vf, is_netdev)) {
1314 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1320 return list_first_entry_or_null(&vsi->mac_filter_list,
1321 struct i40e_mac_filter, list);
1325 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1326 * @vsi: the PF Main VSI - inappropriate for any other VSI
1327 * @macaddr: the MAC address
1329 * Some older firmware configurations set up a default promiscuous VLAN
1330 * filter that needs to be removed.
1332 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1334 struct i40e_aqc_remove_macvlan_element_data element;
1335 struct i40e_pf *pf = vsi->back;
1338 /* Only appropriate for the PF main VSI */
1339 if (vsi->type != I40E_VSI_MAIN)
1342 memset(&element, 0, sizeof(element));
1343 ether_addr_copy(element.mac_addr, macaddr);
1344 element.vlan_tag = 0;
1345 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1346 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1347 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1355 * i40e_add_filter - Add a mac/vlan filter to the VSI
1356 * @vsi: the VSI to be searched
1357 * @macaddr: the MAC address
1359 * @is_vf: make sure its a VF filter, else doesn't matter
1360 * @is_netdev: make sure its a netdev filter, else doesn't matter
1362 * Returns ptr to the filter object or NULL when no memory available.
1364 * NOTE: This function is expected to be called with mac_filter_list_lock
1367 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1368 u8 *macaddr, s16 vlan,
1369 bool is_vf, bool is_netdev)
1371 struct i40e_mac_filter *f;
1373 if (!vsi || !macaddr)
1376 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1378 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1380 goto add_filter_out;
1382 ether_addr_copy(f->macaddr, macaddr);
1386 INIT_LIST_HEAD(&f->list);
1387 list_add(&f->list, &vsi->mac_filter_list);
1390 /* increment counter and add a new flag if needed */
1396 } else if (is_netdev) {
1397 if (!f->is_netdev) {
1398 f->is_netdev = true;
1405 /* changed tells sync_filters_subtask to
1406 * push the filter down to the firmware
1409 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1410 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1418 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1419 * @vsi: the VSI to be searched
1420 * @macaddr: the MAC address
1422 * @is_vf: make sure it's a VF filter, else doesn't matter
1423 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1425 * NOTE: This function is expected to be called with mac_filter_list_lock
1428 void i40e_del_filter(struct i40e_vsi *vsi,
1429 u8 *macaddr, s16 vlan,
1430 bool is_vf, bool is_netdev)
1432 struct i40e_mac_filter *f;
1434 if (!vsi || !macaddr)
1437 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1438 if (!f || f->counter == 0)
1446 } else if (is_netdev) {
1448 f->is_netdev = false;
1452 /* make sure we don't remove a filter in use by VF or netdev */
1455 min_f += (f->is_vf ? 1 : 0);
1456 min_f += (f->is_netdev ? 1 : 0);
1458 if (f->counter > min_f)
1462 /* counter == 0 tells sync_filters_subtask to
1463 * remove the filter from the firmware's list
1465 if (f->counter == 0) {
1467 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1468 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1473 * i40e_set_mac - NDO callback to set mac address
1474 * @netdev: network interface device structure
1475 * @p: pointer to an address structure
1477 * Returns 0 on success, negative on failure
1480 int i40e_set_mac(struct net_device *netdev, void *p)
1482 static int i40e_set_mac(struct net_device *netdev, void *p)
1485 struct i40e_netdev_priv *np = netdev_priv(netdev);
1486 struct i40e_vsi *vsi = np->vsi;
1487 struct i40e_pf *pf = vsi->back;
1488 struct i40e_hw *hw = &pf->hw;
1489 struct sockaddr *addr = p;
1490 struct i40e_mac_filter *f;
1492 if (!is_valid_ether_addr(addr->sa_data))
1493 return -EADDRNOTAVAIL;
1495 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1496 netdev_info(netdev, "already using mac address %pM\n",
1501 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1502 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1503 return -EADDRNOTAVAIL;
1505 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1506 netdev_info(netdev, "returning to hw mac address %pM\n",
1509 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1511 if (vsi->type == I40E_VSI_MAIN) {
1514 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1515 I40E_AQC_WRITE_TYPE_LAA_WOL,
1516 addr->sa_data, NULL);
1519 "Addr change for Main VSI failed: %d\n",
1521 return -EADDRNOTAVAIL;
1525 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1526 struct i40e_aqc_remove_macvlan_element_data element;
1528 memset(&element, 0, sizeof(element));
1529 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1530 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1531 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1533 spin_lock_bh(&vsi->mac_filter_list_lock);
1534 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1536 spin_unlock_bh(&vsi->mac_filter_list_lock);
1539 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1540 struct i40e_aqc_add_macvlan_element_data element;
1542 memset(&element, 0, sizeof(element));
1543 ether_addr_copy(element.mac_addr, hw->mac.addr);
1544 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1545 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1547 spin_lock_bh(&vsi->mac_filter_list_lock);
1548 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1552 spin_unlock_bh(&vsi->mac_filter_list_lock);
1555 i40e_sync_vsi_filters(vsi, false);
1556 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1562 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1563 * @vsi: the VSI being setup
1564 * @ctxt: VSI context structure
1565 * @enabled_tc: Enabled TCs bitmap
1566 * @is_add: True if called before Add VSI
1568 * Setup VSI queue mapping for enabled traffic classes.
1571 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1572 struct i40e_vsi_context *ctxt,
1576 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1577 struct i40e_vsi_context *ctxt,
1582 struct i40e_pf *pf = vsi->back;
1592 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1595 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1596 /* Find numtc from enabled TC bitmap */
1597 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1598 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1602 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1606 /* At least TC0 is enabled in case of non-DCB case */
1610 vsi->tc_config.numtc = numtc;
1611 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1612 /* Number of queues per enabled TC */
1613 /* In MFP case we can have a much lower count of MSIx
1614 * vectors available and so we need to lower the used
1617 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1618 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1620 qcount = vsi->alloc_queue_pairs;
1621 num_tc_qps = qcount / numtc;
1622 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1624 /* Setup queue offset/count for all TCs for given VSI */
1625 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1626 /* See if the given TC is enabled for the given VSI */
1627 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1631 switch (vsi->type) {
1633 qcount = min_t(int, pf->alloc_rss_size,
1638 qcount = num_tc_qps;
1642 case I40E_VSI_SRIOV:
1643 case I40E_VSI_VMDQ2:
1645 qcount = num_tc_qps;
1649 vsi->tc_config.tc_info[i].qoffset = offset;
1650 vsi->tc_config.tc_info[i].qcount = qcount;
1652 /* find the next higher power-of-2 of num queue pairs */
1655 while (num_qps && (BIT_ULL(pow) < qcount)) {
1660 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1662 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1663 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1667 /* TC is not enabled so set the offset to
1668 * default queue and allocate one queue
1671 vsi->tc_config.tc_info[i].qoffset = 0;
1672 vsi->tc_config.tc_info[i].qcount = 1;
1673 vsi->tc_config.tc_info[i].netdev_tc = 0;
1677 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1680 /* Set actual Tx/Rx queue pairs */
1681 vsi->num_queue_pairs = offset;
1682 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1683 if (vsi->req_queue_pairs > 0)
1684 vsi->num_queue_pairs = vsi->req_queue_pairs;
1685 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1686 vsi->num_queue_pairs = pf->num_lan_msix;
1689 /* Scheduler section valid can only be set for ADD VSI */
1691 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1693 ctxt->info.up_enable_bits = enabled_tc;
1695 if (vsi->type == I40E_VSI_SRIOV) {
1696 ctxt->info.mapping_flags |=
1697 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1698 for (i = 0; i < vsi->num_queue_pairs; i++)
1699 ctxt->info.queue_mapping[i] =
1700 cpu_to_le16(vsi->base_queue + i);
1702 ctxt->info.mapping_flags |=
1703 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1704 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1706 ctxt->info.valid_sections |= cpu_to_le16(sections);
1710 * i40e_set_rx_mode - NDO callback to set the netdev filters
1711 * @netdev: network interface device structure
1714 void i40e_set_rx_mode(struct net_device *netdev)
1716 static void i40e_set_rx_mode(struct net_device *netdev)
1719 struct i40e_netdev_priv *np = netdev_priv(netdev);
1720 struct i40e_mac_filter *f, *ftmp;
1721 struct i40e_vsi *vsi = np->vsi;
1722 struct netdev_hw_addr *uca;
1723 struct netdev_hw_addr *mca;
1724 struct netdev_hw_addr *ha;
1726 spin_lock_bh(&vsi->mac_filter_list_lock);
1728 /* add addr if not already in the filter list */
1729 netdev_for_each_uc_addr(uca, netdev) {
1730 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1731 if (i40e_is_vsi_in_vlan(vsi))
1732 i40e_put_mac_in_vlan(vsi, uca->addr,
1735 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1740 netdev_for_each_mc_addr(mca, netdev) {
1741 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1742 if (i40e_is_vsi_in_vlan(vsi))
1743 i40e_put_mac_in_vlan(vsi, mca->addr,
1746 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1751 /* remove filter if not in netdev list */
1752 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1757 netdev_for_each_mc_addr(mca, netdev)
1758 if (ether_addr_equal(mca->addr, f->macaddr))
1759 goto bottom_of_search_loop;
1761 netdev_for_each_uc_addr(uca, netdev)
1762 if (ether_addr_equal(uca->addr, f->macaddr))
1763 goto bottom_of_search_loop;
1765 for_each_dev_addr(netdev, ha)
1766 if (ether_addr_equal(ha->addr, f->macaddr))
1767 goto bottom_of_search_loop;
1769 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1770 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1772 bottom_of_search_loop:
1775 spin_unlock_bh(&vsi->mac_filter_list_lock);
1777 /* check for other flag changes */
1778 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1779 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1780 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1785 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1786 * @src: source MAC filter entry to be clones
1788 * Returns the pointer to newly cloned MAC filter entry or NULL
1791 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1792 struct i40e_mac_filter *src)
1794 struct i40e_mac_filter *f;
1796 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1801 INIT_LIST_HEAD(&f->list);
1807 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1808 * @vsi: pointer to vsi struct
1809 * @from: Pointer to list which contains MAC filter entries - changes to
1810 * those entries needs to be undone.
1812 * MAC filter entries from list were slated to be removed from device.
1814 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1815 struct list_head *from)
1817 struct i40e_mac_filter *f, *ftmp;
1819 list_for_each_entry_safe(f, ftmp, from, list) {
1821 /* Move the element back into MAC filter list*/
1822 list_move_tail(&f->list, &vsi->mac_filter_list);
1827 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1828 * @vsi: pointer to vsi struct
1830 * MAC filter entries from list were slated to be added from device.
1832 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1834 struct i40e_mac_filter *f, *ftmp;
1836 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1837 if (!f->changed && f->counter)
1843 * i40e_cleanup_add_list - Deletes the element from add list and release
1845 * @add_list: Pointer to list which contains MAC filter entries
1847 static void i40e_cleanup_add_list(struct list_head *add_list)
1849 struct i40e_mac_filter *f, *ftmp;
1851 list_for_each_entry_safe(f, ftmp, add_list, list) {
1858 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1859 * @vsi: ptr to the VSI
1860 * @grab_rtnl: whether RTNL needs to be grabbed
1862 * Push any outstanding VSI filter changes through the AdminQ.
1864 * Returns 0 or error value
1866 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1868 struct list_head tmp_del_list, tmp_add_list;
1869 struct i40e_mac_filter *f, *ftmp, *fclone;
1870 bool promisc_forced_on = false;
1871 bool add_happened = false;
1872 int filter_list_len = 0;
1873 u32 changed_flags = 0;
1874 bool err_cond = false;
1875 i40e_status ret = 0;
1882 /* empty array typed pointers, kcalloc later */
1883 struct i40e_aqc_add_macvlan_element_data *add_list;
1884 struct i40e_aqc_remove_macvlan_element_data *del_list;
1886 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1887 usleep_range(1000, 2000);
1891 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1892 vsi->current_netdev_flags = vsi->netdev->flags;
1895 INIT_LIST_HEAD(&tmp_del_list);
1896 INIT_LIST_HEAD(&tmp_add_list);
1898 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1899 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1901 spin_lock_bh(&vsi->mac_filter_list_lock);
1902 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1906 if (f->counter != 0)
1910 /* Move the element into temporary del_list */
1911 list_move_tail(&f->list, &tmp_del_list);
1914 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1918 if (f->counter == 0)
1922 /* Clone MAC filter entry and add into temporary list */
1923 fclone = i40e_mac_filter_entry_clone(f);
1928 list_add_tail(&fclone->list, &tmp_add_list);
1931 /* if failed to clone MAC filter entry - undo */
1933 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1934 i40e_undo_add_filter_entries(vsi);
1936 spin_unlock_bh(&vsi->mac_filter_list_lock);
1939 i40e_cleanup_add_list(&tmp_add_list);
1942 /* Now process 'del_list' outside the lock */
1943 if (!list_empty(&tmp_del_list)) {
1944 filter_list_len = pf->hw.aq.asq_buf_size /
1945 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1946 del_list = kcalloc(filter_list_len,
1947 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1950 i40e_cleanup_add_list(&tmp_add_list);
1952 /* Undo VSI's MAC filter entry element updates */
1953 spin_lock_bh(&vsi->mac_filter_list_lock);
1954 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1955 i40e_undo_add_filter_entries(vsi);
1956 spin_unlock_bh(&vsi->mac_filter_list_lock);
1960 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1963 /* add to delete list */
1964 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1965 del_list[num_del].vlan_tag =
1966 cpu_to_le16((u16)(f->vlan ==
1967 I40E_VLAN_ANY ? 0 : f->vlan));
1969 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1970 del_list[num_del].flags = cmd_flags;
1973 /* flush a full buffer */
1974 if (num_del == filter_list_len) {
1975 ret = i40e_aq_remove_macvlan(&pf->hw,
1976 vsi->seid, del_list, num_del,
1978 aq_err = pf->hw.aq.asq_last_status;
1980 memset(del_list, 0, sizeof(*del_list));
1982 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1983 dev_err(&pf->pdev->dev,
1984 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1985 i40e_stat_str(&pf->hw, ret),
1986 i40e_aq_str(&pf->hw, aq_err));
1988 /* Release memory for MAC filter entries which were
1989 * synced up with HW.
1996 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1997 del_list, num_del, NULL);
1998 aq_err = pf->hw.aq.asq_last_status;
2001 if (ret && aq_err != I40E_AQ_RC_ENOENT)
2002 dev_info(&pf->pdev->dev,
2003 "ignoring delete macvlan error, err %s aq_err %s\n",
2004 i40e_stat_str(&pf->hw, ret),
2005 i40e_aq_str(&pf->hw, aq_err));
2012 if (!list_empty(&tmp_add_list)) {
2014 /* do all the adds now */
2015 filter_list_len = pf->hw.aq.asq_buf_size /
2016 sizeof(struct i40e_aqc_add_macvlan_element_data),
2017 add_list = kcalloc(filter_list_len,
2018 sizeof(struct i40e_aqc_add_macvlan_element_data),
2021 /* Purge element from temporary lists */
2022 i40e_cleanup_add_list(&tmp_add_list);
2024 /* Undo add filter entries from VSI MAC filter list */
2025 spin_lock_bh(&vsi->mac_filter_list_lock);
2026 i40e_undo_add_filter_entries(vsi);
2027 spin_unlock_bh(&vsi->mac_filter_list_lock);
2031 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2033 add_happened = true;
2036 /* add to add array */
2037 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2038 add_list[num_add].vlan_tag =
2040 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2041 add_list[num_add].queue_number = 0;
2043 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2044 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2047 /* flush a full buffer */
2048 if (num_add == filter_list_len) {
2049 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2052 aq_err = pf->hw.aq.asq_last_status;
2057 memset(add_list, 0, sizeof(*add_list));
2059 /* Entries from tmp_add_list were cloned from MAC
2060 * filter list, hence clean those cloned entries
2067 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2068 add_list, num_add, NULL);
2069 aq_err = pf->hw.aq.asq_last_status;
2075 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
2076 dev_info(&pf->pdev->dev,
2077 "add filter failed, err %s aq_err %s\n",
2078 i40e_stat_str(&pf->hw, ret),
2079 i40e_aq_str(&pf->hw, aq_err));
2080 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2081 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2083 promisc_forced_on = true;
2084 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2086 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2091 /* check for changes in promiscuous modes */
2092 if (changed_flags & IFF_ALLMULTI) {
2093 bool cur_multipromisc;
2095 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2096 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2101 dev_info(&pf->pdev->dev,
2102 "set multi promisc failed, err %s aq_err %s\n",
2103 i40e_stat_str(&pf->hw, ret),
2104 i40e_aq_str(&pf->hw,
2105 pf->hw.aq.asq_last_status));
2107 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2110 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2111 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2113 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2114 /* set defport ON for Main VSI instead of true promisc
2115 * this way we will get all unicast/multicast and VLAN
2116 * promisc behavior but will not get VF or VMDq traffic
2117 * replicated on the Main VSI.
2119 if (pf->cur_promisc != cur_promisc) {
2120 pf->cur_promisc = cur_promisc;
2122 i40e_do_reset_safe(pf,
2123 BIT(__I40E_PF_RESET_REQUESTED));
2126 BIT(__I40E_PF_RESET_REQUESTED));
2129 ret = i40e_aq_set_vsi_unicast_promiscuous(
2134 dev_info(&pf->pdev->dev,
2135 "set unicast promisc failed, err %d, aq_err %d\n",
2136 ret, pf->hw.aq.asq_last_status);
2137 ret = i40e_aq_set_vsi_multicast_promiscuous(
2142 dev_info(&pf->pdev->dev,
2143 "set multicast promisc failed, err %d, aq_err %d\n",
2144 ret, pf->hw.aq.asq_last_status);
2146 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2150 dev_info(&pf->pdev->dev,
2151 "set brdcast promisc failed, err %s, aq_err %s\n",
2152 i40e_stat_str(&pf->hw, ret),
2153 i40e_aq_str(&pf->hw,
2154 pf->hw.aq.asq_last_status));
2157 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2162 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2163 * @pf: board private structure
2165 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2169 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2171 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2173 for (v = 0; v < pf->num_alloc_vsi; v++) {
2175 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2176 i40e_sync_vsi_filters(pf->vsi[v], true);
2181 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2182 * @netdev: network interface device structure
2183 * @new_mtu: new value for maximum frame size
2185 * Returns 0 on success, negative on failure
2187 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2189 struct i40e_netdev_priv *np = netdev_priv(netdev);
2190 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2191 struct i40e_vsi *vsi = np->vsi;
2193 /* MTU < 68 is an error and causes problems on some kernels */
2194 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2197 netdev_info(netdev, "changing MTU from %d to %d\n",
2198 netdev->mtu, new_mtu);
2199 netdev->mtu = new_mtu;
2200 if (netif_running(netdev))
2201 i40e_vsi_reinit_locked(vsi);
2207 * i40e_ioctl - Access the hwtstamp interface
2208 * @netdev: network interface device structure
2209 * @ifr: interface request data
2210 * @cmd: ioctl command
2212 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2214 struct i40e_netdev_priv *np = netdev_priv(netdev);
2215 struct i40e_pf *pf = np->vsi->back;
2219 return i40e_ptp_get_ts_config(pf, ifr);
2221 return i40e_ptp_set_ts_config(pf, ifr);
2228 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2229 * @vsi: the vsi being adjusted
2231 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2233 struct i40e_vsi_context ctxt;
2236 if ((vsi->info.valid_sections &
2237 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2238 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2239 return; /* already enabled */
2241 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2242 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2243 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2245 ctxt.seid = vsi->seid;
2246 ctxt.info = vsi->info;
2247 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2249 dev_info(&vsi->back->pdev->dev,
2250 "update vlan stripping failed, err %s aq_err %s\n",
2251 i40e_stat_str(&vsi->back->hw, ret),
2252 i40e_aq_str(&vsi->back->hw,
2253 vsi->back->hw.aq.asq_last_status));
2258 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2259 * @vsi: the vsi being adjusted
2261 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2263 struct i40e_vsi_context ctxt;
2266 if ((vsi->info.valid_sections &
2267 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2268 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2269 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2270 return; /* already disabled */
2272 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2273 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2274 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2276 ctxt.seid = vsi->seid;
2277 ctxt.info = vsi->info;
2278 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2280 dev_info(&vsi->back->pdev->dev,
2281 "update vlan stripping failed, err %s aq_err %s\n",
2282 i40e_stat_str(&vsi->back->hw, ret),
2283 i40e_aq_str(&vsi->back->hw,
2284 vsi->back->hw.aq.asq_last_status));
2289 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2290 * @netdev: network interface to be adjusted
2291 * @features: netdev features to test if VLAN offload is enabled or not
2293 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2295 struct i40e_netdev_priv *np = netdev_priv(netdev);
2296 struct i40e_vsi *vsi = np->vsi;
2298 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2299 i40e_vlan_stripping_enable(vsi);
2301 i40e_vlan_stripping_disable(vsi);
2305 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2306 * @vsi: the vsi being configured
2307 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2309 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2311 struct i40e_mac_filter *f, *add_f;
2312 bool is_netdev, is_vf;
2314 is_vf = (vsi->type == I40E_VSI_SRIOV);
2315 is_netdev = !!(vsi->netdev);
2317 /* Locked once because all functions invoked below iterates list*/
2318 spin_lock_bh(&vsi->mac_filter_list_lock);
2321 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2324 dev_info(&vsi->back->pdev->dev,
2325 "Could not add vlan filter %d for %pM\n",
2326 vid, vsi->netdev->dev_addr);
2327 spin_unlock_bh(&vsi->mac_filter_list_lock);
2332 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2333 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2335 dev_info(&vsi->back->pdev->dev,
2336 "Could not add vlan filter %d for %pM\n",
2338 spin_unlock_bh(&vsi->mac_filter_list_lock);
2343 /* Now if we add a vlan tag, make sure to check if it is the first
2344 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2345 * with 0, so we now accept untagged and specified tagged traffic
2346 * (and not any taged and untagged)
2349 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2351 is_vf, is_netdev)) {
2352 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2353 I40E_VLAN_ANY, is_vf, is_netdev);
2354 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2357 dev_info(&vsi->back->pdev->dev,
2358 "Could not add filter 0 for %pM\n",
2359 vsi->netdev->dev_addr);
2360 spin_unlock_bh(&vsi->mac_filter_list_lock);
2366 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2367 if (vid > 0 && !vsi->info.pvid) {
2368 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2369 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2372 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2374 add_f = i40e_add_filter(vsi, f->macaddr,
2375 0, is_vf, is_netdev);
2377 dev_info(&vsi->back->pdev->dev,
2378 "Could not add filter 0 for %pM\n",
2380 spin_unlock_bh(&vsi->mac_filter_list_lock);
2386 /* Make sure to release before sync_vsi_filter because that
2387 * function will lock/unlock as necessary
2389 spin_unlock_bh(&vsi->mac_filter_list_lock);
2391 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2392 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2395 return i40e_sync_vsi_filters(vsi, false);
2399 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2400 * @vsi: the vsi being configured
2401 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2403 * Return: 0 on success or negative otherwise
2405 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2407 struct net_device *netdev = vsi->netdev;
2408 struct i40e_mac_filter *f, *add_f;
2409 bool is_vf, is_netdev;
2410 int filter_count = 0;
2412 is_vf = (vsi->type == I40E_VSI_SRIOV);
2413 is_netdev = !!(netdev);
2415 /* Locked once because all functions invoked below iterates list */
2416 spin_lock_bh(&vsi->mac_filter_list_lock);
2419 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2421 list_for_each_entry(f, &vsi->mac_filter_list, list)
2422 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2424 /* go through all the filters for this VSI and if there is only
2425 * vid == 0 it means there are no other filters, so vid 0 must
2426 * be replaced with -1. This signifies that we should from now
2427 * on accept any traffic (with any tag present, or untagged)
2429 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2432 ether_addr_equal(netdev->dev_addr, f->macaddr))
2440 if (!filter_count && is_netdev) {
2441 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2442 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2445 dev_info(&vsi->back->pdev->dev,
2446 "Could not add filter %d for %pM\n",
2447 I40E_VLAN_ANY, netdev->dev_addr);
2448 spin_unlock_bh(&vsi->mac_filter_list_lock);
2453 if (!filter_count) {
2454 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2455 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2456 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2459 dev_info(&vsi->back->pdev->dev,
2460 "Could not add filter %d for %pM\n",
2461 I40E_VLAN_ANY, f->macaddr);
2462 spin_unlock_bh(&vsi->mac_filter_list_lock);
2468 /* Make sure to release before sync_vsi_filter because that
2469 * function with lock/unlock as necessary
2471 spin_unlock_bh(&vsi->mac_filter_list_lock);
2473 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2474 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2477 return i40e_sync_vsi_filters(vsi, false);
2481 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2482 * @netdev: network interface to be adjusted
2483 * @vid: vlan id to be added
2485 * net_device_ops implementation for adding vlan ids
2488 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2489 __always_unused __be16 proto, u16 vid)
2491 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2492 __always_unused __be16 proto, u16 vid)
2495 struct i40e_netdev_priv *np = netdev_priv(netdev);
2496 struct i40e_vsi *vsi = np->vsi;
2502 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2504 /* If the network stack called us with vid = 0 then
2505 * it is asking to receive priority tagged packets with
2506 * vlan id 0. Our HW receives them by default when configured
2507 * to receive untagged packets so there is no need to add an
2508 * extra filter for vlan 0 tagged packets.
2511 ret = i40e_vsi_add_vlan(vsi, vid);
2513 if (!ret && (vid < VLAN_N_VID))
2514 set_bit(vid, vsi->active_vlans);
2520 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2521 * @netdev: network interface to be adjusted
2522 * @vid: vlan id to be removed
2524 * net_device_ops implementation for removing vlan ids
2527 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2528 __always_unused __be16 proto, u16 vid)
2530 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2531 __always_unused __be16 proto, u16 vid)
2534 struct i40e_netdev_priv *np = netdev_priv(netdev);
2535 struct i40e_vsi *vsi = np->vsi;
2537 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2539 /* return code is ignored as there is nothing a user
2540 * can do about failure to remove and a log message was
2541 * already printed from the other function
2543 i40e_vsi_kill_vlan(vsi, vid);
2545 clear_bit(vid, vsi->active_vlans);
2551 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2552 * @vsi: the vsi being brought back up
2554 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2561 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2563 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2564 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2569 * i40e_vsi_add_pvid - Add pvid for the VSI
2570 * @vsi: the vsi being adjusted
2571 * @vid: the vlan id to set as a PVID
2573 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2575 struct i40e_vsi_context ctxt;
2578 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2579 vsi->info.pvid = cpu_to_le16(vid);
2580 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2581 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2582 I40E_AQ_VSI_PVLAN_EMOD_STR;
2584 ctxt.seid = vsi->seid;
2585 ctxt.info = vsi->info;
2586 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2588 dev_info(&vsi->back->pdev->dev,
2589 "add pvid failed, err %s aq_err %s\n",
2590 i40e_stat_str(&vsi->back->hw, ret),
2591 i40e_aq_str(&vsi->back->hw,
2592 vsi->back->hw.aq.asq_last_status));
2600 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2601 * @vsi: the vsi being adjusted
2603 * Just use the vlan_rx_register() service to put it back to normal
2605 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2607 i40e_vlan_stripping_disable(vsi);
2613 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2614 * @vsi: ptr to the VSI
2616 * If this function returns with an error, then it's possible one or
2617 * more of the rings is populated (while the rest are not). It is the
2618 * callers duty to clean those orphaned rings.
2620 * Return 0 on success, negative on failure
2622 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2626 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2627 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2633 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2634 * @vsi: ptr to the VSI
2636 * Free VSI's transmit software resources
2638 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2645 for (i = 0; i < vsi->num_queue_pairs; i++)
2646 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2647 i40e_free_tx_resources(vsi->tx_rings[i]);
2651 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2652 * @vsi: ptr to the VSI
2654 * If this function returns with an error, then it's possible one or
2655 * more of the rings is populated (while the rest are not). It is the
2656 * callers duty to clean those orphaned rings.
2658 * Return 0 on success, negative on failure
2660 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2664 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2665 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2667 i40e_fcoe_setup_ddp_resources(vsi);
2673 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2674 * @vsi: ptr to the VSI
2676 * Free all receive software resources
2678 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2685 for (i = 0; i < vsi->num_queue_pairs; i++)
2686 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2687 i40e_free_rx_resources(vsi->rx_rings[i]);
2689 i40e_fcoe_free_ddp_resources(vsi);
2694 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2695 * @ring: The Tx ring to configure
2697 * This enables/disables XPS for a given Tx descriptor ring
2698 * based on the TCs enabled for the VSI that ring belongs to.
2700 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2702 struct i40e_vsi *vsi = ring->vsi;
2705 if (!ring->q_vector || !ring->netdev)
2708 /* Single TC mode enable XPS */
2709 if (vsi->tc_config.numtc <= 1) {
2710 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2711 netif_set_xps_queue(ring->netdev,
2712 &ring->q_vector->affinity_mask,
2714 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2715 /* Disable XPS to allow selection based on TC */
2716 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2717 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2718 free_cpumask_var(mask);
2723 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2724 * @ring: The Tx ring to configure
2726 * Configure the Tx descriptor ring in the HMC context.
2728 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2730 struct i40e_vsi *vsi = ring->vsi;
2731 u16 pf_q = vsi->base_queue + ring->queue_index;
2732 struct i40e_hw *hw = &vsi->back->hw;
2733 struct i40e_hmc_obj_txq tx_ctx;
2734 i40e_status err = 0;
2737 /* some ATR related tx ring init */
2738 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2739 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2740 ring->atr_count = 0;
2742 ring->atr_sample_rate = 0;
2746 i40e_config_xps_tx_ring(ring);
2748 /* clear the context structure first */
2749 memset(&tx_ctx, 0, sizeof(tx_ctx));
2751 tx_ctx.new_context = 1;
2752 tx_ctx.base = (ring->dma / 128);
2753 tx_ctx.qlen = ring->count;
2754 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2755 I40E_FLAG_FD_ATR_ENABLED));
2757 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2759 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2760 /* FDIR VSI tx ring can still use RS bit and writebacks */
2761 if (vsi->type != I40E_VSI_FDIR)
2762 tx_ctx.head_wb_ena = 1;
2763 tx_ctx.head_wb_addr = ring->dma +
2764 (ring->count * sizeof(struct i40e_tx_desc));
2766 /* As part of VSI creation/update, FW allocates certain
2767 * Tx arbitration queue sets for each TC enabled for
2768 * the VSI. The FW returns the handles to these queue
2769 * sets as part of the response buffer to Add VSI,
2770 * Update VSI, etc. AQ commands. It is expected that
2771 * these queue set handles be associated with the Tx
2772 * queues by the driver as part of the TX queue context
2773 * initialization. This has to be done regardless of
2774 * DCB as by default everything is mapped to TC0.
2776 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2777 tx_ctx.rdylist_act = 0;
2779 /* clear the context in the HMC */
2780 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2782 dev_info(&vsi->back->pdev->dev,
2783 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2784 ring->queue_index, pf_q, err);
2788 /* set the context in the HMC */
2789 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2791 dev_info(&vsi->back->pdev->dev,
2792 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2793 ring->queue_index, pf_q, err);
2797 /* Now associate this queue with this PCI function */
2798 if (vsi->type == I40E_VSI_VMDQ2) {
2799 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2800 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2801 I40E_QTX_CTL_VFVM_INDX_MASK;
2803 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2806 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2807 I40E_QTX_CTL_PF_INDX_MASK);
2808 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2811 /* cache tail off for easier writes later */
2812 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2818 * i40e_configure_rx_ring - Configure a receive ring context
2819 * @ring: The Rx ring to configure
2821 * Configure the Rx descriptor ring in the HMC context.
2823 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2825 struct i40e_vsi *vsi = ring->vsi;
2826 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2827 u16 pf_q = vsi->base_queue + ring->queue_index;
2828 struct i40e_hw *hw = &vsi->back->hw;
2829 struct i40e_hmc_obj_rxq rx_ctx;
2830 i40e_status err = 0;
2834 /* clear the context structure first */
2835 memset(&rx_ctx, 0, sizeof(rx_ctx));
2837 ring->rx_buf_len = vsi->rx_buf_len;
2838 ring->rx_hdr_len = vsi->rx_hdr_len;
2840 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2841 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2843 rx_ctx.base = (ring->dma / 128);
2844 rx_ctx.qlen = ring->count;
2846 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2847 set_ring_16byte_desc_enabled(ring);
2853 rx_ctx.dtype = vsi->dtype;
2855 set_ring_ps_enabled(ring);
2856 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2858 I40E_RX_SPLIT_TCP_UDP |
2861 rx_ctx.hsplit_0 = 0;
2864 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2865 (chain_len * ring->rx_buf_len));
2866 if (hw->revision_id == 0)
2867 rx_ctx.lrxqthresh = 0;
2869 rx_ctx.lrxqthresh = 2;
2870 rx_ctx.crcstrip = 1;
2872 /* this controls whether VLAN is stripped from inner headers */
2875 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2877 /* set the prefena field to 1 because the manual says to */
2880 /* clear the context in the HMC */
2881 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2883 dev_info(&vsi->back->pdev->dev,
2884 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2885 ring->queue_index, pf_q, err);
2889 /* set the context in the HMC */
2890 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2892 dev_info(&vsi->back->pdev->dev,
2893 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2894 ring->queue_index, pf_q, err);
2898 /* cache tail for quicker writes, and clear the reg before use */
2899 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2900 writel(0, ring->tail);
2902 if (ring_is_ps_enabled(ring)) {
2903 i40e_alloc_rx_headers(ring);
2904 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2906 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2913 * i40e_vsi_configure_tx - Configure the VSI for Tx
2914 * @vsi: VSI structure describing this set of rings and resources
2916 * Configure the Tx VSI for operation.
2918 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2923 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2924 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2930 * i40e_vsi_configure_rx - Configure the VSI for Rx
2931 * @vsi: the VSI being configured
2933 * Configure the Rx VSI for operation.
2935 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2940 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2941 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2942 + ETH_FCS_LEN + VLAN_HLEN;
2944 vsi->max_frame = I40E_RXBUFFER_2048;
2946 /* figure out correct receive buffer length */
2947 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2948 I40E_FLAG_RX_PS_ENABLED)) {
2949 case I40E_FLAG_RX_1BUF_ENABLED:
2950 vsi->rx_hdr_len = 0;
2951 vsi->rx_buf_len = vsi->max_frame;
2952 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2954 case I40E_FLAG_RX_PS_ENABLED:
2955 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2956 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2957 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2960 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2961 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2962 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2967 /* setup rx buffer for FCoE */
2968 if ((vsi->type == I40E_VSI_FCOE) &&
2969 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2970 vsi->rx_hdr_len = 0;
2971 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2972 vsi->max_frame = I40E_RXBUFFER_3072;
2973 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2976 #endif /* I40E_FCOE */
2977 /* round up for the chip's needs */
2978 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2979 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2980 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2981 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2983 /* set up individual rings */
2984 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2985 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2991 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2992 * @vsi: ptr to the VSI
2994 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2996 struct i40e_ring *tx_ring, *rx_ring;
2997 u16 qoffset, qcount;
3000 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3001 /* Reset the TC information */
3002 for (i = 0; i < vsi->num_queue_pairs; i++) {
3003 rx_ring = vsi->rx_rings[i];
3004 tx_ring = vsi->tx_rings[i];
3005 rx_ring->dcb_tc = 0;
3006 tx_ring->dcb_tc = 0;
3010 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3011 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3014 qoffset = vsi->tc_config.tc_info[n].qoffset;
3015 qcount = vsi->tc_config.tc_info[n].qcount;
3016 for (i = qoffset; i < (qoffset + qcount); i++) {
3017 rx_ring = vsi->rx_rings[i];
3018 tx_ring = vsi->tx_rings[i];
3019 rx_ring->dcb_tc = n;
3020 tx_ring->dcb_tc = n;
3026 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3027 * @vsi: ptr to the VSI
3029 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3032 i40e_set_rx_mode(vsi->netdev);
3036 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3037 * @vsi: Pointer to the targeted VSI
3039 * This function replays the hlist on the hw where all the SB Flow Director
3040 * filters were saved.
3042 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3044 struct i40e_fdir_filter *filter;
3045 struct i40e_pf *pf = vsi->back;
3046 struct hlist_node *node;
3048 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3051 hlist_for_each_entry_safe(filter, node,
3052 &pf->fdir_filter_list, fdir_node) {
3053 i40e_add_del_fdir(vsi, filter, true);
3058 * i40e_vsi_configure - Set up the VSI for action
3059 * @vsi: the VSI being configured
3061 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3065 i40e_set_vsi_rx_mode(vsi);
3066 i40e_restore_vlan(vsi);
3067 i40e_vsi_config_dcb_rings(vsi);
3068 err = i40e_vsi_configure_tx(vsi);
3070 err = i40e_vsi_configure_rx(vsi);
3076 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3077 * @vsi: the VSI being configured
3079 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3081 struct i40e_pf *pf = vsi->back;
3082 struct i40e_hw *hw = &pf->hw;
3087 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3088 * and PFINT_LNKLSTn registers, e.g.:
3089 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3091 qp = vsi->base_queue;
3092 vector = vsi->base_vector;
3093 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3094 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3096 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3097 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3098 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3099 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3101 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3102 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3103 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3105 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3106 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3108 /* Linked list for the queuepairs assigned to this vector */
3109 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3110 for (q = 0; q < q_vector->num_ringpairs; q++) {
3113 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3114 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3115 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3116 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3118 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3120 wr32(hw, I40E_QINT_RQCTL(qp), val);
3122 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3123 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3124 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3125 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3127 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3129 /* Terminate the linked list */
3130 if (q == (q_vector->num_ringpairs - 1))
3131 val |= (I40E_QUEUE_END_OF_LIST
3132 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3134 wr32(hw, I40E_QINT_TQCTL(qp), val);
3143 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3144 * @hw: ptr to the hardware info
3146 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3148 struct i40e_hw *hw = &pf->hw;
3151 /* clear things first */
3152 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3153 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3155 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3156 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3157 I40E_PFINT_ICR0_ENA_GRST_MASK |
3158 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3159 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3160 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3161 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3162 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3164 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3165 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3167 if (pf->flags & I40E_FLAG_PTP)
3168 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3170 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3172 /* SW_ITR_IDX = 0, but don't change INTENA */
3173 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3174 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3176 /* OTHER_ITR_IDX = 0 */
3177 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3181 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3182 * @vsi: the VSI being configured
3184 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3186 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3187 struct i40e_pf *pf = vsi->back;
3188 struct i40e_hw *hw = &pf->hw;
3191 /* set the ITR configuration */
3192 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3193 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3194 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3195 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3196 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3197 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3198 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3200 i40e_enable_misc_int_causes(pf);
3202 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3203 wr32(hw, I40E_PFINT_LNKLST0, 0);
3205 /* Associate the queue pair to the vector and enable the queue int */
3206 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3207 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3208 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3210 wr32(hw, I40E_QINT_RQCTL(0), val);
3212 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3213 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3214 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3216 wr32(hw, I40E_QINT_TQCTL(0), val);
3221 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3222 * @pf: board private structure
3224 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3226 struct i40e_hw *hw = &pf->hw;
3228 wr32(hw, I40E_PFINT_DYN_CTL0,
3229 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3234 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3235 * @pf: board private structure
3237 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3239 struct i40e_hw *hw = &pf->hw;
3242 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3243 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3244 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3246 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3251 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3252 * @vsi: pointer to a vsi
3253 * @vector: disable a particular Hw Interrupt vector
3255 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3257 struct i40e_pf *pf = vsi->back;
3258 struct i40e_hw *hw = &pf->hw;
3261 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3262 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3267 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3268 * @irq: interrupt number
3269 * @data: pointer to a q_vector
3271 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3273 struct i40e_q_vector *q_vector = data;
3275 if (!q_vector->tx.ring && !q_vector->rx.ring)
3278 napi_schedule_irqoff(&q_vector->napi);
3284 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3285 * @vsi: the VSI being configured
3286 * @basename: name for the vector
3288 * Allocates MSI-X vectors and requests interrupts from the kernel.
3290 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3292 int q_vectors = vsi->num_q_vectors;
3293 struct i40e_pf *pf = vsi->back;
3294 int base = vsi->base_vector;
3299 for (vector = 0; vector < q_vectors; vector++) {
3300 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3302 if (q_vector->tx.ring && q_vector->rx.ring) {
3303 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3304 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3306 } else if (q_vector->rx.ring) {
3307 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3308 "%s-%s-%d", basename, "rx", rx_int_idx++);
3309 } else if (q_vector->tx.ring) {
3310 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3311 "%s-%s-%d", basename, "tx", tx_int_idx++);
3313 /* skip this unused q_vector */
3316 err = request_irq(pf->msix_entries[base + vector].vector,
3322 dev_info(&pf->pdev->dev,
3323 "MSIX request_irq failed, error: %d\n", err);
3324 goto free_queue_irqs;
3326 /* assign the mask for this irq */
3327 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3328 &q_vector->affinity_mask);
3331 vsi->irqs_ready = true;
3337 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3339 free_irq(pf->msix_entries[base + vector].vector,
3340 &(vsi->q_vectors[vector]));
3346 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3347 * @vsi: the VSI being un-configured
3349 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3351 struct i40e_pf *pf = vsi->back;
3352 struct i40e_hw *hw = &pf->hw;
3353 int base = vsi->base_vector;
3356 for (i = 0; i < vsi->num_queue_pairs; i++) {
3357 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3358 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3361 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3362 for (i = vsi->base_vector;
3363 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3364 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3367 for (i = 0; i < vsi->num_q_vectors; i++)
3368 synchronize_irq(pf->msix_entries[i + base].vector);
3370 /* Legacy and MSI mode - this stops all interrupt handling */
3371 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3372 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3374 synchronize_irq(pf->pdev->irq);
3379 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3380 * @vsi: the VSI being configured
3382 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3384 struct i40e_pf *pf = vsi->back;
3387 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3388 for (i = 0; i < vsi->num_q_vectors; i++)
3389 i40e_irq_dynamic_enable(vsi, i);
3391 i40e_irq_dynamic_enable_icr0(pf);
3394 i40e_flush(&pf->hw);
3399 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3400 * @pf: board private structure
3402 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3405 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3406 i40e_flush(&pf->hw);
3410 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3411 * @irq: interrupt number
3412 * @data: pointer to a q_vector
3414 * This is the handler used for all MSI/Legacy interrupts, and deals
3415 * with both queue and non-queue interrupts. This is also used in
3416 * MSIX mode to handle the non-queue interrupts.
3418 static irqreturn_t i40e_intr(int irq, void *data)
3420 struct i40e_pf *pf = (struct i40e_pf *)data;
3421 struct i40e_hw *hw = &pf->hw;
3422 irqreturn_t ret = IRQ_NONE;
3423 u32 icr0, icr0_remaining;
3426 icr0 = rd32(hw, I40E_PFINT_ICR0);
3427 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3429 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3430 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3433 /* if interrupt but no bits showing, must be SWINT */
3434 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3435 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3438 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3439 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3440 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3441 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3442 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3445 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3446 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3447 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3448 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3450 /* temporarily disable queue cause for NAPI processing */
3451 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3453 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3454 wr32(hw, I40E_QINT_RQCTL(0), qval);
3456 qval = rd32(hw, I40E_QINT_TQCTL(0));
3457 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3458 wr32(hw, I40E_QINT_TQCTL(0), qval);
3460 if (!test_bit(__I40E_DOWN, &pf->state))
3461 napi_schedule_irqoff(&q_vector->napi);
3464 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3465 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3466 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3469 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3470 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3471 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3474 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3475 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3476 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3479 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3480 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3481 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3482 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3483 val = rd32(hw, I40E_GLGEN_RSTAT);
3484 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3485 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3486 if (val == I40E_RESET_CORER) {
3488 } else if (val == I40E_RESET_GLOBR) {
3490 } else if (val == I40E_RESET_EMPR) {
3492 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3496 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3497 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3498 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3499 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3500 rd32(hw, I40E_PFHMC_ERRORINFO),
3501 rd32(hw, I40E_PFHMC_ERRORDATA));
3504 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3505 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3507 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3508 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3509 i40e_ptp_tx_hwtstamp(pf);
3513 /* If a critical error is pending we have no choice but to reset the
3515 * Report and mask out any remaining unexpected interrupts.
3517 icr0_remaining = icr0 & ena_mask;
3518 if (icr0_remaining) {
3519 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3521 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3522 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3523 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3524 dev_info(&pf->pdev->dev, "device will be reset\n");
3525 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3526 i40e_service_event_schedule(pf);
3528 ena_mask &= ~icr0_remaining;
3533 /* re-enable interrupt causes */
3534 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3535 if (!test_bit(__I40E_DOWN, &pf->state)) {
3536 i40e_service_event_schedule(pf);
3537 i40e_irq_dynamic_enable_icr0(pf);
3544 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3545 * @tx_ring: tx ring to clean
3546 * @budget: how many cleans we're allowed
3548 * Returns true if there's any budget left (e.g. the clean is finished)
3550 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3552 struct i40e_vsi *vsi = tx_ring->vsi;
3553 u16 i = tx_ring->next_to_clean;
3554 struct i40e_tx_buffer *tx_buf;
3555 struct i40e_tx_desc *tx_desc;
3557 tx_buf = &tx_ring->tx_bi[i];
3558 tx_desc = I40E_TX_DESC(tx_ring, i);
3559 i -= tx_ring->count;
3562 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3564 /* if next_to_watch is not set then there is no work pending */
3568 /* prevent any other reads prior to eop_desc */
3569 read_barrier_depends();
3571 /* if the descriptor isn't done, no work yet to do */
3572 if (!(eop_desc->cmd_type_offset_bsz &
3573 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3576 /* clear next_to_watch to prevent false hangs */
3577 tx_buf->next_to_watch = NULL;
3579 tx_desc->buffer_addr = 0;
3580 tx_desc->cmd_type_offset_bsz = 0;
3581 /* move past filter desc */
3586 i -= tx_ring->count;
3587 tx_buf = tx_ring->tx_bi;
3588 tx_desc = I40E_TX_DESC(tx_ring, 0);
3590 /* unmap skb header data */
3591 dma_unmap_single(tx_ring->dev,
3592 dma_unmap_addr(tx_buf, dma),
3593 dma_unmap_len(tx_buf, len),
3595 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3596 kfree(tx_buf->raw_buf);
3598 tx_buf->raw_buf = NULL;
3599 tx_buf->tx_flags = 0;
3600 tx_buf->next_to_watch = NULL;
3601 dma_unmap_len_set(tx_buf, len, 0);
3602 tx_desc->buffer_addr = 0;
3603 tx_desc->cmd_type_offset_bsz = 0;
3605 /* move us past the eop_desc for start of next FD desc */
3610 i -= tx_ring->count;
3611 tx_buf = tx_ring->tx_bi;
3612 tx_desc = I40E_TX_DESC(tx_ring, 0);
3615 /* update budget accounting */
3617 } while (likely(budget));
3619 i += tx_ring->count;
3620 tx_ring->next_to_clean = i;
3622 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3623 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3629 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3630 * @irq: interrupt number
3631 * @data: pointer to a q_vector
3633 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3635 struct i40e_q_vector *q_vector = data;
3636 struct i40e_vsi *vsi;
3638 if (!q_vector->tx.ring)
3641 vsi = q_vector->tx.ring->vsi;
3642 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3648 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3649 * @vsi: the VSI being configured
3650 * @v_idx: vector index
3651 * @qp_idx: queue pair index
3653 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3655 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3656 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3657 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3659 tx_ring->q_vector = q_vector;
3660 tx_ring->next = q_vector->tx.ring;
3661 q_vector->tx.ring = tx_ring;
3662 q_vector->tx.count++;
3664 rx_ring->q_vector = q_vector;
3665 rx_ring->next = q_vector->rx.ring;
3666 q_vector->rx.ring = rx_ring;
3667 q_vector->rx.count++;
3671 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3672 * @vsi: the VSI being configured
3674 * This function maps descriptor rings to the queue-specific vectors
3675 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3676 * one vector per queue pair, but on a constrained vector budget, we
3677 * group the queue pairs as "efficiently" as possible.
3679 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3681 int qp_remaining = vsi->num_queue_pairs;
3682 int q_vectors = vsi->num_q_vectors;
3687 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3688 * group them so there are multiple queues per vector.
3689 * It is also important to go through all the vectors available to be
3690 * sure that if we don't use all the vectors, that the remaining vectors
3691 * are cleared. This is especially important when decreasing the
3692 * number of queues in use.
3694 for (; v_start < q_vectors; v_start++) {
3695 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3697 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3699 q_vector->num_ringpairs = num_ringpairs;
3701 q_vector->rx.count = 0;
3702 q_vector->tx.count = 0;
3703 q_vector->rx.ring = NULL;
3704 q_vector->tx.ring = NULL;
3706 while (num_ringpairs--) {
3707 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3715 * i40e_vsi_request_irq - Request IRQ from the OS
3716 * @vsi: the VSI being configured
3717 * @basename: name for the vector
3719 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3721 struct i40e_pf *pf = vsi->back;
3724 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3725 err = i40e_vsi_request_irq_msix(vsi, basename);
3726 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3727 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3730 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3734 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3739 #ifdef CONFIG_NET_POLL_CONTROLLER
3741 * i40e_netpoll - A Polling 'interrupt'handler
3742 * @netdev: network interface device structure
3744 * This is used by netconsole to send skbs without having to re-enable
3745 * interrupts. It's not called while the normal interrupt routine is executing.
3748 void i40e_netpoll(struct net_device *netdev)
3750 static void i40e_netpoll(struct net_device *netdev)
3753 struct i40e_netdev_priv *np = netdev_priv(netdev);
3754 struct i40e_vsi *vsi = np->vsi;
3755 struct i40e_pf *pf = vsi->back;
3758 /* if interface is down do nothing */
3759 if (test_bit(__I40E_DOWN, &vsi->state))
3762 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3763 for (i = 0; i < vsi->num_q_vectors; i++)
3764 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3766 i40e_intr(pf->pdev->irq, netdev);
3772 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3773 * @pf: the PF being configured
3774 * @pf_q: the PF queue
3775 * @enable: enable or disable state of the queue
3777 * This routine will wait for the given Tx queue of the PF to reach the
3778 * enabled or disabled state.
3779 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3780 * multiple retries; else will return 0 in case of success.
3782 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3787 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3788 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3789 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3792 usleep_range(10, 20);
3794 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3801 * i40e_vsi_control_tx - Start or stop a VSI's rings
3802 * @vsi: the VSI being configured
3803 * @enable: start or stop the rings
3805 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3807 struct i40e_pf *pf = vsi->back;
3808 struct i40e_hw *hw = &pf->hw;
3809 int i, j, pf_q, ret = 0;
3812 pf_q = vsi->base_queue;
3813 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3815 /* warn the TX unit of coming changes */
3816 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3818 usleep_range(10, 20);
3820 for (j = 0; j < 50; j++) {
3821 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3822 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3823 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3825 usleep_range(1000, 2000);
3827 /* Skip if the queue is already in the requested state */
3828 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3831 /* turn on/off the queue */
3833 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3834 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3836 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3839 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3840 /* No waiting for the Tx queue to disable */
3841 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3844 /* wait for the change to finish */
3845 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3847 dev_info(&pf->pdev->dev,
3848 "VSI seid %d Tx ring %d %sable timeout\n",
3849 vsi->seid, pf_q, (enable ? "en" : "dis"));
3854 if (hw->revision_id == 0)
3860 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3861 * @pf: the PF being configured
3862 * @pf_q: the PF queue
3863 * @enable: enable or disable state of the queue
3865 * This routine will wait for the given Rx queue of the PF to reach the
3866 * enabled or disabled state.
3867 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3868 * multiple retries; else will return 0 in case of success.
3870 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3875 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3876 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3877 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3880 usleep_range(10, 20);
3882 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3889 * i40e_vsi_control_rx - Start or stop a VSI's rings
3890 * @vsi: the VSI being configured
3891 * @enable: start or stop the rings
3893 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3895 struct i40e_pf *pf = vsi->back;
3896 struct i40e_hw *hw = &pf->hw;
3897 int i, j, pf_q, ret = 0;
3900 pf_q = vsi->base_queue;
3901 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3902 for (j = 0; j < 50; j++) {
3903 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3904 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3905 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3907 usleep_range(1000, 2000);
3910 /* Skip if the queue is already in the requested state */
3911 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3914 /* turn on/off the queue */
3916 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3918 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3919 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3921 /* wait for the change to finish */
3922 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3924 dev_info(&pf->pdev->dev,
3925 "VSI seid %d Rx ring %d %sable timeout\n",
3926 vsi->seid, pf_q, (enable ? "en" : "dis"));
3935 * i40e_vsi_control_rings - Start or stop a VSI's rings
3936 * @vsi: the VSI being configured
3937 * @enable: start or stop the rings
3939 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3943 /* do rx first for enable and last for disable */
3945 ret = i40e_vsi_control_rx(vsi, request);
3948 ret = i40e_vsi_control_tx(vsi, request);
3950 /* Ignore return value, we need to shutdown whatever we can */
3951 i40e_vsi_control_tx(vsi, request);
3952 i40e_vsi_control_rx(vsi, request);
3959 * i40e_vsi_free_irq - Free the irq association with the OS
3960 * @vsi: the VSI being configured
3962 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3964 struct i40e_pf *pf = vsi->back;
3965 struct i40e_hw *hw = &pf->hw;
3966 int base = vsi->base_vector;
3970 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3971 if (!vsi->q_vectors)
3974 if (!vsi->irqs_ready)
3977 vsi->irqs_ready = false;
3978 for (i = 0; i < vsi->num_q_vectors; i++) {
3979 u16 vector = i + base;
3981 /* free only the irqs that were actually requested */
3982 if (!vsi->q_vectors[i] ||
3983 !vsi->q_vectors[i]->num_ringpairs)
3986 /* clear the affinity_mask in the IRQ descriptor */
3987 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3989 free_irq(pf->msix_entries[vector].vector,
3992 /* Tear down the interrupt queue link list
3994 * We know that they come in pairs and always
3995 * the Rx first, then the Tx. To clear the
3996 * link list, stick the EOL value into the
3997 * next_q field of the registers.
3999 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4000 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4001 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4002 val |= I40E_QUEUE_END_OF_LIST
4003 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4004 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4006 while (qp != I40E_QUEUE_END_OF_LIST) {
4009 val = rd32(hw, I40E_QINT_RQCTL(qp));
4011 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4012 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4013 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4014 I40E_QINT_RQCTL_INTEVENT_MASK);
4016 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4017 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4019 wr32(hw, I40E_QINT_RQCTL(qp), val);
4021 val = rd32(hw, I40E_QINT_TQCTL(qp));
4023 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4024 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4026 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4027 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4028 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4029 I40E_QINT_TQCTL_INTEVENT_MASK);
4031 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4032 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4034 wr32(hw, I40E_QINT_TQCTL(qp), val);
4039 free_irq(pf->pdev->irq, pf);
4041 val = rd32(hw, I40E_PFINT_LNKLST0);
4042 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4043 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4044 val |= I40E_QUEUE_END_OF_LIST
4045 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4046 wr32(hw, I40E_PFINT_LNKLST0, val);
4048 val = rd32(hw, I40E_QINT_RQCTL(qp));
4049 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4050 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4051 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4052 I40E_QINT_RQCTL_INTEVENT_MASK);
4054 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4055 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4057 wr32(hw, I40E_QINT_RQCTL(qp), val);
4059 val = rd32(hw, I40E_QINT_TQCTL(qp));
4061 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4062 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4063 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4064 I40E_QINT_TQCTL_INTEVENT_MASK);
4066 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4067 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4069 wr32(hw, I40E_QINT_TQCTL(qp), val);
4074 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4075 * @vsi: the VSI being configured
4076 * @v_idx: Index of vector to be freed
4078 * This function frees the memory allocated to the q_vector. In addition if
4079 * NAPI is enabled it will delete any references to the NAPI struct prior
4080 * to freeing the q_vector.
4082 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4084 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4085 struct i40e_ring *ring;
4090 /* disassociate q_vector from rings */
4091 i40e_for_each_ring(ring, q_vector->tx)
4092 ring->q_vector = NULL;
4094 i40e_for_each_ring(ring, q_vector->rx)
4095 ring->q_vector = NULL;
4097 /* only VSI w/ an associated netdev is set up w/ NAPI */
4099 netif_napi_del(&q_vector->napi);
4101 vsi->q_vectors[v_idx] = NULL;
4103 kfree_rcu(q_vector, rcu);
4107 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4108 * @vsi: the VSI being un-configured
4110 * This frees the memory allocated to the q_vectors and
4111 * deletes references to the NAPI struct.
4113 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4117 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4118 i40e_free_q_vector(vsi, v_idx);
4122 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4123 * @pf: board private structure
4125 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4127 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4128 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4129 pci_disable_msix(pf->pdev);
4130 kfree(pf->msix_entries);
4131 pf->msix_entries = NULL;
4132 kfree(pf->irq_pile);
4133 pf->irq_pile = NULL;
4134 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4135 pci_disable_msi(pf->pdev);
4137 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4141 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4142 * @pf: board private structure
4144 * We go through and clear interrupt specific resources and reset the structure
4145 * to pre-load conditions
4147 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4151 i40e_stop_misc_vector(pf);
4152 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4153 synchronize_irq(pf->msix_entries[0].vector);
4154 free_irq(pf->msix_entries[0].vector, pf);
4157 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4158 for (i = 0; i < pf->num_alloc_vsi; i++)
4160 i40e_vsi_free_q_vectors(pf->vsi[i]);
4161 i40e_reset_interrupt_capability(pf);
4165 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4166 * @vsi: the VSI being configured
4168 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4175 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4176 napi_enable(&vsi->q_vectors[q_idx]->napi);
4180 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4181 * @vsi: the VSI being configured
4183 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4190 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4191 napi_disable(&vsi->q_vectors[q_idx]->napi);
4195 * i40e_vsi_close - Shut down a VSI
4196 * @vsi: the vsi to be quelled
4198 static void i40e_vsi_close(struct i40e_vsi *vsi)
4200 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4202 i40e_vsi_free_irq(vsi);
4203 i40e_vsi_free_tx_resources(vsi);
4204 i40e_vsi_free_rx_resources(vsi);
4205 vsi->current_netdev_flags = 0;
4209 * i40e_quiesce_vsi - Pause a given VSI
4210 * @vsi: the VSI being paused
4212 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4214 if (test_bit(__I40E_DOWN, &vsi->state))
4217 /* No need to disable FCoE VSI when Tx suspended */
4218 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4219 vsi->type == I40E_VSI_FCOE) {
4220 dev_dbg(&vsi->back->pdev->dev,
4221 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4225 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4226 if (vsi->netdev && netif_running(vsi->netdev))
4227 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4229 i40e_vsi_close(vsi);
4233 * i40e_unquiesce_vsi - Resume a given VSI
4234 * @vsi: the VSI being resumed
4236 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4238 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4241 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4242 if (vsi->netdev && netif_running(vsi->netdev))
4243 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4245 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4249 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4252 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4256 for (v = 0; v < pf->num_alloc_vsi; v++) {
4258 i40e_quiesce_vsi(pf->vsi[v]);
4263 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4266 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4270 for (v = 0; v < pf->num_alloc_vsi; v++) {
4272 i40e_unquiesce_vsi(pf->vsi[v]);
4276 #ifdef CONFIG_I40E_DCB
4278 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4279 * @vsi: the VSI being configured
4281 * This function waits for the given VSI's Tx queues to be disabled.
4283 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4285 struct i40e_pf *pf = vsi->back;
4288 pf_q = vsi->base_queue;
4289 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4290 /* Check and wait for the disable status of the queue */
4291 ret = i40e_pf_txq_wait(pf, pf_q, false);
4293 dev_info(&pf->pdev->dev,
4294 "VSI seid %d Tx ring %d disable timeout\n",
4304 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4307 * This function waits for the Tx queues to be in disabled state for all the
4308 * VSIs that are managed by this PF.
4310 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4314 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4315 /* No need to wait for FCoE VSI queues */
4316 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4317 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4329 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4330 * @q_idx: TX queue number
4331 * @vsi: Pointer to VSI struct
4333 * This function checks specified queue for given VSI. Detects hung condition.
4334 * Sets hung bit since it is two step process. Before next run of service task
4335 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4336 * hung condition remain unchanged and during subsequent run, this function
4337 * issues SW interrupt to recover from hung condition.
4339 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4341 struct i40e_ring *tx_ring = NULL;
4343 u32 head, val, tx_pending;
4348 /* now that we have an index, find the tx_ring struct */
4349 for (i = 0; i < vsi->num_queue_pairs; i++) {
4350 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4351 if (q_idx == vsi->tx_rings[i]->queue_index) {
4352 tx_ring = vsi->tx_rings[i];
4361 /* Read interrupt register */
4362 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4364 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4365 tx_ring->vsi->base_vector - 1));
4367 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4369 head = i40e_get_head(tx_ring);
4371 tx_pending = i40e_get_tx_pending(tx_ring);
4373 /* Interrupts are disabled and TX pending is non-zero,
4374 * trigger the SW interrupt (don't wait). Worst case
4375 * there will be one extra interrupt which may result
4376 * into not cleaning any queues because queues are cleaned.
4378 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4379 i40e_force_wb(vsi, tx_ring->q_vector);
4383 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4384 * @pf: pointer to PF struct
4386 * LAN VSI has netdev and netdev has TX queues. This function is to check
4387 * each of those TX queues if they are hung, trigger recovery by issuing
4390 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4392 struct net_device *netdev;
4393 struct i40e_vsi *vsi;
4396 /* Only for LAN VSI */
4397 vsi = pf->vsi[pf->lan_vsi];
4402 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4403 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4404 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4407 /* Make sure type is MAIN VSI */
4408 if (vsi->type != I40E_VSI_MAIN)
4411 netdev = vsi->netdev;
4415 /* Bail out if netif_carrier is not OK */
4416 if (!netif_carrier_ok(netdev))
4419 /* Go thru' TX queues for netdev */
4420 for (i = 0; i < netdev->num_tx_queues; i++) {
4421 struct netdev_queue *q;
4423 q = netdev_get_tx_queue(netdev, i);
4425 i40e_detect_recover_hung_queue(i, vsi);
4430 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4431 * @pf: pointer to PF
4433 * Get TC map for ISCSI PF type that will include iSCSI TC
4436 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4438 struct i40e_dcb_app_priority_table app;
4439 struct i40e_hw *hw = &pf->hw;
4440 u8 enabled_tc = 1; /* TC0 is always enabled */
4442 /* Get the iSCSI APP TLV */
4443 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4445 for (i = 0; i < dcbcfg->numapps; i++) {
4446 app = dcbcfg->app[i];
4447 if (app.selector == I40E_APP_SEL_TCPIP &&
4448 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4449 tc = dcbcfg->etscfg.prioritytable[app.priority];
4450 enabled_tc |= BIT_ULL(tc);
4459 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4460 * @dcbcfg: the corresponding DCBx configuration structure
4462 * Return the number of TCs from given DCBx configuration
4464 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4469 /* Scan the ETS Config Priority Table to find
4470 * traffic class enabled for a given priority
4471 * and use the traffic class index to get the
4472 * number of traffic classes enabled
4474 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4475 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4476 num_tc = dcbcfg->etscfg.prioritytable[i];
4479 /* Traffic class index starts from zero so
4480 * increment to return the actual count
4486 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4487 * @dcbcfg: the corresponding DCBx configuration structure
4489 * Query the current DCB configuration and return the number of
4490 * traffic classes enabled from the given DCBX config
4492 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4494 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4498 for (i = 0; i < num_tc; i++)
4499 enabled_tc |= BIT(i);
4505 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4506 * @pf: PF being queried
4508 * Return number of traffic classes enabled for the given PF
4510 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4512 struct i40e_hw *hw = &pf->hw;
4515 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4517 /* If DCB is not enabled then always in single TC */
4518 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4521 /* SFP mode will be enabled for all TCs on port */
4522 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4523 return i40e_dcb_get_num_tc(dcbcfg);
4525 /* MFP mode return count of enabled TCs for this PF */
4526 if (pf->hw.func_caps.iscsi)
4527 enabled_tc = i40e_get_iscsi_tc_map(pf);
4529 return 1; /* Only TC0 */
4531 /* At least have TC0 */
4532 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4533 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4534 if (enabled_tc & BIT_ULL(i))
4541 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4542 * @pf: PF being queried
4544 * Return a bitmap for first enabled traffic class for this PF.
4546 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4548 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4552 return 0x1; /* TC0 */
4554 /* Find the first enabled TC */
4555 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4556 if (enabled_tc & BIT_ULL(i))
4564 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4565 * @pf: PF being queried
4567 * Return a bitmap for enabled traffic classes for this PF.
4569 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4571 /* If DCB is not enabled for this PF then just return default TC */
4572 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4573 return i40e_pf_get_default_tc(pf);
4575 /* SFP mode we want PF to be enabled for all TCs */
4576 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4577 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4579 /* MFP enabled and iSCSI PF type */
4580 if (pf->hw.func_caps.iscsi)
4581 return i40e_get_iscsi_tc_map(pf);
4583 return i40e_pf_get_default_tc(pf);
4587 * i40e_vsi_get_bw_info - Query VSI BW Information
4588 * @vsi: the VSI being queried
4590 * Returns 0 on success, negative value on failure
4592 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4594 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4595 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4596 struct i40e_pf *pf = vsi->back;
4597 struct i40e_hw *hw = &pf->hw;
4602 /* Get the VSI level BW configuration */
4603 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4605 dev_info(&pf->pdev->dev,
4606 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4607 i40e_stat_str(&pf->hw, ret),
4608 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4612 /* Get the VSI level BW configuration per TC */
4613 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4616 dev_info(&pf->pdev->dev,
4617 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4618 i40e_stat_str(&pf->hw, ret),
4619 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4623 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4624 dev_info(&pf->pdev->dev,
4625 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4626 bw_config.tc_valid_bits,
4627 bw_ets_config.tc_valid_bits);
4628 /* Still continuing */
4631 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4632 vsi->bw_max_quanta = bw_config.max_bw;
4633 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4634 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4635 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4636 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4637 vsi->bw_ets_limit_credits[i] =
4638 le16_to_cpu(bw_ets_config.credits[i]);
4639 /* 3 bits out of 4 for each TC */
4640 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4647 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4648 * @vsi: the VSI being configured
4649 * @enabled_tc: TC bitmap
4650 * @bw_credits: BW shared credits per TC
4652 * Returns 0 on success, negative value on failure
4654 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4657 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4661 bw_data.tc_valid_bits = enabled_tc;
4662 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4663 bw_data.tc_bw_credits[i] = bw_share[i];
4665 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4668 dev_info(&vsi->back->pdev->dev,
4669 "AQ command Config VSI BW allocation per TC failed = %d\n",
4670 vsi->back->hw.aq.asq_last_status);
4674 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4675 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4681 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4682 * @vsi: the VSI being configured
4683 * @enabled_tc: TC map to be enabled
4686 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4688 struct net_device *netdev = vsi->netdev;
4689 struct i40e_pf *pf = vsi->back;
4690 struct i40e_hw *hw = &pf->hw;
4693 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4699 netdev_reset_tc(netdev);
4703 /* Set up actual enabled TCs on the VSI */
4704 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4707 /* set per TC queues for the VSI */
4708 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4709 /* Only set TC queues for enabled tcs
4711 * e.g. For a VSI that has TC0 and TC3 enabled the
4712 * enabled_tc bitmap would be 0x00001001; the driver
4713 * will set the numtc for netdev as 2 that will be
4714 * referenced by the netdev layer as TC 0 and 1.
4716 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4717 netdev_set_tc_queue(netdev,
4718 vsi->tc_config.tc_info[i].netdev_tc,
4719 vsi->tc_config.tc_info[i].qcount,
4720 vsi->tc_config.tc_info[i].qoffset);
4723 /* Assign UP2TC map for the VSI */
4724 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4725 /* Get the actual TC# for the UP */
4726 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4727 /* Get the mapped netdev TC# for the UP */
4728 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4729 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4734 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4735 * @vsi: the VSI being configured
4736 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4738 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4739 struct i40e_vsi_context *ctxt)
4741 /* copy just the sections touched not the entire info
4742 * since not all sections are valid as returned by
4745 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4746 memcpy(&vsi->info.queue_mapping,
4747 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4748 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4749 sizeof(vsi->info.tc_mapping));
4753 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4754 * @vsi: VSI to be configured
4755 * @enabled_tc: TC bitmap
4757 * This configures a particular VSI for TCs that are mapped to the
4758 * given TC bitmap. It uses default bandwidth share for TCs across
4759 * VSIs to configure TC for a particular VSI.
4762 * It is expected that the VSI queues have been quisced before calling
4765 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4767 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4768 struct i40e_vsi_context ctxt;
4772 /* Check if enabled_tc is same as existing or new TCs */
4773 if (vsi->tc_config.enabled_tc == enabled_tc)
4776 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4777 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4778 if (enabled_tc & BIT_ULL(i))
4782 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4784 dev_info(&vsi->back->pdev->dev,
4785 "Failed configuring TC map %d for VSI %d\n",
4786 enabled_tc, vsi->seid);
4790 /* Update Queue Pairs Mapping for currently enabled UPs */
4791 ctxt.seid = vsi->seid;
4792 ctxt.pf_num = vsi->back->hw.pf_id;
4794 ctxt.uplink_seid = vsi->uplink_seid;
4795 ctxt.info = vsi->info;
4796 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4798 /* Update the VSI after updating the VSI queue-mapping information */
4799 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4801 dev_info(&vsi->back->pdev->dev,
4802 "Update vsi tc config failed, err %s aq_err %s\n",
4803 i40e_stat_str(&vsi->back->hw, ret),
4804 i40e_aq_str(&vsi->back->hw,
4805 vsi->back->hw.aq.asq_last_status));
4808 /* update the local VSI info with updated queue map */
4809 i40e_vsi_update_queue_map(vsi, &ctxt);
4810 vsi->info.valid_sections = 0;
4812 /* Update current VSI BW information */
4813 ret = i40e_vsi_get_bw_info(vsi);
4815 dev_info(&vsi->back->pdev->dev,
4816 "Failed updating vsi bw info, err %s aq_err %s\n",
4817 i40e_stat_str(&vsi->back->hw, ret),
4818 i40e_aq_str(&vsi->back->hw,
4819 vsi->back->hw.aq.asq_last_status));
4823 /* Update the netdev TC setup */
4824 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4830 * i40e_veb_config_tc - Configure TCs for given VEB
4832 * @enabled_tc: TC bitmap
4834 * Configures given TC bitmap for VEB (switching) element
4836 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4838 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4839 struct i40e_pf *pf = veb->pf;
4843 /* No TCs or already enabled TCs just return */
4844 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4847 bw_data.tc_valid_bits = enabled_tc;
4848 /* bw_data.absolute_credits is not set (relative) */
4850 /* Enable ETS TCs with equal BW Share for now */
4851 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4852 if (enabled_tc & BIT_ULL(i))
4853 bw_data.tc_bw_share_credits[i] = 1;
4856 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4859 dev_info(&pf->pdev->dev,
4860 "VEB bw config failed, err %s aq_err %s\n",
4861 i40e_stat_str(&pf->hw, ret),
4862 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4866 /* Update the BW information */
4867 ret = i40e_veb_get_bw_info(veb);
4869 dev_info(&pf->pdev->dev,
4870 "Failed getting veb bw config, err %s aq_err %s\n",
4871 i40e_stat_str(&pf->hw, ret),
4872 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4879 #ifdef CONFIG_I40E_DCB
4881 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4884 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4885 * the caller would've quiesce all the VSIs before calling
4888 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4894 /* Enable the TCs available on PF to all VEBs */
4895 tc_map = i40e_pf_get_tc_map(pf);
4896 for (v = 0; v < I40E_MAX_VEB; v++) {
4899 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4901 dev_info(&pf->pdev->dev,
4902 "Failed configuring TC for VEB seid=%d\n",
4904 /* Will try to configure as many components */
4908 /* Update each VSI */
4909 for (v = 0; v < pf->num_alloc_vsi; v++) {
4913 /* - Enable all TCs for the LAN VSI
4915 * - For FCoE VSI only enable the TC configured
4916 * as per the APP TLV
4918 * - For all others keep them at TC0 for now
4920 if (v == pf->lan_vsi)
4921 tc_map = i40e_pf_get_tc_map(pf);
4923 tc_map = i40e_pf_get_default_tc(pf);
4925 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4926 tc_map = i40e_get_fcoe_tc_map(pf);
4927 #endif /* #ifdef I40E_FCOE */
4929 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4931 dev_info(&pf->pdev->dev,
4932 "Failed configuring TC for VSI seid=%d\n",
4934 /* Will try to configure as many components */
4936 /* Re-configure VSI vectors based on updated TC map */
4937 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4938 if (pf->vsi[v]->netdev)
4939 i40e_dcbnl_set_all(pf->vsi[v]);
4945 * i40e_resume_port_tx - Resume port Tx
4948 * Resume a port's Tx and issue a PF reset in case of failure to
4951 static int i40e_resume_port_tx(struct i40e_pf *pf)
4953 struct i40e_hw *hw = &pf->hw;
4956 ret = i40e_aq_resume_port_tx(hw, NULL);
4958 dev_info(&pf->pdev->dev,
4959 "Resume Port Tx failed, err %s aq_err %s\n",
4960 i40e_stat_str(&pf->hw, ret),
4961 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4962 /* Schedule PF reset to recover */
4963 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4964 i40e_service_event_schedule(pf);
4971 * i40e_init_pf_dcb - Initialize DCB configuration
4972 * @pf: PF being configured
4974 * Query the current DCB configuration and cache it
4975 * in the hardware structure
4977 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4979 struct i40e_hw *hw = &pf->hw;
4982 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4983 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4984 (pf->hw.aq.fw_maj_ver < 4))
4987 /* Get the initial DCB configuration */
4988 err = i40e_init_dcb(hw);
4990 /* Device/Function is not DCBX capable */
4991 if ((!hw->func_caps.dcb) ||
4992 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4993 dev_info(&pf->pdev->dev,
4994 "DCBX offload is not supported or is disabled for this PF.\n");
4996 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5000 /* When status is not DISABLED then DCBX in FW */
5001 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5002 DCB_CAP_DCBX_VER_IEEE;
5004 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5005 /* Enable DCB tagging only when more than one TC */
5006 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5007 pf->flags |= I40E_FLAG_DCB_ENABLED;
5008 dev_dbg(&pf->pdev->dev,
5009 "DCBX offload is supported for this PF.\n");
5012 dev_info(&pf->pdev->dev,
5013 "Query for DCB configuration failed, err %s aq_err %s\n",
5014 i40e_stat_str(&pf->hw, err),
5015 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5021 #endif /* CONFIG_I40E_DCB */
5022 #define SPEED_SIZE 14
5025 * i40e_print_link_message - print link up or down
5026 * @vsi: the VSI for which link needs a message
5028 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5030 char *speed = "Unknown";
5031 char *fc = "Unknown";
5033 if (vsi->current_isup == isup)
5035 vsi->current_isup = isup;
5037 netdev_info(vsi->netdev, "NIC Link is Down\n");
5041 /* Warn user if link speed on NPAR enabled partition is not at
5044 if (vsi->back->hw.func_caps.npar_enable &&
5045 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5046 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5047 netdev_warn(vsi->netdev,
5048 "The partition detected link speed that is less than 10Gbps\n");
5050 switch (vsi->back->hw.phy.link_info.link_speed) {
5051 case I40E_LINK_SPEED_40GB:
5054 case I40E_LINK_SPEED_20GB:
5057 case I40E_LINK_SPEED_10GB:
5060 case I40E_LINK_SPEED_1GB:
5063 case I40E_LINK_SPEED_100MB:
5070 switch (vsi->back->hw.fc.current_mode) {
5074 case I40E_FC_TX_PAUSE:
5077 case I40E_FC_RX_PAUSE:
5085 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5090 * i40e_up_complete - Finish the last steps of bringing up a connection
5091 * @vsi: the VSI being configured
5093 static int i40e_up_complete(struct i40e_vsi *vsi)
5095 struct i40e_pf *pf = vsi->back;
5098 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5099 i40e_vsi_configure_msix(vsi);
5101 i40e_configure_msi_and_legacy(vsi);
5104 err = i40e_vsi_control_rings(vsi, true);
5108 clear_bit(__I40E_DOWN, &vsi->state);
5109 i40e_napi_enable_all(vsi);
5110 i40e_vsi_enable_irq(vsi);
5112 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5114 i40e_print_link_message(vsi, true);
5115 netif_tx_start_all_queues(vsi->netdev);
5116 netif_carrier_on(vsi->netdev);
5117 } else if (vsi->netdev) {
5118 i40e_print_link_message(vsi, false);
5119 /* need to check for qualified module here*/
5120 if ((pf->hw.phy.link_info.link_info &
5121 I40E_AQ_MEDIA_AVAILABLE) &&
5122 (!(pf->hw.phy.link_info.an_info &
5123 I40E_AQ_QUALIFIED_MODULE)))
5124 netdev_err(vsi->netdev,
5125 "the driver failed to link because an unqualified module was detected.");
5128 /* replay FDIR SB filters */
5129 if (vsi->type == I40E_VSI_FDIR) {
5130 /* reset fd counters */
5131 pf->fd_add_err = pf->fd_atr_cnt = 0;
5132 if (pf->fd_tcp_rule > 0) {
5133 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5134 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5135 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5136 pf->fd_tcp_rule = 0;
5138 i40e_fdir_filter_restore(vsi);
5140 i40e_service_event_schedule(pf);
5146 * i40e_vsi_reinit_locked - Reset the VSI
5147 * @vsi: the VSI being configured
5149 * Rebuild the ring structs after some configuration
5150 * has changed, e.g. MTU size.
5152 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5154 struct i40e_pf *pf = vsi->back;
5156 WARN_ON(in_interrupt());
5157 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5158 usleep_range(1000, 2000);
5161 /* Give a VF some time to respond to the reset. The
5162 * two second wait is based upon the watchdog cycle in
5165 if (vsi->type == I40E_VSI_SRIOV)
5168 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5172 * i40e_up - Bring the connection back up after being down
5173 * @vsi: the VSI being configured
5175 int i40e_up(struct i40e_vsi *vsi)
5179 err = i40e_vsi_configure(vsi);
5181 err = i40e_up_complete(vsi);
5187 * i40e_down - Shutdown the connection processing
5188 * @vsi: the VSI being stopped
5190 void i40e_down(struct i40e_vsi *vsi)
5194 /* It is assumed that the caller of this function
5195 * sets the vsi->state __I40E_DOWN bit.
5198 netif_carrier_off(vsi->netdev);
5199 netif_tx_disable(vsi->netdev);
5201 i40e_vsi_disable_irq(vsi);
5202 i40e_vsi_control_rings(vsi, false);
5203 i40e_napi_disable_all(vsi);
5205 for (i = 0; i < vsi->num_queue_pairs; i++) {
5206 i40e_clean_tx_ring(vsi->tx_rings[i]);
5207 i40e_clean_rx_ring(vsi->rx_rings[i]);
5212 * i40e_setup_tc - configure multiple traffic classes
5213 * @netdev: net device to configure
5214 * @tc: number of traffic classes to enable
5217 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5219 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5222 struct i40e_netdev_priv *np = netdev_priv(netdev);
5223 struct i40e_vsi *vsi = np->vsi;
5224 struct i40e_pf *pf = vsi->back;
5229 /* Check if DCB enabled to continue */
5230 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5231 netdev_info(netdev, "DCB is not enabled for adapter\n");
5235 /* Check if MFP enabled */
5236 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5237 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5241 /* Check whether tc count is within enabled limit */
5242 if (tc > i40e_pf_get_num_tc(pf)) {
5243 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5247 /* Generate TC map for number of tc requested */
5248 for (i = 0; i < tc; i++)
5249 enabled_tc |= BIT_ULL(i);
5251 /* Requesting same TC configuration as already enabled */
5252 if (enabled_tc == vsi->tc_config.enabled_tc)
5255 /* Quiesce VSI queues */
5256 i40e_quiesce_vsi(vsi);
5258 /* Configure VSI for enabled TCs */
5259 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5261 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5267 i40e_unquiesce_vsi(vsi);
5274 * i40e_open - Called when a network interface is made active
5275 * @netdev: network interface device structure
5277 * The open entry point is called when a network interface is made
5278 * active by the system (IFF_UP). At this point all resources needed
5279 * for transmit and receive operations are allocated, the interrupt
5280 * handler is registered with the OS, the netdev watchdog subtask is
5281 * enabled, and the stack is notified that the interface is ready.
5283 * Returns 0 on success, negative value on failure
5285 int i40e_open(struct net_device *netdev)
5287 struct i40e_netdev_priv *np = netdev_priv(netdev);
5288 struct i40e_vsi *vsi = np->vsi;
5289 struct i40e_pf *pf = vsi->back;
5292 /* disallow open during test or if eeprom is broken */
5293 if (test_bit(__I40E_TESTING, &pf->state) ||
5294 test_bit(__I40E_BAD_EEPROM, &pf->state))
5297 netif_carrier_off(netdev);
5299 err = i40e_vsi_open(vsi);
5303 /* configure global TSO hardware offload settings */
5304 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5305 TCP_FLAG_FIN) >> 16);
5306 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5308 TCP_FLAG_CWR) >> 16);
5309 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5311 #ifdef CONFIG_I40E_VXLAN
5312 vxlan_get_rx_port(netdev);
5320 * @vsi: the VSI to open
5322 * Finish initialization of the VSI.
5324 * Returns 0 on success, negative value on failure
5326 int i40e_vsi_open(struct i40e_vsi *vsi)
5328 struct i40e_pf *pf = vsi->back;
5329 char int_name[I40E_INT_NAME_STR_LEN];
5332 /* allocate descriptors */
5333 err = i40e_vsi_setup_tx_resources(vsi);
5336 err = i40e_vsi_setup_rx_resources(vsi);
5340 err = i40e_vsi_configure(vsi);
5345 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5346 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5347 err = i40e_vsi_request_irq(vsi, int_name);
5351 /* Notify the stack of the actual queue counts. */
5352 err = netif_set_real_num_tx_queues(vsi->netdev,
5353 vsi->num_queue_pairs);
5355 goto err_set_queues;
5357 err = netif_set_real_num_rx_queues(vsi->netdev,
5358 vsi->num_queue_pairs);
5360 goto err_set_queues;
5362 } else if (vsi->type == I40E_VSI_FDIR) {
5363 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5364 dev_driver_string(&pf->pdev->dev),
5365 dev_name(&pf->pdev->dev));
5366 err = i40e_vsi_request_irq(vsi, int_name);
5373 err = i40e_up_complete(vsi);
5375 goto err_up_complete;
5382 i40e_vsi_free_irq(vsi);
5384 i40e_vsi_free_rx_resources(vsi);
5386 i40e_vsi_free_tx_resources(vsi);
5387 if (vsi == pf->vsi[pf->lan_vsi])
5388 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5394 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5395 * @pf: Pointer to PF
5397 * This function destroys the hlist where all the Flow Director
5398 * filters were saved.
5400 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5402 struct i40e_fdir_filter *filter;
5403 struct hlist_node *node2;
5405 hlist_for_each_entry_safe(filter, node2,
5406 &pf->fdir_filter_list, fdir_node) {
5407 hlist_del(&filter->fdir_node);
5410 pf->fdir_pf_active_filters = 0;
5414 * i40e_close - Disables a network interface
5415 * @netdev: network interface device structure
5417 * The close entry point is called when an interface is de-activated
5418 * by the OS. The hardware is still under the driver's control, but
5419 * this netdev interface is disabled.
5421 * Returns 0, this is not allowed to fail
5424 int i40e_close(struct net_device *netdev)
5426 static int i40e_close(struct net_device *netdev)
5429 struct i40e_netdev_priv *np = netdev_priv(netdev);
5430 struct i40e_vsi *vsi = np->vsi;
5432 i40e_vsi_close(vsi);
5438 * i40e_do_reset - Start a PF or Core Reset sequence
5439 * @pf: board private structure
5440 * @reset_flags: which reset is requested
5442 * The essential difference in resets is that the PF Reset
5443 * doesn't clear the packet buffers, doesn't reset the PE
5444 * firmware, and doesn't bother the other PFs on the chip.
5446 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5450 WARN_ON(in_interrupt());
5452 if (i40e_check_asq_alive(&pf->hw))
5453 i40e_vc_notify_reset(pf);
5455 /* do the biggest reset indicated */
5456 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5458 /* Request a Global Reset
5460 * This will start the chip's countdown to the actual full
5461 * chip reset event, and a warning interrupt to be sent
5462 * to all PFs, including the requestor. Our handler
5463 * for the warning interrupt will deal with the shutdown
5464 * and recovery of the switch setup.
5466 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5467 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5468 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5469 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5471 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5473 /* Request a Core Reset
5475 * Same as Global Reset, except does *not* include the MAC/PHY
5477 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5478 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5479 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5480 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5481 i40e_flush(&pf->hw);
5483 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5485 /* Request a PF Reset
5487 * Resets only the PF-specific registers
5489 * This goes directly to the tear-down and rebuild of
5490 * the switch, since we need to do all the recovery as
5491 * for the Core Reset.
5493 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5494 i40e_handle_reset_warning(pf);
5496 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5499 /* Find the VSI(s) that requested a re-init */
5500 dev_info(&pf->pdev->dev,
5501 "VSI reinit requested\n");
5502 for (v = 0; v < pf->num_alloc_vsi; v++) {
5503 struct i40e_vsi *vsi = pf->vsi[v];
5506 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5507 i40e_vsi_reinit_locked(pf->vsi[v]);
5508 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5511 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5514 /* Find the VSI(s) that needs to be brought down */
5515 dev_info(&pf->pdev->dev, "VSI down requested\n");
5516 for (v = 0; v < pf->num_alloc_vsi; v++) {
5517 struct i40e_vsi *vsi = pf->vsi[v];
5520 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5521 set_bit(__I40E_DOWN, &vsi->state);
5523 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5527 dev_info(&pf->pdev->dev,
5528 "bad reset request 0x%08x\n", reset_flags);
5532 #ifdef CONFIG_I40E_DCB
5534 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5535 * @pf: board private structure
5536 * @old_cfg: current DCB config
5537 * @new_cfg: new DCB config
5539 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5540 struct i40e_dcbx_config *old_cfg,
5541 struct i40e_dcbx_config *new_cfg)
5543 bool need_reconfig = false;
5545 /* Check if ETS configuration has changed */
5546 if (memcmp(&new_cfg->etscfg,
5548 sizeof(new_cfg->etscfg))) {
5549 /* If Priority Table has changed reconfig is needed */
5550 if (memcmp(&new_cfg->etscfg.prioritytable,
5551 &old_cfg->etscfg.prioritytable,
5552 sizeof(new_cfg->etscfg.prioritytable))) {
5553 need_reconfig = true;
5554 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5557 if (memcmp(&new_cfg->etscfg.tcbwtable,
5558 &old_cfg->etscfg.tcbwtable,
5559 sizeof(new_cfg->etscfg.tcbwtable)))
5560 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5562 if (memcmp(&new_cfg->etscfg.tsatable,
5563 &old_cfg->etscfg.tsatable,
5564 sizeof(new_cfg->etscfg.tsatable)))
5565 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5568 /* Check if PFC configuration has changed */
5569 if (memcmp(&new_cfg->pfc,
5571 sizeof(new_cfg->pfc))) {
5572 need_reconfig = true;
5573 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5576 /* Check if APP Table has changed */
5577 if (memcmp(&new_cfg->app,
5579 sizeof(new_cfg->app))) {
5580 need_reconfig = true;
5581 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5584 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5585 return need_reconfig;
5589 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5590 * @pf: board private structure
5591 * @e: event info posted on ARQ
5593 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5594 struct i40e_arq_event_info *e)
5596 struct i40e_aqc_lldp_get_mib *mib =
5597 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5598 struct i40e_hw *hw = &pf->hw;
5599 struct i40e_dcbx_config tmp_dcbx_cfg;
5600 bool need_reconfig = false;
5604 /* Not DCB capable or capability disabled */
5605 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5608 /* Ignore if event is not for Nearest Bridge */
5609 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5610 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5611 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5612 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5615 /* Check MIB Type and return if event for Remote MIB update */
5616 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5617 dev_dbg(&pf->pdev->dev,
5618 "LLDP event mib type %s\n", type ? "remote" : "local");
5619 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5620 /* Update the remote cached instance and return */
5621 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5622 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5623 &hw->remote_dcbx_config);
5627 /* Store the old configuration */
5628 tmp_dcbx_cfg = hw->local_dcbx_config;
5630 /* Reset the old DCBx configuration data */
5631 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5632 /* Get updated DCBX data from firmware */
5633 ret = i40e_get_dcb_config(&pf->hw);
5635 dev_info(&pf->pdev->dev,
5636 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5637 i40e_stat_str(&pf->hw, ret),
5638 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5642 /* No change detected in DCBX configs */
5643 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5644 sizeof(tmp_dcbx_cfg))) {
5645 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5649 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5650 &hw->local_dcbx_config);
5652 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5657 /* Enable DCB tagging only when more than one TC */
5658 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5659 pf->flags |= I40E_FLAG_DCB_ENABLED;
5661 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5663 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5664 /* Reconfiguration needed quiesce all VSIs */
5665 i40e_pf_quiesce_all_vsi(pf);
5667 /* Changes in configuration update VEB/VSI */
5668 i40e_dcb_reconfigure(pf);
5670 ret = i40e_resume_port_tx(pf);
5672 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5673 /* In case of error no point in resuming VSIs */
5677 /* Wait for the PF's Tx queues to be disabled */
5678 ret = i40e_pf_wait_txq_disabled(pf);
5680 /* Schedule PF reset to recover */
5681 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5682 i40e_service_event_schedule(pf);
5684 i40e_pf_unquiesce_all_vsi(pf);
5690 #endif /* CONFIG_I40E_DCB */
5693 * i40e_do_reset_safe - Protected reset path for userland calls.
5694 * @pf: board private structure
5695 * @reset_flags: which reset is requested
5698 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5701 i40e_do_reset(pf, reset_flags);
5706 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5707 * @pf: board private structure
5708 * @e: event info posted on ARQ
5710 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5713 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5714 struct i40e_arq_event_info *e)
5716 struct i40e_aqc_lan_overflow *data =
5717 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5718 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5719 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5720 struct i40e_hw *hw = &pf->hw;
5724 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5727 /* Queue belongs to VF, find the VF and issue VF reset */
5728 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5729 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5730 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5731 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5732 vf_id -= hw->func_caps.vf_base_id;
5733 vf = &pf->vf[vf_id];
5734 i40e_vc_notify_vf_reset(vf);
5735 /* Allow VF to process pending reset notification */
5737 i40e_reset_vf(vf, false);
5742 * i40e_service_event_complete - Finish up the service event
5743 * @pf: board private structure
5745 static void i40e_service_event_complete(struct i40e_pf *pf)
5747 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5749 /* flush memory to make sure state is correct before next watchog */
5750 smp_mb__before_atomic();
5751 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5755 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5756 * @pf: board private structure
5758 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5762 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5763 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5768 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5769 * @pf: board private structure
5771 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5775 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5776 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5777 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5778 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5783 * i40e_get_global_fd_count - Get total FD filters programmed on device
5784 * @pf: board private structure
5786 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5790 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5791 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5792 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5793 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5798 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5799 * @pf: board private structure
5801 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5803 struct i40e_fdir_filter *filter;
5804 u32 fcnt_prog, fcnt_avail;
5805 struct hlist_node *node;
5807 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5810 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5813 fcnt_prog = i40e_get_global_fd_count(pf);
5814 fcnt_avail = pf->fdir_pf_filter_count;
5815 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5816 (pf->fd_add_err == 0) ||
5817 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5818 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5819 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5820 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5821 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5822 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5825 /* Wait for some more space to be available to turn on ATR */
5826 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5827 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5828 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5829 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5830 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5831 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5835 /* if hw had a problem adding a filter, delete it */
5836 if (pf->fd_inv > 0) {
5837 hlist_for_each_entry_safe(filter, node,
5838 &pf->fdir_filter_list, fdir_node) {
5839 if (filter->fd_id == pf->fd_inv) {
5840 hlist_del(&filter->fdir_node);
5842 pf->fdir_pf_active_filters--;
5848 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5849 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5851 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5852 * @pf: board private structure
5854 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5856 unsigned long min_flush_time;
5857 int flush_wait_retry = 50;
5858 bool disable_atr = false;
5862 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5865 if (!time_after(jiffies, pf->fd_flush_timestamp +
5866 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5869 /* If the flush is happening too quick and we have mostly SB rules we
5870 * should not re-enable ATR for some time.
5872 min_flush_time = pf->fd_flush_timestamp +
5873 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5874 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5876 if (!(time_after(jiffies, min_flush_time)) &&
5877 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5878 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5879 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5883 pf->fd_flush_timestamp = jiffies;
5884 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5885 /* flush all filters */
5886 wr32(&pf->hw, I40E_PFQF_CTL_1,
5887 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5888 i40e_flush(&pf->hw);
5892 /* Check FD flush status every 5-6msec */
5893 usleep_range(5000, 6000);
5894 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5895 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5897 } while (flush_wait_retry--);
5898 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5899 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5901 /* replay sideband filters */
5902 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5904 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5905 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5906 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5907 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5913 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5914 * @pf: board private structure
5916 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5918 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5921 /* We can see up to 256 filter programming desc in transit if the filters are
5922 * being applied really fast; before we see the first
5923 * filter miss error on Rx queue 0. Accumulating enough error messages before
5924 * reacting will make sure we don't cause flush too often.
5926 #define I40E_MAX_FD_PROGRAM_ERROR 256
5929 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5930 * @pf: board private structure
5932 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5935 /* if interface is down do nothing */
5936 if (test_bit(__I40E_DOWN, &pf->state))
5939 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5942 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5943 i40e_fdir_flush_and_replay(pf);
5945 i40e_fdir_check_and_reenable(pf);
5950 * i40e_vsi_link_event - notify VSI of a link event
5951 * @vsi: vsi to be notified
5952 * @link_up: link up or down
5954 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5956 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5959 switch (vsi->type) {
5964 if (!vsi->netdev || !vsi->netdev_registered)
5968 netif_carrier_on(vsi->netdev);
5969 netif_tx_wake_all_queues(vsi->netdev);
5971 netif_carrier_off(vsi->netdev);
5972 netif_tx_stop_all_queues(vsi->netdev);
5976 case I40E_VSI_SRIOV:
5977 case I40E_VSI_VMDQ2:
5979 case I40E_VSI_MIRROR:
5981 /* there is no notification for other VSIs */
5987 * i40e_veb_link_event - notify elements on the veb of a link event
5988 * @veb: veb to be notified
5989 * @link_up: link up or down
5991 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5996 if (!veb || !veb->pf)
6000 /* depth first... */
6001 for (i = 0; i < I40E_MAX_VEB; i++)
6002 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6003 i40e_veb_link_event(pf->veb[i], link_up);
6005 /* ... now the local VSIs */
6006 for (i = 0; i < pf->num_alloc_vsi; i++)
6007 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6008 i40e_vsi_link_event(pf->vsi[i], link_up);
6012 * i40e_link_event - Update netif_carrier status
6013 * @pf: board private structure
6015 static void i40e_link_event(struct i40e_pf *pf)
6017 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6018 u8 new_link_speed, old_link_speed;
6020 bool new_link, old_link;
6022 /* save off old link status information */
6023 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6025 /* set this to force the get_link_status call to refresh state */
6026 pf->hw.phy.get_link_info = true;
6028 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6030 status = i40e_get_link_status(&pf->hw, &new_link);
6032 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6037 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6038 new_link_speed = pf->hw.phy.link_info.link_speed;
6040 if (new_link == old_link &&
6041 new_link_speed == old_link_speed &&
6042 (test_bit(__I40E_DOWN, &vsi->state) ||
6043 new_link == netif_carrier_ok(vsi->netdev)))
6046 if (!test_bit(__I40E_DOWN, &vsi->state))
6047 i40e_print_link_message(vsi, new_link);
6049 /* Notify the base of the switch tree connected to
6050 * the link. Floating VEBs are not notified.
6052 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6053 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6055 i40e_vsi_link_event(vsi, new_link);
6058 i40e_vc_notify_link_state(pf);
6060 if (pf->flags & I40E_FLAG_PTP)
6061 i40e_ptp_set_increment(pf);
6065 * i40e_watchdog_subtask - periodic checks not using event driven response
6066 * @pf: board private structure
6068 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6072 /* if interface is down do nothing */
6073 if (test_bit(__I40E_DOWN, &pf->state) ||
6074 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6077 /* make sure we don't do these things too often */
6078 if (time_before(jiffies, (pf->service_timer_previous +
6079 pf->service_timer_period)))
6081 pf->service_timer_previous = jiffies;
6083 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6084 i40e_link_event(pf);
6086 /* Update the stats for active netdevs so the network stack
6087 * can look at updated numbers whenever it cares to
6089 for (i = 0; i < pf->num_alloc_vsi; i++)
6090 if (pf->vsi[i] && pf->vsi[i]->netdev)
6091 i40e_update_stats(pf->vsi[i]);
6093 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6094 /* Update the stats for the active switching components */
6095 for (i = 0; i < I40E_MAX_VEB; i++)
6097 i40e_update_veb_stats(pf->veb[i]);
6100 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6104 * i40e_reset_subtask - Set up for resetting the device and driver
6105 * @pf: board private structure
6107 static void i40e_reset_subtask(struct i40e_pf *pf)
6109 u32 reset_flags = 0;
6112 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6113 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
6114 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6116 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6117 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
6118 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6120 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6121 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
6122 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6124 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6125 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
6126 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6128 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6129 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
6130 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6133 /* If there's a recovery already waiting, it takes
6134 * precedence before starting a new reset sequence.
6136 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6137 i40e_handle_reset_warning(pf);
6141 /* If we're already down or resetting, just bail */
6143 !test_bit(__I40E_DOWN, &pf->state) &&
6144 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6145 i40e_do_reset(pf, reset_flags);
6152 * i40e_handle_link_event - Handle link event
6153 * @pf: board private structure
6154 * @e: event info posted on ARQ
6156 static void i40e_handle_link_event(struct i40e_pf *pf,
6157 struct i40e_arq_event_info *e)
6159 struct i40e_aqc_get_link_status *status =
6160 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6162 /* Do a new status request to re-enable LSE reporting
6163 * and load new status information into the hw struct
6164 * This completely ignores any state information
6165 * in the ARQ event info, instead choosing to always
6166 * issue the AQ update link status command.
6168 i40e_link_event(pf);
6170 /* check for unqualified module, if link is down */
6171 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6172 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6173 (!(status->link_info & I40E_AQ_LINK_UP)))
6174 dev_err(&pf->pdev->dev,
6175 "The driver failed to link because an unqualified module was detected.\n");
6179 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6180 * @pf: board private structure
6182 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6184 struct i40e_arq_event_info event;
6185 struct i40e_hw *hw = &pf->hw;
6192 /* Do not run clean AQ when PF reset fails */
6193 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6196 /* check for error indications */
6197 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6199 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6200 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6201 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6203 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6204 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6205 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6207 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6208 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6209 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6212 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6214 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6216 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6217 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6218 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6220 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6221 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6222 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6224 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6225 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6226 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6229 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6231 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6232 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6237 ret = i40e_clean_arq_element(hw, &event, &pending);
6238 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6241 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6245 opcode = le16_to_cpu(event.desc.opcode);
6248 case i40e_aqc_opc_get_link_status:
6249 i40e_handle_link_event(pf, &event);
6251 case i40e_aqc_opc_send_msg_to_pf:
6252 ret = i40e_vc_process_vf_msg(pf,
6253 le16_to_cpu(event.desc.retval),
6254 le32_to_cpu(event.desc.cookie_high),
6255 le32_to_cpu(event.desc.cookie_low),
6259 case i40e_aqc_opc_lldp_update_mib:
6260 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6261 #ifdef CONFIG_I40E_DCB
6263 ret = i40e_handle_lldp_event(pf, &event);
6265 #endif /* CONFIG_I40E_DCB */
6267 case i40e_aqc_opc_event_lan_overflow:
6268 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6269 i40e_handle_lan_overflow_event(pf, &event);
6271 case i40e_aqc_opc_send_msg_to_peer:
6272 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6274 case i40e_aqc_opc_nvm_erase:
6275 case i40e_aqc_opc_nvm_update:
6276 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6279 dev_info(&pf->pdev->dev,
6280 "ARQ Error: Unknown event 0x%04x received\n",
6284 } while (pending && (i++ < pf->adminq_work_limit));
6286 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6287 /* re-enable Admin queue interrupt cause */
6288 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6289 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6290 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6293 kfree(event.msg_buf);
6297 * i40e_verify_eeprom - make sure eeprom is good to use
6298 * @pf: board private structure
6300 static void i40e_verify_eeprom(struct i40e_pf *pf)
6304 err = i40e_diag_eeprom_test(&pf->hw);
6306 /* retry in case of garbage read */
6307 err = i40e_diag_eeprom_test(&pf->hw);
6309 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6311 set_bit(__I40E_BAD_EEPROM, &pf->state);
6315 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6316 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6317 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6322 * i40e_enable_pf_switch_lb
6323 * @pf: pointer to the PF structure
6325 * enable switch loop back or die - no point in a return value
6327 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6329 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6330 struct i40e_vsi_context ctxt;
6333 ctxt.seid = pf->main_vsi_seid;
6334 ctxt.pf_num = pf->hw.pf_id;
6336 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6338 dev_info(&pf->pdev->dev,
6339 "couldn't get PF vsi config, err %s aq_err %s\n",
6340 i40e_stat_str(&pf->hw, ret),
6341 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6344 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6345 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6346 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6348 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6350 dev_info(&pf->pdev->dev,
6351 "update vsi switch failed, err %s aq_err %s\n",
6352 i40e_stat_str(&pf->hw, ret),
6353 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6358 * i40e_disable_pf_switch_lb
6359 * @pf: pointer to the PF structure
6361 * disable switch loop back or die - no point in a return value
6363 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6365 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6366 struct i40e_vsi_context ctxt;
6369 ctxt.seid = pf->main_vsi_seid;
6370 ctxt.pf_num = pf->hw.pf_id;
6372 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6374 dev_info(&pf->pdev->dev,
6375 "couldn't get PF vsi config, err %s aq_err %s\n",
6376 i40e_stat_str(&pf->hw, ret),
6377 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6380 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6381 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6382 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6384 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6386 dev_info(&pf->pdev->dev,
6387 "update vsi switch failed, err %s aq_err %s\n",
6388 i40e_stat_str(&pf->hw, ret),
6389 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6394 * i40e_config_bridge_mode - Configure the HW bridge mode
6395 * @veb: pointer to the bridge instance
6397 * Configure the loop back mode for the LAN VSI that is downlink to the
6398 * specified HW bridge instance. It is expected this function is called
6399 * when a new HW bridge is instantiated.
6401 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6403 struct i40e_pf *pf = veb->pf;
6405 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6406 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6407 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6408 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6409 i40e_disable_pf_switch_lb(pf);
6411 i40e_enable_pf_switch_lb(pf);
6415 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6416 * @veb: pointer to the VEB instance
6418 * This is a recursive function that first builds the attached VSIs then
6419 * recurses in to build the next layer of VEB. We track the connections
6420 * through our own index numbers because the seid's from the HW could
6421 * change across the reset.
6423 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6425 struct i40e_vsi *ctl_vsi = NULL;
6426 struct i40e_pf *pf = veb->pf;
6430 /* build VSI that owns this VEB, temporarily attached to base VEB */
6431 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6433 pf->vsi[v]->veb_idx == veb->idx &&
6434 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6435 ctl_vsi = pf->vsi[v];
6440 dev_info(&pf->pdev->dev,
6441 "missing owner VSI for veb_idx %d\n", veb->idx);
6443 goto end_reconstitute;
6445 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6446 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6447 ret = i40e_add_vsi(ctl_vsi);
6449 dev_info(&pf->pdev->dev,
6450 "rebuild of veb_idx %d owner VSI failed: %d\n",
6452 goto end_reconstitute;
6454 i40e_vsi_reset_stats(ctl_vsi);
6456 /* create the VEB in the switch and move the VSI onto the VEB */
6457 ret = i40e_add_veb(veb, ctl_vsi);
6459 goto end_reconstitute;
6461 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6462 veb->bridge_mode = BRIDGE_MODE_VEB;
6464 veb->bridge_mode = BRIDGE_MODE_VEPA;
6465 i40e_config_bridge_mode(veb);
6467 /* create the remaining VSIs attached to this VEB */
6468 for (v = 0; v < pf->num_alloc_vsi; v++) {
6469 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6472 if (pf->vsi[v]->veb_idx == veb->idx) {
6473 struct i40e_vsi *vsi = pf->vsi[v];
6475 vsi->uplink_seid = veb->seid;
6476 ret = i40e_add_vsi(vsi);
6478 dev_info(&pf->pdev->dev,
6479 "rebuild of vsi_idx %d failed: %d\n",
6481 goto end_reconstitute;
6483 i40e_vsi_reset_stats(vsi);
6487 /* create any VEBs attached to this VEB - RECURSION */
6488 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6489 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6490 pf->veb[veb_idx]->uplink_seid = veb->seid;
6491 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6502 * i40e_get_capabilities - get info about the HW
6503 * @pf: the PF struct
6505 static int i40e_get_capabilities(struct i40e_pf *pf)
6507 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6512 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6514 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6518 /* this loads the data into the hw struct for us */
6519 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6521 i40e_aqc_opc_list_func_capabilities,
6523 /* data loaded, buffer no longer needed */
6526 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6527 /* retry with a larger buffer */
6528 buf_len = data_size;
6529 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6530 dev_info(&pf->pdev->dev,
6531 "capability discovery failed, err %s aq_err %s\n",
6532 i40e_stat_str(&pf->hw, err),
6533 i40e_aq_str(&pf->hw,
6534 pf->hw.aq.asq_last_status));
6539 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6540 dev_info(&pf->pdev->dev,
6541 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6542 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6543 pf->hw.func_caps.num_msix_vectors,
6544 pf->hw.func_caps.num_msix_vectors_vf,
6545 pf->hw.func_caps.fd_filters_guaranteed,
6546 pf->hw.func_caps.fd_filters_best_effort,
6547 pf->hw.func_caps.num_tx_qp,
6548 pf->hw.func_caps.num_vsis);
6550 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6551 + pf->hw.func_caps.num_vfs)
6552 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6553 dev_info(&pf->pdev->dev,
6554 "got num_vsis %d, setting num_vsis to %d\n",
6555 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6556 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6562 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6565 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6566 * @pf: board private structure
6568 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6570 struct i40e_vsi *vsi;
6573 /* quick workaround for an NVM issue that leaves a critical register
6576 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6577 static const u32 hkey[] = {
6578 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6579 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6580 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6583 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6584 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6587 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6590 /* find existing VSI and see if it needs configuring */
6592 for (i = 0; i < pf->num_alloc_vsi; i++) {
6593 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6599 /* create a new VSI if none exists */
6601 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6602 pf->vsi[pf->lan_vsi]->seid, 0);
6604 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6605 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6610 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6614 * i40e_fdir_teardown - release the Flow Director resources
6615 * @pf: board private structure
6617 static void i40e_fdir_teardown(struct i40e_pf *pf)
6621 i40e_fdir_filter_exit(pf);
6622 for (i = 0; i < pf->num_alloc_vsi; i++) {
6623 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6624 i40e_vsi_release(pf->vsi[i]);
6631 * i40e_prep_for_reset - prep for the core to reset
6632 * @pf: board private structure
6634 * Close up the VFs and other things in prep for PF Reset.
6636 static void i40e_prep_for_reset(struct i40e_pf *pf)
6638 struct i40e_hw *hw = &pf->hw;
6639 i40e_status ret = 0;
6642 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6643 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6646 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6648 /* quiesce the VSIs and their queues that are not already DOWN */
6649 i40e_pf_quiesce_all_vsi(pf);
6651 for (v = 0; v < pf->num_alloc_vsi; v++) {
6653 pf->vsi[v]->seid = 0;
6656 i40e_shutdown_adminq(&pf->hw);
6658 /* call shutdown HMC */
6659 if (hw->hmc.hmc_obj) {
6660 ret = i40e_shutdown_lan_hmc(hw);
6662 dev_warn(&pf->pdev->dev,
6663 "shutdown_lan_hmc failed: %d\n", ret);
6668 * i40e_send_version - update firmware with driver version
6671 static void i40e_send_version(struct i40e_pf *pf)
6673 struct i40e_driver_version dv;
6675 dv.major_version = DRV_VERSION_MAJOR;
6676 dv.minor_version = DRV_VERSION_MINOR;
6677 dv.build_version = DRV_VERSION_BUILD;
6678 dv.subbuild_version = 0;
6679 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6680 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6684 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6685 * @pf: board private structure
6686 * @reinit: if the Main VSI needs to re-initialized.
6688 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6690 struct i40e_hw *hw = &pf->hw;
6691 u8 set_fc_aq_fail = 0;
6696 /* Now we wait for GRST to settle out.
6697 * We don't have to delete the VEBs or VSIs from the hw switch
6698 * because the reset will make them disappear.
6700 ret = i40e_pf_reset(hw);
6702 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6703 set_bit(__I40E_RESET_FAILED, &pf->state);
6704 goto clear_recovery;
6708 if (test_bit(__I40E_DOWN, &pf->state))
6709 goto clear_recovery;
6710 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6712 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6713 ret = i40e_init_adminq(&pf->hw);
6715 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6716 i40e_stat_str(&pf->hw, ret),
6717 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6718 goto clear_recovery;
6721 /* re-verify the eeprom if we just had an EMP reset */
6722 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6723 i40e_verify_eeprom(pf);
6725 i40e_clear_pxe_mode(hw);
6726 ret = i40e_get_capabilities(pf);
6728 goto end_core_reset;
6730 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6731 hw->func_caps.num_rx_qp,
6732 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6734 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6735 goto end_core_reset;
6737 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6739 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6740 goto end_core_reset;
6743 #ifdef CONFIG_I40E_DCB
6744 ret = i40e_init_pf_dcb(pf);
6746 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6747 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6748 /* Continue without DCB enabled */
6750 #endif /* CONFIG_I40E_DCB */
6752 i40e_init_pf_fcoe(pf);
6755 /* do basic switch setup */
6756 ret = i40e_setup_pf_switch(pf, reinit);
6758 goto end_core_reset;
6760 /* driver is only interested in link up/down and module qualification
6761 * reports from firmware
6763 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6764 I40E_AQ_EVENT_LINK_UPDOWN |
6765 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6767 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6768 i40e_stat_str(&pf->hw, ret),
6769 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6771 /* make sure our flow control settings are restored */
6772 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6774 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6775 i40e_stat_str(&pf->hw, ret),
6776 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6778 /* Rebuild the VSIs and VEBs that existed before reset.
6779 * They are still in our local switch element arrays, so only
6780 * need to rebuild the switch model in the HW.
6782 * If there were VEBs but the reconstitution failed, we'll try
6783 * try to recover minimal use by getting the basic PF VSI working.
6785 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6786 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6787 /* find the one VEB connected to the MAC, and find orphans */
6788 for (v = 0; v < I40E_MAX_VEB; v++) {
6792 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6793 pf->veb[v]->uplink_seid == 0) {
6794 ret = i40e_reconstitute_veb(pf->veb[v]);
6799 /* If Main VEB failed, we're in deep doodoo,
6800 * so give up rebuilding the switch and set up
6801 * for minimal rebuild of PF VSI.
6802 * If orphan failed, we'll report the error
6803 * but try to keep going.
6805 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6806 dev_info(&pf->pdev->dev,
6807 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6809 pf->vsi[pf->lan_vsi]->uplink_seid
6812 } else if (pf->veb[v]->uplink_seid == 0) {
6813 dev_info(&pf->pdev->dev,
6814 "rebuild of orphan VEB failed: %d\n",
6821 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6822 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6823 /* no VEB, so rebuild only the Main VSI */
6824 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6826 dev_info(&pf->pdev->dev,
6827 "rebuild of Main VSI failed: %d\n", ret);
6828 goto end_core_reset;
6832 /* Reconfigure hardware for allowing smaller MSS in the case
6833 * of TSO, so that we avoid the MDD being fired and causing
6834 * a reset in the case of small MSS+TSO.
6836 #define I40E_REG_MSS 0x000E64DC
6837 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6838 #define I40E_64BYTE_MSS 0x400000
6839 val = rd32(hw, I40E_REG_MSS);
6840 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6841 val &= ~I40E_REG_MSS_MIN_MASK;
6842 val |= I40E_64BYTE_MSS;
6843 wr32(hw, I40E_REG_MSS, val);
6846 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6847 (pf->hw.aq.fw_maj_ver < 4)) {
6849 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6851 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6852 i40e_stat_str(&pf->hw, ret),
6853 i40e_aq_str(&pf->hw,
6854 pf->hw.aq.asq_last_status));
6856 /* reinit the misc interrupt */
6857 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6858 ret = i40e_setup_misc_vector(pf);
6860 /* Add a filter to drop all Flow control frames from any VSI from being
6861 * transmitted. By doing so we stop a malicious VF from sending out
6862 * PAUSE or PFC frames and potentially controlling traffic for other
6864 * The FW can still send Flow control frames if enabled.
6866 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6869 /* restart the VSIs that were rebuilt and running before the reset */
6870 i40e_pf_unquiesce_all_vsi(pf);
6872 if (pf->num_alloc_vfs) {
6873 for (v = 0; v < pf->num_alloc_vfs; v++)
6874 i40e_reset_vf(&pf->vf[v], true);
6877 /* tell the firmware that we're starting */
6878 i40e_send_version(pf);
6881 clear_bit(__I40E_RESET_FAILED, &pf->state);
6883 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6887 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6888 * @pf: board private structure
6890 * Close up the VFs and other things in prep for a Core Reset,
6891 * then get ready to rebuild the world.
6893 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6895 i40e_prep_for_reset(pf);
6896 i40e_reset_and_rebuild(pf, false);
6900 * i40e_handle_mdd_event
6901 * @pf: pointer to the PF structure
6903 * Called from the MDD irq handler to identify possibly malicious vfs
6905 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6907 struct i40e_hw *hw = &pf->hw;
6908 bool mdd_detected = false;
6909 bool pf_mdd_detected = false;
6914 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6917 /* find what triggered the MDD event */
6918 reg = rd32(hw, I40E_GL_MDET_TX);
6919 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6920 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6921 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6922 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6923 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6924 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6925 I40E_GL_MDET_TX_EVENT_SHIFT;
6926 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6927 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6928 pf->hw.func_caps.base_queue;
6929 if (netif_msg_tx_err(pf))
6930 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6931 event, queue, pf_num, vf_num);
6932 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6933 mdd_detected = true;
6935 reg = rd32(hw, I40E_GL_MDET_RX);
6936 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6937 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6938 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6939 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6940 I40E_GL_MDET_RX_EVENT_SHIFT;
6941 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6942 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6943 pf->hw.func_caps.base_queue;
6944 if (netif_msg_rx_err(pf))
6945 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6946 event, queue, func);
6947 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6948 mdd_detected = true;
6952 reg = rd32(hw, I40E_PF_MDET_TX);
6953 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6954 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6955 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6956 pf_mdd_detected = true;
6958 reg = rd32(hw, I40E_PF_MDET_RX);
6959 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6960 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6961 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6962 pf_mdd_detected = true;
6964 /* Queue belongs to the PF, initiate a reset */
6965 if (pf_mdd_detected) {
6966 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6967 i40e_service_event_schedule(pf);
6971 /* see if one of the VFs needs its hand slapped */
6972 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6974 reg = rd32(hw, I40E_VP_MDET_TX(i));
6975 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6976 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6977 vf->num_mdd_events++;
6978 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6982 reg = rd32(hw, I40E_VP_MDET_RX(i));
6983 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6984 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6985 vf->num_mdd_events++;
6986 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6990 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6991 dev_info(&pf->pdev->dev,
6992 "Too many MDD events on VF %d, disabled\n", i);
6993 dev_info(&pf->pdev->dev,
6994 "Use PF Control I/F to re-enable the VF\n");
6995 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6999 /* re-enable mdd interrupt cause */
7000 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7001 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7002 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7003 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7007 #ifdef CONFIG_I40E_VXLAN
7009 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
7010 * @pf: board private structure
7012 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
7014 struct i40e_hw *hw = &pf->hw;
7019 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
7022 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
7024 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7025 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
7026 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
7027 port = pf->vxlan_ports[i];
7029 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7030 I40E_AQC_TUNNEL_TYPE_VXLAN,
7033 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7036 dev_info(&pf->pdev->dev,
7037 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7038 port ? "add" : "delete",
7040 i40e_stat_str(&pf->hw, ret),
7041 i40e_aq_str(&pf->hw,
7042 pf->hw.aq.asq_last_status));
7043 pf->vxlan_ports[i] = 0;
7051 * i40e_service_task - Run the driver's async subtasks
7052 * @work: pointer to work_struct containing our data
7054 static void i40e_service_task(struct work_struct *work)
7056 struct i40e_pf *pf = container_of(work,
7059 unsigned long start_time = jiffies;
7061 /* don't bother with service tasks if a reset is in progress */
7062 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7063 i40e_service_event_complete(pf);
7067 i40e_detect_recover_hung(pf);
7068 i40e_reset_subtask(pf);
7069 i40e_handle_mdd_event(pf);
7070 i40e_vc_process_vflr_event(pf);
7071 i40e_watchdog_subtask(pf);
7072 i40e_fdir_reinit_subtask(pf);
7073 i40e_sync_filters_subtask(pf);
7074 #ifdef CONFIG_I40E_VXLAN
7075 i40e_sync_vxlan_filters_subtask(pf);
7077 i40e_clean_adminq_subtask(pf);
7079 i40e_service_event_complete(pf);
7081 /* If the tasks have taken longer than one timer cycle or there
7082 * is more work to be done, reschedule the service task now
7083 * rather than wait for the timer to tick again.
7085 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7086 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7087 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7088 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7089 i40e_service_event_schedule(pf);
7093 * i40e_service_timer - timer callback
7094 * @data: pointer to PF struct
7096 static void i40e_service_timer(unsigned long data)
7098 struct i40e_pf *pf = (struct i40e_pf *)data;
7100 mod_timer(&pf->service_timer,
7101 round_jiffies(jiffies + pf->service_timer_period));
7102 i40e_service_event_schedule(pf);
7106 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7107 * @vsi: the VSI being configured
7109 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7111 struct i40e_pf *pf = vsi->back;
7113 switch (vsi->type) {
7115 vsi->alloc_queue_pairs = pf->num_lan_qps;
7116 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7117 I40E_REQ_DESCRIPTOR_MULTIPLE);
7118 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7119 vsi->num_q_vectors = pf->num_lan_msix;
7121 vsi->num_q_vectors = 1;
7126 vsi->alloc_queue_pairs = 1;
7127 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7128 I40E_REQ_DESCRIPTOR_MULTIPLE);
7129 vsi->num_q_vectors = 1;
7132 case I40E_VSI_VMDQ2:
7133 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7134 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7135 I40E_REQ_DESCRIPTOR_MULTIPLE);
7136 vsi->num_q_vectors = pf->num_vmdq_msix;
7139 case I40E_VSI_SRIOV:
7140 vsi->alloc_queue_pairs = pf->num_vf_qps;
7141 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7142 I40E_REQ_DESCRIPTOR_MULTIPLE);
7147 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7148 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7149 I40E_REQ_DESCRIPTOR_MULTIPLE);
7150 vsi->num_q_vectors = pf->num_fcoe_msix;
7153 #endif /* I40E_FCOE */
7163 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7164 * @type: VSI pointer
7165 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7167 * On error: returns error code (negative)
7168 * On success: returns 0
7170 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7175 /* allocate memory for both Tx and Rx ring pointers */
7176 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7177 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7180 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7182 if (alloc_qvectors) {
7183 /* allocate memory for q_vector pointers */
7184 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7185 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7186 if (!vsi->q_vectors) {
7194 kfree(vsi->tx_rings);
7199 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7200 * @pf: board private structure
7201 * @type: type of VSI
7203 * On error: returns error code (negative)
7204 * On success: returns vsi index in PF (positive)
7206 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7209 struct i40e_vsi *vsi;
7213 /* Need to protect the allocation of the VSIs at the PF level */
7214 mutex_lock(&pf->switch_mutex);
7216 /* VSI list may be fragmented if VSI creation/destruction has
7217 * been happening. We can afford to do a quick scan to look
7218 * for any free VSIs in the list.
7220 * find next empty vsi slot, looping back around if necessary
7223 while (i < pf->num_alloc_vsi && pf->vsi[i])
7225 if (i >= pf->num_alloc_vsi) {
7227 while (i < pf->next_vsi && pf->vsi[i])
7231 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7232 vsi_idx = i; /* Found one! */
7235 goto unlock_pf; /* out of VSI slots! */
7239 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7246 set_bit(__I40E_DOWN, &vsi->state);
7249 vsi->rx_itr_setting = pf->rx_itr_default;
7250 vsi->tx_itr_setting = pf->tx_itr_default;
7251 vsi->int_rate_limit = 0;
7252 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7253 pf->rss_table_size : 64;
7254 vsi->netdev_registered = false;
7255 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7256 INIT_LIST_HEAD(&vsi->mac_filter_list);
7257 vsi->irqs_ready = false;
7259 ret = i40e_set_num_rings_in_vsi(vsi);
7263 ret = i40e_vsi_alloc_arrays(vsi, true);
7267 /* Setup default MSIX irq handler for VSI */
7268 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7270 /* Initialize VSI lock */
7271 spin_lock_init(&vsi->mac_filter_list_lock);
7272 pf->vsi[vsi_idx] = vsi;
7277 pf->next_vsi = i - 1;
7280 mutex_unlock(&pf->switch_mutex);
7285 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7286 * @type: VSI pointer
7287 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7289 * On error: returns error code (negative)
7290 * On success: returns 0
7292 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7294 /* free the ring and vector containers */
7295 if (free_qvectors) {
7296 kfree(vsi->q_vectors);
7297 vsi->q_vectors = NULL;
7299 kfree(vsi->tx_rings);
7300 vsi->tx_rings = NULL;
7301 vsi->rx_rings = NULL;
7305 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7307 * @vsi: Pointer to VSI structure
7309 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7314 kfree(vsi->rss_hkey_user);
7315 vsi->rss_hkey_user = NULL;
7317 kfree(vsi->rss_lut_user);
7318 vsi->rss_lut_user = NULL;
7322 * i40e_vsi_clear - Deallocate the VSI provided
7323 * @vsi: the VSI being un-configured
7325 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7336 mutex_lock(&pf->switch_mutex);
7337 if (!pf->vsi[vsi->idx]) {
7338 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7339 vsi->idx, vsi->idx, vsi, vsi->type);
7343 if (pf->vsi[vsi->idx] != vsi) {
7344 dev_err(&pf->pdev->dev,
7345 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7346 pf->vsi[vsi->idx]->idx,
7348 pf->vsi[vsi->idx]->type,
7349 vsi->idx, vsi, vsi->type);
7353 /* updates the PF for this cleared vsi */
7354 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7355 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7357 i40e_vsi_free_arrays(vsi, true);
7358 i40e_clear_rss_config_user(vsi);
7360 pf->vsi[vsi->idx] = NULL;
7361 if (vsi->idx < pf->next_vsi)
7362 pf->next_vsi = vsi->idx;
7365 mutex_unlock(&pf->switch_mutex);
7373 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7374 * @vsi: the VSI being cleaned
7376 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7380 if (vsi->tx_rings && vsi->tx_rings[0]) {
7381 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7382 kfree_rcu(vsi->tx_rings[i], rcu);
7383 vsi->tx_rings[i] = NULL;
7384 vsi->rx_rings[i] = NULL;
7390 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7391 * @vsi: the VSI being configured
7393 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7395 struct i40e_ring *tx_ring, *rx_ring;
7396 struct i40e_pf *pf = vsi->back;
7399 /* Set basic values in the rings to be used later during open() */
7400 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7401 /* allocate space for both Tx and Rx in one shot */
7402 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7406 tx_ring->queue_index = i;
7407 tx_ring->reg_idx = vsi->base_queue + i;
7408 tx_ring->ring_active = false;
7410 tx_ring->netdev = vsi->netdev;
7411 tx_ring->dev = &pf->pdev->dev;
7412 tx_ring->count = vsi->num_desc;
7414 tx_ring->dcb_tc = 0;
7415 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7416 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7417 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7418 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7419 vsi->tx_rings[i] = tx_ring;
7421 rx_ring = &tx_ring[1];
7422 rx_ring->queue_index = i;
7423 rx_ring->reg_idx = vsi->base_queue + i;
7424 rx_ring->ring_active = false;
7426 rx_ring->netdev = vsi->netdev;
7427 rx_ring->dev = &pf->pdev->dev;
7428 rx_ring->count = vsi->num_desc;
7430 rx_ring->dcb_tc = 0;
7431 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7432 set_ring_16byte_desc_enabled(rx_ring);
7434 clear_ring_16byte_desc_enabled(rx_ring);
7435 vsi->rx_rings[i] = rx_ring;
7441 i40e_vsi_clear_rings(vsi);
7446 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7447 * @pf: board private structure
7448 * @vectors: the number of MSI-X vectors to request
7450 * Returns the number of vectors reserved, or error
7452 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7454 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7455 I40E_MIN_MSIX, vectors);
7457 dev_info(&pf->pdev->dev,
7458 "MSI-X vector reservation failed: %d\n", vectors);
7466 * i40e_init_msix - Setup the MSIX capability
7467 * @pf: board private structure
7469 * Work with the OS to set up the MSIX vectors needed.
7471 * Returns the number of vectors reserved or negative on failure
7473 static int i40e_init_msix(struct i40e_pf *pf)
7475 struct i40e_hw *hw = &pf->hw;
7480 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7483 /* The number of vectors we'll request will be comprised of:
7484 * - Add 1 for "other" cause for Admin Queue events, etc.
7485 * - The number of LAN queue pairs
7486 * - Queues being used for RSS.
7487 * We don't need as many as max_rss_size vectors.
7488 * use rss_size instead in the calculation since that
7489 * is governed by number of cpus in the system.
7490 * - assumes symmetric Tx/Rx pairing
7491 * - The number of VMDq pairs
7493 * - The number of FCOE qps.
7495 * Once we count this up, try the request.
7497 * If we can't get what we want, we'll simplify to nearly nothing
7498 * and try again. If that still fails, we punt.
7500 vectors_left = hw->func_caps.num_msix_vectors;
7503 /* reserve one vector for miscellaneous handler */
7509 /* reserve vectors for the main PF traffic queues */
7510 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7511 vectors_left -= pf->num_lan_msix;
7512 v_budget += pf->num_lan_msix;
7514 /* reserve one vector for sideband flow director */
7515 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7520 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7525 /* can we reserve enough for FCoE? */
7526 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7528 pf->num_fcoe_msix = 0;
7529 else if (vectors_left >= pf->num_fcoe_qps)
7530 pf->num_fcoe_msix = pf->num_fcoe_qps;
7532 pf->num_fcoe_msix = 1;
7533 v_budget += pf->num_fcoe_msix;
7534 vectors_left -= pf->num_fcoe_msix;
7538 /* any vectors left over go for VMDq support */
7539 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7540 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7541 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7543 /* if we're short on vectors for what's desired, we limit
7544 * the queues per vmdq. If this is still more than are
7545 * available, the user will need to change the number of
7546 * queues/vectors used by the PF later with the ethtool
7549 if (vmdq_vecs < vmdq_vecs_wanted)
7550 pf->num_vmdq_qps = 1;
7551 pf->num_vmdq_msix = pf->num_vmdq_qps;
7553 v_budget += vmdq_vecs;
7554 vectors_left -= vmdq_vecs;
7557 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7559 if (!pf->msix_entries)
7562 for (i = 0; i < v_budget; i++)
7563 pf->msix_entries[i].entry = i;
7564 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7566 if (v_actual != v_budget) {
7567 /* If we have limited resources, we will start with no vectors
7568 * for the special features and then allocate vectors to some
7569 * of these features based on the policy and at the end disable
7570 * the features that did not get any vectors.
7573 pf->num_fcoe_qps = 0;
7574 pf->num_fcoe_msix = 0;
7576 pf->num_vmdq_msix = 0;
7579 if (v_actual < I40E_MIN_MSIX) {
7580 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7581 kfree(pf->msix_entries);
7582 pf->msix_entries = NULL;
7585 } else if (v_actual == I40E_MIN_MSIX) {
7586 /* Adjust for minimal MSIX use */
7587 pf->num_vmdq_vsis = 0;
7588 pf->num_vmdq_qps = 0;
7589 pf->num_lan_qps = 1;
7590 pf->num_lan_msix = 1;
7592 } else if (v_actual != v_budget) {
7595 /* reserve the misc vector */
7598 /* Scale vector usage down */
7599 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7600 pf->num_vmdq_vsis = 1;
7601 pf->num_vmdq_qps = 1;
7602 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7604 /* partition out the remaining vectors */
7607 pf->num_lan_msix = 1;
7611 /* give one vector to FCoE */
7612 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7613 pf->num_lan_msix = 1;
7614 pf->num_fcoe_msix = 1;
7617 pf->num_lan_msix = 2;
7622 /* give one vector to FCoE */
7623 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7624 pf->num_fcoe_msix = 1;
7628 /* give the rest to the PF */
7629 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7634 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7635 (pf->num_vmdq_msix == 0)) {
7636 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7637 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7641 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7642 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7643 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7650 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7651 * @vsi: the VSI being configured
7652 * @v_idx: index of the vector in the vsi struct
7654 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7656 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7658 struct i40e_q_vector *q_vector;
7660 /* allocate q_vector */
7661 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7665 q_vector->vsi = vsi;
7666 q_vector->v_idx = v_idx;
7667 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7669 netif_napi_add(vsi->netdev, &q_vector->napi,
7670 i40e_napi_poll, NAPI_POLL_WEIGHT);
7672 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7673 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7675 /* tie q_vector and vsi together */
7676 vsi->q_vectors[v_idx] = q_vector;
7682 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7683 * @vsi: the VSI being configured
7685 * We allocate one q_vector per queue interrupt. If allocation fails we
7688 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7690 struct i40e_pf *pf = vsi->back;
7691 int v_idx, num_q_vectors;
7694 /* if not MSIX, give the one vector only to the LAN VSI */
7695 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7696 num_q_vectors = vsi->num_q_vectors;
7697 else if (vsi == pf->vsi[pf->lan_vsi])
7702 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7703 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7712 i40e_free_q_vector(vsi, v_idx);
7718 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7719 * @pf: board private structure to initialize
7721 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7726 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7727 vectors = i40e_init_msix(pf);
7729 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7731 I40E_FLAG_FCOE_ENABLED |
7733 I40E_FLAG_RSS_ENABLED |
7734 I40E_FLAG_DCB_CAPABLE |
7735 I40E_FLAG_SRIOV_ENABLED |
7736 I40E_FLAG_FD_SB_ENABLED |
7737 I40E_FLAG_FD_ATR_ENABLED |
7738 I40E_FLAG_VMDQ_ENABLED);
7740 /* rework the queue expectations without MSIX */
7741 i40e_determine_queue_usage(pf);
7745 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7746 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7747 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7748 vectors = pci_enable_msi(pf->pdev);
7750 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7752 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7754 vectors = 1; /* one MSI or Legacy vector */
7757 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7758 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7760 /* set up vector assignment tracking */
7761 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7762 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7763 if (!pf->irq_pile) {
7764 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7767 pf->irq_pile->num_entries = vectors;
7768 pf->irq_pile->search_hint = 0;
7770 /* track first vector for misc interrupts, ignore return */
7771 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7777 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7778 * @pf: board private structure
7780 * This sets up the handler for MSIX 0, which is used to manage the
7781 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7782 * when in MSI or Legacy interrupt mode.
7784 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7786 struct i40e_hw *hw = &pf->hw;
7789 /* Only request the irq if this is the first time through, and
7790 * not when we're rebuilding after a Reset
7792 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7793 err = request_irq(pf->msix_entries[0].vector,
7794 i40e_intr, 0, pf->int_name, pf);
7796 dev_info(&pf->pdev->dev,
7797 "request_irq for %s failed: %d\n",
7803 i40e_enable_misc_int_causes(pf);
7805 /* associate no queues to the misc vector */
7806 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7807 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7811 i40e_irq_dynamic_enable_icr0(pf);
7817 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7818 * @vsi: vsi structure
7819 * @seed: RSS hash seed
7821 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7822 u8 *lut, u16 lut_size)
7824 struct i40e_aqc_get_set_rss_key_data rss_key;
7825 struct i40e_pf *pf = vsi->back;
7826 struct i40e_hw *hw = &pf->hw;
7827 bool pf_lut = false;
7831 memset(&rss_key, 0, sizeof(rss_key));
7832 memcpy(&rss_key, seed, sizeof(rss_key));
7834 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7838 /* Populate the LUT with max no. of queues in round robin fashion */
7839 for (i = 0; i < vsi->rss_table_size; i++)
7840 rss_lut[i] = i % vsi->rss_size;
7842 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7844 dev_info(&pf->pdev->dev,
7845 "Cannot set RSS key, err %s aq_err %s\n",
7846 i40e_stat_str(&pf->hw, ret),
7847 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7848 goto config_rss_aq_out;
7851 if (vsi->type == I40E_VSI_MAIN)
7854 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7855 vsi->rss_table_size);
7857 dev_info(&pf->pdev->dev,
7858 "Cannot set RSS lut, err %s aq_err %s\n",
7859 i40e_stat_str(&pf->hw, ret),
7860 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7868 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7869 * @vsi: VSI structure
7871 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7873 u8 seed[I40E_HKEY_ARRAY_SIZE];
7874 struct i40e_pf *pf = vsi->back;
7878 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7881 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7885 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7886 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7887 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7888 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7895 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7896 * @vsi: Pointer to vsi structure
7897 * @seed: RSS hash seed
7898 * @lut: Lookup table
7899 * @lut_size: Lookup table size
7901 * Returns 0 on success, negative on failure
7903 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7904 const u8 *lut, u16 lut_size)
7906 struct i40e_pf *pf = vsi->back;
7907 struct i40e_hw *hw = &pf->hw;
7910 /* Fill out hash function seed */
7912 u32 *seed_dw = (u32 *)seed;
7914 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7915 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7919 u32 *lut_dw = (u32 *)lut;
7921 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7924 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7925 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
7933 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
7934 * @vsi: Pointer to VSI structure
7935 * @seed: Buffer to store the keys
7936 * @lut: Buffer to store the lookup table entries
7937 * @lut_size: Size of buffer to store the lookup table entries
7939 * Returns 0 on success, negative on failure
7941 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
7942 u8 *lut, u16 lut_size)
7944 struct i40e_pf *pf = vsi->back;
7945 struct i40e_hw *hw = &pf->hw;
7949 u32 *seed_dw = (u32 *)seed;
7951 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7952 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
7955 u32 *lut_dw = (u32 *)lut;
7957 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7959 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7960 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
7967 * i40e_config_rss - Configure RSS keys and lut
7968 * @vsi: Pointer to VSI structure
7969 * @seed: RSS hash seed
7970 * @lut: Lookup table
7971 * @lut_size: Lookup table size
7973 * Returns 0 on success, negative on failure
7975 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
7977 struct i40e_pf *pf = vsi->back;
7979 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7980 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
7982 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
7986 * i40e_get_rss - Get RSS keys and lut
7987 * @vsi: Pointer to VSI structure
7988 * @seed: Buffer to store the keys
7989 * @lut: Buffer to store the lookup table entries
7990 * lut_size: Size of buffer to store the lookup table entries
7992 * Returns 0 on success, negative on failure
7994 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
7996 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8000 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8001 * @pf: Pointer to board private structure
8002 * @lut: Lookup table
8003 * @rss_table_size: Lookup table size
8004 * @rss_size: Range of queue number for hashing
8006 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8007 u16 rss_table_size, u16 rss_size)
8011 for (i = 0; i < rss_table_size; i++)
8012 lut[i] = i % rss_size;
8016 * i40e_pf_config_rss - Prepare for RSS if used
8017 * @pf: board private structure
8019 static int i40e_pf_config_rss(struct i40e_pf *pf)
8021 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8022 u8 seed[I40E_HKEY_ARRAY_SIZE];
8024 struct i40e_hw *hw = &pf->hw;
8029 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8030 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8031 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8032 hena |= i40e_pf_get_default_rss_hena(pf);
8034 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8035 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8037 /* Determine the RSS table size based on the hardware capabilities */
8038 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8039 reg_val = (pf->rss_table_size == 512) ?
8040 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8041 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8042 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8044 /* Determine the RSS size of the VSI */
8046 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8047 vsi->num_queue_pairs);
8049 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8053 /* Use user configured lut if there is one, otherwise use default */
8054 if (vsi->rss_lut_user)
8055 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8057 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8059 /* Use user configured hash key if there is one, otherwise
8062 if (vsi->rss_hkey_user)
8063 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8065 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8066 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8073 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8074 * @pf: board private structure
8075 * @queue_count: the requested queue count for rss.
8077 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8078 * count which may be different from the requested queue count.
8080 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8082 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8085 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8088 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8090 if (queue_count != vsi->num_queue_pairs) {
8091 vsi->req_queue_pairs = queue_count;
8092 i40e_prep_for_reset(pf);
8094 pf->alloc_rss_size = new_rss_size;
8096 i40e_reset_and_rebuild(pf, true);
8098 /* Discard the user configured hash keys and lut, if less
8099 * queues are enabled.
8101 if (queue_count < vsi->rss_size) {
8102 i40e_clear_rss_config_user(vsi);
8103 dev_dbg(&pf->pdev->dev,
8104 "discard user configured hash keys and lut\n");
8107 /* Reset vsi->rss_size, as number of enabled queues changed */
8108 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8109 vsi->num_queue_pairs);
8111 i40e_pf_config_rss(pf);
8113 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->alloc_rss_size);
8114 return pf->alloc_rss_size;
8118 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8119 * @pf: board private structure
8121 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8124 bool min_valid, max_valid;
8127 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8128 &min_valid, &max_valid);
8132 pf->npar_min_bw = min_bw;
8134 pf->npar_max_bw = max_bw;
8141 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8142 * @pf: board private structure
8144 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8146 struct i40e_aqc_configure_partition_bw_data bw_data;
8149 /* Set the valid bit for this PF */
8150 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8151 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8152 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8154 /* Set the new bandwidths */
8155 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8161 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8162 * @pf: board private structure
8164 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8166 /* Commit temporary BW setting to permanent NVM image */
8167 enum i40e_admin_queue_err last_aq_status;
8171 if (pf->hw.partition_id != 1) {
8172 dev_info(&pf->pdev->dev,
8173 "Commit BW only works on partition 1! This is partition %d",
8174 pf->hw.partition_id);
8175 ret = I40E_NOT_SUPPORTED;
8179 /* Acquire NVM for read access */
8180 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8181 last_aq_status = pf->hw.aq.asq_last_status;
8183 dev_info(&pf->pdev->dev,
8184 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8185 i40e_stat_str(&pf->hw, ret),
8186 i40e_aq_str(&pf->hw, last_aq_status));
8190 /* Read word 0x10 of NVM - SW compatibility word 1 */
8191 ret = i40e_aq_read_nvm(&pf->hw,
8192 I40E_SR_NVM_CONTROL_WORD,
8193 0x10, sizeof(nvm_word), &nvm_word,
8195 /* Save off last admin queue command status before releasing
8198 last_aq_status = pf->hw.aq.asq_last_status;
8199 i40e_release_nvm(&pf->hw);
8201 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8202 i40e_stat_str(&pf->hw, ret),
8203 i40e_aq_str(&pf->hw, last_aq_status));
8207 /* Wait a bit for NVM release to complete */
8210 /* Acquire NVM for write access */
8211 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8212 last_aq_status = pf->hw.aq.asq_last_status;
8214 dev_info(&pf->pdev->dev,
8215 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8216 i40e_stat_str(&pf->hw, ret),
8217 i40e_aq_str(&pf->hw, last_aq_status));
8220 /* Write it back out unchanged to initiate update NVM,
8221 * which will force a write of the shadow (alt) RAM to
8222 * the NVM - thus storing the bandwidth values permanently.
8224 ret = i40e_aq_update_nvm(&pf->hw,
8225 I40E_SR_NVM_CONTROL_WORD,
8226 0x10, sizeof(nvm_word),
8227 &nvm_word, true, NULL);
8228 /* Save off last admin queue command status before releasing
8231 last_aq_status = pf->hw.aq.asq_last_status;
8232 i40e_release_nvm(&pf->hw);
8234 dev_info(&pf->pdev->dev,
8235 "BW settings NOT SAVED, err %s aq_err %s\n",
8236 i40e_stat_str(&pf->hw, ret),
8237 i40e_aq_str(&pf->hw, last_aq_status));
8244 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8245 * @pf: board private structure to initialize
8247 * i40e_sw_init initializes the Adapter private data structure.
8248 * Fields are initialized based on PCI device information and
8249 * OS network device settings (MTU size).
8251 static int i40e_sw_init(struct i40e_pf *pf)
8256 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8257 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8258 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8259 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8260 if (I40E_DEBUG_USER & debug)
8261 pf->hw.debug_mask = debug;
8262 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8263 I40E_DEFAULT_MSG_ENABLE);
8266 /* Set default capability flags */
8267 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8268 I40E_FLAG_MSI_ENABLED |
8269 I40E_FLAG_LINK_POLLING_ENABLED |
8270 I40E_FLAG_MSIX_ENABLED;
8272 if (iommu_present(&pci_bus_type))
8273 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8275 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8277 /* Set default ITR */
8278 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8279 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8281 /* Depending on PF configurations, it is possible that the RSS
8282 * maximum might end up larger than the available queues
8284 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8285 pf->alloc_rss_size = 1;
8286 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8287 pf->rss_size_max = min_t(int, pf->rss_size_max,
8288 pf->hw.func_caps.num_tx_qp);
8289 if (pf->hw.func_caps.rss) {
8290 pf->flags |= I40E_FLAG_RSS_ENABLED;
8291 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8295 /* MFP mode enabled */
8296 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8297 pf->flags |= I40E_FLAG_MFP_ENABLED;
8298 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8299 if (i40e_get_npar_bw_setting(pf))
8300 dev_warn(&pf->pdev->dev,
8301 "Could not get NPAR bw settings\n");
8303 dev_info(&pf->pdev->dev,
8304 "Min BW = %8.8x, Max BW = %8.8x\n",
8305 pf->npar_min_bw, pf->npar_max_bw);
8308 /* FW/NVM is not yet fixed in this regard */
8309 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8310 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8311 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8312 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8313 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8314 pf->hw.num_partitions > 1)
8315 dev_info(&pf->pdev->dev,
8316 "Flow Director Sideband mode Disabled in MFP mode\n");
8318 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8319 pf->fdir_pf_filter_count =
8320 pf->hw.func_caps.fd_filters_guaranteed;
8321 pf->hw.fdir_shared_filter_count =
8322 pf->hw.func_caps.fd_filters_best_effort;
8325 if (pf->hw.func_caps.vmdq) {
8326 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8327 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8328 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8332 i40e_init_pf_fcoe(pf);
8334 #endif /* I40E_FCOE */
8335 #ifdef CONFIG_PCI_IOV
8336 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8337 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8338 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8339 pf->num_req_vfs = min_t(int,
8340 pf->hw.func_caps.num_vfs,
8343 #endif /* CONFIG_PCI_IOV */
8344 if (pf->hw.mac.type == I40E_MAC_X722) {
8345 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8346 I40E_FLAG_128_QP_RSS_CAPABLE |
8347 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8348 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8349 I40E_FLAG_WB_ON_ITR_CAPABLE |
8350 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
8352 pf->eeprom_version = 0xDEAD;
8353 pf->lan_veb = I40E_NO_VEB;
8354 pf->lan_vsi = I40E_NO_VSI;
8356 /* By default FW has this off for performance reasons */
8357 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8359 /* set up queue assignment tracking */
8360 size = sizeof(struct i40e_lump_tracking)
8361 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8362 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8367 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8368 pf->qp_pile->search_hint = 0;
8370 pf->tx_timeout_recovery_level = 1;
8372 mutex_init(&pf->switch_mutex);
8374 /* If NPAR is enabled nudge the Tx scheduler */
8375 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8376 i40e_set_npar_bw_setting(pf);
8383 * i40e_set_ntuple - set the ntuple feature flag and take action
8384 * @pf: board private structure to initialize
8385 * @features: the feature set that the stack is suggesting
8387 * returns a bool to indicate if reset needs to happen
8389 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8391 bool need_reset = false;
8393 /* Check if Flow Director n-tuple support was enabled or disabled. If
8394 * the state changed, we need to reset.
8396 if (features & NETIF_F_NTUPLE) {
8397 /* Enable filters and mark for reset */
8398 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8400 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8402 /* turn off filters, mark for reset and clear SW filter list */
8403 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8405 i40e_fdir_filter_exit(pf);
8407 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8408 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8409 /* reset fd counters */
8410 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8411 pf->fdir_pf_active_filters = 0;
8412 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8413 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8414 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8415 /* if ATR was auto disabled it can be re-enabled. */
8416 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8417 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8418 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8424 * i40e_set_features - set the netdev feature flags
8425 * @netdev: ptr to the netdev being adjusted
8426 * @features: the feature set that the stack is suggesting
8428 static int i40e_set_features(struct net_device *netdev,
8429 netdev_features_t features)
8431 struct i40e_netdev_priv *np = netdev_priv(netdev);
8432 struct i40e_vsi *vsi = np->vsi;
8433 struct i40e_pf *pf = vsi->back;
8436 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8437 i40e_vlan_stripping_enable(vsi);
8439 i40e_vlan_stripping_disable(vsi);
8441 need_reset = i40e_set_ntuple(pf, features);
8444 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8449 #ifdef CONFIG_I40E_VXLAN
8451 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8452 * @pf: board private structure
8453 * @port: The UDP port to look up
8455 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8457 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8461 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8462 if (pf->vxlan_ports[i] == port)
8470 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8471 * @netdev: This physical port's netdev
8472 * @sa_family: Socket Family that VXLAN is notifying us about
8473 * @port: New UDP port number that VXLAN started listening to
8475 static void i40e_add_vxlan_port(struct net_device *netdev,
8476 sa_family_t sa_family, __be16 port)
8478 struct i40e_netdev_priv *np = netdev_priv(netdev);
8479 struct i40e_vsi *vsi = np->vsi;
8480 struct i40e_pf *pf = vsi->back;
8484 if (sa_family == AF_INET6)
8487 idx = i40e_get_vxlan_port_idx(pf, port);
8489 /* Check if port already exists */
8490 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8491 netdev_info(netdev, "vxlan port %d already offloaded\n",
8496 /* Now check if there is space to add the new port */
8497 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8499 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8500 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8505 /* New port: add it and mark its index in the bitmap */
8506 pf->vxlan_ports[next_idx] = port;
8507 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8508 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8512 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8513 * @netdev: This physical port's netdev
8514 * @sa_family: Socket Family that VXLAN is notifying us about
8515 * @port: UDP port number that VXLAN stopped listening to
8517 static void i40e_del_vxlan_port(struct net_device *netdev,
8518 sa_family_t sa_family, __be16 port)
8520 struct i40e_netdev_priv *np = netdev_priv(netdev);
8521 struct i40e_vsi *vsi = np->vsi;
8522 struct i40e_pf *pf = vsi->back;
8525 if (sa_family == AF_INET6)
8528 idx = i40e_get_vxlan_port_idx(pf, port);
8530 /* Check if port already exists */
8531 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8532 /* if port exists, set it to 0 (mark for deletion)
8533 * and make it pending
8535 pf->vxlan_ports[idx] = 0;
8536 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8537 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8539 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8545 static int i40e_get_phys_port_id(struct net_device *netdev,
8546 struct netdev_phys_item_id *ppid)
8548 struct i40e_netdev_priv *np = netdev_priv(netdev);
8549 struct i40e_pf *pf = np->vsi->back;
8550 struct i40e_hw *hw = &pf->hw;
8552 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8555 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8556 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8562 * i40e_ndo_fdb_add - add an entry to the hardware database
8563 * @ndm: the input from the stack
8564 * @tb: pointer to array of nladdr (unused)
8565 * @dev: the net device pointer
8566 * @addr: the MAC address entry being added
8567 * @flags: instructions from stack about fdb operation
8569 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8570 struct net_device *dev,
8571 const unsigned char *addr, u16 vid,
8574 struct i40e_netdev_priv *np = netdev_priv(dev);
8575 struct i40e_pf *pf = np->vsi->back;
8578 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8582 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8586 /* Hardware does not support aging addresses so if a
8587 * ndm_state is given only allow permanent addresses
8589 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8590 netdev_info(dev, "FDB only supports static addresses\n");
8594 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8595 err = dev_uc_add_excl(dev, addr);
8596 else if (is_multicast_ether_addr(addr))
8597 err = dev_mc_add_excl(dev, addr);
8601 /* Only return duplicate errors if NLM_F_EXCL is set */
8602 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8609 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8610 * @dev: the netdev being configured
8611 * @nlh: RTNL message
8613 * Inserts a new hardware bridge if not already created and
8614 * enables the bridging mode requested (VEB or VEPA). If the
8615 * hardware bridge has already been inserted and the request
8616 * is to change the mode then that requires a PF reset to
8617 * allow rebuild of the components with required hardware
8618 * bridge mode enabled.
8620 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8621 struct nlmsghdr *nlh,
8624 struct i40e_netdev_priv *np = netdev_priv(dev);
8625 struct i40e_vsi *vsi = np->vsi;
8626 struct i40e_pf *pf = vsi->back;
8627 struct i40e_veb *veb = NULL;
8628 struct nlattr *attr, *br_spec;
8631 /* Only for PF VSI for now */
8632 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8635 /* Find the HW bridge for PF VSI */
8636 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8637 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8641 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8643 nla_for_each_nested(attr, br_spec, rem) {
8646 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8649 mode = nla_get_u16(attr);
8650 if ((mode != BRIDGE_MODE_VEPA) &&
8651 (mode != BRIDGE_MODE_VEB))
8654 /* Insert a new HW bridge */
8656 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8657 vsi->tc_config.enabled_tc);
8659 veb->bridge_mode = mode;
8660 i40e_config_bridge_mode(veb);
8662 /* No Bridge HW offload available */
8666 } else if (mode != veb->bridge_mode) {
8667 /* Existing HW bridge but different mode needs reset */
8668 veb->bridge_mode = mode;
8669 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8670 if (mode == BRIDGE_MODE_VEB)
8671 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8673 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8674 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8683 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8686 * @seq: RTNL message seq #
8687 * @dev: the netdev being configured
8688 * @filter_mask: unused
8689 * @nlflags: netlink flags passed in
8691 * Return the mode in which the hardware bridge is operating in
8694 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8695 struct net_device *dev,
8696 u32 __always_unused filter_mask,
8699 struct i40e_netdev_priv *np = netdev_priv(dev);
8700 struct i40e_vsi *vsi = np->vsi;
8701 struct i40e_pf *pf = vsi->back;
8702 struct i40e_veb *veb = NULL;
8705 /* Only for PF VSI for now */
8706 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8709 /* Find the HW bridge for the PF VSI */
8710 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8711 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8718 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8719 nlflags, 0, 0, filter_mask, NULL);
8722 #define I40E_MAX_TUNNEL_HDR_LEN 80
8724 * i40e_features_check - Validate encapsulated packet conforms to limits
8726 * @dev: This physical port's netdev
8727 * @features: Offload features that the stack believes apply
8729 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8730 struct net_device *dev,
8731 netdev_features_t features)
8733 if (skb->encapsulation &&
8734 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8735 I40E_MAX_TUNNEL_HDR_LEN))
8736 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8741 static const struct net_device_ops i40e_netdev_ops = {
8742 .ndo_open = i40e_open,
8743 .ndo_stop = i40e_close,
8744 .ndo_start_xmit = i40e_lan_xmit_frame,
8745 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8746 .ndo_set_rx_mode = i40e_set_rx_mode,
8747 .ndo_validate_addr = eth_validate_addr,
8748 .ndo_set_mac_address = i40e_set_mac,
8749 .ndo_change_mtu = i40e_change_mtu,
8750 .ndo_do_ioctl = i40e_ioctl,
8751 .ndo_tx_timeout = i40e_tx_timeout,
8752 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8753 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8754 #ifdef CONFIG_NET_POLL_CONTROLLER
8755 .ndo_poll_controller = i40e_netpoll,
8757 .ndo_setup_tc = i40e_setup_tc,
8759 .ndo_fcoe_enable = i40e_fcoe_enable,
8760 .ndo_fcoe_disable = i40e_fcoe_disable,
8762 .ndo_set_features = i40e_set_features,
8763 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8764 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8765 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8766 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8767 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8768 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8769 #ifdef CONFIG_I40E_VXLAN
8770 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8771 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8773 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8774 .ndo_fdb_add = i40e_ndo_fdb_add,
8775 .ndo_features_check = i40e_features_check,
8776 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8777 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8781 * i40e_config_netdev - Setup the netdev flags
8782 * @vsi: the VSI being configured
8784 * Returns 0 on success, negative value on failure
8786 static int i40e_config_netdev(struct i40e_vsi *vsi)
8788 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8789 struct i40e_pf *pf = vsi->back;
8790 struct i40e_hw *hw = &pf->hw;
8791 struct i40e_netdev_priv *np;
8792 struct net_device *netdev;
8793 u8 mac_addr[ETH_ALEN];
8796 etherdev_size = sizeof(struct i40e_netdev_priv);
8797 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8801 vsi->netdev = netdev;
8802 np = netdev_priv(netdev);
8805 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8806 NETIF_F_GSO_UDP_TUNNEL |
8810 netdev->features = NETIF_F_SG |
8814 NETIF_F_GSO_UDP_TUNNEL |
8816 NETIF_F_HW_VLAN_CTAG_TX |
8817 NETIF_F_HW_VLAN_CTAG_RX |
8818 NETIF_F_HW_VLAN_CTAG_FILTER |
8827 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8828 netdev->features |= NETIF_F_NTUPLE;
8830 /* copy netdev features into list of user selectable features */
8831 netdev->hw_features |= netdev->features;
8833 if (vsi->type == I40E_VSI_MAIN) {
8834 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8835 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8836 /* The following steps are necessary to prevent reception
8837 * of tagged packets - some older NVM configurations load a
8838 * default a MAC-VLAN filter that accepts any tagged packet
8839 * which must be replaced by a normal filter.
8841 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8842 spin_lock_bh(&vsi->mac_filter_list_lock);
8843 i40e_add_filter(vsi, mac_addr,
8844 I40E_VLAN_ANY, false, true);
8845 spin_unlock_bh(&vsi->mac_filter_list_lock);
8848 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8849 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8850 pf->vsi[pf->lan_vsi]->netdev->name);
8851 random_ether_addr(mac_addr);
8853 spin_lock_bh(&vsi->mac_filter_list_lock);
8854 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8855 spin_unlock_bh(&vsi->mac_filter_list_lock);
8858 spin_lock_bh(&vsi->mac_filter_list_lock);
8859 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8860 spin_unlock_bh(&vsi->mac_filter_list_lock);
8862 ether_addr_copy(netdev->dev_addr, mac_addr);
8863 ether_addr_copy(netdev->perm_addr, mac_addr);
8864 /* vlan gets same features (except vlan offload)
8865 * after any tweaks for specific VSI types
8867 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8868 NETIF_F_HW_VLAN_CTAG_RX |
8869 NETIF_F_HW_VLAN_CTAG_FILTER);
8870 netdev->priv_flags |= IFF_UNICAST_FLT;
8871 netdev->priv_flags |= IFF_SUPP_NOFCS;
8872 /* Setup netdev TC information */
8873 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8875 netdev->netdev_ops = &i40e_netdev_ops;
8876 netdev->watchdog_timeo = 5 * HZ;
8877 i40e_set_ethtool_ops(netdev);
8879 i40e_fcoe_config_netdev(netdev, vsi);
8886 * i40e_vsi_delete - Delete a VSI from the switch
8887 * @vsi: the VSI being removed
8889 * Returns 0 on success, negative value on failure
8891 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8893 /* remove default VSI is not allowed */
8894 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8897 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8901 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8902 * @vsi: the VSI being queried
8904 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8906 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8908 struct i40e_veb *veb;
8909 struct i40e_pf *pf = vsi->back;
8911 /* Uplink is not a bridge so default to VEB */
8912 if (vsi->veb_idx == I40E_NO_VEB)
8915 veb = pf->veb[vsi->veb_idx];
8917 dev_info(&pf->pdev->dev,
8918 "There is no veb associated with the bridge\n");
8922 /* Uplink is a bridge in VEPA mode */
8923 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
8926 /* Uplink is a bridge in VEB mode */
8930 /* VEPA is now default bridge, so return 0 */
8935 * i40e_add_vsi - Add a VSI to the switch
8936 * @vsi: the VSI being configured
8938 * This initializes a VSI context depending on the VSI type to be added and
8939 * passes it down to the add_vsi aq command.
8941 static int i40e_add_vsi(struct i40e_vsi *vsi)
8944 u8 laa_macaddr[ETH_ALEN];
8945 bool found_laa_mac_filter = false;
8946 struct i40e_pf *pf = vsi->back;
8947 struct i40e_hw *hw = &pf->hw;
8948 struct i40e_vsi_context ctxt;
8949 struct i40e_mac_filter *f, *ftmp;
8951 u8 enabled_tc = 0x1; /* TC0 enabled */
8954 memset(&ctxt, 0, sizeof(ctxt));
8955 switch (vsi->type) {
8957 /* The PF's main VSI is already setup as part of the
8958 * device initialization, so we'll not bother with
8959 * the add_vsi call, but we will retrieve the current
8962 ctxt.seid = pf->main_vsi_seid;
8963 ctxt.pf_num = pf->hw.pf_id;
8965 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8966 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8968 dev_info(&pf->pdev->dev,
8969 "couldn't get PF vsi config, err %s aq_err %s\n",
8970 i40e_stat_str(&pf->hw, ret),
8971 i40e_aq_str(&pf->hw,
8972 pf->hw.aq.asq_last_status));
8975 vsi->info = ctxt.info;
8976 vsi->info.valid_sections = 0;
8978 vsi->seid = ctxt.seid;
8979 vsi->id = ctxt.vsi_number;
8981 enabled_tc = i40e_pf_get_tc_map(pf);
8983 /* MFP mode setup queue map and update VSI */
8984 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8985 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8986 memset(&ctxt, 0, sizeof(ctxt));
8987 ctxt.seid = pf->main_vsi_seid;
8988 ctxt.pf_num = pf->hw.pf_id;
8990 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8991 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8993 dev_info(&pf->pdev->dev,
8994 "update vsi failed, err %s aq_err %s\n",
8995 i40e_stat_str(&pf->hw, ret),
8996 i40e_aq_str(&pf->hw,
8997 pf->hw.aq.asq_last_status));
9001 /* update the local VSI info queue map */
9002 i40e_vsi_update_queue_map(vsi, &ctxt);
9003 vsi->info.valid_sections = 0;
9005 /* Default/Main VSI is only enabled for TC0
9006 * reconfigure it to enable all TCs that are
9007 * available on the port in SFP mode.
9008 * For MFP case the iSCSI PF would use this
9009 * flow to enable LAN+iSCSI TC.
9011 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9013 dev_info(&pf->pdev->dev,
9014 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9016 i40e_stat_str(&pf->hw, ret),
9017 i40e_aq_str(&pf->hw,
9018 pf->hw.aq.asq_last_status));
9025 ctxt.pf_num = hw->pf_id;
9027 ctxt.uplink_seid = vsi->uplink_seid;
9028 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9029 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9030 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9031 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9032 ctxt.info.valid_sections |=
9033 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9034 ctxt.info.switch_id =
9035 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9037 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9040 case I40E_VSI_VMDQ2:
9041 ctxt.pf_num = hw->pf_id;
9043 ctxt.uplink_seid = vsi->uplink_seid;
9044 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9045 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9047 /* This VSI is connected to VEB so the switch_id
9048 * should be set to zero by default.
9050 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9051 ctxt.info.valid_sections |=
9052 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9053 ctxt.info.switch_id =
9054 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9057 /* Setup the VSI tx/rx queue map for TC0 only for now */
9058 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9061 case I40E_VSI_SRIOV:
9062 ctxt.pf_num = hw->pf_id;
9063 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9064 ctxt.uplink_seid = vsi->uplink_seid;
9065 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9066 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9068 /* This VSI is connected to VEB so the switch_id
9069 * should be set to zero by default.
9071 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9072 ctxt.info.valid_sections |=
9073 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9074 ctxt.info.switch_id =
9075 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9078 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9079 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9080 if (pf->vf[vsi->vf_id].spoofchk) {
9081 ctxt.info.valid_sections |=
9082 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9083 ctxt.info.sec_flags |=
9084 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9085 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9087 /* Setup the VSI tx/rx queue map for TC0 only for now */
9088 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9093 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9095 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9100 #endif /* I40E_FCOE */
9105 if (vsi->type != I40E_VSI_MAIN) {
9106 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9108 dev_info(&vsi->back->pdev->dev,
9109 "add vsi failed, err %s aq_err %s\n",
9110 i40e_stat_str(&pf->hw, ret),
9111 i40e_aq_str(&pf->hw,
9112 pf->hw.aq.asq_last_status));
9116 vsi->info = ctxt.info;
9117 vsi->info.valid_sections = 0;
9118 vsi->seid = ctxt.seid;
9119 vsi->id = ctxt.vsi_number;
9122 spin_lock_bh(&vsi->mac_filter_list_lock);
9123 /* If macvlan filters already exist, force them to get loaded */
9124 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9128 /* Expected to have only one MAC filter entry for LAA in list */
9129 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9130 ether_addr_copy(laa_macaddr, f->macaddr);
9131 found_laa_mac_filter = true;
9134 spin_unlock_bh(&vsi->mac_filter_list_lock);
9136 if (found_laa_mac_filter) {
9137 struct i40e_aqc_remove_macvlan_element_data element;
9139 memset(&element, 0, sizeof(element));
9140 ether_addr_copy(element.mac_addr, laa_macaddr);
9141 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9142 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9145 /* some older FW has a different default */
9147 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9148 i40e_aq_remove_macvlan(hw, vsi->seid,
9152 i40e_aq_mac_address_write(hw,
9153 I40E_AQC_WRITE_TYPE_LAA_WOL,
9158 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9159 pf->flags |= I40E_FLAG_FILTER_SYNC;
9162 /* Update VSI BW information */
9163 ret = i40e_vsi_get_bw_info(vsi);
9165 dev_info(&pf->pdev->dev,
9166 "couldn't get vsi bw info, err %s aq_err %s\n",
9167 i40e_stat_str(&pf->hw, ret),
9168 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9169 /* VSI is already added so not tearing that up */
9178 * i40e_vsi_release - Delete a VSI and free its resources
9179 * @vsi: the VSI being removed
9181 * Returns 0 on success or < 0 on error
9183 int i40e_vsi_release(struct i40e_vsi *vsi)
9185 struct i40e_mac_filter *f, *ftmp;
9186 struct i40e_veb *veb = NULL;
9193 /* release of a VEB-owner or last VSI is not allowed */
9194 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9195 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9196 vsi->seid, vsi->uplink_seid);
9199 if (vsi == pf->vsi[pf->lan_vsi] &&
9200 !test_bit(__I40E_DOWN, &pf->state)) {
9201 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9205 uplink_seid = vsi->uplink_seid;
9206 if (vsi->type != I40E_VSI_SRIOV) {
9207 if (vsi->netdev_registered) {
9208 vsi->netdev_registered = false;
9210 /* results in a call to i40e_close() */
9211 unregister_netdev(vsi->netdev);
9214 i40e_vsi_close(vsi);
9216 i40e_vsi_disable_irq(vsi);
9219 spin_lock_bh(&vsi->mac_filter_list_lock);
9220 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9221 i40e_del_filter(vsi, f->macaddr, f->vlan,
9222 f->is_vf, f->is_netdev);
9223 spin_unlock_bh(&vsi->mac_filter_list_lock);
9225 i40e_sync_vsi_filters(vsi, false);
9227 i40e_vsi_delete(vsi);
9228 i40e_vsi_free_q_vectors(vsi);
9230 free_netdev(vsi->netdev);
9233 i40e_vsi_clear_rings(vsi);
9234 i40e_vsi_clear(vsi);
9236 /* If this was the last thing on the VEB, except for the
9237 * controlling VSI, remove the VEB, which puts the controlling
9238 * VSI onto the next level down in the switch.
9240 * Well, okay, there's one more exception here: don't remove
9241 * the orphan VEBs yet. We'll wait for an explicit remove request
9242 * from up the network stack.
9244 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9246 pf->vsi[i]->uplink_seid == uplink_seid &&
9247 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9248 n++; /* count the VSIs */
9251 for (i = 0; i < I40E_MAX_VEB; i++) {
9254 if (pf->veb[i]->uplink_seid == uplink_seid)
9255 n++; /* count the VEBs */
9256 if (pf->veb[i]->seid == uplink_seid)
9259 if (n == 0 && veb && veb->uplink_seid != 0)
9260 i40e_veb_release(veb);
9266 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9267 * @vsi: ptr to the VSI
9269 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9270 * corresponding SW VSI structure and initializes num_queue_pairs for the
9271 * newly allocated VSI.
9273 * Returns 0 on success or negative on failure
9275 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9278 struct i40e_pf *pf = vsi->back;
9280 if (vsi->q_vectors[0]) {
9281 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9286 if (vsi->base_vector) {
9287 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9288 vsi->seid, vsi->base_vector);
9292 ret = i40e_vsi_alloc_q_vectors(vsi);
9294 dev_info(&pf->pdev->dev,
9295 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9296 vsi->num_q_vectors, vsi->seid, ret);
9297 vsi->num_q_vectors = 0;
9298 goto vector_setup_out;
9301 /* In Legacy mode, we do not have to get any other vector since we
9302 * piggyback on the misc/ICR0 for queue interrupts.
9304 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9306 if (vsi->num_q_vectors)
9307 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9308 vsi->num_q_vectors, vsi->idx);
9309 if (vsi->base_vector < 0) {
9310 dev_info(&pf->pdev->dev,
9311 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9312 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9313 i40e_vsi_free_q_vectors(vsi);
9315 goto vector_setup_out;
9323 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9324 * @vsi: pointer to the vsi.
9326 * This re-allocates a vsi's queue resources.
9328 * Returns pointer to the successfully allocated and configured VSI sw struct
9329 * on success, otherwise returns NULL on failure.
9331 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9333 struct i40e_pf *pf = vsi->back;
9337 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9338 i40e_vsi_clear_rings(vsi);
9340 i40e_vsi_free_arrays(vsi, false);
9341 i40e_set_num_rings_in_vsi(vsi);
9342 ret = i40e_vsi_alloc_arrays(vsi, false);
9346 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9348 dev_info(&pf->pdev->dev,
9349 "failed to get tracking for %d queues for VSI %d err %d\n",
9350 vsi->alloc_queue_pairs, vsi->seid, ret);
9353 vsi->base_queue = ret;
9355 /* Update the FW view of the VSI. Force a reset of TC and queue
9356 * layout configurations.
9358 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9359 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9360 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9361 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9363 /* assign it some queues */
9364 ret = i40e_alloc_rings(vsi);
9368 /* map all of the rings to the q_vectors */
9369 i40e_vsi_map_rings_to_vectors(vsi);
9373 i40e_vsi_free_q_vectors(vsi);
9374 if (vsi->netdev_registered) {
9375 vsi->netdev_registered = false;
9376 unregister_netdev(vsi->netdev);
9377 free_netdev(vsi->netdev);
9380 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9382 i40e_vsi_clear(vsi);
9387 * i40e_vsi_setup - Set up a VSI by a given type
9388 * @pf: board private structure
9390 * @uplink_seid: the switch element to link to
9391 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9393 * This allocates the sw VSI structure and its queue resources, then add a VSI
9394 * to the identified VEB.
9396 * Returns pointer to the successfully allocated and configure VSI sw struct on
9397 * success, otherwise returns NULL on failure.
9399 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9400 u16 uplink_seid, u32 param1)
9402 struct i40e_vsi *vsi = NULL;
9403 struct i40e_veb *veb = NULL;
9407 /* The requested uplink_seid must be either
9408 * - the PF's port seid
9409 * no VEB is needed because this is the PF
9410 * or this is a Flow Director special case VSI
9411 * - seid of an existing VEB
9412 * - seid of a VSI that owns an existing VEB
9413 * - seid of a VSI that doesn't own a VEB
9414 * a new VEB is created and the VSI becomes the owner
9415 * - seid of the PF VSI, which is what creates the first VEB
9416 * this is a special case of the previous
9418 * Find which uplink_seid we were given and create a new VEB if needed
9420 for (i = 0; i < I40E_MAX_VEB; i++) {
9421 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9427 if (!veb && uplink_seid != pf->mac_seid) {
9429 for (i = 0; i < pf->num_alloc_vsi; i++) {
9430 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9436 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9441 if (vsi->uplink_seid == pf->mac_seid)
9442 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9443 vsi->tc_config.enabled_tc);
9444 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9445 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9446 vsi->tc_config.enabled_tc);
9448 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9449 dev_info(&vsi->back->pdev->dev,
9450 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9453 /* We come up by default in VEPA mode if SRIOV is not
9454 * already enabled, in which case we can't force VEPA
9457 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9458 veb->bridge_mode = BRIDGE_MODE_VEPA;
9459 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9461 i40e_config_bridge_mode(veb);
9463 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9464 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9468 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9472 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9473 uplink_seid = veb->seid;
9476 /* get vsi sw struct */
9477 v_idx = i40e_vsi_mem_alloc(pf, type);
9480 vsi = pf->vsi[v_idx];
9484 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9486 if (type == I40E_VSI_MAIN)
9487 pf->lan_vsi = v_idx;
9488 else if (type == I40E_VSI_SRIOV)
9489 vsi->vf_id = param1;
9490 /* assign it some queues */
9491 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9494 dev_info(&pf->pdev->dev,
9495 "failed to get tracking for %d queues for VSI %d err=%d\n",
9496 vsi->alloc_queue_pairs, vsi->seid, ret);
9499 vsi->base_queue = ret;
9501 /* get a VSI from the hardware */
9502 vsi->uplink_seid = uplink_seid;
9503 ret = i40e_add_vsi(vsi);
9507 switch (vsi->type) {
9508 /* setup the netdev if needed */
9510 case I40E_VSI_VMDQ2:
9512 ret = i40e_config_netdev(vsi);
9515 ret = register_netdev(vsi->netdev);
9518 vsi->netdev_registered = true;
9519 netif_carrier_off(vsi->netdev);
9520 #ifdef CONFIG_I40E_DCB
9521 /* Setup DCB netlink interface */
9522 i40e_dcbnl_setup(vsi);
9523 #endif /* CONFIG_I40E_DCB */
9527 /* set up vectors and rings if needed */
9528 ret = i40e_vsi_setup_vectors(vsi);
9532 ret = i40e_alloc_rings(vsi);
9536 /* map all of the rings to the q_vectors */
9537 i40e_vsi_map_rings_to_vectors(vsi);
9539 i40e_vsi_reset_stats(vsi);
9543 /* no netdev or rings for the other VSI types */
9547 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9548 (vsi->type == I40E_VSI_VMDQ2)) {
9549 ret = i40e_vsi_config_rss(vsi);
9554 i40e_vsi_free_q_vectors(vsi);
9556 if (vsi->netdev_registered) {
9557 vsi->netdev_registered = false;
9558 unregister_netdev(vsi->netdev);
9559 free_netdev(vsi->netdev);
9563 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9565 i40e_vsi_clear(vsi);
9571 * i40e_veb_get_bw_info - Query VEB BW information
9572 * @veb: the veb to query
9574 * Query the Tx scheduler BW configuration data for given VEB
9576 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9578 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9579 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9580 struct i40e_pf *pf = veb->pf;
9581 struct i40e_hw *hw = &pf->hw;
9586 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9589 dev_info(&pf->pdev->dev,
9590 "query veb bw config failed, err %s aq_err %s\n",
9591 i40e_stat_str(&pf->hw, ret),
9592 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9596 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9599 dev_info(&pf->pdev->dev,
9600 "query veb bw ets config failed, err %s aq_err %s\n",
9601 i40e_stat_str(&pf->hw, ret),
9602 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9606 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9607 veb->bw_max_quanta = ets_data.tc_bw_max;
9608 veb->is_abs_credits = bw_data.absolute_credits_enable;
9609 veb->enabled_tc = ets_data.tc_valid_bits;
9610 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9611 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9612 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9613 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9614 veb->bw_tc_limit_credits[i] =
9615 le16_to_cpu(bw_data.tc_bw_limits[i]);
9616 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9624 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9625 * @pf: board private structure
9627 * On error: returns error code (negative)
9628 * On success: returns vsi index in PF (positive)
9630 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9633 struct i40e_veb *veb;
9636 /* Need to protect the allocation of switch elements at the PF level */
9637 mutex_lock(&pf->switch_mutex);
9639 /* VEB list may be fragmented if VEB creation/destruction has
9640 * been happening. We can afford to do a quick scan to look
9641 * for any free slots in the list.
9643 * find next empty veb slot, looping back around if necessary
9646 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9648 if (i >= I40E_MAX_VEB) {
9650 goto err_alloc_veb; /* out of VEB slots! */
9653 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9660 veb->enabled_tc = 1;
9665 mutex_unlock(&pf->switch_mutex);
9670 * i40e_switch_branch_release - Delete a branch of the switch tree
9671 * @branch: where to start deleting
9673 * This uses recursion to find the tips of the branch to be
9674 * removed, deleting until we get back to and can delete this VEB.
9676 static void i40e_switch_branch_release(struct i40e_veb *branch)
9678 struct i40e_pf *pf = branch->pf;
9679 u16 branch_seid = branch->seid;
9680 u16 veb_idx = branch->idx;
9683 /* release any VEBs on this VEB - RECURSION */
9684 for (i = 0; i < I40E_MAX_VEB; i++) {
9687 if (pf->veb[i]->uplink_seid == branch->seid)
9688 i40e_switch_branch_release(pf->veb[i]);
9691 /* Release the VSIs on this VEB, but not the owner VSI.
9693 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9694 * the VEB itself, so don't use (*branch) after this loop.
9696 for (i = 0; i < pf->num_alloc_vsi; i++) {
9699 if (pf->vsi[i]->uplink_seid == branch_seid &&
9700 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9701 i40e_vsi_release(pf->vsi[i]);
9705 /* There's one corner case where the VEB might not have been
9706 * removed, so double check it here and remove it if needed.
9707 * This case happens if the veb was created from the debugfs
9708 * commands and no VSIs were added to it.
9710 if (pf->veb[veb_idx])
9711 i40e_veb_release(pf->veb[veb_idx]);
9715 * i40e_veb_clear - remove veb struct
9716 * @veb: the veb to remove
9718 static void i40e_veb_clear(struct i40e_veb *veb)
9724 struct i40e_pf *pf = veb->pf;
9726 mutex_lock(&pf->switch_mutex);
9727 if (pf->veb[veb->idx] == veb)
9728 pf->veb[veb->idx] = NULL;
9729 mutex_unlock(&pf->switch_mutex);
9736 * i40e_veb_release - Delete a VEB and free its resources
9737 * @veb: the VEB being removed
9739 void i40e_veb_release(struct i40e_veb *veb)
9741 struct i40e_vsi *vsi = NULL;
9747 /* find the remaining VSI and check for extras */
9748 for (i = 0; i < pf->num_alloc_vsi; i++) {
9749 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9755 dev_info(&pf->pdev->dev,
9756 "can't remove VEB %d with %d VSIs left\n",
9761 /* move the remaining VSI to uplink veb */
9762 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9763 if (veb->uplink_seid) {
9764 vsi->uplink_seid = veb->uplink_seid;
9765 if (veb->uplink_seid == pf->mac_seid)
9766 vsi->veb_idx = I40E_NO_VEB;
9768 vsi->veb_idx = veb->veb_idx;
9771 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9772 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9775 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9776 i40e_veb_clear(veb);
9780 * i40e_add_veb - create the VEB in the switch
9781 * @veb: the VEB to be instantiated
9782 * @vsi: the controlling VSI
9784 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9786 struct i40e_pf *pf = veb->pf;
9787 bool is_default = veb->pf->cur_promisc;
9788 bool is_cloud = false;
9791 /* get a VEB from the hardware */
9792 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9793 veb->enabled_tc, is_default,
9794 is_cloud, &veb->seid, NULL);
9796 dev_info(&pf->pdev->dev,
9797 "couldn't add VEB, err %s aq_err %s\n",
9798 i40e_stat_str(&pf->hw, ret),
9799 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9803 /* get statistics counter */
9804 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9805 &veb->stats_idx, NULL, NULL, NULL);
9807 dev_info(&pf->pdev->dev,
9808 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9809 i40e_stat_str(&pf->hw, ret),
9810 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9813 ret = i40e_veb_get_bw_info(veb);
9815 dev_info(&pf->pdev->dev,
9816 "couldn't get VEB bw info, err %s aq_err %s\n",
9817 i40e_stat_str(&pf->hw, ret),
9818 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9819 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9823 vsi->uplink_seid = veb->seid;
9824 vsi->veb_idx = veb->idx;
9825 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9831 * i40e_veb_setup - Set up a VEB
9832 * @pf: board private structure
9833 * @flags: VEB setup flags
9834 * @uplink_seid: the switch element to link to
9835 * @vsi_seid: the initial VSI seid
9836 * @enabled_tc: Enabled TC bit-map
9838 * This allocates the sw VEB structure and links it into the switch
9839 * It is possible and legal for this to be a duplicate of an already
9840 * existing VEB. It is also possible for both uplink and vsi seids
9841 * to be zero, in order to create a floating VEB.
9843 * Returns pointer to the successfully allocated VEB sw struct on
9844 * success, otherwise returns NULL on failure.
9846 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9847 u16 uplink_seid, u16 vsi_seid,
9850 struct i40e_veb *veb, *uplink_veb = NULL;
9851 int vsi_idx, veb_idx;
9854 /* if one seid is 0, the other must be 0 to create a floating relay */
9855 if ((uplink_seid == 0 || vsi_seid == 0) &&
9856 (uplink_seid + vsi_seid != 0)) {
9857 dev_info(&pf->pdev->dev,
9858 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9859 uplink_seid, vsi_seid);
9863 /* make sure there is such a vsi and uplink */
9864 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9865 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9867 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9868 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9873 if (uplink_seid && uplink_seid != pf->mac_seid) {
9874 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9875 if (pf->veb[veb_idx] &&
9876 pf->veb[veb_idx]->seid == uplink_seid) {
9877 uplink_veb = pf->veb[veb_idx];
9882 dev_info(&pf->pdev->dev,
9883 "uplink seid %d not found\n", uplink_seid);
9888 /* get veb sw struct */
9889 veb_idx = i40e_veb_mem_alloc(pf);
9892 veb = pf->veb[veb_idx];
9894 veb->uplink_seid = uplink_seid;
9895 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9896 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9898 /* create the VEB in the switch */
9899 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9902 if (vsi_idx == pf->lan_vsi)
9903 pf->lan_veb = veb->idx;
9908 i40e_veb_clear(veb);
9914 * i40e_setup_pf_switch_element - set PF vars based on switch type
9915 * @pf: board private structure
9916 * @ele: element we are building info from
9917 * @num_reported: total number of elements
9918 * @printconfig: should we print the contents
9920 * helper function to assist in extracting a few useful SEID values.
9922 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9923 struct i40e_aqc_switch_config_element_resp *ele,
9924 u16 num_reported, bool printconfig)
9926 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9927 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9928 u8 element_type = ele->element_type;
9929 u16 seid = le16_to_cpu(ele->seid);
9932 dev_info(&pf->pdev->dev,
9933 "type=%d seid=%d uplink=%d downlink=%d\n",
9934 element_type, seid, uplink_seid, downlink_seid);
9936 switch (element_type) {
9937 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9938 pf->mac_seid = seid;
9940 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9942 if (uplink_seid != pf->mac_seid)
9944 if (pf->lan_veb == I40E_NO_VEB) {
9947 /* find existing or else empty VEB */
9948 for (v = 0; v < I40E_MAX_VEB; v++) {
9949 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9954 if (pf->lan_veb == I40E_NO_VEB) {
9955 v = i40e_veb_mem_alloc(pf);
9962 pf->veb[pf->lan_veb]->seid = seid;
9963 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9964 pf->veb[pf->lan_veb]->pf = pf;
9965 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9967 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9968 if (num_reported != 1)
9970 /* This is immediately after a reset so we can assume this is
9973 pf->mac_seid = uplink_seid;
9974 pf->pf_seid = downlink_seid;
9975 pf->main_vsi_seid = seid;
9977 dev_info(&pf->pdev->dev,
9978 "pf_seid=%d main_vsi_seid=%d\n",
9979 pf->pf_seid, pf->main_vsi_seid);
9981 case I40E_SWITCH_ELEMENT_TYPE_PF:
9982 case I40E_SWITCH_ELEMENT_TYPE_VF:
9983 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9984 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9985 case I40E_SWITCH_ELEMENT_TYPE_PE:
9986 case I40E_SWITCH_ELEMENT_TYPE_PA:
9987 /* ignore these for now */
9990 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9991 element_type, seid);
9997 * i40e_fetch_switch_configuration - Get switch config from firmware
9998 * @pf: board private structure
9999 * @printconfig: should we print the contents
10001 * Get the current switch configuration from the device and
10002 * extract a few useful SEID values.
10004 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10006 struct i40e_aqc_get_switch_config_resp *sw_config;
10012 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10016 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10018 u16 num_reported, num_total;
10020 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10024 dev_info(&pf->pdev->dev,
10025 "get switch config failed err %s aq_err %s\n",
10026 i40e_stat_str(&pf->hw, ret),
10027 i40e_aq_str(&pf->hw,
10028 pf->hw.aq.asq_last_status));
10033 num_reported = le16_to_cpu(sw_config->header.num_reported);
10034 num_total = le16_to_cpu(sw_config->header.num_total);
10037 dev_info(&pf->pdev->dev,
10038 "header: %d reported %d total\n",
10039 num_reported, num_total);
10041 for (i = 0; i < num_reported; i++) {
10042 struct i40e_aqc_switch_config_element_resp *ele =
10043 &sw_config->element[i];
10045 i40e_setup_pf_switch_element(pf, ele, num_reported,
10048 } while (next_seid != 0);
10055 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10056 * @pf: board private structure
10057 * @reinit: if the Main VSI needs to re-initialized.
10059 * Returns 0 on success, negative value on failure
10061 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10065 /* find out what's out there already */
10066 ret = i40e_fetch_switch_configuration(pf, false);
10068 dev_info(&pf->pdev->dev,
10069 "couldn't fetch switch config, err %s aq_err %s\n",
10070 i40e_stat_str(&pf->hw, ret),
10071 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10074 i40e_pf_reset_stats(pf);
10076 /* first time setup */
10077 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10078 struct i40e_vsi *vsi = NULL;
10081 /* Set up the PF VSI associated with the PF's main VSI
10082 * that is already in the HW switch
10084 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10085 uplink_seid = pf->veb[pf->lan_veb]->seid;
10087 uplink_seid = pf->mac_seid;
10088 if (pf->lan_vsi == I40E_NO_VSI)
10089 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10091 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10093 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10094 i40e_fdir_teardown(pf);
10098 /* force a reset of TC and queue layout configurations */
10099 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10101 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10102 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10103 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10105 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10107 i40e_fdir_sb_setup(pf);
10109 /* Setup static PF queue filter control settings */
10110 ret = i40e_setup_pf_filter_control(pf);
10112 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10114 /* Failure here should not stop continuing other steps */
10117 /* enable RSS in the HW, even for only one queue, as the stack can use
10120 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10121 i40e_pf_config_rss(pf);
10123 /* fill in link information and enable LSE reporting */
10124 i40e_update_link_info(&pf->hw);
10125 i40e_link_event(pf);
10127 /* Initialize user-specific link properties */
10128 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10129 I40E_AQ_AN_COMPLETED) ? true : false);
10137 * i40e_determine_queue_usage - Work out queue distribution
10138 * @pf: board private structure
10140 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10144 pf->num_lan_qps = 0;
10146 pf->num_fcoe_qps = 0;
10149 /* Find the max queues to be put into basic use. We'll always be
10150 * using TC0, whether or not DCB is running, and TC0 will get the
10153 queues_left = pf->hw.func_caps.num_tx_qp;
10155 if ((queues_left == 1) ||
10156 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10157 /* one qp for PF, no queues for anything else */
10159 pf->alloc_rss_size = pf->num_lan_qps = 1;
10161 /* make sure all the fancies are disabled */
10162 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10164 I40E_FLAG_FCOE_ENABLED |
10166 I40E_FLAG_FD_SB_ENABLED |
10167 I40E_FLAG_FD_ATR_ENABLED |
10168 I40E_FLAG_DCB_CAPABLE |
10169 I40E_FLAG_SRIOV_ENABLED |
10170 I40E_FLAG_VMDQ_ENABLED);
10171 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10172 I40E_FLAG_FD_SB_ENABLED |
10173 I40E_FLAG_FD_ATR_ENABLED |
10174 I40E_FLAG_DCB_CAPABLE))) {
10175 /* one qp for PF */
10176 pf->alloc_rss_size = pf->num_lan_qps = 1;
10177 queues_left -= pf->num_lan_qps;
10179 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10181 I40E_FLAG_FCOE_ENABLED |
10183 I40E_FLAG_FD_SB_ENABLED |
10184 I40E_FLAG_FD_ATR_ENABLED |
10185 I40E_FLAG_DCB_ENABLED |
10186 I40E_FLAG_VMDQ_ENABLED);
10188 /* Not enough queues for all TCs */
10189 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10190 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10191 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10192 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10194 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10195 num_online_cpus());
10196 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10197 pf->hw.func_caps.num_tx_qp);
10199 queues_left -= pf->num_lan_qps;
10203 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10204 if (I40E_DEFAULT_FCOE <= queues_left) {
10205 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10206 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10207 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10209 pf->num_fcoe_qps = 0;
10210 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10211 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10214 queues_left -= pf->num_fcoe_qps;
10218 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10219 if (queues_left > 1) {
10220 queues_left -= 1; /* save 1 queue for FD */
10222 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10223 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10227 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10228 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10229 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10230 (queues_left / pf->num_vf_qps));
10231 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10234 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10235 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10236 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10237 (queues_left / pf->num_vmdq_qps));
10238 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10241 pf->queues_left = queues_left;
10242 dev_dbg(&pf->pdev->dev,
10243 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10244 pf->hw.func_caps.num_tx_qp,
10245 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10246 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10247 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10250 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10255 * i40e_setup_pf_filter_control - Setup PF static filter control
10256 * @pf: PF to be setup
10258 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10259 * settings. If PE/FCoE are enabled then it will also set the per PF
10260 * based filter sizes required for them. It also enables Flow director,
10261 * ethertype and macvlan type filter settings for the pf.
10263 * Returns 0 on success, negative on failure
10265 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10267 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10269 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10271 /* Flow Director is enabled */
10272 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10273 settings->enable_fdir = true;
10275 /* Ethtype and MACVLAN filters enabled for PF */
10276 settings->enable_ethtype = true;
10277 settings->enable_macvlan = true;
10279 if (i40e_set_filter_control(&pf->hw, settings))
10285 #define INFO_STRING_LEN 255
10286 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10287 static void i40e_print_features(struct i40e_pf *pf)
10289 struct i40e_hw *hw = &pf->hw;
10290 char *buf, *string;
10293 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
10295 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
10301 i += snprintf(&buf[i], REMAIN(i), "Features: PF-id[%d] ", hw->pf_id);
10302 #ifdef CONFIG_PCI_IOV
10303 i += snprintf(&buf[i], REMAIN(i), "VFs: %d ", pf->num_req_vfs);
10305 i += snprintf(&buf[i], REMAIN(i), "VSIs: %d QP: %d RX: %s ",
10306 pf->hw.func_caps.num_vsis,
10307 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10308 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10310 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10311 i += snprintf(&buf[i], REMAIN(i), "RSS ");
10312 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10313 i += snprintf(&buf[i], REMAIN(i), "FD_ATR ");
10314 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10315 i += snprintf(&buf[i], REMAIN(i), "FD_SB ");
10316 i += snprintf(&buf[i], REMAIN(i), "NTUPLE ");
10318 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10319 i += snprintf(&buf[i], REMAIN(i), "DCB ");
10320 #if IS_ENABLED(CONFIG_VXLAN)
10321 i += snprintf(&buf[i], REMAIN(i), "VxLAN ");
10323 if (pf->flags & I40E_FLAG_PTP)
10324 i += snprintf(&buf[i], REMAIN(i), "PTP ");
10326 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10327 i += snprintf(&buf[i], REMAIN(i), "FCOE ");
10329 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10330 i += snprintf(&buf[i], REMAIN(i), "VEPA ");
10332 buf += sprintf(buf, "VEPA ");
10334 dev_info(&pf->pdev->dev, "%s\n", string);
10336 WARN_ON(i > INFO_STRING_LEN);
10340 * i40e_probe - Device initialization routine
10341 * @pdev: PCI device information struct
10342 * @ent: entry in i40e_pci_tbl
10344 * i40e_probe initializes a PF identified by a pci_dev structure.
10345 * The OS initialization, configuring of the PF private structure,
10346 * and a hardware reset occur.
10348 * Returns 0 on success, negative on failure
10350 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10352 struct i40e_aq_get_phy_abilities_resp abilities;
10353 struct i40e_pf *pf;
10354 struct i40e_hw *hw;
10355 static u16 pfs_found;
10364 err = pci_enable_device_mem(pdev);
10368 /* set up for high or low dma */
10369 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10371 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10373 dev_err(&pdev->dev,
10374 "DMA configuration failed: 0x%x\n", err);
10379 /* set up pci connections */
10380 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10381 IORESOURCE_MEM), i40e_driver_name);
10383 dev_info(&pdev->dev,
10384 "pci_request_selected_regions failed %d\n", err);
10388 pci_enable_pcie_error_reporting(pdev);
10389 pci_set_master(pdev);
10391 /* Now that we have a PCI connection, we need to do the
10392 * low level device setup. This is primarily setting up
10393 * the Admin Queue structures and then querying for the
10394 * device's current profile information.
10396 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10403 set_bit(__I40E_DOWN, &pf->state);
10408 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10409 I40E_MAX_CSR_SPACE);
10411 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10412 if (!hw->hw_addr) {
10414 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10415 (unsigned int)pci_resource_start(pdev, 0),
10416 pf->ioremap_len, err);
10419 hw->vendor_id = pdev->vendor;
10420 hw->device_id = pdev->device;
10421 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10422 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10423 hw->subsystem_device_id = pdev->subsystem_device;
10424 hw->bus.device = PCI_SLOT(pdev->devfn);
10425 hw->bus.func = PCI_FUNC(pdev->devfn);
10426 pf->instance = pfs_found;
10429 pf->msg_enable = pf->hw.debug_mask;
10430 pf->msg_enable = debug;
10433 /* do a special CORER for clearing PXE mode once at init */
10434 if (hw->revision_id == 0 &&
10435 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10436 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10441 i40e_clear_pxe_mode(hw);
10444 /* Reset here to make sure all is clean and to define PF 'n' */
10446 err = i40e_pf_reset(hw);
10448 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10453 hw->aq.num_arq_entries = I40E_AQ_LEN;
10454 hw->aq.num_asq_entries = I40E_AQ_LEN;
10455 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10456 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10457 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10459 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10461 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10463 err = i40e_init_shared_code(hw);
10465 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10470 /* set up a default setting for link flow control */
10471 pf->hw.fc.requested_mode = I40E_FC_NONE;
10473 err = i40e_init_adminq(hw);
10475 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10476 dev_info(&pdev->dev,
10477 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10479 dev_info(&pdev->dev,
10480 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10485 /* provide nvm, fw, api versions */
10486 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10487 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10488 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10489 i40e_nvm_version_str(hw));
10491 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10492 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10493 dev_info(&pdev->dev,
10494 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10495 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10496 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10497 dev_info(&pdev->dev,
10498 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10500 i40e_verify_eeprom(pf);
10502 /* Rev 0 hardware was never productized */
10503 if (hw->revision_id < 1)
10504 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10506 i40e_clear_pxe_mode(hw);
10507 err = i40e_get_capabilities(pf);
10509 goto err_adminq_setup;
10511 err = i40e_sw_init(pf);
10513 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10517 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10518 hw->func_caps.num_rx_qp,
10519 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10521 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10522 goto err_init_lan_hmc;
10525 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10527 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10529 goto err_configure_lan_hmc;
10532 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10533 * Ignore error return codes because if it was already disabled via
10534 * hardware settings this will fail
10536 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10537 (pf->hw.aq.fw_maj_ver < 4)) {
10538 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10539 i40e_aq_stop_lldp(hw, true, NULL);
10542 i40e_get_mac_addr(hw, hw->mac.addr);
10543 if (!is_valid_ether_addr(hw->mac.addr)) {
10544 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10548 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10549 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10550 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10551 if (is_valid_ether_addr(hw->mac.port_addr))
10552 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10554 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10556 dev_info(&pdev->dev,
10557 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10558 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10559 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10561 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10563 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10564 #endif /* I40E_FCOE */
10566 pci_set_drvdata(pdev, pf);
10567 pci_save_state(pdev);
10568 #ifdef CONFIG_I40E_DCB
10569 err = i40e_init_pf_dcb(pf);
10571 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10572 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10573 /* Continue without DCB enabled */
10575 #endif /* CONFIG_I40E_DCB */
10577 /* set up periodic task facility */
10578 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10579 pf->service_timer_period = HZ;
10581 INIT_WORK(&pf->service_task, i40e_service_task);
10582 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10583 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10585 /* NVM bit on means WoL disabled for the port */
10586 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10587 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10588 pf->wol_en = false;
10591 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10593 /* set up the main switch operations */
10594 i40e_determine_queue_usage(pf);
10595 err = i40e_init_interrupt_scheme(pf);
10597 goto err_switch_setup;
10599 /* The number of VSIs reported by the FW is the minimum guaranteed
10600 * to us; HW supports far more and we share the remaining pool with
10601 * the other PFs. We allocate space for more than the guarantee with
10602 * the understanding that we might not get them all later.
10604 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10605 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10607 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10609 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10610 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10611 pf->vsi = kzalloc(len, GFP_KERNEL);
10614 goto err_switch_setup;
10617 #ifdef CONFIG_PCI_IOV
10618 /* prep for VF support */
10619 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10620 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10621 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10622 if (pci_num_vf(pdev))
10623 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10626 err = i40e_setup_pf_switch(pf, false);
10628 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10632 /* Make sure flow control is set according to current settings */
10633 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10634 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10635 dev_dbg(&pf->pdev->dev,
10636 "Set fc with err %s aq_err %s on get_phy_cap\n",
10637 i40e_stat_str(hw, err),
10638 i40e_aq_str(hw, hw->aq.asq_last_status));
10639 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10640 dev_dbg(&pf->pdev->dev,
10641 "Set fc with err %s aq_err %s on set_phy_config\n",
10642 i40e_stat_str(hw, err),
10643 i40e_aq_str(hw, hw->aq.asq_last_status));
10644 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10645 dev_dbg(&pf->pdev->dev,
10646 "Set fc with err %s aq_err %s on get_link_info\n",
10647 i40e_stat_str(hw, err),
10648 i40e_aq_str(hw, hw->aq.asq_last_status));
10650 /* if FDIR VSI was set up, start it now */
10651 for (i = 0; i < pf->num_alloc_vsi; i++) {
10652 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10653 i40e_vsi_open(pf->vsi[i]);
10658 /* driver is only interested in link up/down and module qualification
10659 * reports from firmware
10661 err = i40e_aq_set_phy_int_mask(&pf->hw,
10662 I40E_AQ_EVENT_LINK_UPDOWN |
10663 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10665 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10666 i40e_stat_str(&pf->hw, err),
10667 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10669 /* Reconfigure hardware for allowing smaller MSS in the case
10670 * of TSO, so that we avoid the MDD being fired and causing
10671 * a reset in the case of small MSS+TSO.
10673 val = rd32(hw, I40E_REG_MSS);
10674 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10675 val &= ~I40E_REG_MSS_MIN_MASK;
10676 val |= I40E_64BYTE_MSS;
10677 wr32(hw, I40E_REG_MSS, val);
10680 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10681 (pf->hw.aq.fw_maj_ver < 4)) {
10683 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10685 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10686 i40e_stat_str(&pf->hw, err),
10687 i40e_aq_str(&pf->hw,
10688 pf->hw.aq.asq_last_status));
10690 /* The main driver is (mostly) up and happy. We need to set this state
10691 * before setting up the misc vector or we get a race and the vector
10692 * ends up disabled forever.
10694 clear_bit(__I40E_DOWN, &pf->state);
10696 /* In case of MSIX we are going to setup the misc vector right here
10697 * to handle admin queue events etc. In case of legacy and MSI
10698 * the misc functionality and queue processing is combined in
10699 * the same vector and that gets setup at open.
10701 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10702 err = i40e_setup_misc_vector(pf);
10704 dev_info(&pdev->dev,
10705 "setup of misc vector failed: %d\n", err);
10710 #ifdef CONFIG_PCI_IOV
10711 /* prep for VF support */
10712 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10713 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10714 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10717 /* disable link interrupts for VFs */
10718 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10719 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10720 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10723 if (pci_num_vf(pdev)) {
10724 dev_info(&pdev->dev,
10725 "Active VFs found, allocating resources.\n");
10726 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10728 dev_info(&pdev->dev,
10729 "Error %d allocating resources for existing VFs\n",
10733 #endif /* CONFIG_PCI_IOV */
10737 i40e_dbg_pf_init(pf);
10739 /* tell the firmware that we're starting */
10740 i40e_send_version(pf);
10742 /* since everything's happy, start the service_task timer */
10743 mod_timer(&pf->service_timer,
10744 round_jiffies(jiffies + pf->service_timer_period));
10747 /* create FCoE interface */
10748 i40e_fcoe_vsi_setup(pf);
10751 #define PCI_SPEED_SIZE 8
10752 #define PCI_WIDTH_SIZE 8
10753 /* Devices on the IOSF bus do not have this information
10754 * and will report PCI Gen 1 x 1 by default so don't bother
10757 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10758 char speed[PCI_SPEED_SIZE] = "Unknown";
10759 char width[PCI_WIDTH_SIZE] = "Unknown";
10761 /* Get the negotiated link width and speed from PCI config
10764 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10767 i40e_set_pci_config_data(hw, link_status);
10769 switch (hw->bus.speed) {
10770 case i40e_bus_speed_8000:
10771 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10772 case i40e_bus_speed_5000:
10773 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10774 case i40e_bus_speed_2500:
10775 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10779 switch (hw->bus.width) {
10780 case i40e_bus_width_pcie_x8:
10781 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10782 case i40e_bus_width_pcie_x4:
10783 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10784 case i40e_bus_width_pcie_x2:
10785 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10786 case i40e_bus_width_pcie_x1:
10787 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10792 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10795 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10796 hw->bus.speed < i40e_bus_speed_8000) {
10797 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10798 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10802 /* get the requested speeds from the fw */
10803 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10805 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10806 i40e_stat_str(&pf->hw, err),
10807 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10808 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10810 /* get the supported phy types from the fw */
10811 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10813 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10814 i40e_stat_str(&pf->hw, err),
10815 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10816 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10818 /* Add a filter to drop all Flow control frames from any VSI from being
10819 * transmitted. By doing so we stop a malicious VF from sending out
10820 * PAUSE or PFC frames and potentially controlling traffic for other
10822 * The FW can still send Flow control frames if enabled.
10824 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10825 pf->main_vsi_seid);
10827 /* print a string summarizing features */
10828 i40e_print_features(pf);
10832 /* Unwind what we've done if something failed in the setup */
10834 set_bit(__I40E_DOWN, &pf->state);
10835 i40e_clear_interrupt_scheme(pf);
10838 i40e_reset_interrupt_capability(pf);
10839 del_timer_sync(&pf->service_timer);
10841 err_configure_lan_hmc:
10842 (void)i40e_shutdown_lan_hmc(hw);
10844 kfree(pf->qp_pile);
10847 (void)i40e_shutdown_adminq(hw);
10849 iounmap(hw->hw_addr);
10853 pci_disable_pcie_error_reporting(pdev);
10854 pci_release_selected_regions(pdev,
10855 pci_select_bars(pdev, IORESOURCE_MEM));
10858 pci_disable_device(pdev);
10863 * i40e_remove - Device removal routine
10864 * @pdev: PCI device information struct
10866 * i40e_remove is called by the PCI subsystem to alert the driver
10867 * that is should release a PCI device. This could be caused by a
10868 * Hot-Plug event, or because the driver is going to be removed from
10871 static void i40e_remove(struct pci_dev *pdev)
10873 struct i40e_pf *pf = pci_get_drvdata(pdev);
10874 struct i40e_hw *hw = &pf->hw;
10875 i40e_status ret_code;
10878 i40e_dbg_pf_exit(pf);
10882 /* Disable RSS in hw */
10883 wr32(hw, I40E_PFQF_HENA(0), 0);
10884 wr32(hw, I40E_PFQF_HENA(1), 0);
10886 /* no more scheduling of any task */
10887 set_bit(__I40E_DOWN, &pf->state);
10888 del_timer_sync(&pf->service_timer);
10889 cancel_work_sync(&pf->service_task);
10890 i40e_fdir_teardown(pf);
10892 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10894 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10897 i40e_fdir_teardown(pf);
10899 /* If there is a switch structure or any orphans, remove them.
10900 * This will leave only the PF's VSI remaining.
10902 for (i = 0; i < I40E_MAX_VEB; i++) {
10906 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10907 pf->veb[i]->uplink_seid == 0)
10908 i40e_switch_branch_release(pf->veb[i]);
10911 /* Now we can shutdown the PF's VSI, just before we kill
10914 if (pf->vsi[pf->lan_vsi])
10915 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10917 /* shutdown and destroy the HMC */
10918 if (pf->hw.hmc.hmc_obj) {
10919 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10921 dev_warn(&pdev->dev,
10922 "Failed to destroy the HMC resources: %d\n",
10926 /* shutdown the adminq */
10927 ret_code = i40e_shutdown_adminq(&pf->hw);
10929 dev_warn(&pdev->dev,
10930 "Failed to destroy the Admin Queue resources: %d\n",
10933 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10934 i40e_clear_interrupt_scheme(pf);
10935 for (i = 0; i < pf->num_alloc_vsi; i++) {
10937 i40e_vsi_clear_rings(pf->vsi[i]);
10938 i40e_vsi_clear(pf->vsi[i]);
10943 for (i = 0; i < I40E_MAX_VEB; i++) {
10948 kfree(pf->qp_pile);
10951 iounmap(pf->hw.hw_addr);
10953 pci_release_selected_regions(pdev,
10954 pci_select_bars(pdev, IORESOURCE_MEM));
10956 pci_disable_pcie_error_reporting(pdev);
10957 pci_disable_device(pdev);
10961 * i40e_pci_error_detected - warning that something funky happened in PCI land
10962 * @pdev: PCI device information struct
10964 * Called to warn that something happened and the error handling steps
10965 * are in progress. Allows the driver to quiesce things, be ready for
10968 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10969 enum pci_channel_state error)
10971 struct i40e_pf *pf = pci_get_drvdata(pdev);
10973 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10975 /* shutdown all operations */
10976 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10978 i40e_prep_for_reset(pf);
10982 /* Request a slot reset */
10983 return PCI_ERS_RESULT_NEED_RESET;
10987 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10988 * @pdev: PCI device information struct
10990 * Called to find if the driver can work with the device now that
10991 * the pci slot has been reset. If a basic connection seems good
10992 * (registers are readable and have sane content) then return a
10993 * happy little PCI_ERS_RESULT_xxx.
10995 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10997 struct i40e_pf *pf = pci_get_drvdata(pdev);
10998 pci_ers_result_t result;
11002 dev_dbg(&pdev->dev, "%s\n", __func__);
11003 if (pci_enable_device_mem(pdev)) {
11004 dev_info(&pdev->dev,
11005 "Cannot re-enable PCI device after reset.\n");
11006 result = PCI_ERS_RESULT_DISCONNECT;
11008 pci_set_master(pdev);
11009 pci_restore_state(pdev);
11010 pci_save_state(pdev);
11011 pci_wake_from_d3(pdev, false);
11013 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11015 result = PCI_ERS_RESULT_RECOVERED;
11017 result = PCI_ERS_RESULT_DISCONNECT;
11020 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11022 dev_info(&pdev->dev,
11023 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11025 /* non-fatal, continue */
11032 * i40e_pci_error_resume - restart operations after PCI error recovery
11033 * @pdev: PCI device information struct
11035 * Called to allow the driver to bring things back up after PCI error
11036 * and/or reset recovery has finished.
11038 static void i40e_pci_error_resume(struct pci_dev *pdev)
11040 struct i40e_pf *pf = pci_get_drvdata(pdev);
11042 dev_dbg(&pdev->dev, "%s\n", __func__);
11043 if (test_bit(__I40E_SUSPENDED, &pf->state))
11047 i40e_handle_reset_warning(pf);
11052 * i40e_shutdown - PCI callback for shutting down
11053 * @pdev: PCI device information struct
11055 static void i40e_shutdown(struct pci_dev *pdev)
11057 struct i40e_pf *pf = pci_get_drvdata(pdev);
11058 struct i40e_hw *hw = &pf->hw;
11060 set_bit(__I40E_SUSPENDED, &pf->state);
11061 set_bit(__I40E_DOWN, &pf->state);
11063 i40e_prep_for_reset(pf);
11066 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11067 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11069 del_timer_sync(&pf->service_timer);
11070 cancel_work_sync(&pf->service_task);
11071 i40e_fdir_teardown(pf);
11074 i40e_prep_for_reset(pf);
11077 wr32(hw, I40E_PFPM_APM,
11078 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11079 wr32(hw, I40E_PFPM_WUFC,
11080 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11082 i40e_clear_interrupt_scheme(pf);
11084 if (system_state == SYSTEM_POWER_OFF) {
11085 pci_wake_from_d3(pdev, pf->wol_en);
11086 pci_set_power_state(pdev, PCI_D3hot);
11092 * i40e_suspend - PCI callback for moving to D3
11093 * @pdev: PCI device information struct
11095 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11097 struct i40e_pf *pf = pci_get_drvdata(pdev);
11098 struct i40e_hw *hw = &pf->hw;
11100 set_bit(__I40E_SUSPENDED, &pf->state);
11101 set_bit(__I40E_DOWN, &pf->state);
11104 i40e_prep_for_reset(pf);
11107 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11108 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11110 pci_wake_from_d3(pdev, pf->wol_en);
11111 pci_set_power_state(pdev, PCI_D3hot);
11117 * i40e_resume - PCI callback for waking up from D3
11118 * @pdev: PCI device information struct
11120 static int i40e_resume(struct pci_dev *pdev)
11122 struct i40e_pf *pf = pci_get_drvdata(pdev);
11125 pci_set_power_state(pdev, PCI_D0);
11126 pci_restore_state(pdev);
11127 /* pci_restore_state() clears dev->state_saves, so
11128 * call pci_save_state() again to restore it.
11130 pci_save_state(pdev);
11132 err = pci_enable_device_mem(pdev);
11134 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11137 pci_set_master(pdev);
11139 /* no wakeup events while running */
11140 pci_wake_from_d3(pdev, false);
11142 /* handling the reset will rebuild the device state */
11143 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11144 clear_bit(__I40E_DOWN, &pf->state);
11146 i40e_reset_and_rebuild(pf, false);
11154 static const struct pci_error_handlers i40e_err_handler = {
11155 .error_detected = i40e_pci_error_detected,
11156 .slot_reset = i40e_pci_error_slot_reset,
11157 .resume = i40e_pci_error_resume,
11160 static struct pci_driver i40e_driver = {
11161 .name = i40e_driver_name,
11162 .id_table = i40e_pci_tbl,
11163 .probe = i40e_probe,
11164 .remove = i40e_remove,
11166 .suspend = i40e_suspend,
11167 .resume = i40e_resume,
11169 .shutdown = i40e_shutdown,
11170 .err_handler = &i40e_err_handler,
11171 .sriov_configure = i40e_pci_sriov_configure,
11175 * i40e_init_module - Driver registration routine
11177 * i40e_init_module is the first routine called when the driver is
11178 * loaded. All it does is register with the PCI subsystem.
11180 static int __init i40e_init_module(void)
11182 pr_info("%s: %s - version %s\n", i40e_driver_name,
11183 i40e_driver_string, i40e_driver_version_str);
11184 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11187 return pci_register_driver(&i40e_driver);
11189 module_init(i40e_init_module);
11192 * i40e_exit_module - Driver exit cleanup routine
11194 * i40e_exit_module is called just before the driver is removed
11197 static void __exit i40e_exit_module(void)
11199 pci_unregister_driver(&i40e_driver);
11202 module_exit(i40e_exit_module);