1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 1
42 #define DRV_VERSION_BUILD 23
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
141 mem->va = kzalloc(size, GFP_KERNEL);
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 /* it's ok to kfree a NULL pointer */
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
171 * Returns the base item index of the lump, or negative for error
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 pile->search_hint = i + j;
213 /* not enough, so skip over it and continue looking */
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
227 * Returns the count of items in the lump
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 int valid_id = (id | I40E_PILE_VALID_BIT);
235 if (!pile || index >= pile->num_entries)
239 i < pile->num_entries && pile->list[i] == valid_id;
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
255 * If not already scheduled, this puts the task into the work queue
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
274 void i40e_tx_timeout(struct net_device *netdev)
276 static void i40e_tx_timeout(struct net_device *netdev)
279 struct i40e_netdev_priv *np = netdev_priv(netdev);
280 struct i40e_vsi *vsi = np->vsi;
281 struct i40e_pf *pf = vsi->back;
283 pf->tx_timeout_count++;
285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
286 pf->tx_timeout_recovery_level = 1;
287 pf->tx_timeout_last_recovery = jiffies;
288 netdev_info(netdev, "tx_timeout recovery level %d\n",
289 pf->tx_timeout_recovery_level);
291 switch (pf->tx_timeout_recovery_level) {
293 /* disable and re-enable queues for the VSI */
294 if (in_interrupt()) {
295 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
298 i40e_vsi_reinit_locked(vsi);
302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
312 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
316 i40e_service_event_schedule(pf);
317 pf->tx_timeout_recovery_level++;
321 * i40e_release_rx_desc - Store the new tail and head values
322 * @rx_ring: ring to bump
323 * @val: new head index
325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
327 rx_ring->next_to_use = val;
329 /* Force memory writes to complete before letting h/w
330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
335 writel(val, rx_ring->tail);
339 * i40e_get_vsi_stats_struct - Get System Network Statistics
340 * @vsi: the VSI we care about
342 * Returns the address of the device statistics structure.
343 * The statistics are actually updated from the service task.
345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
347 return &vsi->net_stats;
351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
352 * @netdev: network interface device structure
354 * Returns the address of the device statistics structure.
355 * The statistics are actually updated from the service task.
358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
359 struct net_device *netdev,
360 struct rtnl_link_stats64 *stats)
362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
363 struct net_device *netdev,
364 struct rtnl_link_stats64 *stats)
367 struct i40e_netdev_priv *np = netdev_priv(netdev);
368 struct i40e_ring *tx_ring, *rx_ring;
369 struct i40e_vsi *vsi = np->vsi;
370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
373 if (test_bit(__I40E_DOWN, &vsi->state))
380 for (i = 0; i < vsi->num_queue_pairs; i++) {
384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
390 packets = tx_ring->stats.packets;
391 bytes = tx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
394 stats->tx_packets += packets;
395 stats->tx_bytes += bytes;
396 rx_ring = &tx_ring[1];
399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
400 packets = rx_ring->stats.packets;
401 bytes = rx_ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
404 stats->rx_packets += packets;
405 stats->rx_bytes += bytes;
409 /* following stats updated by i40e_watchdog_subtask() */
410 stats->multicast = vsi_stats->multicast;
411 stats->tx_errors = vsi_stats->tx_errors;
412 stats->tx_dropped = vsi_stats->tx_dropped;
413 stats->rx_errors = vsi_stats->rx_errors;
414 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
415 stats->rx_length_errors = vsi_stats->rx_length_errors;
421 * i40e_vsi_reset_stats - Resets all stats of the given vsi
422 * @vsi: the VSI to have its stats reset
424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
426 struct rtnl_link_stats64 *ns;
432 ns = i40e_get_vsi_stats_struct(vsi);
433 memset(ns, 0, sizeof(*ns));
434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
437 if (vsi->rx_rings && vsi->rx_rings[0]) {
438 for (i = 0; i < vsi->num_queue_pairs; i++) {
439 memset(&vsi->rx_rings[i]->stats, 0 ,
440 sizeof(vsi->rx_rings[i]->stats));
441 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
442 sizeof(vsi->rx_rings[i]->rx_stats));
443 memset(&vsi->tx_rings[i]->stats, 0 ,
444 sizeof(vsi->tx_rings[i]->stats));
445 memset(&vsi->tx_rings[i]->tx_stats, 0,
446 sizeof(vsi->tx_rings[i]->tx_stats));
449 vsi->stat_offsets_loaded = false;
453 * i40e_pf_reset_stats - Reset all of the stats for the given pf
454 * @pf: the PF to be reset
456 void i40e_pf_reset_stats(struct i40e_pf *pf)
460 memset(&pf->stats, 0, sizeof(pf->stats));
461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
462 pf->stat_offsets_loaded = false;
464 for (i = 0; i < I40E_MAX_VEB; i++) {
466 memset(&pf->veb[i]->stats, 0,
467 sizeof(pf->veb[i]->stats));
468 memset(&pf->veb[i]->stats_offsets, 0,
469 sizeof(pf->veb[i]->stats_offsets));
470 pf->veb[i]->stat_offsets_loaded = false;
476 * i40e_stat_update48 - read and update a 48 bit stat from the chip
477 * @hw: ptr to the hardware info
478 * @hireg: the high 32 bit reg to read
479 * @loreg: the low 32 bit reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
484 * Since the device stats are not reset at PFReset, they likely will not
485 * be zeroed when the driver starts. We'll save the first values read
486 * and use them as offsets to be subtracted from the raw values in order
487 * to report stats that count from zero. In the process, we also manage
488 * the potential roll-over.
490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
491 bool offset_loaded, u64 *offset, u64 *stat)
495 if (hw->device_id == I40E_DEV_ID_QEMU) {
496 new_data = rd32(hw, loreg);
497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
499 new_data = rd64(hw, loreg);
503 if (likely(new_data >= *offset))
504 *stat = new_data - *offset;
506 *stat = (new_data + ((u64)1 << 48)) - *offset;
507 *stat &= 0xFFFFFFFFFFFFULL;
511 * i40e_stat_update32 - read and update a 32 bit stat from the chip
512 * @hw: ptr to the hardware info
513 * @reg: the hw reg to read
514 * @offset_loaded: has the initial offset been loaded yet
515 * @offset: ptr to current offset value
516 * @stat: ptr to the stat
518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
519 bool offset_loaded, u64 *offset, u64 *stat)
523 new_data = rd32(hw, reg);
526 if (likely(new_data >= *offset))
527 *stat = (u32)(new_data - *offset);
529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
534 * @vsi: the VSI to be updated
536 void i40e_update_eth_stats(struct i40e_vsi *vsi)
538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
539 struct i40e_pf *pf = vsi->back;
540 struct i40e_hw *hw = &pf->hw;
541 struct i40e_eth_stats *oes;
542 struct i40e_eth_stats *es; /* device's eth stats */
544 es = &vsi->eth_stats;
545 oes = &vsi->eth_stats_offsets;
547 /* Gather up the stats that the hw collects */
548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
549 vsi->stat_offsets_loaded,
550 &oes->tx_errors, &es->tx_errors);
551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_discards, &es->rx_discards);
554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
555 vsi->stat_offsets_loaded,
556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_errors, &es->tx_errors);
561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
562 I40E_GLV_GORCL(stat_idx),
563 vsi->stat_offsets_loaded,
564 &oes->rx_bytes, &es->rx_bytes);
565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
566 I40E_GLV_UPRCL(stat_idx),
567 vsi->stat_offsets_loaded,
568 &oes->rx_unicast, &es->rx_unicast);
569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
570 I40E_GLV_MPRCL(stat_idx),
571 vsi->stat_offsets_loaded,
572 &oes->rx_multicast, &es->rx_multicast);
573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
574 I40E_GLV_BPRCL(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_broadcast, &es->rx_broadcast);
578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
579 I40E_GLV_GOTCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->tx_bytes, &es->tx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
583 I40E_GLV_UPTCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->tx_unicast, &es->tx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
587 I40E_GLV_MPTCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->tx_multicast, &es->tx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
591 I40E_GLV_BPTCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->tx_broadcast, &es->tx_broadcast);
594 vsi->stat_offsets_loaded = true;
598 * i40e_update_veb_stats - Update Switch component statistics
599 * @veb: the VEB being updated
601 static void i40e_update_veb_stats(struct i40e_veb *veb)
603 struct i40e_pf *pf = veb->pf;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
609 idx = veb->stats_idx;
611 oes = &veb->stats_offsets;
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_discards, &es->tx_discards);
617 if (hw->revision_id > 0)
618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
619 veb->stat_offsets_loaded,
620 &oes->rx_unknown_protocol,
621 &es->rx_unknown_protocol);
622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
623 veb->stat_offsets_loaded,
624 &oes->rx_bytes, &es->rx_bytes);
625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
626 veb->stat_offsets_loaded,
627 &oes->rx_unicast, &es->rx_unicast);
628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
629 veb->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
632 veb->stat_offsets_loaded,
633 &oes->rx_broadcast, &es->rx_broadcast);
635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
636 veb->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_unicast, &es->tx_unicast);
641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
642 veb->stat_offsets_loaded,
643 &oes->tx_multicast, &es->tx_multicast);
644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
645 veb->stat_offsets_loaded,
646 &oes->tx_broadcast, &es->tx_broadcast);
647 veb->stat_offsets_loaded = true;
652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
653 * @vsi: the VSI that is capable of doing FCoE
655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
657 struct i40e_pf *pf = vsi->back;
658 struct i40e_hw *hw = &pf->hw;
659 struct i40e_fcoe_stats *ofs;
660 struct i40e_fcoe_stats *fs; /* device's eth stats */
663 if (vsi->type != I40E_VSI_FCOE)
666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
667 fs = &vsi->fcoe_stats;
668 ofs = &vsi->fcoe_stats_offsets;
670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
671 vsi->fcoe_stat_offsets_loaded,
672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
674 vsi->fcoe_stat_offsets_loaded,
675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
677 vsi->fcoe_stat_offsets_loaded,
678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
680 vsi->fcoe_stat_offsets_loaded,
681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
683 vsi->fcoe_stat_offsets_loaded,
684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
686 vsi->fcoe_stat_offsets_loaded,
687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
689 vsi->fcoe_stat_offsets_loaded,
690 &ofs->fcoe_last_error, &fs->fcoe_last_error);
691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
692 vsi->fcoe_stat_offsets_loaded,
693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
695 vsi->fcoe_stat_offsets_loaded = true;
700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
701 * @pf: the corresponding PF
703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
707 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
708 struct i40e_hw_port_stats *nsd = &pf->stats;
709 struct i40e_hw *hw = &pf->hw;
713 if ((hw->fc.current_mode != I40E_FC_FULL) &&
714 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
717 xoff = nsd->link_xoff_rx;
718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
719 pf->stat_offsets_loaded,
720 &osd->link_xoff_rx, &nsd->link_xoff_rx);
722 /* No new LFC xoff rx */
723 if (!(nsd->link_xoff_rx - xoff))
726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
727 for (v = 0; v < pf->num_alloc_vsi; v++) {
728 struct i40e_vsi *vsi = pf->vsi[v];
730 if (!vsi || !vsi->tx_rings[0])
733 for (i = 0; i < vsi->num_queue_pairs; i++) {
734 struct i40e_ring *ring = vsi->tx_rings[i];
735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
742 * @pf: the corresponding PF
744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
748 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
749 struct i40e_hw_port_stats *nsd = &pf->stats;
750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
751 struct i40e_dcbx_config *dcb_cfg;
752 struct i40e_hw *hw = &pf->hw;
756 dcb_cfg = &hw->local_dcbx_config;
758 /* See if DCB enabled with PFC TC */
759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
760 !(dcb_cfg->pfc.pfcenable)) {
761 i40e_update_link_xoff_rx(pf);
765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
766 u64 prio_xoff = nsd->priority_xoff_rx[i];
767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
768 pf->stat_offsets_loaded,
769 &osd->priority_xoff_rx[i],
770 &nsd->priority_xoff_rx[i]);
772 /* No new PFC xoff rx */
773 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
775 /* Get the TC for given priority */
776 tc = dcb_cfg->etscfg.prioritytable[i];
780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
781 for (v = 0; v < pf->num_alloc_vsi; v++) {
782 struct i40e_vsi *vsi = pf->vsi[v];
784 if (!vsi || !vsi->tx_rings[0])
787 for (i = 0; i < vsi->num_queue_pairs; i++) {
788 struct i40e_ring *ring = vsi->tx_rings[i];
792 clear_bit(__I40E_HANG_CHECK_ARMED,
799 * i40e_update_vsi_stats - Update the vsi statistics counters.
800 * @vsi: the VSI to be updated
802 * There are a few instances where we store the same stat in a
803 * couple of different structs. This is partly because we have
804 * the netdev stats that need to be filled out, which is slightly
805 * different from the "eth_stats" defined by the chip and used in
806 * VF communications. We sort it out here.
808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
810 struct i40e_pf *pf = vsi->back;
811 struct rtnl_link_stats64 *ons;
812 struct rtnl_link_stats64 *ns; /* netdev stats */
813 struct i40e_eth_stats *oes;
814 struct i40e_eth_stats *es; /* device's eth stats */
815 u32 tx_restart, tx_busy;
824 if (test_bit(__I40E_DOWN, &vsi->state) ||
825 test_bit(__I40E_CONFIG_BUSY, &pf->state))
828 ns = i40e_get_vsi_stats_struct(vsi);
829 ons = &vsi->net_stats_offsets;
830 es = &vsi->eth_stats;
831 oes = &vsi->eth_stats_offsets;
833 /* Gather up the netdev and vsi stats that the driver collects
834 * on the fly during packet processing
838 tx_restart = tx_busy = 0;
842 for (q = 0; q < vsi->num_queue_pairs; q++) {
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
856 /* Rx queue is part of the same block as Tx queue */
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
874 ns->rx_packets = rx_p;
876 ns->tx_packets = tx_p;
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->eth.tx_discards,
925 &nsd->eth.tx_discards);
927 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
928 I40E_GLPRT_UPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_unicast,
931 &nsd->eth.rx_unicast);
932 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
933 I40E_GLPRT_MPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_multicast,
936 &nsd->eth.rx_multicast);
937 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
938 I40E_GLPRT_BPRCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.rx_broadcast,
941 &nsd->eth.rx_broadcast);
942 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
943 I40E_GLPRT_UPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_unicast,
946 &nsd->eth.tx_unicast);
947 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
948 I40E_GLPRT_MPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_multicast,
951 &nsd->eth.tx_multicast);
952 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
953 I40E_GLPRT_BPTCL(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->eth.tx_broadcast,
956 &nsd->eth.tx_broadcast);
958 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->tx_dropped_link_down,
961 &nsd->tx_dropped_link_down);
963 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->crc_errors, &nsd->crc_errors);
967 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->illegal_bytes, &nsd->illegal_bytes);
971 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->mac_local_faults,
974 &nsd->mac_local_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->mac_remote_faults,
978 &nsd->mac_remote_faults);
980 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->rx_length_errors,
983 &nsd->rx_length_errors);
985 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->link_xon_rx, &nsd->link_xon_rx);
988 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->link_xon_tx, &nsd->link_xon_tx);
991 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
992 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->link_xoff_tx, &nsd->link_xoff_tx);
996 for (i = 0; i < 8; i++) {
997 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
998 pf->stat_offsets_loaded,
999 &osd->priority_xon_rx[i],
1000 &nsd->priority_xon_rx[i]);
1001 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1002 pf->stat_offsets_loaded,
1003 &osd->priority_xon_tx[i],
1004 &nsd->priority_xon_tx[i]);
1005 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xoff_tx[i],
1008 &nsd->priority_xoff_tx[i]);
1009 i40e_stat_update32(hw,
1010 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1011 pf->stat_offsets_loaded,
1012 &osd->priority_xon_2_xoff[i],
1013 &nsd->priority_xon_2_xoff[i]);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1017 I40E_GLPRT_PRC64L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_64, &nsd->rx_size_64);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1021 I40E_GLPRT_PRC127L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_127, &nsd->rx_size_127);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1025 I40E_GLPRT_PRC255L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_255, &nsd->rx_size_255);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1029 I40E_GLPRT_PRC511L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_511, &nsd->rx_size_511);
1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1033 I40E_GLPRT_PRC1023L(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_size_1023, &nsd->rx_size_1023);
1036 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1037 I40E_GLPRT_PRC1522L(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_size_1522, &nsd->rx_size_1522);
1040 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1041 I40E_GLPRT_PRC9522L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_size_big, &nsd->rx_size_big);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1046 I40E_GLPRT_PTC64L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_64, &nsd->tx_size_64);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1050 I40E_GLPRT_PTC127L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_127, &nsd->tx_size_127);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1054 I40E_GLPRT_PTC255L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_255, &nsd->tx_size_255);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1058 I40E_GLPRT_PTC511L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_511, &nsd->tx_size_511);
1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1062 I40E_GLPRT_PTC1023L(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_size_1023, &nsd->tx_size_1023);
1065 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1066 I40E_GLPRT_PTC1522L(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->tx_size_1522, &nsd->tx_size_1522);
1069 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1070 I40E_GLPRT_PTC9522L(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->tx_size_big, &nsd->tx_size_big);
1074 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_undersize, &nsd->rx_undersize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_fragments, &nsd->rx_fragments);
1080 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->rx_oversize, &nsd->rx_oversize);
1083 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_jabber, &nsd->rx_jabber);
1088 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1089 pf->stat_offsets_loaded,
1090 &osd->fd_atr_match, &nsd->fd_atr_match);
1091 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_sb_match, &nsd->fd_sb_match);
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1109 pf->stat_offsets_loaded = true;
1113 * i40e_update_stats - Update the various statistics counters.
1114 * @vsi: the VSI to be updated
1116 * Update the various stats for this VSI and its related entities.
1118 void i40e_update_stats(struct i40e_vsi *vsi)
1120 struct i40e_pf *pf = vsi->back;
1122 if (vsi == pf->vsi[pf->lan_vsi])
1123 i40e_update_pf_stats(pf);
1125 i40e_update_vsi_stats(vsi);
1127 i40e_update_fcoe_stats(vsi);
1132 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1133 * @vsi: the VSI to be searched
1134 * @macaddr: the MAC address
1136 * @is_vf: make sure its a vf filter, else doesn't matter
1137 * @is_netdev: make sure its a netdev filter, else doesn't matter
1139 * Returns ptr to the filter object or NULL
1141 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1142 u8 *macaddr, s16 vlan,
1143 bool is_vf, bool is_netdev)
1145 struct i40e_mac_filter *f;
1147 if (!vsi || !macaddr)
1150 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1151 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1152 (vlan == f->vlan) &&
1153 (!is_vf || f->is_vf) &&
1154 (!is_netdev || f->is_netdev))
1161 * i40e_find_mac - Find a mac addr in the macvlan filters list
1162 * @vsi: the VSI to be searched
1163 * @macaddr: the MAC address we are searching for
1164 * @is_vf: make sure its a vf filter, else doesn't matter
1165 * @is_netdev: make sure its a netdev filter, else doesn't matter
1167 * Returns the first filter with the provided MAC address or NULL if
1168 * MAC address was not found
1170 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1171 bool is_vf, bool is_netdev)
1173 struct i40e_mac_filter *f;
1175 if (!vsi || !macaddr)
1178 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1179 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1180 (!is_vf || f->is_vf) &&
1181 (!is_netdev || f->is_netdev))
1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1189 * @vsi: the VSI to be searched
1191 * Returns true if VSI is in vlan mode or false otherwise
1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1195 struct i40e_mac_filter *f;
1197 /* Only -1 for all the filters denotes not in vlan mode
1198 * so we have to go through all the list in order to make sure
1200 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1209 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1210 * @vsi: the VSI to be searched
1211 * @macaddr: the mac address to be filtered
1212 * @is_vf: true if it is a vf
1213 * @is_netdev: true if it is a netdev
1215 * Goes through all the macvlan filters and adds a
1216 * macvlan filter for each unique vlan that already exists
1218 * Returns first filter found on success, else NULL
1220 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1221 bool is_vf, bool is_netdev)
1223 struct i40e_mac_filter *f;
1225 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1226 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1227 is_vf, is_netdev)) {
1228 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1234 return list_first_entry_or_null(&vsi->mac_filter_list,
1235 struct i40e_mac_filter, list);
1239 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1240 * @vsi: the PF Main VSI - inappropriate for any other VSI
1241 * @macaddr: the MAC address
1243 * Some older firmware configurations set up a default promiscuous VLAN
1244 * filter that needs to be removed.
1246 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1248 struct i40e_aqc_remove_macvlan_element_data element;
1249 struct i40e_pf *pf = vsi->back;
1252 /* Only appropriate for the PF main VSI */
1253 if (vsi->type != I40E_VSI_MAIN)
1256 memset(&element, 0, sizeof(element));
1257 ether_addr_copy(element.mac_addr, macaddr);
1258 element.vlan_tag = 0;
1259 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1260 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1261 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1269 * i40e_add_filter - Add a mac/vlan filter to the VSI
1270 * @vsi: the VSI to be searched
1271 * @macaddr: the MAC address
1273 * @is_vf: make sure its a vf filter, else doesn't matter
1274 * @is_netdev: make sure its a netdev filter, else doesn't matter
1276 * Returns ptr to the filter object or NULL when no memory available.
1278 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1279 u8 *macaddr, s16 vlan,
1280 bool is_vf, bool is_netdev)
1282 struct i40e_mac_filter *f;
1284 if (!vsi || !macaddr)
1287 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1289 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1291 goto add_filter_out;
1293 ether_addr_copy(f->macaddr, macaddr);
1297 INIT_LIST_HEAD(&f->list);
1298 list_add(&f->list, &vsi->mac_filter_list);
1301 /* increment counter and add a new flag if needed */
1307 } else if (is_netdev) {
1308 if (!f->is_netdev) {
1309 f->is_netdev = true;
1316 /* changed tells sync_filters_subtask to
1317 * push the filter down to the firmware
1320 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1321 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1329 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1330 * @vsi: the VSI to be searched
1331 * @macaddr: the MAC address
1333 * @is_vf: make sure it's a vf filter, else doesn't matter
1334 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1336 void i40e_del_filter(struct i40e_vsi *vsi,
1337 u8 *macaddr, s16 vlan,
1338 bool is_vf, bool is_netdev)
1340 struct i40e_mac_filter *f;
1342 if (!vsi || !macaddr)
1345 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1346 if (!f || f->counter == 0)
1354 } else if (is_netdev) {
1356 f->is_netdev = false;
1360 /* make sure we don't remove a filter in use by vf or netdev */
1362 min_f += (f->is_vf ? 1 : 0);
1363 min_f += (f->is_netdev ? 1 : 0);
1365 if (f->counter > min_f)
1369 /* counter == 0 tells sync_filters_subtask to
1370 * remove the filter from the firmware's list
1372 if (f->counter == 0) {
1374 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1375 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1380 * i40e_set_mac - NDO callback to set mac address
1381 * @netdev: network interface device structure
1382 * @p: pointer to an address structure
1384 * Returns 0 on success, negative on failure
1387 int i40e_set_mac(struct net_device *netdev, void *p)
1389 static int i40e_set_mac(struct net_device *netdev, void *p)
1392 struct i40e_netdev_priv *np = netdev_priv(netdev);
1393 struct i40e_vsi *vsi = np->vsi;
1394 struct i40e_pf *pf = vsi->back;
1395 struct i40e_hw *hw = &pf->hw;
1396 struct sockaddr *addr = p;
1397 struct i40e_mac_filter *f;
1399 if (!is_valid_ether_addr(addr->sa_data))
1400 return -EADDRNOTAVAIL;
1402 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1403 netdev_info(netdev, "already using mac address %pM\n",
1408 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1409 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1410 return -EADDRNOTAVAIL;
1412 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1413 netdev_info(netdev, "returning to hw mac address %pM\n",
1416 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1418 if (vsi->type == I40E_VSI_MAIN) {
1420 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1421 I40E_AQC_WRITE_TYPE_LAA_WOL,
1422 addr->sa_data, NULL);
1425 "Addr change for Main VSI failed: %d\n",
1427 return -EADDRNOTAVAIL;
1431 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1432 struct i40e_aqc_remove_macvlan_element_data element;
1434 memset(&element, 0, sizeof(element));
1435 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1436 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1437 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1439 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1443 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1444 struct i40e_aqc_add_macvlan_element_data element;
1446 memset(&element, 0, sizeof(element));
1447 ether_addr_copy(element.mac_addr, hw->mac.addr);
1448 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1449 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1451 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1457 i40e_sync_vsi_filters(vsi);
1458 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1464 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1465 * @vsi: the VSI being setup
1466 * @ctxt: VSI context structure
1467 * @enabled_tc: Enabled TCs bitmap
1468 * @is_add: True if called before Add VSI
1470 * Setup VSI queue mapping for enabled traffic classes.
1473 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1478 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1479 struct i40e_vsi_context *ctxt,
1484 struct i40e_pf *pf = vsi->back;
1494 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1497 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1498 /* Find numtc from enabled TC bitmap */
1499 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1500 if (enabled_tc & (1 << i)) /* TC is enabled */
1504 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1508 /* At least TC0 is enabled in case of non-DCB case */
1512 vsi->tc_config.numtc = numtc;
1513 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1514 /* Number of queues per enabled TC */
1515 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1516 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1518 /* Setup queue offset/count for all TCs for given VSI */
1519 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1520 /* See if the given TC is enabled for the given VSI */
1521 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1524 switch (vsi->type) {
1526 qcount = min_t(int, pf->rss_size, num_tc_qps);
1530 qcount = num_tc_qps;
1534 case I40E_VSI_SRIOV:
1535 case I40E_VSI_VMDQ2:
1537 qcount = num_tc_qps;
1541 vsi->tc_config.tc_info[i].qoffset = offset;
1542 vsi->tc_config.tc_info[i].qcount = qcount;
1544 /* find the power-of-2 of the number of queue pairs */
1547 while (num_qps && ((1 << pow) < qcount)) {
1552 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1554 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1555 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1559 /* TC is not enabled so set the offset to
1560 * default queue and allocate one queue
1563 vsi->tc_config.tc_info[i].qoffset = 0;
1564 vsi->tc_config.tc_info[i].qcount = 1;
1565 vsi->tc_config.tc_info[i].netdev_tc = 0;
1569 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1572 /* Set actual Tx/Rx queue pairs */
1573 vsi->num_queue_pairs = offset;
1575 /* Scheduler section valid can only be set for ADD VSI */
1577 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1579 ctxt->info.up_enable_bits = enabled_tc;
1581 if (vsi->type == I40E_VSI_SRIOV) {
1582 ctxt->info.mapping_flags |=
1583 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1584 for (i = 0; i < vsi->num_queue_pairs; i++)
1585 ctxt->info.queue_mapping[i] =
1586 cpu_to_le16(vsi->base_queue + i);
1588 ctxt->info.mapping_flags |=
1589 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1590 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1592 ctxt->info.valid_sections |= cpu_to_le16(sections);
1596 * i40e_set_rx_mode - NDO callback to set the netdev filters
1597 * @netdev: network interface device structure
1600 void i40e_set_rx_mode(struct net_device *netdev)
1602 static void i40e_set_rx_mode(struct net_device *netdev)
1605 struct i40e_netdev_priv *np = netdev_priv(netdev);
1606 struct i40e_mac_filter *f, *ftmp;
1607 struct i40e_vsi *vsi = np->vsi;
1608 struct netdev_hw_addr *uca;
1609 struct netdev_hw_addr *mca;
1610 struct netdev_hw_addr *ha;
1612 /* add addr if not already in the filter list */
1613 netdev_for_each_uc_addr(uca, netdev) {
1614 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1615 if (i40e_is_vsi_in_vlan(vsi))
1616 i40e_put_mac_in_vlan(vsi, uca->addr,
1619 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1624 netdev_for_each_mc_addr(mca, netdev) {
1625 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1626 if (i40e_is_vsi_in_vlan(vsi))
1627 i40e_put_mac_in_vlan(vsi, mca->addr,
1630 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1635 /* remove filter if not in netdev list */
1636 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1642 if (is_multicast_ether_addr(f->macaddr)) {
1643 netdev_for_each_mc_addr(mca, netdev) {
1644 if (ether_addr_equal(mca->addr, f->macaddr)) {
1650 netdev_for_each_uc_addr(uca, netdev) {
1651 if (ether_addr_equal(uca->addr, f->macaddr)) {
1657 for_each_dev_addr(netdev, ha) {
1658 if (ether_addr_equal(ha->addr, f->macaddr)) {
1666 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1669 /* check for other flag changes */
1670 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1671 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1672 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1677 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1678 * @vsi: ptr to the VSI
1680 * Push any outstanding VSI filter changes through the AdminQ.
1682 * Returns 0 or error value
1684 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1686 struct i40e_mac_filter *f, *ftmp;
1687 bool promisc_forced_on = false;
1688 bool add_happened = false;
1689 int filter_list_len = 0;
1690 u32 changed_flags = 0;
1691 i40e_status aq_ret = 0;
1697 /* empty array typed pointers, kcalloc later */
1698 struct i40e_aqc_add_macvlan_element_data *add_list;
1699 struct i40e_aqc_remove_macvlan_element_data *del_list;
1701 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1702 usleep_range(1000, 2000);
1706 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1707 vsi->current_netdev_flags = vsi->netdev->flags;
1710 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1711 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1713 filter_list_len = pf->hw.aq.asq_buf_size /
1714 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1715 del_list = kcalloc(filter_list_len,
1716 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1721 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1725 if (f->counter != 0)
1730 /* add to delete list */
1731 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1732 del_list[num_del].vlan_tag =
1733 cpu_to_le16((u16)(f->vlan ==
1734 I40E_VLAN_ANY ? 0 : f->vlan));
1736 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1737 del_list[num_del].flags = cmd_flags;
1740 /* unlink from filter list */
1744 /* flush a full buffer */
1745 if (num_del == filter_list_len) {
1746 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1747 vsi->seid, del_list, num_del,
1750 memset(del_list, 0, sizeof(*del_list));
1753 pf->hw.aq.asq_last_status !=
1755 dev_info(&pf->pdev->dev,
1756 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1758 pf->hw.aq.asq_last_status);
1762 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1763 del_list, num_del, NULL);
1767 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1768 dev_info(&pf->pdev->dev,
1769 "ignoring delete macvlan error, err %d, aq_err %d\n",
1770 aq_ret, pf->hw.aq.asq_last_status);
1776 /* do all the adds now */
1777 filter_list_len = pf->hw.aq.asq_buf_size /
1778 sizeof(struct i40e_aqc_add_macvlan_element_data),
1779 add_list = kcalloc(filter_list_len,
1780 sizeof(struct i40e_aqc_add_macvlan_element_data),
1785 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1789 if (f->counter == 0)
1792 add_happened = true;
1795 /* add to add array */
1796 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1797 add_list[num_add].vlan_tag =
1799 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1800 add_list[num_add].queue_number = 0;
1802 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1803 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1806 /* flush a full buffer */
1807 if (num_add == filter_list_len) {
1808 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1815 memset(add_list, 0, sizeof(*add_list));
1819 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1820 add_list, num_add, NULL);
1826 if (add_happened && aq_ret &&
1827 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1828 dev_info(&pf->pdev->dev,
1829 "add filter failed, err %d, aq_err %d\n",
1830 aq_ret, pf->hw.aq.asq_last_status);
1831 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1832 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1834 promisc_forced_on = true;
1835 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1837 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1842 /* check for changes in promiscuous modes */
1843 if (changed_flags & IFF_ALLMULTI) {
1844 bool cur_multipromisc;
1845 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1846 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1851 dev_info(&pf->pdev->dev,
1852 "set multi promisc failed, err %d, aq_err %d\n",
1853 aq_ret, pf->hw.aq.asq_last_status);
1855 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1857 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1858 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1860 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1864 dev_info(&pf->pdev->dev,
1865 "set uni promisc failed, err %d, aq_err %d\n",
1866 aq_ret, pf->hw.aq.asq_last_status);
1867 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1871 dev_info(&pf->pdev->dev,
1872 "set brdcast promisc failed, err %d, aq_err %d\n",
1873 aq_ret, pf->hw.aq.asq_last_status);
1876 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1881 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1882 * @pf: board private structure
1884 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1888 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1890 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1892 for (v = 0; v < pf->num_alloc_vsi; v++) {
1894 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1895 i40e_sync_vsi_filters(pf->vsi[v]);
1900 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1901 * @netdev: network interface device structure
1902 * @new_mtu: new value for maximum frame size
1904 * Returns 0 on success, negative on failure
1906 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1908 struct i40e_netdev_priv *np = netdev_priv(netdev);
1909 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1910 struct i40e_vsi *vsi = np->vsi;
1912 /* MTU < 68 is an error and causes problems on some kernels */
1913 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1916 netdev_info(netdev, "changing MTU from %d to %d\n",
1917 netdev->mtu, new_mtu);
1918 netdev->mtu = new_mtu;
1919 if (netif_running(netdev))
1920 i40e_vsi_reinit_locked(vsi);
1926 * i40e_ioctl - Access the hwtstamp interface
1927 * @netdev: network interface device structure
1928 * @ifr: interface request data
1929 * @cmd: ioctl command
1931 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1933 struct i40e_netdev_priv *np = netdev_priv(netdev);
1934 struct i40e_pf *pf = np->vsi->back;
1938 return i40e_ptp_get_ts_config(pf, ifr);
1940 return i40e_ptp_set_ts_config(pf, ifr);
1947 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1948 * @vsi: the vsi being adjusted
1950 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1952 struct i40e_vsi_context ctxt;
1955 if ((vsi->info.valid_sections &
1956 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1957 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1958 return; /* already enabled */
1960 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1961 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1962 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1964 ctxt.seid = vsi->seid;
1965 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1966 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1968 dev_info(&vsi->back->pdev->dev,
1969 "%s: update vsi failed, aq_err=%d\n",
1970 __func__, vsi->back->hw.aq.asq_last_status);
1975 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1976 * @vsi: the vsi being adjusted
1978 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1980 struct i40e_vsi_context ctxt;
1983 if ((vsi->info.valid_sections &
1984 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1985 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1986 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1987 return; /* already disabled */
1989 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1990 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1991 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1993 ctxt.seid = vsi->seid;
1994 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1995 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1997 dev_info(&vsi->back->pdev->dev,
1998 "%s: update vsi failed, aq_err=%d\n",
1999 __func__, vsi->back->hw.aq.asq_last_status);
2004 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2005 * @netdev: network interface to be adjusted
2006 * @features: netdev features to test if VLAN offload is enabled or not
2008 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2010 struct i40e_netdev_priv *np = netdev_priv(netdev);
2011 struct i40e_vsi *vsi = np->vsi;
2013 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2014 i40e_vlan_stripping_enable(vsi);
2016 i40e_vlan_stripping_disable(vsi);
2020 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2021 * @vsi: the vsi being configured
2022 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2024 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2026 struct i40e_mac_filter *f, *add_f;
2027 bool is_netdev, is_vf;
2029 is_vf = (vsi->type == I40E_VSI_SRIOV);
2030 is_netdev = !!(vsi->netdev);
2033 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2036 dev_info(&vsi->back->pdev->dev,
2037 "Could not add vlan filter %d for %pM\n",
2038 vid, vsi->netdev->dev_addr);
2043 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2044 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2046 dev_info(&vsi->back->pdev->dev,
2047 "Could not add vlan filter %d for %pM\n",
2053 /* Now if we add a vlan tag, make sure to check if it is the first
2054 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2055 * with 0, so we now accept untagged and specified tagged traffic
2056 * (and not any taged and untagged)
2059 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2061 is_vf, is_netdev)) {
2062 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2063 I40E_VLAN_ANY, is_vf, is_netdev);
2064 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2067 dev_info(&vsi->back->pdev->dev,
2068 "Could not add filter 0 for %pM\n",
2069 vsi->netdev->dev_addr);
2075 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2076 if (vid > 0 && !vsi->info.pvid) {
2077 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2078 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2079 is_vf, is_netdev)) {
2080 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2082 add_f = i40e_add_filter(vsi, f->macaddr,
2083 0, is_vf, is_netdev);
2085 dev_info(&vsi->back->pdev->dev,
2086 "Could not add filter 0 for %pM\n",
2094 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2095 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2098 return i40e_sync_vsi_filters(vsi);
2102 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2103 * @vsi: the vsi being configured
2104 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2106 * Return: 0 on success or negative otherwise
2108 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2110 struct net_device *netdev = vsi->netdev;
2111 struct i40e_mac_filter *f, *add_f;
2112 bool is_vf, is_netdev;
2113 int filter_count = 0;
2115 is_vf = (vsi->type == I40E_VSI_SRIOV);
2116 is_netdev = !!(netdev);
2119 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2121 list_for_each_entry(f, &vsi->mac_filter_list, list)
2122 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2124 /* go through all the filters for this VSI and if there is only
2125 * vid == 0 it means there are no other filters, so vid 0 must
2126 * be replaced with -1. This signifies that we should from now
2127 * on accept any traffic (with any tag present, or untagged)
2129 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2132 ether_addr_equal(netdev->dev_addr, f->macaddr))
2140 if (!filter_count && is_netdev) {
2141 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2142 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2145 dev_info(&vsi->back->pdev->dev,
2146 "Could not add filter %d for %pM\n",
2147 I40E_VLAN_ANY, netdev->dev_addr);
2152 if (!filter_count) {
2153 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2154 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2155 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2158 dev_info(&vsi->back->pdev->dev,
2159 "Could not add filter %d for %pM\n",
2160 I40E_VLAN_ANY, f->macaddr);
2166 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2167 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2170 return i40e_sync_vsi_filters(vsi);
2174 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2175 * @netdev: network interface to be adjusted
2176 * @vid: vlan id to be added
2178 * net_device_ops implementation for adding vlan ids
2181 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2182 __always_unused __be16 proto, u16 vid)
2184 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2185 __always_unused __be16 proto, u16 vid)
2188 struct i40e_netdev_priv *np = netdev_priv(netdev);
2189 struct i40e_vsi *vsi = np->vsi;
2195 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2197 /* If the network stack called us with vid = 0 then
2198 * it is asking to receive priority tagged packets with
2199 * vlan id 0. Our HW receives them by default when configured
2200 * to receive untagged packets so there is no need to add an
2201 * extra filter for vlan 0 tagged packets.
2204 ret = i40e_vsi_add_vlan(vsi, vid);
2206 if (!ret && (vid < VLAN_N_VID))
2207 set_bit(vid, vsi->active_vlans);
2213 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2214 * @netdev: network interface to be adjusted
2215 * @vid: vlan id to be removed
2217 * net_device_ops implementation for removing vlan ids
2220 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2221 __always_unused __be16 proto, u16 vid)
2223 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2224 __always_unused __be16 proto, u16 vid)
2227 struct i40e_netdev_priv *np = netdev_priv(netdev);
2228 struct i40e_vsi *vsi = np->vsi;
2230 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2232 /* return code is ignored as there is nothing a user
2233 * can do about failure to remove and a log message was
2234 * already printed from the other function
2236 i40e_vsi_kill_vlan(vsi, vid);
2238 clear_bit(vid, vsi->active_vlans);
2244 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2245 * @vsi: the vsi being brought back up
2247 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2254 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2256 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2257 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2262 * i40e_vsi_add_pvid - Add pvid for the VSI
2263 * @vsi: the vsi being adjusted
2264 * @vid: the vlan id to set as a PVID
2266 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2268 struct i40e_vsi_context ctxt;
2271 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2272 vsi->info.pvid = cpu_to_le16(vid);
2273 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2274 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2275 I40E_AQ_VSI_PVLAN_EMOD_STR;
2277 ctxt.seid = vsi->seid;
2278 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2279 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2281 dev_info(&vsi->back->pdev->dev,
2282 "%s: update vsi failed, aq_err=%d\n",
2283 __func__, vsi->back->hw.aq.asq_last_status);
2291 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2292 * @vsi: the vsi being adjusted
2294 * Just use the vlan_rx_register() service to put it back to normal
2296 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2298 i40e_vlan_stripping_disable(vsi);
2304 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2305 * @vsi: ptr to the VSI
2307 * If this function returns with an error, then it's possible one or
2308 * more of the rings is populated (while the rest are not). It is the
2309 * callers duty to clean those orphaned rings.
2311 * Return 0 on success, negative on failure
2313 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2317 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2318 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2324 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2325 * @vsi: ptr to the VSI
2327 * Free VSI's transmit software resources
2329 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2336 for (i = 0; i < vsi->num_queue_pairs; i++)
2337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2338 i40e_free_tx_resources(vsi->tx_rings[i]);
2342 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2343 * @vsi: ptr to the VSI
2345 * If this function returns with an error, then it's possible one or
2346 * more of the rings is populated (while the rest are not). It is the
2347 * callers duty to clean those orphaned rings.
2349 * Return 0 on success, negative on failure
2351 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2355 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2356 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2358 i40e_fcoe_setup_ddp_resources(vsi);
2364 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2365 * @vsi: ptr to the VSI
2367 * Free all receive software resources
2369 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2376 for (i = 0; i < vsi->num_queue_pairs; i++)
2377 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2378 i40e_free_rx_resources(vsi->rx_rings[i]);
2380 i40e_fcoe_free_ddp_resources(vsi);
2385 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2386 * @ring: The Tx ring to configure
2388 * This enables/disables XPS for a given Tx descriptor ring
2389 * based on the TCs enabled for the VSI that ring belongs to.
2391 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2393 struct i40e_vsi *vsi = ring->vsi;
2396 if (ring->q_vector && ring->netdev) {
2397 /* Single TC mode enable XPS */
2398 if (vsi->tc_config.numtc <= 1 &&
2399 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) {
2400 netif_set_xps_queue(ring->netdev,
2401 &ring->q_vector->affinity_mask,
2403 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2404 /* Disable XPS to allow selection based on TC */
2405 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2406 netif_set_xps_queue(ring->netdev, mask,
2408 free_cpumask_var(mask);
2414 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2415 * @ring: The Tx ring to configure
2417 * Configure the Tx descriptor ring in the HMC context.
2419 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2421 struct i40e_vsi *vsi = ring->vsi;
2422 u16 pf_q = vsi->base_queue + ring->queue_index;
2423 struct i40e_hw *hw = &vsi->back->hw;
2424 struct i40e_hmc_obj_txq tx_ctx;
2425 i40e_status err = 0;
2428 /* some ATR related tx ring init */
2429 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2430 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2431 ring->atr_count = 0;
2433 ring->atr_sample_rate = 0;
2437 i40e_config_xps_tx_ring(ring);
2439 /* clear the context structure first */
2440 memset(&tx_ctx, 0, sizeof(tx_ctx));
2442 tx_ctx.new_context = 1;
2443 tx_ctx.base = (ring->dma / 128);
2444 tx_ctx.qlen = ring->count;
2445 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2446 I40E_FLAG_FD_ATR_ENABLED));
2448 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2450 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2451 /* FDIR VSI tx ring can still use RS bit and writebacks */
2452 if (vsi->type != I40E_VSI_FDIR)
2453 tx_ctx.head_wb_ena = 1;
2454 tx_ctx.head_wb_addr = ring->dma +
2455 (ring->count * sizeof(struct i40e_tx_desc));
2457 /* As part of VSI creation/update, FW allocates certain
2458 * Tx arbitration queue sets for each TC enabled for
2459 * the VSI. The FW returns the handles to these queue
2460 * sets as part of the response buffer to Add VSI,
2461 * Update VSI, etc. AQ commands. It is expected that
2462 * these queue set handles be associated with the Tx
2463 * queues by the driver as part of the TX queue context
2464 * initialization. This has to be done regardless of
2465 * DCB as by default everything is mapped to TC0.
2467 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2468 tx_ctx.rdylist_act = 0;
2470 /* clear the context in the HMC */
2471 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2473 dev_info(&vsi->back->pdev->dev,
2474 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2475 ring->queue_index, pf_q, err);
2479 /* set the context in the HMC */
2480 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2482 dev_info(&vsi->back->pdev->dev,
2483 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2484 ring->queue_index, pf_q, err);
2488 /* Now associate this queue with this PCI function */
2489 if (vsi->type == I40E_VSI_VMDQ2) {
2490 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2491 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2492 I40E_QTX_CTL_VFVM_INDX_MASK;
2494 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2497 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2498 I40E_QTX_CTL_PF_INDX_MASK);
2499 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2502 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2504 /* cache tail off for easier writes later */
2505 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2511 * i40e_configure_rx_ring - Configure a receive ring context
2512 * @ring: The Rx ring to configure
2514 * Configure the Rx descriptor ring in the HMC context.
2516 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2518 struct i40e_vsi *vsi = ring->vsi;
2519 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2520 u16 pf_q = vsi->base_queue + ring->queue_index;
2521 struct i40e_hw *hw = &vsi->back->hw;
2522 struct i40e_hmc_obj_rxq rx_ctx;
2523 i40e_status err = 0;
2527 /* clear the context structure first */
2528 memset(&rx_ctx, 0, sizeof(rx_ctx));
2530 ring->rx_buf_len = vsi->rx_buf_len;
2531 ring->rx_hdr_len = vsi->rx_hdr_len;
2533 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2534 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2536 rx_ctx.base = (ring->dma / 128);
2537 rx_ctx.qlen = ring->count;
2539 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2540 set_ring_16byte_desc_enabled(ring);
2546 rx_ctx.dtype = vsi->dtype;
2548 set_ring_ps_enabled(ring);
2549 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2551 I40E_RX_SPLIT_TCP_UDP |
2554 rx_ctx.hsplit_0 = 0;
2557 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2558 (chain_len * ring->rx_buf_len));
2559 if (hw->revision_id == 0)
2560 rx_ctx.lrxqthresh = 0;
2562 rx_ctx.lrxqthresh = 2;
2563 rx_ctx.crcstrip = 1;
2567 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2569 /* set the prefena field to 1 because the manual says to */
2572 /* clear the context in the HMC */
2573 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2575 dev_info(&vsi->back->pdev->dev,
2576 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2577 ring->queue_index, pf_q, err);
2581 /* set the context in the HMC */
2582 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2584 dev_info(&vsi->back->pdev->dev,
2585 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2586 ring->queue_index, pf_q, err);
2590 /* cache tail for quicker writes, and clear the reg before use */
2591 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2592 writel(0, ring->tail);
2594 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2600 * i40e_vsi_configure_tx - Configure the VSI for Tx
2601 * @vsi: VSI structure describing this set of rings and resources
2603 * Configure the Tx VSI for operation.
2605 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2610 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2611 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2617 * i40e_vsi_configure_rx - Configure the VSI for Rx
2618 * @vsi: the VSI being configured
2620 * Configure the Rx VSI for operation.
2622 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2627 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2628 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2629 + ETH_FCS_LEN + VLAN_HLEN;
2631 vsi->max_frame = I40E_RXBUFFER_2048;
2633 /* figure out correct receive buffer length */
2634 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2635 I40E_FLAG_RX_PS_ENABLED)) {
2636 case I40E_FLAG_RX_1BUF_ENABLED:
2637 vsi->rx_hdr_len = 0;
2638 vsi->rx_buf_len = vsi->max_frame;
2639 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2641 case I40E_FLAG_RX_PS_ENABLED:
2642 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2643 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2644 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2647 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2648 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2649 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2654 /* setup rx buffer for FCoE */
2655 if ((vsi->type == I40E_VSI_FCOE) &&
2656 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2657 vsi->rx_hdr_len = 0;
2658 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2659 vsi->max_frame = I40E_RXBUFFER_3072;
2660 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2663 #endif /* I40E_FCOE */
2664 /* round up for the chip's needs */
2665 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2666 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2667 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2668 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2670 /* set up individual rings */
2671 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2672 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2678 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2679 * @vsi: ptr to the VSI
2681 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2683 struct i40e_ring *tx_ring, *rx_ring;
2684 u16 qoffset, qcount;
2687 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2690 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2691 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2694 qoffset = vsi->tc_config.tc_info[n].qoffset;
2695 qcount = vsi->tc_config.tc_info[n].qcount;
2696 for (i = qoffset; i < (qoffset + qcount); i++) {
2697 rx_ring = vsi->rx_rings[i];
2698 tx_ring = vsi->tx_rings[i];
2699 rx_ring->dcb_tc = n;
2700 tx_ring->dcb_tc = n;
2706 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2707 * @vsi: ptr to the VSI
2709 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2712 i40e_set_rx_mode(vsi->netdev);
2716 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2717 * @vsi: Pointer to the targeted VSI
2719 * This function replays the hlist on the hw where all the SB Flow Director
2720 * filters were saved.
2722 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2724 struct i40e_fdir_filter *filter;
2725 struct i40e_pf *pf = vsi->back;
2726 struct hlist_node *node;
2728 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2731 hlist_for_each_entry_safe(filter, node,
2732 &pf->fdir_filter_list, fdir_node) {
2733 i40e_add_del_fdir(vsi, filter, true);
2738 * i40e_vsi_configure - Set up the VSI for action
2739 * @vsi: the VSI being configured
2741 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2745 i40e_set_vsi_rx_mode(vsi);
2746 i40e_restore_vlan(vsi);
2747 i40e_vsi_config_dcb_rings(vsi);
2748 err = i40e_vsi_configure_tx(vsi);
2750 err = i40e_vsi_configure_rx(vsi);
2756 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2757 * @vsi: the VSI being configured
2759 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2761 struct i40e_pf *pf = vsi->back;
2762 struct i40e_q_vector *q_vector;
2763 struct i40e_hw *hw = &pf->hw;
2769 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2770 * and PFINT_LNKLSTn registers, e.g.:
2771 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2773 qp = vsi->base_queue;
2774 vector = vsi->base_vector;
2775 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2776 q_vector = vsi->q_vectors[i];
2777 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2778 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2779 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2781 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2782 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2783 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2786 /* Linked list for the queuepairs assigned to this vector */
2787 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2788 for (q = 0; q < q_vector->num_ringpairs; q++) {
2789 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2790 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2791 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2792 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2794 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2796 wr32(hw, I40E_QINT_RQCTL(qp), val);
2798 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2799 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2800 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2801 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2803 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2805 /* Terminate the linked list */
2806 if (q == (q_vector->num_ringpairs - 1))
2807 val |= (I40E_QUEUE_END_OF_LIST
2808 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2810 wr32(hw, I40E_QINT_TQCTL(qp), val);
2819 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2820 * @hw: ptr to the hardware info
2822 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2826 /* clear things first */
2827 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2828 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2830 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2831 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2832 I40E_PFINT_ICR0_ENA_GRST_MASK |
2833 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2834 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2835 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2836 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2837 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2838 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2840 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2842 /* SW_ITR_IDX = 0, but don't change INTENA */
2843 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2844 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2846 /* OTHER_ITR_IDX = 0 */
2847 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2851 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2852 * @vsi: the VSI being configured
2854 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2856 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2857 struct i40e_pf *pf = vsi->back;
2858 struct i40e_hw *hw = &pf->hw;
2861 /* set the ITR configuration */
2862 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2863 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2864 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2865 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2866 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2867 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2869 i40e_enable_misc_int_causes(hw);
2871 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2872 wr32(hw, I40E_PFINT_LNKLST0, 0);
2874 /* Associate the queue pair to the vector and enable the queue int */
2875 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2876 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2877 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2879 wr32(hw, I40E_QINT_RQCTL(0), val);
2881 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2882 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2883 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2885 wr32(hw, I40E_QINT_TQCTL(0), val);
2890 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2891 * @pf: board private structure
2893 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2895 struct i40e_hw *hw = &pf->hw;
2897 wr32(hw, I40E_PFINT_DYN_CTL0,
2898 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2903 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2904 * @pf: board private structure
2906 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2908 struct i40e_hw *hw = &pf->hw;
2911 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2912 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2913 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2915 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2920 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2921 * @vsi: pointer to a vsi
2922 * @vector: enable a particular Hw Interrupt vector
2924 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2926 struct i40e_pf *pf = vsi->back;
2927 struct i40e_hw *hw = &pf->hw;
2930 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2931 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2932 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2933 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2934 /* skip the flush */
2938 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2939 * @vsi: pointer to a vsi
2940 * @vector: enable a particular Hw Interrupt vector
2942 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2944 struct i40e_pf *pf = vsi->back;
2945 struct i40e_hw *hw = &pf->hw;
2948 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2949 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2954 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2955 * @irq: interrupt number
2956 * @data: pointer to a q_vector
2958 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2960 struct i40e_q_vector *q_vector = data;
2962 if (!q_vector->tx.ring && !q_vector->rx.ring)
2965 napi_schedule(&q_vector->napi);
2971 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2972 * @vsi: the VSI being configured
2973 * @basename: name for the vector
2975 * Allocates MSI-X vectors and requests interrupts from the kernel.
2977 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2979 int q_vectors = vsi->num_q_vectors;
2980 struct i40e_pf *pf = vsi->back;
2981 int base = vsi->base_vector;
2986 for (vector = 0; vector < q_vectors; vector++) {
2987 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2989 if (q_vector->tx.ring && q_vector->rx.ring) {
2990 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2991 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2993 } else if (q_vector->rx.ring) {
2994 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2995 "%s-%s-%d", basename, "rx", rx_int_idx++);
2996 } else if (q_vector->tx.ring) {
2997 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2998 "%s-%s-%d", basename, "tx", tx_int_idx++);
3000 /* skip this unused q_vector */
3003 err = request_irq(pf->msix_entries[base + vector].vector,
3009 dev_info(&pf->pdev->dev,
3010 "%s: request_irq failed, error: %d\n",
3012 goto free_queue_irqs;
3014 /* assign the mask for this irq */
3015 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3016 &q_vector->affinity_mask);
3019 vsi->irqs_ready = true;
3025 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3027 free_irq(pf->msix_entries[base + vector].vector,
3028 &(vsi->q_vectors[vector]));
3034 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3035 * @vsi: the VSI being un-configured
3037 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3039 struct i40e_pf *pf = vsi->back;
3040 struct i40e_hw *hw = &pf->hw;
3041 int base = vsi->base_vector;
3044 for (i = 0; i < vsi->num_queue_pairs; i++) {
3045 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3046 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3049 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3050 for (i = vsi->base_vector;
3051 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3052 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3055 for (i = 0; i < vsi->num_q_vectors; i++)
3056 synchronize_irq(pf->msix_entries[i + base].vector);
3058 /* Legacy and MSI mode - this stops all interrupt handling */
3059 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3060 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3062 synchronize_irq(pf->pdev->irq);
3067 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3068 * @vsi: the VSI being configured
3070 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3072 struct i40e_pf *pf = vsi->back;
3075 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3076 for (i = vsi->base_vector;
3077 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3078 i40e_irq_dynamic_enable(vsi, i);
3080 i40e_irq_dynamic_enable_icr0(pf);
3083 i40e_flush(&pf->hw);
3088 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3089 * @pf: board private structure
3091 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3094 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3095 i40e_flush(&pf->hw);
3099 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3100 * @irq: interrupt number
3101 * @data: pointer to a q_vector
3103 * This is the handler used for all MSI/Legacy interrupts, and deals
3104 * with both queue and non-queue interrupts. This is also used in
3105 * MSIX mode to handle the non-queue interrupts.
3107 static irqreturn_t i40e_intr(int irq, void *data)
3109 struct i40e_pf *pf = (struct i40e_pf *)data;
3110 struct i40e_hw *hw = &pf->hw;
3111 irqreturn_t ret = IRQ_NONE;
3112 u32 icr0, icr0_remaining;
3115 icr0 = rd32(hw, I40E_PFINT_ICR0);
3116 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3118 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3119 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3122 /* if interrupt but no bits showing, must be SWINT */
3123 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3124 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3127 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3128 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3130 /* temporarily disable queue cause for NAPI processing */
3131 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3132 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3133 wr32(hw, I40E_QINT_RQCTL(0), qval);
3135 qval = rd32(hw, I40E_QINT_TQCTL(0));
3136 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3137 wr32(hw, I40E_QINT_TQCTL(0), qval);
3139 if (!test_bit(__I40E_DOWN, &pf->state))
3140 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3143 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3144 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3145 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3148 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3149 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3150 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3153 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3154 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3155 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3158 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3159 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3160 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3161 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3162 val = rd32(hw, I40E_GLGEN_RSTAT);
3163 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3164 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3165 if (val == I40E_RESET_CORER) {
3167 } else if (val == I40E_RESET_GLOBR) {
3169 } else if (val == I40E_RESET_EMPR) {
3171 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
3175 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3176 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3177 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3180 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3181 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3183 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3184 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3185 i40e_ptp_tx_hwtstamp(pf);
3189 /* If a critical error is pending we have no choice but to reset the
3191 * Report and mask out any remaining unexpected interrupts.
3193 icr0_remaining = icr0 & ena_mask;
3194 if (icr0_remaining) {
3195 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3197 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3198 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3199 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3200 dev_info(&pf->pdev->dev, "device will be reset\n");
3201 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3202 i40e_service_event_schedule(pf);
3204 ena_mask &= ~icr0_remaining;
3209 /* re-enable interrupt causes */
3210 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3211 if (!test_bit(__I40E_DOWN, &pf->state)) {
3212 i40e_service_event_schedule(pf);
3213 i40e_irq_dynamic_enable_icr0(pf);
3220 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3221 * @tx_ring: tx ring to clean
3222 * @budget: how many cleans we're allowed
3224 * Returns true if there's any budget left (e.g. the clean is finished)
3226 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3228 struct i40e_vsi *vsi = tx_ring->vsi;
3229 u16 i = tx_ring->next_to_clean;
3230 struct i40e_tx_buffer *tx_buf;
3231 struct i40e_tx_desc *tx_desc;
3233 tx_buf = &tx_ring->tx_bi[i];
3234 tx_desc = I40E_TX_DESC(tx_ring, i);
3235 i -= tx_ring->count;
3238 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3240 /* if next_to_watch is not set then there is no work pending */
3244 /* prevent any other reads prior to eop_desc */
3245 read_barrier_depends();
3247 /* if the descriptor isn't done, no work yet to do */
3248 if (!(eop_desc->cmd_type_offset_bsz &
3249 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3252 /* clear next_to_watch to prevent false hangs */
3253 tx_buf->next_to_watch = NULL;
3255 tx_desc->buffer_addr = 0;
3256 tx_desc->cmd_type_offset_bsz = 0;
3257 /* move past filter desc */
3262 i -= tx_ring->count;
3263 tx_buf = tx_ring->tx_bi;
3264 tx_desc = I40E_TX_DESC(tx_ring, 0);
3266 /* unmap skb header data */
3267 dma_unmap_single(tx_ring->dev,
3268 dma_unmap_addr(tx_buf, dma),
3269 dma_unmap_len(tx_buf, len),
3271 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3272 kfree(tx_buf->raw_buf);
3274 tx_buf->raw_buf = NULL;
3275 tx_buf->tx_flags = 0;
3276 tx_buf->next_to_watch = NULL;
3277 dma_unmap_len_set(tx_buf, len, 0);
3278 tx_desc->buffer_addr = 0;
3279 tx_desc->cmd_type_offset_bsz = 0;
3281 /* move us past the eop_desc for start of next FD desc */
3286 i -= tx_ring->count;
3287 tx_buf = tx_ring->tx_bi;
3288 tx_desc = I40E_TX_DESC(tx_ring, 0);
3291 /* update budget accounting */
3293 } while (likely(budget));
3295 i += tx_ring->count;
3296 tx_ring->next_to_clean = i;
3298 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3299 i40e_irq_dynamic_enable(vsi,
3300 tx_ring->q_vector->v_idx + vsi->base_vector);
3306 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3307 * @irq: interrupt number
3308 * @data: pointer to a q_vector
3310 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3312 struct i40e_q_vector *q_vector = data;
3313 struct i40e_vsi *vsi;
3315 if (!q_vector->tx.ring)
3318 vsi = q_vector->tx.ring->vsi;
3319 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3325 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3326 * @vsi: the VSI being configured
3327 * @v_idx: vector index
3328 * @qp_idx: queue pair index
3330 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3332 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3333 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3334 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3336 tx_ring->q_vector = q_vector;
3337 tx_ring->next = q_vector->tx.ring;
3338 q_vector->tx.ring = tx_ring;
3339 q_vector->tx.count++;
3341 rx_ring->q_vector = q_vector;
3342 rx_ring->next = q_vector->rx.ring;
3343 q_vector->rx.ring = rx_ring;
3344 q_vector->rx.count++;
3348 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3349 * @vsi: the VSI being configured
3351 * This function maps descriptor rings to the queue-specific vectors
3352 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3353 * one vector per queue pair, but on a constrained vector budget, we
3354 * group the queue pairs as "efficiently" as possible.
3356 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3358 int qp_remaining = vsi->num_queue_pairs;
3359 int q_vectors = vsi->num_q_vectors;
3364 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3365 * group them so there are multiple queues per vector.
3366 * It is also important to go through all the vectors available to be
3367 * sure that if we don't use all the vectors, that the remaining vectors
3368 * are cleared. This is especially important when decreasing the
3369 * number of queues in use.
3371 for (; v_start < q_vectors; v_start++) {
3372 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3374 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3376 q_vector->num_ringpairs = num_ringpairs;
3378 q_vector->rx.count = 0;
3379 q_vector->tx.count = 0;
3380 q_vector->rx.ring = NULL;
3381 q_vector->tx.ring = NULL;
3383 while (num_ringpairs--) {
3384 map_vector_to_qp(vsi, v_start, qp_idx);
3392 * i40e_vsi_request_irq - Request IRQ from the OS
3393 * @vsi: the VSI being configured
3394 * @basename: name for the vector
3396 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3398 struct i40e_pf *pf = vsi->back;
3401 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3402 err = i40e_vsi_request_irq_msix(vsi, basename);
3403 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3404 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3405 pf->misc_int_name, pf);
3407 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3408 pf->misc_int_name, pf);
3411 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3416 #ifdef CONFIG_NET_POLL_CONTROLLER
3418 * i40e_netpoll - A Polling 'interrupt'handler
3419 * @netdev: network interface device structure
3421 * This is used by netconsole to send skbs without having to re-enable
3422 * interrupts. It's not called while the normal interrupt routine is executing.
3425 void i40e_netpoll(struct net_device *netdev)
3427 static void i40e_netpoll(struct net_device *netdev)
3430 struct i40e_netdev_priv *np = netdev_priv(netdev);
3431 struct i40e_vsi *vsi = np->vsi;
3432 struct i40e_pf *pf = vsi->back;
3435 /* if interface is down do nothing */
3436 if (test_bit(__I40E_DOWN, &vsi->state))
3439 pf->flags |= I40E_FLAG_IN_NETPOLL;
3440 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3441 for (i = 0; i < vsi->num_q_vectors; i++)
3442 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3444 i40e_intr(pf->pdev->irq, netdev);
3446 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3451 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3452 * @pf: the PF being configured
3453 * @pf_q: the PF queue
3454 * @enable: enable or disable state of the queue
3456 * This routine will wait for the given Tx queue of the PF to reach the
3457 * enabled or disabled state.
3458 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3459 * multiple retries; else will return 0 in case of success.
3461 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3466 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3467 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3468 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3471 usleep_range(10, 20);
3473 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3480 * i40e_vsi_control_tx - Start or stop a VSI's rings
3481 * @vsi: the VSI being configured
3482 * @enable: start or stop the rings
3484 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3486 struct i40e_pf *pf = vsi->back;
3487 struct i40e_hw *hw = &pf->hw;
3488 int i, j, pf_q, ret = 0;
3491 pf_q = vsi->base_queue;
3492 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3494 /* warn the TX unit of coming changes */
3495 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3497 usleep_range(10, 20);
3499 for (j = 0; j < 50; j++) {
3500 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3501 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3502 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3504 usleep_range(1000, 2000);
3506 /* Skip if the queue is already in the requested state */
3507 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3510 /* turn on/off the queue */
3512 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3513 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3515 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3518 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3519 /* No waiting for the Tx queue to disable */
3520 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3523 /* wait for the change to finish */
3524 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3526 dev_info(&pf->pdev->dev,
3527 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3528 __func__, vsi->seid, pf_q,
3529 (enable ? "en" : "dis"));
3534 if (hw->revision_id == 0)
3540 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3541 * @pf: the PF being configured
3542 * @pf_q: the PF queue
3543 * @enable: enable or disable state of the queue
3545 * This routine will wait for the given Rx queue of the PF to reach the
3546 * enabled or disabled state.
3547 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3548 * multiple retries; else will return 0 in case of success.
3550 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3555 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3556 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3557 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3560 usleep_range(10, 20);
3562 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3569 * i40e_vsi_control_rx - Start or stop a VSI's rings
3570 * @vsi: the VSI being configured
3571 * @enable: start or stop the rings
3573 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3575 struct i40e_pf *pf = vsi->back;
3576 struct i40e_hw *hw = &pf->hw;
3577 int i, j, pf_q, ret = 0;
3580 pf_q = vsi->base_queue;
3581 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3582 for (j = 0; j < 50; j++) {
3583 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3584 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3585 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3587 usleep_range(1000, 2000);
3590 /* Skip if the queue is already in the requested state */
3591 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3594 /* turn on/off the queue */
3596 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3598 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3599 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3601 /* wait for the change to finish */
3602 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3604 dev_info(&pf->pdev->dev,
3605 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3606 __func__, vsi->seid, pf_q,
3607 (enable ? "en" : "dis"));
3616 * i40e_vsi_control_rings - Start or stop a VSI's rings
3617 * @vsi: the VSI being configured
3618 * @enable: start or stop the rings
3620 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3624 /* do rx first for enable and last for disable */
3626 ret = i40e_vsi_control_rx(vsi, request);
3629 ret = i40e_vsi_control_tx(vsi, request);
3631 /* Ignore return value, we need to shutdown whatever we can */
3632 i40e_vsi_control_tx(vsi, request);
3633 i40e_vsi_control_rx(vsi, request);
3640 * i40e_vsi_free_irq - Free the irq association with the OS
3641 * @vsi: the VSI being configured
3643 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3645 struct i40e_pf *pf = vsi->back;
3646 struct i40e_hw *hw = &pf->hw;
3647 int base = vsi->base_vector;
3651 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3652 if (!vsi->q_vectors)
3655 if (!vsi->irqs_ready)
3658 vsi->irqs_ready = false;
3659 for (i = 0; i < vsi->num_q_vectors; i++) {
3660 u16 vector = i + base;
3662 /* free only the irqs that were actually requested */
3663 if (!vsi->q_vectors[i] ||
3664 !vsi->q_vectors[i]->num_ringpairs)
3667 /* clear the affinity_mask in the IRQ descriptor */
3668 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3670 free_irq(pf->msix_entries[vector].vector,
3673 /* Tear down the interrupt queue link list
3675 * We know that they come in pairs and always
3676 * the Rx first, then the Tx. To clear the
3677 * link list, stick the EOL value into the
3678 * next_q field of the registers.
3680 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3681 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3682 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3683 val |= I40E_QUEUE_END_OF_LIST
3684 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3685 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3687 while (qp != I40E_QUEUE_END_OF_LIST) {
3690 val = rd32(hw, I40E_QINT_RQCTL(qp));
3692 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3693 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3694 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3695 I40E_QINT_RQCTL_INTEVENT_MASK);
3697 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3698 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3700 wr32(hw, I40E_QINT_RQCTL(qp), val);
3702 val = rd32(hw, I40E_QINT_TQCTL(qp));
3704 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3705 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3707 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3708 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3709 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3710 I40E_QINT_TQCTL_INTEVENT_MASK);
3712 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3713 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3715 wr32(hw, I40E_QINT_TQCTL(qp), val);
3720 free_irq(pf->pdev->irq, pf);
3722 val = rd32(hw, I40E_PFINT_LNKLST0);
3723 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3724 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3725 val |= I40E_QUEUE_END_OF_LIST
3726 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3727 wr32(hw, I40E_PFINT_LNKLST0, val);
3729 val = rd32(hw, I40E_QINT_RQCTL(qp));
3730 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3731 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3732 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3733 I40E_QINT_RQCTL_INTEVENT_MASK);
3735 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3736 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3738 wr32(hw, I40E_QINT_RQCTL(qp), val);
3740 val = rd32(hw, I40E_QINT_TQCTL(qp));
3742 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3743 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3744 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3745 I40E_QINT_TQCTL_INTEVENT_MASK);
3747 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3748 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3750 wr32(hw, I40E_QINT_TQCTL(qp), val);
3755 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3756 * @vsi: the VSI being configured
3757 * @v_idx: Index of vector to be freed
3759 * This function frees the memory allocated to the q_vector. In addition if
3760 * NAPI is enabled it will delete any references to the NAPI struct prior
3761 * to freeing the q_vector.
3763 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3765 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3766 struct i40e_ring *ring;
3771 /* disassociate q_vector from rings */
3772 i40e_for_each_ring(ring, q_vector->tx)
3773 ring->q_vector = NULL;
3775 i40e_for_each_ring(ring, q_vector->rx)
3776 ring->q_vector = NULL;
3778 /* only VSI w/ an associated netdev is set up w/ NAPI */
3780 netif_napi_del(&q_vector->napi);
3782 vsi->q_vectors[v_idx] = NULL;
3784 kfree_rcu(q_vector, rcu);
3788 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3789 * @vsi: the VSI being un-configured
3791 * This frees the memory allocated to the q_vectors and
3792 * deletes references to the NAPI struct.
3794 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3798 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3799 i40e_free_q_vector(vsi, v_idx);
3803 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3804 * @pf: board private structure
3806 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3808 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3809 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3810 pci_disable_msix(pf->pdev);
3811 kfree(pf->msix_entries);
3812 pf->msix_entries = NULL;
3813 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3814 pci_disable_msi(pf->pdev);
3816 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3820 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3821 * @pf: board private structure
3823 * We go through and clear interrupt specific resources and reset the structure
3824 * to pre-load conditions
3826 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3830 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3831 for (i = 0; i < pf->num_alloc_vsi; i++)
3833 i40e_vsi_free_q_vectors(pf->vsi[i]);
3834 i40e_reset_interrupt_capability(pf);
3838 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3839 * @vsi: the VSI being configured
3841 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3848 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3849 napi_enable(&vsi->q_vectors[q_idx]->napi);
3853 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3854 * @vsi: the VSI being configured
3856 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3863 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3864 napi_disable(&vsi->q_vectors[q_idx]->napi);
3868 * i40e_vsi_close - Shut down a VSI
3869 * @vsi: the vsi to be quelled
3871 static void i40e_vsi_close(struct i40e_vsi *vsi)
3873 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3875 i40e_vsi_free_irq(vsi);
3876 i40e_vsi_free_tx_resources(vsi);
3877 i40e_vsi_free_rx_resources(vsi);
3881 * i40e_quiesce_vsi - Pause a given VSI
3882 * @vsi: the VSI being paused
3884 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3886 if (test_bit(__I40E_DOWN, &vsi->state))
3889 /* No need to disable FCoE VSI when Tx suspended */
3890 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3891 vsi->type == I40E_VSI_FCOE) {
3892 dev_dbg(&vsi->back->pdev->dev,
3893 "%s: VSI seid %d skipping FCoE VSI disable\n",
3894 __func__, vsi->seid);
3898 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3899 if (vsi->netdev && netif_running(vsi->netdev)) {
3900 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3902 i40e_vsi_close(vsi);
3907 * i40e_unquiesce_vsi - Resume a given VSI
3908 * @vsi: the VSI being resumed
3910 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3912 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3915 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3916 if (vsi->netdev && netif_running(vsi->netdev))
3917 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3919 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3923 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3926 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3930 for (v = 0; v < pf->num_alloc_vsi; v++) {
3932 i40e_quiesce_vsi(pf->vsi[v]);
3937 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3940 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3944 for (v = 0; v < pf->num_alloc_vsi; v++) {
3946 i40e_unquiesce_vsi(pf->vsi[v]);
3950 #ifdef CONFIG_I40E_DCB
3952 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
3953 * @vsi: the VSI being configured
3955 * This function waits for the given VSI's Tx queues to be disabled.
3957 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
3959 struct i40e_pf *pf = vsi->back;
3962 pf_q = vsi->base_queue;
3963 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3964 /* Check and wait for the disable status of the queue */
3965 ret = i40e_pf_txq_wait(pf, pf_q, false);
3967 dev_info(&pf->pdev->dev,
3968 "%s: VSI seid %d Tx ring %d disable timeout\n",
3969 __func__, vsi->seid, pf_q);
3978 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
3981 * This function waits for the Tx queues to be in disabled state for all the
3982 * VSIs that are managed by this PF.
3984 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
3988 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3989 /* No need to wait for FCoE VSI queues */
3990 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
3991 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4002 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4003 * @dcbcfg: the corresponding DCBx configuration structure
4005 * Return the number of TCs from given DCBx configuration
4007 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4012 /* Scan the ETS Config Priority Table to find
4013 * traffic class enabled for a given priority
4014 * and use the traffic class index to get the
4015 * number of traffic classes enabled
4017 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4018 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4019 num_tc = dcbcfg->etscfg.prioritytable[i];
4022 /* Traffic class index starts from zero so
4023 * increment to return the actual count
4029 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4030 * @dcbcfg: the corresponding DCBx configuration structure
4032 * Query the current DCB configuration and return the number of
4033 * traffic classes enabled from the given DCBX config
4035 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4037 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4041 for (i = 0; i < num_tc; i++)
4042 enabled_tc |= 1 << i;
4048 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4049 * @pf: PF being queried
4051 * Return number of traffic classes enabled for the given PF
4053 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4055 struct i40e_hw *hw = &pf->hw;
4058 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4060 /* If DCB is not enabled then always in single TC */
4061 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4064 /* MFP mode return count of enabled TCs for this PF */
4065 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4066 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4067 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4068 if (enabled_tc & (1 << i))
4074 /* SFP mode will be enabled for all TCs on port */
4075 return i40e_dcb_get_num_tc(dcbcfg);
4079 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4080 * @pf: PF being queried
4082 * Return a bitmap for first enabled traffic class for this PF.
4084 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4086 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4090 return 0x1; /* TC0 */
4092 /* Find the first enabled TC */
4093 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4094 if (enabled_tc & (1 << i))
4102 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4103 * @pf: PF being queried
4105 * Return a bitmap for enabled traffic classes for this PF.
4107 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4109 /* If DCB is not enabled for this PF then just return default TC */
4110 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4111 return i40e_pf_get_default_tc(pf);
4113 /* MFP mode will have enabled TCs set by FW */
4114 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4115 return pf->hw.func_caps.enabled_tcmap;
4117 /* SFP mode we want PF to be enabled for all TCs */
4118 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4122 * i40e_vsi_get_bw_info - Query VSI BW Information
4123 * @vsi: the VSI being queried
4125 * Returns 0 on success, negative value on failure
4127 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4129 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4130 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4131 struct i40e_pf *pf = vsi->back;
4132 struct i40e_hw *hw = &pf->hw;
4137 /* Get the VSI level BW configuration */
4138 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4140 dev_info(&pf->pdev->dev,
4141 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4142 aq_ret, pf->hw.aq.asq_last_status);
4146 /* Get the VSI level BW configuration per TC */
4147 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4150 dev_info(&pf->pdev->dev,
4151 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4152 aq_ret, pf->hw.aq.asq_last_status);
4156 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4157 dev_info(&pf->pdev->dev,
4158 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4159 bw_config.tc_valid_bits,
4160 bw_ets_config.tc_valid_bits);
4161 /* Still continuing */
4164 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4165 vsi->bw_max_quanta = bw_config.max_bw;
4166 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4167 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4168 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4169 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4170 vsi->bw_ets_limit_credits[i] =
4171 le16_to_cpu(bw_ets_config.credits[i]);
4172 /* 3 bits out of 4 for each TC */
4173 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4180 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4181 * @vsi: the VSI being configured
4182 * @enabled_tc: TC bitmap
4183 * @bw_credits: BW shared credits per TC
4185 * Returns 0 on success, negative value on failure
4187 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4190 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4194 bw_data.tc_valid_bits = enabled_tc;
4195 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4196 bw_data.tc_bw_credits[i] = bw_share[i];
4198 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4201 dev_info(&vsi->back->pdev->dev,
4202 "AQ command Config VSI BW allocation per TC failed = %d\n",
4203 vsi->back->hw.aq.asq_last_status);
4207 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4208 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4214 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4215 * @vsi: the VSI being configured
4216 * @enabled_tc: TC map to be enabled
4219 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4221 struct net_device *netdev = vsi->netdev;
4222 struct i40e_pf *pf = vsi->back;
4223 struct i40e_hw *hw = &pf->hw;
4226 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4232 netdev_reset_tc(netdev);
4236 /* Set up actual enabled TCs on the VSI */
4237 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4240 /* set per TC queues for the VSI */
4241 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4242 /* Only set TC queues for enabled tcs
4244 * e.g. For a VSI that has TC0 and TC3 enabled the
4245 * enabled_tc bitmap would be 0x00001001; the driver
4246 * will set the numtc for netdev as 2 that will be
4247 * referenced by the netdev layer as TC 0 and 1.
4249 if (vsi->tc_config.enabled_tc & (1 << i))
4250 netdev_set_tc_queue(netdev,
4251 vsi->tc_config.tc_info[i].netdev_tc,
4252 vsi->tc_config.tc_info[i].qcount,
4253 vsi->tc_config.tc_info[i].qoffset);
4256 /* Assign UP2TC map for the VSI */
4257 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4258 /* Get the actual TC# for the UP */
4259 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4260 /* Get the mapped netdev TC# for the UP */
4261 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4262 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4267 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4268 * @vsi: the VSI being configured
4269 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4271 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4272 struct i40e_vsi_context *ctxt)
4274 /* copy just the sections touched not the entire info
4275 * since not all sections are valid as returned by
4278 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4279 memcpy(&vsi->info.queue_mapping,
4280 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4281 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4282 sizeof(vsi->info.tc_mapping));
4286 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4287 * @vsi: VSI to be configured
4288 * @enabled_tc: TC bitmap
4290 * This configures a particular VSI for TCs that are mapped to the
4291 * given TC bitmap. It uses default bandwidth share for TCs across
4292 * VSIs to configure TC for a particular VSI.
4295 * It is expected that the VSI queues have been quisced before calling
4298 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4300 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4301 struct i40e_vsi_context ctxt;
4305 /* Check if enabled_tc is same as existing or new TCs */
4306 if (vsi->tc_config.enabled_tc == enabled_tc)
4309 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4310 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4311 if (enabled_tc & (1 << i))
4315 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4317 dev_info(&vsi->back->pdev->dev,
4318 "Failed configuring TC map %d for VSI %d\n",
4319 enabled_tc, vsi->seid);
4323 /* Update Queue Pairs Mapping for currently enabled UPs */
4324 ctxt.seid = vsi->seid;
4325 ctxt.pf_num = vsi->back->hw.pf_id;
4327 ctxt.uplink_seid = vsi->uplink_seid;
4328 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4329 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4331 /* Update the VSI after updating the VSI queue-mapping information */
4332 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4334 dev_info(&vsi->back->pdev->dev,
4335 "update vsi failed, aq_err=%d\n",
4336 vsi->back->hw.aq.asq_last_status);
4339 /* update the local VSI info with updated queue map */
4340 i40e_vsi_update_queue_map(vsi, &ctxt);
4341 vsi->info.valid_sections = 0;
4343 /* Update current VSI BW information */
4344 ret = i40e_vsi_get_bw_info(vsi);
4346 dev_info(&vsi->back->pdev->dev,
4347 "Failed updating vsi bw info, aq_err=%d\n",
4348 vsi->back->hw.aq.asq_last_status);
4352 /* Update the netdev TC setup */
4353 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4359 * i40e_veb_config_tc - Configure TCs for given VEB
4361 * @enabled_tc: TC bitmap
4363 * Configures given TC bitmap for VEB (switching) element
4365 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4367 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4368 struct i40e_pf *pf = veb->pf;
4372 /* No TCs or already enabled TCs just return */
4373 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4376 bw_data.tc_valid_bits = enabled_tc;
4377 /* bw_data.absolute_credits is not set (relative) */
4379 /* Enable ETS TCs with equal BW Share for now */
4380 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4381 if (enabled_tc & (1 << i))
4382 bw_data.tc_bw_share_credits[i] = 1;
4385 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4388 dev_info(&pf->pdev->dev,
4389 "veb bw config failed, aq_err=%d\n",
4390 pf->hw.aq.asq_last_status);
4394 /* Update the BW information */
4395 ret = i40e_veb_get_bw_info(veb);
4397 dev_info(&pf->pdev->dev,
4398 "Failed getting veb bw config, aq_err=%d\n",
4399 pf->hw.aq.asq_last_status);
4406 #ifdef CONFIG_I40E_DCB
4408 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4411 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4412 * the caller would've quiesce all the VSIs before calling
4415 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4421 /* Enable the TCs available on PF to all VEBs */
4422 tc_map = i40e_pf_get_tc_map(pf);
4423 for (v = 0; v < I40E_MAX_VEB; v++) {
4426 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4428 dev_info(&pf->pdev->dev,
4429 "Failed configuring TC for VEB seid=%d\n",
4431 /* Will try to configure as many components */
4435 /* Update each VSI */
4436 for (v = 0; v < pf->num_alloc_vsi; v++) {
4440 /* - Enable all TCs for the LAN VSI
4442 * - For FCoE VSI only enable the TC configured
4443 * as per the APP TLV
4445 * - For all others keep them at TC0 for now
4447 if (v == pf->lan_vsi)
4448 tc_map = i40e_pf_get_tc_map(pf);
4450 tc_map = i40e_pf_get_default_tc(pf);
4452 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4453 tc_map = i40e_get_fcoe_tc_map(pf);
4454 #endif /* #ifdef I40E_FCOE */
4456 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4458 dev_info(&pf->pdev->dev,
4459 "Failed configuring TC for VSI seid=%d\n",
4461 /* Will try to configure as many components */
4463 /* Re-configure VSI vectors based on updated TC map */
4464 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4465 if (pf->vsi[v]->netdev)
4466 i40e_dcbnl_set_all(pf->vsi[v]);
4472 * i40e_resume_port_tx - Resume port Tx
4475 * Resume a port's Tx and issue a PF reset in case of failure to
4478 static int i40e_resume_port_tx(struct i40e_pf *pf)
4480 struct i40e_hw *hw = &pf->hw;
4483 ret = i40e_aq_resume_port_tx(hw, NULL);
4485 dev_info(&pf->pdev->dev,
4486 "AQ command Resume Port Tx failed = %d\n",
4487 pf->hw.aq.asq_last_status);
4488 /* Schedule PF reset to recover */
4489 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4490 i40e_service_event_schedule(pf);
4497 * i40e_init_pf_dcb - Initialize DCB configuration
4498 * @pf: PF being configured
4500 * Query the current DCB configuration and cache it
4501 * in the hardware structure
4503 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4505 struct i40e_hw *hw = &pf->hw;
4508 if (pf->hw.func_caps.npar_enable)
4511 /* Get the initial DCB configuration */
4512 err = i40e_init_dcb(hw);
4514 /* Device/Function is not DCBX capable */
4515 if ((!hw->func_caps.dcb) ||
4516 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4517 dev_info(&pf->pdev->dev,
4518 "DCBX offload is not supported or is disabled for this PF.\n");
4520 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4524 /* When status is not DISABLED then DCBX in FW */
4525 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4526 DCB_CAP_DCBX_VER_IEEE;
4528 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4529 /* Enable DCB tagging only when more than one TC */
4530 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4531 pf->flags |= I40E_FLAG_DCB_ENABLED;
4532 dev_dbg(&pf->pdev->dev,
4533 "DCBX offload is supported for this PF.\n");
4536 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4537 pf->hw.aq.asq_last_status);
4543 #endif /* CONFIG_I40E_DCB */
4544 #define SPEED_SIZE 14
4547 * i40e_print_link_message - print link up or down
4548 * @vsi: the VSI for which link needs a message
4550 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4552 char speed[SPEED_SIZE] = "Unknown";
4553 char fc[FC_SIZE] = "RX/TX";
4556 netdev_info(vsi->netdev, "NIC Link is Down\n");
4560 switch (vsi->back->hw.phy.link_info.link_speed) {
4561 case I40E_LINK_SPEED_40GB:
4562 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4564 case I40E_LINK_SPEED_10GB:
4565 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4567 case I40E_LINK_SPEED_1GB:
4568 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4570 case I40E_LINK_SPEED_100MB:
4571 strncpy(speed, "100 Mbps", SPEED_SIZE);
4577 switch (vsi->back->hw.fc.current_mode) {
4579 strlcpy(fc, "RX/TX", FC_SIZE);
4581 case I40E_FC_TX_PAUSE:
4582 strlcpy(fc, "TX", FC_SIZE);
4584 case I40E_FC_RX_PAUSE:
4585 strlcpy(fc, "RX", FC_SIZE);
4588 strlcpy(fc, "None", FC_SIZE);
4592 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4597 * i40e_up_complete - Finish the last steps of bringing up a connection
4598 * @vsi: the VSI being configured
4600 static int i40e_up_complete(struct i40e_vsi *vsi)
4602 struct i40e_pf *pf = vsi->back;
4605 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4606 i40e_vsi_configure_msix(vsi);
4608 i40e_configure_msi_and_legacy(vsi);
4611 err = i40e_vsi_control_rings(vsi, true);
4615 clear_bit(__I40E_DOWN, &vsi->state);
4616 i40e_napi_enable_all(vsi);
4617 i40e_vsi_enable_irq(vsi);
4619 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4621 i40e_print_link_message(vsi, true);
4622 netif_tx_start_all_queues(vsi->netdev);
4623 netif_carrier_on(vsi->netdev);
4624 } else if (vsi->netdev) {
4625 i40e_print_link_message(vsi, false);
4626 /* need to check for qualified module here*/
4627 if ((pf->hw.phy.link_info.link_info &
4628 I40E_AQ_MEDIA_AVAILABLE) &&
4629 (!(pf->hw.phy.link_info.an_info &
4630 I40E_AQ_QUALIFIED_MODULE)))
4631 netdev_err(vsi->netdev,
4632 "the driver failed to link because an unqualified module was detected.");
4635 /* replay FDIR SB filters */
4636 if (vsi->type == I40E_VSI_FDIR) {
4637 /* reset fd counters */
4638 pf->fd_add_err = pf->fd_atr_cnt = 0;
4639 if (pf->fd_tcp_rule > 0) {
4640 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4641 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4642 pf->fd_tcp_rule = 0;
4644 i40e_fdir_filter_restore(vsi);
4646 i40e_service_event_schedule(pf);
4652 * i40e_vsi_reinit_locked - Reset the VSI
4653 * @vsi: the VSI being configured
4655 * Rebuild the ring structs after some configuration
4656 * has changed, e.g. MTU size.
4658 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4660 struct i40e_pf *pf = vsi->back;
4662 WARN_ON(in_interrupt());
4663 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4664 usleep_range(1000, 2000);
4667 /* Give a VF some time to respond to the reset. The
4668 * two second wait is based upon the watchdog cycle in
4671 if (vsi->type == I40E_VSI_SRIOV)
4674 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4678 * i40e_up - Bring the connection back up after being down
4679 * @vsi: the VSI being configured
4681 int i40e_up(struct i40e_vsi *vsi)
4685 err = i40e_vsi_configure(vsi);
4687 err = i40e_up_complete(vsi);
4693 * i40e_down - Shutdown the connection processing
4694 * @vsi: the VSI being stopped
4696 void i40e_down(struct i40e_vsi *vsi)
4700 /* It is assumed that the caller of this function
4701 * sets the vsi->state __I40E_DOWN bit.
4704 netif_carrier_off(vsi->netdev);
4705 netif_tx_disable(vsi->netdev);
4707 i40e_vsi_disable_irq(vsi);
4708 i40e_vsi_control_rings(vsi, false);
4709 i40e_napi_disable_all(vsi);
4711 for (i = 0; i < vsi->num_queue_pairs; i++) {
4712 i40e_clean_tx_ring(vsi->tx_rings[i]);
4713 i40e_clean_rx_ring(vsi->rx_rings[i]);
4718 * i40e_setup_tc - configure multiple traffic classes
4719 * @netdev: net device to configure
4720 * @tc: number of traffic classes to enable
4723 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4725 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4728 struct i40e_netdev_priv *np = netdev_priv(netdev);
4729 struct i40e_vsi *vsi = np->vsi;
4730 struct i40e_pf *pf = vsi->back;
4735 /* Check if DCB enabled to continue */
4736 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4737 netdev_info(netdev, "DCB is not enabled for adapter\n");
4741 /* Check if MFP enabled */
4742 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4743 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4747 /* Check whether tc count is within enabled limit */
4748 if (tc > i40e_pf_get_num_tc(pf)) {
4749 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4753 /* Generate TC map for number of tc requested */
4754 for (i = 0; i < tc; i++)
4755 enabled_tc |= (1 << i);
4757 /* Requesting same TC configuration as already enabled */
4758 if (enabled_tc == vsi->tc_config.enabled_tc)
4761 /* Quiesce VSI queues */
4762 i40e_quiesce_vsi(vsi);
4764 /* Configure VSI for enabled TCs */
4765 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4767 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4773 i40e_unquiesce_vsi(vsi);
4780 * i40e_open - Called when a network interface is made active
4781 * @netdev: network interface device structure
4783 * The open entry point is called when a network interface is made
4784 * active by the system (IFF_UP). At this point all resources needed
4785 * for transmit and receive operations are allocated, the interrupt
4786 * handler is registered with the OS, the netdev watchdog subtask is
4787 * enabled, and the stack is notified that the interface is ready.
4789 * Returns 0 on success, negative value on failure
4792 int i40e_open(struct net_device *netdev)
4794 static int i40e_open(struct net_device *netdev)
4797 struct i40e_netdev_priv *np = netdev_priv(netdev);
4798 struct i40e_vsi *vsi = np->vsi;
4799 struct i40e_pf *pf = vsi->back;
4802 /* disallow open during test or if eeprom is broken */
4803 if (test_bit(__I40E_TESTING, &pf->state) ||
4804 test_bit(__I40E_BAD_EEPROM, &pf->state))
4807 netif_carrier_off(netdev);
4809 err = i40e_vsi_open(vsi);
4813 /* configure global TSO hardware offload settings */
4814 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4815 TCP_FLAG_FIN) >> 16);
4816 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4818 TCP_FLAG_CWR) >> 16);
4819 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4821 #ifdef CONFIG_I40E_VXLAN
4822 vxlan_get_rx_port(netdev);
4830 * @vsi: the VSI to open
4832 * Finish initialization of the VSI.
4834 * Returns 0 on success, negative value on failure
4836 int i40e_vsi_open(struct i40e_vsi *vsi)
4838 struct i40e_pf *pf = vsi->back;
4839 char int_name[IFNAMSIZ];
4842 /* allocate descriptors */
4843 err = i40e_vsi_setup_tx_resources(vsi);
4846 err = i40e_vsi_setup_rx_resources(vsi);
4850 err = i40e_vsi_configure(vsi);
4855 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4856 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4857 err = i40e_vsi_request_irq(vsi, int_name);
4861 /* Notify the stack of the actual queue counts. */
4862 err = netif_set_real_num_tx_queues(vsi->netdev,
4863 vsi->num_queue_pairs);
4865 goto err_set_queues;
4867 err = netif_set_real_num_rx_queues(vsi->netdev,
4868 vsi->num_queue_pairs);
4870 goto err_set_queues;
4872 } else if (vsi->type == I40E_VSI_FDIR) {
4873 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4874 dev_driver_string(&pf->pdev->dev));
4875 err = i40e_vsi_request_irq(vsi, int_name);
4881 err = i40e_up_complete(vsi);
4883 goto err_up_complete;
4890 i40e_vsi_free_irq(vsi);
4892 i40e_vsi_free_rx_resources(vsi);
4894 i40e_vsi_free_tx_resources(vsi);
4895 if (vsi == pf->vsi[pf->lan_vsi])
4896 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4902 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4903 * @pf: Pointer to pf
4905 * This function destroys the hlist where all the Flow Director
4906 * filters were saved.
4908 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4910 struct i40e_fdir_filter *filter;
4911 struct hlist_node *node2;
4913 hlist_for_each_entry_safe(filter, node2,
4914 &pf->fdir_filter_list, fdir_node) {
4915 hlist_del(&filter->fdir_node);
4918 pf->fdir_pf_active_filters = 0;
4922 * i40e_close - Disables a network interface
4923 * @netdev: network interface device structure
4925 * The close entry point is called when an interface is de-activated
4926 * by the OS. The hardware is still under the driver's control, but
4927 * this netdev interface is disabled.
4929 * Returns 0, this is not allowed to fail
4932 int i40e_close(struct net_device *netdev)
4934 static int i40e_close(struct net_device *netdev)
4937 struct i40e_netdev_priv *np = netdev_priv(netdev);
4938 struct i40e_vsi *vsi = np->vsi;
4940 i40e_vsi_close(vsi);
4946 * i40e_do_reset - Start a PF or Core Reset sequence
4947 * @pf: board private structure
4948 * @reset_flags: which reset is requested
4950 * The essential difference in resets is that the PF Reset
4951 * doesn't clear the packet buffers, doesn't reset the PE
4952 * firmware, and doesn't bother the other PFs on the chip.
4954 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4958 WARN_ON(in_interrupt());
4960 if (i40e_check_asq_alive(&pf->hw))
4961 i40e_vc_notify_reset(pf);
4963 /* do the biggest reset indicated */
4964 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4966 /* Request a Global Reset
4968 * This will start the chip's countdown to the actual full
4969 * chip reset event, and a warning interrupt to be sent
4970 * to all PFs, including the requestor. Our handler
4971 * for the warning interrupt will deal with the shutdown
4972 * and recovery of the switch setup.
4974 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4975 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4976 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4977 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4979 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4981 /* Request a Core Reset
4983 * Same as Global Reset, except does *not* include the MAC/PHY
4985 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4986 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4987 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4988 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4989 i40e_flush(&pf->hw);
4991 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4993 /* Request a Firmware Reset
4995 * Same as Global reset, plus restarting the
4996 * embedded firmware engine.
4998 /* enable EMP Reset */
4999 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
5000 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
5001 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
5003 /* force the reset */
5004 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5005 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
5006 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5007 i40e_flush(&pf->hw);
5009 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
5011 /* Request a PF Reset
5013 * Resets only the PF-specific registers
5015 * This goes directly to the tear-down and rebuild of
5016 * the switch, since we need to do all the recovery as
5017 * for the Core Reset.
5019 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5020 i40e_handle_reset_warning(pf);
5022 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
5025 /* Find the VSI(s) that requested a re-init */
5026 dev_info(&pf->pdev->dev,
5027 "VSI reinit requested\n");
5028 for (v = 0; v < pf->num_alloc_vsi; v++) {
5029 struct i40e_vsi *vsi = pf->vsi[v];
5031 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5032 i40e_vsi_reinit_locked(pf->vsi[v]);
5033 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5037 /* no further action needed, so return now */
5039 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
5042 /* Find the VSI(s) that needs to be brought down */
5043 dev_info(&pf->pdev->dev, "VSI down requested\n");
5044 for (v = 0; v < pf->num_alloc_vsi; v++) {
5045 struct i40e_vsi *vsi = pf->vsi[v];
5047 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5048 set_bit(__I40E_DOWN, &vsi->state);
5050 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5054 /* no further action needed, so return now */
5057 dev_info(&pf->pdev->dev,
5058 "bad reset request 0x%08x\n", reset_flags);
5063 #ifdef CONFIG_I40E_DCB
5065 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5066 * @pf: board private structure
5067 * @old_cfg: current DCB config
5068 * @new_cfg: new DCB config
5070 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5071 struct i40e_dcbx_config *old_cfg,
5072 struct i40e_dcbx_config *new_cfg)
5074 bool need_reconfig = false;
5076 /* Check if ETS configuration has changed */
5077 if (memcmp(&new_cfg->etscfg,
5079 sizeof(new_cfg->etscfg))) {
5080 /* If Priority Table has changed reconfig is needed */
5081 if (memcmp(&new_cfg->etscfg.prioritytable,
5082 &old_cfg->etscfg.prioritytable,
5083 sizeof(new_cfg->etscfg.prioritytable))) {
5084 need_reconfig = true;
5085 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5088 if (memcmp(&new_cfg->etscfg.tcbwtable,
5089 &old_cfg->etscfg.tcbwtable,
5090 sizeof(new_cfg->etscfg.tcbwtable)))
5091 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5093 if (memcmp(&new_cfg->etscfg.tsatable,
5094 &old_cfg->etscfg.tsatable,
5095 sizeof(new_cfg->etscfg.tsatable)))
5096 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5099 /* Check if PFC configuration has changed */
5100 if (memcmp(&new_cfg->pfc,
5102 sizeof(new_cfg->pfc))) {
5103 need_reconfig = true;
5104 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5107 /* Check if APP Table has changed */
5108 if (memcmp(&new_cfg->app,
5110 sizeof(new_cfg->app))) {
5111 need_reconfig = true;
5112 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5115 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5117 return need_reconfig;
5121 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5122 * @pf: board private structure
5123 * @e: event info posted on ARQ
5125 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5126 struct i40e_arq_event_info *e)
5128 struct i40e_aqc_lldp_get_mib *mib =
5129 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5130 struct i40e_hw *hw = &pf->hw;
5131 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
5132 struct i40e_dcbx_config tmp_dcbx_cfg;
5133 bool need_reconfig = false;
5137 /* Not DCB capable or capability disabled */
5138 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5141 /* Ignore if event is not for Nearest Bridge */
5142 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5143 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5144 dev_dbg(&pf->pdev->dev,
5145 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5146 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5149 /* Check MIB Type and return if event for Remote MIB update */
5150 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5151 dev_dbg(&pf->pdev->dev,
5152 "%s: LLDP event mib type %s\n", __func__,
5153 type ? "remote" : "local");
5154 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5155 /* Update the remote cached instance and return */
5156 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5157 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5158 &hw->remote_dcbx_config);
5162 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5163 /* Store the old configuration */
5164 tmp_dcbx_cfg = *dcbx_cfg;
5166 /* Get updated DCBX data from firmware */
5167 ret = i40e_get_dcb_config(&pf->hw);
5169 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n");
5173 /* No change detected in DCBX configs */
5174 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
5175 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5179 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg, dcbx_cfg);
5181 i40e_dcbnl_flush_apps(pf, dcbx_cfg);
5186 /* Enable DCB tagging only when more than one TC */
5187 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
5188 pf->flags |= I40E_FLAG_DCB_ENABLED;
5190 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5192 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5193 /* Reconfiguration needed quiesce all VSIs */
5194 i40e_pf_quiesce_all_vsi(pf);
5196 /* Changes in configuration update VEB/VSI */
5197 i40e_dcb_reconfigure(pf);
5199 ret = i40e_resume_port_tx(pf);
5201 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5202 /* In case of error no point in resuming VSIs */
5206 /* Wait for the PF's Tx queues to be disabled */
5207 ret = i40e_pf_wait_txq_disabled(pf);
5209 i40e_pf_unquiesce_all_vsi(pf);
5213 #endif /* CONFIG_I40E_DCB */
5216 * i40e_do_reset_safe - Protected reset path for userland calls.
5217 * @pf: board private structure
5218 * @reset_flags: which reset is requested
5221 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5224 i40e_do_reset(pf, reset_flags);
5229 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5230 * @pf: board private structure
5231 * @e: event info posted on ARQ
5233 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5236 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5237 struct i40e_arq_event_info *e)
5239 struct i40e_aqc_lan_overflow *data =
5240 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5241 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5242 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5243 struct i40e_hw *hw = &pf->hw;
5247 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5250 /* Queue belongs to VF, find the VF and issue VF reset */
5251 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5252 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5253 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5254 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5255 vf_id -= hw->func_caps.vf_base_id;
5256 vf = &pf->vf[vf_id];
5257 i40e_vc_notify_vf_reset(vf);
5258 /* Allow VF to process pending reset notification */
5260 i40e_reset_vf(vf, false);
5265 * i40e_service_event_complete - Finish up the service event
5266 * @pf: board private structure
5268 static void i40e_service_event_complete(struct i40e_pf *pf)
5270 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5272 /* flush memory to make sure state is correct before next watchog */
5273 smp_mb__before_atomic();
5274 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5278 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5279 * @pf: board private structure
5281 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5285 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5286 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5291 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5292 * @pf: board private structure
5294 int i40e_get_current_fd_count(struct i40e_pf *pf)
5297 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5298 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5299 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5300 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5305 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5306 * @pf: board private structure
5308 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5310 u32 fcnt_prog, fcnt_avail;
5312 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5315 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5318 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5319 fcnt_avail = pf->fdir_pf_filter_count;
5320 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5321 (pf->fd_add_err == 0) ||
5322 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5323 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5324 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5325 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5326 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5329 /* Wait for some more space to be available to turn on ATR */
5330 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5331 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5332 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5333 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5334 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5339 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5341 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5342 * @pf: board private structure
5344 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5346 int flush_wait_retry = 50;
5349 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5352 if (time_after(jiffies, pf->fd_flush_timestamp +
5353 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5354 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5355 pf->fd_flush_timestamp = jiffies;
5356 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5357 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5358 /* flush all filters */
5359 wr32(&pf->hw, I40E_PFQF_CTL_1,
5360 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5361 i40e_flush(&pf->hw);
5365 /* Check FD flush status every 5-6msec */
5366 usleep_range(5000, 6000);
5367 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5368 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5370 } while (flush_wait_retry--);
5371 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5372 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5374 /* replay sideband filters */
5375 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5377 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5378 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5379 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5380 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5381 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5387 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5388 * @pf: board private structure
5390 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5392 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5395 /* We can see up to 256 filter programming desc in transit if the filters are
5396 * being applied really fast; before we see the first
5397 * filter miss error on Rx queue 0. Accumulating enough error messages before
5398 * reacting will make sure we don't cause flush too often.
5400 #define I40E_MAX_FD_PROGRAM_ERROR 256
5403 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5404 * @pf: board private structure
5406 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5409 /* if interface is down do nothing */
5410 if (test_bit(__I40E_DOWN, &pf->state))
5413 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5416 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5417 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5418 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5419 i40e_fdir_flush_and_replay(pf);
5421 i40e_fdir_check_and_reenable(pf);
5426 * i40e_vsi_link_event - notify VSI of a link event
5427 * @vsi: vsi to be notified
5428 * @link_up: link up or down
5430 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5432 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5435 switch (vsi->type) {
5440 if (!vsi->netdev || !vsi->netdev_registered)
5444 netif_carrier_on(vsi->netdev);
5445 netif_tx_wake_all_queues(vsi->netdev);
5447 netif_carrier_off(vsi->netdev);
5448 netif_tx_stop_all_queues(vsi->netdev);
5452 case I40E_VSI_SRIOV:
5455 case I40E_VSI_VMDQ2:
5457 case I40E_VSI_MIRROR:
5459 /* there is no notification for other VSIs */
5465 * i40e_veb_link_event - notify elements on the veb of a link event
5466 * @veb: veb to be notified
5467 * @link_up: link up or down
5469 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5474 if (!veb || !veb->pf)
5478 /* depth first... */
5479 for (i = 0; i < I40E_MAX_VEB; i++)
5480 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5481 i40e_veb_link_event(pf->veb[i], link_up);
5483 /* ... now the local VSIs */
5484 for (i = 0; i < pf->num_alloc_vsi; i++)
5485 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5486 i40e_vsi_link_event(pf->vsi[i], link_up);
5490 * i40e_link_event - Update netif_carrier status
5491 * @pf: board private structure
5493 static void i40e_link_event(struct i40e_pf *pf)
5495 bool new_link, old_link;
5496 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5498 /* set this to force the get_link_status call to refresh state */
5499 pf->hw.phy.get_link_info = true;
5501 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5502 new_link = i40e_get_link_status(&pf->hw);
5504 if (new_link == old_link &&
5505 (test_bit(__I40E_DOWN, &vsi->state) ||
5506 new_link == netif_carrier_ok(vsi->netdev)))
5509 if (!test_bit(__I40E_DOWN, &vsi->state))
5510 i40e_print_link_message(vsi, new_link);
5512 /* Notify the base of the switch tree connected to
5513 * the link. Floating VEBs are not notified.
5515 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5516 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5518 i40e_vsi_link_event(vsi, new_link);
5521 i40e_vc_notify_link_state(pf);
5523 if (pf->flags & I40E_FLAG_PTP)
5524 i40e_ptp_set_increment(pf);
5528 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5529 * @pf: board private structure
5531 * Set the per-queue flags to request a check for stuck queues in the irq
5532 * clean functions, then force interrupts to be sure the irq clean is called.
5534 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5538 /* If we're down or resetting, just bail */
5539 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5542 /* for each VSI/netdev
5544 * set the check flag
5546 * force an interrupt
5548 for (v = 0; v < pf->num_alloc_vsi; v++) {
5549 struct i40e_vsi *vsi = pf->vsi[v];
5553 test_bit(__I40E_DOWN, &vsi->state) ||
5554 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5557 for (i = 0; i < vsi->num_queue_pairs; i++) {
5558 set_check_for_tx_hang(vsi->tx_rings[i]);
5559 if (test_bit(__I40E_HANG_CHECK_ARMED,
5560 &vsi->tx_rings[i]->state))
5565 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5566 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5567 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5568 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
5570 u16 vec = vsi->base_vector - 1;
5571 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5572 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
5573 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5574 wr32(&vsi->back->hw,
5575 I40E_PFINT_DYN_CTLN(vec), val);
5577 i40e_flush(&vsi->back->hw);
5583 * i40e_watchdog_subtask - periodic checks not using event driven response
5584 * @pf: board private structure
5586 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5590 /* if interface is down do nothing */
5591 if (test_bit(__I40E_DOWN, &pf->state) ||
5592 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5595 /* make sure we don't do these things too often */
5596 if (time_before(jiffies, (pf->service_timer_previous +
5597 pf->service_timer_period)))
5599 pf->service_timer_previous = jiffies;
5601 i40e_check_hang_subtask(pf);
5602 i40e_link_event(pf);
5604 /* Update the stats for active netdevs so the network stack
5605 * can look at updated numbers whenever it cares to
5607 for (i = 0; i < pf->num_alloc_vsi; i++)
5608 if (pf->vsi[i] && pf->vsi[i]->netdev)
5609 i40e_update_stats(pf->vsi[i]);
5611 /* Update the stats for the active switching components */
5612 for (i = 0; i < I40E_MAX_VEB; i++)
5614 i40e_update_veb_stats(pf->veb[i]);
5616 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5620 * i40e_reset_subtask - Set up for resetting the device and driver
5621 * @pf: board private structure
5623 static void i40e_reset_subtask(struct i40e_pf *pf)
5625 u32 reset_flags = 0;
5628 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5629 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5630 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5632 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5633 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5634 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5636 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5637 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5638 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5640 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5641 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5642 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5644 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5645 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5646 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5649 /* If there's a recovery already waiting, it takes
5650 * precedence before starting a new reset sequence.
5652 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5653 i40e_handle_reset_warning(pf);
5657 /* If we're already down or resetting, just bail */
5659 !test_bit(__I40E_DOWN, &pf->state) &&
5660 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5661 i40e_do_reset(pf, reset_flags);
5668 * i40e_handle_link_event - Handle link event
5669 * @pf: board private structure
5670 * @e: event info posted on ARQ
5672 static void i40e_handle_link_event(struct i40e_pf *pf,
5673 struct i40e_arq_event_info *e)
5675 struct i40e_hw *hw = &pf->hw;
5676 struct i40e_aqc_get_link_status *status =
5677 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5678 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5680 /* save off old link status information */
5681 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5682 sizeof(pf->hw.phy.link_info_old));
5684 /* Do a new status request to re-enable LSE reporting
5685 * and load new status information into the hw struct
5686 * This completely ignores any state information
5687 * in the ARQ event info, instead choosing to always
5688 * issue the AQ update link status command.
5690 i40e_link_event(pf);
5692 /* check for unqualified module, if link is down */
5693 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5694 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5695 (!(status->link_info & I40E_AQ_LINK_UP)))
5696 dev_err(&pf->pdev->dev,
5697 "The driver failed to link because an unqualified module was detected.\n");
5701 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5702 * @pf: board private structure
5704 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5706 struct i40e_arq_event_info event;
5707 struct i40e_hw *hw = &pf->hw;
5714 /* Do not run clean AQ when PF reset fails */
5715 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5718 /* check for error indications */
5719 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5721 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5722 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5723 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5725 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5726 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5727 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5729 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5730 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5731 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5734 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5736 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5738 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5739 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5740 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5742 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5743 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5744 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5746 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5747 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5748 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5751 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5753 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5754 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5759 ret = i40e_clean_arq_element(hw, &event, &pending);
5760 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5763 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5767 opcode = le16_to_cpu(event.desc.opcode);
5770 case i40e_aqc_opc_get_link_status:
5771 i40e_handle_link_event(pf, &event);
5773 case i40e_aqc_opc_send_msg_to_pf:
5774 ret = i40e_vc_process_vf_msg(pf,
5775 le16_to_cpu(event.desc.retval),
5776 le32_to_cpu(event.desc.cookie_high),
5777 le32_to_cpu(event.desc.cookie_low),
5781 case i40e_aqc_opc_lldp_update_mib:
5782 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5783 #ifdef CONFIG_I40E_DCB
5785 ret = i40e_handle_lldp_event(pf, &event);
5787 #endif /* CONFIG_I40E_DCB */
5789 case i40e_aqc_opc_event_lan_overflow:
5790 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5791 i40e_handle_lan_overflow_event(pf, &event);
5793 case i40e_aqc_opc_send_msg_to_peer:
5794 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5797 dev_info(&pf->pdev->dev,
5798 "ARQ Error: Unknown event 0x%04x received\n",
5802 } while (pending && (i++ < pf->adminq_work_limit));
5804 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5805 /* re-enable Admin queue interrupt cause */
5806 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5807 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5808 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5811 kfree(event.msg_buf);
5815 * i40e_verify_eeprom - make sure eeprom is good to use
5816 * @pf: board private structure
5818 static void i40e_verify_eeprom(struct i40e_pf *pf)
5822 err = i40e_diag_eeprom_test(&pf->hw);
5824 /* retry in case of garbage read */
5825 err = i40e_diag_eeprom_test(&pf->hw);
5827 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5829 set_bit(__I40E_BAD_EEPROM, &pf->state);
5833 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5834 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5835 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5840 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5841 * @veb: pointer to the VEB instance
5843 * This is a recursive function that first builds the attached VSIs then
5844 * recurses in to build the next layer of VEB. We track the connections
5845 * through our own index numbers because the seid's from the HW could
5846 * change across the reset.
5848 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5850 struct i40e_vsi *ctl_vsi = NULL;
5851 struct i40e_pf *pf = veb->pf;
5855 /* build VSI that owns this VEB, temporarily attached to base VEB */
5856 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5858 pf->vsi[v]->veb_idx == veb->idx &&
5859 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5860 ctl_vsi = pf->vsi[v];
5865 dev_info(&pf->pdev->dev,
5866 "missing owner VSI for veb_idx %d\n", veb->idx);
5868 goto end_reconstitute;
5870 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5871 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5872 ret = i40e_add_vsi(ctl_vsi);
5874 dev_info(&pf->pdev->dev,
5875 "rebuild of owner VSI failed: %d\n", ret);
5876 goto end_reconstitute;
5878 i40e_vsi_reset_stats(ctl_vsi);
5880 /* create the VEB in the switch and move the VSI onto the VEB */
5881 ret = i40e_add_veb(veb, ctl_vsi);
5883 goto end_reconstitute;
5885 /* create the remaining VSIs attached to this VEB */
5886 for (v = 0; v < pf->num_alloc_vsi; v++) {
5887 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5890 if (pf->vsi[v]->veb_idx == veb->idx) {
5891 struct i40e_vsi *vsi = pf->vsi[v];
5892 vsi->uplink_seid = veb->seid;
5893 ret = i40e_add_vsi(vsi);
5895 dev_info(&pf->pdev->dev,
5896 "rebuild of vsi_idx %d failed: %d\n",
5898 goto end_reconstitute;
5900 i40e_vsi_reset_stats(vsi);
5904 /* create any VEBs attached to this VEB - RECURSION */
5905 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5906 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5907 pf->veb[veb_idx]->uplink_seid = veb->seid;
5908 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5919 * i40e_get_capabilities - get info about the HW
5920 * @pf: the PF struct
5922 static int i40e_get_capabilities(struct i40e_pf *pf)
5924 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5929 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5931 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5935 /* this loads the data into the hw struct for us */
5936 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5938 i40e_aqc_opc_list_func_capabilities,
5940 /* data loaded, buffer no longer needed */
5943 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5944 /* retry with a larger buffer */
5945 buf_len = data_size;
5946 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5947 dev_info(&pf->pdev->dev,
5948 "capability discovery failed: aq=%d\n",
5949 pf->hw.aq.asq_last_status);
5954 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5955 (pf->hw.aq.fw_maj_ver < 2)) {
5956 pf->hw.func_caps.num_msix_vectors++;
5957 pf->hw.func_caps.num_msix_vectors_vf++;
5960 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5961 dev_info(&pf->pdev->dev,
5962 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5963 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5964 pf->hw.func_caps.num_msix_vectors,
5965 pf->hw.func_caps.num_msix_vectors_vf,
5966 pf->hw.func_caps.fd_filters_guaranteed,
5967 pf->hw.func_caps.fd_filters_best_effort,
5968 pf->hw.func_caps.num_tx_qp,
5969 pf->hw.func_caps.num_vsis);
5971 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5972 + pf->hw.func_caps.num_vfs)
5973 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5974 dev_info(&pf->pdev->dev,
5975 "got num_vsis %d, setting num_vsis to %d\n",
5976 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5977 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5983 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5986 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5987 * @pf: board private structure
5989 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5991 struct i40e_vsi *vsi;
5994 /* quick workaround for an NVM issue that leaves a critical register
5997 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
5998 static const u32 hkey[] = {
5999 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6000 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6001 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6004 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6005 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6008 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6011 /* find existing VSI and see if it needs configuring */
6013 for (i = 0; i < pf->num_alloc_vsi; i++) {
6014 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6020 /* create a new VSI if none exists */
6022 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6023 pf->vsi[pf->lan_vsi]->seid, 0);
6025 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6026 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6031 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6035 * i40e_fdir_teardown - release the Flow Director resources
6036 * @pf: board private structure
6038 static void i40e_fdir_teardown(struct i40e_pf *pf)
6042 i40e_fdir_filter_exit(pf);
6043 for (i = 0; i < pf->num_alloc_vsi; i++) {
6044 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6045 i40e_vsi_release(pf->vsi[i]);
6052 * i40e_prep_for_reset - prep for the core to reset
6053 * @pf: board private structure
6055 * Close up the VFs and other things in prep for pf Reset.
6057 static void i40e_prep_for_reset(struct i40e_pf *pf)
6059 struct i40e_hw *hw = &pf->hw;
6060 i40e_status ret = 0;
6063 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6064 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6067 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6069 /* quiesce the VSIs and their queues that are not already DOWN */
6070 i40e_pf_quiesce_all_vsi(pf);
6072 for (v = 0; v < pf->num_alloc_vsi; v++) {
6074 pf->vsi[v]->seid = 0;
6077 i40e_shutdown_adminq(&pf->hw);
6079 /* call shutdown HMC */
6080 if (hw->hmc.hmc_obj) {
6081 ret = i40e_shutdown_lan_hmc(hw);
6083 dev_warn(&pf->pdev->dev,
6084 "shutdown_lan_hmc failed: %d\n", ret);
6089 * i40e_send_version - update firmware with driver version
6092 static void i40e_send_version(struct i40e_pf *pf)
6094 struct i40e_driver_version dv;
6096 dv.major_version = DRV_VERSION_MAJOR;
6097 dv.minor_version = DRV_VERSION_MINOR;
6098 dv.build_version = DRV_VERSION_BUILD;
6099 dv.subbuild_version = 0;
6100 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6101 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6105 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6106 * @pf: board private structure
6107 * @reinit: if the Main VSI needs to re-initialized.
6109 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6111 struct i40e_hw *hw = &pf->hw;
6112 u8 set_fc_aq_fail = 0;
6116 /* Now we wait for GRST to settle out.
6117 * We don't have to delete the VEBs or VSIs from the hw switch
6118 * because the reset will make them disappear.
6120 ret = i40e_pf_reset(hw);
6122 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6123 set_bit(__I40E_RESET_FAILED, &pf->state);
6124 goto clear_recovery;
6128 if (test_bit(__I40E_DOWN, &pf->state))
6129 goto clear_recovery;
6130 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6132 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6133 ret = i40e_init_adminq(&pf->hw);
6135 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6136 goto clear_recovery;
6139 /* re-verify the eeprom if we just had an EMP reset */
6140 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
6141 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
6142 i40e_verify_eeprom(pf);
6145 i40e_clear_pxe_mode(hw);
6146 ret = i40e_get_capabilities(pf);
6148 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6150 goto end_core_reset;
6153 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6154 hw->func_caps.num_rx_qp,
6155 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6157 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6158 goto end_core_reset;
6160 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6162 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6163 goto end_core_reset;
6166 #ifdef CONFIG_I40E_DCB
6167 ret = i40e_init_pf_dcb(pf);
6169 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
6170 goto end_core_reset;
6172 #endif /* CONFIG_I40E_DCB */
6174 ret = i40e_init_pf_fcoe(pf);
6176 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6179 /* do basic switch setup */
6180 ret = i40e_setup_pf_switch(pf, reinit);
6182 goto end_core_reset;
6184 /* driver is only interested in link up/down and module qualification
6185 * reports from firmware
6187 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6188 I40E_AQ_EVENT_LINK_UPDOWN |
6189 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6191 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6193 /* make sure our flow control settings are restored */
6194 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6196 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6198 /* Rebuild the VSIs and VEBs that existed before reset.
6199 * They are still in our local switch element arrays, so only
6200 * need to rebuild the switch model in the HW.
6202 * If there were VEBs but the reconstitution failed, we'll try
6203 * try to recover minimal use by getting the basic PF VSI working.
6205 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6206 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6207 /* find the one VEB connected to the MAC, and find orphans */
6208 for (v = 0; v < I40E_MAX_VEB; v++) {
6212 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6213 pf->veb[v]->uplink_seid == 0) {
6214 ret = i40e_reconstitute_veb(pf->veb[v]);
6219 /* If Main VEB failed, we're in deep doodoo,
6220 * so give up rebuilding the switch and set up
6221 * for minimal rebuild of PF VSI.
6222 * If orphan failed, we'll report the error
6223 * but try to keep going.
6225 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6226 dev_info(&pf->pdev->dev,
6227 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6229 pf->vsi[pf->lan_vsi]->uplink_seid
6232 } else if (pf->veb[v]->uplink_seid == 0) {
6233 dev_info(&pf->pdev->dev,
6234 "rebuild of orphan VEB failed: %d\n",
6241 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6242 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6243 /* no VEB, so rebuild only the Main VSI */
6244 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6246 dev_info(&pf->pdev->dev,
6247 "rebuild of Main VSI failed: %d\n", ret);
6248 goto end_core_reset;
6253 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6255 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6256 pf->hw.aq.asq_last_status);
6259 /* reinit the misc interrupt */
6260 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6261 ret = i40e_setup_misc_vector(pf);
6263 /* restart the VSIs that were rebuilt and running before the reset */
6264 i40e_pf_unquiesce_all_vsi(pf);
6266 if (pf->num_alloc_vfs) {
6267 for (v = 0; v < pf->num_alloc_vfs; v++)
6268 i40e_reset_vf(&pf->vf[v], true);
6271 /* tell the firmware that we're starting */
6272 i40e_send_version(pf);
6275 clear_bit(__I40E_RESET_FAILED, &pf->state);
6277 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6281 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6282 * @pf: board private structure
6284 * Close up the VFs and other things in prep for a Core Reset,
6285 * then get ready to rebuild the world.
6287 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6289 i40e_prep_for_reset(pf);
6290 i40e_reset_and_rebuild(pf, false);
6294 * i40e_handle_mdd_event
6295 * @pf: pointer to the pf structure
6297 * Called from the MDD irq handler to identify possibly malicious vfs
6299 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6301 struct i40e_hw *hw = &pf->hw;
6302 bool mdd_detected = false;
6303 bool pf_mdd_detected = false;
6308 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6311 /* find what triggered the MDD event */
6312 reg = rd32(hw, I40E_GL_MDET_TX);
6313 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6314 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6315 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6316 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6317 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6318 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6319 I40E_GL_MDET_TX_EVENT_SHIFT;
6320 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6321 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6322 pf->hw.func_caps.base_queue;
6323 if (netif_msg_tx_err(pf))
6324 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6325 event, queue, pf_num, vf_num);
6326 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6327 mdd_detected = true;
6329 reg = rd32(hw, I40E_GL_MDET_RX);
6330 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6331 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6332 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6333 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6334 I40E_GL_MDET_RX_EVENT_SHIFT;
6335 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6336 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6337 pf->hw.func_caps.base_queue;
6338 if (netif_msg_rx_err(pf))
6339 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6340 event, queue, func);
6341 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6342 mdd_detected = true;
6346 reg = rd32(hw, I40E_PF_MDET_TX);
6347 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6348 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6349 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6350 pf_mdd_detected = true;
6352 reg = rd32(hw, I40E_PF_MDET_RX);
6353 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6354 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6355 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6356 pf_mdd_detected = true;
6358 /* Queue belongs to the PF, initiate a reset */
6359 if (pf_mdd_detected) {
6360 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6361 i40e_service_event_schedule(pf);
6365 /* see if one of the VFs needs its hand slapped */
6366 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6368 reg = rd32(hw, I40E_VP_MDET_TX(i));
6369 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6370 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6371 vf->num_mdd_events++;
6372 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6376 reg = rd32(hw, I40E_VP_MDET_RX(i));
6377 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6378 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6379 vf->num_mdd_events++;
6380 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6384 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6385 dev_info(&pf->pdev->dev,
6386 "Too many MDD events on VF %d, disabled\n", i);
6387 dev_info(&pf->pdev->dev,
6388 "Use PF Control I/F to re-enable the VF\n");
6389 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6393 /* re-enable mdd interrupt cause */
6394 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6395 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6396 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6397 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6401 #ifdef CONFIG_I40E_VXLAN
6403 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6404 * @pf: board private structure
6406 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6408 struct i40e_hw *hw = &pf->hw;
6414 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6417 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6419 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6420 if (pf->pending_vxlan_bitmap & (1 << i)) {
6421 pf->pending_vxlan_bitmap &= ~(1 << i);
6422 port = pf->vxlan_ports[i];
6424 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6425 I40E_AQC_TUNNEL_TYPE_VXLAN,
6426 &filter_index, NULL)
6427 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6430 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6431 port ? "adding" : "deleting",
6432 ntohs(port), port ? i : i);
6434 pf->vxlan_ports[i] = 0;
6436 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6437 port ? "Added" : "Deleted",
6438 ntohs(port), port ? i : filter_index);
6446 * i40e_service_task - Run the driver's async subtasks
6447 * @work: pointer to work_struct containing our data
6449 static void i40e_service_task(struct work_struct *work)
6451 struct i40e_pf *pf = container_of(work,
6454 unsigned long start_time = jiffies;
6456 /* don't bother with service tasks if a reset is in progress */
6457 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6458 i40e_service_event_complete(pf);
6462 i40e_reset_subtask(pf);
6463 i40e_handle_mdd_event(pf);
6464 i40e_vc_process_vflr_event(pf);
6465 i40e_watchdog_subtask(pf);
6466 i40e_fdir_reinit_subtask(pf);
6467 i40e_sync_filters_subtask(pf);
6468 #ifdef CONFIG_I40E_VXLAN
6469 i40e_sync_vxlan_filters_subtask(pf);
6471 i40e_clean_adminq_subtask(pf);
6473 i40e_service_event_complete(pf);
6475 /* If the tasks have taken longer than one timer cycle or there
6476 * is more work to be done, reschedule the service task now
6477 * rather than wait for the timer to tick again.
6479 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6480 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6481 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6482 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6483 i40e_service_event_schedule(pf);
6487 * i40e_service_timer - timer callback
6488 * @data: pointer to PF struct
6490 static void i40e_service_timer(unsigned long data)
6492 struct i40e_pf *pf = (struct i40e_pf *)data;
6494 mod_timer(&pf->service_timer,
6495 round_jiffies(jiffies + pf->service_timer_period));
6496 i40e_service_event_schedule(pf);
6500 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6501 * @vsi: the VSI being configured
6503 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6505 struct i40e_pf *pf = vsi->back;
6507 switch (vsi->type) {
6509 vsi->alloc_queue_pairs = pf->num_lan_qps;
6510 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6511 I40E_REQ_DESCRIPTOR_MULTIPLE);
6512 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6513 vsi->num_q_vectors = pf->num_lan_msix;
6515 vsi->num_q_vectors = 1;
6520 vsi->alloc_queue_pairs = 1;
6521 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6522 I40E_REQ_DESCRIPTOR_MULTIPLE);
6523 vsi->num_q_vectors = 1;
6526 case I40E_VSI_VMDQ2:
6527 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6528 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6529 I40E_REQ_DESCRIPTOR_MULTIPLE);
6530 vsi->num_q_vectors = pf->num_vmdq_msix;
6533 case I40E_VSI_SRIOV:
6534 vsi->alloc_queue_pairs = pf->num_vf_qps;
6535 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6536 I40E_REQ_DESCRIPTOR_MULTIPLE);
6541 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6542 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6543 I40E_REQ_DESCRIPTOR_MULTIPLE);
6544 vsi->num_q_vectors = pf->num_fcoe_msix;
6547 #endif /* I40E_FCOE */
6557 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6558 * @type: VSI pointer
6559 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6561 * On error: returns error code (negative)
6562 * On success: returns 0
6564 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6569 /* allocate memory for both Tx and Rx ring pointers */
6570 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6571 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6574 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6576 if (alloc_qvectors) {
6577 /* allocate memory for q_vector pointers */
6578 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6579 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6580 if (!vsi->q_vectors) {
6588 kfree(vsi->tx_rings);
6593 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6594 * @pf: board private structure
6595 * @type: type of VSI
6597 * On error: returns error code (negative)
6598 * On success: returns vsi index in PF (positive)
6600 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6603 struct i40e_vsi *vsi;
6607 /* Need to protect the allocation of the VSIs at the PF level */
6608 mutex_lock(&pf->switch_mutex);
6610 /* VSI list may be fragmented if VSI creation/destruction has
6611 * been happening. We can afford to do a quick scan to look
6612 * for any free VSIs in the list.
6614 * find next empty vsi slot, looping back around if necessary
6617 while (i < pf->num_alloc_vsi && pf->vsi[i])
6619 if (i >= pf->num_alloc_vsi) {
6621 while (i < pf->next_vsi && pf->vsi[i])
6625 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6626 vsi_idx = i; /* Found one! */
6629 goto unlock_pf; /* out of VSI slots! */
6633 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6640 set_bit(__I40E_DOWN, &vsi->state);
6643 vsi->rx_itr_setting = pf->rx_itr_default;
6644 vsi->tx_itr_setting = pf->tx_itr_default;
6645 vsi->netdev_registered = false;
6646 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6647 INIT_LIST_HEAD(&vsi->mac_filter_list);
6648 vsi->irqs_ready = false;
6650 ret = i40e_set_num_rings_in_vsi(vsi);
6654 ret = i40e_vsi_alloc_arrays(vsi, true);
6658 /* Setup default MSIX irq handler for VSI */
6659 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6661 pf->vsi[vsi_idx] = vsi;
6666 pf->next_vsi = i - 1;
6669 mutex_unlock(&pf->switch_mutex);
6674 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6675 * @type: VSI pointer
6676 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6678 * On error: returns error code (negative)
6679 * On success: returns 0
6681 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6683 /* free the ring and vector containers */
6684 if (free_qvectors) {
6685 kfree(vsi->q_vectors);
6686 vsi->q_vectors = NULL;
6688 kfree(vsi->tx_rings);
6689 vsi->tx_rings = NULL;
6690 vsi->rx_rings = NULL;
6694 * i40e_vsi_clear - Deallocate the VSI provided
6695 * @vsi: the VSI being un-configured
6697 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6708 mutex_lock(&pf->switch_mutex);
6709 if (!pf->vsi[vsi->idx]) {
6710 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6711 vsi->idx, vsi->idx, vsi, vsi->type);
6715 if (pf->vsi[vsi->idx] != vsi) {
6716 dev_err(&pf->pdev->dev,
6717 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6718 pf->vsi[vsi->idx]->idx,
6720 pf->vsi[vsi->idx]->type,
6721 vsi->idx, vsi, vsi->type);
6725 /* updates the pf for this cleared vsi */
6726 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6727 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6729 i40e_vsi_free_arrays(vsi, true);
6731 pf->vsi[vsi->idx] = NULL;
6732 if (vsi->idx < pf->next_vsi)
6733 pf->next_vsi = vsi->idx;
6736 mutex_unlock(&pf->switch_mutex);
6744 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6745 * @vsi: the VSI being cleaned
6747 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6751 if (vsi->tx_rings && vsi->tx_rings[0]) {
6752 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6753 kfree_rcu(vsi->tx_rings[i], rcu);
6754 vsi->tx_rings[i] = NULL;
6755 vsi->rx_rings[i] = NULL;
6761 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6762 * @vsi: the VSI being configured
6764 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6766 struct i40e_ring *tx_ring, *rx_ring;
6767 struct i40e_pf *pf = vsi->back;
6770 /* Set basic values in the rings to be used later during open() */
6771 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6772 /* allocate space for both Tx and Rx in one shot */
6773 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6777 tx_ring->queue_index = i;
6778 tx_ring->reg_idx = vsi->base_queue + i;
6779 tx_ring->ring_active = false;
6781 tx_ring->netdev = vsi->netdev;
6782 tx_ring->dev = &pf->pdev->dev;
6783 tx_ring->count = vsi->num_desc;
6785 tx_ring->dcb_tc = 0;
6786 vsi->tx_rings[i] = tx_ring;
6788 rx_ring = &tx_ring[1];
6789 rx_ring->queue_index = i;
6790 rx_ring->reg_idx = vsi->base_queue + i;
6791 rx_ring->ring_active = false;
6793 rx_ring->netdev = vsi->netdev;
6794 rx_ring->dev = &pf->pdev->dev;
6795 rx_ring->count = vsi->num_desc;
6797 rx_ring->dcb_tc = 0;
6798 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6799 set_ring_16byte_desc_enabled(rx_ring);
6801 clear_ring_16byte_desc_enabled(rx_ring);
6802 vsi->rx_rings[i] = rx_ring;
6808 i40e_vsi_clear_rings(vsi);
6813 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6814 * @pf: board private structure
6815 * @vectors: the number of MSI-X vectors to request
6817 * Returns the number of vectors reserved, or error
6819 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6821 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6822 I40E_MIN_MSIX, vectors);
6824 dev_info(&pf->pdev->dev,
6825 "MSI-X vector reservation failed: %d\n", vectors);
6833 * i40e_init_msix - Setup the MSIX capability
6834 * @pf: board private structure
6836 * Work with the OS to set up the MSIX vectors needed.
6838 * Returns 0 on success, negative on failure
6840 static int i40e_init_msix(struct i40e_pf *pf)
6842 i40e_status err = 0;
6843 struct i40e_hw *hw = &pf->hw;
6848 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6851 /* The number of vectors we'll request will be comprised of:
6852 * - Add 1 for "other" cause for Admin Queue events, etc.
6853 * - The number of LAN queue pairs
6854 * - Queues being used for RSS.
6855 * We don't need as many as max_rss_size vectors.
6856 * use rss_size instead in the calculation since that
6857 * is governed by number of cpus in the system.
6858 * - assumes symmetric Tx/Rx pairing
6859 * - The number of VMDq pairs
6861 * - The number of FCOE qps.
6863 * Once we count this up, try the request.
6865 * If we can't get what we want, we'll simplify to nearly nothing
6866 * and try again. If that still fails, we punt.
6868 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6869 pf->num_vmdq_msix = pf->num_vmdq_qps;
6871 other_vecs += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6872 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6876 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6877 pf->num_fcoe_msix = pf->num_fcoe_qps;
6878 v_budget += pf->num_fcoe_msix;
6882 /* Scale down if necessary, and the rings will share vectors */
6883 pf->num_lan_msix = min_t(int, pf->num_lan_msix,
6884 (hw->func_caps.num_msix_vectors - other_vecs));
6885 v_budget = pf->num_lan_msix + other_vecs;
6887 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6889 if (!pf->msix_entries)
6892 for (i = 0; i < v_budget; i++)
6893 pf->msix_entries[i].entry = i;
6894 vec = i40e_reserve_msix_vectors(pf, v_budget);
6896 if (vec != v_budget) {
6897 /* If we have limited resources, we will start with no vectors
6898 * for the special features and then allocate vectors to some
6899 * of these features based on the policy and at the end disable
6900 * the features that did not get any vectors.
6903 pf->num_fcoe_qps = 0;
6904 pf->num_fcoe_msix = 0;
6906 pf->num_vmdq_msix = 0;
6909 if (vec < I40E_MIN_MSIX) {
6910 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6911 kfree(pf->msix_entries);
6912 pf->msix_entries = NULL;
6915 } else if (vec == I40E_MIN_MSIX) {
6916 /* Adjust for minimal MSIX use */
6917 pf->num_vmdq_vsis = 0;
6918 pf->num_vmdq_qps = 0;
6919 pf->num_lan_qps = 1;
6920 pf->num_lan_msix = 1;
6922 } else if (vec != v_budget) {
6923 /* reserve the misc vector */
6926 /* Scale vector usage down */
6927 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6928 pf->num_vmdq_vsis = 1;
6930 /* partition out the remaining vectors */
6933 pf->num_lan_msix = 1;
6937 /* give one vector to FCoE */
6938 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6939 pf->num_lan_msix = 1;
6940 pf->num_fcoe_msix = 1;
6943 pf->num_lan_msix = 2;
6948 /* give one vector to FCoE */
6949 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6950 pf->num_fcoe_msix = 1;
6954 pf->num_lan_msix = min_t(int, (vec / 2),
6956 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6957 I40E_DEFAULT_NUM_VMDQ_VSI);
6962 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6963 (pf->num_vmdq_msix == 0)) {
6964 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6965 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6969 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
6970 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
6971 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
6978 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6979 * @vsi: the VSI being configured
6980 * @v_idx: index of the vector in the vsi struct
6982 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6984 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6986 struct i40e_q_vector *q_vector;
6988 /* allocate q_vector */
6989 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6993 q_vector->vsi = vsi;
6994 q_vector->v_idx = v_idx;
6995 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6997 netif_napi_add(vsi->netdev, &q_vector->napi,
6998 i40e_napi_poll, NAPI_POLL_WEIGHT);
7000 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7001 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7003 /* tie q_vector and vsi together */
7004 vsi->q_vectors[v_idx] = q_vector;
7010 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7011 * @vsi: the VSI being configured
7013 * We allocate one q_vector per queue interrupt. If allocation fails we
7016 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7018 struct i40e_pf *pf = vsi->back;
7019 int v_idx, num_q_vectors;
7022 /* if not MSIX, give the one vector only to the LAN VSI */
7023 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7024 num_q_vectors = vsi->num_q_vectors;
7025 else if (vsi == pf->vsi[pf->lan_vsi])
7030 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7031 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7040 i40e_free_q_vector(vsi, v_idx);
7046 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7047 * @pf: board private structure to initialize
7049 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
7053 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7054 err = i40e_init_msix(pf);
7056 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7058 I40E_FLAG_FCOE_ENABLED |
7060 I40E_FLAG_RSS_ENABLED |
7061 I40E_FLAG_DCB_CAPABLE |
7062 I40E_FLAG_SRIOV_ENABLED |
7063 I40E_FLAG_FD_SB_ENABLED |
7064 I40E_FLAG_FD_ATR_ENABLED |
7065 I40E_FLAG_VMDQ_ENABLED);
7067 /* rework the queue expectations without MSIX */
7068 i40e_determine_queue_usage(pf);
7072 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7073 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7074 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7075 err = pci_enable_msi(pf->pdev);
7077 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
7078 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7082 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7083 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7085 /* track first vector for misc interrupts */
7086 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
7090 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7091 * @pf: board private structure
7093 * This sets up the handler for MSIX 0, which is used to manage the
7094 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7095 * when in MSI or Legacy interrupt mode.
7097 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7099 struct i40e_hw *hw = &pf->hw;
7102 /* Only request the irq if this is the first time through, and
7103 * not when we're rebuilding after a Reset
7105 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7106 err = request_irq(pf->msix_entries[0].vector,
7107 i40e_intr, 0, pf->misc_int_name, pf);
7109 dev_info(&pf->pdev->dev,
7110 "request_irq for %s failed: %d\n",
7111 pf->misc_int_name, err);
7116 i40e_enable_misc_int_causes(hw);
7118 /* associate no queues to the misc vector */
7119 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7120 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7124 i40e_irq_dynamic_enable_icr0(pf);
7130 * i40e_config_rss - Prepare for RSS if used
7131 * @pf: board private structure
7133 static int i40e_config_rss(struct i40e_pf *pf)
7135 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1];
7136 struct i40e_hw *hw = &pf->hw;
7142 netdev_rss_key_fill(rss_key, sizeof(rss_key));
7143 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7144 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]);
7146 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7147 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7148 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7149 hena |= I40E_DEFAULT_RSS_HENA;
7150 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7151 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7153 /* Check capability and Set table size and register per hw expectation*/
7154 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7155 if (hw->func_caps.rss_table_size == 512) {
7156 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7157 pf->rss_table_size = 512;
7159 pf->rss_table_size = 128;
7160 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7162 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7164 /* Populate the LUT with max no. of queues in round robin fashion */
7165 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7167 /* The assumption is that lan qp count will be the highest
7168 * qp count for any PF VSI that needs RSS.
7169 * If multiple VSIs need RSS support, all the qp counts
7170 * for those VSIs should be a power of 2 for RSS to work.
7171 * If LAN VSI is the only consumer for RSS then this requirement
7174 if (j == pf->rss_size)
7176 /* lut = 4-byte sliding window of 4 lut entries */
7177 lut = (lut << 8) | (j &
7178 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7179 /* On i = 3, we have 4 entries in lut; write to the register */
7181 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7189 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7190 * @pf: board private structure
7191 * @queue_count: the requested queue count for rss.
7193 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7194 * count which may be different from the requested queue count.
7196 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7198 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7201 queue_count = min_t(int, queue_count, pf->rss_size_max);
7203 if (queue_count != pf->rss_size) {
7204 i40e_prep_for_reset(pf);
7206 pf->rss_size = queue_count;
7208 i40e_reset_and_rebuild(pf, true);
7209 i40e_config_rss(pf);
7211 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7212 return pf->rss_size;
7216 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7217 * @pf: board private structure to initialize
7219 * i40e_sw_init initializes the Adapter private data structure.
7220 * Fields are initialized based on PCI device information and
7221 * OS network device settings (MTU size).
7223 static int i40e_sw_init(struct i40e_pf *pf)
7228 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7229 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7230 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7231 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7232 if (I40E_DEBUG_USER & debug)
7233 pf->hw.debug_mask = debug;
7234 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7235 I40E_DEFAULT_MSG_ENABLE);
7238 /* Set default capability flags */
7239 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7240 I40E_FLAG_MSI_ENABLED |
7241 I40E_FLAG_MSIX_ENABLED |
7242 I40E_FLAG_RX_1BUF_ENABLED;
7244 /* Set default ITR */
7245 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7246 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7248 /* Depending on PF configurations, it is possible that the RSS
7249 * maximum might end up larger than the available queues
7251 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7253 pf->rss_size_max = min_t(int, pf->rss_size_max,
7254 pf->hw.func_caps.num_tx_qp);
7255 if (pf->hw.func_caps.rss) {
7256 pf->flags |= I40E_FLAG_RSS_ENABLED;
7257 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7260 /* MFP mode enabled */
7261 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7262 pf->flags |= I40E_FLAG_MFP_ENABLED;
7263 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7266 /* FW/NVM is not yet fixed in this regard */
7267 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7268 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7269 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7270 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7271 /* Setup a counter for fd_atr per pf */
7272 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7273 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7274 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7275 /* Setup a counter for fd_sb per pf */
7276 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7278 dev_info(&pf->pdev->dev,
7279 "Flow Director Sideband mode Disabled in MFP mode\n");
7281 pf->fdir_pf_filter_count =
7282 pf->hw.func_caps.fd_filters_guaranteed;
7283 pf->hw.fdir_shared_filter_count =
7284 pf->hw.func_caps.fd_filters_best_effort;
7287 if (pf->hw.func_caps.vmdq) {
7288 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7289 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7290 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7294 err = i40e_init_pf_fcoe(pf);
7296 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7298 #endif /* I40E_FCOE */
7299 #ifdef CONFIG_PCI_IOV
7300 if (pf->hw.func_caps.num_vfs) {
7301 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7302 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7303 pf->num_req_vfs = min_t(int,
7304 pf->hw.func_caps.num_vfs,
7307 #endif /* CONFIG_PCI_IOV */
7308 pf->eeprom_version = 0xDEAD;
7309 pf->lan_veb = I40E_NO_VEB;
7310 pf->lan_vsi = I40E_NO_VSI;
7312 /* set up queue assignment tracking */
7313 size = sizeof(struct i40e_lump_tracking)
7314 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7315 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7320 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7321 pf->qp_pile->search_hint = 0;
7323 /* set up vector assignment tracking */
7324 size = sizeof(struct i40e_lump_tracking)
7325 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
7326 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7327 if (!pf->irq_pile) {
7332 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
7333 pf->irq_pile->search_hint = 0;
7335 pf->tx_timeout_recovery_level = 1;
7337 mutex_init(&pf->switch_mutex);
7344 * i40e_set_ntuple - set the ntuple feature flag and take action
7345 * @pf: board private structure to initialize
7346 * @features: the feature set that the stack is suggesting
7348 * returns a bool to indicate if reset needs to happen
7350 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7352 bool need_reset = false;
7354 /* Check if Flow Director n-tuple support was enabled or disabled. If
7355 * the state changed, we need to reset.
7357 if (features & NETIF_F_NTUPLE) {
7358 /* Enable filters and mark for reset */
7359 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7361 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7363 /* turn off filters, mark for reset and clear SW filter list */
7364 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7366 i40e_fdir_filter_exit(pf);
7368 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7369 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7370 /* reset fd counters */
7371 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7372 pf->fdir_pf_active_filters = 0;
7373 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7374 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7375 /* if ATR was auto disabled it can be re-enabled. */
7376 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7377 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7378 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7384 * i40e_set_features - set the netdev feature flags
7385 * @netdev: ptr to the netdev being adjusted
7386 * @features: the feature set that the stack is suggesting
7388 static int i40e_set_features(struct net_device *netdev,
7389 netdev_features_t features)
7391 struct i40e_netdev_priv *np = netdev_priv(netdev);
7392 struct i40e_vsi *vsi = np->vsi;
7393 struct i40e_pf *pf = vsi->back;
7396 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7397 i40e_vlan_stripping_enable(vsi);
7399 i40e_vlan_stripping_disable(vsi);
7401 need_reset = i40e_set_ntuple(pf, features);
7404 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7409 #ifdef CONFIG_I40E_VXLAN
7411 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7412 * @pf: board private structure
7413 * @port: The UDP port to look up
7415 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7417 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7421 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7422 if (pf->vxlan_ports[i] == port)
7430 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7431 * @netdev: This physical port's netdev
7432 * @sa_family: Socket Family that VXLAN is notifying us about
7433 * @port: New UDP port number that VXLAN started listening to
7435 static void i40e_add_vxlan_port(struct net_device *netdev,
7436 sa_family_t sa_family, __be16 port)
7438 struct i40e_netdev_priv *np = netdev_priv(netdev);
7439 struct i40e_vsi *vsi = np->vsi;
7440 struct i40e_pf *pf = vsi->back;
7444 if (sa_family == AF_INET6)
7447 idx = i40e_get_vxlan_port_idx(pf, port);
7449 /* Check if port already exists */
7450 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7451 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7455 /* Now check if there is space to add the new port */
7456 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7458 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7459 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7464 /* New port: add it and mark its index in the bitmap */
7465 pf->vxlan_ports[next_idx] = port;
7466 pf->pending_vxlan_bitmap |= (1 << next_idx);
7468 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7472 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7473 * @netdev: This physical port's netdev
7474 * @sa_family: Socket Family that VXLAN is notifying us about
7475 * @port: UDP port number that VXLAN stopped listening to
7477 static void i40e_del_vxlan_port(struct net_device *netdev,
7478 sa_family_t sa_family, __be16 port)
7480 struct i40e_netdev_priv *np = netdev_priv(netdev);
7481 struct i40e_vsi *vsi = np->vsi;
7482 struct i40e_pf *pf = vsi->back;
7485 if (sa_family == AF_INET6)
7488 idx = i40e_get_vxlan_port_idx(pf, port);
7490 /* Check if port already exists */
7491 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7492 /* if port exists, set it to 0 (mark for deletion)
7493 * and make it pending
7495 pf->vxlan_ports[idx] = 0;
7497 pf->pending_vxlan_bitmap |= (1 << idx);
7499 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7501 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7507 static int i40e_get_phys_port_id(struct net_device *netdev,
7508 struct netdev_phys_port_id *ppid)
7510 struct i40e_netdev_priv *np = netdev_priv(netdev);
7511 struct i40e_pf *pf = np->vsi->back;
7512 struct i40e_hw *hw = &pf->hw;
7514 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7517 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7518 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7524 #ifdef USE_CONST_DEV_UC_CHAR
7525 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7526 struct net_device *dev,
7527 const unsigned char *addr,
7530 static int i40e_ndo_fdb_add(struct ndmsg *ndm,
7531 struct net_device *dev,
7532 unsigned char *addr,
7536 struct i40e_netdev_priv *np = netdev_priv(dev);
7537 struct i40e_pf *pf = np->vsi->back;
7540 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7543 /* Hardware does not support aging addresses so if a
7544 * ndm_state is given only allow permanent addresses
7546 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7547 netdev_info(dev, "FDB only supports static addresses\n");
7551 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7552 err = dev_uc_add_excl(dev, addr);
7553 else if (is_multicast_ether_addr(addr))
7554 err = dev_mc_add_excl(dev, addr);
7558 /* Only return duplicate errors if NLM_F_EXCL is set */
7559 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7565 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7566 #ifdef USE_CONST_DEV_UC_CHAR
7567 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7568 struct net_device *dev,
7569 const unsigned char *addr)
7571 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7572 struct net_device *dev,
7573 unsigned char *addr)
7576 struct i40e_netdev_priv *np = netdev_priv(dev);
7577 struct i40e_pf *pf = np->vsi->back;
7578 int err = -EOPNOTSUPP;
7580 if (ndm->ndm_state & NUD_PERMANENT) {
7581 netdev_info(dev, "FDB only supports static addresses\n");
7585 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7586 if (is_unicast_ether_addr(addr))
7587 err = dev_uc_del(dev, addr);
7588 else if (is_multicast_ether_addr(addr))
7589 err = dev_mc_del(dev, addr);
7597 static int i40e_ndo_fdb_dump(struct sk_buff *skb,
7598 struct netlink_callback *cb,
7599 struct net_device *dev,
7600 struct net_device *filter_dev,
7603 struct i40e_netdev_priv *np = netdev_priv(dev);
7604 struct i40e_pf *pf = np->vsi->back;
7606 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
7607 idx = ndo_dflt_fdb_dump(skb, cb, dev, filter_dev, idx);
7612 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
7613 #endif /* HAVE_FDB_OPS */
7614 static const struct net_device_ops i40e_netdev_ops = {
7615 .ndo_open = i40e_open,
7616 .ndo_stop = i40e_close,
7617 .ndo_start_xmit = i40e_lan_xmit_frame,
7618 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7619 .ndo_set_rx_mode = i40e_set_rx_mode,
7620 .ndo_validate_addr = eth_validate_addr,
7621 .ndo_set_mac_address = i40e_set_mac,
7622 .ndo_change_mtu = i40e_change_mtu,
7623 .ndo_do_ioctl = i40e_ioctl,
7624 .ndo_tx_timeout = i40e_tx_timeout,
7625 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7626 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7627 #ifdef CONFIG_NET_POLL_CONTROLLER
7628 .ndo_poll_controller = i40e_netpoll,
7630 .ndo_setup_tc = i40e_setup_tc,
7632 .ndo_fcoe_enable = i40e_fcoe_enable,
7633 .ndo_fcoe_disable = i40e_fcoe_disable,
7635 .ndo_set_features = i40e_set_features,
7636 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7637 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7638 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7639 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7640 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7641 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7642 #ifdef CONFIG_I40E_VXLAN
7643 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7644 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7646 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7648 .ndo_fdb_add = i40e_ndo_fdb_add,
7649 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7650 .ndo_fdb_del = i40e_ndo_fdb_del,
7651 .ndo_fdb_dump = i40e_ndo_fdb_dump,
7657 * i40e_config_netdev - Setup the netdev flags
7658 * @vsi: the VSI being configured
7660 * Returns 0 on success, negative value on failure
7662 static int i40e_config_netdev(struct i40e_vsi *vsi)
7664 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7665 struct i40e_pf *pf = vsi->back;
7666 struct i40e_hw *hw = &pf->hw;
7667 struct i40e_netdev_priv *np;
7668 struct net_device *netdev;
7669 u8 mac_addr[ETH_ALEN];
7672 etherdev_size = sizeof(struct i40e_netdev_priv);
7673 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7677 vsi->netdev = netdev;
7678 np = netdev_priv(netdev);
7681 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7682 NETIF_F_GSO_UDP_TUNNEL |
7685 netdev->features = NETIF_F_SG |
7689 NETIF_F_GSO_UDP_TUNNEL |
7690 NETIF_F_HW_VLAN_CTAG_TX |
7691 NETIF_F_HW_VLAN_CTAG_RX |
7692 NETIF_F_HW_VLAN_CTAG_FILTER |
7701 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7702 netdev->features |= NETIF_F_NTUPLE;
7704 /* copy netdev features into list of user selectable features */
7705 netdev->hw_features |= netdev->features;
7707 if (vsi->type == I40E_VSI_MAIN) {
7708 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7709 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7710 /* The following steps are necessary to prevent reception
7711 * of tagged packets - some older NVM configurations load a
7712 * default a MAC-VLAN filter that accepts any tagged packet
7713 * which must be replaced by a normal filter.
7715 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
7716 i40e_add_filter(vsi, mac_addr,
7717 I40E_VLAN_ANY, false, true);
7719 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7720 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7721 pf->vsi[pf->lan_vsi]->netdev->name);
7722 random_ether_addr(mac_addr);
7723 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7725 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7727 ether_addr_copy(netdev->dev_addr, mac_addr);
7728 ether_addr_copy(netdev->perm_addr, mac_addr);
7729 /* vlan gets same features (except vlan offload)
7730 * after any tweaks for specific VSI types
7732 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7733 NETIF_F_HW_VLAN_CTAG_RX |
7734 NETIF_F_HW_VLAN_CTAG_FILTER);
7735 netdev->priv_flags |= IFF_UNICAST_FLT;
7736 netdev->priv_flags |= IFF_SUPP_NOFCS;
7737 /* Setup netdev TC information */
7738 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7740 netdev->netdev_ops = &i40e_netdev_ops;
7741 netdev->watchdog_timeo = 5 * HZ;
7742 i40e_set_ethtool_ops(netdev);
7744 i40e_fcoe_config_netdev(netdev, vsi);
7751 * i40e_vsi_delete - Delete a VSI from the switch
7752 * @vsi: the VSI being removed
7754 * Returns 0 on success, negative value on failure
7756 static void i40e_vsi_delete(struct i40e_vsi *vsi)
7758 /* remove default VSI is not allowed */
7759 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
7762 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
7766 * i40e_add_vsi - Add a VSI to the switch
7767 * @vsi: the VSI being configured
7769 * This initializes a VSI context depending on the VSI type to be added and
7770 * passes it down to the add_vsi aq command.
7772 static int i40e_add_vsi(struct i40e_vsi *vsi)
7775 struct i40e_mac_filter *f, *ftmp;
7776 struct i40e_pf *pf = vsi->back;
7777 struct i40e_hw *hw = &pf->hw;
7778 struct i40e_vsi_context ctxt;
7779 u8 enabled_tc = 0x1; /* TC0 enabled */
7782 memset(&ctxt, 0, sizeof(ctxt));
7783 switch (vsi->type) {
7785 /* The PF's main VSI is already setup as part of the
7786 * device initialization, so we'll not bother with
7787 * the add_vsi call, but we will retrieve the current
7790 ctxt.seid = pf->main_vsi_seid;
7791 ctxt.pf_num = pf->hw.pf_id;
7793 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
7794 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7796 dev_info(&pf->pdev->dev,
7797 "couldn't get pf vsi config, err %d, aq_err %d\n",
7798 ret, pf->hw.aq.asq_last_status);
7801 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7802 vsi->info.valid_sections = 0;
7804 vsi->seid = ctxt.seid;
7805 vsi->id = ctxt.vsi_number;
7807 enabled_tc = i40e_pf_get_tc_map(pf);
7809 /* MFP mode setup queue map and update VSI */
7810 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7811 memset(&ctxt, 0, sizeof(ctxt));
7812 ctxt.seid = pf->main_vsi_seid;
7813 ctxt.pf_num = pf->hw.pf_id;
7815 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
7816 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7818 dev_info(&pf->pdev->dev,
7819 "update vsi failed, aq_err=%d\n",
7820 pf->hw.aq.asq_last_status);
7824 /* update the local VSI info queue map */
7825 i40e_vsi_update_queue_map(vsi, &ctxt);
7826 vsi->info.valid_sections = 0;
7828 /* Default/Main VSI is only enabled for TC0
7829 * reconfigure it to enable all TCs that are
7830 * available on the port in SFP mode.
7832 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7834 dev_info(&pf->pdev->dev,
7835 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
7837 pf->hw.aq.asq_last_status);
7844 ctxt.pf_num = hw->pf_id;
7846 ctxt.uplink_seid = vsi->uplink_seid;
7847 ctxt.connection_type = 0x1; /* regular data port */
7848 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7849 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7852 case I40E_VSI_VMDQ2:
7853 ctxt.pf_num = hw->pf_id;
7855 ctxt.uplink_seid = vsi->uplink_seid;
7856 ctxt.connection_type = 0x1; /* regular data port */
7857 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
7859 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7861 /* This VSI is connected to VEB so the switch_id
7862 * should be set to zero by default.
7864 ctxt.info.switch_id = 0;
7865 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7867 /* Setup the VSI tx/rx queue map for TC0 only for now */
7868 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7871 case I40E_VSI_SRIOV:
7872 ctxt.pf_num = hw->pf_id;
7873 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
7874 ctxt.uplink_seid = vsi->uplink_seid;
7875 ctxt.connection_type = 0x1; /* regular data port */
7876 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
7878 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7880 /* This VSI is connected to VEB so the switch_id
7881 * should be set to zero by default.
7883 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7885 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
7886 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7887 if (pf->vf[vsi->vf_id].spoofchk) {
7888 ctxt.info.valid_sections |=
7889 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7890 ctxt.info.sec_flags |=
7891 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7892 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7894 /* Setup the VSI tx/rx queue map for TC0 only for now */
7895 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7900 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
7902 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
7907 #endif /* I40E_FCOE */
7912 if (vsi->type != I40E_VSI_MAIN) {
7913 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
7915 dev_info(&vsi->back->pdev->dev,
7916 "add vsi failed, aq_err=%d\n",
7917 vsi->back->hw.aq.asq_last_status);
7921 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7922 vsi->info.valid_sections = 0;
7923 vsi->seid = ctxt.seid;
7924 vsi->id = ctxt.vsi_number;
7927 /* If macvlan filters already exist, force them to get loaded */
7928 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
7932 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
7933 struct i40e_aqc_remove_macvlan_element_data element;
7935 memset(&element, 0, sizeof(element));
7936 ether_addr_copy(element.mac_addr, f->macaddr);
7937 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7938 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
7941 /* some older FW has a different default */
7943 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
7944 i40e_aq_remove_macvlan(hw, vsi->seid,
7948 i40e_aq_mac_address_write(hw,
7949 I40E_AQC_WRITE_TYPE_LAA_WOL,
7954 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
7955 pf->flags |= I40E_FLAG_FILTER_SYNC;
7958 /* Update VSI BW information */
7959 ret = i40e_vsi_get_bw_info(vsi);
7961 dev_info(&pf->pdev->dev,
7962 "couldn't get vsi bw info, err %d, aq_err %d\n",
7963 ret, pf->hw.aq.asq_last_status);
7964 /* VSI is already added so not tearing that up */
7973 * i40e_vsi_release - Delete a VSI and free its resources
7974 * @vsi: the VSI being removed
7976 * Returns 0 on success or < 0 on error
7978 int i40e_vsi_release(struct i40e_vsi *vsi)
7980 struct i40e_mac_filter *f, *ftmp;
7981 struct i40e_veb *veb = NULL;
7988 /* release of a VEB-owner or last VSI is not allowed */
7989 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
7990 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
7991 vsi->seid, vsi->uplink_seid);
7994 if (vsi == pf->vsi[pf->lan_vsi] &&
7995 !test_bit(__I40E_DOWN, &pf->state)) {
7996 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8000 uplink_seid = vsi->uplink_seid;
8001 if (vsi->type != I40E_VSI_SRIOV) {
8002 if (vsi->netdev_registered) {
8003 vsi->netdev_registered = false;
8005 /* results in a call to i40e_close() */
8006 unregister_netdev(vsi->netdev);
8009 i40e_vsi_close(vsi);
8011 i40e_vsi_disable_irq(vsi);
8014 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8015 i40e_del_filter(vsi, f->macaddr, f->vlan,
8016 f->is_vf, f->is_netdev);
8017 i40e_sync_vsi_filters(vsi);
8019 i40e_vsi_delete(vsi);
8020 i40e_vsi_free_q_vectors(vsi);
8022 free_netdev(vsi->netdev);
8025 i40e_vsi_clear_rings(vsi);
8026 i40e_vsi_clear(vsi);
8028 /* If this was the last thing on the VEB, except for the
8029 * controlling VSI, remove the VEB, which puts the controlling
8030 * VSI onto the next level down in the switch.
8032 * Well, okay, there's one more exception here: don't remove
8033 * the orphan VEBs yet. We'll wait for an explicit remove request
8034 * from up the network stack.
8036 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8038 pf->vsi[i]->uplink_seid == uplink_seid &&
8039 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8040 n++; /* count the VSIs */
8043 for (i = 0; i < I40E_MAX_VEB; i++) {
8046 if (pf->veb[i]->uplink_seid == uplink_seid)
8047 n++; /* count the VEBs */
8048 if (pf->veb[i]->seid == uplink_seid)
8051 if (n == 0 && veb && veb->uplink_seid != 0)
8052 i40e_veb_release(veb);
8058 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8059 * @vsi: ptr to the VSI
8061 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8062 * corresponding SW VSI structure and initializes num_queue_pairs for the
8063 * newly allocated VSI.
8065 * Returns 0 on success or negative on failure
8067 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8070 struct i40e_pf *pf = vsi->back;
8072 if (vsi->q_vectors[0]) {
8073 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8078 if (vsi->base_vector) {
8079 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8080 vsi->seid, vsi->base_vector);
8084 ret = i40e_vsi_alloc_q_vectors(vsi);
8086 dev_info(&pf->pdev->dev,
8087 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8088 vsi->num_q_vectors, vsi->seid, ret);
8089 vsi->num_q_vectors = 0;
8090 goto vector_setup_out;
8093 if (vsi->num_q_vectors)
8094 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8095 vsi->num_q_vectors, vsi->idx);
8096 if (vsi->base_vector < 0) {
8097 dev_info(&pf->pdev->dev,
8098 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8099 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8100 i40e_vsi_free_q_vectors(vsi);
8102 goto vector_setup_out;
8110 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8111 * @vsi: pointer to the vsi.
8113 * This re-allocates a vsi's queue resources.
8115 * Returns pointer to the successfully allocated and configured VSI sw struct
8116 * on success, otherwise returns NULL on failure.
8118 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8120 struct i40e_pf *pf = vsi->back;
8124 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8125 i40e_vsi_clear_rings(vsi);
8127 i40e_vsi_free_arrays(vsi, false);
8128 i40e_set_num_rings_in_vsi(vsi);
8129 ret = i40e_vsi_alloc_arrays(vsi, false);
8133 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8135 dev_info(&pf->pdev->dev,
8136 "failed to get tracking for %d queues for VSI %d err=%d\n",
8137 vsi->alloc_queue_pairs, vsi->seid, ret);
8140 vsi->base_queue = ret;
8142 /* Update the FW view of the VSI. Force a reset of TC and queue
8143 * layout configurations.
8145 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8146 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8147 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8148 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8150 /* assign it some queues */
8151 ret = i40e_alloc_rings(vsi);
8155 /* map all of the rings to the q_vectors */
8156 i40e_vsi_map_rings_to_vectors(vsi);
8160 i40e_vsi_free_q_vectors(vsi);
8161 if (vsi->netdev_registered) {
8162 vsi->netdev_registered = false;
8163 unregister_netdev(vsi->netdev);
8164 free_netdev(vsi->netdev);
8167 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8169 i40e_vsi_clear(vsi);
8174 * i40e_vsi_setup - Set up a VSI by a given type
8175 * @pf: board private structure
8177 * @uplink_seid: the switch element to link to
8178 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8180 * This allocates the sw VSI structure and its queue resources, then add a VSI
8181 * to the identified VEB.
8183 * Returns pointer to the successfully allocated and configure VSI sw struct on
8184 * success, otherwise returns NULL on failure.
8186 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8187 u16 uplink_seid, u32 param1)
8189 struct i40e_vsi *vsi = NULL;
8190 struct i40e_veb *veb = NULL;
8194 /* The requested uplink_seid must be either
8195 * - the PF's port seid
8196 * no VEB is needed because this is the PF
8197 * or this is a Flow Director special case VSI
8198 * - seid of an existing VEB
8199 * - seid of a VSI that owns an existing VEB
8200 * - seid of a VSI that doesn't own a VEB
8201 * a new VEB is created and the VSI becomes the owner
8202 * - seid of the PF VSI, which is what creates the first VEB
8203 * this is a special case of the previous
8205 * Find which uplink_seid we were given and create a new VEB if needed
8207 for (i = 0; i < I40E_MAX_VEB; i++) {
8208 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8214 if (!veb && uplink_seid != pf->mac_seid) {
8216 for (i = 0; i < pf->num_alloc_vsi; i++) {
8217 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8223 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8228 if (vsi->uplink_seid == pf->mac_seid)
8229 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8230 vsi->tc_config.enabled_tc);
8231 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8232 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8233 vsi->tc_config.enabled_tc);
8235 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8236 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8240 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8244 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8245 uplink_seid = veb->seid;
8248 /* get vsi sw struct */
8249 v_idx = i40e_vsi_mem_alloc(pf, type);
8252 vsi = pf->vsi[v_idx];
8256 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8258 if (type == I40E_VSI_MAIN)
8259 pf->lan_vsi = v_idx;
8260 else if (type == I40E_VSI_SRIOV)
8261 vsi->vf_id = param1;
8262 /* assign it some queues */
8263 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8266 dev_info(&pf->pdev->dev,
8267 "failed to get tracking for %d queues for VSI %d err=%d\n",
8268 vsi->alloc_queue_pairs, vsi->seid, ret);
8271 vsi->base_queue = ret;
8273 /* get a VSI from the hardware */
8274 vsi->uplink_seid = uplink_seid;
8275 ret = i40e_add_vsi(vsi);
8279 switch (vsi->type) {
8280 /* setup the netdev if needed */
8282 case I40E_VSI_VMDQ2:
8284 ret = i40e_config_netdev(vsi);
8287 ret = register_netdev(vsi->netdev);
8290 vsi->netdev_registered = true;
8291 netif_carrier_off(vsi->netdev);
8292 #ifdef CONFIG_I40E_DCB
8293 /* Setup DCB netlink interface */
8294 i40e_dcbnl_setup(vsi);
8295 #endif /* CONFIG_I40E_DCB */
8299 /* set up vectors and rings if needed */
8300 ret = i40e_vsi_setup_vectors(vsi);
8304 ret = i40e_alloc_rings(vsi);
8308 /* map all of the rings to the q_vectors */
8309 i40e_vsi_map_rings_to_vectors(vsi);
8311 i40e_vsi_reset_stats(vsi);
8315 /* no netdev or rings for the other VSI types */
8322 i40e_vsi_free_q_vectors(vsi);
8324 if (vsi->netdev_registered) {
8325 vsi->netdev_registered = false;
8326 unregister_netdev(vsi->netdev);
8327 free_netdev(vsi->netdev);
8331 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8333 i40e_vsi_clear(vsi);
8339 * i40e_veb_get_bw_info - Query VEB BW information
8340 * @veb: the veb to query
8342 * Query the Tx scheduler BW configuration data for given VEB
8344 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8346 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8347 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8348 struct i40e_pf *pf = veb->pf;
8349 struct i40e_hw *hw = &pf->hw;
8354 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8357 dev_info(&pf->pdev->dev,
8358 "query veb bw config failed, aq_err=%d\n",
8359 hw->aq.asq_last_status);
8363 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8366 dev_info(&pf->pdev->dev,
8367 "query veb bw ets config failed, aq_err=%d\n",
8368 hw->aq.asq_last_status);
8372 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8373 veb->bw_max_quanta = ets_data.tc_bw_max;
8374 veb->is_abs_credits = bw_data.absolute_credits_enable;
8375 veb->enabled_tc = ets_data.tc_valid_bits;
8376 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8377 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8378 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8379 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8380 veb->bw_tc_limit_credits[i] =
8381 le16_to_cpu(bw_data.tc_bw_limits[i]);
8382 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8390 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8391 * @pf: board private structure
8393 * On error: returns error code (negative)
8394 * On success: returns vsi index in PF (positive)
8396 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8399 struct i40e_veb *veb;
8402 /* Need to protect the allocation of switch elements at the PF level */
8403 mutex_lock(&pf->switch_mutex);
8405 /* VEB list may be fragmented if VEB creation/destruction has
8406 * been happening. We can afford to do a quick scan to look
8407 * for any free slots in the list.
8409 * find next empty veb slot, looping back around if necessary
8412 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8414 if (i >= I40E_MAX_VEB) {
8416 goto err_alloc_veb; /* out of VEB slots! */
8419 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8426 veb->enabled_tc = 1;
8431 mutex_unlock(&pf->switch_mutex);
8436 * i40e_switch_branch_release - Delete a branch of the switch tree
8437 * @branch: where to start deleting
8439 * This uses recursion to find the tips of the branch to be
8440 * removed, deleting until we get back to and can delete this VEB.
8442 static void i40e_switch_branch_release(struct i40e_veb *branch)
8444 struct i40e_pf *pf = branch->pf;
8445 u16 branch_seid = branch->seid;
8446 u16 veb_idx = branch->idx;
8449 /* release any VEBs on this VEB - RECURSION */
8450 for (i = 0; i < I40E_MAX_VEB; i++) {
8453 if (pf->veb[i]->uplink_seid == branch->seid)
8454 i40e_switch_branch_release(pf->veb[i]);
8457 /* Release the VSIs on this VEB, but not the owner VSI.
8459 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8460 * the VEB itself, so don't use (*branch) after this loop.
8462 for (i = 0; i < pf->num_alloc_vsi; i++) {
8465 if (pf->vsi[i]->uplink_seid == branch_seid &&
8466 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8467 i40e_vsi_release(pf->vsi[i]);
8471 /* There's one corner case where the VEB might not have been
8472 * removed, so double check it here and remove it if needed.
8473 * This case happens if the veb was created from the debugfs
8474 * commands and no VSIs were added to it.
8476 if (pf->veb[veb_idx])
8477 i40e_veb_release(pf->veb[veb_idx]);
8481 * i40e_veb_clear - remove veb struct
8482 * @veb: the veb to remove
8484 static void i40e_veb_clear(struct i40e_veb *veb)
8490 struct i40e_pf *pf = veb->pf;
8492 mutex_lock(&pf->switch_mutex);
8493 if (pf->veb[veb->idx] == veb)
8494 pf->veb[veb->idx] = NULL;
8495 mutex_unlock(&pf->switch_mutex);
8502 * i40e_veb_release - Delete a VEB and free its resources
8503 * @veb: the VEB being removed
8505 void i40e_veb_release(struct i40e_veb *veb)
8507 struct i40e_vsi *vsi = NULL;
8513 /* find the remaining VSI and check for extras */
8514 for (i = 0; i < pf->num_alloc_vsi; i++) {
8515 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8521 dev_info(&pf->pdev->dev,
8522 "can't remove VEB %d with %d VSIs left\n",
8527 /* move the remaining VSI to uplink veb */
8528 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8529 if (veb->uplink_seid) {
8530 vsi->uplink_seid = veb->uplink_seid;
8531 if (veb->uplink_seid == pf->mac_seid)
8532 vsi->veb_idx = I40E_NO_VEB;
8534 vsi->veb_idx = veb->veb_idx;
8537 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8538 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8541 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8542 i40e_veb_clear(veb);
8546 * i40e_add_veb - create the VEB in the switch
8547 * @veb: the VEB to be instantiated
8548 * @vsi: the controlling VSI
8550 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8552 bool is_default = false;
8553 bool is_cloud = false;
8556 /* get a VEB from the hardware */
8557 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8558 veb->enabled_tc, is_default,
8559 is_cloud, &veb->seid, NULL);
8561 dev_info(&veb->pf->pdev->dev,
8562 "couldn't add VEB, err %d, aq_err %d\n",
8563 ret, veb->pf->hw.aq.asq_last_status);
8567 /* get statistics counter */
8568 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8569 &veb->stats_idx, NULL, NULL, NULL);
8571 dev_info(&veb->pf->pdev->dev,
8572 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8573 ret, veb->pf->hw.aq.asq_last_status);
8576 ret = i40e_veb_get_bw_info(veb);
8578 dev_info(&veb->pf->pdev->dev,
8579 "couldn't get VEB bw info, err %d, aq_err %d\n",
8580 ret, veb->pf->hw.aq.asq_last_status);
8581 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8585 vsi->uplink_seid = veb->seid;
8586 vsi->veb_idx = veb->idx;
8587 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8593 * i40e_veb_setup - Set up a VEB
8594 * @pf: board private structure
8595 * @flags: VEB setup flags
8596 * @uplink_seid: the switch element to link to
8597 * @vsi_seid: the initial VSI seid
8598 * @enabled_tc: Enabled TC bit-map
8600 * This allocates the sw VEB structure and links it into the switch
8601 * It is possible and legal for this to be a duplicate of an already
8602 * existing VEB. It is also possible for both uplink and vsi seids
8603 * to be zero, in order to create a floating VEB.
8605 * Returns pointer to the successfully allocated VEB sw struct on
8606 * success, otherwise returns NULL on failure.
8608 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8609 u16 uplink_seid, u16 vsi_seid,
8612 struct i40e_veb *veb, *uplink_veb = NULL;
8613 int vsi_idx, veb_idx;
8616 /* if one seid is 0, the other must be 0 to create a floating relay */
8617 if ((uplink_seid == 0 || vsi_seid == 0) &&
8618 (uplink_seid + vsi_seid != 0)) {
8619 dev_info(&pf->pdev->dev,
8620 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8621 uplink_seid, vsi_seid);
8625 /* make sure there is such a vsi and uplink */
8626 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8627 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8629 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8630 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8635 if (uplink_seid && uplink_seid != pf->mac_seid) {
8636 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8637 if (pf->veb[veb_idx] &&
8638 pf->veb[veb_idx]->seid == uplink_seid) {
8639 uplink_veb = pf->veb[veb_idx];
8644 dev_info(&pf->pdev->dev,
8645 "uplink seid %d not found\n", uplink_seid);
8650 /* get veb sw struct */
8651 veb_idx = i40e_veb_mem_alloc(pf);
8654 veb = pf->veb[veb_idx];
8656 veb->uplink_seid = uplink_seid;
8657 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8658 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8660 /* create the VEB in the switch */
8661 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8664 if (vsi_idx == pf->lan_vsi)
8665 pf->lan_veb = veb->idx;
8670 i40e_veb_clear(veb);
8676 * i40e_setup_pf_switch_element - set pf vars based on switch type
8677 * @pf: board private structure
8678 * @ele: element we are building info from
8679 * @num_reported: total number of elements
8680 * @printconfig: should we print the contents
8682 * helper function to assist in extracting a few useful SEID values.
8684 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8685 struct i40e_aqc_switch_config_element_resp *ele,
8686 u16 num_reported, bool printconfig)
8688 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8689 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8690 u8 element_type = ele->element_type;
8691 u16 seid = le16_to_cpu(ele->seid);
8694 dev_info(&pf->pdev->dev,
8695 "type=%d seid=%d uplink=%d downlink=%d\n",
8696 element_type, seid, uplink_seid, downlink_seid);
8698 switch (element_type) {
8699 case I40E_SWITCH_ELEMENT_TYPE_MAC:
8700 pf->mac_seid = seid;
8702 case I40E_SWITCH_ELEMENT_TYPE_VEB:
8704 if (uplink_seid != pf->mac_seid)
8706 if (pf->lan_veb == I40E_NO_VEB) {
8709 /* find existing or else empty VEB */
8710 for (v = 0; v < I40E_MAX_VEB; v++) {
8711 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
8716 if (pf->lan_veb == I40E_NO_VEB) {
8717 v = i40e_veb_mem_alloc(pf);
8724 pf->veb[pf->lan_veb]->seid = seid;
8725 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
8726 pf->veb[pf->lan_veb]->pf = pf;
8727 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
8729 case I40E_SWITCH_ELEMENT_TYPE_VSI:
8730 if (num_reported != 1)
8732 /* This is immediately after a reset so we can assume this is
8735 pf->mac_seid = uplink_seid;
8736 pf->pf_seid = downlink_seid;
8737 pf->main_vsi_seid = seid;
8739 dev_info(&pf->pdev->dev,
8740 "pf_seid=%d main_vsi_seid=%d\n",
8741 pf->pf_seid, pf->main_vsi_seid);
8743 case I40E_SWITCH_ELEMENT_TYPE_PF:
8744 case I40E_SWITCH_ELEMENT_TYPE_VF:
8745 case I40E_SWITCH_ELEMENT_TYPE_EMP:
8746 case I40E_SWITCH_ELEMENT_TYPE_BMC:
8747 case I40E_SWITCH_ELEMENT_TYPE_PE:
8748 case I40E_SWITCH_ELEMENT_TYPE_PA:
8749 /* ignore these for now */
8752 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
8753 element_type, seid);
8759 * i40e_fetch_switch_configuration - Get switch config from firmware
8760 * @pf: board private structure
8761 * @printconfig: should we print the contents
8763 * Get the current switch configuration from the device and
8764 * extract a few useful SEID values.
8766 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
8768 struct i40e_aqc_get_switch_config_resp *sw_config;
8774 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
8778 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
8780 u16 num_reported, num_total;
8782 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
8786 dev_info(&pf->pdev->dev,
8787 "get switch config failed %d aq_err=%x\n",
8788 ret, pf->hw.aq.asq_last_status);
8793 num_reported = le16_to_cpu(sw_config->header.num_reported);
8794 num_total = le16_to_cpu(sw_config->header.num_total);
8797 dev_info(&pf->pdev->dev,
8798 "header: %d reported %d total\n",
8799 num_reported, num_total);
8801 for (i = 0; i < num_reported; i++) {
8802 struct i40e_aqc_switch_config_element_resp *ele =
8803 &sw_config->element[i];
8805 i40e_setup_pf_switch_element(pf, ele, num_reported,
8808 } while (next_seid != 0);
8815 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
8816 * @pf: board private structure
8817 * @reinit: if the Main VSI needs to re-initialized.
8819 * Returns 0 on success, negative value on failure
8821 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
8825 /* find out what's out there already */
8826 ret = i40e_fetch_switch_configuration(pf, false);
8828 dev_info(&pf->pdev->dev,
8829 "couldn't fetch switch config, err %d, aq_err %d\n",
8830 ret, pf->hw.aq.asq_last_status);
8833 i40e_pf_reset_stats(pf);
8835 /* first time setup */
8836 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
8837 struct i40e_vsi *vsi = NULL;
8840 /* Set up the PF VSI associated with the PF's main VSI
8841 * that is already in the HW switch
8843 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8844 uplink_seid = pf->veb[pf->lan_veb]->seid;
8846 uplink_seid = pf->mac_seid;
8847 if (pf->lan_vsi == I40E_NO_VSI)
8848 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
8850 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
8852 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
8853 i40e_fdir_teardown(pf);
8857 /* force a reset of TC and queue layout configurations */
8858 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8859 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8860 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8861 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8863 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
8865 i40e_fdir_sb_setup(pf);
8867 /* Setup static PF queue filter control settings */
8868 ret = i40e_setup_pf_filter_control(pf);
8870 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
8872 /* Failure here should not stop continuing other steps */
8875 /* enable RSS in the HW, even for only one queue, as the stack can use
8878 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
8879 i40e_config_rss(pf);
8881 /* fill in link information and enable LSE reporting */
8882 i40e_update_link_info(&pf->hw, true);
8883 i40e_link_event(pf);
8885 /* Initialize user-specific link properties */
8886 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8887 I40E_AQ_AN_COMPLETED) ? true : false);
8889 /* fill in link information and enable LSE reporting */
8890 i40e_update_link_info(&pf->hw, true);
8891 i40e_link_event(pf);
8893 /* Initialize user-specific link properties */
8894 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8895 I40E_AQ_AN_COMPLETED) ? true : false);
8903 * i40e_determine_queue_usage - Work out queue distribution
8904 * @pf: board private structure
8906 static void i40e_determine_queue_usage(struct i40e_pf *pf)
8910 pf->num_lan_qps = 0;
8912 pf->num_fcoe_qps = 0;
8915 /* Find the max queues to be put into basic use. We'll always be
8916 * using TC0, whether or not DCB is running, and TC0 will get the
8919 queues_left = pf->hw.func_caps.num_tx_qp;
8921 if ((queues_left == 1) ||
8922 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8923 /* one qp for PF, no queues for anything else */
8925 pf->rss_size = pf->num_lan_qps = 1;
8927 /* make sure all the fancies are disabled */
8928 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8930 I40E_FLAG_FCOE_ENABLED |
8932 I40E_FLAG_FD_SB_ENABLED |
8933 I40E_FLAG_FD_ATR_ENABLED |
8934 I40E_FLAG_DCB_CAPABLE |
8935 I40E_FLAG_SRIOV_ENABLED |
8936 I40E_FLAG_VMDQ_ENABLED);
8937 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8938 I40E_FLAG_FD_SB_ENABLED |
8939 I40E_FLAG_FD_ATR_ENABLED |
8940 I40E_FLAG_DCB_CAPABLE))) {
8942 pf->rss_size = pf->num_lan_qps = 1;
8943 queues_left -= pf->num_lan_qps;
8945 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8947 I40E_FLAG_FCOE_ENABLED |
8949 I40E_FLAG_FD_SB_ENABLED |
8950 I40E_FLAG_FD_ATR_ENABLED |
8951 I40E_FLAG_DCB_ENABLED |
8952 I40E_FLAG_VMDQ_ENABLED);
8954 /* Not enough queues for all TCs */
8955 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
8956 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
8957 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8958 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
8960 pf->num_lan_qps = pf->rss_size_max;
8961 queues_left -= pf->num_lan_qps;
8965 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8966 if (I40E_DEFAULT_FCOE <= queues_left) {
8967 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
8968 } else if (I40E_MINIMUM_FCOE <= queues_left) {
8969 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
8971 pf->num_fcoe_qps = 0;
8972 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
8973 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
8976 queues_left -= pf->num_fcoe_qps;
8980 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8981 if (queues_left > 1) {
8982 queues_left -= 1; /* save 1 queue for FD */
8984 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8985 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
8989 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8990 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
8991 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
8992 (queues_left / pf->num_vf_qps));
8993 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
8996 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8997 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
8998 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
8999 (queues_left / pf->num_vmdq_qps));
9000 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9003 pf->queues_left = queues_left;
9005 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9010 * i40e_setup_pf_filter_control - Setup PF static filter control
9011 * @pf: PF to be setup
9013 * i40e_setup_pf_filter_control sets up a pf's initial filter control
9014 * settings. If PE/FCoE are enabled then it will also set the per PF
9015 * based filter sizes required for them. It also enables Flow director,
9016 * ethertype and macvlan type filter settings for the pf.
9018 * Returns 0 on success, negative on failure
9020 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9022 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9024 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9026 /* Flow Director is enabled */
9027 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9028 settings->enable_fdir = true;
9030 /* Ethtype and MACVLAN filters enabled for PF */
9031 settings->enable_ethtype = true;
9032 settings->enable_macvlan = true;
9034 if (i40e_set_filter_control(&pf->hw, settings))
9040 #define INFO_STRING_LEN 255
9041 static void i40e_print_features(struct i40e_pf *pf)
9043 struct i40e_hw *hw = &pf->hw;
9046 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9048 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9054 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9055 #ifdef CONFIG_PCI_IOV
9056 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9058 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
9059 pf->vsi[pf->lan_vsi]->num_queue_pairs);
9061 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9062 buf += sprintf(buf, "RSS ");
9063 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9064 buf += sprintf(buf, "FD_ATR ");
9065 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9066 buf += sprintf(buf, "FD_SB ");
9067 buf += sprintf(buf, "NTUPLE ");
9069 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9070 buf += sprintf(buf, "DCB ");
9071 if (pf->flags & I40E_FLAG_PTP)
9072 buf += sprintf(buf, "PTP ");
9074 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9075 buf += sprintf(buf, "FCOE ");
9078 BUG_ON(buf > (string + INFO_STRING_LEN));
9079 dev_info(&pf->pdev->dev, "%s\n", string);
9084 * i40e_probe - Device initialization routine
9085 * @pdev: PCI device information struct
9086 * @ent: entry in i40e_pci_tbl
9088 * i40e_probe initializes a pf identified by a pci_dev structure.
9089 * The OS initialization, configuring of the pf private structure,
9090 * and a hardware reset occur.
9092 * Returns 0 on success, negative on failure
9094 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9098 static u16 pfs_found;
9104 err = pci_enable_device_mem(pdev);
9108 /* set up for high or low dma */
9109 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9111 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9114 "DMA configuration failed: 0x%x\n", err);
9119 /* set up pci connections */
9120 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9121 IORESOURCE_MEM), i40e_driver_name);
9123 dev_info(&pdev->dev,
9124 "pci_request_selected_regions failed %d\n", err);
9128 pci_enable_pcie_error_reporting(pdev);
9129 pci_set_master(pdev);
9131 /* Now that we have a PCI connection, we need to do the
9132 * low level device setup. This is primarily setting up
9133 * the Admin Queue structures and then querying for the
9134 * device's current profile information.
9136 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9143 set_bit(__I40E_DOWN, &pf->state);
9147 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9148 pci_resource_len(pdev, 0));
9151 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9152 (unsigned int)pci_resource_start(pdev, 0),
9153 (unsigned int)pci_resource_len(pdev, 0), err);
9156 hw->vendor_id = pdev->vendor;
9157 hw->device_id = pdev->device;
9158 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9159 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9160 hw->subsystem_device_id = pdev->subsystem_device;
9161 hw->bus.device = PCI_SLOT(pdev->devfn);
9162 hw->bus.func = PCI_FUNC(pdev->devfn);
9163 pf->instance = pfs_found;
9166 pf->msg_enable = pf->hw.debug_mask;
9167 pf->msg_enable = debug;
9170 /* do a special CORER for clearing PXE mode once at init */
9171 if (hw->revision_id == 0 &&
9172 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9173 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9178 i40e_clear_pxe_mode(hw);
9181 /* Reset here to make sure all is clean and to define PF 'n' */
9183 err = i40e_pf_reset(hw);
9185 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9190 hw->aq.num_arq_entries = I40E_AQ_LEN;
9191 hw->aq.num_asq_entries = I40E_AQ_LEN;
9192 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9193 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9194 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9195 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
9197 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
9199 err = i40e_init_shared_code(hw);
9201 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9205 /* set up a default setting for link flow control */
9206 pf->hw.fc.requested_mode = I40E_FC_NONE;
9208 err = i40e_init_adminq(hw);
9209 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9211 dev_info(&pdev->dev,
9212 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9216 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9217 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9218 dev_info(&pdev->dev,
9219 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9220 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9221 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9222 dev_info(&pdev->dev,
9223 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9226 i40e_verify_eeprom(pf);
9228 /* Rev 0 hardware was never productized */
9229 if (hw->revision_id < 1)
9230 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9232 i40e_clear_pxe_mode(hw);
9233 err = i40e_get_capabilities(pf);
9235 goto err_adminq_setup;
9237 err = i40e_sw_init(pf);
9239 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9243 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9244 hw->func_caps.num_rx_qp,
9245 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9247 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9248 goto err_init_lan_hmc;
9251 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9253 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9255 goto err_configure_lan_hmc;
9258 i40e_get_mac_addr(hw, hw->mac.addr);
9259 if (!is_valid_ether_addr(hw->mac.addr)) {
9260 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9264 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9265 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9266 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9267 if (is_valid_ether_addr(hw->mac.port_addr))
9268 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9270 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9272 dev_info(&pdev->dev,
9273 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9274 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9275 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9277 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9279 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9280 #endif /* I40E_FCOE */
9282 pci_set_drvdata(pdev, pf);
9283 pci_save_state(pdev);
9284 #ifdef CONFIG_I40E_DCB
9285 err = i40e_init_pf_dcb(pf);
9287 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
9288 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9289 /* Continue without DCB enabled */
9291 #endif /* CONFIG_I40E_DCB */
9293 /* set up periodic task facility */
9294 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9295 pf->service_timer_period = HZ;
9297 INIT_WORK(&pf->service_task, i40e_service_task);
9298 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9299 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9300 pf->link_check_timeout = jiffies;
9302 /* WoL defaults to disabled */
9304 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9306 /* set up the main switch operations */
9307 i40e_determine_queue_usage(pf);
9308 i40e_init_interrupt_scheme(pf);
9310 /* The number of VSIs reported by the FW is the minimum guaranteed
9311 * to us; HW supports far more and we share the remaining pool with
9312 * the other PFs. We allocate space for more than the guarantee with
9313 * the understanding that we might not get them all later.
9315 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9316 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9318 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9320 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9321 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9322 pf->vsi = kzalloc(len, GFP_KERNEL);
9325 goto err_switch_setup;
9328 err = i40e_setup_pf_switch(pf, false);
9330 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9333 /* if FDIR VSI was set up, start it now */
9334 for (i = 0; i < pf->num_alloc_vsi; i++) {
9335 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9336 i40e_vsi_open(pf->vsi[i]);
9341 /* driver is only interested in link up/down and module qualification
9342 * reports from firmware
9344 err = i40e_aq_set_phy_int_mask(&pf->hw,
9345 I40E_AQ_EVENT_LINK_UPDOWN |
9346 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9348 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9351 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9353 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9354 pf->hw.aq.asq_last_status);
9357 /* The main driver is (mostly) up and happy. We need to set this state
9358 * before setting up the misc vector or we get a race and the vector
9359 * ends up disabled forever.
9361 clear_bit(__I40E_DOWN, &pf->state);
9363 /* In case of MSIX we are going to setup the misc vector right here
9364 * to handle admin queue events etc. In case of legacy and MSI
9365 * the misc functionality and queue processing is combined in
9366 * the same vector and that gets setup at open.
9368 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9369 err = i40e_setup_misc_vector(pf);
9371 dev_info(&pdev->dev,
9372 "setup of misc vector failed: %d\n", err);
9377 #ifdef CONFIG_PCI_IOV
9378 /* prep for VF support */
9379 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9380 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9381 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9384 /* disable link interrupts for VFs */
9385 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9386 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9387 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9390 if (pci_num_vf(pdev)) {
9391 dev_info(&pdev->dev,
9392 "Active VFs found, allocating resources.\n");
9393 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9395 dev_info(&pdev->dev,
9396 "Error %d allocating resources for existing VFs\n",
9400 #endif /* CONFIG_PCI_IOV */
9404 i40e_dbg_pf_init(pf);
9406 /* tell the firmware that we're starting */
9407 i40e_send_version(pf);
9409 /* since everything's happy, start the service_task timer */
9410 mod_timer(&pf->service_timer,
9411 round_jiffies(jiffies + pf->service_timer_period));
9414 /* create FCoE interface */
9415 i40e_fcoe_vsi_setup(pf);
9418 /* Get the negotiated link width and speed from PCI config space */
9419 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9421 i40e_set_pci_config_data(hw, link_status);
9423 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9424 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9425 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9426 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9428 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9429 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9430 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9431 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9434 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9435 hw->bus.speed < i40e_bus_speed_8000) {
9436 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9437 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9440 /* print a string summarizing features */
9441 i40e_print_features(pf);
9445 /* Unwind what we've done if something failed in the setup */
9447 set_bit(__I40E_DOWN, &pf->state);
9448 i40e_clear_interrupt_scheme(pf);
9451 i40e_reset_interrupt_capability(pf);
9452 del_timer_sync(&pf->service_timer);
9454 err_configure_lan_hmc:
9455 (void)i40e_shutdown_lan_hmc(hw);
9458 kfree(pf->irq_pile);
9461 (void)i40e_shutdown_adminq(hw);
9463 iounmap(hw->hw_addr);
9467 pci_disable_pcie_error_reporting(pdev);
9468 pci_release_selected_regions(pdev,
9469 pci_select_bars(pdev, IORESOURCE_MEM));
9472 pci_disable_device(pdev);
9477 * i40e_remove - Device removal routine
9478 * @pdev: PCI device information struct
9480 * i40e_remove is called by the PCI subsystem to alert the driver
9481 * that is should release a PCI device. This could be caused by a
9482 * Hot-Plug event, or because the driver is going to be removed from
9485 static void i40e_remove(struct pci_dev *pdev)
9487 struct i40e_pf *pf = pci_get_drvdata(pdev);
9488 i40e_status ret_code;
9491 i40e_dbg_pf_exit(pf);
9495 /* no more scheduling of any task */
9496 set_bit(__I40E_DOWN, &pf->state);
9497 del_timer_sync(&pf->service_timer);
9498 cancel_work_sync(&pf->service_task);
9500 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9502 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9505 i40e_fdir_teardown(pf);
9507 /* If there is a switch structure or any orphans, remove them.
9508 * This will leave only the PF's VSI remaining.
9510 for (i = 0; i < I40E_MAX_VEB; i++) {
9514 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9515 pf->veb[i]->uplink_seid == 0)
9516 i40e_switch_branch_release(pf->veb[i]);
9519 /* Now we can shutdown the PF's VSI, just before we kill
9522 if (pf->vsi[pf->lan_vsi])
9523 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9525 i40e_stop_misc_vector(pf);
9526 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9527 synchronize_irq(pf->msix_entries[0].vector);
9528 free_irq(pf->msix_entries[0].vector, pf);
9531 /* shutdown and destroy the HMC */
9532 if (pf->hw.hmc.hmc_obj) {
9533 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9535 dev_warn(&pdev->dev,
9536 "Failed to destroy the HMC resources: %d\n",
9540 /* shutdown the adminq */
9541 ret_code = i40e_shutdown_adminq(&pf->hw);
9543 dev_warn(&pdev->dev,
9544 "Failed to destroy the Admin Queue resources: %d\n",
9547 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9548 i40e_clear_interrupt_scheme(pf);
9549 for (i = 0; i < pf->num_alloc_vsi; i++) {
9551 i40e_vsi_clear_rings(pf->vsi[i]);
9552 i40e_vsi_clear(pf->vsi[i]);
9557 for (i = 0; i < I40E_MAX_VEB; i++) {
9563 kfree(pf->irq_pile);
9566 iounmap(pf->hw.hw_addr);
9568 pci_release_selected_regions(pdev,
9569 pci_select_bars(pdev, IORESOURCE_MEM));
9571 pci_disable_pcie_error_reporting(pdev);
9572 pci_disable_device(pdev);
9576 * i40e_pci_error_detected - warning that something funky happened in PCI land
9577 * @pdev: PCI device information struct
9579 * Called to warn that something happened and the error handling steps
9580 * are in progress. Allows the driver to quiesce things, be ready for
9583 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9584 enum pci_channel_state error)
9586 struct i40e_pf *pf = pci_get_drvdata(pdev);
9588 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9590 /* shutdown all operations */
9591 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9593 i40e_prep_for_reset(pf);
9597 /* Request a slot reset */
9598 return PCI_ERS_RESULT_NEED_RESET;
9602 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9603 * @pdev: PCI device information struct
9605 * Called to find if the driver can work with the device now that
9606 * the pci slot has been reset. If a basic connection seems good
9607 * (registers are readable and have sane content) then return a
9608 * happy little PCI_ERS_RESULT_xxx.
9610 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9612 struct i40e_pf *pf = pci_get_drvdata(pdev);
9613 pci_ers_result_t result;
9617 dev_info(&pdev->dev, "%s\n", __func__);
9618 if (pci_enable_device_mem(pdev)) {
9619 dev_info(&pdev->dev,
9620 "Cannot re-enable PCI device after reset.\n");
9621 result = PCI_ERS_RESULT_DISCONNECT;
9623 pci_set_master(pdev);
9624 pci_restore_state(pdev);
9625 pci_save_state(pdev);
9626 pci_wake_from_d3(pdev, false);
9628 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9630 result = PCI_ERS_RESULT_RECOVERED;
9632 result = PCI_ERS_RESULT_DISCONNECT;
9635 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9637 dev_info(&pdev->dev,
9638 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9640 /* non-fatal, continue */
9647 * i40e_pci_error_resume - restart operations after PCI error recovery
9648 * @pdev: PCI device information struct
9650 * Called to allow the driver to bring things back up after PCI error
9651 * and/or reset recovery has finished.
9653 static void i40e_pci_error_resume(struct pci_dev *pdev)
9655 struct i40e_pf *pf = pci_get_drvdata(pdev);
9657 dev_info(&pdev->dev, "%s\n", __func__);
9658 if (test_bit(__I40E_SUSPENDED, &pf->state))
9662 i40e_handle_reset_warning(pf);
9667 * i40e_shutdown - PCI callback for shutting down
9668 * @pdev: PCI device information struct
9670 static void i40e_shutdown(struct pci_dev *pdev)
9672 struct i40e_pf *pf = pci_get_drvdata(pdev);
9673 struct i40e_hw *hw = &pf->hw;
9675 set_bit(__I40E_SUSPENDED, &pf->state);
9676 set_bit(__I40E_DOWN, &pf->state);
9678 i40e_prep_for_reset(pf);
9681 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9682 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9684 if (system_state == SYSTEM_POWER_OFF) {
9685 pci_wake_from_d3(pdev, pf->wol_en);
9686 pci_set_power_state(pdev, PCI_D3hot);
9692 * i40e_suspend - PCI callback for moving to D3
9693 * @pdev: PCI device information struct
9695 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
9697 struct i40e_pf *pf = pci_get_drvdata(pdev);
9698 struct i40e_hw *hw = &pf->hw;
9700 set_bit(__I40E_SUSPENDED, &pf->state);
9701 set_bit(__I40E_DOWN, &pf->state);
9703 i40e_prep_for_reset(pf);
9706 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9707 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9709 pci_wake_from_d3(pdev, pf->wol_en);
9710 pci_set_power_state(pdev, PCI_D3hot);
9716 * i40e_resume - PCI callback for waking up from D3
9717 * @pdev: PCI device information struct
9719 static int i40e_resume(struct pci_dev *pdev)
9721 struct i40e_pf *pf = pci_get_drvdata(pdev);
9724 pci_set_power_state(pdev, PCI_D0);
9725 pci_restore_state(pdev);
9726 /* pci_restore_state() clears dev->state_saves, so
9727 * call pci_save_state() again to restore it.
9729 pci_save_state(pdev);
9731 err = pci_enable_device_mem(pdev);
9734 "%s: Cannot enable PCI device from suspend\n",
9738 pci_set_master(pdev);
9740 /* no wakeup events while running */
9741 pci_wake_from_d3(pdev, false);
9743 /* handling the reset will rebuild the device state */
9744 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
9745 clear_bit(__I40E_DOWN, &pf->state);
9747 i40e_reset_and_rebuild(pf, false);
9755 static const struct pci_error_handlers i40e_err_handler = {
9756 .error_detected = i40e_pci_error_detected,
9757 .slot_reset = i40e_pci_error_slot_reset,
9758 .resume = i40e_pci_error_resume,
9761 static struct pci_driver i40e_driver = {
9762 .name = i40e_driver_name,
9763 .id_table = i40e_pci_tbl,
9764 .probe = i40e_probe,
9765 .remove = i40e_remove,
9767 .suspend = i40e_suspend,
9768 .resume = i40e_resume,
9770 .shutdown = i40e_shutdown,
9771 .err_handler = &i40e_err_handler,
9772 .sriov_configure = i40e_pci_sriov_configure,
9776 * i40e_init_module - Driver registration routine
9778 * i40e_init_module is the first routine called when the driver is
9779 * loaded. All it does is register with the PCI subsystem.
9781 static int __init i40e_init_module(void)
9783 pr_info("%s: %s - version %s\n", i40e_driver_name,
9784 i40e_driver_string, i40e_driver_version_str);
9785 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
9787 return pci_register_driver(&i40e_driver);
9789 module_init(i40e_init_module);
9792 * i40e_exit_module - Driver exit cleanup routine
9794 * i40e_exit_module is called just before the driver is removed
9797 static void __exit i40e_exit_module(void)
9799 pci_unregister_driver(&i40e_driver);
9802 module_exit(i40e_exit_module);