1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
32 #include <asm/idprom.h>
38 #include "i40e_diag.h"
39 #if IS_ENABLED(CONFIG_VXLAN)
40 #include <net/vxlan.h>
42 #if IS_ENABLED(CONFIG_GENEVE)
43 #include <net/geneve.h>
46 const char i40e_driver_name[] = "i40e";
47 static const char i40e_driver_string[] =
48 "Intel(R) Ethernet Connection XL710 Network Driver";
52 #define DRV_VERSION_MAJOR 1
53 #define DRV_VERSION_MINOR 4
54 #define DRV_VERSION_BUILD 8
55 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
56 __stringify(DRV_VERSION_MINOR) "." \
57 __stringify(DRV_VERSION_BUILD) DRV_KERN
58 const char i40e_driver_version_str[] = DRV_VERSION;
59 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
61 /* a bit of forward declarations */
62 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
63 static void i40e_handle_reset_warning(struct i40e_pf *pf);
64 static int i40e_add_vsi(struct i40e_vsi *vsi);
65 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
66 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
67 static int i40e_setup_misc_vector(struct i40e_pf *pf);
68 static void i40e_determine_queue_usage(struct i40e_pf *pf);
69 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
70 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
71 u16 rss_table_size, u16 rss_size);
72 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
73 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
75 /* i40e_pci_tbl - PCI Device ID Table
77 * Last entry must be all 0s
79 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
80 * Class, Class Mask, private data (not used) }
82 static const struct pci_device_id i40e_pci_tbl[] = {
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
98 /* required last entry */
101 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
103 #define I40E_MAX_VF_COUNT 128
104 static int debug = -1;
105 module_param(debug, int, 0);
106 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
108 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
109 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
110 MODULE_LICENSE("GPL");
111 MODULE_VERSION(DRV_VERSION);
114 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to fill out
117 * @size: size of memory requested
118 * @alignment: what to align the allocation to
120 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
121 u64 size, u32 alignment)
123 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
125 mem->size = ALIGN(size, alignment);
126 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
127 &mem->pa, GFP_KERNEL);
135 * i40e_free_dma_mem_d - OS specific memory free for shared code
136 * @hw: pointer to the HW structure
137 * @mem: ptr to mem struct to free
139 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
141 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
143 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
152 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
153 * @hw: pointer to the HW structure
154 * @mem: ptr to mem struct to fill out
155 * @size: size of memory requested
157 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
161 mem->va = kzalloc(size, GFP_KERNEL);
170 * i40e_free_virt_mem_d - OS specific memory free for shared code
171 * @hw: pointer to the HW structure
172 * @mem: ptr to mem struct to free
174 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
176 /* it's ok to kfree a NULL pointer */
185 * i40e_get_lump - find a lump of free generic resource
186 * @pf: board private structure
187 * @pile: the pile of resource to search
188 * @needed: the number of items needed
189 * @id: an owner id to stick on the items assigned
191 * Returns the base item index of the lump, or negative for error
193 * The search_hint trick and lack of advanced fit-finding only work
194 * because we're highly likely to have all the same size lump requests.
195 * Linear search time and any fragmentation should be minimal.
197 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
203 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
204 dev_info(&pf->pdev->dev,
205 "param err: pile=%p needed=%d id=0x%04x\n",
210 /* start the linear search with an imperfect hint */
211 i = pile->search_hint;
212 while (i < pile->num_entries) {
213 /* skip already allocated entries */
214 if (pile->list[i] & I40E_PILE_VALID_BIT) {
219 /* do we have enough in this lump? */
220 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
221 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
226 /* there was enough, so assign it to the requestor */
227 for (j = 0; j < needed; j++)
228 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
230 pile->search_hint = i + j;
234 /* not enough, so skip over it and continue looking */
242 * i40e_put_lump - return a lump of generic resource
243 * @pile: the pile of resource to search
244 * @index: the base item index
245 * @id: the owner id of the items assigned
247 * Returns the count of items in the lump
249 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
251 int valid_id = (id | I40E_PILE_VALID_BIT);
255 if (!pile || index >= pile->num_entries)
259 i < pile->num_entries && pile->list[i] == valid_id;
265 if (count && index < pile->search_hint)
266 pile->search_hint = index;
272 * i40e_find_vsi_from_id - searches for the vsi with the given id
273 * @pf - the pf structure to search for the vsi
274 * @id - id of the vsi it is searching for
276 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
280 for (i = 0; i < pf->num_alloc_vsi; i++)
281 if (pf->vsi[i] && (pf->vsi[i]->id == id))
288 * i40e_service_event_schedule - Schedule the service task to wake up
289 * @pf: board private structure
291 * If not already scheduled, this puts the task into the work queue
293 void i40e_service_event_schedule(struct i40e_pf *pf)
295 if (!test_bit(__I40E_DOWN, &pf->state) &&
296 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
297 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
298 schedule_work(&pf->service_task);
302 * i40e_tx_timeout - Respond to a Tx Hang
303 * @netdev: network interface device structure
305 * If any port has noticed a Tx timeout, it is likely that the whole
306 * device is munged, not just the one netdev port, so go for the full
310 void i40e_tx_timeout(struct net_device *netdev)
312 static void i40e_tx_timeout(struct net_device *netdev)
315 struct i40e_netdev_priv *np = netdev_priv(netdev);
316 struct i40e_vsi *vsi = np->vsi;
317 struct i40e_pf *pf = vsi->back;
318 struct i40e_ring *tx_ring = NULL;
319 unsigned int i, hung_queue = 0;
322 pf->tx_timeout_count++;
324 /* find the stopped queue the same way the stack does */
325 for (i = 0; i < netdev->num_tx_queues; i++) {
326 struct netdev_queue *q;
327 unsigned long trans_start;
329 q = netdev_get_tx_queue(netdev, i);
330 trans_start = q->trans_start ? : netdev->trans_start;
331 if (netif_xmit_stopped(q) &&
333 (trans_start + netdev->watchdog_timeo))) {
339 if (i == netdev->num_tx_queues) {
340 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
342 /* now that we have an index, find the tx_ring struct */
343 for (i = 0; i < vsi->num_queue_pairs; i++) {
344 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
346 vsi->tx_rings[i]->queue_index) {
347 tx_ring = vsi->tx_rings[i];
354 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
355 pf->tx_timeout_recovery_level = 1; /* reset after some time */
356 else if (time_before(jiffies,
357 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
358 return; /* don't do any new action before the next timeout */
361 head = i40e_get_head(tx_ring);
362 /* Read interrupt register */
363 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
365 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
366 tx_ring->vsi->base_vector - 1));
368 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
370 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
371 vsi->seid, hung_queue, tx_ring->next_to_clean,
372 head, tx_ring->next_to_use,
373 readl(tx_ring->tail), val);
376 pf->tx_timeout_last_recovery = jiffies;
377 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
378 pf->tx_timeout_recovery_level, hung_queue);
380 switch (pf->tx_timeout_recovery_level) {
382 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
385 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
388 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
391 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
395 i40e_service_event_schedule(pf);
396 pf->tx_timeout_recovery_level++;
400 * i40e_release_rx_desc - Store the new tail and head values
401 * @rx_ring: ring to bump
402 * @val: new head index
404 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
406 rx_ring->next_to_use = val;
408 /* Force memory writes to complete before letting h/w
409 * know there are new descriptors to fetch. (Only
410 * applicable for weak-ordered memory model archs,
414 writel(val, rx_ring->tail);
418 * i40e_get_vsi_stats_struct - Get System Network Statistics
419 * @vsi: the VSI we care about
421 * Returns the address of the device statistics structure.
422 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
426 return &vsi->net_stats;
430 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
431 * @netdev: network interface device structure
433 * Returns the address of the device statistics structure.
434 * The statistics are actually updated from the service task.
437 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
438 struct net_device *netdev,
439 struct rtnl_link_stats64 *stats)
441 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
442 struct net_device *netdev,
443 struct rtnl_link_stats64 *stats)
446 struct i40e_netdev_priv *np = netdev_priv(netdev);
447 struct i40e_ring *tx_ring, *rx_ring;
448 struct i40e_vsi *vsi = np->vsi;
449 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
452 if (test_bit(__I40E_DOWN, &vsi->state))
459 for (i = 0; i < vsi->num_queue_pairs; i++) {
463 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
468 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
469 packets = tx_ring->stats.packets;
470 bytes = tx_ring->stats.bytes;
471 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
473 stats->tx_packets += packets;
474 stats->tx_bytes += bytes;
475 rx_ring = &tx_ring[1];
478 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
479 packets = rx_ring->stats.packets;
480 bytes = rx_ring->stats.bytes;
481 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
483 stats->rx_packets += packets;
484 stats->rx_bytes += bytes;
488 /* following stats updated by i40e_watchdog_subtask() */
489 stats->multicast = vsi_stats->multicast;
490 stats->tx_errors = vsi_stats->tx_errors;
491 stats->tx_dropped = vsi_stats->tx_dropped;
492 stats->rx_errors = vsi_stats->rx_errors;
493 stats->rx_dropped = vsi_stats->rx_dropped;
494 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
495 stats->rx_length_errors = vsi_stats->rx_length_errors;
501 * i40e_vsi_reset_stats - Resets all stats of the given vsi
502 * @vsi: the VSI to have its stats reset
504 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
506 struct rtnl_link_stats64 *ns;
512 ns = i40e_get_vsi_stats_struct(vsi);
513 memset(ns, 0, sizeof(*ns));
514 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
515 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
516 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
517 if (vsi->rx_rings && vsi->rx_rings[0]) {
518 for (i = 0; i < vsi->num_queue_pairs; i++) {
519 memset(&vsi->rx_rings[i]->stats, 0,
520 sizeof(vsi->rx_rings[i]->stats));
521 memset(&vsi->rx_rings[i]->rx_stats, 0,
522 sizeof(vsi->rx_rings[i]->rx_stats));
523 memset(&vsi->tx_rings[i]->stats, 0,
524 sizeof(vsi->tx_rings[i]->stats));
525 memset(&vsi->tx_rings[i]->tx_stats, 0,
526 sizeof(vsi->tx_rings[i]->tx_stats));
529 vsi->stat_offsets_loaded = false;
533 * i40e_pf_reset_stats - Reset all of the stats for the given PF
534 * @pf: the PF to be reset
536 void i40e_pf_reset_stats(struct i40e_pf *pf)
540 memset(&pf->stats, 0, sizeof(pf->stats));
541 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
542 pf->stat_offsets_loaded = false;
544 for (i = 0; i < I40E_MAX_VEB; i++) {
546 memset(&pf->veb[i]->stats, 0,
547 sizeof(pf->veb[i]->stats));
548 memset(&pf->veb[i]->stats_offsets, 0,
549 sizeof(pf->veb[i]->stats_offsets));
550 pf->veb[i]->stat_offsets_loaded = false;
556 * i40e_stat_update48 - read and update a 48 bit stat from the chip
557 * @hw: ptr to the hardware info
558 * @hireg: the high 32 bit reg to read
559 * @loreg: the low 32 bit reg to read
560 * @offset_loaded: has the initial offset been loaded yet
561 * @offset: ptr to current offset value
562 * @stat: ptr to the stat
564 * Since the device stats are not reset at PFReset, they likely will not
565 * be zeroed when the driver starts. We'll save the first values read
566 * and use them as offsets to be subtracted from the raw values in order
567 * to report stats that count from zero. In the process, we also manage
568 * the potential roll-over.
570 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
571 bool offset_loaded, u64 *offset, u64 *stat)
575 if (hw->device_id == I40E_DEV_ID_QEMU) {
576 new_data = rd32(hw, loreg);
577 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
579 new_data = rd64(hw, loreg);
583 if (likely(new_data >= *offset))
584 *stat = new_data - *offset;
586 *stat = (new_data + BIT_ULL(48)) - *offset;
587 *stat &= 0xFFFFFFFFFFFFULL;
591 * i40e_stat_update32 - read and update a 32 bit stat from the chip
592 * @hw: ptr to the hardware info
593 * @reg: the hw reg to read
594 * @offset_loaded: has the initial offset been loaded yet
595 * @offset: ptr to current offset value
596 * @stat: ptr to the stat
598 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
599 bool offset_loaded, u64 *offset, u64 *stat)
603 new_data = rd32(hw, reg);
606 if (likely(new_data >= *offset))
607 *stat = (u32)(new_data - *offset);
609 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
613 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
614 * @vsi: the VSI to be updated
616 void i40e_update_eth_stats(struct i40e_vsi *vsi)
618 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
619 struct i40e_pf *pf = vsi->back;
620 struct i40e_hw *hw = &pf->hw;
621 struct i40e_eth_stats *oes;
622 struct i40e_eth_stats *es; /* device's eth stats */
624 es = &vsi->eth_stats;
625 oes = &vsi->eth_stats_offsets;
627 /* Gather up the stats that the hw collects */
628 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
629 vsi->stat_offsets_loaded,
630 &oes->tx_errors, &es->tx_errors);
631 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_discards, &es->rx_discards);
634 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
635 vsi->stat_offsets_loaded,
636 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
637 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_errors, &es->tx_errors);
641 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
642 I40E_GLV_GORCL(stat_idx),
643 vsi->stat_offsets_loaded,
644 &oes->rx_bytes, &es->rx_bytes);
645 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
646 I40E_GLV_UPRCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->rx_unicast, &es->rx_unicast);
649 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
650 I40E_GLV_MPRCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->rx_multicast, &es->rx_multicast);
653 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
654 I40E_GLV_BPRCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->rx_broadcast, &es->rx_broadcast);
658 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
659 I40E_GLV_GOTCL(stat_idx),
660 vsi->stat_offsets_loaded,
661 &oes->tx_bytes, &es->tx_bytes);
662 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
663 I40E_GLV_UPTCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->tx_unicast, &es->tx_unicast);
666 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
667 I40E_GLV_MPTCL(stat_idx),
668 vsi->stat_offsets_loaded,
669 &oes->tx_multicast, &es->tx_multicast);
670 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
671 I40E_GLV_BPTCL(stat_idx),
672 vsi->stat_offsets_loaded,
673 &oes->tx_broadcast, &es->tx_broadcast);
674 vsi->stat_offsets_loaded = true;
678 * i40e_update_veb_stats - Update Switch component statistics
679 * @veb: the VEB being updated
681 static void i40e_update_veb_stats(struct i40e_veb *veb)
683 struct i40e_pf *pf = veb->pf;
684 struct i40e_hw *hw = &pf->hw;
685 struct i40e_eth_stats *oes;
686 struct i40e_eth_stats *es; /* device's eth stats */
687 struct i40e_veb_tc_stats *veb_oes;
688 struct i40e_veb_tc_stats *veb_es;
691 idx = veb->stats_idx;
693 oes = &veb->stats_offsets;
694 veb_es = &veb->tc_stats;
695 veb_oes = &veb->tc_stats_offsets;
697 /* Gather up the stats that the hw collects */
698 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_discards, &es->tx_discards);
701 if (hw->revision_id > 0)
702 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_unknown_protocol,
705 &es->rx_unknown_protocol);
706 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->rx_bytes, &es->rx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->rx_unicast, &es->rx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->rx_multicast, &es->rx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->rx_broadcast, &es->rx_broadcast);
719 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
720 veb->stat_offsets_loaded,
721 &oes->tx_bytes, &es->tx_bytes);
722 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
723 veb->stat_offsets_loaded,
724 &oes->tx_unicast, &es->tx_unicast);
725 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
726 veb->stat_offsets_loaded,
727 &oes->tx_multicast, &es->tx_multicast);
728 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
729 veb->stat_offsets_loaded,
730 &oes->tx_broadcast, &es->tx_broadcast);
731 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
732 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
733 I40E_GLVEBTC_RPCL(i, idx),
734 veb->stat_offsets_loaded,
735 &veb_oes->tc_rx_packets[i],
736 &veb_es->tc_rx_packets[i]);
737 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
738 I40E_GLVEBTC_RBCL(i, idx),
739 veb->stat_offsets_loaded,
740 &veb_oes->tc_rx_bytes[i],
741 &veb_es->tc_rx_bytes[i]);
742 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
743 I40E_GLVEBTC_TPCL(i, idx),
744 veb->stat_offsets_loaded,
745 &veb_oes->tc_tx_packets[i],
746 &veb_es->tc_tx_packets[i]);
747 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
748 I40E_GLVEBTC_TBCL(i, idx),
749 veb->stat_offsets_loaded,
750 &veb_oes->tc_tx_bytes[i],
751 &veb_es->tc_tx_bytes[i]);
753 veb->stat_offsets_loaded = true;
758 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
759 * @vsi: the VSI that is capable of doing FCoE
761 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
763 struct i40e_pf *pf = vsi->back;
764 struct i40e_hw *hw = &pf->hw;
765 struct i40e_fcoe_stats *ofs;
766 struct i40e_fcoe_stats *fs; /* device's eth stats */
769 if (vsi->type != I40E_VSI_FCOE)
772 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
773 fs = &vsi->fcoe_stats;
774 ofs = &vsi->fcoe_stats_offsets;
776 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
777 vsi->fcoe_stat_offsets_loaded,
778 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
779 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
780 vsi->fcoe_stat_offsets_loaded,
781 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
782 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
783 vsi->fcoe_stat_offsets_loaded,
784 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
785 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
786 vsi->fcoe_stat_offsets_loaded,
787 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
788 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
789 vsi->fcoe_stat_offsets_loaded,
790 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
791 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
792 vsi->fcoe_stat_offsets_loaded,
793 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
794 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
795 vsi->fcoe_stat_offsets_loaded,
796 &ofs->fcoe_last_error, &fs->fcoe_last_error);
797 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
798 vsi->fcoe_stat_offsets_loaded,
799 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
801 vsi->fcoe_stat_offsets_loaded = true;
806 * i40e_update_vsi_stats - Update the vsi statistics counters.
807 * @vsi: the VSI to be updated
809 * There are a few instances where we store the same stat in a
810 * couple of different structs. This is partly because we have
811 * the netdev stats that need to be filled out, which is slightly
812 * different from the "eth_stats" defined by the chip and used in
813 * VF communications. We sort it out here.
815 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
817 struct i40e_pf *pf = vsi->back;
818 struct rtnl_link_stats64 *ons;
819 struct rtnl_link_stats64 *ns; /* netdev stats */
820 struct i40e_eth_stats *oes;
821 struct i40e_eth_stats *es; /* device's eth stats */
822 u32 tx_restart, tx_busy;
833 if (test_bit(__I40E_DOWN, &vsi->state) ||
834 test_bit(__I40E_CONFIG_BUSY, &pf->state))
837 ns = i40e_get_vsi_stats_struct(vsi);
838 ons = &vsi->net_stats_offsets;
839 es = &vsi->eth_stats;
840 oes = &vsi->eth_stats_offsets;
842 /* Gather up the netdev and vsi stats that the driver collects
843 * on the fly during packet processing
847 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
851 for (q = 0; q < vsi->num_queue_pairs; q++) {
853 p = ACCESS_ONCE(vsi->tx_rings[q]);
856 start = u64_stats_fetch_begin_irq(&p->syncp);
857 packets = p->stats.packets;
858 bytes = p->stats.bytes;
859 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
862 tx_restart += p->tx_stats.restart_queue;
863 tx_busy += p->tx_stats.tx_busy;
864 tx_linearize += p->tx_stats.tx_linearize;
865 tx_force_wb += p->tx_stats.tx_force_wb;
867 /* Rx queue is part of the same block as Tx queue */
870 start = u64_stats_fetch_begin_irq(&p->syncp);
871 packets = p->stats.packets;
872 bytes = p->stats.bytes;
873 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
876 rx_buf += p->rx_stats.alloc_buff_failed;
877 rx_page += p->rx_stats.alloc_page_failed;
880 vsi->tx_restart = tx_restart;
881 vsi->tx_busy = tx_busy;
882 vsi->tx_linearize = tx_linearize;
883 vsi->tx_force_wb = tx_force_wb;
884 vsi->rx_page_failed = rx_page;
885 vsi->rx_buf_failed = rx_buf;
887 ns->rx_packets = rx_p;
889 ns->tx_packets = tx_p;
892 /* update netdev stats from eth stats */
893 i40e_update_eth_stats(vsi);
894 ons->tx_errors = oes->tx_errors;
895 ns->tx_errors = es->tx_errors;
896 ons->multicast = oes->rx_multicast;
897 ns->multicast = es->rx_multicast;
898 ons->rx_dropped = oes->rx_discards;
899 ns->rx_dropped = es->rx_discards;
900 ons->tx_dropped = oes->tx_discards;
901 ns->tx_dropped = es->tx_discards;
903 /* pull in a couple PF stats if this is the main vsi */
904 if (vsi == pf->vsi[pf->lan_vsi]) {
905 ns->rx_crc_errors = pf->stats.crc_errors;
906 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
907 ns->rx_length_errors = pf->stats.rx_length_errors;
912 * i40e_update_pf_stats - Update the PF statistics counters.
913 * @pf: the PF to be updated
915 static void i40e_update_pf_stats(struct i40e_pf *pf)
917 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
918 struct i40e_hw_port_stats *nsd = &pf->stats;
919 struct i40e_hw *hw = &pf->hw;
923 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
924 I40E_GLPRT_GORCL(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
927 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
928 I40E_GLPRT_GOTCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
931 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.rx_discards,
934 &nsd->eth.rx_discards);
935 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
936 I40E_GLPRT_UPRCL(hw->port),
937 pf->stat_offsets_loaded,
938 &osd->eth.rx_unicast,
939 &nsd->eth.rx_unicast);
940 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
941 I40E_GLPRT_MPRCL(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->eth.rx_multicast,
944 &nsd->eth.rx_multicast);
945 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
946 I40E_GLPRT_BPRCL(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->eth.rx_broadcast,
949 &nsd->eth.rx_broadcast);
950 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
951 I40E_GLPRT_UPTCL(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->eth.tx_unicast,
954 &nsd->eth.tx_unicast);
955 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
956 I40E_GLPRT_MPTCL(hw->port),
957 pf->stat_offsets_loaded,
958 &osd->eth.tx_multicast,
959 &nsd->eth.tx_multicast);
960 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
961 I40E_GLPRT_BPTCL(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->eth.tx_broadcast,
964 &nsd->eth.tx_broadcast);
966 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->tx_dropped_link_down,
969 &nsd->tx_dropped_link_down);
971 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->crc_errors, &nsd->crc_errors);
975 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->illegal_bytes, &nsd->illegal_bytes);
979 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->mac_local_faults,
982 &nsd->mac_local_faults);
983 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->mac_remote_faults,
986 &nsd->mac_remote_faults);
988 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->rx_length_errors,
991 &nsd->rx_length_errors);
993 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
994 pf->stat_offsets_loaded,
995 &osd->link_xon_rx, &nsd->link_xon_rx);
996 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
997 pf->stat_offsets_loaded,
998 &osd->link_xon_tx, &nsd->link_xon_tx);
999 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1002 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1006 for (i = 0; i < 8; i++) {
1007 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1008 pf->stat_offsets_loaded,
1009 &osd->priority_xoff_rx[i],
1010 &nsd->priority_xoff_rx[i]);
1011 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xon_rx[i],
1014 &nsd->priority_xon_rx[i]);
1015 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1016 pf->stat_offsets_loaded,
1017 &osd->priority_xon_tx[i],
1018 &nsd->priority_xon_tx[i]);
1019 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1020 pf->stat_offsets_loaded,
1021 &osd->priority_xoff_tx[i],
1022 &nsd->priority_xoff_tx[i]);
1023 i40e_stat_update32(hw,
1024 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1025 pf->stat_offsets_loaded,
1026 &osd->priority_xon_2_xoff[i],
1027 &nsd->priority_xon_2_xoff[i]);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1031 I40E_GLPRT_PRC64L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_64, &nsd->rx_size_64);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1035 I40E_GLPRT_PRC127L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_127, &nsd->rx_size_127);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1039 I40E_GLPRT_PRC255L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_255, &nsd->rx_size_255);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1043 I40E_GLPRT_PRC511L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_511, &nsd->rx_size_511);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1047 I40E_GLPRT_PRC1023L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_1023, &nsd->rx_size_1023);
1050 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1051 I40E_GLPRT_PRC1522L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->rx_size_1522, &nsd->rx_size_1522);
1054 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1055 I40E_GLPRT_PRC9522L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_size_big, &nsd->rx_size_big);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1060 I40E_GLPRT_PTC64L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_64, &nsd->tx_size_64);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1064 I40E_GLPRT_PTC127L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_127, &nsd->tx_size_127);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1068 I40E_GLPRT_PTC255L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_255, &nsd->tx_size_255);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1072 I40E_GLPRT_PTC511L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_511, &nsd->tx_size_511);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1076 I40E_GLPRT_PTC1023L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_1023, &nsd->tx_size_1023);
1079 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1080 I40E_GLPRT_PTC1522L(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->tx_size_1522, &nsd->tx_size_1522);
1083 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1084 I40E_GLPRT_PTC9522L(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->tx_size_big, &nsd->tx_size_big);
1088 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->rx_undersize, &nsd->rx_undersize);
1091 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_fragments, &nsd->rx_fragments);
1094 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_oversize, &nsd->rx_oversize);
1097 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_jabber, &nsd->rx_jabber);
1102 i40e_stat_update32(hw,
1103 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1104 pf->stat_offsets_loaded,
1105 &osd->fd_atr_match, &nsd->fd_atr_match);
1106 i40e_stat_update32(hw,
1107 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1108 pf->stat_offsets_loaded,
1109 &osd->fd_sb_match, &nsd->fd_sb_match);
1110 i40e_stat_update32(hw,
1111 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1112 pf->stat_offsets_loaded,
1113 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1115 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1116 nsd->tx_lpi_status =
1117 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1118 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1119 nsd->rx_lpi_status =
1120 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1121 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1122 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1123 pf->stat_offsets_loaded,
1124 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1125 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1126 pf->stat_offsets_loaded,
1127 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1129 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1130 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1131 nsd->fd_sb_status = true;
1133 nsd->fd_sb_status = false;
1135 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1136 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1137 nsd->fd_atr_status = true;
1139 nsd->fd_atr_status = false;
1141 pf->stat_offsets_loaded = true;
1145 * i40e_update_stats - Update the various statistics counters.
1146 * @vsi: the VSI to be updated
1148 * Update the various stats for this VSI and its related entities.
1150 void i40e_update_stats(struct i40e_vsi *vsi)
1152 struct i40e_pf *pf = vsi->back;
1154 if (vsi == pf->vsi[pf->lan_vsi])
1155 i40e_update_pf_stats(pf);
1157 i40e_update_vsi_stats(vsi);
1159 i40e_update_fcoe_stats(vsi);
1164 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address
1168 * @is_vf: make sure its a VF filter, else doesn't matter
1169 * @is_netdev: make sure its a netdev filter, else doesn't matter
1171 * Returns ptr to the filter object or NULL
1173 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1174 u8 *macaddr, s16 vlan,
1175 bool is_vf, bool is_netdev)
1177 struct i40e_mac_filter *f;
1179 if (!vsi || !macaddr)
1182 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1183 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1184 (vlan == f->vlan) &&
1185 (!is_vf || f->is_vf) &&
1186 (!is_netdev || f->is_netdev))
1193 * i40e_find_mac - Find a mac addr in the macvlan filters list
1194 * @vsi: the VSI to be searched
1195 * @macaddr: the MAC address we are searching for
1196 * @is_vf: make sure its a VF filter, else doesn't matter
1197 * @is_netdev: make sure its a netdev filter, else doesn't matter
1199 * Returns the first filter with the provided MAC address or NULL if
1200 * MAC address was not found
1202 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1203 bool is_vf, bool is_netdev)
1205 struct i40e_mac_filter *f;
1207 if (!vsi || !macaddr)
1210 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1211 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1212 (!is_vf || f->is_vf) &&
1213 (!is_netdev || f->is_netdev))
1220 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1221 * @vsi: the VSI to be searched
1223 * Returns true if VSI is in vlan mode or false otherwise
1225 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1227 struct i40e_mac_filter *f;
1229 /* Only -1 for all the filters denotes not in vlan mode
1230 * so we have to go through all the list in order to make sure
1232 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1233 if (f->vlan >= 0 || vsi->info.pvid)
1241 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1242 * @vsi: the VSI to be searched
1243 * @macaddr: the mac address to be filtered
1244 * @is_vf: true if it is a VF
1245 * @is_netdev: true if it is a netdev
1247 * Goes through all the macvlan filters and adds a
1248 * macvlan filter for each unique vlan that already exists
1250 * Returns first filter found on success, else NULL
1252 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1253 bool is_vf, bool is_netdev)
1255 struct i40e_mac_filter *f;
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1259 f->vlan = le16_to_cpu(vsi->info.pvid);
1260 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1261 is_vf, is_netdev)) {
1262 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1268 return list_first_entry_or_null(&vsi->mac_filter_list,
1269 struct i40e_mac_filter, list);
1273 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1274 * @vsi: the VSI to be searched
1275 * @macaddr: the mac address to be removed
1276 * @is_vf: true if it is a VF
1277 * @is_netdev: true if it is a netdev
1279 * Removes a given MAC address from a VSI, regardless of VLAN
1281 * Returns 0 for success, or error
1283 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1284 bool is_vf, bool is_netdev)
1286 struct i40e_mac_filter *f = NULL;
1289 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1290 "Missing mac_filter_list_lock\n");
1291 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1292 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1293 (is_vf == f->is_vf) &&
1294 (is_netdev == f->is_netdev)) {
1301 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1302 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1309 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1310 * @vsi: the PF Main VSI - inappropriate for any other VSI
1311 * @macaddr: the MAC address
1313 * Some older firmware configurations set up a default promiscuous VLAN
1314 * filter that needs to be removed.
1316 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1318 struct i40e_aqc_remove_macvlan_element_data element;
1319 struct i40e_pf *pf = vsi->back;
1322 /* Only appropriate for the PF main VSI */
1323 if (vsi->type != I40E_VSI_MAIN)
1326 memset(&element, 0, sizeof(element));
1327 ether_addr_copy(element.mac_addr, macaddr);
1328 element.vlan_tag = 0;
1329 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1330 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1331 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1339 * i40e_add_filter - Add a mac/vlan filter to the VSI
1340 * @vsi: the VSI to be searched
1341 * @macaddr: the MAC address
1343 * @is_vf: make sure its a VF filter, else doesn't matter
1344 * @is_netdev: make sure its a netdev filter, else doesn't matter
1346 * Returns ptr to the filter object or NULL when no memory available.
1348 * NOTE: This function is expected to be called with mac_filter_list_lock
1351 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1352 u8 *macaddr, s16 vlan,
1353 bool is_vf, bool is_netdev)
1355 struct i40e_mac_filter *f;
1357 if (!vsi || !macaddr)
1360 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1362 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1364 goto add_filter_out;
1366 ether_addr_copy(f->macaddr, macaddr);
1370 INIT_LIST_HEAD(&f->list);
1371 list_add(&f->list, &vsi->mac_filter_list);
1374 /* increment counter and add a new flag if needed */
1380 } else if (is_netdev) {
1381 if (!f->is_netdev) {
1382 f->is_netdev = true;
1389 /* changed tells sync_filters_subtask to
1390 * push the filter down to the firmware
1393 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1394 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1402 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1403 * @vsi: the VSI to be searched
1404 * @macaddr: the MAC address
1406 * @is_vf: make sure it's a VF filter, else doesn't matter
1407 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1409 * NOTE: This function is expected to be called with mac_filter_list_lock
1412 void i40e_del_filter(struct i40e_vsi *vsi,
1413 u8 *macaddr, s16 vlan,
1414 bool is_vf, bool is_netdev)
1416 struct i40e_mac_filter *f;
1418 if (!vsi || !macaddr)
1421 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1422 if (!f || f->counter == 0)
1430 } else if (is_netdev) {
1432 f->is_netdev = false;
1436 /* make sure we don't remove a filter in use by VF or netdev */
1439 min_f += (f->is_vf ? 1 : 0);
1440 min_f += (f->is_netdev ? 1 : 0);
1442 if (f->counter > min_f)
1446 /* counter == 0 tells sync_filters_subtask to
1447 * remove the filter from the firmware's list
1449 if (f->counter == 0) {
1451 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1452 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1457 * i40e_set_mac - NDO callback to set mac address
1458 * @netdev: network interface device structure
1459 * @p: pointer to an address structure
1461 * Returns 0 on success, negative on failure
1464 int i40e_set_mac(struct net_device *netdev, void *p)
1466 static int i40e_set_mac(struct net_device *netdev, void *p)
1469 struct i40e_netdev_priv *np = netdev_priv(netdev);
1470 struct i40e_vsi *vsi = np->vsi;
1471 struct i40e_pf *pf = vsi->back;
1472 struct i40e_hw *hw = &pf->hw;
1473 struct sockaddr *addr = p;
1474 struct i40e_mac_filter *f;
1476 if (!is_valid_ether_addr(addr->sa_data))
1477 return -EADDRNOTAVAIL;
1479 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1480 netdev_info(netdev, "already using mac address %pM\n",
1485 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1486 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1487 return -EADDRNOTAVAIL;
1489 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1490 netdev_info(netdev, "returning to hw mac address %pM\n",
1493 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1495 if (vsi->type == I40E_VSI_MAIN) {
1498 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1499 I40E_AQC_WRITE_TYPE_LAA_WOL,
1500 addr->sa_data, NULL);
1503 "Addr change for Main VSI failed: %d\n",
1505 return -EADDRNOTAVAIL;
1509 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1510 struct i40e_aqc_remove_macvlan_element_data element;
1512 memset(&element, 0, sizeof(element));
1513 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1514 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1515 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1517 spin_lock_bh(&vsi->mac_filter_list_lock);
1518 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1520 spin_unlock_bh(&vsi->mac_filter_list_lock);
1523 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1524 struct i40e_aqc_add_macvlan_element_data element;
1526 memset(&element, 0, sizeof(element));
1527 ether_addr_copy(element.mac_addr, hw->mac.addr);
1528 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1529 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1531 spin_lock_bh(&vsi->mac_filter_list_lock);
1532 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1536 spin_unlock_bh(&vsi->mac_filter_list_lock);
1539 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1541 return i40e_sync_vsi_filters(vsi);
1545 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1546 * @vsi: the VSI being setup
1547 * @ctxt: VSI context structure
1548 * @enabled_tc: Enabled TCs bitmap
1549 * @is_add: True if called before Add VSI
1551 * Setup VSI queue mapping for enabled traffic classes.
1554 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1555 struct i40e_vsi_context *ctxt,
1559 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1560 struct i40e_vsi_context *ctxt,
1565 struct i40e_pf *pf = vsi->back;
1575 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1578 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1579 /* Find numtc from enabled TC bitmap */
1580 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1581 if (enabled_tc & BIT(i)) /* TC is enabled */
1585 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1589 /* At least TC0 is enabled in case of non-DCB case */
1593 vsi->tc_config.numtc = numtc;
1594 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1595 /* Number of queues per enabled TC */
1596 /* In MFP case we can have a much lower count of MSIx
1597 * vectors available and so we need to lower the used
1600 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1601 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1603 qcount = vsi->alloc_queue_pairs;
1604 num_tc_qps = qcount / numtc;
1605 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1607 /* Setup queue offset/count for all TCs for given VSI */
1608 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1609 /* See if the given TC is enabled for the given VSI */
1610 if (vsi->tc_config.enabled_tc & BIT(i)) {
1614 switch (vsi->type) {
1616 qcount = min_t(int, pf->alloc_rss_size,
1621 qcount = num_tc_qps;
1625 case I40E_VSI_SRIOV:
1626 case I40E_VSI_VMDQ2:
1628 qcount = num_tc_qps;
1632 vsi->tc_config.tc_info[i].qoffset = offset;
1633 vsi->tc_config.tc_info[i].qcount = qcount;
1635 /* find the next higher power-of-2 of num queue pairs */
1638 while (num_qps && (BIT_ULL(pow) < qcount)) {
1643 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1645 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1646 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1650 /* TC is not enabled so set the offset to
1651 * default queue and allocate one queue
1654 vsi->tc_config.tc_info[i].qoffset = 0;
1655 vsi->tc_config.tc_info[i].qcount = 1;
1656 vsi->tc_config.tc_info[i].netdev_tc = 0;
1660 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1663 /* Set actual Tx/Rx queue pairs */
1664 vsi->num_queue_pairs = offset;
1665 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1666 if (vsi->req_queue_pairs > 0)
1667 vsi->num_queue_pairs = vsi->req_queue_pairs;
1668 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1669 vsi->num_queue_pairs = pf->num_lan_msix;
1672 /* Scheduler section valid can only be set for ADD VSI */
1674 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1676 ctxt->info.up_enable_bits = enabled_tc;
1678 if (vsi->type == I40E_VSI_SRIOV) {
1679 ctxt->info.mapping_flags |=
1680 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1681 for (i = 0; i < vsi->num_queue_pairs; i++)
1682 ctxt->info.queue_mapping[i] =
1683 cpu_to_le16(vsi->base_queue + i);
1685 ctxt->info.mapping_flags |=
1686 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1687 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1689 ctxt->info.valid_sections |= cpu_to_le16(sections);
1693 * i40e_set_rx_mode - NDO callback to set the netdev filters
1694 * @netdev: network interface device structure
1697 void i40e_set_rx_mode(struct net_device *netdev)
1699 static void i40e_set_rx_mode(struct net_device *netdev)
1702 struct i40e_netdev_priv *np = netdev_priv(netdev);
1703 struct i40e_mac_filter *f, *ftmp;
1704 struct i40e_vsi *vsi = np->vsi;
1705 struct netdev_hw_addr *uca;
1706 struct netdev_hw_addr *mca;
1707 struct netdev_hw_addr *ha;
1709 spin_lock_bh(&vsi->mac_filter_list_lock);
1711 /* add addr if not already in the filter list */
1712 netdev_for_each_uc_addr(uca, netdev) {
1713 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1714 if (i40e_is_vsi_in_vlan(vsi))
1715 i40e_put_mac_in_vlan(vsi, uca->addr,
1718 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1723 netdev_for_each_mc_addr(mca, netdev) {
1724 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1725 if (i40e_is_vsi_in_vlan(vsi))
1726 i40e_put_mac_in_vlan(vsi, mca->addr,
1729 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1734 /* remove filter if not in netdev list */
1735 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1740 netdev_for_each_mc_addr(mca, netdev)
1741 if (ether_addr_equal(mca->addr, f->macaddr))
1742 goto bottom_of_search_loop;
1744 netdev_for_each_uc_addr(uca, netdev)
1745 if (ether_addr_equal(uca->addr, f->macaddr))
1746 goto bottom_of_search_loop;
1748 for_each_dev_addr(netdev, ha)
1749 if (ether_addr_equal(ha->addr, f->macaddr))
1750 goto bottom_of_search_loop;
1752 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1753 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1755 bottom_of_search_loop:
1758 spin_unlock_bh(&vsi->mac_filter_list_lock);
1760 /* check for other flag changes */
1761 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1762 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1763 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1768 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1769 * @src: source MAC filter entry to be clones
1771 * Returns the pointer to newly cloned MAC filter entry or NULL
1774 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1775 struct i40e_mac_filter *src)
1777 struct i40e_mac_filter *f;
1779 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1784 INIT_LIST_HEAD(&f->list);
1790 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1791 * @vsi: pointer to vsi struct
1792 * @from: Pointer to list which contains MAC filter entries - changes to
1793 * those entries needs to be undone.
1795 * MAC filter entries from list were slated to be removed from device.
1797 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1798 struct list_head *from)
1800 struct i40e_mac_filter *f, *ftmp;
1802 list_for_each_entry_safe(f, ftmp, from, list) {
1804 /* Move the element back into MAC filter list*/
1805 list_move_tail(&f->list, &vsi->mac_filter_list);
1810 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1811 * @vsi: pointer to vsi struct
1813 * MAC filter entries from list were slated to be added from device.
1815 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1817 struct i40e_mac_filter *f, *ftmp;
1819 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1820 if (!f->changed && f->counter)
1826 * i40e_cleanup_add_list - Deletes the element from add list and release
1828 * @add_list: Pointer to list which contains MAC filter entries
1830 static void i40e_cleanup_add_list(struct list_head *add_list)
1832 struct i40e_mac_filter *f, *ftmp;
1834 list_for_each_entry_safe(f, ftmp, add_list, list) {
1841 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1842 * @vsi: ptr to the VSI
1844 * Push any outstanding VSI filter changes through the AdminQ.
1846 * Returns 0 or error value
1848 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1850 struct list_head tmp_del_list, tmp_add_list;
1851 struct i40e_mac_filter *f, *ftmp, *fclone;
1852 bool promisc_forced_on = false;
1853 bool add_happened = false;
1854 int filter_list_len = 0;
1855 u32 changed_flags = 0;
1856 i40e_status aq_ret = 0;
1857 bool err_cond = false;
1865 /* empty array typed pointers, kcalloc later */
1866 struct i40e_aqc_add_macvlan_element_data *add_list;
1867 struct i40e_aqc_remove_macvlan_element_data *del_list;
1869 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1870 usleep_range(1000, 2000);
1874 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1875 vsi->current_netdev_flags = vsi->netdev->flags;
1878 INIT_LIST_HEAD(&tmp_del_list);
1879 INIT_LIST_HEAD(&tmp_add_list);
1881 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1882 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1884 spin_lock_bh(&vsi->mac_filter_list_lock);
1885 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1889 if (f->counter != 0)
1893 /* Move the element into temporary del_list */
1894 list_move_tail(&f->list, &tmp_del_list);
1897 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1901 if (f->counter == 0)
1905 /* Clone MAC filter entry and add into temporary list */
1906 fclone = i40e_mac_filter_entry_clone(f);
1911 list_add_tail(&fclone->list, &tmp_add_list);
1914 /* if failed to clone MAC filter entry - undo */
1916 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1917 i40e_undo_add_filter_entries(vsi);
1919 spin_unlock_bh(&vsi->mac_filter_list_lock);
1922 i40e_cleanup_add_list(&tmp_add_list);
1928 /* Now process 'del_list' outside the lock */
1929 if (!list_empty(&tmp_del_list)) {
1932 filter_list_len = pf->hw.aq.asq_buf_size /
1933 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1934 del_list_size = filter_list_len *
1935 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1936 del_list = kzalloc(del_list_size, GFP_KERNEL);
1938 i40e_cleanup_add_list(&tmp_add_list);
1940 /* Undo VSI's MAC filter entry element updates */
1941 spin_lock_bh(&vsi->mac_filter_list_lock);
1942 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1943 i40e_undo_add_filter_entries(vsi);
1944 spin_unlock_bh(&vsi->mac_filter_list_lock);
1949 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1952 /* add to delete list */
1953 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1954 del_list[num_del].vlan_tag =
1955 cpu_to_le16((u16)(f->vlan ==
1956 I40E_VLAN_ANY ? 0 : f->vlan));
1958 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1959 del_list[num_del].flags = cmd_flags;
1962 /* flush a full buffer */
1963 if (num_del == filter_list_len) {
1964 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1969 aq_err = pf->hw.aq.asq_last_status;
1971 memset(del_list, 0, del_list_size);
1973 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1975 dev_err(&pf->pdev->dev,
1976 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1977 i40e_stat_str(&pf->hw, aq_ret),
1978 i40e_aq_str(&pf->hw, aq_err));
1981 /* Release memory for MAC filter entries which were
1982 * synced up with HW.
1989 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1992 aq_err = pf->hw.aq.asq_last_status;
1995 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1996 dev_info(&pf->pdev->dev,
1997 "ignoring delete macvlan error, err %s aq_err %s\n",
1998 i40e_stat_str(&pf->hw, aq_ret),
1999 i40e_aq_str(&pf->hw, aq_err));
2006 if (!list_empty(&tmp_add_list)) {
2009 /* do all the adds now */
2010 filter_list_len = pf->hw.aq.asq_buf_size /
2011 sizeof(struct i40e_aqc_add_macvlan_element_data),
2012 add_list_size = filter_list_len *
2013 sizeof(struct i40e_aqc_add_macvlan_element_data);
2014 add_list = kzalloc(add_list_size, GFP_KERNEL);
2016 /* Purge element from temporary lists */
2017 i40e_cleanup_add_list(&tmp_add_list);
2019 /* Undo add filter entries from VSI MAC filter list */
2020 spin_lock_bh(&vsi->mac_filter_list_lock);
2021 i40e_undo_add_filter_entries(vsi);
2022 spin_unlock_bh(&vsi->mac_filter_list_lock);
2027 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2029 add_happened = true;
2032 /* add to add array */
2033 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2034 add_list[num_add].vlan_tag =
2036 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2037 add_list[num_add].queue_number = 0;
2039 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2040 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2043 /* flush a full buffer */
2044 if (num_add == filter_list_len) {
2045 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2048 aq_err = pf->hw.aq.asq_last_status;
2053 memset(add_list, 0, add_list_size);
2055 /* Entries from tmp_add_list were cloned from MAC
2056 * filter list, hence clean those cloned entries
2063 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2064 add_list, num_add, NULL);
2065 aq_err = pf->hw.aq.asq_last_status;
2071 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2072 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2073 dev_info(&pf->pdev->dev,
2074 "add filter failed, err %s aq_err %s\n",
2075 i40e_stat_str(&pf->hw, aq_ret),
2076 i40e_aq_str(&pf->hw, aq_err));
2077 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2078 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2080 promisc_forced_on = true;
2081 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2083 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2088 /* check for changes in promiscuous modes */
2089 if (changed_flags & IFF_ALLMULTI) {
2090 bool cur_multipromisc;
2092 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2093 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2098 retval = i40e_aq_rc_to_posix(aq_ret,
2099 pf->hw.aq.asq_last_status);
2100 dev_info(&pf->pdev->dev,
2101 "set multi promisc failed, err %s aq_err %s\n",
2102 i40e_stat_str(&pf->hw, aq_ret),
2103 i40e_aq_str(&pf->hw,
2104 pf->hw.aq.asq_last_status));
2107 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2110 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2111 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2113 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2114 /* set defport ON for Main VSI instead of true promisc
2115 * this way we will get all unicast/multicast and VLAN
2116 * promisc behavior but will not get VF or VMDq traffic
2117 * replicated on the Main VSI.
2119 if (pf->cur_promisc != cur_promisc) {
2120 pf->cur_promisc = cur_promisc;
2121 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2124 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2130 i40e_aq_rc_to_posix(aq_ret,
2131 pf->hw.aq.asq_last_status);
2132 dev_info(&pf->pdev->dev,
2133 "set unicast promisc failed, err %d, aq_err %d\n",
2134 aq_ret, pf->hw.aq.asq_last_status);
2136 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2142 i40e_aq_rc_to_posix(aq_ret,
2143 pf->hw.aq.asq_last_status);
2144 dev_info(&pf->pdev->dev,
2145 "set multicast promisc failed, err %d, aq_err %d\n",
2146 aq_ret, pf->hw.aq.asq_last_status);
2149 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2153 retval = i40e_aq_rc_to_posix(aq_ret,
2154 pf->hw.aq.asq_last_status);
2155 dev_info(&pf->pdev->dev,
2156 "set brdcast promisc failed, err %s, aq_err %s\n",
2157 i40e_stat_str(&pf->hw, aq_ret),
2158 i40e_aq_str(&pf->hw,
2159 pf->hw.aq.asq_last_status));
2163 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2168 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2169 * @pf: board private structure
2171 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2175 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2177 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2179 for (v = 0; v < pf->num_alloc_vsi; v++) {
2181 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2182 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2185 /* come back and try again later */
2186 pf->flags |= I40E_FLAG_FILTER_SYNC;
2194 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2195 * @netdev: network interface device structure
2196 * @new_mtu: new value for maximum frame size
2198 * Returns 0 on success, negative on failure
2200 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2202 struct i40e_netdev_priv *np = netdev_priv(netdev);
2203 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2204 struct i40e_vsi *vsi = np->vsi;
2206 /* MTU < 68 is an error and causes problems on some kernels */
2207 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2210 netdev_info(netdev, "changing MTU from %d to %d\n",
2211 netdev->mtu, new_mtu);
2212 netdev->mtu = new_mtu;
2213 if (netif_running(netdev))
2214 i40e_vsi_reinit_locked(vsi);
2215 i40e_notify_client_of_l2_param_changes(vsi);
2220 * i40e_ioctl - Access the hwtstamp interface
2221 * @netdev: network interface device structure
2222 * @ifr: interface request data
2223 * @cmd: ioctl command
2225 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2227 struct i40e_netdev_priv *np = netdev_priv(netdev);
2228 struct i40e_pf *pf = np->vsi->back;
2232 return i40e_ptp_get_ts_config(pf, ifr);
2234 return i40e_ptp_set_ts_config(pf, ifr);
2241 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2242 * @vsi: the vsi being adjusted
2244 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2246 struct i40e_vsi_context ctxt;
2249 if ((vsi->info.valid_sections &
2250 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2251 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2252 return; /* already enabled */
2254 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2255 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2256 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2258 ctxt.seid = vsi->seid;
2259 ctxt.info = vsi->info;
2260 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2262 dev_info(&vsi->back->pdev->dev,
2263 "update vlan stripping failed, err %s aq_err %s\n",
2264 i40e_stat_str(&vsi->back->hw, ret),
2265 i40e_aq_str(&vsi->back->hw,
2266 vsi->back->hw.aq.asq_last_status));
2271 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2272 * @vsi: the vsi being adjusted
2274 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2276 struct i40e_vsi_context ctxt;
2279 if ((vsi->info.valid_sections &
2280 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2281 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2282 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2283 return; /* already disabled */
2285 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2286 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2287 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2289 ctxt.seid = vsi->seid;
2290 ctxt.info = vsi->info;
2291 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2293 dev_info(&vsi->back->pdev->dev,
2294 "update vlan stripping failed, err %s aq_err %s\n",
2295 i40e_stat_str(&vsi->back->hw, ret),
2296 i40e_aq_str(&vsi->back->hw,
2297 vsi->back->hw.aq.asq_last_status));
2302 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2303 * @netdev: network interface to be adjusted
2304 * @features: netdev features to test if VLAN offload is enabled or not
2306 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2308 struct i40e_netdev_priv *np = netdev_priv(netdev);
2309 struct i40e_vsi *vsi = np->vsi;
2311 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2312 i40e_vlan_stripping_enable(vsi);
2314 i40e_vlan_stripping_disable(vsi);
2318 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2319 * @vsi: the vsi being configured
2320 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2322 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2324 struct i40e_mac_filter *f, *add_f;
2325 bool is_netdev, is_vf;
2327 is_vf = (vsi->type == I40E_VSI_SRIOV);
2328 is_netdev = !!(vsi->netdev);
2330 /* Locked once because all functions invoked below iterates list*/
2331 spin_lock_bh(&vsi->mac_filter_list_lock);
2334 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2337 dev_info(&vsi->back->pdev->dev,
2338 "Could not add vlan filter %d for %pM\n",
2339 vid, vsi->netdev->dev_addr);
2340 spin_unlock_bh(&vsi->mac_filter_list_lock);
2345 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2346 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2348 dev_info(&vsi->back->pdev->dev,
2349 "Could not add vlan filter %d for %pM\n",
2351 spin_unlock_bh(&vsi->mac_filter_list_lock);
2356 /* Now if we add a vlan tag, make sure to check if it is the first
2357 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2358 * with 0, so we now accept untagged and specified tagged traffic
2359 * (and not any taged and untagged)
2362 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2364 is_vf, is_netdev)) {
2365 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2366 I40E_VLAN_ANY, is_vf, is_netdev);
2367 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2370 dev_info(&vsi->back->pdev->dev,
2371 "Could not add filter 0 for %pM\n",
2372 vsi->netdev->dev_addr);
2373 spin_unlock_bh(&vsi->mac_filter_list_lock);
2379 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2380 if (vid > 0 && !vsi->info.pvid) {
2381 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2382 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2385 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2387 add_f = i40e_add_filter(vsi, f->macaddr,
2388 0, is_vf, is_netdev);
2390 dev_info(&vsi->back->pdev->dev,
2391 "Could not add filter 0 for %pM\n",
2393 spin_unlock_bh(&vsi->mac_filter_list_lock);
2399 spin_unlock_bh(&vsi->mac_filter_list_lock);
2401 /* schedule our worker thread which will take care of
2402 * applying the new filter changes
2404 i40e_service_event_schedule(vsi->back);
2409 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2410 * @vsi: the vsi being configured
2411 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2413 * Return: 0 on success or negative otherwise
2415 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2417 struct net_device *netdev = vsi->netdev;
2418 struct i40e_mac_filter *f, *add_f;
2419 bool is_vf, is_netdev;
2420 int filter_count = 0;
2422 is_vf = (vsi->type == I40E_VSI_SRIOV);
2423 is_netdev = !!(netdev);
2425 /* Locked once because all functions invoked below iterates list */
2426 spin_lock_bh(&vsi->mac_filter_list_lock);
2429 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2431 list_for_each_entry(f, &vsi->mac_filter_list, list)
2432 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2434 /* go through all the filters for this VSI and if there is only
2435 * vid == 0 it means there are no other filters, so vid 0 must
2436 * be replaced with -1. This signifies that we should from now
2437 * on accept any traffic (with any tag present, or untagged)
2439 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2442 ether_addr_equal(netdev->dev_addr, f->macaddr))
2450 if (!filter_count && is_netdev) {
2451 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2452 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2455 dev_info(&vsi->back->pdev->dev,
2456 "Could not add filter %d for %pM\n",
2457 I40E_VLAN_ANY, netdev->dev_addr);
2458 spin_unlock_bh(&vsi->mac_filter_list_lock);
2463 if (!filter_count) {
2464 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2465 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2466 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2469 dev_info(&vsi->back->pdev->dev,
2470 "Could not add filter %d for %pM\n",
2471 I40E_VLAN_ANY, f->macaddr);
2472 spin_unlock_bh(&vsi->mac_filter_list_lock);
2478 spin_unlock_bh(&vsi->mac_filter_list_lock);
2480 /* schedule our worker thread which will take care of
2481 * applying the new filter changes
2483 i40e_service_event_schedule(vsi->back);
2488 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2489 * @netdev: network interface to be adjusted
2490 * @vid: vlan id to be added
2492 * net_device_ops implementation for adding vlan ids
2495 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2496 __always_unused __be16 proto, u16 vid)
2498 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2499 __always_unused __be16 proto, u16 vid)
2502 struct i40e_netdev_priv *np = netdev_priv(netdev);
2503 struct i40e_vsi *vsi = np->vsi;
2509 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2511 /* If the network stack called us with vid = 0 then
2512 * it is asking to receive priority tagged packets with
2513 * vlan id 0. Our HW receives them by default when configured
2514 * to receive untagged packets so there is no need to add an
2515 * extra filter for vlan 0 tagged packets.
2518 ret = i40e_vsi_add_vlan(vsi, vid);
2520 if (!ret && (vid < VLAN_N_VID))
2521 set_bit(vid, vsi->active_vlans);
2527 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2528 * @netdev: network interface to be adjusted
2529 * @vid: vlan id to be removed
2531 * net_device_ops implementation for removing vlan ids
2534 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2535 __always_unused __be16 proto, u16 vid)
2537 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2538 __always_unused __be16 proto, u16 vid)
2541 struct i40e_netdev_priv *np = netdev_priv(netdev);
2542 struct i40e_vsi *vsi = np->vsi;
2544 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2546 /* return code is ignored as there is nothing a user
2547 * can do about failure to remove and a log message was
2548 * already printed from the other function
2550 i40e_vsi_kill_vlan(vsi, vid);
2552 clear_bit(vid, vsi->active_vlans);
2558 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2559 * @vsi: the vsi being brought back up
2561 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2568 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2570 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2571 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2576 * i40e_vsi_add_pvid - Add pvid for the VSI
2577 * @vsi: the vsi being adjusted
2578 * @vid: the vlan id to set as a PVID
2580 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2582 struct i40e_vsi_context ctxt;
2585 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2586 vsi->info.pvid = cpu_to_le16(vid);
2587 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2588 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2589 I40E_AQ_VSI_PVLAN_EMOD_STR;
2591 ctxt.seid = vsi->seid;
2592 ctxt.info = vsi->info;
2593 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2595 dev_info(&vsi->back->pdev->dev,
2596 "add pvid failed, err %s aq_err %s\n",
2597 i40e_stat_str(&vsi->back->hw, ret),
2598 i40e_aq_str(&vsi->back->hw,
2599 vsi->back->hw.aq.asq_last_status));
2607 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2608 * @vsi: the vsi being adjusted
2610 * Just use the vlan_rx_register() service to put it back to normal
2612 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2614 i40e_vlan_stripping_disable(vsi);
2620 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2621 * @vsi: ptr to the VSI
2623 * If this function returns with an error, then it's possible one or
2624 * more of the rings is populated (while the rest are not). It is the
2625 * callers duty to clean those orphaned rings.
2627 * Return 0 on success, negative on failure
2629 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2633 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2634 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2640 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2641 * @vsi: ptr to the VSI
2643 * Free VSI's transmit software resources
2645 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2652 for (i = 0; i < vsi->num_queue_pairs; i++)
2653 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2654 i40e_free_tx_resources(vsi->tx_rings[i]);
2658 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2659 * @vsi: ptr to the VSI
2661 * If this function returns with an error, then it's possible one or
2662 * more of the rings is populated (while the rest are not). It is the
2663 * callers duty to clean those orphaned rings.
2665 * Return 0 on success, negative on failure
2667 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2671 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2672 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2674 i40e_fcoe_setup_ddp_resources(vsi);
2680 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2681 * @vsi: ptr to the VSI
2683 * Free all receive software resources
2685 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2692 for (i = 0; i < vsi->num_queue_pairs; i++)
2693 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2694 i40e_free_rx_resources(vsi->rx_rings[i]);
2696 i40e_fcoe_free_ddp_resources(vsi);
2701 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2702 * @ring: The Tx ring to configure
2704 * This enables/disables XPS for a given Tx descriptor ring
2705 * based on the TCs enabled for the VSI that ring belongs to.
2707 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2709 struct i40e_vsi *vsi = ring->vsi;
2712 if (!ring->q_vector || !ring->netdev)
2715 /* Single TC mode enable XPS */
2716 if (vsi->tc_config.numtc <= 1) {
2717 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2718 netif_set_xps_queue(ring->netdev,
2719 &ring->q_vector->affinity_mask,
2721 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2722 /* Disable XPS to allow selection based on TC */
2723 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2724 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2725 free_cpumask_var(mask);
2728 /* schedule our worker thread which will take care of
2729 * applying the new filter changes
2731 i40e_service_event_schedule(vsi->back);
2735 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2736 * @ring: The Tx ring to configure
2738 * Configure the Tx descriptor ring in the HMC context.
2740 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2742 struct i40e_vsi *vsi = ring->vsi;
2743 u16 pf_q = vsi->base_queue + ring->queue_index;
2744 struct i40e_hw *hw = &vsi->back->hw;
2745 struct i40e_hmc_obj_txq tx_ctx;
2746 i40e_status err = 0;
2749 /* some ATR related tx ring init */
2750 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2751 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2752 ring->atr_count = 0;
2754 ring->atr_sample_rate = 0;
2758 i40e_config_xps_tx_ring(ring);
2760 /* clear the context structure first */
2761 memset(&tx_ctx, 0, sizeof(tx_ctx));
2763 tx_ctx.new_context = 1;
2764 tx_ctx.base = (ring->dma / 128);
2765 tx_ctx.qlen = ring->count;
2766 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2767 I40E_FLAG_FD_ATR_ENABLED));
2769 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2771 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2772 /* FDIR VSI tx ring can still use RS bit and writebacks */
2773 if (vsi->type != I40E_VSI_FDIR)
2774 tx_ctx.head_wb_ena = 1;
2775 tx_ctx.head_wb_addr = ring->dma +
2776 (ring->count * sizeof(struct i40e_tx_desc));
2778 /* As part of VSI creation/update, FW allocates certain
2779 * Tx arbitration queue sets for each TC enabled for
2780 * the VSI. The FW returns the handles to these queue
2781 * sets as part of the response buffer to Add VSI,
2782 * Update VSI, etc. AQ commands. It is expected that
2783 * these queue set handles be associated with the Tx
2784 * queues by the driver as part of the TX queue context
2785 * initialization. This has to be done regardless of
2786 * DCB as by default everything is mapped to TC0.
2788 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2789 tx_ctx.rdylist_act = 0;
2791 /* clear the context in the HMC */
2792 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2794 dev_info(&vsi->back->pdev->dev,
2795 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2796 ring->queue_index, pf_q, err);
2800 /* set the context in the HMC */
2801 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2803 dev_info(&vsi->back->pdev->dev,
2804 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2805 ring->queue_index, pf_q, err);
2809 /* Now associate this queue with this PCI function */
2810 if (vsi->type == I40E_VSI_VMDQ2) {
2811 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2812 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2813 I40E_QTX_CTL_VFVM_INDX_MASK;
2815 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2818 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2819 I40E_QTX_CTL_PF_INDX_MASK);
2820 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2823 /* cache tail off for easier writes later */
2824 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2830 * i40e_configure_rx_ring - Configure a receive ring context
2831 * @ring: The Rx ring to configure
2833 * Configure the Rx descriptor ring in the HMC context.
2835 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2837 struct i40e_vsi *vsi = ring->vsi;
2838 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2839 u16 pf_q = vsi->base_queue + ring->queue_index;
2840 struct i40e_hw *hw = &vsi->back->hw;
2841 struct i40e_hmc_obj_rxq rx_ctx;
2842 i40e_status err = 0;
2846 /* clear the context structure first */
2847 memset(&rx_ctx, 0, sizeof(rx_ctx));
2849 ring->rx_buf_len = vsi->rx_buf_len;
2850 ring->rx_hdr_len = vsi->rx_hdr_len;
2852 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2853 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2855 rx_ctx.base = (ring->dma / 128);
2856 rx_ctx.qlen = ring->count;
2858 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2859 set_ring_16byte_desc_enabled(ring);
2865 rx_ctx.dtype = vsi->dtype;
2867 set_ring_ps_enabled(ring);
2868 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2870 I40E_RX_SPLIT_TCP_UDP |
2873 rx_ctx.hsplit_0 = 0;
2876 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2877 (chain_len * ring->rx_buf_len));
2878 if (hw->revision_id == 0)
2879 rx_ctx.lrxqthresh = 0;
2881 rx_ctx.lrxqthresh = 2;
2882 rx_ctx.crcstrip = 1;
2884 /* this controls whether VLAN is stripped from inner headers */
2887 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2889 /* set the prefena field to 1 because the manual says to */
2892 /* clear the context in the HMC */
2893 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2895 dev_info(&vsi->back->pdev->dev,
2896 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2897 ring->queue_index, pf_q, err);
2901 /* set the context in the HMC */
2902 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2904 dev_info(&vsi->back->pdev->dev,
2905 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2906 ring->queue_index, pf_q, err);
2910 /* cache tail for quicker writes, and clear the reg before use */
2911 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2912 writel(0, ring->tail);
2914 if (ring_is_ps_enabled(ring)) {
2915 i40e_alloc_rx_headers(ring);
2916 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2918 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2925 * i40e_vsi_configure_tx - Configure the VSI for Tx
2926 * @vsi: VSI structure describing this set of rings and resources
2928 * Configure the Tx VSI for operation.
2930 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2935 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2936 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2942 * i40e_vsi_configure_rx - Configure the VSI for Rx
2943 * @vsi: the VSI being configured
2945 * Configure the Rx VSI for operation.
2947 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2952 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2953 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2954 + ETH_FCS_LEN + VLAN_HLEN;
2956 vsi->max_frame = I40E_RXBUFFER_2048;
2958 /* figure out correct receive buffer length */
2959 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2960 I40E_FLAG_RX_PS_ENABLED)) {
2961 case I40E_FLAG_RX_1BUF_ENABLED:
2962 vsi->rx_hdr_len = 0;
2963 vsi->rx_buf_len = vsi->max_frame;
2964 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2966 case I40E_FLAG_RX_PS_ENABLED:
2967 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2968 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2969 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2972 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2973 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2974 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2979 /* setup rx buffer for FCoE */
2980 if ((vsi->type == I40E_VSI_FCOE) &&
2981 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2982 vsi->rx_hdr_len = 0;
2983 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2984 vsi->max_frame = I40E_RXBUFFER_3072;
2985 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2988 #endif /* I40E_FCOE */
2989 /* round up for the chip's needs */
2990 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2991 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2992 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2993 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2995 /* set up individual rings */
2996 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2997 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3003 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3004 * @vsi: ptr to the VSI
3006 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3008 struct i40e_ring *tx_ring, *rx_ring;
3009 u16 qoffset, qcount;
3012 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3013 /* Reset the TC information */
3014 for (i = 0; i < vsi->num_queue_pairs; i++) {
3015 rx_ring = vsi->rx_rings[i];
3016 tx_ring = vsi->tx_rings[i];
3017 rx_ring->dcb_tc = 0;
3018 tx_ring->dcb_tc = 0;
3022 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3023 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3026 qoffset = vsi->tc_config.tc_info[n].qoffset;
3027 qcount = vsi->tc_config.tc_info[n].qcount;
3028 for (i = qoffset; i < (qoffset + qcount); i++) {
3029 rx_ring = vsi->rx_rings[i];
3030 tx_ring = vsi->tx_rings[i];
3031 rx_ring->dcb_tc = n;
3032 tx_ring->dcb_tc = n;
3038 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3039 * @vsi: ptr to the VSI
3041 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3044 i40e_set_rx_mode(vsi->netdev);
3048 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3049 * @vsi: Pointer to the targeted VSI
3051 * This function replays the hlist on the hw where all the SB Flow Director
3052 * filters were saved.
3054 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3056 struct i40e_fdir_filter *filter;
3057 struct i40e_pf *pf = vsi->back;
3058 struct hlist_node *node;
3060 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3063 hlist_for_each_entry_safe(filter, node,
3064 &pf->fdir_filter_list, fdir_node) {
3065 i40e_add_del_fdir(vsi, filter, true);
3070 * i40e_vsi_configure - Set up the VSI for action
3071 * @vsi: the VSI being configured
3073 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3077 i40e_set_vsi_rx_mode(vsi);
3078 i40e_restore_vlan(vsi);
3079 i40e_vsi_config_dcb_rings(vsi);
3080 err = i40e_vsi_configure_tx(vsi);
3082 err = i40e_vsi_configure_rx(vsi);
3088 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3089 * @vsi: the VSI being configured
3091 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3093 struct i40e_pf *pf = vsi->back;
3094 struct i40e_hw *hw = &pf->hw;
3099 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3100 * and PFINT_LNKLSTn registers, e.g.:
3101 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3103 qp = vsi->base_queue;
3104 vector = vsi->base_vector;
3105 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3106 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3108 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3109 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3110 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3111 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3113 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3114 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3115 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3117 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3118 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3120 /* Linked list for the queuepairs assigned to this vector */
3121 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3122 for (q = 0; q < q_vector->num_ringpairs; q++) {
3125 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3126 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3127 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3128 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3130 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3132 wr32(hw, I40E_QINT_RQCTL(qp), val);
3134 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3135 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3136 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3137 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3139 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3141 /* Terminate the linked list */
3142 if (q == (q_vector->num_ringpairs - 1))
3143 val |= (I40E_QUEUE_END_OF_LIST
3144 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3146 wr32(hw, I40E_QINT_TQCTL(qp), val);
3155 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3156 * @hw: ptr to the hardware info
3158 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3160 struct i40e_hw *hw = &pf->hw;
3163 /* clear things first */
3164 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3165 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3167 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3168 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3169 I40E_PFINT_ICR0_ENA_GRST_MASK |
3170 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3171 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3172 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3173 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3174 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3176 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3177 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3179 if (pf->flags & I40E_FLAG_PTP)
3180 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3182 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3184 /* SW_ITR_IDX = 0, but don't change INTENA */
3185 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3186 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3188 /* OTHER_ITR_IDX = 0 */
3189 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3193 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3194 * @vsi: the VSI being configured
3196 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3198 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3199 struct i40e_pf *pf = vsi->back;
3200 struct i40e_hw *hw = &pf->hw;
3203 /* set the ITR configuration */
3204 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3205 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3206 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3207 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3208 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3209 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3210 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3212 i40e_enable_misc_int_causes(pf);
3214 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3215 wr32(hw, I40E_PFINT_LNKLST0, 0);
3217 /* Associate the queue pair to the vector and enable the queue int */
3218 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3219 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3220 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3222 wr32(hw, I40E_QINT_RQCTL(0), val);
3224 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3225 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3226 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3228 wr32(hw, I40E_QINT_TQCTL(0), val);
3233 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3234 * @pf: board private structure
3236 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3238 struct i40e_hw *hw = &pf->hw;
3240 wr32(hw, I40E_PFINT_DYN_CTL0,
3241 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3246 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3247 * @pf: board private structure
3249 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3251 struct i40e_hw *hw = &pf->hw;
3254 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3255 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3256 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3258 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3263 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3264 * @vsi: pointer to a vsi
3265 * @vector: disable a particular Hw Interrupt vector
3267 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3269 struct i40e_pf *pf = vsi->back;
3270 struct i40e_hw *hw = &pf->hw;
3273 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3274 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3279 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3280 * @irq: interrupt number
3281 * @data: pointer to a q_vector
3283 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3285 struct i40e_q_vector *q_vector = data;
3287 if (!q_vector->tx.ring && !q_vector->rx.ring)
3290 napi_schedule_irqoff(&q_vector->napi);
3296 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3297 * @vsi: the VSI being configured
3298 * @basename: name for the vector
3300 * Allocates MSI-X vectors and requests interrupts from the kernel.
3302 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3304 int q_vectors = vsi->num_q_vectors;
3305 struct i40e_pf *pf = vsi->back;
3306 int base = vsi->base_vector;
3311 for (vector = 0; vector < q_vectors; vector++) {
3312 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3314 if (q_vector->tx.ring && q_vector->rx.ring) {
3315 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3316 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3318 } else if (q_vector->rx.ring) {
3319 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3320 "%s-%s-%d", basename, "rx", rx_int_idx++);
3321 } else if (q_vector->tx.ring) {
3322 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3323 "%s-%s-%d", basename, "tx", tx_int_idx++);
3325 /* skip this unused q_vector */
3328 err = request_irq(pf->msix_entries[base + vector].vector,
3334 dev_info(&pf->pdev->dev,
3335 "MSIX request_irq failed, error: %d\n", err);
3336 goto free_queue_irqs;
3338 /* assign the mask for this irq */
3339 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3340 &q_vector->affinity_mask);
3343 vsi->irqs_ready = true;
3349 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3351 free_irq(pf->msix_entries[base + vector].vector,
3352 &(vsi->q_vectors[vector]));
3358 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3359 * @vsi: the VSI being un-configured
3361 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3363 struct i40e_pf *pf = vsi->back;
3364 struct i40e_hw *hw = &pf->hw;
3365 int base = vsi->base_vector;
3368 for (i = 0; i < vsi->num_queue_pairs; i++) {
3369 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3370 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3373 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3374 for (i = vsi->base_vector;
3375 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3376 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3379 for (i = 0; i < vsi->num_q_vectors; i++)
3380 synchronize_irq(pf->msix_entries[i + base].vector);
3382 /* Legacy and MSI mode - this stops all interrupt handling */
3383 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3384 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3386 synchronize_irq(pf->pdev->irq);
3391 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3392 * @vsi: the VSI being configured
3394 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3396 struct i40e_pf *pf = vsi->back;
3399 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3400 for (i = 0; i < vsi->num_q_vectors; i++)
3401 i40e_irq_dynamic_enable(vsi, i);
3403 i40e_irq_dynamic_enable_icr0(pf);
3406 i40e_flush(&pf->hw);
3411 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3412 * @pf: board private structure
3414 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3417 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3418 i40e_flush(&pf->hw);
3422 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3423 * @irq: interrupt number
3424 * @data: pointer to a q_vector
3426 * This is the handler used for all MSI/Legacy interrupts, and deals
3427 * with both queue and non-queue interrupts. This is also used in
3428 * MSIX mode to handle the non-queue interrupts.
3430 static irqreturn_t i40e_intr(int irq, void *data)
3432 struct i40e_pf *pf = (struct i40e_pf *)data;
3433 struct i40e_hw *hw = &pf->hw;
3434 irqreturn_t ret = IRQ_NONE;
3435 u32 icr0, icr0_remaining;
3438 icr0 = rd32(hw, I40E_PFINT_ICR0);
3439 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3441 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3442 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3445 /* if interrupt but no bits showing, must be SWINT */
3446 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3447 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3450 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3451 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3452 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3453 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3454 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3457 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3458 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3459 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3460 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3462 /* temporarily disable queue cause for NAPI processing */
3463 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3465 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3466 wr32(hw, I40E_QINT_RQCTL(0), qval);
3468 qval = rd32(hw, I40E_QINT_TQCTL(0));
3469 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3470 wr32(hw, I40E_QINT_TQCTL(0), qval);
3472 if (!test_bit(__I40E_DOWN, &pf->state))
3473 napi_schedule_irqoff(&q_vector->napi);
3476 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3477 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3478 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3481 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3482 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3483 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3486 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3487 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3488 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3491 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3492 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3493 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3494 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3495 val = rd32(hw, I40E_GLGEN_RSTAT);
3496 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3497 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3498 if (val == I40E_RESET_CORER) {
3500 } else if (val == I40E_RESET_GLOBR) {
3502 } else if (val == I40E_RESET_EMPR) {
3504 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3508 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3509 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3510 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3511 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3512 rd32(hw, I40E_PFHMC_ERRORINFO),
3513 rd32(hw, I40E_PFHMC_ERRORDATA));
3516 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3517 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3519 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3520 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3521 i40e_ptp_tx_hwtstamp(pf);
3525 /* If a critical error is pending we have no choice but to reset the
3527 * Report and mask out any remaining unexpected interrupts.
3529 icr0_remaining = icr0 & ena_mask;
3530 if (icr0_remaining) {
3531 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3533 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3534 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3535 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3536 dev_info(&pf->pdev->dev, "device will be reset\n");
3537 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3538 i40e_service_event_schedule(pf);
3540 ena_mask &= ~icr0_remaining;
3545 /* re-enable interrupt causes */
3546 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3547 if (!test_bit(__I40E_DOWN, &pf->state)) {
3548 i40e_service_event_schedule(pf);
3549 i40e_irq_dynamic_enable_icr0(pf);
3556 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3557 * @tx_ring: tx ring to clean
3558 * @budget: how many cleans we're allowed
3560 * Returns true if there's any budget left (e.g. the clean is finished)
3562 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3564 struct i40e_vsi *vsi = tx_ring->vsi;
3565 u16 i = tx_ring->next_to_clean;
3566 struct i40e_tx_buffer *tx_buf;
3567 struct i40e_tx_desc *tx_desc;
3569 tx_buf = &tx_ring->tx_bi[i];
3570 tx_desc = I40E_TX_DESC(tx_ring, i);
3571 i -= tx_ring->count;
3574 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3576 /* if next_to_watch is not set then there is no work pending */
3580 /* prevent any other reads prior to eop_desc */
3581 read_barrier_depends();
3583 /* if the descriptor isn't done, no work yet to do */
3584 if (!(eop_desc->cmd_type_offset_bsz &
3585 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3588 /* clear next_to_watch to prevent false hangs */
3589 tx_buf->next_to_watch = NULL;
3591 tx_desc->buffer_addr = 0;
3592 tx_desc->cmd_type_offset_bsz = 0;
3593 /* move past filter desc */
3598 i -= tx_ring->count;
3599 tx_buf = tx_ring->tx_bi;
3600 tx_desc = I40E_TX_DESC(tx_ring, 0);
3602 /* unmap skb header data */
3603 dma_unmap_single(tx_ring->dev,
3604 dma_unmap_addr(tx_buf, dma),
3605 dma_unmap_len(tx_buf, len),
3607 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3608 kfree(tx_buf->raw_buf);
3610 tx_buf->raw_buf = NULL;
3611 tx_buf->tx_flags = 0;
3612 tx_buf->next_to_watch = NULL;
3613 dma_unmap_len_set(tx_buf, len, 0);
3614 tx_desc->buffer_addr = 0;
3615 tx_desc->cmd_type_offset_bsz = 0;
3617 /* move us past the eop_desc for start of next FD desc */
3622 i -= tx_ring->count;
3623 tx_buf = tx_ring->tx_bi;
3624 tx_desc = I40E_TX_DESC(tx_ring, 0);
3627 /* update budget accounting */
3629 } while (likely(budget));
3631 i += tx_ring->count;
3632 tx_ring->next_to_clean = i;
3634 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3635 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3641 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3642 * @irq: interrupt number
3643 * @data: pointer to a q_vector
3645 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3647 struct i40e_q_vector *q_vector = data;
3648 struct i40e_vsi *vsi;
3650 if (!q_vector->tx.ring)
3653 vsi = q_vector->tx.ring->vsi;
3654 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3660 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3661 * @vsi: the VSI being configured
3662 * @v_idx: vector index
3663 * @qp_idx: queue pair index
3665 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3667 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3668 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3669 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3671 tx_ring->q_vector = q_vector;
3672 tx_ring->next = q_vector->tx.ring;
3673 q_vector->tx.ring = tx_ring;
3674 q_vector->tx.count++;
3676 rx_ring->q_vector = q_vector;
3677 rx_ring->next = q_vector->rx.ring;
3678 q_vector->rx.ring = rx_ring;
3679 q_vector->rx.count++;
3683 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3684 * @vsi: the VSI being configured
3686 * This function maps descriptor rings to the queue-specific vectors
3687 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3688 * one vector per queue pair, but on a constrained vector budget, we
3689 * group the queue pairs as "efficiently" as possible.
3691 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3693 int qp_remaining = vsi->num_queue_pairs;
3694 int q_vectors = vsi->num_q_vectors;
3699 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3700 * group them so there are multiple queues per vector.
3701 * It is also important to go through all the vectors available to be
3702 * sure that if we don't use all the vectors, that the remaining vectors
3703 * are cleared. This is especially important when decreasing the
3704 * number of queues in use.
3706 for (; v_start < q_vectors; v_start++) {
3707 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3709 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3711 q_vector->num_ringpairs = num_ringpairs;
3713 q_vector->rx.count = 0;
3714 q_vector->tx.count = 0;
3715 q_vector->rx.ring = NULL;
3716 q_vector->tx.ring = NULL;
3718 while (num_ringpairs--) {
3719 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3727 * i40e_vsi_request_irq - Request IRQ from the OS
3728 * @vsi: the VSI being configured
3729 * @basename: name for the vector
3731 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3733 struct i40e_pf *pf = vsi->back;
3736 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3737 err = i40e_vsi_request_irq_msix(vsi, basename);
3738 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3739 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3742 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3746 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3751 #ifdef CONFIG_NET_POLL_CONTROLLER
3753 * i40e_netpoll - A Polling 'interrupt'handler
3754 * @netdev: network interface device structure
3756 * This is used by netconsole to send skbs without having to re-enable
3757 * interrupts. It's not called while the normal interrupt routine is executing.
3760 void i40e_netpoll(struct net_device *netdev)
3762 static void i40e_netpoll(struct net_device *netdev)
3765 struct i40e_netdev_priv *np = netdev_priv(netdev);
3766 struct i40e_vsi *vsi = np->vsi;
3767 struct i40e_pf *pf = vsi->back;
3770 /* if interface is down do nothing */
3771 if (test_bit(__I40E_DOWN, &vsi->state))
3774 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3775 for (i = 0; i < vsi->num_q_vectors; i++)
3776 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3778 i40e_intr(pf->pdev->irq, netdev);
3784 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3785 * @pf: the PF being configured
3786 * @pf_q: the PF queue
3787 * @enable: enable or disable state of the queue
3789 * This routine will wait for the given Tx queue of the PF to reach the
3790 * enabled or disabled state.
3791 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3792 * multiple retries; else will return 0 in case of success.
3794 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3799 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3800 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3801 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3804 usleep_range(10, 20);
3806 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3813 * i40e_vsi_control_tx - Start or stop a VSI's rings
3814 * @vsi: the VSI being configured
3815 * @enable: start or stop the rings
3817 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3819 struct i40e_pf *pf = vsi->back;
3820 struct i40e_hw *hw = &pf->hw;
3821 int i, j, pf_q, ret = 0;
3824 pf_q = vsi->base_queue;
3825 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3827 /* warn the TX unit of coming changes */
3828 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3830 usleep_range(10, 20);
3832 for (j = 0; j < 50; j++) {
3833 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3834 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3835 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3837 usleep_range(1000, 2000);
3839 /* Skip if the queue is already in the requested state */
3840 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3843 /* turn on/off the queue */
3845 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3846 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3848 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3851 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3852 /* No waiting for the Tx queue to disable */
3853 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3856 /* wait for the change to finish */
3857 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3859 dev_info(&pf->pdev->dev,
3860 "VSI seid %d Tx ring %d %sable timeout\n",
3861 vsi->seid, pf_q, (enable ? "en" : "dis"));
3866 if (hw->revision_id == 0)
3872 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3873 * @pf: the PF being configured
3874 * @pf_q: the PF queue
3875 * @enable: enable or disable state of the queue
3877 * This routine will wait for the given Rx queue of the PF to reach the
3878 * enabled or disabled state.
3879 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3880 * multiple retries; else will return 0 in case of success.
3882 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3887 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3888 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3889 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3892 usleep_range(10, 20);
3894 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3901 * i40e_vsi_control_rx - Start or stop a VSI's rings
3902 * @vsi: the VSI being configured
3903 * @enable: start or stop the rings
3905 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3907 struct i40e_pf *pf = vsi->back;
3908 struct i40e_hw *hw = &pf->hw;
3909 int i, j, pf_q, ret = 0;
3912 pf_q = vsi->base_queue;
3913 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3914 for (j = 0; j < 50; j++) {
3915 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3916 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3917 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3919 usleep_range(1000, 2000);
3922 /* Skip if the queue is already in the requested state */
3923 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3926 /* turn on/off the queue */
3928 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3930 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3931 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3933 /* wait for the change to finish */
3934 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3936 dev_info(&pf->pdev->dev,
3937 "VSI seid %d Rx ring %d %sable timeout\n",
3938 vsi->seid, pf_q, (enable ? "en" : "dis"));
3947 * i40e_vsi_control_rings - Start or stop a VSI's rings
3948 * @vsi: the VSI being configured
3949 * @enable: start or stop the rings
3951 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3955 /* do rx first for enable and last for disable */
3957 ret = i40e_vsi_control_rx(vsi, request);
3960 ret = i40e_vsi_control_tx(vsi, request);
3962 /* Ignore return value, we need to shutdown whatever we can */
3963 i40e_vsi_control_tx(vsi, request);
3964 i40e_vsi_control_rx(vsi, request);
3971 * i40e_vsi_free_irq - Free the irq association with the OS
3972 * @vsi: the VSI being configured
3974 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3976 struct i40e_pf *pf = vsi->back;
3977 struct i40e_hw *hw = &pf->hw;
3978 int base = vsi->base_vector;
3982 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3983 if (!vsi->q_vectors)
3986 if (!vsi->irqs_ready)
3989 vsi->irqs_ready = false;
3990 for (i = 0; i < vsi->num_q_vectors; i++) {
3991 u16 vector = i + base;
3993 /* free only the irqs that were actually requested */
3994 if (!vsi->q_vectors[i] ||
3995 !vsi->q_vectors[i]->num_ringpairs)
3998 /* clear the affinity_mask in the IRQ descriptor */
3999 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4001 free_irq(pf->msix_entries[vector].vector,
4004 /* Tear down the interrupt queue link list
4006 * We know that they come in pairs and always
4007 * the Rx first, then the Tx. To clear the
4008 * link list, stick the EOL value into the
4009 * next_q field of the registers.
4011 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4012 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4013 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4014 val |= I40E_QUEUE_END_OF_LIST
4015 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4016 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4018 while (qp != I40E_QUEUE_END_OF_LIST) {
4021 val = rd32(hw, I40E_QINT_RQCTL(qp));
4023 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4024 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4025 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4026 I40E_QINT_RQCTL_INTEVENT_MASK);
4028 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4029 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4031 wr32(hw, I40E_QINT_RQCTL(qp), val);
4033 val = rd32(hw, I40E_QINT_TQCTL(qp));
4035 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4036 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4038 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4039 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4040 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4041 I40E_QINT_TQCTL_INTEVENT_MASK);
4043 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4044 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4046 wr32(hw, I40E_QINT_TQCTL(qp), val);
4051 free_irq(pf->pdev->irq, pf);
4053 val = rd32(hw, I40E_PFINT_LNKLST0);
4054 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4055 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4056 val |= I40E_QUEUE_END_OF_LIST
4057 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4058 wr32(hw, I40E_PFINT_LNKLST0, val);
4060 val = rd32(hw, I40E_QINT_RQCTL(qp));
4061 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4062 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4063 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4064 I40E_QINT_RQCTL_INTEVENT_MASK);
4066 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4067 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4069 wr32(hw, I40E_QINT_RQCTL(qp), val);
4071 val = rd32(hw, I40E_QINT_TQCTL(qp));
4073 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4074 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4075 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4076 I40E_QINT_TQCTL_INTEVENT_MASK);
4078 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4079 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4081 wr32(hw, I40E_QINT_TQCTL(qp), val);
4086 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4087 * @vsi: the VSI being configured
4088 * @v_idx: Index of vector to be freed
4090 * This function frees the memory allocated to the q_vector. In addition if
4091 * NAPI is enabled it will delete any references to the NAPI struct prior
4092 * to freeing the q_vector.
4094 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4096 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4097 struct i40e_ring *ring;
4102 /* disassociate q_vector from rings */
4103 i40e_for_each_ring(ring, q_vector->tx)
4104 ring->q_vector = NULL;
4106 i40e_for_each_ring(ring, q_vector->rx)
4107 ring->q_vector = NULL;
4109 /* only VSI w/ an associated netdev is set up w/ NAPI */
4111 netif_napi_del(&q_vector->napi);
4113 vsi->q_vectors[v_idx] = NULL;
4115 kfree_rcu(q_vector, rcu);
4119 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4120 * @vsi: the VSI being un-configured
4122 * This frees the memory allocated to the q_vectors and
4123 * deletes references to the NAPI struct.
4125 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4129 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4130 i40e_free_q_vector(vsi, v_idx);
4134 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4135 * @pf: board private structure
4137 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4139 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4140 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4141 pci_disable_msix(pf->pdev);
4142 kfree(pf->msix_entries);
4143 pf->msix_entries = NULL;
4144 kfree(pf->irq_pile);
4145 pf->irq_pile = NULL;
4146 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4147 pci_disable_msi(pf->pdev);
4149 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4153 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4154 * @pf: board private structure
4156 * We go through and clear interrupt specific resources and reset the structure
4157 * to pre-load conditions
4159 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4163 i40e_stop_misc_vector(pf);
4164 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4165 synchronize_irq(pf->msix_entries[0].vector);
4166 free_irq(pf->msix_entries[0].vector, pf);
4169 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4170 I40E_IWARP_IRQ_PILE_ID);
4172 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4173 for (i = 0; i < pf->num_alloc_vsi; i++)
4175 i40e_vsi_free_q_vectors(pf->vsi[i]);
4176 i40e_reset_interrupt_capability(pf);
4180 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4181 * @vsi: the VSI being configured
4183 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4190 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4191 napi_enable(&vsi->q_vectors[q_idx]->napi);
4195 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4196 * @vsi: the VSI being configured
4198 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4205 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4206 napi_disable(&vsi->q_vectors[q_idx]->napi);
4210 * i40e_vsi_close - Shut down a VSI
4211 * @vsi: the vsi to be quelled
4213 static void i40e_vsi_close(struct i40e_vsi *vsi)
4217 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4219 i40e_vsi_free_irq(vsi);
4220 i40e_vsi_free_tx_resources(vsi);
4221 i40e_vsi_free_rx_resources(vsi);
4222 vsi->current_netdev_flags = 0;
4223 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4225 i40e_notify_client_of_netdev_close(vsi, reset);
4229 * i40e_quiesce_vsi - Pause a given VSI
4230 * @vsi: the VSI being paused
4232 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4234 if (test_bit(__I40E_DOWN, &vsi->state))
4237 /* No need to disable FCoE VSI when Tx suspended */
4238 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4239 vsi->type == I40E_VSI_FCOE) {
4240 dev_dbg(&vsi->back->pdev->dev,
4241 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4245 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4246 if (vsi->netdev && netif_running(vsi->netdev))
4247 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4249 i40e_vsi_close(vsi);
4253 * i40e_unquiesce_vsi - Resume a given VSI
4254 * @vsi: the VSI being resumed
4256 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4258 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4261 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4262 if (vsi->netdev && netif_running(vsi->netdev))
4263 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4265 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4269 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4272 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4276 for (v = 0; v < pf->num_alloc_vsi; v++) {
4278 i40e_quiesce_vsi(pf->vsi[v]);
4283 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4286 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4290 for (v = 0; v < pf->num_alloc_vsi; v++) {
4292 i40e_unquiesce_vsi(pf->vsi[v]);
4296 #ifdef CONFIG_I40E_DCB
4298 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4299 * @vsi: the VSI being configured
4301 * This function waits for the given VSI's Tx queues to be disabled.
4303 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4305 struct i40e_pf *pf = vsi->back;
4308 pf_q = vsi->base_queue;
4309 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4310 /* Check and wait for the disable status of the queue */
4311 ret = i40e_pf_txq_wait(pf, pf_q, false);
4313 dev_info(&pf->pdev->dev,
4314 "VSI seid %d Tx ring %d disable timeout\n",
4324 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4327 * This function waits for the Tx queues to be in disabled state for all the
4328 * VSIs that are managed by this PF.
4330 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4334 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4335 /* No need to wait for FCoE VSI queues */
4336 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4337 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4349 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4350 * @q_idx: TX queue number
4351 * @vsi: Pointer to VSI struct
4353 * This function checks specified queue for given VSI. Detects hung condition.
4354 * Sets hung bit since it is two step process. Before next run of service task
4355 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4356 * hung condition remain unchanged and during subsequent run, this function
4357 * issues SW interrupt to recover from hung condition.
4359 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4361 struct i40e_ring *tx_ring = NULL;
4363 u32 head, val, tx_pending;
4368 /* now that we have an index, find the tx_ring struct */
4369 for (i = 0; i < vsi->num_queue_pairs; i++) {
4370 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4371 if (q_idx == vsi->tx_rings[i]->queue_index) {
4372 tx_ring = vsi->tx_rings[i];
4381 /* Read interrupt register */
4382 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4384 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4385 tx_ring->vsi->base_vector - 1));
4387 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4389 /* Bail out if interrupts are disabled because napi_poll
4390 * execution in-progress or will get scheduled soon.
4391 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4393 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4396 head = i40e_get_head(tx_ring);
4398 tx_pending = i40e_get_tx_pending(tx_ring);
4400 /* HW is done executing descriptors, updated HEAD write back,
4401 * but SW hasn't processed those descriptors. If interrupt is
4402 * not generated from this point ON, it could result into
4403 * dev_watchdog detecting timeout on those netdev_queue,
4404 * hence proactively trigger SW interrupt.
4407 /* NAPI Poll didn't run and clear since it was set */
4408 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4409 &tx_ring->q_vector->hung_detected)) {
4410 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4411 vsi->seid, q_idx, tx_pending,
4412 tx_ring->next_to_clean, head,
4413 tx_ring->next_to_use,
4414 readl(tx_ring->tail));
4415 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4416 vsi->seid, q_idx, val);
4417 i40e_force_wb(vsi, tx_ring->q_vector);
4419 /* First Chance - detected possible hung */
4420 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4421 &tx_ring->q_vector->hung_detected);
4427 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4428 * @pf: pointer to PF struct
4430 * LAN VSI has netdev and netdev has TX queues. This function is to check
4431 * each of those TX queues if they are hung, trigger recovery by issuing
4434 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4436 struct net_device *netdev;
4437 struct i40e_vsi *vsi;
4440 /* Only for LAN VSI */
4441 vsi = pf->vsi[pf->lan_vsi];
4446 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4447 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4448 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4451 /* Make sure type is MAIN VSI */
4452 if (vsi->type != I40E_VSI_MAIN)
4455 netdev = vsi->netdev;
4459 /* Bail out if netif_carrier is not OK */
4460 if (!netif_carrier_ok(netdev))
4463 /* Go thru' TX queues for netdev */
4464 for (i = 0; i < netdev->num_tx_queues; i++) {
4465 struct netdev_queue *q;
4467 q = netdev_get_tx_queue(netdev, i);
4469 i40e_detect_recover_hung_queue(i, vsi);
4474 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4475 * @pf: pointer to PF
4477 * Get TC map for ISCSI PF type that will include iSCSI TC
4480 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4482 struct i40e_dcb_app_priority_table app;
4483 struct i40e_hw *hw = &pf->hw;
4484 u8 enabled_tc = 1; /* TC0 is always enabled */
4486 /* Get the iSCSI APP TLV */
4487 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4489 for (i = 0; i < dcbcfg->numapps; i++) {
4490 app = dcbcfg->app[i];
4491 if (app.selector == I40E_APP_SEL_TCPIP &&
4492 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4493 tc = dcbcfg->etscfg.prioritytable[app.priority];
4494 enabled_tc |= BIT(tc);
4503 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4504 * @dcbcfg: the corresponding DCBx configuration structure
4506 * Return the number of TCs from given DCBx configuration
4508 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4513 /* Scan the ETS Config Priority Table to find
4514 * traffic class enabled for a given priority
4515 * and use the traffic class index to get the
4516 * number of traffic classes enabled
4518 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4519 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4520 num_tc = dcbcfg->etscfg.prioritytable[i];
4523 /* Traffic class index starts from zero so
4524 * increment to return the actual count
4530 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4531 * @dcbcfg: the corresponding DCBx configuration structure
4533 * Query the current DCB configuration and return the number of
4534 * traffic classes enabled from the given DCBX config
4536 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4538 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4542 for (i = 0; i < num_tc; i++)
4543 enabled_tc |= BIT(i);
4549 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4550 * @pf: PF being queried
4552 * Return number of traffic classes enabled for the given PF
4554 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4556 struct i40e_hw *hw = &pf->hw;
4559 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4561 /* If DCB is not enabled then always in single TC */
4562 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4565 /* SFP mode will be enabled for all TCs on port */
4566 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4567 return i40e_dcb_get_num_tc(dcbcfg);
4569 /* MFP mode return count of enabled TCs for this PF */
4570 if (pf->hw.func_caps.iscsi)
4571 enabled_tc = i40e_get_iscsi_tc_map(pf);
4573 return 1; /* Only TC0 */
4575 /* At least have TC0 */
4576 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4577 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4578 if (enabled_tc & BIT(i))
4585 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4586 * @pf: PF being queried
4588 * Return a bitmap for first enabled traffic class for this PF.
4590 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4592 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4596 return 0x1; /* TC0 */
4598 /* Find the first enabled TC */
4599 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4600 if (enabled_tc & BIT(i))
4608 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4609 * @pf: PF being queried
4611 * Return a bitmap for enabled traffic classes for this PF.
4613 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4615 /* If DCB is not enabled for this PF then just return default TC */
4616 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4617 return i40e_pf_get_default_tc(pf);
4619 /* SFP mode we want PF to be enabled for all TCs */
4620 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4621 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4623 /* MFP enabled and iSCSI PF type */
4624 if (pf->hw.func_caps.iscsi)
4625 return i40e_get_iscsi_tc_map(pf);
4627 return i40e_pf_get_default_tc(pf);
4631 * i40e_vsi_get_bw_info - Query VSI BW Information
4632 * @vsi: the VSI being queried
4634 * Returns 0 on success, negative value on failure
4636 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4638 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4639 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4640 struct i40e_pf *pf = vsi->back;
4641 struct i40e_hw *hw = &pf->hw;
4646 /* Get the VSI level BW configuration */
4647 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4649 dev_info(&pf->pdev->dev,
4650 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4651 i40e_stat_str(&pf->hw, ret),
4652 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4656 /* Get the VSI level BW configuration per TC */
4657 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4660 dev_info(&pf->pdev->dev,
4661 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4662 i40e_stat_str(&pf->hw, ret),
4663 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4667 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4668 dev_info(&pf->pdev->dev,
4669 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4670 bw_config.tc_valid_bits,
4671 bw_ets_config.tc_valid_bits);
4672 /* Still continuing */
4675 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4676 vsi->bw_max_quanta = bw_config.max_bw;
4677 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4678 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4679 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4680 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4681 vsi->bw_ets_limit_credits[i] =
4682 le16_to_cpu(bw_ets_config.credits[i]);
4683 /* 3 bits out of 4 for each TC */
4684 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4691 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4692 * @vsi: the VSI being configured
4693 * @enabled_tc: TC bitmap
4694 * @bw_credits: BW shared credits per TC
4696 * Returns 0 on success, negative value on failure
4698 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4701 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4705 bw_data.tc_valid_bits = enabled_tc;
4706 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4707 bw_data.tc_bw_credits[i] = bw_share[i];
4709 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4712 dev_info(&vsi->back->pdev->dev,
4713 "AQ command Config VSI BW allocation per TC failed = %d\n",
4714 vsi->back->hw.aq.asq_last_status);
4718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4719 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4725 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4726 * @vsi: the VSI being configured
4727 * @enabled_tc: TC map to be enabled
4730 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4732 struct net_device *netdev = vsi->netdev;
4733 struct i40e_pf *pf = vsi->back;
4734 struct i40e_hw *hw = &pf->hw;
4737 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4743 netdev_reset_tc(netdev);
4747 /* Set up actual enabled TCs on the VSI */
4748 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4751 /* set per TC queues for the VSI */
4752 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4753 /* Only set TC queues for enabled tcs
4755 * e.g. For a VSI that has TC0 and TC3 enabled the
4756 * enabled_tc bitmap would be 0x00001001; the driver
4757 * will set the numtc for netdev as 2 that will be
4758 * referenced by the netdev layer as TC 0 and 1.
4760 if (vsi->tc_config.enabled_tc & BIT(i))
4761 netdev_set_tc_queue(netdev,
4762 vsi->tc_config.tc_info[i].netdev_tc,
4763 vsi->tc_config.tc_info[i].qcount,
4764 vsi->tc_config.tc_info[i].qoffset);
4767 /* Assign UP2TC map for the VSI */
4768 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4769 /* Get the actual TC# for the UP */
4770 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4771 /* Get the mapped netdev TC# for the UP */
4772 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4773 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4778 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4779 * @vsi: the VSI being configured
4780 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4782 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4783 struct i40e_vsi_context *ctxt)
4785 /* copy just the sections touched not the entire info
4786 * since not all sections are valid as returned by
4789 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4790 memcpy(&vsi->info.queue_mapping,
4791 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4792 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4793 sizeof(vsi->info.tc_mapping));
4797 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4798 * @vsi: VSI to be configured
4799 * @enabled_tc: TC bitmap
4801 * This configures a particular VSI for TCs that are mapped to the
4802 * given TC bitmap. It uses default bandwidth share for TCs across
4803 * VSIs to configure TC for a particular VSI.
4806 * It is expected that the VSI queues have been quisced before calling
4809 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4811 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4812 struct i40e_vsi_context ctxt;
4816 /* Check if enabled_tc is same as existing or new TCs */
4817 if (vsi->tc_config.enabled_tc == enabled_tc)
4820 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4821 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4822 if (enabled_tc & BIT(i))
4826 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4828 dev_info(&vsi->back->pdev->dev,
4829 "Failed configuring TC map %d for VSI %d\n",
4830 enabled_tc, vsi->seid);
4834 /* Update Queue Pairs Mapping for currently enabled UPs */
4835 ctxt.seid = vsi->seid;
4836 ctxt.pf_num = vsi->back->hw.pf_id;
4838 ctxt.uplink_seid = vsi->uplink_seid;
4839 ctxt.info = vsi->info;
4840 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4842 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4843 ctxt.info.valid_sections |=
4844 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4845 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4848 /* Update the VSI after updating the VSI queue-mapping information */
4849 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4851 dev_info(&vsi->back->pdev->dev,
4852 "Update vsi tc config failed, err %s aq_err %s\n",
4853 i40e_stat_str(&vsi->back->hw, ret),
4854 i40e_aq_str(&vsi->back->hw,
4855 vsi->back->hw.aq.asq_last_status));
4858 /* update the local VSI info with updated queue map */
4859 i40e_vsi_update_queue_map(vsi, &ctxt);
4860 vsi->info.valid_sections = 0;
4862 /* Update current VSI BW information */
4863 ret = i40e_vsi_get_bw_info(vsi);
4865 dev_info(&vsi->back->pdev->dev,
4866 "Failed updating vsi bw info, err %s aq_err %s\n",
4867 i40e_stat_str(&vsi->back->hw, ret),
4868 i40e_aq_str(&vsi->back->hw,
4869 vsi->back->hw.aq.asq_last_status));
4873 /* Update the netdev TC setup */
4874 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4880 * i40e_veb_config_tc - Configure TCs for given VEB
4882 * @enabled_tc: TC bitmap
4884 * Configures given TC bitmap for VEB (switching) element
4886 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4888 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4889 struct i40e_pf *pf = veb->pf;
4893 /* No TCs or already enabled TCs just return */
4894 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4897 bw_data.tc_valid_bits = enabled_tc;
4898 /* bw_data.absolute_credits is not set (relative) */
4900 /* Enable ETS TCs with equal BW Share for now */
4901 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4902 if (enabled_tc & BIT(i))
4903 bw_data.tc_bw_share_credits[i] = 1;
4906 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4909 dev_info(&pf->pdev->dev,
4910 "VEB bw config failed, err %s aq_err %s\n",
4911 i40e_stat_str(&pf->hw, ret),
4912 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4916 /* Update the BW information */
4917 ret = i40e_veb_get_bw_info(veb);
4919 dev_info(&pf->pdev->dev,
4920 "Failed getting veb bw config, err %s aq_err %s\n",
4921 i40e_stat_str(&pf->hw, ret),
4922 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4929 #ifdef CONFIG_I40E_DCB
4931 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4934 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4935 * the caller would've quiesce all the VSIs before calling
4938 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4944 /* Enable the TCs available on PF to all VEBs */
4945 tc_map = i40e_pf_get_tc_map(pf);
4946 for (v = 0; v < I40E_MAX_VEB; v++) {
4949 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4951 dev_info(&pf->pdev->dev,
4952 "Failed configuring TC for VEB seid=%d\n",
4954 /* Will try to configure as many components */
4958 /* Update each VSI */
4959 for (v = 0; v < pf->num_alloc_vsi; v++) {
4963 /* - Enable all TCs for the LAN VSI
4965 * - For FCoE VSI only enable the TC configured
4966 * as per the APP TLV
4968 * - For all others keep them at TC0 for now
4970 if (v == pf->lan_vsi)
4971 tc_map = i40e_pf_get_tc_map(pf);
4973 tc_map = i40e_pf_get_default_tc(pf);
4975 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4976 tc_map = i40e_get_fcoe_tc_map(pf);
4977 #endif /* #ifdef I40E_FCOE */
4979 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4981 dev_info(&pf->pdev->dev,
4982 "Failed configuring TC for VSI seid=%d\n",
4984 /* Will try to configure as many components */
4986 /* Re-configure VSI vectors based on updated TC map */
4987 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4988 if (pf->vsi[v]->netdev)
4989 i40e_dcbnl_set_all(pf->vsi[v]);
4991 i40e_notify_client_of_l2_param_changes(pf->vsi[v]);
4996 * i40e_resume_port_tx - Resume port Tx
4999 * Resume a port's Tx and issue a PF reset in case of failure to
5002 static int i40e_resume_port_tx(struct i40e_pf *pf)
5004 struct i40e_hw *hw = &pf->hw;
5007 ret = i40e_aq_resume_port_tx(hw, NULL);
5009 dev_info(&pf->pdev->dev,
5010 "Resume Port Tx failed, err %s aq_err %s\n",
5011 i40e_stat_str(&pf->hw, ret),
5012 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5013 /* Schedule PF reset to recover */
5014 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5015 i40e_service_event_schedule(pf);
5022 * i40e_init_pf_dcb - Initialize DCB configuration
5023 * @pf: PF being configured
5025 * Query the current DCB configuration and cache it
5026 * in the hardware structure
5028 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5030 struct i40e_hw *hw = &pf->hw;
5033 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5034 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5035 (pf->hw.aq.fw_maj_ver < 4))
5038 /* Get the initial DCB configuration */
5039 err = i40e_init_dcb(hw);
5041 /* Device/Function is not DCBX capable */
5042 if ((!hw->func_caps.dcb) ||
5043 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5044 dev_info(&pf->pdev->dev,
5045 "DCBX offload is not supported or is disabled for this PF.\n");
5047 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5051 /* When status is not DISABLED then DCBX in FW */
5052 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5053 DCB_CAP_DCBX_VER_IEEE;
5055 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5056 /* Enable DCB tagging only when more than one TC */
5057 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5058 pf->flags |= I40E_FLAG_DCB_ENABLED;
5059 dev_dbg(&pf->pdev->dev,
5060 "DCBX offload is supported for this PF.\n");
5063 dev_info(&pf->pdev->dev,
5064 "Query for DCB configuration failed, err %s aq_err %s\n",
5065 i40e_stat_str(&pf->hw, err),
5066 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5072 #endif /* CONFIG_I40E_DCB */
5073 #define SPEED_SIZE 14
5076 * i40e_print_link_message - print link up or down
5077 * @vsi: the VSI for which link needs a message
5079 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5081 char *speed = "Unknown";
5082 char *fc = "Unknown";
5084 if (vsi->current_isup == isup)
5086 vsi->current_isup = isup;
5088 netdev_info(vsi->netdev, "NIC Link is Down\n");
5092 /* Warn user if link speed on NPAR enabled partition is not at
5095 if (vsi->back->hw.func_caps.npar_enable &&
5096 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5097 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5098 netdev_warn(vsi->netdev,
5099 "The partition detected link speed that is less than 10Gbps\n");
5101 switch (vsi->back->hw.phy.link_info.link_speed) {
5102 case I40E_LINK_SPEED_40GB:
5105 case I40E_LINK_SPEED_20GB:
5108 case I40E_LINK_SPEED_10GB:
5111 case I40E_LINK_SPEED_1GB:
5114 case I40E_LINK_SPEED_100MB:
5121 switch (vsi->back->hw.fc.current_mode) {
5125 case I40E_FC_TX_PAUSE:
5128 case I40E_FC_RX_PAUSE:
5136 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5141 * i40e_up_complete - Finish the last steps of bringing up a connection
5142 * @vsi: the VSI being configured
5144 static int i40e_up_complete(struct i40e_vsi *vsi)
5146 struct i40e_pf *pf = vsi->back;
5149 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5150 i40e_vsi_configure_msix(vsi);
5152 i40e_configure_msi_and_legacy(vsi);
5155 err = i40e_vsi_control_rings(vsi, true);
5159 clear_bit(__I40E_DOWN, &vsi->state);
5160 i40e_napi_enable_all(vsi);
5161 i40e_vsi_enable_irq(vsi);
5163 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5165 i40e_print_link_message(vsi, true);
5166 netif_tx_start_all_queues(vsi->netdev);
5167 netif_carrier_on(vsi->netdev);
5168 } else if (vsi->netdev) {
5169 i40e_print_link_message(vsi, false);
5170 /* need to check for qualified module here*/
5171 if ((pf->hw.phy.link_info.link_info &
5172 I40E_AQ_MEDIA_AVAILABLE) &&
5173 (!(pf->hw.phy.link_info.an_info &
5174 I40E_AQ_QUALIFIED_MODULE)))
5175 netdev_err(vsi->netdev,
5176 "the driver failed to link because an unqualified module was detected.");
5179 /* replay FDIR SB filters */
5180 if (vsi->type == I40E_VSI_FDIR) {
5181 /* reset fd counters */
5182 pf->fd_add_err = pf->fd_atr_cnt = 0;
5183 if (pf->fd_tcp_rule > 0) {
5184 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5185 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5186 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5187 pf->fd_tcp_rule = 0;
5189 i40e_fdir_filter_restore(vsi);
5192 /* On the next run of the service_task, notify any clients of the new
5195 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5196 i40e_service_event_schedule(pf);
5202 * i40e_vsi_reinit_locked - Reset the VSI
5203 * @vsi: the VSI being configured
5205 * Rebuild the ring structs after some configuration
5206 * has changed, e.g. MTU size.
5208 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5210 struct i40e_pf *pf = vsi->back;
5212 WARN_ON(in_interrupt());
5213 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5214 usleep_range(1000, 2000);
5217 /* Give a VF some time to respond to the reset. The
5218 * two second wait is based upon the watchdog cycle in
5221 if (vsi->type == I40E_VSI_SRIOV)
5224 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5228 * i40e_up - Bring the connection back up after being down
5229 * @vsi: the VSI being configured
5231 int i40e_up(struct i40e_vsi *vsi)
5235 err = i40e_vsi_configure(vsi);
5237 err = i40e_up_complete(vsi);
5243 * i40e_down - Shutdown the connection processing
5244 * @vsi: the VSI being stopped
5246 void i40e_down(struct i40e_vsi *vsi)
5250 /* It is assumed that the caller of this function
5251 * sets the vsi->state __I40E_DOWN bit.
5254 netif_carrier_off(vsi->netdev);
5255 netif_tx_disable(vsi->netdev);
5257 i40e_vsi_disable_irq(vsi);
5258 i40e_vsi_control_rings(vsi, false);
5259 i40e_napi_disable_all(vsi);
5261 for (i = 0; i < vsi->num_queue_pairs; i++) {
5262 i40e_clean_tx_ring(vsi->tx_rings[i]);
5263 i40e_clean_rx_ring(vsi->rx_rings[i]);
5268 * i40e_setup_tc - configure multiple traffic classes
5269 * @netdev: net device to configure
5270 * @tc: number of traffic classes to enable
5273 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5275 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5278 struct i40e_netdev_priv *np = netdev_priv(netdev);
5279 struct i40e_vsi *vsi = np->vsi;
5280 struct i40e_pf *pf = vsi->back;
5285 /* Check if DCB enabled to continue */
5286 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5287 netdev_info(netdev, "DCB is not enabled for adapter\n");
5291 /* Check if MFP enabled */
5292 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5293 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5297 /* Check whether tc count is within enabled limit */
5298 if (tc > i40e_pf_get_num_tc(pf)) {
5299 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5303 /* Generate TC map for number of tc requested */
5304 for (i = 0; i < tc; i++)
5305 enabled_tc |= BIT(i);
5307 /* Requesting same TC configuration as already enabled */
5308 if (enabled_tc == vsi->tc_config.enabled_tc)
5311 /* Quiesce VSI queues */
5312 i40e_quiesce_vsi(vsi);
5314 /* Configure VSI for enabled TCs */
5315 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5317 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5323 i40e_unquiesce_vsi(vsi);
5330 * i40e_open - Called when a network interface is made active
5331 * @netdev: network interface device structure
5333 * The open entry point is called when a network interface is made
5334 * active by the system (IFF_UP). At this point all resources needed
5335 * for transmit and receive operations are allocated, the interrupt
5336 * handler is registered with the OS, the netdev watchdog subtask is
5337 * enabled, and the stack is notified that the interface is ready.
5339 * Returns 0 on success, negative value on failure
5341 int i40e_open(struct net_device *netdev)
5343 struct i40e_netdev_priv *np = netdev_priv(netdev);
5344 struct i40e_vsi *vsi = np->vsi;
5345 struct i40e_pf *pf = vsi->back;
5348 /* disallow open during test or if eeprom is broken */
5349 if (test_bit(__I40E_TESTING, &pf->state) ||
5350 test_bit(__I40E_BAD_EEPROM, &pf->state))
5353 netif_carrier_off(netdev);
5355 err = i40e_vsi_open(vsi);
5359 /* configure global TSO hardware offload settings */
5360 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5361 TCP_FLAG_FIN) >> 16);
5362 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5364 TCP_FLAG_CWR) >> 16);
5365 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5367 #ifdef CONFIG_I40E_VXLAN
5368 vxlan_get_rx_port(netdev);
5370 #ifdef CONFIG_I40E_GENEVE
5371 geneve_get_rx_port(netdev);
5374 i40e_notify_client_of_netdev_open(vsi);
5381 * @vsi: the VSI to open
5383 * Finish initialization of the VSI.
5385 * Returns 0 on success, negative value on failure
5387 int i40e_vsi_open(struct i40e_vsi *vsi)
5389 struct i40e_pf *pf = vsi->back;
5390 char int_name[I40E_INT_NAME_STR_LEN];
5393 /* allocate descriptors */
5394 err = i40e_vsi_setup_tx_resources(vsi);
5397 err = i40e_vsi_setup_rx_resources(vsi);
5401 err = i40e_vsi_configure(vsi);
5406 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5407 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5408 err = i40e_vsi_request_irq(vsi, int_name);
5412 /* Notify the stack of the actual queue counts. */
5413 err = netif_set_real_num_tx_queues(vsi->netdev,
5414 vsi->num_queue_pairs);
5416 goto err_set_queues;
5418 err = netif_set_real_num_rx_queues(vsi->netdev,
5419 vsi->num_queue_pairs);
5421 goto err_set_queues;
5423 } else if (vsi->type == I40E_VSI_FDIR) {
5424 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5425 dev_driver_string(&pf->pdev->dev),
5426 dev_name(&pf->pdev->dev));
5427 err = i40e_vsi_request_irq(vsi, int_name);
5434 err = i40e_up_complete(vsi);
5436 goto err_up_complete;
5443 i40e_vsi_free_irq(vsi);
5445 i40e_vsi_free_rx_resources(vsi);
5447 i40e_vsi_free_tx_resources(vsi);
5448 if (vsi == pf->vsi[pf->lan_vsi])
5449 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5455 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5456 * @pf: Pointer to PF
5458 * This function destroys the hlist where all the Flow Director
5459 * filters were saved.
5461 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5463 struct i40e_fdir_filter *filter;
5464 struct hlist_node *node2;
5466 hlist_for_each_entry_safe(filter, node2,
5467 &pf->fdir_filter_list, fdir_node) {
5468 hlist_del(&filter->fdir_node);
5471 pf->fdir_pf_active_filters = 0;
5475 * i40e_close - Disables a network interface
5476 * @netdev: network interface device structure
5478 * The close entry point is called when an interface is de-activated
5479 * by the OS. The hardware is still under the driver's control, but
5480 * this netdev interface is disabled.
5482 * Returns 0, this is not allowed to fail
5485 int i40e_close(struct net_device *netdev)
5487 static int i40e_close(struct net_device *netdev)
5490 struct i40e_netdev_priv *np = netdev_priv(netdev);
5491 struct i40e_vsi *vsi = np->vsi;
5493 i40e_vsi_close(vsi);
5499 * i40e_do_reset - Start a PF or Core Reset sequence
5500 * @pf: board private structure
5501 * @reset_flags: which reset is requested
5503 * The essential difference in resets is that the PF Reset
5504 * doesn't clear the packet buffers, doesn't reset the PE
5505 * firmware, and doesn't bother the other PFs on the chip.
5507 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5511 WARN_ON(in_interrupt());
5513 if (i40e_check_asq_alive(&pf->hw))
5514 i40e_vc_notify_reset(pf);
5516 /* do the biggest reset indicated */
5517 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5519 /* Request a Global Reset
5521 * This will start the chip's countdown to the actual full
5522 * chip reset event, and a warning interrupt to be sent
5523 * to all PFs, including the requestor. Our handler
5524 * for the warning interrupt will deal with the shutdown
5525 * and recovery of the switch setup.
5527 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5528 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5529 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5530 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5532 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5534 /* Request a Core Reset
5536 * Same as Global Reset, except does *not* include the MAC/PHY
5538 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5539 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5540 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5541 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5542 i40e_flush(&pf->hw);
5544 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5546 /* Request a PF Reset
5548 * Resets only the PF-specific registers
5550 * This goes directly to the tear-down and rebuild of
5551 * the switch, since we need to do all the recovery as
5552 * for the Core Reset.
5554 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5555 i40e_handle_reset_warning(pf);
5557 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5560 /* Find the VSI(s) that requested a re-init */
5561 dev_info(&pf->pdev->dev,
5562 "VSI reinit requested\n");
5563 for (v = 0; v < pf->num_alloc_vsi; v++) {
5564 struct i40e_vsi *vsi = pf->vsi[v];
5567 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5568 i40e_vsi_reinit_locked(pf->vsi[v]);
5569 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5572 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5575 /* Find the VSI(s) that needs to be brought down */
5576 dev_info(&pf->pdev->dev, "VSI down requested\n");
5577 for (v = 0; v < pf->num_alloc_vsi; v++) {
5578 struct i40e_vsi *vsi = pf->vsi[v];
5581 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5582 set_bit(__I40E_DOWN, &vsi->state);
5584 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5588 dev_info(&pf->pdev->dev,
5589 "bad reset request 0x%08x\n", reset_flags);
5593 #ifdef CONFIG_I40E_DCB
5595 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5596 * @pf: board private structure
5597 * @old_cfg: current DCB config
5598 * @new_cfg: new DCB config
5600 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5601 struct i40e_dcbx_config *old_cfg,
5602 struct i40e_dcbx_config *new_cfg)
5604 bool need_reconfig = false;
5606 /* Check if ETS configuration has changed */
5607 if (memcmp(&new_cfg->etscfg,
5609 sizeof(new_cfg->etscfg))) {
5610 /* If Priority Table has changed reconfig is needed */
5611 if (memcmp(&new_cfg->etscfg.prioritytable,
5612 &old_cfg->etscfg.prioritytable,
5613 sizeof(new_cfg->etscfg.prioritytable))) {
5614 need_reconfig = true;
5615 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5618 if (memcmp(&new_cfg->etscfg.tcbwtable,
5619 &old_cfg->etscfg.tcbwtable,
5620 sizeof(new_cfg->etscfg.tcbwtable)))
5621 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5623 if (memcmp(&new_cfg->etscfg.tsatable,
5624 &old_cfg->etscfg.tsatable,
5625 sizeof(new_cfg->etscfg.tsatable)))
5626 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5629 /* Check if PFC configuration has changed */
5630 if (memcmp(&new_cfg->pfc,
5632 sizeof(new_cfg->pfc))) {
5633 need_reconfig = true;
5634 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5637 /* Check if APP Table has changed */
5638 if (memcmp(&new_cfg->app,
5640 sizeof(new_cfg->app))) {
5641 need_reconfig = true;
5642 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5645 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5646 return need_reconfig;
5650 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5651 * @pf: board private structure
5652 * @e: event info posted on ARQ
5654 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5655 struct i40e_arq_event_info *e)
5657 struct i40e_aqc_lldp_get_mib *mib =
5658 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5659 struct i40e_hw *hw = &pf->hw;
5660 struct i40e_dcbx_config tmp_dcbx_cfg;
5661 bool need_reconfig = false;
5665 /* Not DCB capable or capability disabled */
5666 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5669 /* Ignore if event is not for Nearest Bridge */
5670 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5671 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5672 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5673 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5676 /* Check MIB Type and return if event for Remote MIB update */
5677 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5678 dev_dbg(&pf->pdev->dev,
5679 "LLDP event mib type %s\n", type ? "remote" : "local");
5680 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5681 /* Update the remote cached instance and return */
5682 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5683 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5684 &hw->remote_dcbx_config);
5688 /* Store the old configuration */
5689 tmp_dcbx_cfg = hw->local_dcbx_config;
5691 /* Reset the old DCBx configuration data */
5692 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5693 /* Get updated DCBX data from firmware */
5694 ret = i40e_get_dcb_config(&pf->hw);
5696 dev_info(&pf->pdev->dev,
5697 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5698 i40e_stat_str(&pf->hw, ret),
5699 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5703 /* No change detected in DCBX configs */
5704 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5705 sizeof(tmp_dcbx_cfg))) {
5706 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5710 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5711 &hw->local_dcbx_config);
5713 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5718 /* Enable DCB tagging only when more than one TC */
5719 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5720 pf->flags |= I40E_FLAG_DCB_ENABLED;
5722 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5724 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5725 /* Reconfiguration needed quiesce all VSIs */
5726 i40e_pf_quiesce_all_vsi(pf);
5728 /* Changes in configuration update VEB/VSI */
5729 i40e_dcb_reconfigure(pf);
5731 ret = i40e_resume_port_tx(pf);
5733 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5734 /* In case of error no point in resuming VSIs */
5738 /* Wait for the PF's Tx queues to be disabled */
5739 ret = i40e_pf_wait_txq_disabled(pf);
5741 /* Schedule PF reset to recover */
5742 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5743 i40e_service_event_schedule(pf);
5745 i40e_pf_unquiesce_all_vsi(pf);
5751 #endif /* CONFIG_I40E_DCB */
5754 * i40e_do_reset_safe - Protected reset path for userland calls.
5755 * @pf: board private structure
5756 * @reset_flags: which reset is requested
5759 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5762 i40e_do_reset(pf, reset_flags);
5767 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5768 * @pf: board private structure
5769 * @e: event info posted on ARQ
5771 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5774 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5775 struct i40e_arq_event_info *e)
5777 struct i40e_aqc_lan_overflow *data =
5778 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5779 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5780 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5781 struct i40e_hw *hw = &pf->hw;
5785 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5788 /* Queue belongs to VF, find the VF and issue VF reset */
5789 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5790 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5791 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5792 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5793 vf_id -= hw->func_caps.vf_base_id;
5794 vf = &pf->vf[vf_id];
5795 i40e_vc_notify_vf_reset(vf);
5796 /* Allow VF to process pending reset notification */
5798 i40e_reset_vf(vf, false);
5803 * i40e_service_event_complete - Finish up the service event
5804 * @pf: board private structure
5806 static void i40e_service_event_complete(struct i40e_pf *pf)
5808 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5810 /* flush memory to make sure state is correct before next watchog */
5811 smp_mb__before_atomic();
5812 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5816 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5817 * @pf: board private structure
5819 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5823 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5824 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5829 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5830 * @pf: board private structure
5832 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5836 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5837 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5838 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5839 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5844 * i40e_get_global_fd_count - Get total FD filters programmed on device
5845 * @pf: board private structure
5847 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5851 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5852 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5853 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5854 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5859 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5860 * @pf: board private structure
5862 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5864 struct i40e_fdir_filter *filter;
5865 u32 fcnt_prog, fcnt_avail;
5866 struct hlist_node *node;
5868 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5871 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5874 fcnt_prog = i40e_get_global_fd_count(pf);
5875 fcnt_avail = pf->fdir_pf_filter_count;
5876 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5877 (pf->fd_add_err == 0) ||
5878 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5879 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5880 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5881 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5882 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5883 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5886 /* Wait for some more space to be available to turn on ATR */
5887 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5888 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5889 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5890 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5891 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5892 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5896 /* if hw had a problem adding a filter, delete it */
5897 if (pf->fd_inv > 0) {
5898 hlist_for_each_entry_safe(filter, node,
5899 &pf->fdir_filter_list, fdir_node) {
5900 if (filter->fd_id == pf->fd_inv) {
5901 hlist_del(&filter->fdir_node);
5903 pf->fdir_pf_active_filters--;
5909 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5910 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5912 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5913 * @pf: board private structure
5915 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5917 unsigned long min_flush_time;
5918 int flush_wait_retry = 50;
5919 bool disable_atr = false;
5923 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5926 if (!time_after(jiffies, pf->fd_flush_timestamp +
5927 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5930 /* If the flush is happening too quick and we have mostly SB rules we
5931 * should not re-enable ATR for some time.
5933 min_flush_time = pf->fd_flush_timestamp +
5934 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5935 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5937 if (!(time_after(jiffies, min_flush_time)) &&
5938 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5939 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5940 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5944 pf->fd_flush_timestamp = jiffies;
5945 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5946 /* flush all filters */
5947 wr32(&pf->hw, I40E_PFQF_CTL_1,
5948 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5949 i40e_flush(&pf->hw);
5953 /* Check FD flush status every 5-6msec */
5954 usleep_range(5000, 6000);
5955 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5956 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5958 } while (flush_wait_retry--);
5959 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5960 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5962 /* replay sideband filters */
5963 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5965 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5966 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5967 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5968 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5974 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5975 * @pf: board private structure
5977 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5979 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5982 /* We can see up to 256 filter programming desc in transit if the filters are
5983 * being applied really fast; before we see the first
5984 * filter miss error on Rx queue 0. Accumulating enough error messages before
5985 * reacting will make sure we don't cause flush too often.
5987 #define I40E_MAX_FD_PROGRAM_ERROR 256
5990 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5991 * @pf: board private structure
5993 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5996 /* if interface is down do nothing */
5997 if (test_bit(__I40E_DOWN, &pf->state))
6000 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
6003 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6004 i40e_fdir_flush_and_replay(pf);
6006 i40e_fdir_check_and_reenable(pf);
6011 * i40e_vsi_link_event - notify VSI of a link event
6012 * @vsi: vsi to be notified
6013 * @link_up: link up or down
6015 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6017 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6020 switch (vsi->type) {
6025 if (!vsi->netdev || !vsi->netdev_registered)
6029 netif_carrier_on(vsi->netdev);
6030 netif_tx_wake_all_queues(vsi->netdev);
6032 netif_carrier_off(vsi->netdev);
6033 netif_tx_stop_all_queues(vsi->netdev);
6037 case I40E_VSI_SRIOV:
6038 case I40E_VSI_VMDQ2:
6040 case I40E_VSI_IWARP:
6041 case I40E_VSI_MIRROR:
6043 /* there is no notification for other VSIs */
6049 * i40e_veb_link_event - notify elements on the veb of a link event
6050 * @veb: veb to be notified
6051 * @link_up: link up or down
6053 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6058 if (!veb || !veb->pf)
6062 /* depth first... */
6063 for (i = 0; i < I40E_MAX_VEB; i++)
6064 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6065 i40e_veb_link_event(pf->veb[i], link_up);
6067 /* ... now the local VSIs */
6068 for (i = 0; i < pf->num_alloc_vsi; i++)
6069 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6070 i40e_vsi_link_event(pf->vsi[i], link_up);
6074 * i40e_link_event - Update netif_carrier status
6075 * @pf: board private structure
6077 static void i40e_link_event(struct i40e_pf *pf)
6079 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6080 u8 new_link_speed, old_link_speed;
6082 bool new_link, old_link;
6084 /* save off old link status information */
6085 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6087 /* set this to force the get_link_status call to refresh state */
6088 pf->hw.phy.get_link_info = true;
6090 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6092 status = i40e_get_link_status(&pf->hw, &new_link);
6094 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6099 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6100 new_link_speed = pf->hw.phy.link_info.link_speed;
6102 if (new_link == old_link &&
6103 new_link_speed == old_link_speed &&
6104 (test_bit(__I40E_DOWN, &vsi->state) ||
6105 new_link == netif_carrier_ok(vsi->netdev)))
6108 if (!test_bit(__I40E_DOWN, &vsi->state))
6109 i40e_print_link_message(vsi, new_link);
6111 /* Notify the base of the switch tree connected to
6112 * the link. Floating VEBs are not notified.
6114 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6115 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6117 i40e_vsi_link_event(vsi, new_link);
6120 i40e_vc_notify_link_state(pf);
6122 if (pf->flags & I40E_FLAG_PTP)
6123 i40e_ptp_set_increment(pf);
6127 * i40e_watchdog_subtask - periodic checks not using event driven response
6128 * @pf: board private structure
6130 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6134 /* if interface is down do nothing */
6135 if (test_bit(__I40E_DOWN, &pf->state) ||
6136 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6139 /* make sure we don't do these things too often */
6140 if (time_before(jiffies, (pf->service_timer_previous +
6141 pf->service_timer_period)))
6143 pf->service_timer_previous = jiffies;
6145 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6146 i40e_link_event(pf);
6148 /* Update the stats for active netdevs so the network stack
6149 * can look at updated numbers whenever it cares to
6151 for (i = 0; i < pf->num_alloc_vsi; i++)
6152 if (pf->vsi[i] && pf->vsi[i]->netdev)
6153 i40e_update_stats(pf->vsi[i]);
6155 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6156 /* Update the stats for the active switching components */
6157 for (i = 0; i < I40E_MAX_VEB; i++)
6159 i40e_update_veb_stats(pf->veb[i]);
6162 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6166 * i40e_reset_subtask - Set up for resetting the device and driver
6167 * @pf: board private structure
6169 static void i40e_reset_subtask(struct i40e_pf *pf)
6171 u32 reset_flags = 0;
6174 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6175 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6176 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6178 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6179 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6180 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6182 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6183 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6184 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6186 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6187 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6188 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6190 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6191 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6192 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6195 /* If there's a recovery already waiting, it takes
6196 * precedence before starting a new reset sequence.
6198 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6199 i40e_handle_reset_warning(pf);
6203 /* If we're already down or resetting, just bail */
6205 !test_bit(__I40E_DOWN, &pf->state) &&
6206 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6207 i40e_do_reset(pf, reset_flags);
6214 * i40e_handle_link_event - Handle link event
6215 * @pf: board private structure
6216 * @e: event info posted on ARQ
6218 static void i40e_handle_link_event(struct i40e_pf *pf,
6219 struct i40e_arq_event_info *e)
6221 struct i40e_aqc_get_link_status *status =
6222 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6224 /* Do a new status request to re-enable LSE reporting
6225 * and load new status information into the hw struct
6226 * This completely ignores any state information
6227 * in the ARQ event info, instead choosing to always
6228 * issue the AQ update link status command.
6230 i40e_link_event(pf);
6232 /* check for unqualified module, if link is down */
6233 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6234 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6235 (!(status->link_info & I40E_AQ_LINK_UP)))
6236 dev_err(&pf->pdev->dev,
6237 "The driver failed to link because an unqualified module was detected.\n");
6241 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6242 * @pf: board private structure
6244 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6246 struct i40e_arq_event_info event;
6247 struct i40e_hw *hw = &pf->hw;
6254 /* Do not run clean AQ when PF reset fails */
6255 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6258 /* check for error indications */
6259 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6261 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6262 if (hw->debug_mask & I40E_DEBUG_AQ)
6263 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6264 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6266 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6267 if (hw->debug_mask & I40E_DEBUG_AQ)
6268 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6269 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6271 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6272 if (hw->debug_mask & I40E_DEBUG_AQ)
6273 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6274 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6277 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6279 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6281 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6282 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6283 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6284 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6286 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6287 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6288 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6289 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6291 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6292 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6293 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6294 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6297 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6299 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6300 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6305 ret = i40e_clean_arq_element(hw, &event, &pending);
6306 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6309 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6313 opcode = le16_to_cpu(event.desc.opcode);
6316 case i40e_aqc_opc_get_link_status:
6317 i40e_handle_link_event(pf, &event);
6319 case i40e_aqc_opc_send_msg_to_pf:
6320 ret = i40e_vc_process_vf_msg(pf,
6321 le16_to_cpu(event.desc.retval),
6322 le32_to_cpu(event.desc.cookie_high),
6323 le32_to_cpu(event.desc.cookie_low),
6327 case i40e_aqc_opc_lldp_update_mib:
6328 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6329 #ifdef CONFIG_I40E_DCB
6331 ret = i40e_handle_lldp_event(pf, &event);
6333 #endif /* CONFIG_I40E_DCB */
6335 case i40e_aqc_opc_event_lan_overflow:
6336 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6337 i40e_handle_lan_overflow_event(pf, &event);
6339 case i40e_aqc_opc_send_msg_to_peer:
6340 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6342 case i40e_aqc_opc_nvm_erase:
6343 case i40e_aqc_opc_nvm_update:
6344 case i40e_aqc_opc_oem_post_update:
6345 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6348 dev_info(&pf->pdev->dev,
6349 "ARQ Error: Unknown event 0x%04x received\n",
6353 } while (pending && (i++ < pf->adminq_work_limit));
6355 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6356 /* re-enable Admin queue interrupt cause */
6357 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6358 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6359 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6362 kfree(event.msg_buf);
6366 * i40e_verify_eeprom - make sure eeprom is good to use
6367 * @pf: board private structure
6369 static void i40e_verify_eeprom(struct i40e_pf *pf)
6373 err = i40e_diag_eeprom_test(&pf->hw);
6375 /* retry in case of garbage read */
6376 err = i40e_diag_eeprom_test(&pf->hw);
6378 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6380 set_bit(__I40E_BAD_EEPROM, &pf->state);
6384 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6385 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6386 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6391 * i40e_enable_pf_switch_lb
6392 * @pf: pointer to the PF structure
6394 * enable switch loop back or die - no point in a return value
6396 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6398 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6399 struct i40e_vsi_context ctxt;
6402 ctxt.seid = pf->main_vsi_seid;
6403 ctxt.pf_num = pf->hw.pf_id;
6405 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6407 dev_info(&pf->pdev->dev,
6408 "couldn't get PF vsi config, err %s aq_err %s\n",
6409 i40e_stat_str(&pf->hw, ret),
6410 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6413 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6414 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6415 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6417 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6419 dev_info(&pf->pdev->dev,
6420 "update vsi switch failed, err %s aq_err %s\n",
6421 i40e_stat_str(&pf->hw, ret),
6422 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6427 * i40e_disable_pf_switch_lb
6428 * @pf: pointer to the PF structure
6430 * disable switch loop back or die - no point in a return value
6432 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6434 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6435 struct i40e_vsi_context ctxt;
6438 ctxt.seid = pf->main_vsi_seid;
6439 ctxt.pf_num = pf->hw.pf_id;
6441 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6443 dev_info(&pf->pdev->dev,
6444 "couldn't get PF vsi config, err %s aq_err %s\n",
6445 i40e_stat_str(&pf->hw, ret),
6446 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6449 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6450 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6451 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6453 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6455 dev_info(&pf->pdev->dev,
6456 "update vsi switch failed, err %s aq_err %s\n",
6457 i40e_stat_str(&pf->hw, ret),
6458 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6463 * i40e_config_bridge_mode - Configure the HW bridge mode
6464 * @veb: pointer to the bridge instance
6466 * Configure the loop back mode for the LAN VSI that is downlink to the
6467 * specified HW bridge instance. It is expected this function is called
6468 * when a new HW bridge is instantiated.
6470 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6472 struct i40e_pf *pf = veb->pf;
6474 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6475 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6476 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6477 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6478 i40e_disable_pf_switch_lb(pf);
6480 i40e_enable_pf_switch_lb(pf);
6484 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6485 * @veb: pointer to the VEB instance
6487 * This is a recursive function that first builds the attached VSIs then
6488 * recurses in to build the next layer of VEB. We track the connections
6489 * through our own index numbers because the seid's from the HW could
6490 * change across the reset.
6492 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6494 struct i40e_vsi *ctl_vsi = NULL;
6495 struct i40e_pf *pf = veb->pf;
6499 /* build VSI that owns this VEB, temporarily attached to base VEB */
6500 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6502 pf->vsi[v]->veb_idx == veb->idx &&
6503 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6504 ctl_vsi = pf->vsi[v];
6509 dev_info(&pf->pdev->dev,
6510 "missing owner VSI for veb_idx %d\n", veb->idx);
6512 goto end_reconstitute;
6514 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6515 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6516 ret = i40e_add_vsi(ctl_vsi);
6518 dev_info(&pf->pdev->dev,
6519 "rebuild of veb_idx %d owner VSI failed: %d\n",
6521 goto end_reconstitute;
6523 i40e_vsi_reset_stats(ctl_vsi);
6525 /* create the VEB in the switch and move the VSI onto the VEB */
6526 ret = i40e_add_veb(veb, ctl_vsi);
6528 goto end_reconstitute;
6530 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6531 veb->bridge_mode = BRIDGE_MODE_VEB;
6533 veb->bridge_mode = BRIDGE_MODE_VEPA;
6534 i40e_config_bridge_mode(veb);
6536 /* create the remaining VSIs attached to this VEB */
6537 for (v = 0; v < pf->num_alloc_vsi; v++) {
6538 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6541 if (pf->vsi[v]->veb_idx == veb->idx) {
6542 struct i40e_vsi *vsi = pf->vsi[v];
6544 vsi->uplink_seid = veb->seid;
6545 ret = i40e_add_vsi(vsi);
6547 dev_info(&pf->pdev->dev,
6548 "rebuild of vsi_idx %d failed: %d\n",
6550 goto end_reconstitute;
6552 i40e_vsi_reset_stats(vsi);
6556 /* create any VEBs attached to this VEB - RECURSION */
6557 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6558 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6559 pf->veb[veb_idx]->uplink_seid = veb->seid;
6560 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6571 * i40e_get_capabilities - get info about the HW
6572 * @pf: the PF struct
6574 static int i40e_get_capabilities(struct i40e_pf *pf)
6576 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6581 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6583 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6587 /* this loads the data into the hw struct for us */
6588 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6590 i40e_aqc_opc_list_func_capabilities,
6592 /* data loaded, buffer no longer needed */
6595 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6596 /* retry with a larger buffer */
6597 buf_len = data_size;
6598 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6599 dev_info(&pf->pdev->dev,
6600 "capability discovery failed, err %s aq_err %s\n",
6601 i40e_stat_str(&pf->hw, err),
6602 i40e_aq_str(&pf->hw,
6603 pf->hw.aq.asq_last_status));
6608 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6609 dev_info(&pf->pdev->dev,
6610 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6611 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6612 pf->hw.func_caps.num_msix_vectors,
6613 pf->hw.func_caps.num_msix_vectors_vf,
6614 pf->hw.func_caps.fd_filters_guaranteed,
6615 pf->hw.func_caps.fd_filters_best_effort,
6616 pf->hw.func_caps.num_tx_qp,
6617 pf->hw.func_caps.num_vsis);
6619 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6620 + pf->hw.func_caps.num_vfs)
6621 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6622 dev_info(&pf->pdev->dev,
6623 "got num_vsis %d, setting num_vsis to %d\n",
6624 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6625 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6631 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6634 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6635 * @pf: board private structure
6637 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6639 struct i40e_vsi *vsi;
6642 /* quick workaround for an NVM issue that leaves a critical register
6645 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6646 static const u32 hkey[] = {
6647 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6648 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6649 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6652 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6653 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6656 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6659 /* find existing VSI and see if it needs configuring */
6661 for (i = 0; i < pf->num_alloc_vsi; i++) {
6662 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6668 /* create a new VSI if none exists */
6670 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6671 pf->vsi[pf->lan_vsi]->seid, 0);
6673 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6674 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6679 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6683 * i40e_fdir_teardown - release the Flow Director resources
6684 * @pf: board private structure
6686 static void i40e_fdir_teardown(struct i40e_pf *pf)
6690 i40e_fdir_filter_exit(pf);
6691 for (i = 0; i < pf->num_alloc_vsi; i++) {
6692 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6693 i40e_vsi_release(pf->vsi[i]);
6700 * i40e_prep_for_reset - prep for the core to reset
6701 * @pf: board private structure
6703 * Close up the VFs and other things in prep for PF Reset.
6705 static void i40e_prep_for_reset(struct i40e_pf *pf)
6707 struct i40e_hw *hw = &pf->hw;
6708 i40e_status ret = 0;
6711 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6712 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6715 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6717 /* quiesce the VSIs and their queues that are not already DOWN */
6718 i40e_pf_quiesce_all_vsi(pf);
6720 for (v = 0; v < pf->num_alloc_vsi; v++) {
6722 pf->vsi[v]->seid = 0;
6725 i40e_shutdown_adminq(&pf->hw);
6727 /* call shutdown HMC */
6728 if (hw->hmc.hmc_obj) {
6729 ret = i40e_shutdown_lan_hmc(hw);
6731 dev_warn(&pf->pdev->dev,
6732 "shutdown_lan_hmc failed: %d\n", ret);
6737 * i40e_send_version - update firmware with driver version
6740 static void i40e_send_version(struct i40e_pf *pf)
6742 struct i40e_driver_version dv;
6744 dv.major_version = DRV_VERSION_MAJOR;
6745 dv.minor_version = DRV_VERSION_MINOR;
6746 dv.build_version = DRV_VERSION_BUILD;
6747 dv.subbuild_version = 0;
6748 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6749 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6753 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6754 * @pf: board private structure
6755 * @reinit: if the Main VSI needs to re-initialized.
6757 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6759 struct i40e_hw *hw = &pf->hw;
6760 u8 set_fc_aq_fail = 0;
6765 /* Now we wait for GRST to settle out.
6766 * We don't have to delete the VEBs or VSIs from the hw switch
6767 * because the reset will make them disappear.
6769 ret = i40e_pf_reset(hw);
6771 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6772 set_bit(__I40E_RESET_FAILED, &pf->state);
6773 goto clear_recovery;
6777 if (test_bit(__I40E_DOWN, &pf->state))
6778 goto clear_recovery;
6779 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6781 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6782 ret = i40e_init_adminq(&pf->hw);
6784 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6785 i40e_stat_str(&pf->hw, ret),
6786 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6787 goto clear_recovery;
6790 /* re-verify the eeprom if we just had an EMP reset */
6791 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6792 i40e_verify_eeprom(pf);
6794 i40e_clear_pxe_mode(hw);
6795 ret = i40e_get_capabilities(pf);
6797 goto end_core_reset;
6799 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6800 hw->func_caps.num_rx_qp,
6801 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6803 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6804 goto end_core_reset;
6806 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6808 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6809 goto end_core_reset;
6812 #ifdef CONFIG_I40E_DCB
6813 ret = i40e_init_pf_dcb(pf);
6815 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6816 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6817 /* Continue without DCB enabled */
6819 #endif /* CONFIG_I40E_DCB */
6821 i40e_init_pf_fcoe(pf);
6824 /* do basic switch setup */
6825 ret = i40e_setup_pf_switch(pf, reinit);
6827 goto end_core_reset;
6829 /* driver is only interested in link up/down and module qualification
6830 * reports from firmware
6832 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6833 I40E_AQ_EVENT_LINK_UPDOWN |
6834 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6836 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6837 i40e_stat_str(&pf->hw, ret),
6838 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6840 /* make sure our flow control settings are restored */
6841 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6843 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6844 i40e_stat_str(&pf->hw, ret),
6845 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6847 /* Rebuild the VSIs and VEBs that existed before reset.
6848 * They are still in our local switch element arrays, so only
6849 * need to rebuild the switch model in the HW.
6851 * If there were VEBs but the reconstitution failed, we'll try
6852 * try to recover minimal use by getting the basic PF VSI working.
6854 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6855 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6856 /* find the one VEB connected to the MAC, and find orphans */
6857 for (v = 0; v < I40E_MAX_VEB; v++) {
6861 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6862 pf->veb[v]->uplink_seid == 0) {
6863 ret = i40e_reconstitute_veb(pf->veb[v]);
6868 /* If Main VEB failed, we're in deep doodoo,
6869 * so give up rebuilding the switch and set up
6870 * for minimal rebuild of PF VSI.
6871 * If orphan failed, we'll report the error
6872 * but try to keep going.
6874 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6875 dev_info(&pf->pdev->dev,
6876 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6878 pf->vsi[pf->lan_vsi]->uplink_seid
6881 } else if (pf->veb[v]->uplink_seid == 0) {
6882 dev_info(&pf->pdev->dev,
6883 "rebuild of orphan VEB failed: %d\n",
6890 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6891 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6892 /* no VEB, so rebuild only the Main VSI */
6893 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6895 dev_info(&pf->pdev->dev,
6896 "rebuild of Main VSI failed: %d\n", ret);
6897 goto end_core_reset;
6901 /* Reconfigure hardware for allowing smaller MSS in the case
6902 * of TSO, so that we avoid the MDD being fired and causing
6903 * a reset in the case of small MSS+TSO.
6905 #define I40E_REG_MSS 0x000E64DC
6906 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6907 #define I40E_64BYTE_MSS 0x400000
6908 val = rd32(hw, I40E_REG_MSS);
6909 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6910 val &= ~I40E_REG_MSS_MIN_MASK;
6911 val |= I40E_64BYTE_MSS;
6912 wr32(hw, I40E_REG_MSS, val);
6915 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6916 (pf->hw.aq.fw_maj_ver < 4)) {
6918 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6920 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6921 i40e_stat_str(&pf->hw, ret),
6922 i40e_aq_str(&pf->hw,
6923 pf->hw.aq.asq_last_status));
6925 /* reinit the misc interrupt */
6926 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6927 ret = i40e_setup_misc_vector(pf);
6929 /* Add a filter to drop all Flow control frames from any VSI from being
6930 * transmitted. By doing so we stop a malicious VF from sending out
6931 * PAUSE or PFC frames and potentially controlling traffic for other
6933 * The FW can still send Flow control frames if enabled.
6935 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6938 /* restart the VSIs that were rebuilt and running before the reset */
6939 i40e_pf_unquiesce_all_vsi(pf);
6941 if (pf->num_alloc_vfs) {
6942 for (v = 0; v < pf->num_alloc_vfs; v++)
6943 i40e_reset_vf(&pf->vf[v], true);
6946 /* tell the firmware that we're starting */
6947 i40e_send_version(pf);
6950 clear_bit(__I40E_RESET_FAILED, &pf->state);
6952 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6956 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6957 * @pf: board private structure
6959 * Close up the VFs and other things in prep for a Core Reset,
6960 * then get ready to rebuild the world.
6962 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6964 i40e_prep_for_reset(pf);
6965 i40e_reset_and_rebuild(pf, false);
6969 * i40e_handle_mdd_event
6970 * @pf: pointer to the PF structure
6972 * Called from the MDD irq handler to identify possibly malicious vfs
6974 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6976 struct i40e_hw *hw = &pf->hw;
6977 bool mdd_detected = false;
6978 bool pf_mdd_detected = false;
6983 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6986 /* find what triggered the MDD event */
6987 reg = rd32(hw, I40E_GL_MDET_TX);
6988 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6989 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6990 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6991 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6992 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6993 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6994 I40E_GL_MDET_TX_EVENT_SHIFT;
6995 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6996 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6997 pf->hw.func_caps.base_queue;
6998 if (netif_msg_tx_err(pf))
6999 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7000 event, queue, pf_num, vf_num);
7001 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7002 mdd_detected = true;
7004 reg = rd32(hw, I40E_GL_MDET_RX);
7005 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7006 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7007 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7008 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7009 I40E_GL_MDET_RX_EVENT_SHIFT;
7010 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7011 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7012 pf->hw.func_caps.base_queue;
7013 if (netif_msg_rx_err(pf))
7014 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7015 event, queue, func);
7016 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7017 mdd_detected = true;
7021 reg = rd32(hw, I40E_PF_MDET_TX);
7022 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7023 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7024 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7025 pf_mdd_detected = true;
7027 reg = rd32(hw, I40E_PF_MDET_RX);
7028 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7029 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7030 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7031 pf_mdd_detected = true;
7033 /* Queue belongs to the PF, initiate a reset */
7034 if (pf_mdd_detected) {
7035 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7036 i40e_service_event_schedule(pf);
7040 /* see if one of the VFs needs its hand slapped */
7041 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7043 reg = rd32(hw, I40E_VP_MDET_TX(i));
7044 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7045 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7046 vf->num_mdd_events++;
7047 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7051 reg = rd32(hw, I40E_VP_MDET_RX(i));
7052 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7053 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7054 vf->num_mdd_events++;
7055 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7059 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7060 dev_info(&pf->pdev->dev,
7061 "Too many MDD events on VF %d, disabled\n", i);
7062 dev_info(&pf->pdev->dev,
7063 "Use PF Control I/F to re-enable the VF\n");
7064 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7068 /* re-enable mdd interrupt cause */
7069 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7070 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7071 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7072 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7077 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7078 * @pf: board private structure
7080 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7082 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7083 struct i40e_hw *hw = &pf->hw;
7088 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7091 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7093 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7094 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7095 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7096 port = pf->udp_ports[i].index;
7098 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7099 pf->udp_ports[i].type,
7102 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7105 dev_info(&pf->pdev->dev,
7106 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7107 port ? "add" : "delete",
7109 i40e_stat_str(&pf->hw, ret),
7110 i40e_aq_str(&pf->hw,
7111 pf->hw.aq.asq_last_status));
7112 pf->udp_ports[i].index = 0;
7120 * i40e_service_task - Run the driver's async subtasks
7121 * @work: pointer to work_struct containing our data
7123 static void i40e_service_task(struct work_struct *work)
7125 struct i40e_pf *pf = container_of(work,
7128 unsigned long start_time = jiffies;
7130 /* don't bother with service tasks if a reset is in progress */
7131 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7132 i40e_service_event_complete(pf);
7136 i40e_detect_recover_hung(pf);
7137 i40e_reset_subtask(pf);
7138 i40e_handle_mdd_event(pf);
7139 i40e_vc_process_vflr_event(pf);
7140 i40e_watchdog_subtask(pf);
7141 i40e_fdir_reinit_subtask(pf);
7142 i40e_client_subtask(pf);
7143 i40e_sync_filters_subtask(pf);
7144 i40e_sync_udp_filters_subtask(pf);
7145 i40e_clean_adminq_subtask(pf);
7147 i40e_service_event_complete(pf);
7149 /* If the tasks have taken longer than one timer cycle or there
7150 * is more work to be done, reschedule the service task now
7151 * rather than wait for the timer to tick again.
7153 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7154 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7155 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7156 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7157 i40e_service_event_schedule(pf);
7161 * i40e_service_timer - timer callback
7162 * @data: pointer to PF struct
7164 static void i40e_service_timer(unsigned long data)
7166 struct i40e_pf *pf = (struct i40e_pf *)data;
7168 mod_timer(&pf->service_timer,
7169 round_jiffies(jiffies + pf->service_timer_period));
7170 i40e_service_event_schedule(pf);
7174 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7175 * @vsi: the VSI being configured
7177 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7179 struct i40e_pf *pf = vsi->back;
7181 switch (vsi->type) {
7183 vsi->alloc_queue_pairs = pf->num_lan_qps;
7184 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7185 I40E_REQ_DESCRIPTOR_MULTIPLE);
7186 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7187 vsi->num_q_vectors = pf->num_lan_msix;
7189 vsi->num_q_vectors = 1;
7194 vsi->alloc_queue_pairs = 1;
7195 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7196 I40E_REQ_DESCRIPTOR_MULTIPLE);
7197 vsi->num_q_vectors = 1;
7200 case I40E_VSI_VMDQ2:
7201 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7202 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7203 I40E_REQ_DESCRIPTOR_MULTIPLE);
7204 vsi->num_q_vectors = pf->num_vmdq_msix;
7207 case I40E_VSI_SRIOV:
7208 vsi->alloc_queue_pairs = pf->num_vf_qps;
7209 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7210 I40E_REQ_DESCRIPTOR_MULTIPLE);
7215 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7216 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7217 I40E_REQ_DESCRIPTOR_MULTIPLE);
7218 vsi->num_q_vectors = pf->num_fcoe_msix;
7221 #endif /* I40E_FCOE */
7231 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7232 * @type: VSI pointer
7233 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7235 * On error: returns error code (negative)
7236 * On success: returns 0
7238 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7243 /* allocate memory for both Tx and Rx ring pointers */
7244 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7245 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7248 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7250 if (alloc_qvectors) {
7251 /* allocate memory for q_vector pointers */
7252 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7253 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7254 if (!vsi->q_vectors) {
7262 kfree(vsi->tx_rings);
7267 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7268 * @pf: board private structure
7269 * @type: type of VSI
7271 * On error: returns error code (negative)
7272 * On success: returns vsi index in PF (positive)
7274 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7277 struct i40e_vsi *vsi;
7281 /* Need to protect the allocation of the VSIs at the PF level */
7282 mutex_lock(&pf->switch_mutex);
7284 /* VSI list may be fragmented if VSI creation/destruction has
7285 * been happening. We can afford to do a quick scan to look
7286 * for any free VSIs in the list.
7288 * find next empty vsi slot, looping back around if necessary
7291 while (i < pf->num_alloc_vsi && pf->vsi[i])
7293 if (i >= pf->num_alloc_vsi) {
7295 while (i < pf->next_vsi && pf->vsi[i])
7299 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7300 vsi_idx = i; /* Found one! */
7303 goto unlock_pf; /* out of VSI slots! */
7307 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7314 set_bit(__I40E_DOWN, &vsi->state);
7317 vsi->rx_itr_setting = pf->rx_itr_default;
7318 vsi->tx_itr_setting = pf->tx_itr_default;
7319 vsi->int_rate_limit = 0;
7320 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7321 pf->rss_table_size : 64;
7322 vsi->netdev_registered = false;
7323 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7324 INIT_LIST_HEAD(&vsi->mac_filter_list);
7325 vsi->irqs_ready = false;
7327 ret = i40e_set_num_rings_in_vsi(vsi);
7331 ret = i40e_vsi_alloc_arrays(vsi, true);
7335 /* Setup default MSIX irq handler for VSI */
7336 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7338 /* Initialize VSI lock */
7339 spin_lock_init(&vsi->mac_filter_list_lock);
7340 pf->vsi[vsi_idx] = vsi;
7345 pf->next_vsi = i - 1;
7348 mutex_unlock(&pf->switch_mutex);
7353 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7354 * @type: VSI pointer
7355 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7357 * On error: returns error code (negative)
7358 * On success: returns 0
7360 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7362 /* free the ring and vector containers */
7363 if (free_qvectors) {
7364 kfree(vsi->q_vectors);
7365 vsi->q_vectors = NULL;
7367 kfree(vsi->tx_rings);
7368 vsi->tx_rings = NULL;
7369 vsi->rx_rings = NULL;
7373 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7375 * @vsi: Pointer to VSI structure
7377 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7382 kfree(vsi->rss_hkey_user);
7383 vsi->rss_hkey_user = NULL;
7385 kfree(vsi->rss_lut_user);
7386 vsi->rss_lut_user = NULL;
7390 * i40e_vsi_clear - Deallocate the VSI provided
7391 * @vsi: the VSI being un-configured
7393 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7404 mutex_lock(&pf->switch_mutex);
7405 if (!pf->vsi[vsi->idx]) {
7406 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7407 vsi->idx, vsi->idx, vsi, vsi->type);
7411 if (pf->vsi[vsi->idx] != vsi) {
7412 dev_err(&pf->pdev->dev,
7413 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7414 pf->vsi[vsi->idx]->idx,
7416 pf->vsi[vsi->idx]->type,
7417 vsi->idx, vsi, vsi->type);
7421 /* updates the PF for this cleared vsi */
7422 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7423 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7425 i40e_vsi_free_arrays(vsi, true);
7426 i40e_clear_rss_config_user(vsi);
7428 pf->vsi[vsi->idx] = NULL;
7429 if (vsi->idx < pf->next_vsi)
7430 pf->next_vsi = vsi->idx;
7433 mutex_unlock(&pf->switch_mutex);
7441 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7442 * @vsi: the VSI being cleaned
7444 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7448 if (vsi->tx_rings && vsi->tx_rings[0]) {
7449 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7450 kfree_rcu(vsi->tx_rings[i], rcu);
7451 vsi->tx_rings[i] = NULL;
7452 vsi->rx_rings[i] = NULL;
7458 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7459 * @vsi: the VSI being configured
7461 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7463 struct i40e_ring *tx_ring, *rx_ring;
7464 struct i40e_pf *pf = vsi->back;
7467 /* Set basic values in the rings to be used later during open() */
7468 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7469 /* allocate space for both Tx and Rx in one shot */
7470 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7474 tx_ring->queue_index = i;
7475 tx_ring->reg_idx = vsi->base_queue + i;
7476 tx_ring->ring_active = false;
7478 tx_ring->netdev = vsi->netdev;
7479 tx_ring->dev = &pf->pdev->dev;
7480 tx_ring->count = vsi->num_desc;
7482 tx_ring->dcb_tc = 0;
7483 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7484 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7485 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7486 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7487 vsi->tx_rings[i] = tx_ring;
7489 rx_ring = &tx_ring[1];
7490 rx_ring->queue_index = i;
7491 rx_ring->reg_idx = vsi->base_queue + i;
7492 rx_ring->ring_active = false;
7494 rx_ring->netdev = vsi->netdev;
7495 rx_ring->dev = &pf->pdev->dev;
7496 rx_ring->count = vsi->num_desc;
7498 rx_ring->dcb_tc = 0;
7499 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7500 set_ring_16byte_desc_enabled(rx_ring);
7502 clear_ring_16byte_desc_enabled(rx_ring);
7503 vsi->rx_rings[i] = rx_ring;
7509 i40e_vsi_clear_rings(vsi);
7514 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7515 * @pf: board private structure
7516 * @vectors: the number of MSI-X vectors to request
7518 * Returns the number of vectors reserved, or error
7520 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7522 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7523 I40E_MIN_MSIX, vectors);
7525 dev_info(&pf->pdev->dev,
7526 "MSI-X vector reservation failed: %d\n", vectors);
7534 * i40e_init_msix - Setup the MSIX capability
7535 * @pf: board private structure
7537 * Work with the OS to set up the MSIX vectors needed.
7539 * Returns the number of vectors reserved or negative on failure
7541 static int i40e_init_msix(struct i40e_pf *pf)
7543 struct i40e_hw *hw = &pf->hw;
7547 int iwarp_requested = 0;
7549 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7552 /* The number of vectors we'll request will be comprised of:
7553 * - Add 1 for "other" cause for Admin Queue events, etc.
7554 * - The number of LAN queue pairs
7555 * - Queues being used for RSS.
7556 * We don't need as many as max_rss_size vectors.
7557 * use rss_size instead in the calculation since that
7558 * is governed by number of cpus in the system.
7559 * - assumes symmetric Tx/Rx pairing
7560 * - The number of VMDq pairs
7561 * - The CPU count within the NUMA node if iWARP is enabled
7563 * - The number of FCOE qps.
7565 * Once we count this up, try the request.
7567 * If we can't get what we want, we'll simplify to nearly nothing
7568 * and try again. If that still fails, we punt.
7570 vectors_left = hw->func_caps.num_msix_vectors;
7573 /* reserve one vector for miscellaneous handler */
7579 /* reserve vectors for the main PF traffic queues */
7580 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7581 vectors_left -= pf->num_lan_msix;
7582 v_budget += pf->num_lan_msix;
7584 /* reserve one vector for sideband flow director */
7585 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7590 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7595 /* can we reserve enough for FCoE? */
7596 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7598 pf->num_fcoe_msix = 0;
7599 else if (vectors_left >= pf->num_fcoe_qps)
7600 pf->num_fcoe_msix = pf->num_fcoe_qps;
7602 pf->num_fcoe_msix = 1;
7603 v_budget += pf->num_fcoe_msix;
7604 vectors_left -= pf->num_fcoe_msix;
7608 /* can we reserve enough for iWARP? */
7609 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7611 pf->num_iwarp_msix = 0;
7612 else if (vectors_left < pf->num_iwarp_msix)
7613 pf->num_iwarp_msix = 1;
7614 v_budget += pf->num_iwarp_msix;
7615 vectors_left -= pf->num_iwarp_msix;
7618 /* any vectors left over go for VMDq support */
7619 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7620 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7621 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7623 /* if we're short on vectors for what's desired, we limit
7624 * the queues per vmdq. If this is still more than are
7625 * available, the user will need to change the number of
7626 * queues/vectors used by the PF later with the ethtool
7629 if (vmdq_vecs < vmdq_vecs_wanted)
7630 pf->num_vmdq_qps = 1;
7631 pf->num_vmdq_msix = pf->num_vmdq_qps;
7633 v_budget += vmdq_vecs;
7634 vectors_left -= vmdq_vecs;
7637 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7639 if (!pf->msix_entries)
7642 for (i = 0; i < v_budget; i++)
7643 pf->msix_entries[i].entry = i;
7644 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7646 if (v_actual != v_budget) {
7647 /* If we have limited resources, we will start with no vectors
7648 * for the special features and then allocate vectors to some
7649 * of these features based on the policy and at the end disable
7650 * the features that did not get any vectors.
7652 iwarp_requested = pf->num_iwarp_msix;
7653 pf->num_iwarp_msix = 0;
7655 pf->num_fcoe_qps = 0;
7656 pf->num_fcoe_msix = 0;
7658 pf->num_vmdq_msix = 0;
7661 if (v_actual < I40E_MIN_MSIX) {
7662 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7663 kfree(pf->msix_entries);
7664 pf->msix_entries = NULL;
7667 } else if (v_actual == I40E_MIN_MSIX) {
7668 /* Adjust for minimal MSIX use */
7669 pf->num_vmdq_vsis = 0;
7670 pf->num_vmdq_qps = 0;
7671 pf->num_lan_qps = 1;
7672 pf->num_lan_msix = 1;
7674 } else if (v_actual != v_budget) {
7677 /* reserve the misc vector */
7680 /* Scale vector usage down */
7681 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7682 pf->num_vmdq_vsis = 1;
7683 pf->num_vmdq_qps = 1;
7684 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7686 /* partition out the remaining vectors */
7689 pf->num_lan_msix = 1;
7692 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7693 pf->num_lan_msix = 1;
7694 pf->num_iwarp_msix = 1;
7696 pf->num_lan_msix = 2;
7699 /* give one vector to FCoE */
7700 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7701 pf->num_lan_msix = 1;
7702 pf->num_fcoe_msix = 1;
7707 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7708 pf->num_iwarp_msix = min_t(int, (vec / 3),
7710 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7711 I40E_DEFAULT_NUM_VMDQ_VSI);
7713 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7714 I40E_DEFAULT_NUM_VMDQ_VSI);
7716 pf->num_lan_msix = min_t(int,
7717 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7720 /* give one vector to FCoE */
7721 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7722 pf->num_fcoe_msix = 1;
7730 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7731 (pf->num_vmdq_msix == 0)) {
7732 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7733 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7736 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7737 (pf->num_iwarp_msix == 0)) {
7738 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7739 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7743 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7744 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7745 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7752 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7753 * @vsi: the VSI being configured
7754 * @v_idx: index of the vector in the vsi struct
7756 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7758 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7760 struct i40e_q_vector *q_vector;
7762 /* allocate q_vector */
7763 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7767 q_vector->vsi = vsi;
7768 q_vector->v_idx = v_idx;
7769 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7771 netif_napi_add(vsi->netdev, &q_vector->napi,
7772 i40e_napi_poll, NAPI_POLL_WEIGHT);
7774 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7775 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7777 /* tie q_vector and vsi together */
7778 vsi->q_vectors[v_idx] = q_vector;
7784 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7785 * @vsi: the VSI being configured
7787 * We allocate one q_vector per queue interrupt. If allocation fails we
7790 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7792 struct i40e_pf *pf = vsi->back;
7793 int v_idx, num_q_vectors;
7796 /* if not MSIX, give the one vector only to the LAN VSI */
7797 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7798 num_q_vectors = vsi->num_q_vectors;
7799 else if (vsi == pf->vsi[pf->lan_vsi])
7804 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7805 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7814 i40e_free_q_vector(vsi, v_idx);
7820 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7821 * @pf: board private structure to initialize
7823 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7828 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7829 vectors = i40e_init_msix(pf);
7831 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7832 I40E_FLAG_IWARP_ENABLED |
7834 I40E_FLAG_FCOE_ENABLED |
7836 I40E_FLAG_RSS_ENABLED |
7837 I40E_FLAG_DCB_CAPABLE |
7838 I40E_FLAG_SRIOV_ENABLED |
7839 I40E_FLAG_FD_SB_ENABLED |
7840 I40E_FLAG_FD_ATR_ENABLED |
7841 I40E_FLAG_VMDQ_ENABLED);
7843 /* rework the queue expectations without MSIX */
7844 i40e_determine_queue_usage(pf);
7848 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7849 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7850 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7851 vectors = pci_enable_msi(pf->pdev);
7853 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7855 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7857 vectors = 1; /* one MSI or Legacy vector */
7860 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7861 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7863 /* set up vector assignment tracking */
7864 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7865 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7866 if (!pf->irq_pile) {
7867 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7870 pf->irq_pile->num_entries = vectors;
7871 pf->irq_pile->search_hint = 0;
7873 /* track first vector for misc interrupts, ignore return */
7874 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7880 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7881 * @pf: board private structure
7883 * This sets up the handler for MSIX 0, which is used to manage the
7884 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7885 * when in MSI or Legacy interrupt mode.
7887 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7889 struct i40e_hw *hw = &pf->hw;
7892 /* Only request the irq if this is the first time through, and
7893 * not when we're rebuilding after a Reset
7895 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7896 err = request_irq(pf->msix_entries[0].vector,
7897 i40e_intr, 0, pf->int_name, pf);
7899 dev_info(&pf->pdev->dev,
7900 "request_irq for %s failed: %d\n",
7906 i40e_enable_misc_int_causes(pf);
7908 /* associate no queues to the misc vector */
7909 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7910 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7914 i40e_irq_dynamic_enable_icr0(pf);
7920 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7921 * @vsi: vsi structure
7922 * @seed: RSS hash seed
7924 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7925 u8 *lut, u16 lut_size)
7927 struct i40e_aqc_get_set_rss_key_data rss_key;
7928 struct i40e_pf *pf = vsi->back;
7929 struct i40e_hw *hw = &pf->hw;
7930 bool pf_lut = false;
7934 memset(&rss_key, 0, sizeof(rss_key));
7935 memcpy(&rss_key, seed, sizeof(rss_key));
7937 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7941 /* Populate the LUT with max no. of queues in round robin fashion */
7942 for (i = 0; i < vsi->rss_table_size; i++)
7943 rss_lut[i] = i % vsi->rss_size;
7945 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7947 dev_info(&pf->pdev->dev,
7948 "Cannot set RSS key, err %s aq_err %s\n",
7949 i40e_stat_str(&pf->hw, ret),
7950 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7951 goto config_rss_aq_out;
7954 if (vsi->type == I40E_VSI_MAIN)
7957 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7958 vsi->rss_table_size);
7960 dev_info(&pf->pdev->dev,
7961 "Cannot set RSS lut, err %s aq_err %s\n",
7962 i40e_stat_str(&pf->hw, ret),
7963 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7971 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7972 * @vsi: VSI structure
7974 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7976 u8 seed[I40E_HKEY_ARRAY_SIZE];
7977 struct i40e_pf *pf = vsi->back;
7981 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7984 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7988 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7989 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7990 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7991 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7998 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7999 * @vsi: Pointer to vsi structure
8000 * @seed: RSS hash seed
8001 * @lut: Lookup table
8002 * @lut_size: Lookup table size
8004 * Returns 0 on success, negative on failure
8006 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8007 const u8 *lut, u16 lut_size)
8009 struct i40e_pf *pf = vsi->back;
8010 struct i40e_hw *hw = &pf->hw;
8013 /* Fill out hash function seed */
8015 u32 *seed_dw = (u32 *)seed;
8017 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8018 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8022 u32 *lut_dw = (u32 *)lut;
8024 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8027 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8028 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8036 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8037 * @vsi: Pointer to VSI structure
8038 * @seed: Buffer to store the keys
8039 * @lut: Buffer to store the lookup table entries
8040 * @lut_size: Size of buffer to store the lookup table entries
8042 * Returns 0 on success, negative on failure
8044 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8045 u8 *lut, u16 lut_size)
8047 struct i40e_pf *pf = vsi->back;
8048 struct i40e_hw *hw = &pf->hw;
8052 u32 *seed_dw = (u32 *)seed;
8054 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8055 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
8058 u32 *lut_dw = (u32 *)lut;
8060 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8062 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8063 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8070 * i40e_config_rss - Configure RSS keys and lut
8071 * @vsi: Pointer to VSI structure
8072 * @seed: RSS hash seed
8073 * @lut: Lookup table
8074 * @lut_size: Lookup table size
8076 * Returns 0 on success, negative on failure
8078 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8080 struct i40e_pf *pf = vsi->back;
8082 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8083 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8085 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8089 * i40e_get_rss - Get RSS keys and lut
8090 * @vsi: Pointer to VSI structure
8091 * @seed: Buffer to store the keys
8092 * @lut: Buffer to store the lookup table entries
8093 * lut_size: Size of buffer to store the lookup table entries
8095 * Returns 0 on success, negative on failure
8097 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8099 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8103 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8104 * @pf: Pointer to board private structure
8105 * @lut: Lookup table
8106 * @rss_table_size: Lookup table size
8107 * @rss_size: Range of queue number for hashing
8109 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8110 u16 rss_table_size, u16 rss_size)
8114 for (i = 0; i < rss_table_size; i++)
8115 lut[i] = i % rss_size;
8119 * i40e_pf_config_rss - Prepare for RSS if used
8120 * @pf: board private structure
8122 static int i40e_pf_config_rss(struct i40e_pf *pf)
8124 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8125 u8 seed[I40E_HKEY_ARRAY_SIZE];
8127 struct i40e_hw *hw = &pf->hw;
8132 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8133 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8134 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8135 hena |= i40e_pf_get_default_rss_hena(pf);
8137 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8138 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8140 /* Determine the RSS table size based on the hardware capabilities */
8141 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8142 reg_val = (pf->rss_table_size == 512) ?
8143 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8144 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8145 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8147 /* Determine the RSS size of the VSI */
8149 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8150 vsi->num_queue_pairs);
8152 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8156 /* Use user configured lut if there is one, otherwise use default */
8157 if (vsi->rss_lut_user)
8158 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8160 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8162 /* Use user configured hash key if there is one, otherwise
8165 if (vsi->rss_hkey_user)
8166 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8168 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8169 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8176 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8177 * @pf: board private structure
8178 * @queue_count: the requested queue count for rss.
8180 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8181 * count which may be different from the requested queue count.
8183 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8185 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8188 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8191 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8193 if (queue_count != vsi->num_queue_pairs) {
8194 vsi->req_queue_pairs = queue_count;
8195 i40e_prep_for_reset(pf);
8197 pf->alloc_rss_size = new_rss_size;
8199 i40e_reset_and_rebuild(pf, true);
8201 /* Discard the user configured hash keys and lut, if less
8202 * queues are enabled.
8204 if (queue_count < vsi->rss_size) {
8205 i40e_clear_rss_config_user(vsi);
8206 dev_dbg(&pf->pdev->dev,
8207 "discard user configured hash keys and lut\n");
8210 /* Reset vsi->rss_size, as number of enabled queues changed */
8211 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8212 vsi->num_queue_pairs);
8214 i40e_pf_config_rss(pf);
8216 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8217 pf->alloc_rss_size, pf->rss_size_max);
8218 return pf->alloc_rss_size;
8222 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8223 * @pf: board private structure
8225 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8228 bool min_valid, max_valid;
8231 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8232 &min_valid, &max_valid);
8236 pf->npar_min_bw = min_bw;
8238 pf->npar_max_bw = max_bw;
8245 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8246 * @pf: board private structure
8248 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8250 struct i40e_aqc_configure_partition_bw_data bw_data;
8253 /* Set the valid bit for this PF */
8254 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8255 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8256 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8258 /* Set the new bandwidths */
8259 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8265 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8266 * @pf: board private structure
8268 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8270 /* Commit temporary BW setting to permanent NVM image */
8271 enum i40e_admin_queue_err last_aq_status;
8275 if (pf->hw.partition_id != 1) {
8276 dev_info(&pf->pdev->dev,
8277 "Commit BW only works on partition 1! This is partition %d",
8278 pf->hw.partition_id);
8279 ret = I40E_NOT_SUPPORTED;
8283 /* Acquire NVM for read access */
8284 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8285 last_aq_status = pf->hw.aq.asq_last_status;
8287 dev_info(&pf->pdev->dev,
8288 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8289 i40e_stat_str(&pf->hw, ret),
8290 i40e_aq_str(&pf->hw, last_aq_status));
8294 /* Read word 0x10 of NVM - SW compatibility word 1 */
8295 ret = i40e_aq_read_nvm(&pf->hw,
8296 I40E_SR_NVM_CONTROL_WORD,
8297 0x10, sizeof(nvm_word), &nvm_word,
8299 /* Save off last admin queue command status before releasing
8302 last_aq_status = pf->hw.aq.asq_last_status;
8303 i40e_release_nvm(&pf->hw);
8305 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8306 i40e_stat_str(&pf->hw, ret),
8307 i40e_aq_str(&pf->hw, last_aq_status));
8311 /* Wait a bit for NVM release to complete */
8314 /* Acquire NVM for write access */
8315 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8316 last_aq_status = pf->hw.aq.asq_last_status;
8318 dev_info(&pf->pdev->dev,
8319 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8320 i40e_stat_str(&pf->hw, ret),
8321 i40e_aq_str(&pf->hw, last_aq_status));
8324 /* Write it back out unchanged to initiate update NVM,
8325 * which will force a write of the shadow (alt) RAM to
8326 * the NVM - thus storing the bandwidth values permanently.
8328 ret = i40e_aq_update_nvm(&pf->hw,
8329 I40E_SR_NVM_CONTROL_WORD,
8330 0x10, sizeof(nvm_word),
8331 &nvm_word, true, NULL);
8332 /* Save off last admin queue command status before releasing
8335 last_aq_status = pf->hw.aq.asq_last_status;
8336 i40e_release_nvm(&pf->hw);
8338 dev_info(&pf->pdev->dev,
8339 "BW settings NOT SAVED, err %s aq_err %s\n",
8340 i40e_stat_str(&pf->hw, ret),
8341 i40e_aq_str(&pf->hw, last_aq_status));
8348 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8349 * @pf: board private structure to initialize
8351 * i40e_sw_init initializes the Adapter private data structure.
8352 * Fields are initialized based on PCI device information and
8353 * OS network device settings (MTU size).
8355 static int i40e_sw_init(struct i40e_pf *pf)
8360 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8361 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8362 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8363 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8364 if (I40E_DEBUG_USER & debug)
8365 pf->hw.debug_mask = debug;
8366 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8367 I40E_DEFAULT_MSG_ENABLE);
8370 /* Set default capability flags */
8371 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8372 I40E_FLAG_MSI_ENABLED |
8373 I40E_FLAG_LINK_POLLING_ENABLED |
8374 I40E_FLAG_MSIX_ENABLED;
8376 if (iommu_present(&pci_bus_type))
8377 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8379 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8381 /* Set default ITR */
8382 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8383 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8385 /* Depending on PF configurations, it is possible that the RSS
8386 * maximum might end up larger than the available queues
8388 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8389 pf->alloc_rss_size = 1;
8390 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8391 pf->rss_size_max = min_t(int, pf->rss_size_max,
8392 pf->hw.func_caps.num_tx_qp);
8393 if (pf->hw.func_caps.rss) {
8394 pf->flags |= I40E_FLAG_RSS_ENABLED;
8395 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8399 /* MFP mode enabled */
8400 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8401 pf->flags |= I40E_FLAG_MFP_ENABLED;
8402 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8403 if (i40e_get_npar_bw_setting(pf))
8404 dev_warn(&pf->pdev->dev,
8405 "Could not get NPAR bw settings\n");
8407 dev_info(&pf->pdev->dev,
8408 "Min BW = %8.8x, Max BW = %8.8x\n",
8409 pf->npar_min_bw, pf->npar_max_bw);
8412 /* FW/NVM is not yet fixed in this regard */
8413 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8414 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8415 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8416 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8417 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8418 pf->hw.num_partitions > 1)
8419 dev_info(&pf->pdev->dev,
8420 "Flow Director Sideband mode Disabled in MFP mode\n");
8422 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8423 pf->fdir_pf_filter_count =
8424 pf->hw.func_caps.fd_filters_guaranteed;
8425 pf->hw.fdir_shared_filter_count =
8426 pf->hw.func_caps.fd_filters_best_effort;
8429 if (pf->hw.func_caps.vmdq) {
8430 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8431 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8432 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8435 if (pf->hw.func_caps.iwarp) {
8436 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8437 /* IWARP needs one extra vector for CQP just like MISC.*/
8438 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8442 i40e_init_pf_fcoe(pf);
8444 #endif /* I40E_FCOE */
8445 #ifdef CONFIG_PCI_IOV
8446 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8447 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8448 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8449 pf->num_req_vfs = min_t(int,
8450 pf->hw.func_caps.num_vfs,
8453 #endif /* CONFIG_PCI_IOV */
8454 if (pf->hw.mac.type == I40E_MAC_X722) {
8455 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8456 I40E_FLAG_128_QP_RSS_CAPABLE |
8457 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8458 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8459 I40E_FLAG_WB_ON_ITR_CAPABLE |
8460 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8461 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8463 pf->eeprom_version = 0xDEAD;
8464 pf->lan_veb = I40E_NO_VEB;
8465 pf->lan_vsi = I40E_NO_VSI;
8467 /* By default FW has this off for performance reasons */
8468 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8470 /* set up queue assignment tracking */
8471 size = sizeof(struct i40e_lump_tracking)
8472 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8473 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8478 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8479 pf->qp_pile->search_hint = 0;
8481 pf->tx_timeout_recovery_level = 1;
8483 mutex_init(&pf->switch_mutex);
8485 /* If NPAR is enabled nudge the Tx scheduler */
8486 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8487 i40e_set_npar_bw_setting(pf);
8494 * i40e_set_ntuple - set the ntuple feature flag and take action
8495 * @pf: board private structure to initialize
8496 * @features: the feature set that the stack is suggesting
8498 * returns a bool to indicate if reset needs to happen
8500 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8502 bool need_reset = false;
8504 /* Check if Flow Director n-tuple support was enabled or disabled. If
8505 * the state changed, we need to reset.
8507 if (features & NETIF_F_NTUPLE) {
8508 /* Enable filters and mark for reset */
8509 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8511 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8513 /* turn off filters, mark for reset and clear SW filter list */
8514 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8516 i40e_fdir_filter_exit(pf);
8518 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8519 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8520 /* reset fd counters */
8521 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8522 pf->fdir_pf_active_filters = 0;
8523 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8524 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8525 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8526 /* if ATR was auto disabled it can be re-enabled. */
8527 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8528 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8529 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8535 * i40e_set_features - set the netdev feature flags
8536 * @netdev: ptr to the netdev being adjusted
8537 * @features: the feature set that the stack is suggesting
8539 static int i40e_set_features(struct net_device *netdev,
8540 netdev_features_t features)
8542 struct i40e_netdev_priv *np = netdev_priv(netdev);
8543 struct i40e_vsi *vsi = np->vsi;
8544 struct i40e_pf *pf = vsi->back;
8547 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8548 i40e_vlan_stripping_enable(vsi);
8550 i40e_vlan_stripping_disable(vsi);
8552 need_reset = i40e_set_ntuple(pf, features);
8555 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8560 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8562 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8563 * @pf: board private structure
8564 * @port: The UDP port to look up
8566 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8568 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8572 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8573 if (pf->udp_ports[i].index == port)
8582 #if IS_ENABLED(CONFIG_VXLAN)
8584 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8585 * @netdev: This physical port's netdev
8586 * @sa_family: Socket Family that VXLAN is notifying us about
8587 * @port: New UDP port number that VXLAN started listening to
8589 static void i40e_add_vxlan_port(struct net_device *netdev,
8590 sa_family_t sa_family, __be16 port)
8592 struct i40e_netdev_priv *np = netdev_priv(netdev);
8593 struct i40e_vsi *vsi = np->vsi;
8594 struct i40e_pf *pf = vsi->back;
8598 if (sa_family == AF_INET6)
8601 idx = i40e_get_udp_port_idx(pf, port);
8603 /* Check if port already exists */
8604 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8605 netdev_info(netdev, "vxlan port %d already offloaded\n",
8610 /* Now check if there is space to add the new port */
8611 next_idx = i40e_get_udp_port_idx(pf, 0);
8613 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8614 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8619 /* New port: add it and mark its index in the bitmap */
8620 pf->udp_ports[next_idx].index = port;
8621 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8622 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8623 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8627 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8628 * @netdev: This physical port's netdev
8629 * @sa_family: Socket Family that VXLAN is notifying us about
8630 * @port: UDP port number that VXLAN stopped listening to
8632 static void i40e_del_vxlan_port(struct net_device *netdev,
8633 sa_family_t sa_family, __be16 port)
8635 struct i40e_netdev_priv *np = netdev_priv(netdev);
8636 struct i40e_vsi *vsi = np->vsi;
8637 struct i40e_pf *pf = vsi->back;
8640 if (sa_family == AF_INET6)
8643 idx = i40e_get_udp_port_idx(pf, port);
8645 /* Check if port already exists */
8646 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8647 /* if port exists, set it to 0 (mark for deletion)
8648 * and make it pending
8650 pf->udp_ports[idx].index = 0;
8651 pf->pending_udp_bitmap |= BIT_ULL(idx);
8652 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8654 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8660 #if IS_ENABLED(CONFIG_GENEVE)
8662 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8663 * @netdev: This physical port's netdev
8664 * @sa_family: Socket Family that GENEVE is notifying us about
8665 * @port: New UDP port number that GENEVE started listening to
8667 static void i40e_add_geneve_port(struct net_device *netdev,
8668 sa_family_t sa_family, __be16 port)
8670 struct i40e_netdev_priv *np = netdev_priv(netdev);
8671 struct i40e_vsi *vsi = np->vsi;
8672 struct i40e_pf *pf = vsi->back;
8676 if (sa_family == AF_INET6)
8679 idx = i40e_get_udp_port_idx(pf, port);
8681 /* Check if port already exists */
8682 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8683 netdev_info(netdev, "udp port %d already offloaded\n",
8688 /* Now check if there is space to add the new port */
8689 next_idx = i40e_get_udp_port_idx(pf, 0);
8691 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8692 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8697 /* New port: add it and mark its index in the bitmap */
8698 pf->udp_ports[next_idx].index = port;
8699 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8700 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8701 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8703 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8707 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8708 * @netdev: This physical port's netdev
8709 * @sa_family: Socket Family that GENEVE is notifying us about
8710 * @port: UDP port number that GENEVE stopped listening to
8712 static void i40e_del_geneve_port(struct net_device *netdev,
8713 sa_family_t sa_family, __be16 port)
8715 struct i40e_netdev_priv *np = netdev_priv(netdev);
8716 struct i40e_vsi *vsi = np->vsi;
8717 struct i40e_pf *pf = vsi->back;
8720 if (sa_family == AF_INET6)
8723 idx = i40e_get_udp_port_idx(pf, port);
8725 /* Check if port already exists */
8726 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8727 /* if port exists, set it to 0 (mark for deletion)
8728 * and make it pending
8730 pf->udp_ports[idx].index = 0;
8731 pf->pending_udp_bitmap |= BIT_ULL(idx);
8732 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8734 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8737 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8743 static int i40e_get_phys_port_id(struct net_device *netdev,
8744 struct netdev_phys_item_id *ppid)
8746 struct i40e_netdev_priv *np = netdev_priv(netdev);
8747 struct i40e_pf *pf = np->vsi->back;
8748 struct i40e_hw *hw = &pf->hw;
8750 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8753 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8754 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8760 * i40e_ndo_fdb_add - add an entry to the hardware database
8761 * @ndm: the input from the stack
8762 * @tb: pointer to array of nladdr (unused)
8763 * @dev: the net device pointer
8764 * @addr: the MAC address entry being added
8765 * @flags: instructions from stack about fdb operation
8767 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8768 struct net_device *dev,
8769 const unsigned char *addr, u16 vid,
8772 struct i40e_netdev_priv *np = netdev_priv(dev);
8773 struct i40e_pf *pf = np->vsi->back;
8776 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8780 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8784 /* Hardware does not support aging addresses so if a
8785 * ndm_state is given only allow permanent addresses
8787 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8788 netdev_info(dev, "FDB only supports static addresses\n");
8792 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8793 err = dev_uc_add_excl(dev, addr);
8794 else if (is_multicast_ether_addr(addr))
8795 err = dev_mc_add_excl(dev, addr);
8799 /* Only return duplicate errors if NLM_F_EXCL is set */
8800 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8807 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8808 * @dev: the netdev being configured
8809 * @nlh: RTNL message
8811 * Inserts a new hardware bridge if not already created and
8812 * enables the bridging mode requested (VEB or VEPA). If the
8813 * hardware bridge has already been inserted and the request
8814 * is to change the mode then that requires a PF reset to
8815 * allow rebuild of the components with required hardware
8816 * bridge mode enabled.
8818 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8819 struct nlmsghdr *nlh,
8822 struct i40e_netdev_priv *np = netdev_priv(dev);
8823 struct i40e_vsi *vsi = np->vsi;
8824 struct i40e_pf *pf = vsi->back;
8825 struct i40e_veb *veb = NULL;
8826 struct nlattr *attr, *br_spec;
8829 /* Only for PF VSI for now */
8830 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8833 /* Find the HW bridge for PF VSI */
8834 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8835 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8839 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8841 nla_for_each_nested(attr, br_spec, rem) {
8844 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8847 mode = nla_get_u16(attr);
8848 if ((mode != BRIDGE_MODE_VEPA) &&
8849 (mode != BRIDGE_MODE_VEB))
8852 /* Insert a new HW bridge */
8854 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8855 vsi->tc_config.enabled_tc);
8857 veb->bridge_mode = mode;
8858 i40e_config_bridge_mode(veb);
8860 /* No Bridge HW offload available */
8864 } else if (mode != veb->bridge_mode) {
8865 /* Existing HW bridge but different mode needs reset */
8866 veb->bridge_mode = mode;
8867 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8868 if (mode == BRIDGE_MODE_VEB)
8869 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8871 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8872 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8881 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8884 * @seq: RTNL message seq #
8885 * @dev: the netdev being configured
8886 * @filter_mask: unused
8887 * @nlflags: netlink flags passed in
8889 * Return the mode in which the hardware bridge is operating in
8892 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8893 struct net_device *dev,
8894 u32 __always_unused filter_mask,
8897 struct i40e_netdev_priv *np = netdev_priv(dev);
8898 struct i40e_vsi *vsi = np->vsi;
8899 struct i40e_pf *pf = vsi->back;
8900 struct i40e_veb *veb = NULL;
8903 /* Only for PF VSI for now */
8904 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8907 /* Find the HW bridge for the PF VSI */
8908 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8909 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8916 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8917 nlflags, 0, 0, filter_mask, NULL);
8920 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8921 * inner mac plus all inner ethertypes.
8923 #define I40E_MAX_TUNNEL_HDR_LEN 128
8925 * i40e_features_check - Validate encapsulated packet conforms to limits
8927 * @dev: This physical port's netdev
8928 * @features: Offload features that the stack believes apply
8930 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8931 struct net_device *dev,
8932 netdev_features_t features)
8934 if (skb->encapsulation &&
8935 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8936 I40E_MAX_TUNNEL_HDR_LEN))
8937 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8942 static const struct net_device_ops i40e_netdev_ops = {
8943 .ndo_open = i40e_open,
8944 .ndo_stop = i40e_close,
8945 .ndo_start_xmit = i40e_lan_xmit_frame,
8946 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8947 .ndo_set_rx_mode = i40e_set_rx_mode,
8948 .ndo_validate_addr = eth_validate_addr,
8949 .ndo_set_mac_address = i40e_set_mac,
8950 .ndo_change_mtu = i40e_change_mtu,
8951 .ndo_do_ioctl = i40e_ioctl,
8952 .ndo_tx_timeout = i40e_tx_timeout,
8953 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8954 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8955 #ifdef CONFIG_NET_POLL_CONTROLLER
8956 .ndo_poll_controller = i40e_netpoll,
8958 .ndo_setup_tc = i40e_setup_tc,
8960 .ndo_fcoe_enable = i40e_fcoe_enable,
8961 .ndo_fcoe_disable = i40e_fcoe_disable,
8963 .ndo_set_features = i40e_set_features,
8964 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8965 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8966 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8967 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8968 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8969 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8970 #if IS_ENABLED(CONFIG_VXLAN)
8971 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8972 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8974 #if IS_ENABLED(CONFIG_GENEVE)
8975 .ndo_add_geneve_port = i40e_add_geneve_port,
8976 .ndo_del_geneve_port = i40e_del_geneve_port,
8978 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8979 .ndo_fdb_add = i40e_ndo_fdb_add,
8980 .ndo_features_check = i40e_features_check,
8981 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8982 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8986 * i40e_config_netdev - Setup the netdev flags
8987 * @vsi: the VSI being configured
8989 * Returns 0 on success, negative value on failure
8991 static int i40e_config_netdev(struct i40e_vsi *vsi)
8993 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8994 struct i40e_pf *pf = vsi->back;
8995 struct i40e_hw *hw = &pf->hw;
8996 struct i40e_netdev_priv *np;
8997 struct net_device *netdev;
8998 u8 mac_addr[ETH_ALEN];
9001 etherdev_size = sizeof(struct i40e_netdev_priv);
9002 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9006 vsi->netdev = netdev;
9007 np = netdev_priv(netdev);
9010 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
9012 NETIF_F_GSO_UDP_TUNNEL |
9016 netdev->features = NETIF_F_SG |
9020 NETIF_F_GSO_UDP_TUNNEL |
9022 NETIF_F_HW_VLAN_CTAG_TX |
9023 NETIF_F_HW_VLAN_CTAG_RX |
9024 NETIF_F_HW_VLAN_CTAG_FILTER |
9033 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9034 netdev->features |= NETIF_F_NTUPLE;
9036 /* copy netdev features into list of user selectable features */
9037 netdev->hw_features |= netdev->features;
9039 if (vsi->type == I40E_VSI_MAIN) {
9040 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9041 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9042 /* The following steps are necessary to prevent reception
9043 * of tagged packets - some older NVM configurations load a
9044 * default a MAC-VLAN filter that accepts any tagged packet
9045 * which must be replaced by a normal filter.
9047 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9048 spin_lock_bh(&vsi->mac_filter_list_lock);
9049 i40e_add_filter(vsi, mac_addr,
9050 I40E_VLAN_ANY, false, true);
9051 spin_unlock_bh(&vsi->mac_filter_list_lock);
9054 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9055 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9056 pf->vsi[pf->lan_vsi]->netdev->name);
9057 random_ether_addr(mac_addr);
9059 spin_lock_bh(&vsi->mac_filter_list_lock);
9060 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9061 spin_unlock_bh(&vsi->mac_filter_list_lock);
9064 spin_lock_bh(&vsi->mac_filter_list_lock);
9065 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9066 spin_unlock_bh(&vsi->mac_filter_list_lock);
9068 ether_addr_copy(netdev->dev_addr, mac_addr);
9069 ether_addr_copy(netdev->perm_addr, mac_addr);
9070 /* vlan gets same features (except vlan offload)
9071 * after any tweaks for specific VSI types
9073 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
9074 NETIF_F_HW_VLAN_CTAG_RX |
9075 NETIF_F_HW_VLAN_CTAG_FILTER);
9076 netdev->priv_flags |= IFF_UNICAST_FLT;
9077 netdev->priv_flags |= IFF_SUPP_NOFCS;
9078 /* Setup netdev TC information */
9079 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9081 netdev->netdev_ops = &i40e_netdev_ops;
9082 netdev->watchdog_timeo = 5 * HZ;
9083 i40e_set_ethtool_ops(netdev);
9085 i40e_fcoe_config_netdev(netdev, vsi);
9092 * i40e_vsi_delete - Delete a VSI from the switch
9093 * @vsi: the VSI being removed
9095 * Returns 0 on success, negative value on failure
9097 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9099 /* remove default VSI is not allowed */
9100 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9103 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9107 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9108 * @vsi: the VSI being queried
9110 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9112 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9114 struct i40e_veb *veb;
9115 struct i40e_pf *pf = vsi->back;
9117 /* Uplink is not a bridge so default to VEB */
9118 if (vsi->veb_idx == I40E_NO_VEB)
9121 veb = pf->veb[vsi->veb_idx];
9123 dev_info(&pf->pdev->dev,
9124 "There is no veb associated with the bridge\n");
9128 /* Uplink is a bridge in VEPA mode */
9129 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9132 /* Uplink is a bridge in VEB mode */
9136 /* VEPA is now default bridge, so return 0 */
9141 * i40e_add_vsi - Add a VSI to the switch
9142 * @vsi: the VSI being configured
9144 * This initializes a VSI context depending on the VSI type to be added and
9145 * passes it down to the add_vsi aq command.
9147 static int i40e_add_vsi(struct i40e_vsi *vsi)
9150 u8 laa_macaddr[ETH_ALEN];
9151 bool found_laa_mac_filter = false;
9152 struct i40e_pf *pf = vsi->back;
9153 struct i40e_hw *hw = &pf->hw;
9154 struct i40e_vsi_context ctxt;
9155 struct i40e_mac_filter *f, *ftmp;
9157 u8 enabled_tc = 0x1; /* TC0 enabled */
9160 memset(&ctxt, 0, sizeof(ctxt));
9161 switch (vsi->type) {
9163 /* The PF's main VSI is already setup as part of the
9164 * device initialization, so we'll not bother with
9165 * the add_vsi call, but we will retrieve the current
9168 ctxt.seid = pf->main_vsi_seid;
9169 ctxt.pf_num = pf->hw.pf_id;
9171 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9172 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9174 dev_info(&pf->pdev->dev,
9175 "couldn't get PF vsi config, err %s aq_err %s\n",
9176 i40e_stat_str(&pf->hw, ret),
9177 i40e_aq_str(&pf->hw,
9178 pf->hw.aq.asq_last_status));
9181 vsi->info = ctxt.info;
9182 vsi->info.valid_sections = 0;
9184 vsi->seid = ctxt.seid;
9185 vsi->id = ctxt.vsi_number;
9187 enabled_tc = i40e_pf_get_tc_map(pf);
9189 /* MFP mode setup queue map and update VSI */
9190 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9191 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9192 memset(&ctxt, 0, sizeof(ctxt));
9193 ctxt.seid = pf->main_vsi_seid;
9194 ctxt.pf_num = pf->hw.pf_id;
9196 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9197 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9199 dev_info(&pf->pdev->dev,
9200 "update vsi failed, err %s aq_err %s\n",
9201 i40e_stat_str(&pf->hw, ret),
9202 i40e_aq_str(&pf->hw,
9203 pf->hw.aq.asq_last_status));
9207 /* update the local VSI info queue map */
9208 i40e_vsi_update_queue_map(vsi, &ctxt);
9209 vsi->info.valid_sections = 0;
9211 /* Default/Main VSI is only enabled for TC0
9212 * reconfigure it to enable all TCs that are
9213 * available on the port in SFP mode.
9214 * For MFP case the iSCSI PF would use this
9215 * flow to enable LAN+iSCSI TC.
9217 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9219 dev_info(&pf->pdev->dev,
9220 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9222 i40e_stat_str(&pf->hw, ret),
9223 i40e_aq_str(&pf->hw,
9224 pf->hw.aq.asq_last_status));
9231 ctxt.pf_num = hw->pf_id;
9233 ctxt.uplink_seid = vsi->uplink_seid;
9234 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9235 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9236 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9237 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9238 ctxt.info.valid_sections |=
9239 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9240 ctxt.info.switch_id =
9241 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9243 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9246 case I40E_VSI_VMDQ2:
9247 ctxt.pf_num = hw->pf_id;
9249 ctxt.uplink_seid = vsi->uplink_seid;
9250 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9251 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9253 /* This VSI is connected to VEB so the switch_id
9254 * should be set to zero by default.
9256 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9257 ctxt.info.valid_sections |=
9258 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9259 ctxt.info.switch_id =
9260 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9263 /* Setup the VSI tx/rx queue map for TC0 only for now */
9264 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9267 case I40E_VSI_SRIOV:
9268 ctxt.pf_num = hw->pf_id;
9269 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9270 ctxt.uplink_seid = vsi->uplink_seid;
9271 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9272 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9274 /* This VSI is connected to VEB so the switch_id
9275 * should be set to zero by default.
9277 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9278 ctxt.info.valid_sections |=
9279 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9280 ctxt.info.switch_id =
9281 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9284 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9285 ctxt.info.valid_sections |=
9286 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9287 ctxt.info.queueing_opt_flags |=
9288 I40E_AQ_VSI_QUE_OPT_TCP_ENA;
9291 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9292 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9293 if (pf->vf[vsi->vf_id].spoofchk) {
9294 ctxt.info.valid_sections |=
9295 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9296 ctxt.info.sec_flags |=
9297 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9298 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9300 /* Setup the VSI tx/rx queue map for TC0 only for now */
9301 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9306 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9308 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9313 #endif /* I40E_FCOE */
9314 case I40E_VSI_IWARP:
9315 /* send down message to iWARP */
9322 if (vsi->type != I40E_VSI_MAIN) {
9323 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9325 dev_info(&vsi->back->pdev->dev,
9326 "add vsi failed, err %s aq_err %s\n",
9327 i40e_stat_str(&pf->hw, ret),
9328 i40e_aq_str(&pf->hw,
9329 pf->hw.aq.asq_last_status));
9333 vsi->info = ctxt.info;
9334 vsi->info.valid_sections = 0;
9335 vsi->seid = ctxt.seid;
9336 vsi->id = ctxt.vsi_number;
9339 spin_lock_bh(&vsi->mac_filter_list_lock);
9340 /* If macvlan filters already exist, force them to get loaded */
9341 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9345 /* Expected to have only one MAC filter entry for LAA in list */
9346 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9347 ether_addr_copy(laa_macaddr, f->macaddr);
9348 found_laa_mac_filter = true;
9351 spin_unlock_bh(&vsi->mac_filter_list_lock);
9353 if (found_laa_mac_filter) {
9354 struct i40e_aqc_remove_macvlan_element_data element;
9356 memset(&element, 0, sizeof(element));
9357 ether_addr_copy(element.mac_addr, laa_macaddr);
9358 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9359 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9362 /* some older FW has a different default */
9364 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9365 i40e_aq_remove_macvlan(hw, vsi->seid,
9369 i40e_aq_mac_address_write(hw,
9370 I40E_AQC_WRITE_TYPE_LAA_WOL,
9375 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9376 pf->flags |= I40E_FLAG_FILTER_SYNC;
9379 /* Update VSI BW information */
9380 ret = i40e_vsi_get_bw_info(vsi);
9382 dev_info(&pf->pdev->dev,
9383 "couldn't get vsi bw info, err %s aq_err %s\n",
9384 i40e_stat_str(&pf->hw, ret),
9385 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9386 /* VSI is already added so not tearing that up */
9395 * i40e_vsi_release - Delete a VSI and free its resources
9396 * @vsi: the VSI being removed
9398 * Returns 0 on success or < 0 on error
9400 int i40e_vsi_release(struct i40e_vsi *vsi)
9402 struct i40e_mac_filter *f, *ftmp;
9403 struct i40e_veb *veb = NULL;
9410 /* release of a VEB-owner or last VSI is not allowed */
9411 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9412 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9413 vsi->seid, vsi->uplink_seid);
9416 if (vsi == pf->vsi[pf->lan_vsi] &&
9417 !test_bit(__I40E_DOWN, &pf->state)) {
9418 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9422 uplink_seid = vsi->uplink_seid;
9423 if (vsi->type != I40E_VSI_SRIOV) {
9424 if (vsi->netdev_registered) {
9425 vsi->netdev_registered = false;
9427 /* results in a call to i40e_close() */
9428 unregister_netdev(vsi->netdev);
9431 i40e_vsi_close(vsi);
9433 i40e_vsi_disable_irq(vsi);
9436 spin_lock_bh(&vsi->mac_filter_list_lock);
9437 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9438 i40e_del_filter(vsi, f->macaddr, f->vlan,
9439 f->is_vf, f->is_netdev);
9440 spin_unlock_bh(&vsi->mac_filter_list_lock);
9442 i40e_sync_vsi_filters(vsi);
9444 i40e_vsi_delete(vsi);
9445 i40e_vsi_free_q_vectors(vsi);
9447 free_netdev(vsi->netdev);
9450 i40e_vsi_clear_rings(vsi);
9451 i40e_vsi_clear(vsi);
9453 /* If this was the last thing on the VEB, except for the
9454 * controlling VSI, remove the VEB, which puts the controlling
9455 * VSI onto the next level down in the switch.
9457 * Well, okay, there's one more exception here: don't remove
9458 * the orphan VEBs yet. We'll wait for an explicit remove request
9459 * from up the network stack.
9461 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9463 pf->vsi[i]->uplink_seid == uplink_seid &&
9464 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9465 n++; /* count the VSIs */
9468 for (i = 0; i < I40E_MAX_VEB; i++) {
9471 if (pf->veb[i]->uplink_seid == uplink_seid)
9472 n++; /* count the VEBs */
9473 if (pf->veb[i]->seid == uplink_seid)
9476 if (n == 0 && veb && veb->uplink_seid != 0)
9477 i40e_veb_release(veb);
9483 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9484 * @vsi: ptr to the VSI
9486 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9487 * corresponding SW VSI structure and initializes num_queue_pairs for the
9488 * newly allocated VSI.
9490 * Returns 0 on success or negative on failure
9492 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9495 struct i40e_pf *pf = vsi->back;
9497 if (vsi->q_vectors[0]) {
9498 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9503 if (vsi->base_vector) {
9504 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9505 vsi->seid, vsi->base_vector);
9509 ret = i40e_vsi_alloc_q_vectors(vsi);
9511 dev_info(&pf->pdev->dev,
9512 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9513 vsi->num_q_vectors, vsi->seid, ret);
9514 vsi->num_q_vectors = 0;
9515 goto vector_setup_out;
9518 /* In Legacy mode, we do not have to get any other vector since we
9519 * piggyback on the misc/ICR0 for queue interrupts.
9521 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9523 if (vsi->num_q_vectors)
9524 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9525 vsi->num_q_vectors, vsi->idx);
9526 if (vsi->base_vector < 0) {
9527 dev_info(&pf->pdev->dev,
9528 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9529 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9530 i40e_vsi_free_q_vectors(vsi);
9532 goto vector_setup_out;
9540 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9541 * @vsi: pointer to the vsi.
9543 * This re-allocates a vsi's queue resources.
9545 * Returns pointer to the successfully allocated and configured VSI sw struct
9546 * on success, otherwise returns NULL on failure.
9548 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9550 struct i40e_pf *pf = vsi->back;
9554 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9555 i40e_vsi_clear_rings(vsi);
9557 i40e_vsi_free_arrays(vsi, false);
9558 i40e_set_num_rings_in_vsi(vsi);
9559 ret = i40e_vsi_alloc_arrays(vsi, false);
9563 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9565 dev_info(&pf->pdev->dev,
9566 "failed to get tracking for %d queues for VSI %d err %d\n",
9567 vsi->alloc_queue_pairs, vsi->seid, ret);
9570 vsi->base_queue = ret;
9572 /* Update the FW view of the VSI. Force a reset of TC and queue
9573 * layout configurations.
9575 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9576 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9577 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9578 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9580 /* assign it some queues */
9581 ret = i40e_alloc_rings(vsi);
9585 /* map all of the rings to the q_vectors */
9586 i40e_vsi_map_rings_to_vectors(vsi);
9590 i40e_vsi_free_q_vectors(vsi);
9591 if (vsi->netdev_registered) {
9592 vsi->netdev_registered = false;
9593 unregister_netdev(vsi->netdev);
9594 free_netdev(vsi->netdev);
9597 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9599 i40e_vsi_clear(vsi);
9604 * i40e_macaddr_init - explicitly write the mac address filters.
9606 * @vsi: pointer to the vsi.
9607 * @macaddr: the MAC address
9609 * This is needed when the macaddr has been obtained by other
9610 * means than the default, e.g., from Open Firmware or IDPROM.
9611 * Returns 0 on success, negative on failure
9613 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9616 struct i40e_aqc_add_macvlan_element_data element;
9618 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9619 I40E_AQC_WRITE_TYPE_LAA_WOL,
9622 dev_info(&vsi->back->pdev->dev,
9623 "Addr change for VSI failed: %d\n", ret);
9624 return -EADDRNOTAVAIL;
9627 memset(&element, 0, sizeof(element));
9628 ether_addr_copy(element.mac_addr, macaddr);
9629 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9630 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9632 dev_info(&vsi->back->pdev->dev,
9633 "add filter failed err %s aq_err %s\n",
9634 i40e_stat_str(&vsi->back->hw, ret),
9635 i40e_aq_str(&vsi->back->hw,
9636 vsi->back->hw.aq.asq_last_status));
9642 * i40e_vsi_setup - Set up a VSI by a given type
9643 * @pf: board private structure
9645 * @uplink_seid: the switch element to link to
9646 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9648 * This allocates the sw VSI structure and its queue resources, then add a VSI
9649 * to the identified VEB.
9651 * Returns pointer to the successfully allocated and configure VSI sw struct on
9652 * success, otherwise returns NULL on failure.
9654 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9655 u16 uplink_seid, u32 param1)
9657 struct i40e_vsi *vsi = NULL;
9658 struct i40e_veb *veb = NULL;
9662 /* The requested uplink_seid must be either
9663 * - the PF's port seid
9664 * no VEB is needed because this is the PF
9665 * or this is a Flow Director special case VSI
9666 * - seid of an existing VEB
9667 * - seid of a VSI that owns an existing VEB
9668 * - seid of a VSI that doesn't own a VEB
9669 * a new VEB is created and the VSI becomes the owner
9670 * - seid of the PF VSI, which is what creates the first VEB
9671 * this is a special case of the previous
9673 * Find which uplink_seid we were given and create a new VEB if needed
9675 for (i = 0; i < I40E_MAX_VEB; i++) {
9676 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9682 if (!veb && uplink_seid != pf->mac_seid) {
9684 for (i = 0; i < pf->num_alloc_vsi; i++) {
9685 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9691 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9696 if (vsi->uplink_seid == pf->mac_seid)
9697 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9698 vsi->tc_config.enabled_tc);
9699 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9700 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9701 vsi->tc_config.enabled_tc);
9703 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9704 dev_info(&vsi->back->pdev->dev,
9705 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9708 /* We come up by default in VEPA mode if SRIOV is not
9709 * already enabled, in which case we can't force VEPA
9712 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9713 veb->bridge_mode = BRIDGE_MODE_VEPA;
9714 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9716 i40e_config_bridge_mode(veb);
9718 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9719 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9723 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9727 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9728 uplink_seid = veb->seid;
9731 /* get vsi sw struct */
9732 v_idx = i40e_vsi_mem_alloc(pf, type);
9735 vsi = pf->vsi[v_idx];
9739 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9741 if (type == I40E_VSI_MAIN)
9742 pf->lan_vsi = v_idx;
9743 else if (type == I40E_VSI_SRIOV)
9744 vsi->vf_id = param1;
9745 /* assign it some queues */
9746 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9749 dev_info(&pf->pdev->dev,
9750 "failed to get tracking for %d queues for VSI %d err=%d\n",
9751 vsi->alloc_queue_pairs, vsi->seid, ret);
9754 vsi->base_queue = ret;
9756 /* get a VSI from the hardware */
9757 vsi->uplink_seid = uplink_seid;
9758 ret = i40e_add_vsi(vsi);
9762 switch (vsi->type) {
9763 /* setup the netdev if needed */
9765 /* Apply relevant filters if a platform-specific mac
9766 * address was selected.
9768 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9769 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9771 dev_warn(&pf->pdev->dev,
9772 "could not set up macaddr; err %d\n",
9776 case I40E_VSI_VMDQ2:
9778 ret = i40e_config_netdev(vsi);
9781 ret = register_netdev(vsi->netdev);
9784 vsi->netdev_registered = true;
9785 netif_carrier_off(vsi->netdev);
9786 #ifdef CONFIG_I40E_DCB
9787 /* Setup DCB netlink interface */
9788 i40e_dcbnl_setup(vsi);
9789 #endif /* CONFIG_I40E_DCB */
9793 /* set up vectors and rings if needed */
9794 ret = i40e_vsi_setup_vectors(vsi);
9798 ret = i40e_alloc_rings(vsi);
9802 /* map all of the rings to the q_vectors */
9803 i40e_vsi_map_rings_to_vectors(vsi);
9805 i40e_vsi_reset_stats(vsi);
9809 /* no netdev or rings for the other VSI types */
9813 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9814 (vsi->type == I40E_VSI_VMDQ2)) {
9815 ret = i40e_vsi_config_rss(vsi);
9820 i40e_vsi_free_q_vectors(vsi);
9822 if (vsi->netdev_registered) {
9823 vsi->netdev_registered = false;
9824 unregister_netdev(vsi->netdev);
9825 free_netdev(vsi->netdev);
9829 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9831 i40e_vsi_clear(vsi);
9837 * i40e_veb_get_bw_info - Query VEB BW information
9838 * @veb: the veb to query
9840 * Query the Tx scheduler BW configuration data for given VEB
9842 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9844 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9845 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9846 struct i40e_pf *pf = veb->pf;
9847 struct i40e_hw *hw = &pf->hw;
9852 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9855 dev_info(&pf->pdev->dev,
9856 "query veb bw config failed, err %s aq_err %s\n",
9857 i40e_stat_str(&pf->hw, ret),
9858 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9862 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9865 dev_info(&pf->pdev->dev,
9866 "query veb bw ets config failed, err %s aq_err %s\n",
9867 i40e_stat_str(&pf->hw, ret),
9868 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9872 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9873 veb->bw_max_quanta = ets_data.tc_bw_max;
9874 veb->is_abs_credits = bw_data.absolute_credits_enable;
9875 veb->enabled_tc = ets_data.tc_valid_bits;
9876 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9877 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9878 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9879 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9880 veb->bw_tc_limit_credits[i] =
9881 le16_to_cpu(bw_data.tc_bw_limits[i]);
9882 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9890 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9891 * @pf: board private structure
9893 * On error: returns error code (negative)
9894 * On success: returns vsi index in PF (positive)
9896 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9899 struct i40e_veb *veb;
9902 /* Need to protect the allocation of switch elements at the PF level */
9903 mutex_lock(&pf->switch_mutex);
9905 /* VEB list may be fragmented if VEB creation/destruction has
9906 * been happening. We can afford to do a quick scan to look
9907 * for any free slots in the list.
9909 * find next empty veb slot, looping back around if necessary
9912 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9914 if (i >= I40E_MAX_VEB) {
9916 goto err_alloc_veb; /* out of VEB slots! */
9919 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9926 veb->enabled_tc = 1;
9931 mutex_unlock(&pf->switch_mutex);
9936 * i40e_switch_branch_release - Delete a branch of the switch tree
9937 * @branch: where to start deleting
9939 * This uses recursion to find the tips of the branch to be
9940 * removed, deleting until we get back to and can delete this VEB.
9942 static void i40e_switch_branch_release(struct i40e_veb *branch)
9944 struct i40e_pf *pf = branch->pf;
9945 u16 branch_seid = branch->seid;
9946 u16 veb_idx = branch->idx;
9949 /* release any VEBs on this VEB - RECURSION */
9950 for (i = 0; i < I40E_MAX_VEB; i++) {
9953 if (pf->veb[i]->uplink_seid == branch->seid)
9954 i40e_switch_branch_release(pf->veb[i]);
9957 /* Release the VSIs on this VEB, but not the owner VSI.
9959 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9960 * the VEB itself, so don't use (*branch) after this loop.
9962 for (i = 0; i < pf->num_alloc_vsi; i++) {
9965 if (pf->vsi[i]->uplink_seid == branch_seid &&
9966 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9967 i40e_vsi_release(pf->vsi[i]);
9971 /* There's one corner case where the VEB might not have been
9972 * removed, so double check it here and remove it if needed.
9973 * This case happens if the veb was created from the debugfs
9974 * commands and no VSIs were added to it.
9976 if (pf->veb[veb_idx])
9977 i40e_veb_release(pf->veb[veb_idx]);
9981 * i40e_veb_clear - remove veb struct
9982 * @veb: the veb to remove
9984 static void i40e_veb_clear(struct i40e_veb *veb)
9990 struct i40e_pf *pf = veb->pf;
9992 mutex_lock(&pf->switch_mutex);
9993 if (pf->veb[veb->idx] == veb)
9994 pf->veb[veb->idx] = NULL;
9995 mutex_unlock(&pf->switch_mutex);
10002 * i40e_veb_release - Delete a VEB and free its resources
10003 * @veb: the VEB being removed
10005 void i40e_veb_release(struct i40e_veb *veb)
10007 struct i40e_vsi *vsi = NULL;
10008 struct i40e_pf *pf;
10013 /* find the remaining VSI and check for extras */
10014 for (i = 0; i < pf->num_alloc_vsi; i++) {
10015 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10021 dev_info(&pf->pdev->dev,
10022 "can't remove VEB %d with %d VSIs left\n",
10027 /* move the remaining VSI to uplink veb */
10028 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10029 if (veb->uplink_seid) {
10030 vsi->uplink_seid = veb->uplink_seid;
10031 if (veb->uplink_seid == pf->mac_seid)
10032 vsi->veb_idx = I40E_NO_VEB;
10034 vsi->veb_idx = veb->veb_idx;
10037 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10038 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10041 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10042 i40e_veb_clear(veb);
10046 * i40e_add_veb - create the VEB in the switch
10047 * @veb: the VEB to be instantiated
10048 * @vsi: the controlling VSI
10050 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10052 struct i40e_pf *pf = veb->pf;
10053 bool is_default = veb->pf->cur_promisc;
10054 bool is_cloud = false;
10057 /* get a VEB from the hardware */
10058 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10059 veb->enabled_tc, is_default,
10060 is_cloud, &veb->seid, NULL);
10062 dev_info(&pf->pdev->dev,
10063 "couldn't add VEB, err %s aq_err %s\n",
10064 i40e_stat_str(&pf->hw, ret),
10065 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10069 /* get statistics counter */
10070 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10071 &veb->stats_idx, NULL, NULL, NULL);
10073 dev_info(&pf->pdev->dev,
10074 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10075 i40e_stat_str(&pf->hw, ret),
10076 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10079 ret = i40e_veb_get_bw_info(veb);
10081 dev_info(&pf->pdev->dev,
10082 "couldn't get VEB bw info, err %s aq_err %s\n",
10083 i40e_stat_str(&pf->hw, ret),
10084 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10085 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10089 vsi->uplink_seid = veb->seid;
10090 vsi->veb_idx = veb->idx;
10091 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10097 * i40e_veb_setup - Set up a VEB
10098 * @pf: board private structure
10099 * @flags: VEB setup flags
10100 * @uplink_seid: the switch element to link to
10101 * @vsi_seid: the initial VSI seid
10102 * @enabled_tc: Enabled TC bit-map
10104 * This allocates the sw VEB structure and links it into the switch
10105 * It is possible and legal for this to be a duplicate of an already
10106 * existing VEB. It is also possible for both uplink and vsi seids
10107 * to be zero, in order to create a floating VEB.
10109 * Returns pointer to the successfully allocated VEB sw struct on
10110 * success, otherwise returns NULL on failure.
10112 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10113 u16 uplink_seid, u16 vsi_seid,
10116 struct i40e_veb *veb, *uplink_veb = NULL;
10117 int vsi_idx, veb_idx;
10120 /* if one seid is 0, the other must be 0 to create a floating relay */
10121 if ((uplink_seid == 0 || vsi_seid == 0) &&
10122 (uplink_seid + vsi_seid != 0)) {
10123 dev_info(&pf->pdev->dev,
10124 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10125 uplink_seid, vsi_seid);
10129 /* make sure there is such a vsi and uplink */
10130 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10131 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10133 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10134 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10139 if (uplink_seid && uplink_seid != pf->mac_seid) {
10140 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10141 if (pf->veb[veb_idx] &&
10142 pf->veb[veb_idx]->seid == uplink_seid) {
10143 uplink_veb = pf->veb[veb_idx];
10148 dev_info(&pf->pdev->dev,
10149 "uplink seid %d not found\n", uplink_seid);
10154 /* get veb sw struct */
10155 veb_idx = i40e_veb_mem_alloc(pf);
10158 veb = pf->veb[veb_idx];
10159 veb->flags = flags;
10160 veb->uplink_seid = uplink_seid;
10161 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10162 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10164 /* create the VEB in the switch */
10165 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10168 if (vsi_idx == pf->lan_vsi)
10169 pf->lan_veb = veb->idx;
10174 i40e_veb_clear(veb);
10180 * i40e_setup_pf_switch_element - set PF vars based on switch type
10181 * @pf: board private structure
10182 * @ele: element we are building info from
10183 * @num_reported: total number of elements
10184 * @printconfig: should we print the contents
10186 * helper function to assist in extracting a few useful SEID values.
10188 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10189 struct i40e_aqc_switch_config_element_resp *ele,
10190 u16 num_reported, bool printconfig)
10192 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10193 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10194 u8 element_type = ele->element_type;
10195 u16 seid = le16_to_cpu(ele->seid);
10198 dev_info(&pf->pdev->dev,
10199 "type=%d seid=%d uplink=%d downlink=%d\n",
10200 element_type, seid, uplink_seid, downlink_seid);
10202 switch (element_type) {
10203 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10204 pf->mac_seid = seid;
10206 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10208 if (uplink_seid != pf->mac_seid)
10210 if (pf->lan_veb == I40E_NO_VEB) {
10213 /* find existing or else empty VEB */
10214 for (v = 0; v < I40E_MAX_VEB; v++) {
10215 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10220 if (pf->lan_veb == I40E_NO_VEB) {
10221 v = i40e_veb_mem_alloc(pf);
10228 pf->veb[pf->lan_veb]->seid = seid;
10229 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10230 pf->veb[pf->lan_veb]->pf = pf;
10231 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10233 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10234 if (num_reported != 1)
10236 /* This is immediately after a reset so we can assume this is
10239 pf->mac_seid = uplink_seid;
10240 pf->pf_seid = downlink_seid;
10241 pf->main_vsi_seid = seid;
10243 dev_info(&pf->pdev->dev,
10244 "pf_seid=%d main_vsi_seid=%d\n",
10245 pf->pf_seid, pf->main_vsi_seid);
10247 case I40E_SWITCH_ELEMENT_TYPE_PF:
10248 case I40E_SWITCH_ELEMENT_TYPE_VF:
10249 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10250 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10251 case I40E_SWITCH_ELEMENT_TYPE_PE:
10252 case I40E_SWITCH_ELEMENT_TYPE_PA:
10253 /* ignore these for now */
10256 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10257 element_type, seid);
10263 * i40e_fetch_switch_configuration - Get switch config from firmware
10264 * @pf: board private structure
10265 * @printconfig: should we print the contents
10267 * Get the current switch configuration from the device and
10268 * extract a few useful SEID values.
10270 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10272 struct i40e_aqc_get_switch_config_resp *sw_config;
10278 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10282 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10284 u16 num_reported, num_total;
10286 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10290 dev_info(&pf->pdev->dev,
10291 "get switch config failed err %s aq_err %s\n",
10292 i40e_stat_str(&pf->hw, ret),
10293 i40e_aq_str(&pf->hw,
10294 pf->hw.aq.asq_last_status));
10299 num_reported = le16_to_cpu(sw_config->header.num_reported);
10300 num_total = le16_to_cpu(sw_config->header.num_total);
10303 dev_info(&pf->pdev->dev,
10304 "header: %d reported %d total\n",
10305 num_reported, num_total);
10307 for (i = 0; i < num_reported; i++) {
10308 struct i40e_aqc_switch_config_element_resp *ele =
10309 &sw_config->element[i];
10311 i40e_setup_pf_switch_element(pf, ele, num_reported,
10314 } while (next_seid != 0);
10321 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10322 * @pf: board private structure
10323 * @reinit: if the Main VSI needs to re-initialized.
10325 * Returns 0 on success, negative value on failure
10327 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10331 /* find out what's out there already */
10332 ret = i40e_fetch_switch_configuration(pf, false);
10334 dev_info(&pf->pdev->dev,
10335 "couldn't fetch switch config, err %s aq_err %s\n",
10336 i40e_stat_str(&pf->hw, ret),
10337 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10340 i40e_pf_reset_stats(pf);
10342 /* first time setup */
10343 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10344 struct i40e_vsi *vsi = NULL;
10347 /* Set up the PF VSI associated with the PF's main VSI
10348 * that is already in the HW switch
10350 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10351 uplink_seid = pf->veb[pf->lan_veb]->seid;
10353 uplink_seid = pf->mac_seid;
10354 if (pf->lan_vsi == I40E_NO_VSI)
10355 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10357 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10359 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10360 i40e_fdir_teardown(pf);
10364 /* force a reset of TC and queue layout configurations */
10365 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10367 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10368 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10369 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10371 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10373 i40e_fdir_sb_setup(pf);
10375 /* Setup static PF queue filter control settings */
10376 ret = i40e_setup_pf_filter_control(pf);
10378 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10380 /* Failure here should not stop continuing other steps */
10383 /* enable RSS in the HW, even for only one queue, as the stack can use
10386 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10387 i40e_pf_config_rss(pf);
10389 /* fill in link information and enable LSE reporting */
10390 i40e_update_link_info(&pf->hw);
10391 i40e_link_event(pf);
10393 /* Initialize user-specific link properties */
10394 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10395 I40E_AQ_AN_COMPLETED) ? true : false);
10403 * i40e_determine_queue_usage - Work out queue distribution
10404 * @pf: board private structure
10406 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10410 pf->num_lan_qps = 0;
10412 pf->num_fcoe_qps = 0;
10415 /* Find the max queues to be put into basic use. We'll always be
10416 * using TC0, whether or not DCB is running, and TC0 will get the
10419 queues_left = pf->hw.func_caps.num_tx_qp;
10421 if ((queues_left == 1) ||
10422 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10423 /* one qp for PF, no queues for anything else */
10425 pf->alloc_rss_size = pf->num_lan_qps = 1;
10427 /* make sure all the fancies are disabled */
10428 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10429 I40E_FLAG_IWARP_ENABLED |
10431 I40E_FLAG_FCOE_ENABLED |
10433 I40E_FLAG_FD_SB_ENABLED |
10434 I40E_FLAG_FD_ATR_ENABLED |
10435 I40E_FLAG_DCB_CAPABLE |
10436 I40E_FLAG_SRIOV_ENABLED |
10437 I40E_FLAG_VMDQ_ENABLED);
10438 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10439 I40E_FLAG_FD_SB_ENABLED |
10440 I40E_FLAG_FD_ATR_ENABLED |
10441 I40E_FLAG_DCB_CAPABLE))) {
10442 /* one qp for PF */
10443 pf->alloc_rss_size = pf->num_lan_qps = 1;
10444 queues_left -= pf->num_lan_qps;
10446 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10447 I40E_FLAG_IWARP_ENABLED |
10449 I40E_FLAG_FCOE_ENABLED |
10451 I40E_FLAG_FD_SB_ENABLED |
10452 I40E_FLAG_FD_ATR_ENABLED |
10453 I40E_FLAG_DCB_ENABLED |
10454 I40E_FLAG_VMDQ_ENABLED);
10456 /* Not enough queues for all TCs */
10457 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10458 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10459 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10460 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10462 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10463 num_online_cpus());
10464 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10465 pf->hw.func_caps.num_tx_qp);
10467 queues_left -= pf->num_lan_qps;
10471 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10472 if (I40E_DEFAULT_FCOE <= queues_left) {
10473 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10474 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10475 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10477 pf->num_fcoe_qps = 0;
10478 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10479 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10482 queues_left -= pf->num_fcoe_qps;
10486 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10487 if (queues_left > 1) {
10488 queues_left -= 1; /* save 1 queue for FD */
10490 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10491 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10495 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10496 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10497 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10498 (queues_left / pf->num_vf_qps));
10499 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10502 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10503 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10504 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10505 (queues_left / pf->num_vmdq_qps));
10506 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10509 pf->queues_left = queues_left;
10510 dev_dbg(&pf->pdev->dev,
10511 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10512 pf->hw.func_caps.num_tx_qp,
10513 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10514 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10515 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10518 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10523 * i40e_setup_pf_filter_control - Setup PF static filter control
10524 * @pf: PF to be setup
10526 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10527 * settings. If PE/FCoE are enabled then it will also set the per PF
10528 * based filter sizes required for them. It also enables Flow director,
10529 * ethertype and macvlan type filter settings for the pf.
10531 * Returns 0 on success, negative on failure
10533 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10535 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10537 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10539 /* Flow Director is enabled */
10540 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10541 settings->enable_fdir = true;
10543 /* Ethtype and MACVLAN filters enabled for PF */
10544 settings->enable_ethtype = true;
10545 settings->enable_macvlan = true;
10547 if (i40e_set_filter_control(&pf->hw, settings))
10553 #define INFO_STRING_LEN 255
10554 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10555 static void i40e_print_features(struct i40e_pf *pf)
10557 struct i40e_hw *hw = &pf->hw;
10561 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10565 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10566 #ifdef CONFIG_PCI_IOV
10567 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10569 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10570 pf->hw.func_caps.num_vsis,
10571 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10572 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10574 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10575 i += snprintf(&buf[i], REMAIN(i), " RSS");
10576 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10577 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10578 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10579 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10580 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10582 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10583 i += snprintf(&buf[i], REMAIN(i), " DCB");
10584 #if IS_ENABLED(CONFIG_VXLAN)
10585 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10587 #if IS_ENABLED(CONFIG_GENEVE)
10588 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10590 if (pf->flags & I40E_FLAG_PTP)
10591 i += snprintf(&buf[i], REMAIN(i), " PTP");
10593 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10594 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10596 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10597 i += snprintf(&buf[i], REMAIN(i), " VEB");
10599 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10601 dev_info(&pf->pdev->dev, "%s\n", buf);
10603 WARN_ON(i > INFO_STRING_LEN);
10607 * i40e_get_platform_mac_addr - get platform-specific MAC address
10609 * @pdev: PCI device information struct
10610 * @pf: board private structure
10612 * Look up the MAC address in Open Firmware on systems that support it,
10613 * and use IDPROM on SPARC if no OF address is found. On return, the
10614 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10615 * has been selected.
10617 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10619 struct device_node *dp = pci_device_to_OF_node(pdev);
10620 const unsigned char *addr;
10621 u8 *mac_addr = pf->hw.mac.addr;
10623 pf->flags &= ~I40E_FLAG_PF_MAC;
10624 addr = of_get_mac_address(dp);
10626 ether_addr_copy(mac_addr, addr);
10627 pf->flags |= I40E_FLAG_PF_MAC;
10628 #ifdef CONFIG_SPARC
10630 ether_addr_copy(mac_addr, idprom->id_ethaddr);
10631 pf->flags |= I40E_FLAG_PF_MAC;
10632 #endif /* CONFIG_SPARC */
10637 * i40e_probe - Device initialization routine
10638 * @pdev: PCI device information struct
10639 * @ent: entry in i40e_pci_tbl
10641 * i40e_probe initializes a PF identified by a pci_dev structure.
10642 * The OS initialization, configuring of the PF private structure,
10643 * and a hardware reset occur.
10645 * Returns 0 on success, negative on failure
10647 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10649 struct i40e_aq_get_phy_abilities_resp abilities;
10650 struct i40e_pf *pf;
10651 struct i40e_hw *hw;
10652 static u16 pfs_found;
10661 err = pci_enable_device_mem(pdev);
10665 /* set up for high or low dma */
10666 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10668 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10670 dev_err(&pdev->dev,
10671 "DMA configuration failed: 0x%x\n", err);
10676 /* set up pci connections */
10677 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10678 IORESOURCE_MEM), i40e_driver_name);
10680 dev_info(&pdev->dev,
10681 "pci_request_selected_regions failed %d\n", err);
10685 pci_enable_pcie_error_reporting(pdev);
10686 pci_set_master(pdev);
10688 /* Now that we have a PCI connection, we need to do the
10689 * low level device setup. This is primarily setting up
10690 * the Admin Queue structures and then querying for the
10691 * device's current profile information.
10693 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10700 set_bit(__I40E_DOWN, &pf->state);
10705 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10706 I40E_MAX_CSR_SPACE);
10708 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10709 if (!hw->hw_addr) {
10711 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10712 (unsigned int)pci_resource_start(pdev, 0),
10713 pf->ioremap_len, err);
10716 hw->vendor_id = pdev->vendor;
10717 hw->device_id = pdev->device;
10718 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10719 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10720 hw->subsystem_device_id = pdev->subsystem_device;
10721 hw->bus.device = PCI_SLOT(pdev->devfn);
10722 hw->bus.func = PCI_FUNC(pdev->devfn);
10723 pf->instance = pfs_found;
10726 pf->msg_enable = pf->hw.debug_mask;
10727 pf->msg_enable = debug;
10730 /* do a special CORER for clearing PXE mode once at init */
10731 if (hw->revision_id == 0 &&
10732 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10733 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10738 i40e_clear_pxe_mode(hw);
10741 /* Reset here to make sure all is clean and to define PF 'n' */
10743 err = i40e_pf_reset(hw);
10745 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10750 hw->aq.num_arq_entries = I40E_AQ_LEN;
10751 hw->aq.num_asq_entries = I40E_AQ_LEN;
10752 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10753 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10754 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10756 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10758 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10760 err = i40e_init_shared_code(hw);
10762 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10767 /* set up a default setting for link flow control */
10768 pf->hw.fc.requested_mode = I40E_FC_NONE;
10770 /* set up the locks for the AQ, do this only once in probe
10771 * and destroy them only once in remove
10773 mutex_init(&hw->aq.asq_mutex);
10774 mutex_init(&hw->aq.arq_mutex);
10776 err = i40e_init_adminq(hw);
10778 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10779 dev_info(&pdev->dev,
10780 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10782 dev_info(&pdev->dev,
10783 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10788 /* provide nvm, fw, api versions */
10789 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10790 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10791 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10792 i40e_nvm_version_str(hw));
10794 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10795 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10796 dev_info(&pdev->dev,
10797 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10798 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10799 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10800 dev_info(&pdev->dev,
10801 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10803 i40e_verify_eeprom(pf);
10805 /* Rev 0 hardware was never productized */
10806 if (hw->revision_id < 1)
10807 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10809 i40e_clear_pxe_mode(hw);
10810 err = i40e_get_capabilities(pf);
10812 goto err_adminq_setup;
10814 err = i40e_sw_init(pf);
10816 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10820 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10821 hw->func_caps.num_rx_qp,
10822 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10824 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10825 goto err_init_lan_hmc;
10828 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10830 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10832 goto err_configure_lan_hmc;
10835 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10836 * Ignore error return codes because if it was already disabled via
10837 * hardware settings this will fail
10839 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10840 (pf->hw.aq.fw_maj_ver < 4)) {
10841 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10842 i40e_aq_stop_lldp(hw, true, NULL);
10845 i40e_get_mac_addr(hw, hw->mac.addr);
10846 /* allow a platform config to override the HW addr */
10847 i40e_get_platform_mac_addr(pdev, pf);
10848 if (!is_valid_ether_addr(hw->mac.addr)) {
10849 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10853 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10854 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10855 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10856 if (is_valid_ether_addr(hw->mac.port_addr))
10857 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10859 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10861 dev_info(&pdev->dev,
10862 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10863 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10864 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10866 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10868 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10869 #endif /* I40E_FCOE */
10871 pci_set_drvdata(pdev, pf);
10872 pci_save_state(pdev);
10873 #ifdef CONFIG_I40E_DCB
10874 err = i40e_init_pf_dcb(pf);
10876 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10877 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10878 /* Continue without DCB enabled */
10880 #endif /* CONFIG_I40E_DCB */
10882 /* set up periodic task facility */
10883 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10884 pf->service_timer_period = HZ;
10886 INIT_WORK(&pf->service_task, i40e_service_task);
10887 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10888 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10890 /* NVM bit on means WoL disabled for the port */
10891 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10892 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10893 pf->wol_en = false;
10896 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10898 /* set up the main switch operations */
10899 i40e_determine_queue_usage(pf);
10900 err = i40e_init_interrupt_scheme(pf);
10902 goto err_switch_setup;
10904 /* The number of VSIs reported by the FW is the minimum guaranteed
10905 * to us; HW supports far more and we share the remaining pool with
10906 * the other PFs. We allocate space for more than the guarantee with
10907 * the understanding that we might not get them all later.
10909 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10910 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10912 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10914 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10915 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10916 pf->vsi = kzalloc(len, GFP_KERNEL);
10919 goto err_switch_setup;
10922 #ifdef CONFIG_PCI_IOV
10923 /* prep for VF support */
10924 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10925 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10926 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10927 if (pci_num_vf(pdev))
10928 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10931 err = i40e_setup_pf_switch(pf, false);
10933 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10937 /* Make sure flow control is set according to current settings */
10938 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10939 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10940 dev_dbg(&pf->pdev->dev,
10941 "Set fc with err %s aq_err %s on get_phy_cap\n",
10942 i40e_stat_str(hw, err),
10943 i40e_aq_str(hw, hw->aq.asq_last_status));
10944 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10945 dev_dbg(&pf->pdev->dev,
10946 "Set fc with err %s aq_err %s on set_phy_config\n",
10947 i40e_stat_str(hw, err),
10948 i40e_aq_str(hw, hw->aq.asq_last_status));
10949 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10950 dev_dbg(&pf->pdev->dev,
10951 "Set fc with err %s aq_err %s on get_link_info\n",
10952 i40e_stat_str(hw, err),
10953 i40e_aq_str(hw, hw->aq.asq_last_status));
10955 /* if FDIR VSI was set up, start it now */
10956 for (i = 0; i < pf->num_alloc_vsi; i++) {
10957 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10958 i40e_vsi_open(pf->vsi[i]);
10963 /* driver is only interested in link up/down and module qualification
10964 * reports from firmware
10966 err = i40e_aq_set_phy_int_mask(&pf->hw,
10967 I40E_AQ_EVENT_LINK_UPDOWN |
10968 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10970 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10971 i40e_stat_str(&pf->hw, err),
10972 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10974 /* Reconfigure hardware for allowing smaller MSS in the case
10975 * of TSO, so that we avoid the MDD being fired and causing
10976 * a reset in the case of small MSS+TSO.
10978 val = rd32(hw, I40E_REG_MSS);
10979 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10980 val &= ~I40E_REG_MSS_MIN_MASK;
10981 val |= I40E_64BYTE_MSS;
10982 wr32(hw, I40E_REG_MSS, val);
10985 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10986 (pf->hw.aq.fw_maj_ver < 4)) {
10988 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10990 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10991 i40e_stat_str(&pf->hw, err),
10992 i40e_aq_str(&pf->hw,
10993 pf->hw.aq.asq_last_status));
10995 /* The main driver is (mostly) up and happy. We need to set this state
10996 * before setting up the misc vector or we get a race and the vector
10997 * ends up disabled forever.
10999 clear_bit(__I40E_DOWN, &pf->state);
11001 /* In case of MSIX we are going to setup the misc vector right here
11002 * to handle admin queue events etc. In case of legacy and MSI
11003 * the misc functionality and queue processing is combined in
11004 * the same vector and that gets setup at open.
11006 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11007 err = i40e_setup_misc_vector(pf);
11009 dev_info(&pdev->dev,
11010 "setup of misc vector failed: %d\n", err);
11015 #ifdef CONFIG_PCI_IOV
11016 /* prep for VF support */
11017 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11018 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11019 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11022 /* disable link interrupts for VFs */
11023 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11024 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11025 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11028 if (pci_num_vf(pdev)) {
11029 dev_info(&pdev->dev,
11030 "Active VFs found, allocating resources.\n");
11031 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11033 dev_info(&pdev->dev,
11034 "Error %d allocating resources for existing VFs\n",
11038 #endif /* CONFIG_PCI_IOV */
11040 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11041 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11042 pf->num_iwarp_msix,
11043 I40E_IWARP_IRQ_PILE_ID);
11044 if (pf->iwarp_base_vector < 0) {
11045 dev_info(&pdev->dev,
11046 "failed to get tracking for %d vectors for IWARP err=%d\n",
11047 pf->num_iwarp_msix, pf->iwarp_base_vector);
11048 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11052 i40e_dbg_pf_init(pf);
11054 /* tell the firmware that we're starting */
11055 i40e_send_version(pf);
11057 /* since everything's happy, start the service_task timer */
11058 mod_timer(&pf->service_timer,
11059 round_jiffies(jiffies + pf->service_timer_period));
11061 /* add this PF to client device list and launch a client service task */
11062 err = i40e_lan_add_device(pf);
11064 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11068 /* create FCoE interface */
11069 i40e_fcoe_vsi_setup(pf);
11072 #define PCI_SPEED_SIZE 8
11073 #define PCI_WIDTH_SIZE 8
11074 /* Devices on the IOSF bus do not have this information
11075 * and will report PCI Gen 1 x 1 by default so don't bother
11078 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11079 char speed[PCI_SPEED_SIZE] = "Unknown";
11080 char width[PCI_WIDTH_SIZE] = "Unknown";
11082 /* Get the negotiated link width and speed from PCI config
11085 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11088 i40e_set_pci_config_data(hw, link_status);
11090 switch (hw->bus.speed) {
11091 case i40e_bus_speed_8000:
11092 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11093 case i40e_bus_speed_5000:
11094 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11095 case i40e_bus_speed_2500:
11096 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11100 switch (hw->bus.width) {
11101 case i40e_bus_width_pcie_x8:
11102 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11103 case i40e_bus_width_pcie_x4:
11104 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11105 case i40e_bus_width_pcie_x2:
11106 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11107 case i40e_bus_width_pcie_x1:
11108 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11113 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11116 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11117 hw->bus.speed < i40e_bus_speed_8000) {
11118 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11119 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11123 /* get the requested speeds from the fw */
11124 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11126 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11127 i40e_stat_str(&pf->hw, err),
11128 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11129 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11131 /* get the supported phy types from the fw */
11132 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11134 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11135 i40e_stat_str(&pf->hw, err),
11136 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11137 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11139 /* Add a filter to drop all Flow control frames from any VSI from being
11140 * transmitted. By doing so we stop a malicious VF from sending out
11141 * PAUSE or PFC frames and potentially controlling traffic for other
11143 * The FW can still send Flow control frames if enabled.
11145 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11146 pf->main_vsi_seid);
11148 /* print a string summarizing features */
11149 i40e_print_features(pf);
11153 /* Unwind what we've done if something failed in the setup */
11155 set_bit(__I40E_DOWN, &pf->state);
11156 i40e_clear_interrupt_scheme(pf);
11159 i40e_reset_interrupt_capability(pf);
11160 del_timer_sync(&pf->service_timer);
11162 err_configure_lan_hmc:
11163 (void)i40e_shutdown_lan_hmc(hw);
11165 kfree(pf->qp_pile);
11168 (void)i40e_shutdown_adminq(hw);
11170 iounmap(hw->hw_addr);
11174 pci_disable_pcie_error_reporting(pdev);
11175 pci_release_selected_regions(pdev,
11176 pci_select_bars(pdev, IORESOURCE_MEM));
11179 pci_disable_device(pdev);
11184 * i40e_remove - Device removal routine
11185 * @pdev: PCI device information struct
11187 * i40e_remove is called by the PCI subsystem to alert the driver
11188 * that is should release a PCI device. This could be caused by a
11189 * Hot-Plug event, or because the driver is going to be removed from
11192 static void i40e_remove(struct pci_dev *pdev)
11194 struct i40e_pf *pf = pci_get_drvdata(pdev);
11195 struct i40e_hw *hw = &pf->hw;
11196 i40e_status ret_code;
11199 i40e_dbg_pf_exit(pf);
11203 /* Disable RSS in hw */
11204 wr32(hw, I40E_PFQF_HENA(0), 0);
11205 wr32(hw, I40E_PFQF_HENA(1), 0);
11207 /* no more scheduling of any task */
11208 set_bit(__I40E_DOWN, &pf->state);
11209 del_timer_sync(&pf->service_timer);
11210 cancel_work_sync(&pf->service_task);
11212 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11214 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11217 i40e_fdir_teardown(pf);
11219 /* If there is a switch structure or any orphans, remove them.
11220 * This will leave only the PF's VSI remaining.
11222 for (i = 0; i < I40E_MAX_VEB; i++) {
11226 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11227 pf->veb[i]->uplink_seid == 0)
11228 i40e_switch_branch_release(pf->veb[i]);
11231 /* Now we can shutdown the PF's VSI, just before we kill
11234 if (pf->vsi[pf->lan_vsi])
11235 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11237 /* remove attached clients */
11238 ret_code = i40e_lan_del_device(pf);
11240 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11244 /* shutdown and destroy the HMC */
11245 if (pf->hw.hmc.hmc_obj) {
11246 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
11248 dev_warn(&pdev->dev,
11249 "Failed to destroy the HMC resources: %d\n",
11253 /* shutdown the adminq */
11254 ret_code = i40e_shutdown_adminq(&pf->hw);
11256 dev_warn(&pdev->dev,
11257 "Failed to destroy the Admin Queue resources: %d\n",
11260 /* destroy the locks only once, here */
11261 mutex_destroy(&hw->aq.arq_mutex);
11262 mutex_destroy(&hw->aq.asq_mutex);
11264 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11265 i40e_clear_interrupt_scheme(pf);
11266 for (i = 0; i < pf->num_alloc_vsi; i++) {
11268 i40e_vsi_clear_rings(pf->vsi[i]);
11269 i40e_vsi_clear(pf->vsi[i]);
11274 for (i = 0; i < I40E_MAX_VEB; i++) {
11279 kfree(pf->qp_pile);
11282 iounmap(pf->hw.hw_addr);
11284 pci_release_selected_regions(pdev,
11285 pci_select_bars(pdev, IORESOURCE_MEM));
11287 pci_disable_pcie_error_reporting(pdev);
11288 pci_disable_device(pdev);
11292 * i40e_pci_error_detected - warning that something funky happened in PCI land
11293 * @pdev: PCI device information struct
11295 * Called to warn that something happened and the error handling steps
11296 * are in progress. Allows the driver to quiesce things, be ready for
11299 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11300 enum pci_channel_state error)
11302 struct i40e_pf *pf = pci_get_drvdata(pdev);
11304 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11306 /* shutdown all operations */
11307 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11309 i40e_prep_for_reset(pf);
11313 /* Request a slot reset */
11314 return PCI_ERS_RESULT_NEED_RESET;
11318 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11319 * @pdev: PCI device information struct
11321 * Called to find if the driver can work with the device now that
11322 * the pci slot has been reset. If a basic connection seems good
11323 * (registers are readable and have sane content) then return a
11324 * happy little PCI_ERS_RESULT_xxx.
11326 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11328 struct i40e_pf *pf = pci_get_drvdata(pdev);
11329 pci_ers_result_t result;
11333 dev_dbg(&pdev->dev, "%s\n", __func__);
11334 if (pci_enable_device_mem(pdev)) {
11335 dev_info(&pdev->dev,
11336 "Cannot re-enable PCI device after reset.\n");
11337 result = PCI_ERS_RESULT_DISCONNECT;
11339 pci_set_master(pdev);
11340 pci_restore_state(pdev);
11341 pci_save_state(pdev);
11342 pci_wake_from_d3(pdev, false);
11344 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11346 result = PCI_ERS_RESULT_RECOVERED;
11348 result = PCI_ERS_RESULT_DISCONNECT;
11351 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11353 dev_info(&pdev->dev,
11354 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11356 /* non-fatal, continue */
11363 * i40e_pci_error_resume - restart operations after PCI error recovery
11364 * @pdev: PCI device information struct
11366 * Called to allow the driver to bring things back up after PCI error
11367 * and/or reset recovery has finished.
11369 static void i40e_pci_error_resume(struct pci_dev *pdev)
11371 struct i40e_pf *pf = pci_get_drvdata(pdev);
11373 dev_dbg(&pdev->dev, "%s\n", __func__);
11374 if (test_bit(__I40E_SUSPENDED, &pf->state))
11378 i40e_handle_reset_warning(pf);
11383 * i40e_shutdown - PCI callback for shutting down
11384 * @pdev: PCI device information struct
11386 static void i40e_shutdown(struct pci_dev *pdev)
11388 struct i40e_pf *pf = pci_get_drvdata(pdev);
11389 struct i40e_hw *hw = &pf->hw;
11391 set_bit(__I40E_SUSPENDED, &pf->state);
11392 set_bit(__I40E_DOWN, &pf->state);
11394 i40e_prep_for_reset(pf);
11397 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11398 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11400 del_timer_sync(&pf->service_timer);
11401 cancel_work_sync(&pf->service_task);
11402 i40e_fdir_teardown(pf);
11405 i40e_prep_for_reset(pf);
11408 wr32(hw, I40E_PFPM_APM,
11409 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11410 wr32(hw, I40E_PFPM_WUFC,
11411 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11413 i40e_clear_interrupt_scheme(pf);
11415 if (system_state == SYSTEM_POWER_OFF) {
11416 pci_wake_from_d3(pdev, pf->wol_en);
11417 pci_set_power_state(pdev, PCI_D3hot);
11423 * i40e_suspend - PCI callback for moving to D3
11424 * @pdev: PCI device information struct
11426 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11428 struct i40e_pf *pf = pci_get_drvdata(pdev);
11429 struct i40e_hw *hw = &pf->hw;
11431 set_bit(__I40E_SUSPENDED, &pf->state);
11432 set_bit(__I40E_DOWN, &pf->state);
11435 i40e_prep_for_reset(pf);
11438 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11439 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11441 pci_wake_from_d3(pdev, pf->wol_en);
11442 pci_set_power_state(pdev, PCI_D3hot);
11448 * i40e_resume - PCI callback for waking up from D3
11449 * @pdev: PCI device information struct
11451 static int i40e_resume(struct pci_dev *pdev)
11453 struct i40e_pf *pf = pci_get_drvdata(pdev);
11456 pci_set_power_state(pdev, PCI_D0);
11457 pci_restore_state(pdev);
11458 /* pci_restore_state() clears dev->state_saves, so
11459 * call pci_save_state() again to restore it.
11461 pci_save_state(pdev);
11463 err = pci_enable_device_mem(pdev);
11465 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11468 pci_set_master(pdev);
11470 /* no wakeup events while running */
11471 pci_wake_from_d3(pdev, false);
11473 /* handling the reset will rebuild the device state */
11474 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11475 clear_bit(__I40E_DOWN, &pf->state);
11477 i40e_reset_and_rebuild(pf, false);
11485 static const struct pci_error_handlers i40e_err_handler = {
11486 .error_detected = i40e_pci_error_detected,
11487 .slot_reset = i40e_pci_error_slot_reset,
11488 .resume = i40e_pci_error_resume,
11491 static struct pci_driver i40e_driver = {
11492 .name = i40e_driver_name,
11493 .id_table = i40e_pci_tbl,
11494 .probe = i40e_probe,
11495 .remove = i40e_remove,
11497 .suspend = i40e_suspend,
11498 .resume = i40e_resume,
11500 .shutdown = i40e_shutdown,
11501 .err_handler = &i40e_err_handler,
11502 .sriov_configure = i40e_pci_sriov_configure,
11506 * i40e_init_module - Driver registration routine
11508 * i40e_init_module is the first routine called when the driver is
11509 * loaded. All it does is register with the PCI subsystem.
11511 static int __init i40e_init_module(void)
11513 pr_info("%s: %s - version %s\n", i40e_driver_name,
11514 i40e_driver_string, i40e_driver_version_str);
11515 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11518 return pci_register_driver(&i40e_driver);
11520 module_init(i40e_init_module);
11523 * i40e_exit_module - Driver exit cleanup routine
11525 * i40e_exit_module is called just before the driver is removed
11528 static void __exit i40e_exit_module(void)
11530 pci_unregister_driver(&i40e_driver);
11533 module_exit(i40e_exit_module);