1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
42 #define DRV_VERSION_MAJOR 2
43 #define DRV_VERSION_MINOR 1
44 #define DRV_VERSION_BUILD 7
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
90 /* required last entry */
93 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95 #define I40E_MAX_VF_COUNT 128
96 static int debug = -1;
97 module_param(debug, uint, 0);
98 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
100 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
101 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
105 static struct workqueue_struct *i40e_wq;
108 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
109 * @hw: pointer to the HW structure
110 * @mem: ptr to mem struct to fill out
111 * @size: size of memory requested
112 * @alignment: what to align the allocation to
114 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
115 u64 size, u32 alignment)
117 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
119 mem->size = ALIGN(size, alignment);
120 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
121 &mem->pa, GFP_KERNEL);
129 * i40e_free_dma_mem_d - OS specific memory free for shared code
130 * @hw: pointer to the HW structure
131 * @mem: ptr to mem struct to free
133 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
135 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
137 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
146 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
147 * @hw: pointer to the HW structure
148 * @mem: ptr to mem struct to fill out
149 * @size: size of memory requested
151 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
155 mem->va = kzalloc(size, GFP_KERNEL);
164 * i40e_free_virt_mem_d - OS specific memory free for shared code
165 * @hw: pointer to the HW structure
166 * @mem: ptr to mem struct to free
168 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
170 /* it's ok to kfree a NULL pointer */
179 * i40e_get_lump - find a lump of free generic resource
180 * @pf: board private structure
181 * @pile: the pile of resource to search
182 * @needed: the number of items needed
183 * @id: an owner id to stick on the items assigned
185 * Returns the base item index of the lump, or negative for error
187 * The search_hint trick and lack of advanced fit-finding only work
188 * because we're highly likely to have all the same size lump requests.
189 * Linear search time and any fragmentation should be minimal.
191 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
197 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
198 dev_info(&pf->pdev->dev,
199 "param err: pile=%p needed=%d id=0x%04x\n",
204 /* start the linear search with an imperfect hint */
205 i = pile->search_hint;
206 while (i < pile->num_entries) {
207 /* skip already allocated entries */
208 if (pile->list[i] & I40E_PILE_VALID_BIT) {
213 /* do we have enough in this lump? */
214 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
215 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
220 /* there was enough, so assign it to the requestor */
221 for (j = 0; j < needed; j++)
222 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
224 pile->search_hint = i + j;
228 /* not enough, so skip over it and continue looking */
236 * i40e_put_lump - return a lump of generic resource
237 * @pile: the pile of resource to search
238 * @index: the base item index
239 * @id: the owner id of the items assigned
241 * Returns the count of items in the lump
243 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
245 int valid_id = (id | I40E_PILE_VALID_BIT);
249 if (!pile || index >= pile->num_entries)
253 i < pile->num_entries && pile->list[i] == valid_id;
259 if (count && index < pile->search_hint)
260 pile->search_hint = index;
266 * i40e_find_vsi_from_id - searches for the vsi with the given id
267 * @pf - the pf structure to search for the vsi
268 * @id - id of the vsi it is searching for
270 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
274 for (i = 0; i < pf->num_alloc_vsi; i++)
275 if (pf->vsi[i] && (pf->vsi[i]->id == id))
282 * i40e_service_event_schedule - Schedule the service task to wake up
283 * @pf: board private structure
285 * If not already scheduled, this puts the task into the work queue
287 void i40e_service_event_schedule(struct i40e_pf *pf)
289 if (!test_bit(__I40E_DOWN, &pf->state) &&
290 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
303 void i40e_tx_timeout(struct net_device *netdev)
305 static void i40e_tx_timeout(struct net_device *netdev)
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
315 pf->tx_timeout_count++;
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
326 (trans_start + netdev->watchdog_timeo))) {
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
373 switch (pf->tx_timeout_recovery_level) {
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
401 return &vsi->net_stats;
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
414 void i40e_get_netdev_stats_struct(struct net_device *netdev,
415 struct rtnl_link_stats64 *stats)
417 struct i40e_netdev_priv *np = netdev_priv(netdev);
418 struct i40e_ring *tx_ring, *rx_ring;
419 struct i40e_vsi *vsi = np->vsi;
420 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
423 if (test_bit(__I40E_DOWN, &vsi->state))
430 for (i = 0; i < vsi->num_queue_pairs; i++) {
434 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
439 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
440 packets = tx_ring->stats.packets;
441 bytes = tx_ring->stats.bytes;
442 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
444 stats->tx_packets += packets;
445 stats->tx_bytes += bytes;
446 rx_ring = &tx_ring[1];
449 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
450 packets = rx_ring->stats.packets;
451 bytes = rx_ring->stats.bytes;
452 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
454 stats->rx_packets += packets;
455 stats->rx_bytes += bytes;
459 /* following stats updated by i40e_watchdog_subtask() */
460 stats->multicast = vsi_stats->multicast;
461 stats->tx_errors = vsi_stats->tx_errors;
462 stats->tx_dropped = vsi_stats->tx_dropped;
463 stats->rx_errors = vsi_stats->rx_errors;
464 stats->rx_dropped = vsi_stats->rx_dropped;
465 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
466 stats->rx_length_errors = vsi_stats->rx_length_errors;
470 * i40e_vsi_reset_stats - Resets all stats of the given vsi
471 * @vsi: the VSI to have its stats reset
473 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
475 struct rtnl_link_stats64 *ns;
481 ns = i40e_get_vsi_stats_struct(vsi);
482 memset(ns, 0, sizeof(*ns));
483 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
484 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
485 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
486 if (vsi->rx_rings && vsi->rx_rings[0]) {
487 for (i = 0; i < vsi->num_queue_pairs; i++) {
488 memset(&vsi->rx_rings[i]->stats, 0,
489 sizeof(vsi->rx_rings[i]->stats));
490 memset(&vsi->rx_rings[i]->rx_stats, 0,
491 sizeof(vsi->rx_rings[i]->rx_stats));
492 memset(&vsi->tx_rings[i]->stats, 0,
493 sizeof(vsi->tx_rings[i]->stats));
494 memset(&vsi->tx_rings[i]->tx_stats, 0,
495 sizeof(vsi->tx_rings[i]->tx_stats));
498 vsi->stat_offsets_loaded = false;
502 * i40e_pf_reset_stats - Reset all of the stats for the given PF
503 * @pf: the PF to be reset
505 void i40e_pf_reset_stats(struct i40e_pf *pf)
509 memset(&pf->stats, 0, sizeof(pf->stats));
510 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
511 pf->stat_offsets_loaded = false;
513 for (i = 0; i < I40E_MAX_VEB; i++) {
515 memset(&pf->veb[i]->stats, 0,
516 sizeof(pf->veb[i]->stats));
517 memset(&pf->veb[i]->stats_offsets, 0,
518 sizeof(pf->veb[i]->stats_offsets));
519 pf->veb[i]->stat_offsets_loaded = false;
522 pf->hw_csum_rx_error = 0;
526 * i40e_stat_update48 - read and update a 48 bit stat from the chip
527 * @hw: ptr to the hardware info
528 * @hireg: the high 32 bit reg to read
529 * @loreg: the low 32 bit reg to read
530 * @offset_loaded: has the initial offset been loaded yet
531 * @offset: ptr to current offset value
532 * @stat: ptr to the stat
534 * Since the device stats are not reset at PFReset, they likely will not
535 * be zeroed when the driver starts. We'll save the first values read
536 * and use them as offsets to be subtracted from the raw values in order
537 * to report stats that count from zero. In the process, we also manage
538 * the potential roll-over.
540 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
541 bool offset_loaded, u64 *offset, u64 *stat)
545 if (hw->device_id == I40E_DEV_ID_QEMU) {
546 new_data = rd32(hw, loreg);
547 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
549 new_data = rd64(hw, loreg);
553 if (likely(new_data >= *offset))
554 *stat = new_data - *offset;
556 *stat = (new_data + BIT_ULL(48)) - *offset;
557 *stat &= 0xFFFFFFFFFFFFULL;
561 * i40e_stat_update32 - read and update a 32 bit stat from the chip
562 * @hw: ptr to the hardware info
563 * @reg: the hw reg to read
564 * @offset_loaded: has the initial offset been loaded yet
565 * @offset: ptr to current offset value
566 * @stat: ptr to the stat
568 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
569 bool offset_loaded, u64 *offset, u64 *stat)
573 new_data = rd32(hw, reg);
576 if (likely(new_data >= *offset))
577 *stat = (u32)(new_data - *offset);
579 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
583 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
584 * @vsi: the VSI to be updated
586 void i40e_update_eth_stats(struct i40e_vsi *vsi)
588 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
589 struct i40e_pf *pf = vsi->back;
590 struct i40e_hw *hw = &pf->hw;
591 struct i40e_eth_stats *oes;
592 struct i40e_eth_stats *es; /* device's eth stats */
594 es = &vsi->eth_stats;
595 oes = &vsi->eth_stats_offsets;
597 /* Gather up the stats that the hw collects */
598 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
599 vsi->stat_offsets_loaded,
600 &oes->tx_errors, &es->tx_errors);
601 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
602 vsi->stat_offsets_loaded,
603 &oes->rx_discards, &es->rx_discards);
604 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
607 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->tx_errors, &es->tx_errors);
611 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
612 I40E_GLV_GORCL(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->rx_bytes, &es->rx_bytes);
615 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
616 I40E_GLV_UPRCL(stat_idx),
617 vsi->stat_offsets_loaded,
618 &oes->rx_unicast, &es->rx_unicast);
619 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
620 I40E_GLV_MPRCL(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_multicast, &es->rx_multicast);
623 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
624 I40E_GLV_BPRCL(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_broadcast, &es->rx_broadcast);
628 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
629 I40E_GLV_GOTCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->tx_bytes, &es->tx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
633 I40E_GLV_UPTCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->tx_unicast, &es->tx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
637 I40E_GLV_MPTCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_multicast, &es->tx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
641 I40E_GLV_BPTCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_broadcast, &es->tx_broadcast);
644 vsi->stat_offsets_loaded = true;
648 * i40e_update_veb_stats - Update Switch component statistics
649 * @veb: the VEB being updated
651 static void i40e_update_veb_stats(struct i40e_veb *veb)
653 struct i40e_pf *pf = veb->pf;
654 struct i40e_hw *hw = &pf->hw;
655 struct i40e_eth_stats *oes;
656 struct i40e_eth_stats *es; /* device's eth stats */
657 struct i40e_veb_tc_stats *veb_oes;
658 struct i40e_veb_tc_stats *veb_es;
661 idx = veb->stats_idx;
663 oes = &veb->stats_offsets;
664 veb_es = &veb->tc_stats;
665 veb_oes = &veb->tc_stats_offsets;
667 /* Gather up the stats that the hw collects */
668 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
669 veb->stat_offsets_loaded,
670 &oes->tx_discards, &es->tx_discards);
671 if (hw->revision_id > 0)
672 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
673 veb->stat_offsets_loaded,
674 &oes->rx_unknown_protocol,
675 &es->rx_unknown_protocol);
676 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
677 veb->stat_offsets_loaded,
678 &oes->rx_bytes, &es->rx_bytes);
679 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
680 veb->stat_offsets_loaded,
681 &oes->rx_unicast, &es->rx_unicast);
682 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_multicast, &es->rx_multicast);
685 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_broadcast, &es->rx_broadcast);
689 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
690 veb->stat_offsets_loaded,
691 &oes->tx_bytes, &es->tx_bytes);
692 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->tx_unicast, &es->tx_unicast);
695 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_multicast, &es->tx_multicast);
698 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_broadcast, &es->tx_broadcast);
701 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
702 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
703 I40E_GLVEBTC_RPCL(i, idx),
704 veb->stat_offsets_loaded,
705 &veb_oes->tc_rx_packets[i],
706 &veb_es->tc_rx_packets[i]);
707 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
708 I40E_GLVEBTC_RBCL(i, idx),
709 veb->stat_offsets_loaded,
710 &veb_oes->tc_rx_bytes[i],
711 &veb_es->tc_rx_bytes[i]);
712 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
713 I40E_GLVEBTC_TPCL(i, idx),
714 veb->stat_offsets_loaded,
715 &veb_oes->tc_tx_packets[i],
716 &veb_es->tc_tx_packets[i]);
717 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
718 I40E_GLVEBTC_TBCL(i, idx),
719 veb->stat_offsets_loaded,
720 &veb_oes->tc_tx_bytes[i],
721 &veb_es->tc_tx_bytes[i]);
723 veb->stat_offsets_loaded = true;
728 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
729 * @vsi: the VSI that is capable of doing FCoE
731 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
733 struct i40e_pf *pf = vsi->back;
734 struct i40e_hw *hw = &pf->hw;
735 struct i40e_fcoe_stats *ofs;
736 struct i40e_fcoe_stats *fs; /* device's eth stats */
739 if (vsi->type != I40E_VSI_FCOE)
742 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
743 fs = &vsi->fcoe_stats;
744 ofs = &vsi->fcoe_stats_offsets;
746 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
747 vsi->fcoe_stat_offsets_loaded,
748 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
749 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
750 vsi->fcoe_stat_offsets_loaded,
751 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
752 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
755 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
758 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
761 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
764 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->fcoe_last_error, &fs->fcoe_last_error);
767 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
771 vsi->fcoe_stat_offsets_loaded = true;
776 * i40e_update_vsi_stats - Update the vsi statistics counters.
777 * @vsi: the VSI to be updated
779 * There are a few instances where we store the same stat in a
780 * couple of different structs. This is partly because we have
781 * the netdev stats that need to be filled out, which is slightly
782 * different from the "eth_stats" defined by the chip and used in
783 * VF communications. We sort it out here.
785 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
787 struct i40e_pf *pf = vsi->back;
788 struct rtnl_link_stats64 *ons;
789 struct rtnl_link_stats64 *ns; /* netdev stats */
790 struct i40e_eth_stats *oes;
791 struct i40e_eth_stats *es; /* device's eth stats */
792 u32 tx_restart, tx_busy;
793 u64 tx_lost_interrupt;
804 if (test_bit(__I40E_DOWN, &vsi->state) ||
805 test_bit(__I40E_CONFIG_BUSY, &pf->state))
808 ns = i40e_get_vsi_stats_struct(vsi);
809 ons = &vsi->net_stats_offsets;
810 es = &vsi->eth_stats;
811 oes = &vsi->eth_stats_offsets;
813 /* Gather up the netdev and vsi stats that the driver collects
814 * on the fly during packet processing
818 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
819 tx_lost_interrupt = 0;
823 for (q = 0; q < vsi->num_queue_pairs; q++) {
825 p = ACCESS_ONCE(vsi->tx_rings[q]);
828 start = u64_stats_fetch_begin_irq(&p->syncp);
829 packets = p->stats.packets;
830 bytes = p->stats.bytes;
831 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
834 tx_restart += p->tx_stats.restart_queue;
835 tx_busy += p->tx_stats.tx_busy;
836 tx_linearize += p->tx_stats.tx_linearize;
837 tx_force_wb += p->tx_stats.tx_force_wb;
838 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
840 /* Rx queue is part of the same block as Tx queue */
843 start = u64_stats_fetch_begin_irq(&p->syncp);
844 packets = p->stats.packets;
845 bytes = p->stats.bytes;
846 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
849 rx_buf += p->rx_stats.alloc_buff_failed;
850 rx_page += p->rx_stats.alloc_page_failed;
853 vsi->tx_restart = tx_restart;
854 vsi->tx_busy = tx_busy;
855 vsi->tx_linearize = tx_linearize;
856 vsi->tx_force_wb = tx_force_wb;
857 vsi->tx_lost_interrupt = tx_lost_interrupt;
858 vsi->rx_page_failed = rx_page;
859 vsi->rx_buf_failed = rx_buf;
861 ns->rx_packets = rx_p;
863 ns->tx_packets = tx_p;
866 /* update netdev stats from eth stats */
867 i40e_update_eth_stats(vsi);
868 ons->tx_errors = oes->tx_errors;
869 ns->tx_errors = es->tx_errors;
870 ons->multicast = oes->rx_multicast;
871 ns->multicast = es->rx_multicast;
872 ons->rx_dropped = oes->rx_discards;
873 ns->rx_dropped = es->rx_discards;
874 ons->tx_dropped = oes->tx_discards;
875 ns->tx_dropped = es->tx_discards;
877 /* pull in a couple PF stats if this is the main vsi */
878 if (vsi == pf->vsi[pf->lan_vsi]) {
879 ns->rx_crc_errors = pf->stats.crc_errors;
880 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
881 ns->rx_length_errors = pf->stats.rx_length_errors;
886 * i40e_update_pf_stats - Update the PF statistics counters.
887 * @pf: the PF to be updated
889 static void i40e_update_pf_stats(struct i40e_pf *pf)
891 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
892 struct i40e_hw_port_stats *nsd = &pf->stats;
893 struct i40e_hw *hw = &pf->hw;
897 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
898 I40E_GLPRT_GORCL(hw->port),
899 pf->stat_offsets_loaded,
900 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
901 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
902 I40E_GLPRT_GOTCL(hw->port),
903 pf->stat_offsets_loaded,
904 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
905 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
906 pf->stat_offsets_loaded,
907 &osd->eth.rx_discards,
908 &nsd->eth.rx_discards);
909 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
910 I40E_GLPRT_UPRCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.rx_unicast,
913 &nsd->eth.rx_unicast);
914 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
915 I40E_GLPRT_MPRCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.rx_multicast,
918 &nsd->eth.rx_multicast);
919 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
920 I40E_GLPRT_BPRCL(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->eth.rx_broadcast,
923 &nsd->eth.rx_broadcast);
924 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
925 I40E_GLPRT_UPTCL(hw->port),
926 pf->stat_offsets_loaded,
927 &osd->eth.tx_unicast,
928 &nsd->eth.tx_unicast);
929 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
930 I40E_GLPRT_MPTCL(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.tx_multicast,
933 &nsd->eth.tx_multicast);
934 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
935 I40E_GLPRT_BPTCL(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.tx_broadcast,
938 &nsd->eth.tx_broadcast);
940 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->tx_dropped_link_down,
943 &nsd->tx_dropped_link_down);
945 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->crc_errors, &nsd->crc_errors);
949 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->illegal_bytes, &nsd->illegal_bytes);
953 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->mac_local_faults,
956 &nsd->mac_local_faults);
957 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->mac_remote_faults,
960 &nsd->mac_remote_faults);
962 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_length_errors,
965 &nsd->rx_length_errors);
967 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->link_xon_rx, &nsd->link_xon_rx);
970 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->link_xon_tx, &nsd->link_xon_tx);
973 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xoff_rx, &nsd->link_xoff_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xoff_tx, &nsd->link_xoff_tx);
980 for (i = 0; i < 8; i++) {
981 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
982 pf->stat_offsets_loaded,
983 &osd->priority_xoff_rx[i],
984 &nsd->priority_xoff_rx[i]);
985 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
986 pf->stat_offsets_loaded,
987 &osd->priority_xon_rx[i],
988 &nsd->priority_xon_rx[i]);
989 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
990 pf->stat_offsets_loaded,
991 &osd->priority_xon_tx[i],
992 &nsd->priority_xon_tx[i]);
993 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
994 pf->stat_offsets_loaded,
995 &osd->priority_xoff_tx[i],
996 &nsd->priority_xoff_tx[i]);
997 i40e_stat_update32(hw,
998 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
999 pf->stat_offsets_loaded,
1000 &osd->priority_xon_2_xoff[i],
1001 &nsd->priority_xon_2_xoff[i]);
1004 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1005 I40E_GLPRT_PRC64L(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->rx_size_64, &nsd->rx_size_64);
1008 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1009 I40E_GLPRT_PRC127L(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->rx_size_127, &nsd->rx_size_127);
1012 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1013 I40E_GLPRT_PRC255L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->rx_size_255, &nsd->rx_size_255);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1017 I40E_GLPRT_PRC511L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_511, &nsd->rx_size_511);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1021 I40E_GLPRT_PRC1023L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_1023, &nsd->rx_size_1023);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1025 I40E_GLPRT_PRC1522L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_1522, &nsd->rx_size_1522);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1029 I40E_GLPRT_PRC9522L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_big, &nsd->rx_size_big);
1033 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1034 I40E_GLPRT_PTC64L(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->tx_size_64, &nsd->tx_size_64);
1037 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1038 I40E_GLPRT_PTC127L(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->tx_size_127, &nsd->tx_size_127);
1041 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1042 I40E_GLPRT_PTC255L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->tx_size_255, &nsd->tx_size_255);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1046 I40E_GLPRT_PTC511L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_511, &nsd->tx_size_511);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1050 I40E_GLPRT_PTC1023L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_1023, &nsd->tx_size_1023);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1054 I40E_GLPRT_PTC1522L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_1522, &nsd->tx_size_1522);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1058 I40E_GLPRT_PTC9522L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_big, &nsd->tx_size_big);
1062 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->rx_undersize, &nsd->rx_undersize);
1065 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->rx_fragments, &nsd->rx_fragments);
1068 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_oversize, &nsd->rx_oversize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_jabber, &nsd->rx_jabber);
1076 i40e_stat_update32(hw,
1077 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1078 pf->stat_offsets_loaded,
1079 &osd->fd_atr_match, &nsd->fd_atr_match);
1080 i40e_stat_update32(hw,
1081 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1082 pf->stat_offsets_loaded,
1083 &osd->fd_sb_match, &nsd->fd_sb_match);
1084 i40e_stat_update32(hw,
1085 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1086 pf->stat_offsets_loaded,
1087 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1089 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1090 nsd->tx_lpi_status =
1091 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1092 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1093 nsd->rx_lpi_status =
1094 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1095 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1096 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1097 pf->stat_offsets_loaded,
1098 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1099 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1100 pf->stat_offsets_loaded,
1101 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1103 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1104 !(pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED))
1105 nsd->fd_sb_status = true;
1107 nsd->fd_sb_status = false;
1109 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1110 !(pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED))
1111 nsd->fd_atr_status = true;
1113 nsd->fd_atr_status = false;
1115 pf->stat_offsets_loaded = true;
1119 * i40e_update_stats - Update the various statistics counters.
1120 * @vsi: the VSI to be updated
1122 * Update the various stats for this VSI and its related entities.
1124 void i40e_update_stats(struct i40e_vsi *vsi)
1126 struct i40e_pf *pf = vsi->back;
1128 if (vsi == pf->vsi[pf->lan_vsi])
1129 i40e_update_pf_stats(pf);
1131 i40e_update_vsi_stats(vsi);
1133 i40e_update_fcoe_stats(vsi);
1138 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1139 * @vsi: the VSI to be searched
1140 * @macaddr: the MAC address
1143 * Returns ptr to the filter object or NULL
1145 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1146 const u8 *macaddr, s16 vlan)
1148 struct i40e_mac_filter *f;
1151 if (!vsi || !macaddr)
1154 key = i40e_addr_to_hkey(macaddr);
1155 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1156 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 * i40e_find_mac - Find a mac addr in the macvlan filters list
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address we are searching for
1168 * Returns the first filter with the provided MAC address or NULL if
1169 * MAC address was not found
1171 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1173 struct i40e_mac_filter *f;
1176 if (!vsi || !macaddr)
1179 key = i40e_addr_to_hkey(macaddr);
1180 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1181 if ((ether_addr_equal(macaddr, f->macaddr)))
1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1189 * @vsi: the VSI to be searched
1191 * Returns true if VSI is in vlan mode or false otherwise
1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1195 /* If we have a PVID, always operate in VLAN mode */
1199 /* We need to operate in VLAN mode whenever we have any filters with
1200 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1201 * time, incurring search cost repeatedly. However, we can notice two
1204 * 1) the only place where we can gain a VLAN filter is in
1207 * 2) the only place where filters are actually removed is in
1208 * i40e_sync_filters_subtask.
1210 * Thus, we can simply use a boolean value, has_vlan_filters which we
1211 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1212 * we have to perform the full search after deleting filters in
1213 * i40e_sync_filters_subtask, but we already have to search
1214 * filters here and can perform the check at the same time. This
1215 * results in avoiding embedding a loop for VLAN mode inside another
1216 * loop over all the filters, and should maintain correctness as noted
1219 return vsi->has_vlan_filter;
1223 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1224 * @vsi: the VSI to configure
1225 * @tmp_add_list: list of filters ready to be added
1226 * @tmp_del_list: list of filters ready to be deleted
1227 * @vlan_filters: the number of active VLAN filters
1229 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1230 * behave as expected. If we have any active VLAN filters remaining or about
1231 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1232 * so that they only match against untagged traffic. If we no longer have any
1233 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1234 * so that they match against both tagged and untagged traffic. In this way,
1235 * we ensure that we correctly receive the desired traffic. This ensures that
1236 * when we have an active VLAN we will receive only untagged traffic and
1237 * traffic matching active VLANs. If we have no active VLANs then we will
1238 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1240 * Finally, in a similar fashion, this function also corrects filters when
1241 * there is an active PVID assigned to this VSI.
1243 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1245 * This function is only expected to be called from within
1246 * i40e_sync_vsi_filters.
1248 * NOTE: This function expects to be called while under the
1249 * mac_filter_hash_lock
1251 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1252 struct hlist_head *tmp_add_list,
1253 struct hlist_head *tmp_del_list,
1256 s16 pvid = le16_to_cpu(vsi->info.pvid);
1257 struct i40e_mac_filter *f, *add_head;
1258 struct i40e_new_mac_filter *new;
1259 struct hlist_node *h;
1262 /* To determine if a particular filter needs to be replaced we
1263 * have the three following conditions:
1265 * a) if we have a PVID assigned, then all filters which are
1266 * not marked as VLAN=PVID must be replaced with filters that
1268 * b) otherwise, if we have any active VLANS, all filters
1269 * which are marked as VLAN=-1 must be replaced with
1270 * filters marked as VLAN=0
1271 * c) finally, if we do not have any active VLANS, all filters
1272 * which are marked as VLAN=0 must be replaced with filters
1276 /* Update the filters about to be added in place */
1277 hlist_for_each_entry(new, tmp_add_list, hlist) {
1278 if (pvid && new->f->vlan != pvid)
1279 new->f->vlan = pvid;
1280 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1282 else if (!vlan_filters && new->f->vlan == 0)
1283 new->f->vlan = I40E_VLAN_ANY;
1286 /* Update the remaining active filters */
1287 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1288 /* Combine the checks for whether a filter needs to be changed
1289 * and then determine the new VLAN inside the if block, in
1290 * order to avoid duplicating code for adding the new filter
1291 * then deleting the old filter.
1293 if ((pvid && f->vlan != pvid) ||
1294 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1295 (!vlan_filters && f->vlan == 0)) {
1296 /* Determine the new vlan we will be adding */
1299 else if (vlan_filters)
1302 new_vlan = I40E_VLAN_ANY;
1304 /* Create the new filter */
1305 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1309 /* Create a temporary i40e_new_mac_filter */
1310 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1315 new->state = add_head->state;
1317 /* Add the new filter to the tmp list */
1318 hlist_add_head(&new->hlist, tmp_add_list);
1320 /* Put the original filter into the delete list */
1321 f->state = I40E_FILTER_REMOVE;
1322 hash_del(&f->hlist);
1323 hlist_add_head(&f->hlist, tmp_del_list);
1327 vsi->has_vlan_filter = !!vlan_filters;
1333 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1334 * @vsi: the PF Main VSI - inappropriate for any other VSI
1335 * @macaddr: the MAC address
1337 * Remove whatever filter the firmware set up so the driver can manage
1338 * its own filtering intelligently.
1340 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1342 struct i40e_aqc_remove_macvlan_element_data element;
1343 struct i40e_pf *pf = vsi->back;
1345 /* Only appropriate for the PF main VSI */
1346 if (vsi->type != I40E_VSI_MAIN)
1349 memset(&element, 0, sizeof(element));
1350 ether_addr_copy(element.mac_addr, macaddr);
1351 element.vlan_tag = 0;
1352 /* Ignore error returns, some firmware does it this way... */
1353 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1354 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1356 memset(&element, 0, sizeof(element));
1357 ether_addr_copy(element.mac_addr, macaddr);
1358 element.vlan_tag = 0;
1359 /* ...and some firmware does it this way. */
1360 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1361 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1362 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1366 * i40e_add_filter - Add a mac/vlan filter to the VSI
1367 * @vsi: the VSI to be searched
1368 * @macaddr: the MAC address
1371 * Returns ptr to the filter object or NULL when no memory available.
1373 * NOTE: This function is expected to be called with mac_filter_hash_lock
1376 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1377 const u8 *macaddr, s16 vlan)
1379 struct i40e_mac_filter *f;
1382 if (!vsi || !macaddr)
1385 f = i40e_find_filter(vsi, macaddr, vlan);
1387 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1391 /* Update the boolean indicating if we need to function in
1395 vsi->has_vlan_filter = true;
1397 ether_addr_copy(f->macaddr, macaddr);
1399 /* If we're in overflow promisc mode, set the state directly
1400 * to failed, so we don't bother to try sending the filter
1403 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1404 f->state = I40E_FILTER_FAILED;
1406 f->state = I40E_FILTER_NEW;
1407 INIT_HLIST_NODE(&f->hlist);
1409 key = i40e_addr_to_hkey(macaddr);
1410 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1412 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1413 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1416 /* If we're asked to add a filter that has been marked for removal, it
1417 * is safe to simply restore it to active state. __i40e_del_filter
1418 * will have simply deleted any filters which were previously marked
1419 * NEW or FAILED, so if it is currently marked REMOVE it must have
1420 * previously been ACTIVE. Since we haven't yet run the sync filters
1421 * task, just restore this filter to the ACTIVE state so that the
1422 * sync task leaves it in place
1424 if (f->state == I40E_FILTER_REMOVE)
1425 f->state = I40E_FILTER_ACTIVE;
1431 * __i40e_del_filter - Remove a specific filter from the VSI
1432 * @vsi: VSI to remove from
1433 * @f: the filter to remove from the list
1435 * This function should be called instead of i40e_del_filter only if you know
1436 * the exact filter you will remove already, such as via i40e_find_filter or
1439 * NOTE: This function is expected to be called with mac_filter_hash_lock
1441 * ANOTHER NOTE: This function MUST be called from within the context of
1442 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1443 * instead of list_for_each_entry().
1445 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1450 /* If the filter was never added to firmware then we can just delete it
1451 * directly and we don't want to set the status to remove or else an
1452 * admin queue command will unnecessarily fire.
1454 if ((f->state == I40E_FILTER_FAILED) ||
1455 (f->state == I40E_FILTER_NEW)) {
1456 hash_del(&f->hlist);
1459 f->state = I40E_FILTER_REMOVE;
1462 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1463 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1467 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1468 * @vsi: the VSI to be searched
1469 * @macaddr: the MAC address
1472 * NOTE: This function is expected to be called with mac_filter_hash_lock
1474 * ANOTHER NOTE: This function MUST be called from within the context of
1475 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1476 * instead of list_for_each_entry().
1478 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1480 struct i40e_mac_filter *f;
1482 if (!vsi || !macaddr)
1485 f = i40e_find_filter(vsi, macaddr, vlan);
1486 __i40e_del_filter(vsi, f);
1490 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1491 * @vsi: the VSI to be searched
1492 * @macaddr: the mac address to be filtered
1494 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1495 * go through all the macvlan filters and add a macvlan filter for each
1496 * unique vlan that already exists. If a PVID has been assigned, instead only
1497 * add the macaddr to that VLAN.
1499 * Returns last filter added on success, else NULL
1501 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1504 struct i40e_mac_filter *f, *add = NULL;
1505 struct hlist_node *h;
1509 return i40e_add_filter(vsi, macaddr,
1510 le16_to_cpu(vsi->info.pvid));
1512 if (!i40e_is_vsi_in_vlan(vsi))
1513 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1515 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1516 if (f->state == I40E_FILTER_REMOVE)
1518 add = i40e_add_filter(vsi, macaddr, f->vlan);
1527 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1528 * @vsi: the VSI to be searched
1529 * @macaddr: the mac address to be removed
1531 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1534 * Returns 0 for success, or error
1536 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1538 struct i40e_mac_filter *f;
1539 struct hlist_node *h;
1543 WARN(!spin_is_locked(&vsi->mac_filter_hash_lock),
1544 "Missing mac_filter_hash_lock\n");
1545 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1546 if (ether_addr_equal(macaddr, f->macaddr)) {
1547 __i40e_del_filter(vsi, f);
1559 * i40e_set_mac - NDO callback to set mac address
1560 * @netdev: network interface device structure
1561 * @p: pointer to an address structure
1563 * Returns 0 on success, negative on failure
1566 int i40e_set_mac(struct net_device *netdev, void *p)
1568 static int i40e_set_mac(struct net_device *netdev, void *p)
1571 struct i40e_netdev_priv *np = netdev_priv(netdev);
1572 struct i40e_vsi *vsi = np->vsi;
1573 struct i40e_pf *pf = vsi->back;
1574 struct i40e_hw *hw = &pf->hw;
1575 struct sockaddr *addr = p;
1577 if (!is_valid_ether_addr(addr->sa_data))
1578 return -EADDRNOTAVAIL;
1580 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1581 netdev_info(netdev, "already using mac address %pM\n",
1586 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1587 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1588 return -EADDRNOTAVAIL;
1590 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1591 netdev_info(netdev, "returning to hw mac address %pM\n",
1594 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1596 spin_lock_bh(&vsi->mac_filter_hash_lock);
1597 i40e_del_mac_filter(vsi, netdev->dev_addr);
1598 i40e_add_mac_filter(vsi, addr->sa_data);
1599 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1600 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1601 if (vsi->type == I40E_VSI_MAIN) {
1604 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1605 I40E_AQC_WRITE_TYPE_LAA_WOL,
1606 addr->sa_data, NULL);
1608 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1609 i40e_stat_str(hw, ret),
1610 i40e_aq_str(hw, hw->aq.asq_last_status));
1613 /* schedule our worker thread which will take care of
1614 * applying the new filter changes
1616 i40e_service_event_schedule(vsi->back);
1621 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1622 * @vsi: the VSI being setup
1623 * @ctxt: VSI context structure
1624 * @enabled_tc: Enabled TCs bitmap
1625 * @is_add: True if called before Add VSI
1627 * Setup VSI queue mapping for enabled traffic classes.
1630 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1631 struct i40e_vsi_context *ctxt,
1635 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1636 struct i40e_vsi_context *ctxt,
1641 struct i40e_pf *pf = vsi->back;
1651 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1654 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1655 /* Find numtc from enabled TC bitmap */
1656 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1657 if (enabled_tc & BIT(i)) /* TC is enabled */
1661 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1665 /* At least TC0 is enabled in case of non-DCB case */
1669 vsi->tc_config.numtc = numtc;
1670 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1671 /* Number of queues per enabled TC */
1672 qcount = vsi->alloc_queue_pairs;
1674 num_tc_qps = qcount / numtc;
1675 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1677 /* Setup queue offset/count for all TCs for given VSI */
1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1679 /* See if the given TC is enabled for the given VSI */
1680 if (vsi->tc_config.enabled_tc & BIT(i)) {
1684 switch (vsi->type) {
1686 qcount = min_t(int, pf->alloc_rss_size,
1691 qcount = num_tc_qps;
1695 case I40E_VSI_SRIOV:
1696 case I40E_VSI_VMDQ2:
1698 qcount = num_tc_qps;
1702 vsi->tc_config.tc_info[i].qoffset = offset;
1703 vsi->tc_config.tc_info[i].qcount = qcount;
1705 /* find the next higher power-of-2 of num queue pairs */
1708 while (num_qps && (BIT_ULL(pow) < qcount)) {
1713 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1715 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1716 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1720 /* TC is not enabled so set the offset to
1721 * default queue and allocate one queue
1724 vsi->tc_config.tc_info[i].qoffset = 0;
1725 vsi->tc_config.tc_info[i].qcount = 1;
1726 vsi->tc_config.tc_info[i].netdev_tc = 0;
1730 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1733 /* Set actual Tx/Rx queue pairs */
1734 vsi->num_queue_pairs = offset;
1735 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1736 if (vsi->req_queue_pairs > 0)
1737 vsi->num_queue_pairs = vsi->req_queue_pairs;
1738 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1739 vsi->num_queue_pairs = pf->num_lan_msix;
1742 /* Scheduler section valid can only be set for ADD VSI */
1744 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1746 ctxt->info.up_enable_bits = enabled_tc;
1748 if (vsi->type == I40E_VSI_SRIOV) {
1749 ctxt->info.mapping_flags |=
1750 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1751 for (i = 0; i < vsi->num_queue_pairs; i++)
1752 ctxt->info.queue_mapping[i] =
1753 cpu_to_le16(vsi->base_queue + i);
1755 ctxt->info.mapping_flags |=
1756 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1757 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1759 ctxt->info.valid_sections |= cpu_to_le16(sections);
1763 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1764 * @netdev: the netdevice
1765 * @addr: address to add
1767 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1768 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1770 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1772 struct i40e_netdev_priv *np = netdev_priv(netdev);
1773 struct i40e_vsi *vsi = np->vsi;
1775 if (i40e_add_mac_filter(vsi, addr))
1782 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1783 * @netdev: the netdevice
1784 * @addr: address to add
1786 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1787 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1789 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1791 struct i40e_netdev_priv *np = netdev_priv(netdev);
1792 struct i40e_vsi *vsi = np->vsi;
1794 i40e_del_mac_filter(vsi, addr);
1800 * i40e_set_rx_mode - NDO callback to set the netdev filters
1801 * @netdev: network interface device structure
1804 void i40e_set_rx_mode(struct net_device *netdev)
1806 static void i40e_set_rx_mode(struct net_device *netdev)
1809 struct i40e_netdev_priv *np = netdev_priv(netdev);
1810 struct i40e_vsi *vsi = np->vsi;
1812 spin_lock_bh(&vsi->mac_filter_hash_lock);
1814 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1815 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1817 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1819 /* check for other flag changes */
1820 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1821 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1822 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1825 /* schedule our worker thread which will take care of
1826 * applying the new filter changes
1828 i40e_service_event_schedule(vsi->back);
1832 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1833 * @vsi: Pointer to VSI struct
1834 * @from: Pointer to list which contains MAC filter entries - changes to
1835 * those entries needs to be undone.
1837 * MAC filter entries from this list were slated for deletion.
1839 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1840 struct hlist_head *from)
1842 struct i40e_mac_filter *f;
1843 struct hlist_node *h;
1845 hlist_for_each_entry_safe(f, h, from, hlist) {
1846 u64 key = i40e_addr_to_hkey(f->macaddr);
1848 /* Move the element back into MAC filter list*/
1849 hlist_del(&f->hlist);
1850 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1855 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1856 * @vsi: Pointer to vsi struct
1857 * @from: Pointer to list which contains MAC filter entries - changes to
1858 * those entries needs to be undone.
1860 * MAC filter entries from this list were slated for addition.
1862 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1863 struct hlist_head *from)
1865 struct i40e_new_mac_filter *new;
1866 struct hlist_node *h;
1868 hlist_for_each_entry_safe(new, h, from, hlist) {
1869 /* We can simply free the wrapper structure */
1870 hlist_del(&new->hlist);
1876 * i40e_next_entry - Get the next non-broadcast filter from a list
1877 * @next: pointer to filter in list
1879 * Returns the next non-broadcast filter in the list. Required so that we
1880 * ignore broadcast filters within the list, since these are not handled via
1881 * the normal firmware update path.
1884 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
1887 next = hlist_entry(next->hlist.next,
1888 typeof(struct i40e_new_mac_filter),
1891 /* keep going if we found a broadcast filter */
1892 if (next && is_broadcast_ether_addr(next->f->macaddr))
1902 * i40e_update_filter_state - Update filter state based on return data
1904 * @count: Number of filters added
1905 * @add_list: return data from fw
1906 * @head: pointer to first filter in current batch
1908 * MAC filter entries from list were slated to be added to device. Returns
1909 * number of successful filters. Note that 0 does NOT mean success!
1912 i40e_update_filter_state(int count,
1913 struct i40e_aqc_add_macvlan_element_data *add_list,
1914 struct i40e_new_mac_filter *add_head)
1919 for (i = 0; i < count; i++) {
1920 /* Always check status of each filter. We don't need to check
1921 * the firmware return status because we pre-set the filter
1922 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
1923 * request to the adminq. Thus, if it no longer matches then
1924 * we know the filter is active.
1926 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
1927 add_head->state = I40E_FILTER_FAILED;
1929 add_head->state = I40E_FILTER_ACTIVE;
1933 add_head = i40e_next_filter(add_head);
1942 * i40e_aqc_del_filters - Request firmware to delete a set of filters
1943 * @vsi: ptr to the VSI
1944 * @vsi_name: name to display in messages
1945 * @list: the list of filters to send to firmware
1946 * @num_del: the number of filters to delete
1947 * @retval: Set to -EIO on failure to delete
1949 * Send a request to firmware via AdminQ to delete a set of filters. Uses
1950 * *retval instead of a return value so that success does not force ret_val to
1951 * be set to 0. This ensures that a sequence of calls to this function
1952 * preserve the previous value of *retval on successful delete.
1955 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
1956 struct i40e_aqc_remove_macvlan_element_data *list,
1957 int num_del, int *retval)
1959 struct i40e_hw *hw = &vsi->back->hw;
1963 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
1964 aq_err = hw->aq.asq_last_status;
1966 /* Explicitly ignore and do not report when firmware returns ENOENT */
1967 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1969 dev_info(&vsi->back->pdev->dev,
1970 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1971 vsi_name, i40e_stat_str(hw, aq_ret),
1972 i40e_aq_str(hw, aq_err));
1977 * i40e_aqc_add_filters - Request firmware to add a set of filters
1978 * @vsi: ptr to the VSI
1979 * @vsi_name: name to display in messages
1980 * @list: the list of filters to send to firmware
1981 * @add_head: Position in the add hlist
1982 * @num_add: the number of filters to add
1983 * @promisc_change: set to true on exit if promiscuous mode was forced on
1985 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
1986 * promisc_changed to true if the firmware has run out of space for more
1990 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
1991 struct i40e_aqc_add_macvlan_element_data *list,
1992 struct i40e_new_mac_filter *add_head,
1993 int num_add, bool *promisc_changed)
1995 struct i40e_hw *hw = &vsi->back->hw;
1998 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
1999 aq_err = hw->aq.asq_last_status;
2000 fcnt = i40e_update_filter_state(num_add, list, add_head);
2002 if (fcnt != num_add) {
2003 *promisc_changed = true;
2004 set_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2005 dev_warn(&vsi->back->pdev->dev,
2006 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2007 i40e_aq_str(hw, aq_err),
2013 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2014 * @vsi: pointer to the VSI
2017 * This function sets or clears the promiscuous broadcast flags for VLAN
2018 * filters in order to properly receive broadcast frames. Assumes that only
2019 * broadcast filters are passed.
2021 * Returns status indicating success or failure;
2024 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2025 struct i40e_mac_filter *f)
2027 bool enable = f->state == I40E_FILTER_NEW;
2028 struct i40e_hw *hw = &vsi->back->hw;
2031 if (f->vlan == I40E_VLAN_ANY) {
2032 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2037 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2045 dev_warn(&vsi->back->pdev->dev,
2046 "Error %s setting broadcast promiscuous mode on %s\n",
2047 i40e_aq_str(hw, hw->aq.asq_last_status),
2054 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2055 * @vsi: ptr to the VSI
2057 * Push any outstanding VSI filter changes through the AdminQ.
2059 * Returns 0 or error value
2061 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2063 struct hlist_head tmp_add_list, tmp_del_list;
2064 struct i40e_mac_filter *f;
2065 struct i40e_new_mac_filter *new, *add_head = NULL;
2066 struct i40e_hw *hw = &vsi->back->hw;
2067 unsigned int failed_filters = 0;
2068 unsigned int vlan_filters = 0;
2069 bool promisc_changed = false;
2070 char vsi_name[16] = "PF";
2071 int filter_list_len = 0;
2072 i40e_status aq_ret = 0;
2073 u32 changed_flags = 0;
2074 struct hlist_node *h;
2083 /* empty array typed pointers, kcalloc later */
2084 struct i40e_aqc_add_macvlan_element_data *add_list;
2085 struct i40e_aqc_remove_macvlan_element_data *del_list;
2087 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
2088 usleep_range(1000, 2000);
2092 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2093 vsi->current_netdev_flags = vsi->netdev->flags;
2096 INIT_HLIST_HEAD(&tmp_add_list);
2097 INIT_HLIST_HEAD(&tmp_del_list);
2099 if (vsi->type == I40E_VSI_SRIOV)
2100 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2101 else if (vsi->type != I40E_VSI_MAIN)
2102 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2104 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2105 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2107 spin_lock_bh(&vsi->mac_filter_hash_lock);
2108 /* Create a list of filters to delete. */
2109 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2110 if (f->state == I40E_FILTER_REMOVE) {
2111 /* Move the element into temporary del_list */
2112 hash_del(&f->hlist);
2113 hlist_add_head(&f->hlist, &tmp_del_list);
2115 /* Avoid counting removed filters */
2118 if (f->state == I40E_FILTER_NEW) {
2119 /* Create a temporary i40e_new_mac_filter */
2120 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2122 goto err_no_memory_locked;
2124 /* Store pointer to the real filter */
2126 new->state = f->state;
2128 /* Add it to the hash list */
2129 hlist_add_head(&new->hlist, &tmp_add_list);
2132 /* Count the number of active (current and new) VLAN
2133 * filters we have now. Does not count filters which
2134 * are marked for deletion.
2140 retval = i40e_correct_mac_vlan_filters(vsi,
2145 goto err_no_memory_locked;
2147 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2150 /* Now process 'del_list' outside the lock */
2151 if (!hlist_empty(&tmp_del_list)) {
2152 filter_list_len = hw->aq.asq_buf_size /
2153 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2154 list_size = filter_list_len *
2155 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2156 del_list = kzalloc(list_size, GFP_ATOMIC);
2160 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2163 /* handle broadcast filters by updating the broadcast
2164 * promiscuous flag and release filter list.
2166 if (is_broadcast_ether_addr(f->macaddr)) {
2167 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2169 hlist_del(&f->hlist);
2174 /* add to delete list */
2175 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2176 if (f->vlan == I40E_VLAN_ANY) {
2177 del_list[num_del].vlan_tag = 0;
2178 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2180 del_list[num_del].vlan_tag =
2181 cpu_to_le16((u16)(f->vlan));
2184 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2185 del_list[num_del].flags = cmd_flags;
2188 /* flush a full buffer */
2189 if (num_del == filter_list_len) {
2190 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2192 memset(del_list, 0, list_size);
2195 /* Release memory for MAC filter entries which were
2196 * synced up with HW.
2198 hlist_del(&f->hlist);
2203 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2211 if (!hlist_empty(&tmp_add_list)) {
2212 /* Do all the adds now. */
2213 filter_list_len = hw->aq.asq_buf_size /
2214 sizeof(struct i40e_aqc_add_macvlan_element_data);
2215 list_size = filter_list_len *
2216 sizeof(struct i40e_aqc_add_macvlan_element_data);
2217 add_list = kzalloc(list_size, GFP_ATOMIC);
2222 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2223 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2225 new->state = I40E_FILTER_FAILED;
2229 /* handle broadcast filters by updating the broadcast
2230 * promiscuous flag instead of adding a MAC filter.
2232 if (is_broadcast_ether_addr(new->f->macaddr)) {
2233 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2235 new->state = I40E_FILTER_FAILED;
2237 new->state = I40E_FILTER_ACTIVE;
2241 /* add to add array */
2245 ether_addr_copy(add_list[num_add].mac_addr,
2247 if (new->f->vlan == I40E_VLAN_ANY) {
2248 add_list[num_add].vlan_tag = 0;
2249 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2251 add_list[num_add].vlan_tag =
2252 cpu_to_le16((u16)(new->f->vlan));
2254 add_list[num_add].queue_number = 0;
2255 /* set invalid match method for later detection */
2256 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2257 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2258 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2261 /* flush a full buffer */
2262 if (num_add == filter_list_len) {
2263 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2266 memset(add_list, 0, list_size);
2271 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2272 num_add, &promisc_changed);
2274 /* Now move all of the filters from the temp add list back to
2277 spin_lock_bh(&vsi->mac_filter_hash_lock);
2278 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2279 /* Only update the state if we're still NEW */
2280 if (new->f->state == I40E_FILTER_NEW)
2281 new->f->state = new->state;
2282 hlist_del(&new->hlist);
2285 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2290 /* Determine the number of active and failed filters. */
2291 spin_lock_bh(&vsi->mac_filter_hash_lock);
2292 vsi->active_filters = 0;
2293 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2294 if (f->state == I40E_FILTER_ACTIVE)
2295 vsi->active_filters++;
2296 else if (f->state == I40E_FILTER_FAILED)
2299 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2301 /* If promiscuous mode has changed, we need to calculate a new
2302 * threshold for when we are safe to exit
2304 if (promisc_changed)
2305 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2307 /* Check if we are able to exit overflow promiscuous mode. We can
2308 * safely exit if we didn't just enter, we no longer have any failed
2309 * filters, and we have reduced filters below the threshold value.
2311 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2312 !promisc_changed && !failed_filters &&
2313 (vsi->active_filters < vsi->promisc_threshold)) {
2314 dev_info(&pf->pdev->dev,
2315 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2317 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2318 promisc_changed = true;
2319 vsi->promisc_threshold = 0;
2322 /* if the VF is not trusted do not do promisc */
2323 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2324 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2328 /* check for changes in promiscuous modes */
2329 if (changed_flags & IFF_ALLMULTI) {
2330 bool cur_multipromisc;
2332 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2333 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2338 retval = i40e_aq_rc_to_posix(aq_ret,
2339 hw->aq.asq_last_status);
2340 dev_info(&pf->pdev->dev,
2341 "set multi promisc failed on %s, err %s aq_err %s\n",
2343 i40e_stat_str(hw, aq_ret),
2344 i40e_aq_str(hw, hw->aq.asq_last_status));
2347 if ((changed_flags & IFF_PROMISC) ||
2349 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2352 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2353 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2355 if ((vsi->type == I40E_VSI_MAIN) &&
2356 (pf->lan_veb != I40E_NO_VEB) &&
2357 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2358 /* set defport ON for Main VSI instead of true promisc
2359 * this way we will get all unicast/multicast and VLAN
2360 * promisc behavior but will not get VF or VMDq traffic
2361 * replicated on the Main VSI.
2363 if (pf->cur_promisc != cur_promisc) {
2364 pf->cur_promisc = cur_promisc;
2367 i40e_aq_set_default_vsi(hw,
2372 i40e_aq_clear_default_vsi(hw,
2376 retval = i40e_aq_rc_to_posix(aq_ret,
2377 hw->aq.asq_last_status);
2378 dev_info(&pf->pdev->dev,
2379 "Set default VSI failed on %s, err %s, aq_err %s\n",
2381 i40e_stat_str(hw, aq_ret),
2383 hw->aq.asq_last_status));
2387 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2394 i40e_aq_rc_to_posix(aq_ret,
2395 hw->aq.asq_last_status);
2396 dev_info(&pf->pdev->dev,
2397 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2399 i40e_stat_str(hw, aq_ret),
2401 hw->aq.asq_last_status));
2403 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2409 i40e_aq_rc_to_posix(aq_ret,
2410 hw->aq.asq_last_status);
2411 dev_info(&pf->pdev->dev,
2412 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2414 i40e_stat_str(hw, aq_ret),
2416 hw->aq.asq_last_status));
2419 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2423 retval = i40e_aq_rc_to_posix(aq_ret,
2424 pf->hw.aq.asq_last_status);
2425 dev_info(&pf->pdev->dev,
2426 "set brdcast promisc failed, err %s, aq_err %s\n",
2427 i40e_stat_str(hw, aq_ret),
2429 hw->aq.asq_last_status));
2433 /* if something went wrong then set the changed flag so we try again */
2435 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2437 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2441 /* Restore elements on the temporary add and delete lists */
2442 spin_lock_bh(&vsi->mac_filter_hash_lock);
2443 err_no_memory_locked:
2444 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2445 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2446 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2448 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2449 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2454 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2455 * @pf: board private structure
2457 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2461 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2463 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2465 for (v = 0; v < pf->num_alloc_vsi; v++) {
2467 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2468 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2471 /* come back and try again later */
2472 pf->flags |= I40E_FLAG_FILTER_SYNC;
2480 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2481 * @netdev: network interface device structure
2482 * @new_mtu: new value for maximum frame size
2484 * Returns 0 on success, negative on failure
2486 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2488 struct i40e_netdev_priv *np = netdev_priv(netdev);
2489 struct i40e_vsi *vsi = np->vsi;
2490 struct i40e_pf *pf = vsi->back;
2492 netdev_info(netdev, "changing MTU from %d to %d\n",
2493 netdev->mtu, new_mtu);
2494 netdev->mtu = new_mtu;
2495 if (netif_running(netdev))
2496 i40e_vsi_reinit_locked(vsi);
2497 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
2498 I40E_FLAG_CLIENT_L2_CHANGE);
2503 * i40e_ioctl - Access the hwtstamp interface
2504 * @netdev: network interface device structure
2505 * @ifr: interface request data
2506 * @cmd: ioctl command
2508 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2510 struct i40e_netdev_priv *np = netdev_priv(netdev);
2511 struct i40e_pf *pf = np->vsi->back;
2515 return i40e_ptp_get_ts_config(pf, ifr);
2517 return i40e_ptp_set_ts_config(pf, ifr);
2524 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2525 * @vsi: the vsi being adjusted
2527 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2529 struct i40e_vsi_context ctxt;
2532 if ((vsi->info.valid_sections &
2533 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2534 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2535 return; /* already enabled */
2537 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2538 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2539 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2541 ctxt.seid = vsi->seid;
2542 ctxt.info = vsi->info;
2543 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2545 dev_info(&vsi->back->pdev->dev,
2546 "update vlan stripping failed, err %s aq_err %s\n",
2547 i40e_stat_str(&vsi->back->hw, ret),
2548 i40e_aq_str(&vsi->back->hw,
2549 vsi->back->hw.aq.asq_last_status));
2554 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2555 * @vsi: the vsi being adjusted
2557 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2559 struct i40e_vsi_context ctxt;
2562 if ((vsi->info.valid_sections &
2563 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2564 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2565 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2566 return; /* already disabled */
2568 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2569 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2570 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2572 ctxt.seid = vsi->seid;
2573 ctxt.info = vsi->info;
2574 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2576 dev_info(&vsi->back->pdev->dev,
2577 "update vlan stripping failed, err %s aq_err %s\n",
2578 i40e_stat_str(&vsi->back->hw, ret),
2579 i40e_aq_str(&vsi->back->hw,
2580 vsi->back->hw.aq.asq_last_status));
2585 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2586 * @netdev: network interface to be adjusted
2587 * @features: netdev features to test if VLAN offload is enabled or not
2589 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2591 struct i40e_netdev_priv *np = netdev_priv(netdev);
2592 struct i40e_vsi *vsi = np->vsi;
2594 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2595 i40e_vlan_stripping_enable(vsi);
2597 i40e_vlan_stripping_disable(vsi);
2601 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2602 * @vsi: the vsi being configured
2603 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2605 * This is a helper function for adding a new MAC/VLAN filter with the
2606 * specified VLAN for each existing MAC address already in the hash table.
2607 * This function does *not* perform any accounting to update filters based on
2610 * NOTE: this function expects to be called while under the
2611 * mac_filter_hash_lock
2613 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2615 struct i40e_mac_filter *f, *add_f;
2616 struct hlist_node *h;
2619 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2620 if (f->state == I40E_FILTER_REMOVE)
2622 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2624 dev_info(&vsi->back->pdev->dev,
2625 "Could not add vlan filter %d for %pM\n",
2635 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2636 * @vsi: the VSI being configured
2637 * @vid: VLAN id to be added
2639 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2643 if (!vid || vsi->info.pvid)
2646 /* Locked once because all functions invoked below iterates list*/
2647 spin_lock_bh(&vsi->mac_filter_hash_lock);
2648 err = i40e_add_vlan_all_mac(vsi, vid);
2649 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2653 /* schedule our worker thread which will take care of
2654 * applying the new filter changes
2656 i40e_service_event_schedule(vsi->back);
2661 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2662 * @vsi: the vsi being configured
2663 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2665 * This function should be used to remove all VLAN filters which match the
2666 * given VID. It does not schedule the service event and does not take the
2667 * mac_filter_hash_lock so it may be combined with other operations under
2668 * a single invocation of the mac_filter_hash_lock.
2670 * NOTE: this function expects to be called while under the
2671 * mac_filter_hash_lock
2673 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2675 struct i40e_mac_filter *f;
2676 struct hlist_node *h;
2679 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2681 __i40e_del_filter(vsi, f);
2686 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2687 * @vsi: the VSI being configured
2688 * @vid: VLAN id to be removed
2690 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2692 if (!vid || vsi->info.pvid)
2695 spin_lock_bh(&vsi->mac_filter_hash_lock);
2696 i40e_rm_vlan_all_mac(vsi, vid);
2697 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2699 /* schedule our worker thread which will take care of
2700 * applying the new filter changes
2702 i40e_service_event_schedule(vsi->back);
2706 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2707 * @netdev: network interface to be adjusted
2708 * @vid: vlan id to be added
2710 * net_device_ops implementation for adding vlan ids
2713 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2714 __always_unused __be16 proto, u16 vid)
2716 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2717 __always_unused __be16 proto, u16 vid)
2720 struct i40e_netdev_priv *np = netdev_priv(netdev);
2721 struct i40e_vsi *vsi = np->vsi;
2724 if (vid >= VLAN_N_VID)
2727 /* If the network stack called us with vid = 0 then
2728 * it is asking to receive priority tagged packets with
2729 * vlan id 0. Our HW receives them by default when configured
2730 * to receive untagged packets so there is no need to add an
2731 * extra filter for vlan 0 tagged packets.
2734 ret = i40e_vsi_add_vlan(vsi, vid);
2737 set_bit(vid, vsi->active_vlans);
2743 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2744 * @netdev: network interface to be adjusted
2745 * @vid: vlan id to be removed
2747 * net_device_ops implementation for removing vlan ids
2750 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2751 __always_unused __be16 proto, u16 vid)
2753 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2754 __always_unused __be16 proto, u16 vid)
2757 struct i40e_netdev_priv *np = netdev_priv(netdev);
2758 struct i40e_vsi *vsi = np->vsi;
2760 /* return code is ignored as there is nothing a user
2761 * can do about failure to remove and a log message was
2762 * already printed from the other function
2764 i40e_vsi_kill_vlan(vsi, vid);
2766 clear_bit(vid, vsi->active_vlans);
2772 * i40e_macaddr_init - explicitly write the mac address filters
2774 * @vsi: pointer to the vsi
2775 * @macaddr: the MAC address
2777 * This is needed when the macaddr has been obtained by other
2778 * means than the default, e.g., from Open Firmware or IDPROM.
2779 * Returns 0 on success, negative on failure
2781 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2784 struct i40e_aqc_add_macvlan_element_data element;
2786 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2787 I40E_AQC_WRITE_TYPE_LAA_WOL,
2790 dev_info(&vsi->back->pdev->dev,
2791 "Addr change for VSI failed: %d\n", ret);
2792 return -EADDRNOTAVAIL;
2795 memset(&element, 0, sizeof(element));
2796 ether_addr_copy(element.mac_addr, macaddr);
2797 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2798 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2800 dev_info(&vsi->back->pdev->dev,
2801 "add filter failed err %s aq_err %s\n",
2802 i40e_stat_str(&vsi->back->hw, ret),
2803 i40e_aq_str(&vsi->back->hw,
2804 vsi->back->hw.aq.asq_last_status));
2810 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2811 * @vsi: the vsi being brought back up
2813 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2820 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2822 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2823 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2828 * i40e_vsi_add_pvid - Add pvid for the VSI
2829 * @vsi: the vsi being adjusted
2830 * @vid: the vlan id to set as a PVID
2832 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2834 struct i40e_vsi_context ctxt;
2837 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2838 vsi->info.pvid = cpu_to_le16(vid);
2839 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2840 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2841 I40E_AQ_VSI_PVLAN_EMOD_STR;
2843 ctxt.seid = vsi->seid;
2844 ctxt.info = vsi->info;
2845 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2847 dev_info(&vsi->back->pdev->dev,
2848 "add pvid failed, err %s aq_err %s\n",
2849 i40e_stat_str(&vsi->back->hw, ret),
2850 i40e_aq_str(&vsi->back->hw,
2851 vsi->back->hw.aq.asq_last_status));
2859 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2860 * @vsi: the vsi being adjusted
2862 * Just use the vlan_rx_register() service to put it back to normal
2864 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2866 i40e_vlan_stripping_disable(vsi);
2872 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2873 * @vsi: ptr to the VSI
2875 * If this function returns with an error, then it's possible one or
2876 * more of the rings is populated (while the rest are not). It is the
2877 * callers duty to clean those orphaned rings.
2879 * Return 0 on success, negative on failure
2881 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2885 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2886 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2892 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2893 * @vsi: ptr to the VSI
2895 * Free VSI's transmit software resources
2897 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2904 for (i = 0; i < vsi->num_queue_pairs; i++)
2905 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2906 i40e_free_tx_resources(vsi->tx_rings[i]);
2910 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2911 * @vsi: ptr to the VSI
2913 * If this function returns with an error, then it's possible one or
2914 * more of the rings is populated (while the rest are not). It is the
2915 * callers duty to clean those orphaned rings.
2917 * Return 0 on success, negative on failure
2919 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2923 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2924 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2926 i40e_fcoe_setup_ddp_resources(vsi);
2932 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2933 * @vsi: ptr to the VSI
2935 * Free all receive software resources
2937 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2944 for (i = 0; i < vsi->num_queue_pairs; i++)
2945 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2946 i40e_free_rx_resources(vsi->rx_rings[i]);
2948 i40e_fcoe_free_ddp_resources(vsi);
2953 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2954 * @ring: The Tx ring to configure
2956 * This enables/disables XPS for a given Tx descriptor ring
2957 * based on the TCs enabled for the VSI that ring belongs to.
2959 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2961 struct i40e_vsi *vsi = ring->vsi;
2964 if (!ring->q_vector || !ring->netdev)
2967 /* Single TC mode enable XPS */
2968 if (vsi->tc_config.numtc <= 1) {
2969 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2970 netif_set_xps_queue(ring->netdev,
2971 &ring->q_vector->affinity_mask,
2973 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2974 /* Disable XPS to allow selection based on TC */
2975 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2976 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2977 free_cpumask_var(mask);
2980 /* schedule our worker thread which will take care of
2981 * applying the new filter changes
2983 i40e_service_event_schedule(vsi->back);
2987 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2988 * @ring: The Tx ring to configure
2990 * Configure the Tx descriptor ring in the HMC context.
2992 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2994 struct i40e_vsi *vsi = ring->vsi;
2995 u16 pf_q = vsi->base_queue + ring->queue_index;
2996 struct i40e_hw *hw = &vsi->back->hw;
2997 struct i40e_hmc_obj_txq tx_ctx;
2998 i40e_status err = 0;
3001 /* some ATR related tx ring init */
3002 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3003 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3004 ring->atr_count = 0;
3006 ring->atr_sample_rate = 0;
3010 i40e_config_xps_tx_ring(ring);
3012 /* clear the context structure first */
3013 memset(&tx_ctx, 0, sizeof(tx_ctx));
3015 tx_ctx.new_context = 1;
3016 tx_ctx.base = (ring->dma / 128);
3017 tx_ctx.qlen = ring->count;
3018 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3019 I40E_FLAG_FD_ATR_ENABLED));
3021 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
3023 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3024 /* FDIR VSI tx ring can still use RS bit and writebacks */
3025 if (vsi->type != I40E_VSI_FDIR)
3026 tx_ctx.head_wb_ena = 1;
3027 tx_ctx.head_wb_addr = ring->dma +
3028 (ring->count * sizeof(struct i40e_tx_desc));
3030 /* As part of VSI creation/update, FW allocates certain
3031 * Tx arbitration queue sets for each TC enabled for
3032 * the VSI. The FW returns the handles to these queue
3033 * sets as part of the response buffer to Add VSI,
3034 * Update VSI, etc. AQ commands. It is expected that
3035 * these queue set handles be associated with the Tx
3036 * queues by the driver as part of the TX queue context
3037 * initialization. This has to be done regardless of
3038 * DCB as by default everything is mapped to TC0.
3040 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3041 tx_ctx.rdylist_act = 0;
3043 /* clear the context in the HMC */
3044 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3046 dev_info(&vsi->back->pdev->dev,
3047 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3048 ring->queue_index, pf_q, err);
3052 /* set the context in the HMC */
3053 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3055 dev_info(&vsi->back->pdev->dev,
3056 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3057 ring->queue_index, pf_q, err);
3061 /* Now associate this queue with this PCI function */
3062 if (vsi->type == I40E_VSI_VMDQ2) {
3063 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3064 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3065 I40E_QTX_CTL_VFVM_INDX_MASK;
3067 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3070 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3071 I40E_QTX_CTL_PF_INDX_MASK);
3072 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3075 /* cache tail off for easier writes later */
3076 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3082 * i40e_configure_rx_ring - Configure a receive ring context
3083 * @ring: The Rx ring to configure
3085 * Configure the Rx descriptor ring in the HMC context.
3087 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3089 struct i40e_vsi *vsi = ring->vsi;
3090 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3091 u16 pf_q = vsi->base_queue + ring->queue_index;
3092 struct i40e_hw *hw = &vsi->back->hw;
3093 struct i40e_hmc_obj_rxq rx_ctx;
3094 i40e_status err = 0;
3098 /* clear the context structure first */
3099 memset(&rx_ctx, 0, sizeof(rx_ctx));
3101 ring->rx_buf_len = vsi->rx_buf_len;
3103 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
3105 rx_ctx.base = (ring->dma / 128);
3106 rx_ctx.qlen = ring->count;
3108 /* use 32 byte descriptors */
3111 /* descriptor type is always zero
3114 rx_ctx.hsplit_0 = 0;
3116 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3117 if (hw->revision_id == 0)
3118 rx_ctx.lrxqthresh = 0;
3120 rx_ctx.lrxqthresh = 2;
3121 rx_ctx.crcstrip = 1;
3123 /* this controls whether VLAN is stripped from inner headers */
3126 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
3128 /* set the prefena field to 1 because the manual says to */
3131 /* clear the context in the HMC */
3132 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3134 dev_info(&vsi->back->pdev->dev,
3135 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3136 ring->queue_index, pf_q, err);
3140 /* set the context in the HMC */
3141 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3143 dev_info(&vsi->back->pdev->dev,
3144 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3145 ring->queue_index, pf_q, err);
3149 /* cache tail for quicker writes, and clear the reg before use */
3150 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3151 writel(0, ring->tail);
3153 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3159 * i40e_vsi_configure_tx - Configure the VSI for Tx
3160 * @vsi: VSI structure describing this set of rings and resources
3162 * Configure the Tx VSI for operation.
3164 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3169 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3170 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3176 * i40e_vsi_configure_rx - Configure the VSI for Rx
3177 * @vsi: the VSI being configured
3179 * Configure the Rx VSI for operation.
3181 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3186 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3187 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3188 + ETH_FCS_LEN + VLAN_HLEN;
3190 vsi->max_frame = I40E_RXBUFFER_2048;
3192 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3195 /* setup rx buffer for FCoE */
3196 if ((vsi->type == I40E_VSI_FCOE) &&
3197 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3198 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3199 vsi->max_frame = I40E_RXBUFFER_3072;
3202 #endif /* I40E_FCOE */
3203 /* round up for the chip's needs */
3204 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3205 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3207 /* set up individual rings */
3208 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3209 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3215 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3216 * @vsi: ptr to the VSI
3218 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3220 struct i40e_ring *tx_ring, *rx_ring;
3221 u16 qoffset, qcount;
3224 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3225 /* Reset the TC information */
3226 for (i = 0; i < vsi->num_queue_pairs; i++) {
3227 rx_ring = vsi->rx_rings[i];
3228 tx_ring = vsi->tx_rings[i];
3229 rx_ring->dcb_tc = 0;
3230 tx_ring->dcb_tc = 0;
3234 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3235 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3238 qoffset = vsi->tc_config.tc_info[n].qoffset;
3239 qcount = vsi->tc_config.tc_info[n].qcount;
3240 for (i = qoffset; i < (qoffset + qcount); i++) {
3241 rx_ring = vsi->rx_rings[i];
3242 tx_ring = vsi->tx_rings[i];
3243 rx_ring->dcb_tc = n;
3244 tx_ring->dcb_tc = n;
3250 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3251 * @vsi: ptr to the VSI
3253 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3255 struct i40e_pf *pf = vsi->back;
3259 i40e_set_rx_mode(vsi->netdev);
3261 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3262 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3264 dev_warn(&pf->pdev->dev,
3265 "could not set up macaddr; err %d\n", err);
3271 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3272 * @vsi: Pointer to the targeted VSI
3274 * This function replays the hlist on the hw where all the SB Flow Director
3275 * filters were saved.
3277 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3279 struct i40e_fdir_filter *filter;
3280 struct i40e_pf *pf = vsi->back;
3281 struct hlist_node *node;
3283 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3286 /* Reset FDir counters as we're replaying all existing filters */
3287 pf->fd_tcp4_filter_cnt = 0;
3288 pf->fd_udp4_filter_cnt = 0;
3289 pf->fd_sctp4_filter_cnt = 0;
3290 pf->fd_ip4_filter_cnt = 0;
3292 hlist_for_each_entry_safe(filter, node,
3293 &pf->fdir_filter_list, fdir_node) {
3294 i40e_add_del_fdir(vsi, filter, true);
3299 * i40e_vsi_configure - Set up the VSI for action
3300 * @vsi: the VSI being configured
3302 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3306 i40e_set_vsi_rx_mode(vsi);
3307 i40e_restore_vlan(vsi);
3308 i40e_vsi_config_dcb_rings(vsi);
3309 err = i40e_vsi_configure_tx(vsi);
3311 err = i40e_vsi_configure_rx(vsi);
3317 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3318 * @vsi: the VSI being configured
3320 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3322 struct i40e_pf *pf = vsi->back;
3323 struct i40e_hw *hw = &pf->hw;
3328 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3329 * and PFINT_LNKLSTn registers, e.g.:
3330 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3332 qp = vsi->base_queue;
3333 vector = vsi->base_vector;
3334 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3335 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3337 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3338 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3339 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3340 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3342 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3343 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3344 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3346 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3347 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3349 /* Linked list for the queuepairs assigned to this vector */
3350 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3351 for (q = 0; q < q_vector->num_ringpairs; q++) {
3354 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3355 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3356 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3357 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3359 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3361 wr32(hw, I40E_QINT_RQCTL(qp), val);
3363 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3364 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3365 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3366 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3368 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3370 /* Terminate the linked list */
3371 if (q == (q_vector->num_ringpairs - 1))
3372 val |= (I40E_QUEUE_END_OF_LIST
3373 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3375 wr32(hw, I40E_QINT_TQCTL(qp), val);
3384 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3385 * @hw: ptr to the hardware info
3387 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3389 struct i40e_hw *hw = &pf->hw;
3392 /* clear things first */
3393 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3394 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3396 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3397 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3398 I40E_PFINT_ICR0_ENA_GRST_MASK |
3399 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3400 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3401 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3402 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3403 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3405 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3406 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3408 if (pf->flags & I40E_FLAG_PTP)
3409 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3411 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3413 /* SW_ITR_IDX = 0, but don't change INTENA */
3414 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3415 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3417 /* OTHER_ITR_IDX = 0 */
3418 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3422 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3423 * @vsi: the VSI being configured
3425 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3427 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3428 struct i40e_pf *pf = vsi->back;
3429 struct i40e_hw *hw = &pf->hw;
3432 /* set the ITR configuration */
3433 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3434 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3435 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3436 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3437 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3438 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3439 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3441 i40e_enable_misc_int_causes(pf);
3443 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3444 wr32(hw, I40E_PFINT_LNKLST0, 0);
3446 /* Associate the queue pair to the vector and enable the queue int */
3447 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3448 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3449 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3451 wr32(hw, I40E_QINT_RQCTL(0), val);
3453 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3454 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3455 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3457 wr32(hw, I40E_QINT_TQCTL(0), val);
3462 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3463 * @pf: board private structure
3465 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3467 struct i40e_hw *hw = &pf->hw;
3469 wr32(hw, I40E_PFINT_DYN_CTL0,
3470 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3475 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3476 * @pf: board private structure
3477 * @clearpba: true when all pending interrupt events should be cleared
3479 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3481 struct i40e_hw *hw = &pf->hw;
3484 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3485 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3486 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3488 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3493 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3494 * @irq: interrupt number
3495 * @data: pointer to a q_vector
3497 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3499 struct i40e_q_vector *q_vector = data;
3501 if (!q_vector->tx.ring && !q_vector->rx.ring)
3504 napi_schedule_irqoff(&q_vector->napi);
3510 * i40e_irq_affinity_notify - Callback for affinity changes
3511 * @notify: context as to what irq was changed
3512 * @mask: the new affinity mask
3514 * This is a callback function used by the irq_set_affinity_notifier function
3515 * so that we may register to receive changes to the irq affinity masks.
3517 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3518 const cpumask_t *mask)
3520 struct i40e_q_vector *q_vector =
3521 container_of(notify, struct i40e_q_vector, affinity_notify);
3523 q_vector->affinity_mask = *mask;
3527 * i40e_irq_affinity_release - Callback for affinity notifier release
3528 * @ref: internal core kernel usage
3530 * This is a callback function used by the irq_set_affinity_notifier function
3531 * to inform the current notification subscriber that they will no longer
3532 * receive notifications.
3534 static void i40e_irq_affinity_release(struct kref *ref) {}
3537 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3538 * @vsi: the VSI being configured
3539 * @basename: name for the vector
3541 * Allocates MSI-X vectors and requests interrupts from the kernel.
3543 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3545 int q_vectors = vsi->num_q_vectors;
3546 struct i40e_pf *pf = vsi->back;
3547 int base = vsi->base_vector;
3553 for (vector = 0; vector < q_vectors; vector++) {
3554 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3556 irq_num = pf->msix_entries[base + vector].vector;
3558 if (q_vector->tx.ring && q_vector->rx.ring) {
3559 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3560 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3562 } else if (q_vector->rx.ring) {
3563 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3564 "%s-%s-%d", basename, "rx", rx_int_idx++);
3565 } else if (q_vector->tx.ring) {
3566 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3567 "%s-%s-%d", basename, "tx", tx_int_idx++);
3569 /* skip this unused q_vector */
3572 err = request_irq(irq_num,
3578 dev_info(&pf->pdev->dev,
3579 "MSIX request_irq failed, error: %d\n", err);
3580 goto free_queue_irqs;
3583 /* register for affinity change notifications */
3584 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3585 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3586 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3587 /* assign the mask for this irq */
3588 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
3591 vsi->irqs_ready = true;
3597 irq_num = pf->msix_entries[base + vector].vector;
3598 irq_set_affinity_notifier(irq_num, NULL);
3599 irq_set_affinity_hint(irq_num, NULL);
3600 free_irq(irq_num, &vsi->q_vectors[vector]);
3606 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3607 * @vsi: the VSI being un-configured
3609 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3611 struct i40e_pf *pf = vsi->back;
3612 struct i40e_hw *hw = &pf->hw;
3613 int base = vsi->base_vector;
3616 for (i = 0; i < vsi->num_queue_pairs; i++) {
3617 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3618 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3621 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3622 for (i = vsi->base_vector;
3623 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3624 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3627 for (i = 0; i < vsi->num_q_vectors; i++)
3628 synchronize_irq(pf->msix_entries[i + base].vector);
3630 /* Legacy and MSI mode - this stops all interrupt handling */
3631 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3632 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3634 synchronize_irq(pf->pdev->irq);
3639 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3640 * @vsi: the VSI being configured
3642 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3644 struct i40e_pf *pf = vsi->back;
3647 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3648 for (i = 0; i < vsi->num_q_vectors; i++)
3649 i40e_irq_dynamic_enable(vsi, i);
3651 i40e_irq_dynamic_enable_icr0(pf, true);
3654 i40e_flush(&pf->hw);
3659 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3660 * @pf: board private structure
3662 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3665 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3666 i40e_flush(&pf->hw);
3670 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3671 * @irq: interrupt number
3672 * @data: pointer to a q_vector
3674 * This is the handler used for all MSI/Legacy interrupts, and deals
3675 * with both queue and non-queue interrupts. This is also used in
3676 * MSIX mode to handle the non-queue interrupts.
3678 static irqreturn_t i40e_intr(int irq, void *data)
3680 struct i40e_pf *pf = (struct i40e_pf *)data;
3681 struct i40e_hw *hw = &pf->hw;
3682 irqreturn_t ret = IRQ_NONE;
3683 u32 icr0, icr0_remaining;
3686 icr0 = rd32(hw, I40E_PFINT_ICR0);
3687 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3689 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3690 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3693 /* if interrupt but no bits showing, must be SWINT */
3694 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3695 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3698 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3699 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3700 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3701 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3702 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3705 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3706 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3707 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3708 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3710 /* We do not have a way to disarm Queue causes while leaving
3711 * interrupt enabled for all other causes, ideally
3712 * interrupt should be disabled while we are in NAPI but
3713 * this is not a performance path and napi_schedule()
3714 * can deal with rescheduling.
3716 if (!test_bit(__I40E_DOWN, &pf->state))
3717 napi_schedule_irqoff(&q_vector->napi);
3720 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3721 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3722 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3723 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3726 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3727 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3728 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3731 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3732 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3733 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3736 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3737 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3738 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3739 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3740 val = rd32(hw, I40E_GLGEN_RSTAT);
3741 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3742 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3743 if (val == I40E_RESET_CORER) {
3745 } else if (val == I40E_RESET_GLOBR) {
3747 } else if (val == I40E_RESET_EMPR) {
3749 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3753 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3754 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3755 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3756 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3757 rd32(hw, I40E_PFHMC_ERRORINFO),
3758 rd32(hw, I40E_PFHMC_ERRORDATA));
3761 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3762 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3764 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3765 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3766 i40e_ptp_tx_hwtstamp(pf);
3770 /* If a critical error is pending we have no choice but to reset the
3772 * Report and mask out any remaining unexpected interrupts.
3774 icr0_remaining = icr0 & ena_mask;
3775 if (icr0_remaining) {
3776 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3778 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3779 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3780 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3781 dev_info(&pf->pdev->dev, "device will be reset\n");
3782 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3783 i40e_service_event_schedule(pf);
3785 ena_mask &= ~icr0_remaining;
3790 /* re-enable interrupt causes */
3791 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3792 if (!test_bit(__I40E_DOWN, &pf->state)) {
3793 i40e_service_event_schedule(pf);
3794 i40e_irq_dynamic_enable_icr0(pf, false);
3801 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3802 * @tx_ring: tx ring to clean
3803 * @budget: how many cleans we're allowed
3805 * Returns true if there's any budget left (e.g. the clean is finished)
3807 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3809 struct i40e_vsi *vsi = tx_ring->vsi;
3810 u16 i = tx_ring->next_to_clean;
3811 struct i40e_tx_buffer *tx_buf;
3812 struct i40e_tx_desc *tx_desc;
3814 tx_buf = &tx_ring->tx_bi[i];
3815 tx_desc = I40E_TX_DESC(tx_ring, i);
3816 i -= tx_ring->count;
3819 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3821 /* if next_to_watch is not set then there is no work pending */
3825 /* prevent any other reads prior to eop_desc */
3826 read_barrier_depends();
3828 /* if the descriptor isn't done, no work yet to do */
3829 if (!(eop_desc->cmd_type_offset_bsz &
3830 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3833 /* clear next_to_watch to prevent false hangs */
3834 tx_buf->next_to_watch = NULL;
3836 tx_desc->buffer_addr = 0;
3837 tx_desc->cmd_type_offset_bsz = 0;
3838 /* move past filter desc */
3843 i -= tx_ring->count;
3844 tx_buf = tx_ring->tx_bi;
3845 tx_desc = I40E_TX_DESC(tx_ring, 0);
3847 /* unmap skb header data */
3848 dma_unmap_single(tx_ring->dev,
3849 dma_unmap_addr(tx_buf, dma),
3850 dma_unmap_len(tx_buf, len),
3852 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3853 kfree(tx_buf->raw_buf);
3855 tx_buf->raw_buf = NULL;
3856 tx_buf->tx_flags = 0;
3857 tx_buf->next_to_watch = NULL;
3858 dma_unmap_len_set(tx_buf, len, 0);
3859 tx_desc->buffer_addr = 0;
3860 tx_desc->cmd_type_offset_bsz = 0;
3862 /* move us past the eop_desc for start of next FD desc */
3867 i -= tx_ring->count;
3868 tx_buf = tx_ring->tx_bi;
3869 tx_desc = I40E_TX_DESC(tx_ring, 0);
3872 /* update budget accounting */
3874 } while (likely(budget));
3876 i += tx_ring->count;
3877 tx_ring->next_to_clean = i;
3879 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3880 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3886 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3887 * @irq: interrupt number
3888 * @data: pointer to a q_vector
3890 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3892 struct i40e_q_vector *q_vector = data;
3893 struct i40e_vsi *vsi;
3895 if (!q_vector->tx.ring)
3898 vsi = q_vector->tx.ring->vsi;
3899 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3905 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3906 * @vsi: the VSI being configured
3907 * @v_idx: vector index
3908 * @qp_idx: queue pair index
3910 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3912 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3913 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3914 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3916 tx_ring->q_vector = q_vector;
3917 tx_ring->next = q_vector->tx.ring;
3918 q_vector->tx.ring = tx_ring;
3919 q_vector->tx.count++;
3921 rx_ring->q_vector = q_vector;
3922 rx_ring->next = q_vector->rx.ring;
3923 q_vector->rx.ring = rx_ring;
3924 q_vector->rx.count++;
3928 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3929 * @vsi: the VSI being configured
3931 * This function maps descriptor rings to the queue-specific vectors
3932 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3933 * one vector per queue pair, but on a constrained vector budget, we
3934 * group the queue pairs as "efficiently" as possible.
3936 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3938 int qp_remaining = vsi->num_queue_pairs;
3939 int q_vectors = vsi->num_q_vectors;
3944 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3945 * group them so there are multiple queues per vector.
3946 * It is also important to go through all the vectors available to be
3947 * sure that if we don't use all the vectors, that the remaining vectors
3948 * are cleared. This is especially important when decreasing the
3949 * number of queues in use.
3951 for (; v_start < q_vectors; v_start++) {
3952 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3954 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3956 q_vector->num_ringpairs = num_ringpairs;
3958 q_vector->rx.count = 0;
3959 q_vector->tx.count = 0;
3960 q_vector->rx.ring = NULL;
3961 q_vector->tx.ring = NULL;
3963 while (num_ringpairs--) {
3964 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3972 * i40e_vsi_request_irq - Request IRQ from the OS
3973 * @vsi: the VSI being configured
3974 * @basename: name for the vector
3976 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3978 struct i40e_pf *pf = vsi->back;
3981 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3982 err = i40e_vsi_request_irq_msix(vsi, basename);
3983 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3984 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3987 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3991 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3996 #ifdef CONFIG_NET_POLL_CONTROLLER
3998 * i40e_netpoll - A Polling 'interrupt' handler
3999 * @netdev: network interface device structure
4001 * This is used by netconsole to send skbs without having to re-enable
4002 * interrupts. It's not called while the normal interrupt routine is executing.
4005 void i40e_netpoll(struct net_device *netdev)
4007 static void i40e_netpoll(struct net_device *netdev)
4010 struct i40e_netdev_priv *np = netdev_priv(netdev);
4011 struct i40e_vsi *vsi = np->vsi;
4012 struct i40e_pf *pf = vsi->back;
4015 /* if interface is down do nothing */
4016 if (test_bit(__I40E_DOWN, &vsi->state))
4019 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4020 for (i = 0; i < vsi->num_q_vectors; i++)
4021 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4023 i40e_intr(pf->pdev->irq, netdev);
4029 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4030 * @pf: the PF being configured
4031 * @pf_q: the PF queue
4032 * @enable: enable or disable state of the queue
4034 * This routine will wait for the given Tx queue of the PF to reach the
4035 * enabled or disabled state.
4036 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4037 * multiple retries; else will return 0 in case of success.
4039 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4044 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4045 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4046 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4049 usleep_range(10, 20);
4051 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4058 * i40e_vsi_control_tx - Start or stop a VSI's rings
4059 * @vsi: the VSI being configured
4060 * @enable: start or stop the rings
4062 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4064 struct i40e_pf *pf = vsi->back;
4065 struct i40e_hw *hw = &pf->hw;
4066 int i, j, pf_q, ret = 0;
4069 pf_q = vsi->base_queue;
4070 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4072 /* warn the TX unit of coming changes */
4073 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4075 usleep_range(10, 20);
4077 for (j = 0; j < 50; j++) {
4078 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4079 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4080 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4082 usleep_range(1000, 2000);
4084 /* Skip if the queue is already in the requested state */
4085 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4088 /* turn on/off the queue */
4090 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4091 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4093 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4096 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4097 /* No waiting for the Tx queue to disable */
4098 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4101 /* wait for the change to finish */
4102 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4104 dev_info(&pf->pdev->dev,
4105 "VSI seid %d Tx ring %d %sable timeout\n",
4106 vsi->seid, pf_q, (enable ? "en" : "dis"));
4111 if (hw->revision_id == 0)
4117 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4118 * @pf: the PF being configured
4119 * @pf_q: the PF queue
4120 * @enable: enable or disable state of the queue
4122 * This routine will wait for the given Rx queue of the PF to reach the
4123 * enabled or disabled state.
4124 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4125 * multiple retries; else will return 0 in case of success.
4127 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4132 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4133 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4134 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4137 usleep_range(10, 20);
4139 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4146 * i40e_vsi_control_rx - Start or stop a VSI's rings
4147 * @vsi: the VSI being configured
4148 * @enable: start or stop the rings
4150 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4152 struct i40e_pf *pf = vsi->back;
4153 struct i40e_hw *hw = &pf->hw;
4154 int i, j, pf_q, ret = 0;
4157 pf_q = vsi->base_queue;
4158 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4159 for (j = 0; j < 50; j++) {
4160 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4161 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4162 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4164 usleep_range(1000, 2000);
4167 /* Skip if the queue is already in the requested state */
4168 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4171 /* turn on/off the queue */
4173 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4175 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4176 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4177 /* No waiting for the Tx queue to disable */
4178 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
4181 /* wait for the change to finish */
4182 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4184 dev_info(&pf->pdev->dev,
4185 "VSI seid %d Rx ring %d %sable timeout\n",
4186 vsi->seid, pf_q, (enable ? "en" : "dis"));
4195 * i40e_vsi_start_rings - Start a VSI's rings
4196 * @vsi: the VSI being configured
4198 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4202 /* do rx first for enable and last for disable */
4203 ret = i40e_vsi_control_rx(vsi, true);
4206 ret = i40e_vsi_control_tx(vsi, true);
4212 * i40e_vsi_stop_rings - Stop a VSI's rings
4213 * @vsi: the VSI being configured
4215 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4217 /* do rx first for enable and last for disable
4218 * Ignore return value, we need to shutdown whatever we can
4220 i40e_vsi_control_tx(vsi, false);
4221 i40e_vsi_control_rx(vsi, false);
4225 * i40e_vsi_free_irq - Free the irq association with the OS
4226 * @vsi: the VSI being configured
4228 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4230 struct i40e_pf *pf = vsi->back;
4231 struct i40e_hw *hw = &pf->hw;
4232 int base = vsi->base_vector;
4236 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4237 if (!vsi->q_vectors)
4240 if (!vsi->irqs_ready)
4243 vsi->irqs_ready = false;
4244 for (i = 0; i < vsi->num_q_vectors; i++) {
4249 irq_num = pf->msix_entries[vector].vector;
4251 /* free only the irqs that were actually requested */
4252 if (!vsi->q_vectors[i] ||
4253 !vsi->q_vectors[i]->num_ringpairs)
4256 /* clear the affinity notifier in the IRQ descriptor */
4257 irq_set_affinity_notifier(irq_num, NULL);
4258 /* clear the affinity_mask in the IRQ descriptor */
4259 irq_set_affinity_hint(irq_num, NULL);
4260 synchronize_irq(irq_num);
4261 free_irq(irq_num, vsi->q_vectors[i]);
4263 /* Tear down the interrupt queue link list
4265 * We know that they come in pairs and always
4266 * the Rx first, then the Tx. To clear the
4267 * link list, stick the EOL value into the
4268 * next_q field of the registers.
4270 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4271 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4272 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4273 val |= I40E_QUEUE_END_OF_LIST
4274 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4275 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4277 while (qp != I40E_QUEUE_END_OF_LIST) {
4280 val = rd32(hw, I40E_QINT_RQCTL(qp));
4282 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4283 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4284 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4285 I40E_QINT_RQCTL_INTEVENT_MASK);
4287 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4288 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4290 wr32(hw, I40E_QINT_RQCTL(qp), val);
4292 val = rd32(hw, I40E_QINT_TQCTL(qp));
4294 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4295 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4297 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4298 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4299 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4300 I40E_QINT_TQCTL_INTEVENT_MASK);
4302 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4303 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4305 wr32(hw, I40E_QINT_TQCTL(qp), val);
4310 free_irq(pf->pdev->irq, pf);
4312 val = rd32(hw, I40E_PFINT_LNKLST0);
4313 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4314 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4315 val |= I40E_QUEUE_END_OF_LIST
4316 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4317 wr32(hw, I40E_PFINT_LNKLST0, val);
4319 val = rd32(hw, I40E_QINT_RQCTL(qp));
4320 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4321 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4322 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4323 I40E_QINT_RQCTL_INTEVENT_MASK);
4325 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4326 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4328 wr32(hw, I40E_QINT_RQCTL(qp), val);
4330 val = rd32(hw, I40E_QINT_TQCTL(qp));
4332 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4333 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4334 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4335 I40E_QINT_TQCTL_INTEVENT_MASK);
4337 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4338 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4340 wr32(hw, I40E_QINT_TQCTL(qp), val);
4345 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4346 * @vsi: the VSI being configured
4347 * @v_idx: Index of vector to be freed
4349 * This function frees the memory allocated to the q_vector. In addition if
4350 * NAPI is enabled it will delete any references to the NAPI struct prior
4351 * to freeing the q_vector.
4353 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4355 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4356 struct i40e_ring *ring;
4361 /* disassociate q_vector from rings */
4362 i40e_for_each_ring(ring, q_vector->tx)
4363 ring->q_vector = NULL;
4365 i40e_for_each_ring(ring, q_vector->rx)
4366 ring->q_vector = NULL;
4368 /* only VSI w/ an associated netdev is set up w/ NAPI */
4370 netif_napi_del(&q_vector->napi);
4372 vsi->q_vectors[v_idx] = NULL;
4374 kfree_rcu(q_vector, rcu);
4378 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4379 * @vsi: the VSI being un-configured
4381 * This frees the memory allocated to the q_vectors and
4382 * deletes references to the NAPI struct.
4384 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4388 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4389 i40e_free_q_vector(vsi, v_idx);
4393 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4394 * @pf: board private structure
4396 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4398 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4399 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4400 pci_disable_msix(pf->pdev);
4401 kfree(pf->msix_entries);
4402 pf->msix_entries = NULL;
4403 kfree(pf->irq_pile);
4404 pf->irq_pile = NULL;
4405 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4406 pci_disable_msi(pf->pdev);
4408 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4412 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4413 * @pf: board private structure
4415 * We go through and clear interrupt specific resources and reset the structure
4416 * to pre-load conditions
4418 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4422 i40e_stop_misc_vector(pf);
4423 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4424 synchronize_irq(pf->msix_entries[0].vector);
4425 free_irq(pf->msix_entries[0].vector, pf);
4428 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4429 I40E_IWARP_IRQ_PILE_ID);
4431 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4432 for (i = 0; i < pf->num_alloc_vsi; i++)
4434 i40e_vsi_free_q_vectors(pf->vsi[i]);
4435 i40e_reset_interrupt_capability(pf);
4439 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4440 * @vsi: the VSI being configured
4442 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4449 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4450 napi_enable(&vsi->q_vectors[q_idx]->napi);
4454 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4455 * @vsi: the VSI being configured
4457 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4464 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4465 napi_disable(&vsi->q_vectors[q_idx]->napi);
4469 * i40e_vsi_close - Shut down a VSI
4470 * @vsi: the vsi to be quelled
4472 static void i40e_vsi_close(struct i40e_vsi *vsi)
4474 struct i40e_pf *pf = vsi->back;
4475 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4477 i40e_vsi_free_irq(vsi);
4478 i40e_vsi_free_tx_resources(vsi);
4479 i40e_vsi_free_rx_resources(vsi);
4480 vsi->current_netdev_flags = 0;
4481 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
4482 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
4483 pf->flags |= I40E_FLAG_CLIENT_RESET;
4487 * i40e_quiesce_vsi - Pause a given VSI
4488 * @vsi: the VSI being paused
4490 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4492 if (test_bit(__I40E_DOWN, &vsi->state))
4495 /* No need to disable FCoE VSI when Tx suspended */
4496 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4497 vsi->type == I40E_VSI_FCOE) {
4498 dev_dbg(&vsi->back->pdev->dev,
4499 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4503 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4504 if (vsi->netdev && netif_running(vsi->netdev))
4505 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4507 i40e_vsi_close(vsi);
4511 * i40e_unquiesce_vsi - Resume a given VSI
4512 * @vsi: the VSI being resumed
4514 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4516 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4519 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4520 if (vsi->netdev && netif_running(vsi->netdev))
4521 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4523 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4527 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4530 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4534 for (v = 0; v < pf->num_alloc_vsi; v++) {
4536 i40e_quiesce_vsi(pf->vsi[v]);
4541 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4544 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4548 for (v = 0; v < pf->num_alloc_vsi; v++) {
4550 i40e_unquiesce_vsi(pf->vsi[v]);
4554 #ifdef CONFIG_I40E_DCB
4556 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4557 * @vsi: the VSI being configured
4559 * This function waits for the given VSI's queues to be disabled.
4561 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4563 struct i40e_pf *pf = vsi->back;
4566 pf_q = vsi->base_queue;
4567 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4568 /* Check and wait for the disable status of the queue */
4569 ret = i40e_pf_txq_wait(pf, pf_q, false);
4571 dev_info(&pf->pdev->dev,
4572 "VSI seid %d Tx ring %d disable timeout\n",
4578 pf_q = vsi->base_queue;
4579 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4580 /* Check and wait for the disable status of the queue */
4581 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4583 dev_info(&pf->pdev->dev,
4584 "VSI seid %d Rx ring %d disable timeout\n",
4594 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4597 * This function waits for the queues to be in disabled state for all the
4598 * VSIs that are managed by this PF.
4600 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4604 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4605 /* No need to wait for FCoE VSI queues */
4606 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4607 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4619 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4620 * @q_idx: TX queue number
4621 * @vsi: Pointer to VSI struct
4623 * This function checks specified queue for given VSI. Detects hung condition.
4624 * Sets hung bit since it is two step process. Before next run of service task
4625 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4626 * hung condition remain unchanged and during subsequent run, this function
4627 * issues SW interrupt to recover from hung condition.
4629 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4631 struct i40e_ring *tx_ring = NULL;
4633 u32 head, val, tx_pending_hw;
4638 /* now that we have an index, find the tx_ring struct */
4639 for (i = 0; i < vsi->num_queue_pairs; i++) {
4640 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4641 if (q_idx == vsi->tx_rings[i]->queue_index) {
4642 tx_ring = vsi->tx_rings[i];
4651 /* Read interrupt register */
4652 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4654 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4655 tx_ring->vsi->base_vector - 1));
4657 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4659 head = i40e_get_head(tx_ring);
4661 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4663 /* HW is done executing descriptors, updated HEAD write back,
4664 * but SW hasn't processed those descriptors. If interrupt is
4665 * not generated from this point ON, it could result into
4666 * dev_watchdog detecting timeout on those netdev_queue,
4667 * hence proactively trigger SW interrupt.
4669 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4670 /* NAPI Poll didn't run and clear since it was set */
4671 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4672 &tx_ring->q_vector->hung_detected)) {
4673 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4674 vsi->seid, q_idx, tx_pending_hw,
4675 tx_ring->next_to_clean, head,
4676 tx_ring->next_to_use,
4677 readl(tx_ring->tail));
4678 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4679 vsi->seid, q_idx, val);
4680 i40e_force_wb(vsi, tx_ring->q_vector);
4682 /* First Chance - detected possible hung */
4683 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4684 &tx_ring->q_vector->hung_detected);
4688 /* This is the case where we have interrupts missing,
4689 * so the tx_pending in HW will most likely be 0, but we
4690 * will have tx_pending in SW since the WB happened but the
4691 * interrupt got lost.
4693 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4694 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4696 if (napi_reschedule(&tx_ring->q_vector->napi))
4697 tx_ring->tx_stats.tx_lost_interrupt++;
4703 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4704 * @pf: pointer to PF struct
4706 * LAN VSI has netdev and netdev has TX queues. This function is to check
4707 * each of those TX queues if they are hung, trigger recovery by issuing
4710 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4712 struct net_device *netdev;
4713 struct i40e_vsi *vsi;
4716 /* Only for LAN VSI */
4717 vsi = pf->vsi[pf->lan_vsi];
4722 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4723 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4724 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4727 /* Make sure type is MAIN VSI */
4728 if (vsi->type != I40E_VSI_MAIN)
4731 netdev = vsi->netdev;
4735 /* Bail out if netif_carrier is not OK */
4736 if (!netif_carrier_ok(netdev))
4739 /* Go thru' TX queues for netdev */
4740 for (i = 0; i < netdev->num_tx_queues; i++) {
4741 struct netdev_queue *q;
4743 q = netdev_get_tx_queue(netdev, i);
4745 i40e_detect_recover_hung_queue(i, vsi);
4750 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4751 * @pf: pointer to PF
4753 * Get TC map for ISCSI PF type that will include iSCSI TC
4756 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4758 struct i40e_dcb_app_priority_table app;
4759 struct i40e_hw *hw = &pf->hw;
4760 u8 enabled_tc = 1; /* TC0 is always enabled */
4762 /* Get the iSCSI APP TLV */
4763 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4765 for (i = 0; i < dcbcfg->numapps; i++) {
4766 app = dcbcfg->app[i];
4767 if (app.selector == I40E_APP_SEL_TCPIP &&
4768 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4769 tc = dcbcfg->etscfg.prioritytable[app.priority];
4770 enabled_tc |= BIT(tc);
4779 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4780 * @dcbcfg: the corresponding DCBx configuration structure
4782 * Return the number of TCs from given DCBx configuration
4784 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4786 int i, tc_unused = 0;
4790 /* Scan the ETS Config Priority Table to find
4791 * traffic class enabled for a given priority
4792 * and create a bitmask of enabled TCs
4794 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4795 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4797 /* Now scan the bitmask to check for
4798 * contiguous TCs starting with TC0
4800 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4801 if (num_tc & BIT(i)) {
4805 pr_err("Non-contiguous TC - Disabling DCB\n");
4813 /* There is always at least TC0 */
4821 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4822 * @dcbcfg: the corresponding DCBx configuration structure
4824 * Query the current DCB configuration and return the number of
4825 * traffic classes enabled from the given DCBX config
4827 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4829 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4833 for (i = 0; i < num_tc; i++)
4834 enabled_tc |= BIT(i);
4840 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4841 * @pf: PF being queried
4843 * Return number of traffic classes enabled for the given PF
4845 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4847 struct i40e_hw *hw = &pf->hw;
4848 u8 i, enabled_tc = 1;
4850 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4852 /* If DCB is not enabled then always in single TC */
4853 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4856 /* SFP mode will be enabled for all TCs on port */
4857 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4858 return i40e_dcb_get_num_tc(dcbcfg);
4860 /* MFP mode return count of enabled TCs for this PF */
4861 if (pf->hw.func_caps.iscsi)
4862 enabled_tc = i40e_get_iscsi_tc_map(pf);
4864 return 1; /* Only TC0 */
4866 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4867 if (enabled_tc & BIT(i))
4874 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4875 * @pf: PF being queried
4877 * Return a bitmap for enabled traffic classes for this PF.
4879 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4881 /* If DCB is not enabled for this PF then just return default TC */
4882 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4883 return I40E_DEFAULT_TRAFFIC_CLASS;
4885 /* SFP mode we want PF to be enabled for all TCs */
4886 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4887 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4889 /* MFP enabled and iSCSI PF type */
4890 if (pf->hw.func_caps.iscsi)
4891 return i40e_get_iscsi_tc_map(pf);
4893 return I40E_DEFAULT_TRAFFIC_CLASS;
4897 * i40e_vsi_get_bw_info - Query VSI BW Information
4898 * @vsi: the VSI being queried
4900 * Returns 0 on success, negative value on failure
4902 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4904 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4905 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4906 struct i40e_pf *pf = vsi->back;
4907 struct i40e_hw *hw = &pf->hw;
4912 /* Get the VSI level BW configuration */
4913 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4915 dev_info(&pf->pdev->dev,
4916 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4917 i40e_stat_str(&pf->hw, ret),
4918 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4922 /* Get the VSI level BW configuration per TC */
4923 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4926 dev_info(&pf->pdev->dev,
4927 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4928 i40e_stat_str(&pf->hw, ret),
4929 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4933 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4934 dev_info(&pf->pdev->dev,
4935 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4936 bw_config.tc_valid_bits,
4937 bw_ets_config.tc_valid_bits);
4938 /* Still continuing */
4941 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4942 vsi->bw_max_quanta = bw_config.max_bw;
4943 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4944 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4945 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4946 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4947 vsi->bw_ets_limit_credits[i] =
4948 le16_to_cpu(bw_ets_config.credits[i]);
4949 /* 3 bits out of 4 for each TC */
4950 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4957 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4958 * @vsi: the VSI being configured
4959 * @enabled_tc: TC bitmap
4960 * @bw_credits: BW shared credits per TC
4962 * Returns 0 on success, negative value on failure
4964 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4967 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4971 bw_data.tc_valid_bits = enabled_tc;
4972 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4973 bw_data.tc_bw_credits[i] = bw_share[i];
4975 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4978 dev_info(&vsi->back->pdev->dev,
4979 "AQ command Config VSI BW allocation per TC failed = %d\n",
4980 vsi->back->hw.aq.asq_last_status);
4984 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4985 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4991 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4992 * @vsi: the VSI being configured
4993 * @enabled_tc: TC map to be enabled
4996 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4998 struct net_device *netdev = vsi->netdev;
4999 struct i40e_pf *pf = vsi->back;
5000 struct i40e_hw *hw = &pf->hw;
5003 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5009 netdev_reset_tc(netdev);
5013 /* Set up actual enabled TCs on the VSI */
5014 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5017 /* set per TC queues for the VSI */
5018 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5019 /* Only set TC queues for enabled tcs
5021 * e.g. For a VSI that has TC0 and TC3 enabled the
5022 * enabled_tc bitmap would be 0x00001001; the driver
5023 * will set the numtc for netdev as 2 that will be
5024 * referenced by the netdev layer as TC 0 and 1.
5026 if (vsi->tc_config.enabled_tc & BIT(i))
5027 netdev_set_tc_queue(netdev,
5028 vsi->tc_config.tc_info[i].netdev_tc,
5029 vsi->tc_config.tc_info[i].qcount,
5030 vsi->tc_config.tc_info[i].qoffset);
5033 /* Assign UP2TC map for the VSI */
5034 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5035 /* Get the actual TC# for the UP */
5036 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5037 /* Get the mapped netdev TC# for the UP */
5038 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5039 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5044 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5045 * @vsi: the VSI being configured
5046 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5048 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5049 struct i40e_vsi_context *ctxt)
5051 /* copy just the sections touched not the entire info
5052 * since not all sections are valid as returned by
5055 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5056 memcpy(&vsi->info.queue_mapping,
5057 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5058 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5059 sizeof(vsi->info.tc_mapping));
5063 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5064 * @vsi: VSI to be configured
5065 * @enabled_tc: TC bitmap
5067 * This configures a particular VSI for TCs that are mapped to the
5068 * given TC bitmap. It uses default bandwidth share for TCs across
5069 * VSIs to configure TC for a particular VSI.
5072 * It is expected that the VSI queues have been quisced before calling
5075 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5077 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5078 struct i40e_vsi_context ctxt;
5082 /* Check if enabled_tc is same as existing or new TCs */
5083 if (vsi->tc_config.enabled_tc == enabled_tc)
5086 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5087 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5088 if (enabled_tc & BIT(i))
5092 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5094 dev_info(&vsi->back->pdev->dev,
5095 "Failed configuring TC map %d for VSI %d\n",
5096 enabled_tc, vsi->seid);
5100 /* Update Queue Pairs Mapping for currently enabled UPs */
5101 ctxt.seid = vsi->seid;
5102 ctxt.pf_num = vsi->back->hw.pf_id;
5104 ctxt.uplink_seid = vsi->uplink_seid;
5105 ctxt.info = vsi->info;
5106 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5108 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5109 ctxt.info.valid_sections |=
5110 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5111 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5114 /* Update the VSI after updating the VSI queue-mapping information */
5115 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
5117 dev_info(&vsi->back->pdev->dev,
5118 "Update vsi tc config failed, err %s aq_err %s\n",
5119 i40e_stat_str(&vsi->back->hw, ret),
5120 i40e_aq_str(&vsi->back->hw,
5121 vsi->back->hw.aq.asq_last_status));
5124 /* update the local VSI info with updated queue map */
5125 i40e_vsi_update_queue_map(vsi, &ctxt);
5126 vsi->info.valid_sections = 0;
5128 /* Update current VSI BW information */
5129 ret = i40e_vsi_get_bw_info(vsi);
5131 dev_info(&vsi->back->pdev->dev,
5132 "Failed updating vsi bw info, err %s aq_err %s\n",
5133 i40e_stat_str(&vsi->back->hw, ret),
5134 i40e_aq_str(&vsi->back->hw,
5135 vsi->back->hw.aq.asq_last_status));
5139 /* Update the netdev TC setup */
5140 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5146 * i40e_veb_config_tc - Configure TCs for given VEB
5148 * @enabled_tc: TC bitmap
5150 * Configures given TC bitmap for VEB (switching) element
5152 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
5154 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
5155 struct i40e_pf *pf = veb->pf;
5159 /* No TCs or already enabled TCs just return */
5160 if (!enabled_tc || veb->enabled_tc == enabled_tc)
5163 bw_data.tc_valid_bits = enabled_tc;
5164 /* bw_data.absolute_credits is not set (relative) */
5166 /* Enable ETS TCs with equal BW Share for now */
5167 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5168 if (enabled_tc & BIT(i))
5169 bw_data.tc_bw_share_credits[i] = 1;
5172 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
5175 dev_info(&pf->pdev->dev,
5176 "VEB bw config failed, err %s aq_err %s\n",
5177 i40e_stat_str(&pf->hw, ret),
5178 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5182 /* Update the BW information */
5183 ret = i40e_veb_get_bw_info(veb);
5185 dev_info(&pf->pdev->dev,
5186 "Failed getting veb bw config, err %s aq_err %s\n",
5187 i40e_stat_str(&pf->hw, ret),
5188 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5195 #ifdef CONFIG_I40E_DCB
5197 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
5200 * Reconfigure VEB/VSIs on a given PF; it is assumed that
5201 * the caller would've quiesce all the VSIs before calling
5204 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
5210 /* Enable the TCs available on PF to all VEBs */
5211 tc_map = i40e_pf_get_tc_map(pf);
5212 for (v = 0; v < I40E_MAX_VEB; v++) {
5215 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5217 dev_info(&pf->pdev->dev,
5218 "Failed configuring TC for VEB seid=%d\n",
5220 /* Will try to configure as many components */
5224 /* Update each VSI */
5225 for (v = 0; v < pf->num_alloc_vsi; v++) {
5229 /* - Enable all TCs for the LAN VSI
5231 * - For FCoE VSI only enable the TC configured
5232 * as per the APP TLV
5234 * - For all others keep them at TC0 for now
5236 if (v == pf->lan_vsi)
5237 tc_map = i40e_pf_get_tc_map(pf);
5239 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5241 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5242 tc_map = i40e_get_fcoe_tc_map(pf);
5243 #endif /* #ifdef I40E_FCOE */
5245 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5247 dev_info(&pf->pdev->dev,
5248 "Failed configuring TC for VSI seid=%d\n",
5250 /* Will try to configure as many components */
5252 /* Re-configure VSI vectors based on updated TC map */
5253 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5254 if (pf->vsi[v]->netdev)
5255 i40e_dcbnl_set_all(pf->vsi[v]);
5261 * i40e_resume_port_tx - Resume port Tx
5264 * Resume a port's Tx and issue a PF reset in case of failure to
5267 static int i40e_resume_port_tx(struct i40e_pf *pf)
5269 struct i40e_hw *hw = &pf->hw;
5272 ret = i40e_aq_resume_port_tx(hw, NULL);
5274 dev_info(&pf->pdev->dev,
5275 "Resume Port Tx failed, err %s aq_err %s\n",
5276 i40e_stat_str(&pf->hw, ret),
5277 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5278 /* Schedule PF reset to recover */
5279 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5280 i40e_service_event_schedule(pf);
5287 * i40e_init_pf_dcb - Initialize DCB configuration
5288 * @pf: PF being configured
5290 * Query the current DCB configuration and cache it
5291 * in the hardware structure
5293 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5295 struct i40e_hw *hw = &pf->hw;
5298 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5299 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5302 /* Get the initial DCB configuration */
5303 err = i40e_init_dcb(hw);
5305 /* Device/Function is not DCBX capable */
5306 if ((!hw->func_caps.dcb) ||
5307 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5308 dev_info(&pf->pdev->dev,
5309 "DCBX offload is not supported or is disabled for this PF.\n");
5311 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5315 /* When status is not DISABLED then DCBX in FW */
5316 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5317 DCB_CAP_DCBX_VER_IEEE;
5319 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5320 /* Enable DCB tagging only when more than one TC
5321 * or explicitly disable if only one TC
5323 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5324 pf->flags |= I40E_FLAG_DCB_ENABLED;
5326 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5327 dev_dbg(&pf->pdev->dev,
5328 "DCBX offload is supported for this PF.\n");
5331 dev_info(&pf->pdev->dev,
5332 "Query for DCB configuration failed, err %s aq_err %s\n",
5333 i40e_stat_str(&pf->hw, err),
5334 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5340 #endif /* CONFIG_I40E_DCB */
5341 #define SPEED_SIZE 14
5344 * i40e_print_link_message - print link up or down
5345 * @vsi: the VSI for which link needs a message
5347 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5349 enum i40e_aq_link_speed new_speed;
5350 char *speed = "Unknown";
5351 char *fc = "Unknown";
5355 new_speed = vsi->back->hw.phy.link_info.link_speed;
5357 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
5359 vsi->current_isup = isup;
5360 vsi->current_speed = new_speed;
5362 netdev_info(vsi->netdev, "NIC Link is Down\n");
5366 /* Warn user if link speed on NPAR enabled partition is not at
5369 if (vsi->back->hw.func_caps.npar_enable &&
5370 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5371 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5372 netdev_warn(vsi->netdev,
5373 "The partition detected link speed that is less than 10Gbps\n");
5375 switch (vsi->back->hw.phy.link_info.link_speed) {
5376 case I40E_LINK_SPEED_40GB:
5379 case I40E_LINK_SPEED_20GB:
5382 case I40E_LINK_SPEED_25GB:
5385 case I40E_LINK_SPEED_10GB:
5388 case I40E_LINK_SPEED_1GB:
5391 case I40E_LINK_SPEED_100MB:
5398 switch (vsi->back->hw.fc.current_mode) {
5402 case I40E_FC_TX_PAUSE:
5405 case I40E_FC_RX_PAUSE:
5413 if (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
5414 fec = ", FEC: None";
5415 an = ", Autoneg: False";
5417 if (vsi->back->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
5418 an = ", Autoneg: True";
5420 if (vsi->back->hw.phy.link_info.fec_info &
5421 I40E_AQ_CONFIG_FEC_KR_ENA)
5422 fec = ", FEC: CL74 FC-FEC/BASE-R";
5423 else if (vsi->back->hw.phy.link_info.fec_info &
5424 I40E_AQ_CONFIG_FEC_RS_ENA)
5425 fec = ", FEC: CL108 RS-FEC";
5428 netdev_info(vsi->netdev, "NIC Link is Up, %sbps Full Duplex%s%s, Flow Control: %s\n",
5429 speed, fec, an, fc);
5433 * i40e_up_complete - Finish the last steps of bringing up a connection
5434 * @vsi: the VSI being configured
5436 static int i40e_up_complete(struct i40e_vsi *vsi)
5438 struct i40e_pf *pf = vsi->back;
5441 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5442 i40e_vsi_configure_msix(vsi);
5444 i40e_configure_msi_and_legacy(vsi);
5447 err = i40e_vsi_start_rings(vsi);
5451 clear_bit(__I40E_DOWN, &vsi->state);
5452 i40e_napi_enable_all(vsi);
5453 i40e_vsi_enable_irq(vsi);
5455 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5457 i40e_print_link_message(vsi, true);
5458 netif_tx_start_all_queues(vsi->netdev);
5459 netif_carrier_on(vsi->netdev);
5460 } else if (vsi->netdev) {
5461 i40e_print_link_message(vsi, false);
5462 /* need to check for qualified module here*/
5463 if ((pf->hw.phy.link_info.link_info &
5464 I40E_AQ_MEDIA_AVAILABLE) &&
5465 (!(pf->hw.phy.link_info.an_info &
5466 I40E_AQ_QUALIFIED_MODULE)))
5467 netdev_err(vsi->netdev,
5468 "the driver failed to link because an unqualified module was detected.");
5471 /* replay FDIR SB filters */
5472 if (vsi->type == I40E_VSI_FDIR) {
5473 /* reset fd counters */
5476 i40e_fdir_filter_restore(vsi);
5479 /* On the next run of the service_task, notify any clients of the new
5482 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5483 i40e_service_event_schedule(pf);
5489 * i40e_vsi_reinit_locked - Reset the VSI
5490 * @vsi: the VSI being configured
5492 * Rebuild the ring structs after some configuration
5493 * has changed, e.g. MTU size.
5495 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5497 struct i40e_pf *pf = vsi->back;
5499 WARN_ON(in_interrupt());
5500 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5501 usleep_range(1000, 2000);
5505 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5509 * i40e_up - Bring the connection back up after being down
5510 * @vsi: the VSI being configured
5512 int i40e_up(struct i40e_vsi *vsi)
5516 err = i40e_vsi_configure(vsi);
5518 err = i40e_up_complete(vsi);
5524 * i40e_down - Shutdown the connection processing
5525 * @vsi: the VSI being stopped
5527 void i40e_down(struct i40e_vsi *vsi)
5531 /* It is assumed that the caller of this function
5532 * sets the vsi->state __I40E_DOWN bit.
5535 netif_carrier_off(vsi->netdev);
5536 netif_tx_disable(vsi->netdev);
5538 i40e_vsi_disable_irq(vsi);
5539 i40e_vsi_stop_rings(vsi);
5540 i40e_napi_disable_all(vsi);
5542 for (i = 0; i < vsi->num_queue_pairs; i++) {
5543 i40e_clean_tx_ring(vsi->tx_rings[i]);
5544 i40e_clean_rx_ring(vsi->rx_rings[i]);
5550 * i40e_setup_tc - configure multiple traffic classes
5551 * @netdev: net device to configure
5552 * @tc: number of traffic classes to enable
5554 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5556 struct i40e_netdev_priv *np = netdev_priv(netdev);
5557 struct i40e_vsi *vsi = np->vsi;
5558 struct i40e_pf *pf = vsi->back;
5563 /* Check if DCB enabled to continue */
5564 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5565 netdev_info(netdev, "DCB is not enabled for adapter\n");
5569 /* Check if MFP enabled */
5570 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5571 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5575 /* Check whether tc count is within enabled limit */
5576 if (tc > i40e_pf_get_num_tc(pf)) {
5577 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5581 /* Generate TC map for number of tc requested */
5582 for (i = 0; i < tc; i++)
5583 enabled_tc |= BIT(i);
5585 /* Requesting same TC configuration as already enabled */
5586 if (enabled_tc == vsi->tc_config.enabled_tc)
5589 /* Quiesce VSI queues */
5590 i40e_quiesce_vsi(vsi);
5592 /* Configure VSI for enabled TCs */
5593 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5595 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5601 i40e_unquiesce_vsi(vsi);
5608 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5609 struct tc_to_netdev *tc)
5611 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5612 struct tc_to_netdev *tc)
5615 if (tc->type != TC_SETUP_MQPRIO)
5618 tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
5620 return i40e_setup_tc(netdev, tc->mqprio->num_tc);
5624 * i40e_open - Called when a network interface is made active
5625 * @netdev: network interface device structure
5627 * The open entry point is called when a network interface is made
5628 * active by the system (IFF_UP). At this point all resources needed
5629 * for transmit and receive operations are allocated, the interrupt
5630 * handler is registered with the OS, the netdev watchdog subtask is
5631 * enabled, and the stack is notified that the interface is ready.
5633 * Returns 0 on success, negative value on failure
5635 int i40e_open(struct net_device *netdev)
5637 struct i40e_netdev_priv *np = netdev_priv(netdev);
5638 struct i40e_vsi *vsi = np->vsi;
5639 struct i40e_pf *pf = vsi->back;
5642 /* disallow open during test or if eeprom is broken */
5643 if (test_bit(__I40E_TESTING, &pf->state) ||
5644 test_bit(__I40E_BAD_EEPROM, &pf->state))
5647 netif_carrier_off(netdev);
5649 err = i40e_vsi_open(vsi);
5653 /* configure global TSO hardware offload settings */
5654 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5655 TCP_FLAG_FIN) >> 16);
5656 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5658 TCP_FLAG_CWR) >> 16);
5659 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5661 udp_tunnel_get_rx_info(netdev);
5668 * @vsi: the VSI to open
5670 * Finish initialization of the VSI.
5672 * Returns 0 on success, negative value on failure
5674 int i40e_vsi_open(struct i40e_vsi *vsi)
5676 struct i40e_pf *pf = vsi->back;
5677 char int_name[I40E_INT_NAME_STR_LEN];
5680 /* allocate descriptors */
5681 err = i40e_vsi_setup_tx_resources(vsi);
5684 err = i40e_vsi_setup_rx_resources(vsi);
5688 err = i40e_vsi_configure(vsi);
5693 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5694 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5695 err = i40e_vsi_request_irq(vsi, int_name);
5699 /* Notify the stack of the actual queue counts. */
5700 err = netif_set_real_num_tx_queues(vsi->netdev,
5701 vsi->num_queue_pairs);
5703 goto err_set_queues;
5705 err = netif_set_real_num_rx_queues(vsi->netdev,
5706 vsi->num_queue_pairs);
5708 goto err_set_queues;
5710 } else if (vsi->type == I40E_VSI_FDIR) {
5711 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5712 dev_driver_string(&pf->pdev->dev),
5713 dev_name(&pf->pdev->dev));
5714 err = i40e_vsi_request_irq(vsi, int_name);
5721 err = i40e_up_complete(vsi);
5723 goto err_up_complete;
5730 i40e_vsi_free_irq(vsi);
5732 i40e_vsi_free_rx_resources(vsi);
5734 i40e_vsi_free_tx_resources(vsi);
5735 if (vsi == pf->vsi[pf->lan_vsi])
5736 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5742 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5743 * @pf: Pointer to PF
5745 * This function destroys the hlist where all the Flow Director
5746 * filters were saved.
5748 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5750 struct i40e_fdir_filter *filter;
5751 struct i40e_flex_pit *pit_entry, *tmp;
5752 struct hlist_node *node2;
5754 hlist_for_each_entry_safe(filter, node2,
5755 &pf->fdir_filter_list, fdir_node) {
5756 hlist_del(&filter->fdir_node);
5760 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
5761 list_del(&pit_entry->list);
5764 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
5766 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
5767 list_del(&pit_entry->list);
5770 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
5772 pf->fdir_pf_active_filters = 0;
5773 pf->fd_tcp4_filter_cnt = 0;
5774 pf->fd_udp4_filter_cnt = 0;
5775 pf->fd_sctp4_filter_cnt = 0;
5776 pf->fd_ip4_filter_cnt = 0;
5778 /* Reprogram the default input set for TCP/IPv4 */
5779 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
5780 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5781 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5783 /* Reprogram the default input set for UDP/IPv4 */
5784 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
5785 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5786 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5788 /* Reprogram the default input set for SCTP/IPv4 */
5789 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
5790 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
5791 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
5793 /* Reprogram the default input set for Other/IPv4 */
5794 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
5795 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
5799 * i40e_close - Disables a network interface
5800 * @netdev: network interface device structure
5802 * The close entry point is called when an interface is de-activated
5803 * by the OS. The hardware is still under the driver's control, but
5804 * this netdev interface is disabled.
5806 * Returns 0, this is not allowed to fail
5808 int i40e_close(struct net_device *netdev)
5810 struct i40e_netdev_priv *np = netdev_priv(netdev);
5811 struct i40e_vsi *vsi = np->vsi;
5813 i40e_vsi_close(vsi);
5819 * i40e_do_reset - Start a PF or Core Reset sequence
5820 * @pf: board private structure
5821 * @reset_flags: which reset is requested
5823 * The essential difference in resets is that the PF Reset
5824 * doesn't clear the packet buffers, doesn't reset the PE
5825 * firmware, and doesn't bother the other PFs on the chip.
5827 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5831 WARN_ON(in_interrupt());
5834 /* do the biggest reset indicated */
5835 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5837 /* Request a Global Reset
5839 * This will start the chip's countdown to the actual full
5840 * chip reset event, and a warning interrupt to be sent
5841 * to all PFs, including the requestor. Our handler
5842 * for the warning interrupt will deal with the shutdown
5843 * and recovery of the switch setup.
5845 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5846 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5847 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5848 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5850 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5852 /* Request a Core Reset
5854 * Same as Global Reset, except does *not* include the MAC/PHY
5856 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5857 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5858 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5859 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5860 i40e_flush(&pf->hw);
5862 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5864 /* Request a PF Reset
5866 * Resets only the PF-specific registers
5868 * This goes directly to the tear-down and rebuild of
5869 * the switch, since we need to do all the recovery as
5870 * for the Core Reset.
5872 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5873 i40e_handle_reset_warning(pf);
5875 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5878 /* Find the VSI(s) that requested a re-init */
5879 dev_info(&pf->pdev->dev,
5880 "VSI reinit requested\n");
5881 for (v = 0; v < pf->num_alloc_vsi; v++) {
5882 struct i40e_vsi *vsi = pf->vsi[v];
5885 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5886 i40e_vsi_reinit_locked(pf->vsi[v]);
5887 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5890 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5893 /* Find the VSI(s) that needs to be brought down */
5894 dev_info(&pf->pdev->dev, "VSI down requested\n");
5895 for (v = 0; v < pf->num_alloc_vsi; v++) {
5896 struct i40e_vsi *vsi = pf->vsi[v];
5899 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5900 set_bit(__I40E_DOWN, &vsi->state);
5902 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5906 dev_info(&pf->pdev->dev,
5907 "bad reset request 0x%08x\n", reset_flags);
5911 #ifdef CONFIG_I40E_DCB
5913 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5914 * @pf: board private structure
5915 * @old_cfg: current DCB config
5916 * @new_cfg: new DCB config
5918 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5919 struct i40e_dcbx_config *old_cfg,
5920 struct i40e_dcbx_config *new_cfg)
5922 bool need_reconfig = false;
5924 /* Check if ETS configuration has changed */
5925 if (memcmp(&new_cfg->etscfg,
5927 sizeof(new_cfg->etscfg))) {
5928 /* If Priority Table has changed reconfig is needed */
5929 if (memcmp(&new_cfg->etscfg.prioritytable,
5930 &old_cfg->etscfg.prioritytable,
5931 sizeof(new_cfg->etscfg.prioritytable))) {
5932 need_reconfig = true;
5933 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5936 if (memcmp(&new_cfg->etscfg.tcbwtable,
5937 &old_cfg->etscfg.tcbwtable,
5938 sizeof(new_cfg->etscfg.tcbwtable)))
5939 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5941 if (memcmp(&new_cfg->etscfg.tsatable,
5942 &old_cfg->etscfg.tsatable,
5943 sizeof(new_cfg->etscfg.tsatable)))
5944 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5947 /* Check if PFC configuration has changed */
5948 if (memcmp(&new_cfg->pfc,
5950 sizeof(new_cfg->pfc))) {
5951 need_reconfig = true;
5952 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5955 /* Check if APP Table has changed */
5956 if (memcmp(&new_cfg->app,
5958 sizeof(new_cfg->app))) {
5959 need_reconfig = true;
5960 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5963 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5964 return need_reconfig;
5968 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5969 * @pf: board private structure
5970 * @e: event info posted on ARQ
5972 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5973 struct i40e_arq_event_info *e)
5975 struct i40e_aqc_lldp_get_mib *mib =
5976 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5977 struct i40e_hw *hw = &pf->hw;
5978 struct i40e_dcbx_config tmp_dcbx_cfg;
5979 bool need_reconfig = false;
5983 /* Not DCB capable or capability disabled */
5984 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5987 /* Ignore if event is not for Nearest Bridge */
5988 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5989 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5990 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5991 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5994 /* Check MIB Type and return if event for Remote MIB update */
5995 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5996 dev_dbg(&pf->pdev->dev,
5997 "LLDP event mib type %s\n", type ? "remote" : "local");
5998 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5999 /* Update the remote cached instance and return */
6000 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
6001 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
6002 &hw->remote_dcbx_config);
6006 /* Store the old configuration */
6007 tmp_dcbx_cfg = hw->local_dcbx_config;
6009 /* Reset the old DCBx configuration data */
6010 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
6011 /* Get updated DCBX data from firmware */
6012 ret = i40e_get_dcb_config(&pf->hw);
6014 dev_info(&pf->pdev->dev,
6015 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
6016 i40e_stat_str(&pf->hw, ret),
6017 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6021 /* No change detected in DCBX configs */
6022 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
6023 sizeof(tmp_dcbx_cfg))) {
6024 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
6028 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
6029 &hw->local_dcbx_config);
6031 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
6036 /* Enable DCB tagging only when more than one TC */
6037 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6038 pf->flags |= I40E_FLAG_DCB_ENABLED;
6040 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6042 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
6043 /* Reconfiguration needed quiesce all VSIs */
6044 i40e_pf_quiesce_all_vsi(pf);
6046 /* Changes in configuration update VEB/VSI */
6047 i40e_dcb_reconfigure(pf);
6049 ret = i40e_resume_port_tx(pf);
6051 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
6052 /* In case of error no point in resuming VSIs */
6056 /* Wait for the PF's queues to be disabled */
6057 ret = i40e_pf_wait_queues_disabled(pf);
6059 /* Schedule PF reset to recover */
6060 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6061 i40e_service_event_schedule(pf);
6063 i40e_pf_unquiesce_all_vsi(pf);
6064 pf->flags |= (I40E_FLAG_SERVICE_CLIENT_REQUESTED |
6065 I40E_FLAG_CLIENT_L2_CHANGE);
6071 #endif /* CONFIG_I40E_DCB */
6074 * i40e_do_reset_safe - Protected reset path for userland calls.
6075 * @pf: board private structure
6076 * @reset_flags: which reset is requested
6079 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
6082 i40e_do_reset(pf, reset_flags);
6087 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
6088 * @pf: board private structure
6089 * @e: event info posted on ARQ
6091 * Handler for LAN Queue Overflow Event generated by the firmware for PF
6094 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
6095 struct i40e_arq_event_info *e)
6097 struct i40e_aqc_lan_overflow *data =
6098 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
6099 u32 queue = le32_to_cpu(data->prtdcb_rupto);
6100 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
6101 struct i40e_hw *hw = &pf->hw;
6105 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
6108 /* Queue belongs to VF, find the VF and issue VF reset */
6109 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
6110 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
6111 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
6112 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
6113 vf_id -= hw->func_caps.vf_base_id;
6114 vf = &pf->vf[vf_id];
6115 i40e_vc_notify_vf_reset(vf);
6116 /* Allow VF to process pending reset notification */
6118 i40e_reset_vf(vf, false);
6123 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
6124 * @pf: board private structure
6126 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
6130 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6131 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
6136 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
6137 * @pf: board private structure
6139 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
6143 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
6144 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
6145 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
6146 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
6151 * i40e_get_global_fd_count - Get total FD filters programmed on device
6152 * @pf: board private structure
6154 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
6158 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
6159 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
6160 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
6161 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
6166 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
6167 * @pf: board private structure
6169 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
6171 struct i40e_fdir_filter *filter;
6172 u32 fcnt_prog, fcnt_avail;
6173 struct hlist_node *node;
6175 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6178 /* Check if, FD SB or ATR was auto disabled and if there is enough room
6181 fcnt_prog = i40e_get_global_fd_count(pf);
6182 fcnt_avail = pf->fdir_pf_filter_count;
6183 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
6184 (pf->fd_add_err == 0) ||
6185 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
6186 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
6187 (pf->hw_disabled_flags & I40E_FLAG_FD_SB_ENABLED)) {
6188 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
6189 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6190 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
6194 /* Wait for some more space to be available to turn on ATR. We also
6195 * must check that no existing ntuple rules for TCP are in effect
6197 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
6198 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
6199 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED) &&
6200 (pf->fd_tcp4_filter_cnt == 0)) {
6201 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6202 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6203 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
6207 /* if hw had a problem adding a filter, delete it */
6208 if (pf->fd_inv > 0) {
6209 hlist_for_each_entry_safe(filter, node,
6210 &pf->fdir_filter_list, fdir_node) {
6211 if (filter->fd_id == pf->fd_inv) {
6212 hlist_del(&filter->fdir_node);
6214 pf->fdir_pf_active_filters--;
6220 #define I40E_MIN_FD_FLUSH_INTERVAL 10
6221 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
6223 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
6224 * @pf: board private structure
6226 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
6228 unsigned long min_flush_time;
6229 int flush_wait_retry = 50;
6230 bool disable_atr = false;
6234 if (!time_after(jiffies, pf->fd_flush_timestamp +
6235 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
6238 /* If the flush is happening too quick and we have mostly SB rules we
6239 * should not re-enable ATR for some time.
6241 min_flush_time = pf->fd_flush_timestamp +
6242 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
6243 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
6245 if (!(time_after(jiffies, min_flush_time)) &&
6246 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
6247 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6248 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
6252 pf->fd_flush_timestamp = jiffies;
6253 pf->hw_disabled_flags |= I40E_FLAG_FD_ATR_ENABLED;
6254 /* flush all filters */
6255 wr32(&pf->hw, I40E_PFQF_CTL_1,
6256 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6257 i40e_flush(&pf->hw);
6261 /* Check FD flush status every 5-6msec */
6262 usleep_range(5000, 6000);
6263 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6264 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6266 } while (flush_wait_retry--);
6267 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6268 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6270 /* replay sideband filters */
6271 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6272 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
6273 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6274 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6275 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6276 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6281 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6282 * @pf: board private structure
6284 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6286 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6289 /* We can see up to 256 filter programming desc in transit if the filters are
6290 * being applied really fast; before we see the first
6291 * filter miss error on Rx queue 0. Accumulating enough error messages before
6292 * reacting will make sure we don't cause flush too often.
6294 #define I40E_MAX_FD_PROGRAM_ERROR 256
6297 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6298 * @pf: board private structure
6300 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6303 /* if interface is down do nothing */
6304 if (test_bit(__I40E_DOWN, &pf->state))
6307 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6308 i40e_fdir_flush_and_replay(pf);
6310 i40e_fdir_check_and_reenable(pf);
6315 * i40e_vsi_link_event - notify VSI of a link event
6316 * @vsi: vsi to be notified
6317 * @link_up: link up or down
6319 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6321 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6324 switch (vsi->type) {
6329 if (!vsi->netdev || !vsi->netdev_registered)
6333 netif_carrier_on(vsi->netdev);
6334 netif_tx_wake_all_queues(vsi->netdev);
6336 netif_carrier_off(vsi->netdev);
6337 netif_tx_stop_all_queues(vsi->netdev);
6341 case I40E_VSI_SRIOV:
6342 case I40E_VSI_VMDQ2:
6344 case I40E_VSI_IWARP:
6345 case I40E_VSI_MIRROR:
6347 /* there is no notification for other VSIs */
6353 * i40e_veb_link_event - notify elements on the veb of a link event
6354 * @veb: veb to be notified
6355 * @link_up: link up or down
6357 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6362 if (!veb || !veb->pf)
6366 /* depth first... */
6367 for (i = 0; i < I40E_MAX_VEB; i++)
6368 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6369 i40e_veb_link_event(pf->veb[i], link_up);
6371 /* ... now the local VSIs */
6372 for (i = 0; i < pf->num_alloc_vsi; i++)
6373 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6374 i40e_vsi_link_event(pf->vsi[i], link_up);
6378 * i40e_link_event - Update netif_carrier status
6379 * @pf: board private structure
6381 static void i40e_link_event(struct i40e_pf *pf)
6383 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6384 u8 new_link_speed, old_link_speed;
6386 bool new_link, old_link;
6388 /* save off old link status information */
6389 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6391 /* set this to force the get_link_status call to refresh state */
6392 pf->hw.phy.get_link_info = true;
6394 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6396 status = i40e_get_link_status(&pf->hw, &new_link);
6398 /* On success, disable temp link polling */
6399 if (status == I40E_SUCCESS) {
6400 if (pf->flags & I40E_FLAG_TEMP_LINK_POLLING)
6401 pf->flags &= ~I40E_FLAG_TEMP_LINK_POLLING;
6403 /* Enable link polling temporarily until i40e_get_link_status
6404 * returns I40E_SUCCESS
6406 pf->flags |= I40E_FLAG_TEMP_LINK_POLLING;
6407 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6412 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6413 new_link_speed = pf->hw.phy.link_info.link_speed;
6415 if (new_link == old_link &&
6416 new_link_speed == old_link_speed &&
6417 (test_bit(__I40E_DOWN, &vsi->state) ||
6418 new_link == netif_carrier_ok(vsi->netdev)))
6421 if (!test_bit(__I40E_DOWN, &vsi->state))
6422 i40e_print_link_message(vsi, new_link);
6424 /* Notify the base of the switch tree connected to
6425 * the link. Floating VEBs are not notified.
6427 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6428 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6430 i40e_vsi_link_event(vsi, new_link);
6433 i40e_vc_notify_link_state(pf);
6435 if (pf->flags & I40E_FLAG_PTP)
6436 i40e_ptp_set_increment(pf);
6440 * i40e_watchdog_subtask - periodic checks not using event driven response
6441 * @pf: board private structure
6443 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6447 /* if interface is down do nothing */
6448 if (test_bit(__I40E_DOWN, &pf->state) ||
6449 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6452 /* make sure we don't do these things too often */
6453 if (time_before(jiffies, (pf->service_timer_previous +
6454 pf->service_timer_period)))
6456 pf->service_timer_previous = jiffies;
6458 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
6459 (pf->flags & I40E_FLAG_TEMP_LINK_POLLING))
6460 i40e_link_event(pf);
6462 /* Update the stats for active netdevs so the network stack
6463 * can look at updated numbers whenever it cares to
6465 for (i = 0; i < pf->num_alloc_vsi; i++)
6466 if (pf->vsi[i] && pf->vsi[i]->netdev)
6467 i40e_update_stats(pf->vsi[i]);
6469 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6470 /* Update the stats for the active switching components */
6471 for (i = 0; i < I40E_MAX_VEB; i++)
6473 i40e_update_veb_stats(pf->veb[i]);
6476 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6480 * i40e_reset_subtask - Set up for resetting the device and driver
6481 * @pf: board private structure
6483 static void i40e_reset_subtask(struct i40e_pf *pf)
6485 u32 reset_flags = 0;
6488 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6489 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6490 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6492 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6493 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6494 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6496 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6497 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6498 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6500 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6501 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6502 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6504 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6505 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6506 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6509 /* If there's a recovery already waiting, it takes
6510 * precedence before starting a new reset sequence.
6512 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6513 i40e_handle_reset_warning(pf);
6517 /* If we're already down or resetting, just bail */
6519 !test_bit(__I40E_DOWN, &pf->state) &&
6520 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6521 i40e_do_reset(pf, reset_flags);
6528 * i40e_handle_link_event - Handle link event
6529 * @pf: board private structure
6530 * @e: event info posted on ARQ
6532 static void i40e_handle_link_event(struct i40e_pf *pf,
6533 struct i40e_arq_event_info *e)
6535 struct i40e_aqc_get_link_status *status =
6536 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6538 /* Do a new status request to re-enable LSE reporting
6539 * and load new status information into the hw struct
6540 * This completely ignores any state information
6541 * in the ARQ event info, instead choosing to always
6542 * issue the AQ update link status command.
6544 i40e_link_event(pf);
6546 /* check for unqualified module, if link is down */
6547 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6548 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6549 (!(status->link_info & I40E_AQ_LINK_UP)))
6550 dev_err(&pf->pdev->dev,
6551 "The driver failed to link because an unqualified module was detected.\n");
6555 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6556 * @pf: board private structure
6558 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6560 struct i40e_arq_event_info event;
6561 struct i40e_hw *hw = &pf->hw;
6568 /* Do not run clean AQ when PF reset fails */
6569 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6572 /* check for error indications */
6573 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6575 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6576 if (hw->debug_mask & I40E_DEBUG_AQ)
6577 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6578 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6580 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6581 if (hw->debug_mask & I40E_DEBUG_AQ)
6582 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6583 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6584 pf->arq_overflows++;
6586 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6587 if (hw->debug_mask & I40E_DEBUG_AQ)
6588 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6589 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6592 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6594 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6596 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6597 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6598 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6599 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6601 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6602 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6603 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6604 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6606 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6607 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6608 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6609 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6612 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6614 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6615 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6620 ret = i40e_clean_arq_element(hw, &event, &pending);
6621 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6624 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6628 opcode = le16_to_cpu(event.desc.opcode);
6631 case i40e_aqc_opc_get_link_status:
6632 i40e_handle_link_event(pf, &event);
6634 case i40e_aqc_opc_send_msg_to_pf:
6635 ret = i40e_vc_process_vf_msg(pf,
6636 le16_to_cpu(event.desc.retval),
6637 le32_to_cpu(event.desc.cookie_high),
6638 le32_to_cpu(event.desc.cookie_low),
6642 case i40e_aqc_opc_lldp_update_mib:
6643 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6644 #ifdef CONFIG_I40E_DCB
6646 ret = i40e_handle_lldp_event(pf, &event);
6648 #endif /* CONFIG_I40E_DCB */
6650 case i40e_aqc_opc_event_lan_overflow:
6651 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6652 i40e_handle_lan_overflow_event(pf, &event);
6654 case i40e_aqc_opc_send_msg_to_peer:
6655 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6657 case i40e_aqc_opc_nvm_erase:
6658 case i40e_aqc_opc_nvm_update:
6659 case i40e_aqc_opc_oem_post_update:
6660 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6661 "ARQ NVM operation 0x%04x completed\n",
6665 dev_info(&pf->pdev->dev,
6666 "ARQ: Unknown event 0x%04x ignored\n",
6670 } while (pending && (i++ < pf->adminq_work_limit));
6672 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6673 /* re-enable Admin queue interrupt cause */
6674 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6675 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6676 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6679 kfree(event.msg_buf);
6683 * i40e_verify_eeprom - make sure eeprom is good to use
6684 * @pf: board private structure
6686 static void i40e_verify_eeprom(struct i40e_pf *pf)
6690 err = i40e_diag_eeprom_test(&pf->hw);
6692 /* retry in case of garbage read */
6693 err = i40e_diag_eeprom_test(&pf->hw);
6695 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6697 set_bit(__I40E_BAD_EEPROM, &pf->state);
6701 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6702 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6703 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6708 * i40e_enable_pf_switch_lb
6709 * @pf: pointer to the PF structure
6711 * enable switch loop back or die - no point in a return value
6713 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6715 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6716 struct i40e_vsi_context ctxt;
6719 ctxt.seid = pf->main_vsi_seid;
6720 ctxt.pf_num = pf->hw.pf_id;
6722 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6724 dev_info(&pf->pdev->dev,
6725 "couldn't get PF vsi config, err %s aq_err %s\n",
6726 i40e_stat_str(&pf->hw, ret),
6727 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6730 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6731 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6732 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6734 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6736 dev_info(&pf->pdev->dev,
6737 "update vsi switch failed, err %s aq_err %s\n",
6738 i40e_stat_str(&pf->hw, ret),
6739 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6744 * i40e_disable_pf_switch_lb
6745 * @pf: pointer to the PF structure
6747 * disable switch loop back or die - no point in a return value
6749 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6751 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6752 struct i40e_vsi_context ctxt;
6755 ctxt.seid = pf->main_vsi_seid;
6756 ctxt.pf_num = pf->hw.pf_id;
6758 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6760 dev_info(&pf->pdev->dev,
6761 "couldn't get PF vsi config, err %s aq_err %s\n",
6762 i40e_stat_str(&pf->hw, ret),
6763 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6766 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6767 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6768 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6770 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6772 dev_info(&pf->pdev->dev,
6773 "update vsi switch failed, err %s aq_err %s\n",
6774 i40e_stat_str(&pf->hw, ret),
6775 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6780 * i40e_config_bridge_mode - Configure the HW bridge mode
6781 * @veb: pointer to the bridge instance
6783 * Configure the loop back mode for the LAN VSI that is downlink to the
6784 * specified HW bridge instance. It is expected this function is called
6785 * when a new HW bridge is instantiated.
6787 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6789 struct i40e_pf *pf = veb->pf;
6791 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6792 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6793 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6794 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6795 i40e_disable_pf_switch_lb(pf);
6797 i40e_enable_pf_switch_lb(pf);
6801 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6802 * @veb: pointer to the VEB instance
6804 * This is a recursive function that first builds the attached VSIs then
6805 * recurses in to build the next layer of VEB. We track the connections
6806 * through our own index numbers because the seid's from the HW could
6807 * change across the reset.
6809 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6811 struct i40e_vsi *ctl_vsi = NULL;
6812 struct i40e_pf *pf = veb->pf;
6816 /* build VSI that owns this VEB, temporarily attached to base VEB */
6817 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6819 pf->vsi[v]->veb_idx == veb->idx &&
6820 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6821 ctl_vsi = pf->vsi[v];
6826 dev_info(&pf->pdev->dev,
6827 "missing owner VSI for veb_idx %d\n", veb->idx);
6829 goto end_reconstitute;
6831 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6832 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6833 ret = i40e_add_vsi(ctl_vsi);
6835 dev_info(&pf->pdev->dev,
6836 "rebuild of veb_idx %d owner VSI failed: %d\n",
6838 goto end_reconstitute;
6840 i40e_vsi_reset_stats(ctl_vsi);
6842 /* create the VEB in the switch and move the VSI onto the VEB */
6843 ret = i40e_add_veb(veb, ctl_vsi);
6845 goto end_reconstitute;
6847 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6848 veb->bridge_mode = BRIDGE_MODE_VEB;
6850 veb->bridge_mode = BRIDGE_MODE_VEPA;
6851 i40e_config_bridge_mode(veb);
6853 /* create the remaining VSIs attached to this VEB */
6854 for (v = 0; v < pf->num_alloc_vsi; v++) {
6855 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6858 if (pf->vsi[v]->veb_idx == veb->idx) {
6859 struct i40e_vsi *vsi = pf->vsi[v];
6861 vsi->uplink_seid = veb->seid;
6862 ret = i40e_add_vsi(vsi);
6864 dev_info(&pf->pdev->dev,
6865 "rebuild of vsi_idx %d failed: %d\n",
6867 goto end_reconstitute;
6869 i40e_vsi_reset_stats(vsi);
6873 /* create any VEBs attached to this VEB - RECURSION */
6874 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6875 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6876 pf->veb[veb_idx]->uplink_seid = veb->seid;
6877 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6888 * i40e_get_capabilities - get info about the HW
6889 * @pf: the PF struct
6891 static int i40e_get_capabilities(struct i40e_pf *pf)
6893 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6898 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6900 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6904 /* this loads the data into the hw struct for us */
6905 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6907 i40e_aqc_opc_list_func_capabilities,
6909 /* data loaded, buffer no longer needed */
6912 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6913 /* retry with a larger buffer */
6914 buf_len = data_size;
6915 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6916 dev_info(&pf->pdev->dev,
6917 "capability discovery failed, err %s aq_err %s\n",
6918 i40e_stat_str(&pf->hw, err),
6919 i40e_aq_str(&pf->hw,
6920 pf->hw.aq.asq_last_status));
6925 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6926 dev_info(&pf->pdev->dev,
6927 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6928 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6929 pf->hw.func_caps.num_msix_vectors,
6930 pf->hw.func_caps.num_msix_vectors_vf,
6931 pf->hw.func_caps.fd_filters_guaranteed,
6932 pf->hw.func_caps.fd_filters_best_effort,
6933 pf->hw.func_caps.num_tx_qp,
6934 pf->hw.func_caps.num_vsis);
6936 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6937 + pf->hw.func_caps.num_vfs)
6938 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6939 dev_info(&pf->pdev->dev,
6940 "got num_vsis %d, setting num_vsis to %d\n",
6941 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6942 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6948 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6951 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6952 * @pf: board private structure
6954 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6956 struct i40e_vsi *vsi;
6958 /* quick workaround for an NVM issue that leaves a critical register
6961 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6962 static const u32 hkey[] = {
6963 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6964 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6965 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6969 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6970 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6973 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6976 /* find existing VSI and see if it needs configuring */
6977 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
6979 /* create a new VSI if none exists */
6981 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6982 pf->vsi[pf->lan_vsi]->seid, 0);
6984 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6985 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6990 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6994 * i40e_fdir_teardown - release the Flow Director resources
6995 * @pf: board private structure
6997 static void i40e_fdir_teardown(struct i40e_pf *pf)
6999 struct i40e_vsi *vsi;
7001 i40e_fdir_filter_exit(pf);
7002 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
7004 i40e_vsi_release(vsi);
7008 * i40e_prep_for_reset - prep for the core to reset
7009 * @pf: board private structure
7011 * Close up the VFs and other things in prep for PF Reset.
7013 static void i40e_prep_for_reset(struct i40e_pf *pf)
7015 struct i40e_hw *hw = &pf->hw;
7016 i40e_status ret = 0;
7019 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
7020 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
7022 if (i40e_check_asq_alive(&pf->hw))
7023 i40e_vc_notify_reset(pf);
7025 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
7027 /* quiesce the VSIs and their queues that are not already DOWN */
7028 i40e_pf_quiesce_all_vsi(pf);
7030 for (v = 0; v < pf->num_alloc_vsi; v++) {
7032 pf->vsi[v]->seid = 0;
7035 i40e_shutdown_adminq(&pf->hw);
7037 /* call shutdown HMC */
7038 if (hw->hmc.hmc_obj) {
7039 ret = i40e_shutdown_lan_hmc(hw);
7041 dev_warn(&pf->pdev->dev,
7042 "shutdown_lan_hmc failed: %d\n", ret);
7047 * i40e_send_version - update firmware with driver version
7050 static void i40e_send_version(struct i40e_pf *pf)
7052 struct i40e_driver_version dv;
7054 dv.major_version = DRV_VERSION_MAJOR;
7055 dv.minor_version = DRV_VERSION_MINOR;
7056 dv.build_version = DRV_VERSION_BUILD;
7057 dv.subbuild_version = 0;
7058 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
7059 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
7063 * i40e_reset_and_rebuild - reset and rebuild using a saved config
7064 * @pf: board private structure
7065 * @reinit: if the Main VSI needs to re-initialized.
7067 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
7069 struct i40e_hw *hw = &pf->hw;
7070 u8 set_fc_aq_fail = 0;
7075 /* Now we wait for GRST to settle out.
7076 * We don't have to delete the VEBs or VSIs from the hw switch
7077 * because the reset will make them disappear.
7079 ret = i40e_pf_reset(hw);
7081 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
7082 set_bit(__I40E_RESET_FAILED, &pf->state);
7083 goto clear_recovery;
7087 if (test_bit(__I40E_DOWN, &pf->state))
7088 goto clear_recovery;
7089 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
7091 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
7092 ret = i40e_init_adminq(&pf->hw);
7094 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
7095 i40e_stat_str(&pf->hw, ret),
7096 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7097 goto clear_recovery;
7100 /* re-verify the eeprom if we just had an EMP reset */
7101 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
7102 i40e_verify_eeprom(pf);
7104 i40e_clear_pxe_mode(hw);
7105 ret = i40e_get_capabilities(pf);
7107 goto end_core_reset;
7109 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7110 hw->func_caps.num_rx_qp,
7111 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
7113 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
7114 goto end_core_reset;
7116 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7118 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
7119 goto end_core_reset;
7122 #ifdef CONFIG_I40E_DCB
7123 ret = i40e_init_pf_dcb(pf);
7125 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
7126 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
7127 /* Continue without DCB enabled */
7129 #endif /* CONFIG_I40E_DCB */
7131 i40e_init_pf_fcoe(pf);
7134 /* do basic switch setup */
7135 ret = i40e_setup_pf_switch(pf, reinit);
7137 goto end_core_reset;
7139 /* The driver only wants link up/down and module qualification
7140 * reports from firmware. Note the negative logic.
7142 ret = i40e_aq_set_phy_int_mask(&pf->hw,
7143 ~(I40E_AQ_EVENT_LINK_UPDOWN |
7144 I40E_AQ_EVENT_MEDIA_NA |
7145 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
7147 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
7148 i40e_stat_str(&pf->hw, ret),
7149 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7151 /* make sure our flow control settings are restored */
7152 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
7154 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
7155 i40e_stat_str(&pf->hw, ret),
7156 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7158 /* Rebuild the VSIs and VEBs that existed before reset.
7159 * They are still in our local switch element arrays, so only
7160 * need to rebuild the switch model in the HW.
7162 * If there were VEBs but the reconstitution failed, we'll try
7163 * try to recover minimal use by getting the basic PF VSI working.
7165 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
7166 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
7167 /* find the one VEB connected to the MAC, and find orphans */
7168 for (v = 0; v < I40E_MAX_VEB; v++) {
7172 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
7173 pf->veb[v]->uplink_seid == 0) {
7174 ret = i40e_reconstitute_veb(pf->veb[v]);
7179 /* If Main VEB failed, we're in deep doodoo,
7180 * so give up rebuilding the switch and set up
7181 * for minimal rebuild of PF VSI.
7182 * If orphan failed, we'll report the error
7183 * but try to keep going.
7185 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
7186 dev_info(&pf->pdev->dev,
7187 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
7189 pf->vsi[pf->lan_vsi]->uplink_seid
7192 } else if (pf->veb[v]->uplink_seid == 0) {
7193 dev_info(&pf->pdev->dev,
7194 "rebuild of orphan VEB failed: %d\n",
7201 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
7202 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
7203 /* no VEB, so rebuild only the Main VSI */
7204 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
7206 dev_info(&pf->pdev->dev,
7207 "rebuild of Main VSI failed: %d\n", ret);
7208 goto end_core_reset;
7212 /* Reconfigure hardware for allowing smaller MSS in the case
7213 * of TSO, so that we avoid the MDD being fired and causing
7214 * a reset in the case of small MSS+TSO.
7216 #define I40E_REG_MSS 0x000E64DC
7217 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
7218 #define I40E_64BYTE_MSS 0x400000
7219 val = rd32(hw, I40E_REG_MSS);
7220 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
7221 val &= ~I40E_REG_MSS_MIN_MASK;
7222 val |= I40E_64BYTE_MSS;
7223 wr32(hw, I40E_REG_MSS, val);
7226 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
7228 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
7230 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
7231 i40e_stat_str(&pf->hw, ret),
7232 i40e_aq_str(&pf->hw,
7233 pf->hw.aq.asq_last_status));
7235 /* reinit the misc interrupt */
7236 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7237 ret = i40e_setup_misc_vector(pf);
7239 /* Add a filter to drop all Flow control frames from any VSI from being
7240 * transmitted. By doing so we stop a malicious VF from sending out
7241 * PAUSE or PFC frames and potentially controlling traffic for other
7243 * The FW can still send Flow control frames if enabled.
7245 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
7248 /* restart the VSIs that were rebuilt and running before the reset */
7249 i40e_pf_unquiesce_all_vsi(pf);
7251 if (pf->num_alloc_vfs) {
7252 for (v = 0; v < pf->num_alloc_vfs; v++)
7253 i40e_reset_vf(&pf->vf[v], true);
7256 /* tell the firmware that we're starting */
7257 i40e_send_version(pf);
7260 clear_bit(__I40E_RESET_FAILED, &pf->state);
7262 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7266 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7267 * @pf: board private structure
7269 * Close up the VFs and other things in prep for a Core Reset,
7270 * then get ready to rebuild the world.
7272 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7274 i40e_prep_for_reset(pf);
7275 i40e_reset_and_rebuild(pf, false);
7279 * i40e_handle_mdd_event
7280 * @pf: pointer to the PF structure
7282 * Called from the MDD irq handler to identify possibly malicious vfs
7284 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7286 struct i40e_hw *hw = &pf->hw;
7287 bool mdd_detected = false;
7288 bool pf_mdd_detected = false;
7293 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7296 /* find what triggered the MDD event */
7297 reg = rd32(hw, I40E_GL_MDET_TX);
7298 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7299 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7300 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7301 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7302 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7303 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7304 I40E_GL_MDET_TX_EVENT_SHIFT;
7305 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7306 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7307 pf->hw.func_caps.base_queue;
7308 if (netif_msg_tx_err(pf))
7309 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7310 event, queue, pf_num, vf_num);
7311 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7312 mdd_detected = true;
7314 reg = rd32(hw, I40E_GL_MDET_RX);
7315 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7316 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7317 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7318 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7319 I40E_GL_MDET_RX_EVENT_SHIFT;
7320 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7321 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7322 pf->hw.func_caps.base_queue;
7323 if (netif_msg_rx_err(pf))
7324 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7325 event, queue, func);
7326 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7327 mdd_detected = true;
7331 reg = rd32(hw, I40E_PF_MDET_TX);
7332 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7333 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7334 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7335 pf_mdd_detected = true;
7337 reg = rd32(hw, I40E_PF_MDET_RX);
7338 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7339 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7340 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7341 pf_mdd_detected = true;
7343 /* Queue belongs to the PF, initiate a reset */
7344 if (pf_mdd_detected) {
7345 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7346 i40e_service_event_schedule(pf);
7350 /* see if one of the VFs needs its hand slapped */
7351 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7353 reg = rd32(hw, I40E_VP_MDET_TX(i));
7354 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7355 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7356 vf->num_mdd_events++;
7357 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7361 reg = rd32(hw, I40E_VP_MDET_RX(i));
7362 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7363 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7364 vf->num_mdd_events++;
7365 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7369 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7370 dev_info(&pf->pdev->dev,
7371 "Too many MDD events on VF %d, disabled\n", i);
7372 dev_info(&pf->pdev->dev,
7373 "Use PF Control I/F to re-enable the VF\n");
7374 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7378 /* re-enable mdd interrupt cause */
7379 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7380 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7381 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7382 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7387 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7388 * @pf: board private structure
7390 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7392 struct i40e_hw *hw = &pf->hw;
7397 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7400 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7402 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7403 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7404 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7405 port = pf->udp_ports[i].index;
7407 ret = i40e_aq_add_udp_tunnel(hw, port,
7408 pf->udp_ports[i].type,
7411 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7414 dev_dbg(&pf->pdev->dev,
7415 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7416 pf->udp_ports[i].type ? "vxlan" : "geneve",
7417 port ? "add" : "delete",
7419 i40e_stat_str(&pf->hw, ret),
7420 i40e_aq_str(&pf->hw,
7421 pf->hw.aq.asq_last_status));
7422 pf->udp_ports[i].index = 0;
7429 * i40e_service_task - Run the driver's async subtasks
7430 * @work: pointer to work_struct containing our data
7432 static void i40e_service_task(struct work_struct *work)
7434 struct i40e_pf *pf = container_of(work,
7437 unsigned long start_time = jiffies;
7439 /* don't bother with service tasks if a reset is in progress */
7440 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7444 if (test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
7447 i40e_detect_recover_hung(pf);
7448 i40e_sync_filters_subtask(pf);
7449 i40e_reset_subtask(pf);
7450 i40e_handle_mdd_event(pf);
7451 i40e_vc_process_vflr_event(pf);
7452 i40e_watchdog_subtask(pf);
7453 i40e_fdir_reinit_subtask(pf);
7454 if (pf->flags & I40E_FLAG_CLIENT_RESET) {
7455 /* Client subtask will reopen next time through. */
7456 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], true);
7457 pf->flags &= ~I40E_FLAG_CLIENT_RESET;
7459 i40e_client_subtask(pf);
7460 if (pf->flags & I40E_FLAG_CLIENT_L2_CHANGE) {
7461 i40e_notify_client_of_l2_param_changes(
7462 pf->vsi[pf->lan_vsi]);
7463 pf->flags &= ~I40E_FLAG_CLIENT_L2_CHANGE;
7466 i40e_sync_filters_subtask(pf);
7467 i40e_sync_udp_filters_subtask(pf);
7468 i40e_clean_adminq_subtask(pf);
7470 /* flush memory to make sure state is correct before next watchdog */
7471 smp_mb__before_atomic();
7472 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7474 /* If the tasks have taken longer than one timer cycle or there
7475 * is more work to be done, reschedule the service task now
7476 * rather than wait for the timer to tick again.
7478 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7479 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7480 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7481 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7482 i40e_service_event_schedule(pf);
7486 * i40e_service_timer - timer callback
7487 * @data: pointer to PF struct
7489 static void i40e_service_timer(unsigned long data)
7491 struct i40e_pf *pf = (struct i40e_pf *)data;
7493 mod_timer(&pf->service_timer,
7494 round_jiffies(jiffies + pf->service_timer_period));
7495 i40e_service_event_schedule(pf);
7499 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7500 * @vsi: the VSI being configured
7502 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7504 struct i40e_pf *pf = vsi->back;
7506 switch (vsi->type) {
7508 vsi->alloc_queue_pairs = pf->num_lan_qps;
7509 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7510 I40E_REQ_DESCRIPTOR_MULTIPLE);
7511 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7512 vsi->num_q_vectors = pf->num_lan_msix;
7514 vsi->num_q_vectors = 1;
7519 vsi->alloc_queue_pairs = 1;
7520 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7521 I40E_REQ_DESCRIPTOR_MULTIPLE);
7522 vsi->num_q_vectors = pf->num_fdsb_msix;
7525 case I40E_VSI_VMDQ2:
7526 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7527 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7528 I40E_REQ_DESCRIPTOR_MULTIPLE);
7529 vsi->num_q_vectors = pf->num_vmdq_msix;
7532 case I40E_VSI_SRIOV:
7533 vsi->alloc_queue_pairs = pf->num_vf_qps;
7534 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7535 I40E_REQ_DESCRIPTOR_MULTIPLE);
7540 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7541 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7542 I40E_REQ_DESCRIPTOR_MULTIPLE);
7543 vsi->num_q_vectors = pf->num_fcoe_msix;
7546 #endif /* I40E_FCOE */
7556 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7557 * @type: VSI pointer
7558 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7560 * On error: returns error code (negative)
7561 * On success: returns 0
7563 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7568 /* allocate memory for both Tx and Rx ring pointers */
7569 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7570 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7573 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7575 if (alloc_qvectors) {
7576 /* allocate memory for q_vector pointers */
7577 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7578 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7579 if (!vsi->q_vectors) {
7587 kfree(vsi->tx_rings);
7592 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7593 * @pf: board private structure
7594 * @type: type of VSI
7596 * On error: returns error code (negative)
7597 * On success: returns vsi index in PF (positive)
7599 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7602 struct i40e_vsi *vsi;
7606 /* Need to protect the allocation of the VSIs at the PF level */
7607 mutex_lock(&pf->switch_mutex);
7609 /* VSI list may be fragmented if VSI creation/destruction has
7610 * been happening. We can afford to do a quick scan to look
7611 * for any free VSIs in the list.
7613 * find next empty vsi slot, looping back around if necessary
7616 while (i < pf->num_alloc_vsi && pf->vsi[i])
7618 if (i >= pf->num_alloc_vsi) {
7620 while (i < pf->next_vsi && pf->vsi[i])
7624 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7625 vsi_idx = i; /* Found one! */
7628 goto unlock_pf; /* out of VSI slots! */
7632 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7639 set_bit(__I40E_DOWN, &vsi->state);
7642 vsi->int_rate_limit = 0;
7643 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7644 pf->rss_table_size : 64;
7645 vsi->netdev_registered = false;
7646 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7647 hash_init(vsi->mac_filter_hash);
7648 vsi->irqs_ready = false;
7650 ret = i40e_set_num_rings_in_vsi(vsi);
7654 ret = i40e_vsi_alloc_arrays(vsi, true);
7658 /* Setup default MSIX irq handler for VSI */
7659 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7661 /* Initialize VSI lock */
7662 spin_lock_init(&vsi->mac_filter_hash_lock);
7663 pf->vsi[vsi_idx] = vsi;
7668 pf->next_vsi = i - 1;
7671 mutex_unlock(&pf->switch_mutex);
7676 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7677 * @type: VSI pointer
7678 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7680 * On error: returns error code (negative)
7681 * On success: returns 0
7683 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7685 /* free the ring and vector containers */
7686 if (free_qvectors) {
7687 kfree(vsi->q_vectors);
7688 vsi->q_vectors = NULL;
7690 kfree(vsi->tx_rings);
7691 vsi->tx_rings = NULL;
7692 vsi->rx_rings = NULL;
7696 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7698 * @vsi: Pointer to VSI structure
7700 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7705 kfree(vsi->rss_hkey_user);
7706 vsi->rss_hkey_user = NULL;
7708 kfree(vsi->rss_lut_user);
7709 vsi->rss_lut_user = NULL;
7713 * i40e_vsi_clear - Deallocate the VSI provided
7714 * @vsi: the VSI being un-configured
7716 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7727 mutex_lock(&pf->switch_mutex);
7728 if (!pf->vsi[vsi->idx]) {
7729 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7730 vsi->idx, vsi->idx, vsi, vsi->type);
7734 if (pf->vsi[vsi->idx] != vsi) {
7735 dev_err(&pf->pdev->dev,
7736 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7737 pf->vsi[vsi->idx]->idx,
7739 pf->vsi[vsi->idx]->type,
7740 vsi->idx, vsi, vsi->type);
7744 /* updates the PF for this cleared vsi */
7745 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7746 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7748 i40e_vsi_free_arrays(vsi, true);
7749 i40e_clear_rss_config_user(vsi);
7751 pf->vsi[vsi->idx] = NULL;
7752 if (vsi->idx < pf->next_vsi)
7753 pf->next_vsi = vsi->idx;
7756 mutex_unlock(&pf->switch_mutex);
7764 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7765 * @vsi: the VSI being cleaned
7767 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7771 if (vsi->tx_rings && vsi->tx_rings[0]) {
7772 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7773 kfree_rcu(vsi->tx_rings[i], rcu);
7774 vsi->tx_rings[i] = NULL;
7775 vsi->rx_rings[i] = NULL;
7781 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7782 * @vsi: the VSI being configured
7784 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7786 struct i40e_ring *tx_ring, *rx_ring;
7787 struct i40e_pf *pf = vsi->back;
7790 /* Set basic values in the rings to be used later during open() */
7791 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7792 /* allocate space for both Tx and Rx in one shot */
7793 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7797 tx_ring->queue_index = i;
7798 tx_ring->reg_idx = vsi->base_queue + i;
7799 tx_ring->ring_active = false;
7801 tx_ring->netdev = vsi->netdev;
7802 tx_ring->dev = &pf->pdev->dev;
7803 tx_ring->count = vsi->num_desc;
7805 tx_ring->dcb_tc = 0;
7806 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7807 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7808 tx_ring->tx_itr_setting = pf->tx_itr_default;
7809 vsi->tx_rings[i] = tx_ring;
7811 rx_ring = &tx_ring[1];
7812 rx_ring->queue_index = i;
7813 rx_ring->reg_idx = vsi->base_queue + i;
7814 rx_ring->ring_active = false;
7816 rx_ring->netdev = vsi->netdev;
7817 rx_ring->dev = &pf->pdev->dev;
7818 rx_ring->count = vsi->num_desc;
7820 rx_ring->dcb_tc = 0;
7821 rx_ring->rx_itr_setting = pf->rx_itr_default;
7822 vsi->rx_rings[i] = rx_ring;
7828 i40e_vsi_clear_rings(vsi);
7833 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7834 * @pf: board private structure
7835 * @vectors: the number of MSI-X vectors to request
7837 * Returns the number of vectors reserved, or error
7839 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7841 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7842 I40E_MIN_MSIX, vectors);
7844 dev_info(&pf->pdev->dev,
7845 "MSI-X vector reservation failed: %d\n", vectors);
7853 * i40e_init_msix - Setup the MSIX capability
7854 * @pf: board private structure
7856 * Work with the OS to set up the MSIX vectors needed.
7858 * Returns the number of vectors reserved or negative on failure
7860 static int i40e_init_msix(struct i40e_pf *pf)
7862 struct i40e_hw *hw = &pf->hw;
7863 int cpus, extra_vectors;
7867 int iwarp_requested = 0;
7869 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7872 /* The number of vectors we'll request will be comprised of:
7873 * - Add 1 for "other" cause for Admin Queue events, etc.
7874 * - The number of LAN queue pairs
7875 * - Queues being used for RSS.
7876 * We don't need as many as max_rss_size vectors.
7877 * use rss_size instead in the calculation since that
7878 * is governed by number of cpus in the system.
7879 * - assumes symmetric Tx/Rx pairing
7880 * - The number of VMDq pairs
7881 * - The CPU count within the NUMA node if iWARP is enabled
7883 * - The number of FCOE qps.
7885 * Once we count this up, try the request.
7887 * If we can't get what we want, we'll simplify to nearly nothing
7888 * and try again. If that still fails, we punt.
7890 vectors_left = hw->func_caps.num_msix_vectors;
7893 /* reserve one vector for miscellaneous handler */
7899 /* reserve some vectors for the main PF traffic queues. Initially we
7900 * only reserve at most 50% of the available vectors, in the case that
7901 * the number of online CPUs is large. This ensures that we can enable
7902 * extra features as well. Once we've enabled the other features, we
7903 * will use any remaining vectors to reach as close as we can to the
7904 * number of online CPUs.
7906 cpus = num_online_cpus();
7907 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
7908 vectors_left -= pf->num_lan_msix;
7910 /* reserve one vector for sideband flow director */
7911 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7913 pf->num_fdsb_msix = 1;
7917 pf->num_fdsb_msix = 0;
7922 /* can we reserve enough for FCoE? */
7923 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7925 pf->num_fcoe_msix = 0;
7926 else if (vectors_left >= pf->num_fcoe_qps)
7927 pf->num_fcoe_msix = pf->num_fcoe_qps;
7929 pf->num_fcoe_msix = 1;
7930 v_budget += pf->num_fcoe_msix;
7931 vectors_left -= pf->num_fcoe_msix;
7935 /* can we reserve enough for iWARP? */
7936 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7937 iwarp_requested = pf->num_iwarp_msix;
7940 pf->num_iwarp_msix = 0;
7941 else if (vectors_left < pf->num_iwarp_msix)
7942 pf->num_iwarp_msix = 1;
7943 v_budget += pf->num_iwarp_msix;
7944 vectors_left -= pf->num_iwarp_msix;
7947 /* any vectors left over go for VMDq support */
7948 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7949 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7950 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7952 if (!vectors_left) {
7953 pf->num_vmdq_msix = 0;
7954 pf->num_vmdq_qps = 0;
7956 /* if we're short on vectors for what's desired, we limit
7957 * the queues per vmdq. If this is still more than are
7958 * available, the user will need to change the number of
7959 * queues/vectors used by the PF later with the ethtool
7962 if (vmdq_vecs < vmdq_vecs_wanted)
7963 pf->num_vmdq_qps = 1;
7964 pf->num_vmdq_msix = pf->num_vmdq_qps;
7966 v_budget += vmdq_vecs;
7967 vectors_left -= vmdq_vecs;
7971 /* On systems with a large number of SMP cores, we previously limited
7972 * the number of vectors for num_lan_msix to be at most 50% of the
7973 * available vectors, to allow for other features. Now, we add back
7974 * the remaining vectors. However, we ensure that the total
7975 * num_lan_msix will not exceed num_online_cpus(). To do this, we
7976 * calculate the number of vectors we can add without going over the
7977 * cap of CPUs. For systems with a small number of CPUs this will be
7980 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
7981 pf->num_lan_msix += extra_vectors;
7982 vectors_left -= extra_vectors;
7984 WARN(vectors_left < 0,
7985 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
7987 v_budget += pf->num_lan_msix;
7988 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7990 if (!pf->msix_entries)
7993 for (i = 0; i < v_budget; i++)
7994 pf->msix_entries[i].entry = i;
7995 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7997 if (v_actual < I40E_MIN_MSIX) {
7998 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7999 kfree(pf->msix_entries);
8000 pf->msix_entries = NULL;
8001 pci_disable_msix(pf->pdev);
8004 } else if (v_actual == I40E_MIN_MSIX) {
8005 /* Adjust for minimal MSIX use */
8006 pf->num_vmdq_vsis = 0;
8007 pf->num_vmdq_qps = 0;
8008 pf->num_lan_qps = 1;
8009 pf->num_lan_msix = 1;
8011 } else if (!vectors_left) {
8012 /* If we have limited resources, we will start with no vectors
8013 * for the special features and then allocate vectors to some
8014 * of these features based on the policy and at the end disable
8015 * the features that did not get any vectors.
8019 dev_info(&pf->pdev->dev,
8020 "MSI-X vector limit reached, attempting to redistribute vectors\n");
8021 /* reserve the misc vector */
8024 /* Scale vector usage down */
8025 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
8026 pf->num_vmdq_vsis = 1;
8027 pf->num_vmdq_qps = 1;
8029 pf->num_fcoe_qps = 0;
8030 pf->num_fcoe_msix = 0;
8033 /* partition out the remaining vectors */
8036 pf->num_lan_msix = 1;
8039 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
8040 pf->num_lan_msix = 1;
8041 pf->num_iwarp_msix = 1;
8043 pf->num_lan_msix = 2;
8046 /* give one vector to FCoE */
8047 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8048 pf->num_lan_msix = 1;
8049 pf->num_fcoe_msix = 1;
8054 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
8055 pf->num_iwarp_msix = min_t(int, (vec / 3),
8057 pf->num_vmdq_vsis = min_t(int, (vec / 3),
8058 I40E_DEFAULT_NUM_VMDQ_VSI);
8060 pf->num_vmdq_vsis = min_t(int, (vec / 2),
8061 I40E_DEFAULT_NUM_VMDQ_VSI);
8063 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8064 pf->num_fdsb_msix = 1;
8067 pf->num_lan_msix = min_t(int,
8068 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
8070 pf->num_lan_qps = pf->num_lan_msix;
8072 /* give one vector to FCoE */
8073 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8074 pf->num_fcoe_msix = 1;
8082 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8083 (pf->num_fdsb_msix == 0)) {
8084 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
8085 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8087 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8088 (pf->num_vmdq_msix == 0)) {
8089 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
8090 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
8093 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
8094 (pf->num_iwarp_msix == 0)) {
8095 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
8096 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
8100 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
8101 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
8102 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
8105 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
8106 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
8108 pf->num_vmdq_msix * pf->num_vmdq_vsis,
8110 pf->num_iwarp_msix);
8116 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
8117 * @vsi: the VSI being configured
8118 * @v_idx: index of the vector in the vsi struct
8119 * @cpu: cpu to be used on affinity_mask
8121 * We allocate one q_vector. If allocation fails we return -ENOMEM.
8123 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
8125 struct i40e_q_vector *q_vector;
8127 /* allocate q_vector */
8128 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
8132 q_vector->vsi = vsi;
8133 q_vector->v_idx = v_idx;
8134 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
8137 netif_napi_add(vsi->netdev, &q_vector->napi,
8138 i40e_napi_poll, NAPI_POLL_WEIGHT);
8140 q_vector->rx.latency_range = I40E_LOW_LATENCY;
8141 q_vector->tx.latency_range = I40E_LOW_LATENCY;
8143 /* tie q_vector and vsi together */
8144 vsi->q_vectors[v_idx] = q_vector;
8150 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
8151 * @vsi: the VSI being configured
8153 * We allocate one q_vector per queue interrupt. If allocation fails we
8156 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
8158 struct i40e_pf *pf = vsi->back;
8159 int err, v_idx, num_q_vectors, current_cpu;
8161 /* if not MSIX, give the one vector only to the LAN VSI */
8162 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
8163 num_q_vectors = vsi->num_q_vectors;
8164 else if (vsi == pf->vsi[pf->lan_vsi])
8169 current_cpu = cpumask_first(cpu_online_mask);
8171 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
8172 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
8175 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
8176 if (unlikely(current_cpu >= nr_cpu_ids))
8177 current_cpu = cpumask_first(cpu_online_mask);
8184 i40e_free_q_vector(vsi, v_idx);
8190 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
8191 * @pf: board private structure to initialize
8193 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
8198 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8199 vectors = i40e_init_msix(pf);
8201 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
8202 I40E_FLAG_IWARP_ENABLED |
8204 I40E_FLAG_FCOE_ENABLED |
8206 I40E_FLAG_RSS_ENABLED |
8207 I40E_FLAG_DCB_CAPABLE |
8208 I40E_FLAG_DCB_ENABLED |
8209 I40E_FLAG_SRIOV_ENABLED |
8210 I40E_FLAG_FD_SB_ENABLED |
8211 I40E_FLAG_FD_ATR_ENABLED |
8212 I40E_FLAG_VMDQ_ENABLED);
8214 /* rework the queue expectations without MSIX */
8215 i40e_determine_queue_usage(pf);
8219 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8220 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
8221 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
8222 vectors = pci_enable_msi(pf->pdev);
8224 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
8226 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
8228 vectors = 1; /* one MSI or Legacy vector */
8231 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
8232 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
8234 /* set up vector assignment tracking */
8235 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
8236 pf->irq_pile = kzalloc(size, GFP_KERNEL);
8237 if (!pf->irq_pile) {
8238 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
8241 pf->irq_pile->num_entries = vectors;
8242 pf->irq_pile->search_hint = 0;
8244 /* track first vector for misc interrupts, ignore return */
8245 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
8251 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
8252 * @pf: board private structure
8254 * This sets up the handler for MSIX 0, which is used to manage the
8255 * non-queue interrupts, e.g. AdminQ and errors. This is not used
8256 * when in MSI or Legacy interrupt mode.
8258 static int i40e_setup_misc_vector(struct i40e_pf *pf)
8260 struct i40e_hw *hw = &pf->hw;
8263 /* Only request the irq if this is the first time through, and
8264 * not when we're rebuilding after a Reset
8266 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
8267 err = request_irq(pf->msix_entries[0].vector,
8268 i40e_intr, 0, pf->int_name, pf);
8270 dev_info(&pf->pdev->dev,
8271 "request_irq for %s failed: %d\n",
8277 i40e_enable_misc_int_causes(pf);
8279 /* associate no queues to the misc vector */
8280 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
8281 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
8285 i40e_irq_dynamic_enable_icr0(pf, true);
8291 * i40e_config_rss_aq - Prepare for RSS using AQ commands
8292 * @vsi: vsi structure
8293 * @seed: RSS hash seed
8295 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8296 u8 *lut, u16 lut_size)
8298 struct i40e_pf *pf = vsi->back;
8299 struct i40e_hw *hw = &pf->hw;
8303 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8304 (struct i40e_aqc_get_set_rss_key_data *)seed;
8305 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8307 dev_info(&pf->pdev->dev,
8308 "Cannot set RSS key, err %s aq_err %s\n",
8309 i40e_stat_str(hw, ret),
8310 i40e_aq_str(hw, hw->aq.asq_last_status));
8315 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8317 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8319 dev_info(&pf->pdev->dev,
8320 "Cannot set RSS lut, err %s aq_err %s\n",
8321 i40e_stat_str(hw, ret),
8322 i40e_aq_str(hw, hw->aq.asq_last_status));
8330 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8331 * @vsi: Pointer to vsi structure
8332 * @seed: Buffter to store the hash keys
8333 * @lut: Buffer to store the lookup table entries
8334 * @lut_size: Size of buffer to store the lookup table entries
8336 * Return 0 on success, negative on failure
8338 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8339 u8 *lut, u16 lut_size)
8341 struct i40e_pf *pf = vsi->back;
8342 struct i40e_hw *hw = &pf->hw;
8346 ret = i40e_aq_get_rss_key(hw, vsi->id,
8347 (struct i40e_aqc_get_set_rss_key_data *)seed);
8349 dev_info(&pf->pdev->dev,
8350 "Cannot get RSS key, err %s aq_err %s\n",
8351 i40e_stat_str(&pf->hw, ret),
8352 i40e_aq_str(&pf->hw,
8353 pf->hw.aq.asq_last_status));
8359 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8361 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8363 dev_info(&pf->pdev->dev,
8364 "Cannot get RSS lut, err %s aq_err %s\n",
8365 i40e_stat_str(&pf->hw, ret),
8366 i40e_aq_str(&pf->hw,
8367 pf->hw.aq.asq_last_status));
8376 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8377 * @vsi: VSI structure
8379 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8381 u8 seed[I40E_HKEY_ARRAY_SIZE];
8382 struct i40e_pf *pf = vsi->back;
8386 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8390 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8391 vsi->num_queue_pairs);
8395 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8398 /* Use the user configured hash keys and lookup table if there is one,
8399 * otherwise use default
8401 if (vsi->rss_lut_user)
8402 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8404 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8405 if (vsi->rss_hkey_user)
8406 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8408 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8409 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8416 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8417 * @vsi: Pointer to vsi structure
8418 * @seed: RSS hash seed
8419 * @lut: Lookup table
8420 * @lut_size: Lookup table size
8422 * Returns 0 on success, negative on failure
8424 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8425 const u8 *lut, u16 lut_size)
8427 struct i40e_pf *pf = vsi->back;
8428 struct i40e_hw *hw = &pf->hw;
8429 u16 vf_id = vsi->vf_id;
8432 /* Fill out hash function seed */
8434 u32 *seed_dw = (u32 *)seed;
8436 if (vsi->type == I40E_VSI_MAIN) {
8437 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8438 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8439 } else if (vsi->type == I40E_VSI_SRIOV) {
8440 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8441 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
8443 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8448 u32 *lut_dw = (u32 *)lut;
8450 if (vsi->type == I40E_VSI_MAIN) {
8451 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8453 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8454 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8455 } else if (vsi->type == I40E_VSI_SRIOV) {
8456 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8458 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8459 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
8461 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8470 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8471 * @vsi: Pointer to VSI structure
8472 * @seed: Buffer to store the keys
8473 * @lut: Buffer to store the lookup table entries
8474 * @lut_size: Size of buffer to store the lookup table entries
8476 * Returns 0 on success, negative on failure
8478 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8479 u8 *lut, u16 lut_size)
8481 struct i40e_pf *pf = vsi->back;
8482 struct i40e_hw *hw = &pf->hw;
8486 u32 *seed_dw = (u32 *)seed;
8488 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8489 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8492 u32 *lut_dw = (u32 *)lut;
8494 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8496 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8497 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8504 * i40e_config_rss - Configure RSS keys and lut
8505 * @vsi: Pointer to VSI structure
8506 * @seed: RSS hash seed
8507 * @lut: Lookup table
8508 * @lut_size: Lookup table size
8510 * Returns 0 on success, negative on failure
8512 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8514 struct i40e_pf *pf = vsi->back;
8516 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8517 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8519 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8523 * i40e_get_rss - Get RSS keys and lut
8524 * @vsi: Pointer to VSI structure
8525 * @seed: Buffer to store the keys
8526 * @lut: Buffer to store the lookup table entries
8527 * lut_size: Size of buffer to store the lookup table entries
8529 * Returns 0 on success, negative on failure
8531 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8533 struct i40e_pf *pf = vsi->back;
8535 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8536 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8538 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8542 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8543 * @pf: Pointer to board private structure
8544 * @lut: Lookup table
8545 * @rss_table_size: Lookup table size
8546 * @rss_size: Range of queue number for hashing
8548 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8549 u16 rss_table_size, u16 rss_size)
8553 for (i = 0; i < rss_table_size; i++)
8554 lut[i] = i % rss_size;
8558 * i40e_pf_config_rss - Prepare for RSS if used
8559 * @pf: board private structure
8561 static int i40e_pf_config_rss(struct i40e_pf *pf)
8563 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8564 u8 seed[I40E_HKEY_ARRAY_SIZE];
8566 struct i40e_hw *hw = &pf->hw;
8571 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8572 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8573 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8574 hena |= i40e_pf_get_default_rss_hena(pf);
8576 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8577 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8579 /* Determine the RSS table size based on the hardware capabilities */
8580 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8581 reg_val = (pf->rss_table_size == 512) ?
8582 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8583 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8584 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8586 /* Determine the RSS size of the VSI */
8588 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8589 vsi->num_queue_pairs);
8593 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8597 /* Use user configured lut if there is one, otherwise use default */
8598 if (vsi->rss_lut_user)
8599 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8601 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8603 /* Use user configured hash key if there is one, otherwise
8606 if (vsi->rss_hkey_user)
8607 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8609 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8610 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8617 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8618 * @pf: board private structure
8619 * @queue_count: the requested queue count for rss.
8621 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8622 * count which may be different from the requested queue count.
8624 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8626 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8629 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8632 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8634 if (queue_count != vsi->num_queue_pairs) {
8635 vsi->req_queue_pairs = queue_count;
8636 i40e_prep_for_reset(pf);
8638 pf->alloc_rss_size = new_rss_size;
8640 i40e_reset_and_rebuild(pf, true);
8642 /* Discard the user configured hash keys and lut, if less
8643 * queues are enabled.
8645 if (queue_count < vsi->rss_size) {
8646 i40e_clear_rss_config_user(vsi);
8647 dev_dbg(&pf->pdev->dev,
8648 "discard user configured hash keys and lut\n");
8651 /* Reset vsi->rss_size, as number of enabled queues changed */
8652 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8653 vsi->num_queue_pairs);
8655 i40e_pf_config_rss(pf);
8657 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
8658 vsi->req_queue_pairs, pf->rss_size_max);
8659 return pf->alloc_rss_size;
8663 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8664 * @pf: board private structure
8666 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8669 bool min_valid, max_valid;
8672 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8673 &min_valid, &max_valid);
8677 pf->npar_min_bw = min_bw;
8679 pf->npar_max_bw = max_bw;
8686 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8687 * @pf: board private structure
8689 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8691 struct i40e_aqc_configure_partition_bw_data bw_data;
8694 /* Set the valid bit for this PF */
8695 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8696 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8697 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8699 /* Set the new bandwidths */
8700 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8706 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8707 * @pf: board private structure
8709 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8711 /* Commit temporary BW setting to permanent NVM image */
8712 enum i40e_admin_queue_err last_aq_status;
8716 if (pf->hw.partition_id != 1) {
8717 dev_info(&pf->pdev->dev,
8718 "Commit BW only works on partition 1! This is partition %d",
8719 pf->hw.partition_id);
8720 ret = I40E_NOT_SUPPORTED;
8724 /* Acquire NVM for read access */
8725 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8726 last_aq_status = pf->hw.aq.asq_last_status;
8728 dev_info(&pf->pdev->dev,
8729 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8730 i40e_stat_str(&pf->hw, ret),
8731 i40e_aq_str(&pf->hw, last_aq_status));
8735 /* Read word 0x10 of NVM - SW compatibility word 1 */
8736 ret = i40e_aq_read_nvm(&pf->hw,
8737 I40E_SR_NVM_CONTROL_WORD,
8738 0x10, sizeof(nvm_word), &nvm_word,
8740 /* Save off last admin queue command status before releasing
8743 last_aq_status = pf->hw.aq.asq_last_status;
8744 i40e_release_nvm(&pf->hw);
8746 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8747 i40e_stat_str(&pf->hw, ret),
8748 i40e_aq_str(&pf->hw, last_aq_status));
8752 /* Wait a bit for NVM release to complete */
8755 /* Acquire NVM for write access */
8756 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8757 last_aq_status = pf->hw.aq.asq_last_status;
8759 dev_info(&pf->pdev->dev,
8760 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8761 i40e_stat_str(&pf->hw, ret),
8762 i40e_aq_str(&pf->hw, last_aq_status));
8765 /* Write it back out unchanged to initiate update NVM,
8766 * which will force a write of the shadow (alt) RAM to
8767 * the NVM - thus storing the bandwidth values permanently.
8769 ret = i40e_aq_update_nvm(&pf->hw,
8770 I40E_SR_NVM_CONTROL_WORD,
8771 0x10, sizeof(nvm_word),
8772 &nvm_word, true, NULL);
8773 /* Save off last admin queue command status before releasing
8776 last_aq_status = pf->hw.aq.asq_last_status;
8777 i40e_release_nvm(&pf->hw);
8779 dev_info(&pf->pdev->dev,
8780 "BW settings NOT SAVED, err %s aq_err %s\n",
8781 i40e_stat_str(&pf->hw, ret),
8782 i40e_aq_str(&pf->hw, last_aq_status));
8789 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8790 * @pf: board private structure to initialize
8792 * i40e_sw_init initializes the Adapter private data structure.
8793 * Fields are initialized based on PCI device information and
8794 * OS network device settings (MTU size).
8796 static int i40e_sw_init(struct i40e_pf *pf)
8801 /* Set default capability flags */
8802 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8803 I40E_FLAG_MSI_ENABLED |
8804 I40E_FLAG_MSIX_ENABLED;
8806 /* Set default ITR */
8807 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8808 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8810 /* Depending on PF configurations, it is possible that the RSS
8811 * maximum might end up larger than the available queues
8813 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8814 pf->alloc_rss_size = 1;
8815 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8816 pf->rss_size_max = min_t(int, pf->rss_size_max,
8817 pf->hw.func_caps.num_tx_qp);
8818 if (pf->hw.func_caps.rss) {
8819 pf->flags |= I40E_FLAG_RSS_ENABLED;
8820 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8824 /* MFP mode enabled */
8825 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8826 pf->flags |= I40E_FLAG_MFP_ENABLED;
8827 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8828 if (i40e_get_npar_bw_setting(pf))
8829 dev_warn(&pf->pdev->dev,
8830 "Could not get NPAR bw settings\n");
8832 dev_info(&pf->pdev->dev,
8833 "Min BW = %8.8x, Max BW = %8.8x\n",
8834 pf->npar_min_bw, pf->npar_max_bw);
8837 /* FW/NVM is not yet fixed in this regard */
8838 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8839 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8840 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8841 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8842 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8843 pf->hw.num_partitions > 1)
8844 dev_info(&pf->pdev->dev,
8845 "Flow Director Sideband mode Disabled in MFP mode\n");
8847 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8848 pf->fdir_pf_filter_count =
8849 pf->hw.func_caps.fd_filters_guaranteed;
8850 pf->hw.fdir_shared_filter_count =
8851 pf->hw.func_caps.fd_filters_best_effort;
8854 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8855 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8856 (pf->hw.aq.fw_maj_ver < 4))) {
8857 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8858 /* No DCB support for FW < v4.33 */
8859 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8862 /* Disable FW LLDP if FW < v4.3 */
8863 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8864 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8865 (pf->hw.aq.fw_maj_ver < 4)))
8866 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8868 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8869 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
8870 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8871 (pf->hw.aq.fw_maj_ver >= 5)))
8872 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8874 if (pf->hw.func_caps.vmdq) {
8875 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8876 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8877 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8880 if (pf->hw.func_caps.iwarp) {
8881 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8882 /* IWARP needs one extra vector for CQP just like MISC.*/
8883 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8887 i40e_init_pf_fcoe(pf);
8889 #endif /* I40E_FCOE */
8890 #ifdef CONFIG_PCI_IOV
8891 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8892 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8893 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8894 pf->num_req_vfs = min_t(int,
8895 pf->hw.func_caps.num_vfs,
8898 #endif /* CONFIG_PCI_IOV */
8899 if (pf->hw.mac.type == I40E_MAC_X722) {
8900 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE
8901 | I40E_FLAG_128_QP_RSS_CAPABLE
8902 | I40E_FLAG_HW_ATR_EVICT_CAPABLE
8903 | I40E_FLAG_OUTER_UDP_CSUM_CAPABLE
8904 | I40E_FLAG_WB_ON_ITR_CAPABLE
8905 | I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE
8906 | I40E_FLAG_NO_PCI_LINK_CHECK
8907 | I40E_FLAG_USE_SET_LLDP_MIB
8908 | I40E_FLAG_GENEVE_OFFLOAD_CAPABLE
8909 | I40E_FLAG_PTP_L4_CAPABLE
8910 | I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE;
8911 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8912 ((pf->hw.aq.api_maj_ver == 1) &&
8913 (pf->hw.aq.api_min_ver > 4))) {
8914 /* Supported in FW API version higher than 1.4 */
8915 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8916 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8918 pf->hw_disabled_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8921 pf->eeprom_version = 0xDEAD;
8922 pf->lan_veb = I40E_NO_VEB;
8923 pf->lan_vsi = I40E_NO_VSI;
8925 /* By default FW has this off for performance reasons */
8926 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8928 /* set up queue assignment tracking */
8929 size = sizeof(struct i40e_lump_tracking)
8930 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8931 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8936 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8937 pf->qp_pile->search_hint = 0;
8939 pf->tx_timeout_recovery_level = 1;
8941 mutex_init(&pf->switch_mutex);
8943 /* If NPAR is enabled nudge the Tx scheduler */
8944 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8945 i40e_set_npar_bw_setting(pf);
8952 * i40e_set_ntuple - set the ntuple feature flag and take action
8953 * @pf: board private structure to initialize
8954 * @features: the feature set that the stack is suggesting
8956 * returns a bool to indicate if reset needs to happen
8958 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8960 bool need_reset = false;
8962 /* Check if Flow Director n-tuple support was enabled or disabled. If
8963 * the state changed, we need to reset.
8965 if (features & NETIF_F_NTUPLE) {
8966 /* Enable filters and mark for reset */
8967 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8969 /* enable FD_SB only if there is MSI-X vector */
8970 if (pf->num_fdsb_msix > 0)
8971 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8973 /* turn off filters, mark for reset and clear SW filter list */
8974 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8976 i40e_fdir_filter_exit(pf);
8978 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8979 pf->hw_disabled_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8980 /* reset fd counters */
8983 /* if ATR was auto disabled it can be re-enabled. */
8984 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8985 (pf->hw_disabled_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8986 pf->hw_disabled_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8987 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8988 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8995 * i40e_clear_rss_lut - clear the rx hash lookup table
8996 * @vsi: the VSI being configured
8998 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
9000 struct i40e_pf *pf = vsi->back;
9001 struct i40e_hw *hw = &pf->hw;
9002 u16 vf_id = vsi->vf_id;
9005 if (vsi->type == I40E_VSI_MAIN) {
9006 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
9007 wr32(hw, I40E_PFQF_HLUT(i), 0);
9008 } else if (vsi->type == I40E_VSI_SRIOV) {
9009 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
9010 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
9012 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
9017 * i40e_set_features - set the netdev feature flags
9018 * @netdev: ptr to the netdev being adjusted
9019 * @features: the feature set that the stack is suggesting
9021 static int i40e_set_features(struct net_device *netdev,
9022 netdev_features_t features)
9024 struct i40e_netdev_priv *np = netdev_priv(netdev);
9025 struct i40e_vsi *vsi = np->vsi;
9026 struct i40e_pf *pf = vsi->back;
9029 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
9030 i40e_pf_config_rss(pf);
9031 else if (!(features & NETIF_F_RXHASH) &&
9032 netdev->features & NETIF_F_RXHASH)
9033 i40e_clear_rss_lut(vsi);
9035 if (features & NETIF_F_HW_VLAN_CTAG_RX)
9036 i40e_vlan_stripping_enable(vsi);
9038 i40e_vlan_stripping_disable(vsi);
9040 need_reset = i40e_set_ntuple(pf, features);
9043 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9049 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
9050 * @pf: board private structure
9051 * @port: The UDP port to look up
9053 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
9055 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
9059 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
9060 if (pf->udp_ports[i].index == port)
9068 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
9069 * @netdev: This physical port's netdev
9070 * @ti: Tunnel endpoint information
9072 static void i40e_udp_tunnel_add(struct net_device *netdev,
9073 struct udp_tunnel_info *ti)
9075 struct i40e_netdev_priv *np = netdev_priv(netdev);
9076 struct i40e_vsi *vsi = np->vsi;
9077 struct i40e_pf *pf = vsi->back;
9078 u16 port = ntohs(ti->port);
9082 idx = i40e_get_udp_port_idx(pf, port);
9084 /* Check if port already exists */
9085 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
9086 netdev_info(netdev, "port %d already offloaded\n", port);
9090 /* Now check if there is space to add the new port */
9091 next_idx = i40e_get_udp_port_idx(pf, 0);
9093 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
9094 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
9100 case UDP_TUNNEL_TYPE_VXLAN:
9101 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
9103 case UDP_TUNNEL_TYPE_GENEVE:
9104 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
9106 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
9112 /* New port: add it and mark its index in the bitmap */
9113 pf->udp_ports[next_idx].index = port;
9114 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
9115 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9119 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
9120 * @netdev: This physical port's netdev
9121 * @ti: Tunnel endpoint information
9123 static void i40e_udp_tunnel_del(struct net_device *netdev,
9124 struct udp_tunnel_info *ti)
9126 struct i40e_netdev_priv *np = netdev_priv(netdev);
9127 struct i40e_vsi *vsi = np->vsi;
9128 struct i40e_pf *pf = vsi->back;
9129 u16 port = ntohs(ti->port);
9132 idx = i40e_get_udp_port_idx(pf, port);
9134 /* Check if port already exists */
9135 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
9139 case UDP_TUNNEL_TYPE_VXLAN:
9140 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
9143 case UDP_TUNNEL_TYPE_GENEVE:
9144 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
9151 /* if port exists, set it to 0 (mark for deletion)
9152 * and make it pending
9154 pf->udp_ports[idx].index = 0;
9155 pf->pending_udp_bitmap |= BIT_ULL(idx);
9156 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
9160 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
9164 static int i40e_get_phys_port_id(struct net_device *netdev,
9165 struct netdev_phys_item_id *ppid)
9167 struct i40e_netdev_priv *np = netdev_priv(netdev);
9168 struct i40e_pf *pf = np->vsi->back;
9169 struct i40e_hw *hw = &pf->hw;
9171 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
9174 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
9175 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
9181 * i40e_ndo_fdb_add - add an entry to the hardware database
9182 * @ndm: the input from the stack
9183 * @tb: pointer to array of nladdr (unused)
9184 * @dev: the net device pointer
9185 * @addr: the MAC address entry being added
9186 * @flags: instructions from stack about fdb operation
9188 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9189 struct net_device *dev,
9190 const unsigned char *addr, u16 vid,
9193 struct i40e_netdev_priv *np = netdev_priv(dev);
9194 struct i40e_pf *pf = np->vsi->back;
9197 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
9201 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
9205 /* Hardware does not support aging addresses so if a
9206 * ndm_state is given only allow permanent addresses
9208 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
9209 netdev_info(dev, "FDB only supports static addresses\n");
9213 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
9214 err = dev_uc_add_excl(dev, addr);
9215 else if (is_multicast_ether_addr(addr))
9216 err = dev_mc_add_excl(dev, addr);
9220 /* Only return duplicate errors if NLM_F_EXCL is set */
9221 if (err == -EEXIST && !(flags & NLM_F_EXCL))
9228 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
9229 * @dev: the netdev being configured
9230 * @nlh: RTNL message
9232 * Inserts a new hardware bridge if not already created and
9233 * enables the bridging mode requested (VEB or VEPA). If the
9234 * hardware bridge has already been inserted and the request
9235 * is to change the mode then that requires a PF reset to
9236 * allow rebuild of the components with required hardware
9237 * bridge mode enabled.
9239 static int i40e_ndo_bridge_setlink(struct net_device *dev,
9240 struct nlmsghdr *nlh,
9243 struct i40e_netdev_priv *np = netdev_priv(dev);
9244 struct i40e_vsi *vsi = np->vsi;
9245 struct i40e_pf *pf = vsi->back;
9246 struct i40e_veb *veb = NULL;
9247 struct nlattr *attr, *br_spec;
9250 /* Only for PF VSI for now */
9251 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9254 /* Find the HW bridge for PF VSI */
9255 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9256 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9260 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9262 nla_for_each_nested(attr, br_spec, rem) {
9265 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9268 mode = nla_get_u16(attr);
9269 if ((mode != BRIDGE_MODE_VEPA) &&
9270 (mode != BRIDGE_MODE_VEB))
9273 /* Insert a new HW bridge */
9275 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9276 vsi->tc_config.enabled_tc);
9278 veb->bridge_mode = mode;
9279 i40e_config_bridge_mode(veb);
9281 /* No Bridge HW offload available */
9285 } else if (mode != veb->bridge_mode) {
9286 /* Existing HW bridge but different mode needs reset */
9287 veb->bridge_mode = mode;
9288 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9289 if (mode == BRIDGE_MODE_VEB)
9290 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9292 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9293 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9302 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9305 * @seq: RTNL message seq #
9306 * @dev: the netdev being configured
9307 * @filter_mask: unused
9308 * @nlflags: netlink flags passed in
9310 * Return the mode in which the hardware bridge is operating in
9313 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9314 struct net_device *dev,
9315 u32 __always_unused filter_mask,
9318 struct i40e_netdev_priv *np = netdev_priv(dev);
9319 struct i40e_vsi *vsi = np->vsi;
9320 struct i40e_pf *pf = vsi->back;
9321 struct i40e_veb *veb = NULL;
9324 /* Only for PF VSI for now */
9325 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9328 /* Find the HW bridge for the PF VSI */
9329 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9330 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9337 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9338 0, 0, nlflags, filter_mask, NULL);
9342 * i40e_features_check - Validate encapsulated packet conforms to limits
9344 * @dev: This physical port's netdev
9345 * @features: Offload features that the stack believes apply
9347 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9348 struct net_device *dev,
9349 netdev_features_t features)
9353 /* No point in doing any of this if neither checksum nor GSO are
9354 * being requested for this frame. We can rule out both by just
9355 * checking for CHECKSUM_PARTIAL
9357 if (skb->ip_summed != CHECKSUM_PARTIAL)
9360 /* We cannot support GSO if the MSS is going to be less than
9361 * 64 bytes. If it is then we need to drop support for GSO.
9363 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
9364 features &= ~NETIF_F_GSO_MASK;
9366 /* MACLEN can support at most 63 words */
9367 len = skb_network_header(skb) - skb->data;
9368 if (len & ~(63 * 2))
9371 /* IPLEN and EIPLEN can support at most 127 dwords */
9372 len = skb_transport_header(skb) - skb_network_header(skb);
9373 if (len & ~(127 * 4))
9376 if (skb->encapsulation) {
9377 /* L4TUNLEN can support 127 words */
9378 len = skb_inner_network_header(skb) - skb_transport_header(skb);
9379 if (len & ~(127 * 2))
9382 /* IPLEN can support at most 127 dwords */
9383 len = skb_inner_transport_header(skb) -
9384 skb_inner_network_header(skb);
9385 if (len & ~(127 * 4))
9389 /* No need to validate L4LEN as TCP is the only protocol with a
9390 * a flexible value and we support all possible values supported
9391 * by TCP, which is at most 15 dwords
9396 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9399 static const struct net_device_ops i40e_netdev_ops = {
9400 .ndo_open = i40e_open,
9401 .ndo_stop = i40e_close,
9402 .ndo_start_xmit = i40e_lan_xmit_frame,
9403 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9404 .ndo_set_rx_mode = i40e_set_rx_mode,
9405 .ndo_validate_addr = eth_validate_addr,
9406 .ndo_set_mac_address = i40e_set_mac,
9407 .ndo_change_mtu = i40e_change_mtu,
9408 .ndo_do_ioctl = i40e_ioctl,
9409 .ndo_tx_timeout = i40e_tx_timeout,
9410 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9411 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9412 #ifdef CONFIG_NET_POLL_CONTROLLER
9413 .ndo_poll_controller = i40e_netpoll,
9415 .ndo_setup_tc = __i40e_setup_tc,
9417 .ndo_fcoe_enable = i40e_fcoe_enable,
9418 .ndo_fcoe_disable = i40e_fcoe_disable,
9420 .ndo_set_features = i40e_set_features,
9421 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9422 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9423 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9424 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9425 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9426 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9427 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9428 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9429 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9430 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9431 .ndo_fdb_add = i40e_ndo_fdb_add,
9432 .ndo_features_check = i40e_features_check,
9433 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9434 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9438 * i40e_config_netdev - Setup the netdev flags
9439 * @vsi: the VSI being configured
9441 * Returns 0 on success, negative value on failure
9443 static int i40e_config_netdev(struct i40e_vsi *vsi)
9445 struct i40e_pf *pf = vsi->back;
9446 struct i40e_hw *hw = &pf->hw;
9447 struct i40e_netdev_priv *np;
9448 struct net_device *netdev;
9449 u8 broadcast[ETH_ALEN];
9450 u8 mac_addr[ETH_ALEN];
9453 etherdev_size = sizeof(struct i40e_netdev_priv);
9454 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9458 vsi->netdev = netdev;
9459 np = netdev_priv(netdev);
9462 netdev->hw_enc_features |= NETIF_F_SG |
9466 NETIF_F_SOFT_FEATURES |
9471 NETIF_F_GSO_GRE_CSUM |
9472 NETIF_F_GSO_IPXIP4 |
9473 NETIF_F_GSO_IPXIP6 |
9474 NETIF_F_GSO_UDP_TUNNEL |
9475 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9476 NETIF_F_GSO_PARTIAL |
9482 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9483 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9485 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9487 /* record features VLANs can make use of */
9488 netdev->vlan_features |= netdev->hw_enc_features |
9489 NETIF_F_TSO_MANGLEID;
9491 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9492 netdev->hw_features |= NETIF_F_NTUPLE;
9494 netdev->hw_features |= netdev->hw_enc_features |
9495 NETIF_F_HW_VLAN_CTAG_TX |
9496 NETIF_F_HW_VLAN_CTAG_RX;
9498 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9499 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9501 if (vsi->type == I40E_VSI_MAIN) {
9502 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9503 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9504 /* The following steps are necessary to properly keep track of
9505 * MAC-VLAN filters loaded into firmware - first we remove
9506 * filter that is automatically generated by firmware and then
9507 * add new filter both to the driver hash table and firmware.
9509 i40e_rm_default_mac_filter(vsi, mac_addr);
9510 spin_lock_bh(&vsi->mac_filter_hash_lock);
9511 i40e_add_mac_filter(vsi, mac_addr);
9512 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9514 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9515 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9516 pf->vsi[pf->lan_vsi]->netdev->name);
9517 random_ether_addr(mac_addr);
9519 spin_lock_bh(&vsi->mac_filter_hash_lock);
9520 i40e_add_mac_filter(vsi, mac_addr);
9521 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9524 /* Add the broadcast filter so that we initially will receive
9525 * broadcast packets. Note that when a new VLAN is first added the
9526 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
9527 * specific filters as part of transitioning into "vlan" operation.
9528 * When more VLANs are added, the driver will copy each existing MAC
9529 * filter and add it for the new VLAN.
9531 * Broadcast filters are handled specially by
9532 * i40e_sync_filters_subtask, as the driver must to set the broadcast
9533 * promiscuous bit instead of adding this directly as a MAC/VLAN
9534 * filter. The subtask will update the correct broadcast promiscuous
9535 * bits as VLANs become active or inactive.
9537 eth_broadcast_addr(broadcast);
9538 spin_lock_bh(&vsi->mac_filter_hash_lock);
9539 i40e_add_mac_filter(vsi, broadcast);
9540 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9542 ether_addr_copy(netdev->dev_addr, mac_addr);
9543 ether_addr_copy(netdev->perm_addr, mac_addr);
9545 netdev->priv_flags |= IFF_UNICAST_FLT;
9546 netdev->priv_flags |= IFF_SUPP_NOFCS;
9547 /* Setup netdev TC information */
9548 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9550 netdev->netdev_ops = &i40e_netdev_ops;
9551 netdev->watchdog_timeo = 5 * HZ;
9552 i40e_set_ethtool_ops(netdev);
9554 i40e_fcoe_config_netdev(netdev, vsi);
9557 /* MTU range: 68 - 9706 */
9558 netdev->min_mtu = ETH_MIN_MTU;
9559 netdev->max_mtu = I40E_MAX_RXBUFFER -
9560 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9566 * i40e_vsi_delete - Delete a VSI from the switch
9567 * @vsi: the VSI being removed
9569 * Returns 0 on success, negative value on failure
9571 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9573 /* remove default VSI is not allowed */
9574 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9577 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9581 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9582 * @vsi: the VSI being queried
9584 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9586 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9588 struct i40e_veb *veb;
9589 struct i40e_pf *pf = vsi->back;
9591 /* Uplink is not a bridge so default to VEB */
9592 if (vsi->veb_idx == I40E_NO_VEB)
9595 veb = pf->veb[vsi->veb_idx];
9597 dev_info(&pf->pdev->dev,
9598 "There is no veb associated with the bridge\n");
9602 /* Uplink is a bridge in VEPA mode */
9603 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9606 /* Uplink is a bridge in VEB mode */
9610 /* VEPA is now default bridge, so return 0 */
9615 * i40e_add_vsi - Add a VSI to the switch
9616 * @vsi: the VSI being configured
9618 * This initializes a VSI context depending on the VSI type to be added and
9619 * passes it down to the add_vsi aq command.
9621 static int i40e_add_vsi(struct i40e_vsi *vsi)
9624 struct i40e_pf *pf = vsi->back;
9625 struct i40e_hw *hw = &pf->hw;
9626 struct i40e_vsi_context ctxt;
9627 struct i40e_mac_filter *f;
9628 struct hlist_node *h;
9631 u8 enabled_tc = 0x1; /* TC0 enabled */
9634 memset(&ctxt, 0, sizeof(ctxt));
9635 switch (vsi->type) {
9637 /* The PF's main VSI is already setup as part of the
9638 * device initialization, so we'll not bother with
9639 * the add_vsi call, but we will retrieve the current
9642 ctxt.seid = pf->main_vsi_seid;
9643 ctxt.pf_num = pf->hw.pf_id;
9645 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9646 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9648 dev_info(&pf->pdev->dev,
9649 "couldn't get PF vsi config, err %s aq_err %s\n",
9650 i40e_stat_str(&pf->hw, ret),
9651 i40e_aq_str(&pf->hw,
9652 pf->hw.aq.asq_last_status));
9655 vsi->info = ctxt.info;
9656 vsi->info.valid_sections = 0;
9658 vsi->seid = ctxt.seid;
9659 vsi->id = ctxt.vsi_number;
9661 enabled_tc = i40e_pf_get_tc_map(pf);
9663 /* MFP mode setup queue map and update VSI */
9664 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9665 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9666 memset(&ctxt, 0, sizeof(ctxt));
9667 ctxt.seid = pf->main_vsi_seid;
9668 ctxt.pf_num = pf->hw.pf_id;
9670 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9671 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9673 dev_info(&pf->pdev->dev,
9674 "update vsi failed, err %s aq_err %s\n",
9675 i40e_stat_str(&pf->hw, ret),
9676 i40e_aq_str(&pf->hw,
9677 pf->hw.aq.asq_last_status));
9681 /* update the local VSI info queue map */
9682 i40e_vsi_update_queue_map(vsi, &ctxt);
9683 vsi->info.valid_sections = 0;
9685 /* Default/Main VSI is only enabled for TC0
9686 * reconfigure it to enable all TCs that are
9687 * available on the port in SFP mode.
9688 * For MFP case the iSCSI PF would use this
9689 * flow to enable LAN+iSCSI TC.
9691 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9693 dev_info(&pf->pdev->dev,
9694 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9696 i40e_stat_str(&pf->hw, ret),
9697 i40e_aq_str(&pf->hw,
9698 pf->hw.aq.asq_last_status));
9705 ctxt.pf_num = hw->pf_id;
9707 ctxt.uplink_seid = vsi->uplink_seid;
9708 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9709 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9710 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9711 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9712 ctxt.info.valid_sections |=
9713 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9714 ctxt.info.switch_id =
9715 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9717 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9720 case I40E_VSI_VMDQ2:
9721 ctxt.pf_num = hw->pf_id;
9723 ctxt.uplink_seid = vsi->uplink_seid;
9724 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9725 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9727 /* This VSI is connected to VEB so the switch_id
9728 * should be set to zero by default.
9730 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9731 ctxt.info.valid_sections |=
9732 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9733 ctxt.info.switch_id =
9734 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9737 /* Setup the VSI tx/rx queue map for TC0 only for now */
9738 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9741 case I40E_VSI_SRIOV:
9742 ctxt.pf_num = hw->pf_id;
9743 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9744 ctxt.uplink_seid = vsi->uplink_seid;
9745 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9746 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9748 /* This VSI is connected to VEB so the switch_id
9749 * should be set to zero by default.
9751 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9752 ctxt.info.valid_sections |=
9753 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9754 ctxt.info.switch_id =
9755 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9758 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9759 ctxt.info.valid_sections |=
9760 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9761 ctxt.info.queueing_opt_flags |=
9762 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9763 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9766 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9767 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9768 if (pf->vf[vsi->vf_id].spoofchk) {
9769 ctxt.info.valid_sections |=
9770 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9771 ctxt.info.sec_flags |=
9772 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9773 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9775 /* Setup the VSI tx/rx queue map for TC0 only for now */
9776 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9781 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9783 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9788 #endif /* I40E_FCOE */
9789 case I40E_VSI_IWARP:
9790 /* send down message to iWARP */
9797 if (vsi->type != I40E_VSI_MAIN) {
9798 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9800 dev_info(&vsi->back->pdev->dev,
9801 "add vsi failed, err %s aq_err %s\n",
9802 i40e_stat_str(&pf->hw, ret),
9803 i40e_aq_str(&pf->hw,
9804 pf->hw.aq.asq_last_status));
9808 vsi->info = ctxt.info;
9809 vsi->info.valid_sections = 0;
9810 vsi->seid = ctxt.seid;
9811 vsi->id = ctxt.vsi_number;
9814 vsi->active_filters = 0;
9815 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9816 spin_lock_bh(&vsi->mac_filter_hash_lock);
9817 /* If macvlan filters already exist, force them to get loaded */
9818 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
9819 f->state = I40E_FILTER_NEW;
9822 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9825 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9826 pf->flags |= I40E_FLAG_FILTER_SYNC;
9829 /* Update VSI BW information */
9830 ret = i40e_vsi_get_bw_info(vsi);
9832 dev_info(&pf->pdev->dev,
9833 "couldn't get vsi bw info, err %s aq_err %s\n",
9834 i40e_stat_str(&pf->hw, ret),
9835 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9836 /* VSI is already added so not tearing that up */
9845 * i40e_vsi_release - Delete a VSI and free its resources
9846 * @vsi: the VSI being removed
9848 * Returns 0 on success or < 0 on error
9850 int i40e_vsi_release(struct i40e_vsi *vsi)
9852 struct i40e_mac_filter *f;
9853 struct hlist_node *h;
9854 struct i40e_veb *veb = NULL;
9861 /* release of a VEB-owner or last VSI is not allowed */
9862 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9863 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9864 vsi->seid, vsi->uplink_seid);
9867 if (vsi == pf->vsi[pf->lan_vsi] &&
9868 !test_bit(__I40E_DOWN, &pf->state)) {
9869 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9873 uplink_seid = vsi->uplink_seid;
9874 if (vsi->type != I40E_VSI_SRIOV) {
9875 if (vsi->netdev_registered) {
9876 vsi->netdev_registered = false;
9878 /* results in a call to i40e_close() */
9879 unregister_netdev(vsi->netdev);
9882 i40e_vsi_close(vsi);
9884 i40e_vsi_disable_irq(vsi);
9887 spin_lock_bh(&vsi->mac_filter_hash_lock);
9889 /* clear the sync flag on all filters */
9891 __dev_uc_unsync(vsi->netdev, NULL);
9892 __dev_mc_unsync(vsi->netdev, NULL);
9895 /* make sure any remaining filters are marked for deletion */
9896 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
9897 __i40e_del_filter(vsi, f);
9899 spin_unlock_bh(&vsi->mac_filter_hash_lock);
9901 i40e_sync_vsi_filters(vsi);
9903 i40e_vsi_delete(vsi);
9904 i40e_vsi_free_q_vectors(vsi);
9906 free_netdev(vsi->netdev);
9909 i40e_vsi_clear_rings(vsi);
9910 i40e_vsi_clear(vsi);
9912 /* If this was the last thing on the VEB, except for the
9913 * controlling VSI, remove the VEB, which puts the controlling
9914 * VSI onto the next level down in the switch.
9916 * Well, okay, there's one more exception here: don't remove
9917 * the orphan VEBs yet. We'll wait for an explicit remove request
9918 * from up the network stack.
9920 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9922 pf->vsi[i]->uplink_seid == uplink_seid &&
9923 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9924 n++; /* count the VSIs */
9927 for (i = 0; i < I40E_MAX_VEB; i++) {
9930 if (pf->veb[i]->uplink_seid == uplink_seid)
9931 n++; /* count the VEBs */
9932 if (pf->veb[i]->seid == uplink_seid)
9935 if (n == 0 && veb && veb->uplink_seid != 0)
9936 i40e_veb_release(veb);
9942 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9943 * @vsi: ptr to the VSI
9945 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9946 * corresponding SW VSI structure and initializes num_queue_pairs for the
9947 * newly allocated VSI.
9949 * Returns 0 on success or negative on failure
9951 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9954 struct i40e_pf *pf = vsi->back;
9956 if (vsi->q_vectors[0]) {
9957 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9962 if (vsi->base_vector) {
9963 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9964 vsi->seid, vsi->base_vector);
9968 ret = i40e_vsi_alloc_q_vectors(vsi);
9970 dev_info(&pf->pdev->dev,
9971 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9972 vsi->num_q_vectors, vsi->seid, ret);
9973 vsi->num_q_vectors = 0;
9974 goto vector_setup_out;
9977 /* In Legacy mode, we do not have to get any other vector since we
9978 * piggyback on the misc/ICR0 for queue interrupts.
9980 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9982 if (vsi->num_q_vectors)
9983 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9984 vsi->num_q_vectors, vsi->idx);
9985 if (vsi->base_vector < 0) {
9986 dev_info(&pf->pdev->dev,
9987 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9988 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9989 i40e_vsi_free_q_vectors(vsi);
9991 goto vector_setup_out;
9999 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
10000 * @vsi: pointer to the vsi.
10002 * This re-allocates a vsi's queue resources.
10004 * Returns pointer to the successfully allocated and configured VSI sw struct
10005 * on success, otherwise returns NULL on failure.
10007 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
10009 struct i40e_pf *pf;
10018 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
10019 i40e_vsi_clear_rings(vsi);
10021 i40e_vsi_free_arrays(vsi, false);
10022 i40e_set_num_rings_in_vsi(vsi);
10023 ret = i40e_vsi_alloc_arrays(vsi, false);
10027 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
10029 dev_info(&pf->pdev->dev,
10030 "failed to get tracking for %d queues for VSI %d err %d\n",
10031 vsi->alloc_queue_pairs, vsi->seid, ret);
10034 vsi->base_queue = ret;
10036 /* Update the FW view of the VSI. Force a reset of TC and queue
10037 * layout configurations.
10039 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10040 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10041 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10042 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10043 if (vsi->type == I40E_VSI_MAIN)
10044 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
10046 /* assign it some queues */
10047 ret = i40e_alloc_rings(vsi);
10051 /* map all of the rings to the q_vectors */
10052 i40e_vsi_map_rings_to_vectors(vsi);
10056 i40e_vsi_free_q_vectors(vsi);
10057 if (vsi->netdev_registered) {
10058 vsi->netdev_registered = false;
10059 unregister_netdev(vsi->netdev);
10060 free_netdev(vsi->netdev);
10061 vsi->netdev = NULL;
10063 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10065 i40e_vsi_clear(vsi);
10070 * i40e_vsi_setup - Set up a VSI by a given type
10071 * @pf: board private structure
10073 * @uplink_seid: the switch element to link to
10074 * @param1: usage depends upon VSI type. For VF types, indicates VF id
10076 * This allocates the sw VSI structure and its queue resources, then add a VSI
10077 * to the identified VEB.
10079 * Returns pointer to the successfully allocated and configure VSI sw struct on
10080 * success, otherwise returns NULL on failure.
10082 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
10083 u16 uplink_seid, u32 param1)
10085 struct i40e_vsi *vsi = NULL;
10086 struct i40e_veb *veb = NULL;
10090 /* The requested uplink_seid must be either
10091 * - the PF's port seid
10092 * no VEB is needed because this is the PF
10093 * or this is a Flow Director special case VSI
10094 * - seid of an existing VEB
10095 * - seid of a VSI that owns an existing VEB
10096 * - seid of a VSI that doesn't own a VEB
10097 * a new VEB is created and the VSI becomes the owner
10098 * - seid of the PF VSI, which is what creates the first VEB
10099 * this is a special case of the previous
10101 * Find which uplink_seid we were given and create a new VEB if needed
10103 for (i = 0; i < I40E_MAX_VEB; i++) {
10104 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
10110 if (!veb && uplink_seid != pf->mac_seid) {
10112 for (i = 0; i < pf->num_alloc_vsi; i++) {
10113 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
10119 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
10124 if (vsi->uplink_seid == pf->mac_seid)
10125 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
10126 vsi->tc_config.enabled_tc);
10127 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
10128 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
10129 vsi->tc_config.enabled_tc);
10131 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
10132 dev_info(&vsi->back->pdev->dev,
10133 "New VSI creation error, uplink seid of LAN VSI expected.\n");
10136 /* We come up by default in VEPA mode if SRIOV is not
10137 * already enabled, in which case we can't force VEPA
10140 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
10141 veb->bridge_mode = BRIDGE_MODE_VEPA;
10142 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
10144 i40e_config_bridge_mode(veb);
10146 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
10147 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
10151 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
10155 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10156 uplink_seid = veb->seid;
10159 /* get vsi sw struct */
10160 v_idx = i40e_vsi_mem_alloc(pf, type);
10163 vsi = pf->vsi[v_idx];
10167 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
10169 if (type == I40E_VSI_MAIN)
10170 pf->lan_vsi = v_idx;
10171 else if (type == I40E_VSI_SRIOV)
10172 vsi->vf_id = param1;
10173 /* assign it some queues */
10174 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
10177 dev_info(&pf->pdev->dev,
10178 "failed to get tracking for %d queues for VSI %d err=%d\n",
10179 vsi->alloc_queue_pairs, vsi->seid, ret);
10182 vsi->base_queue = ret;
10184 /* get a VSI from the hardware */
10185 vsi->uplink_seid = uplink_seid;
10186 ret = i40e_add_vsi(vsi);
10190 switch (vsi->type) {
10191 /* setup the netdev if needed */
10192 case I40E_VSI_MAIN:
10193 /* Apply relevant filters if a platform-specific mac
10194 * address was selected.
10196 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
10197 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
10199 dev_warn(&pf->pdev->dev,
10200 "could not set up macaddr; err %d\n",
10204 case I40E_VSI_VMDQ2:
10205 case I40E_VSI_FCOE:
10206 ret = i40e_config_netdev(vsi);
10209 ret = register_netdev(vsi->netdev);
10212 vsi->netdev_registered = true;
10213 netif_carrier_off(vsi->netdev);
10214 #ifdef CONFIG_I40E_DCB
10215 /* Setup DCB netlink interface */
10216 i40e_dcbnl_setup(vsi);
10217 #endif /* CONFIG_I40E_DCB */
10220 case I40E_VSI_FDIR:
10221 /* set up vectors and rings if needed */
10222 ret = i40e_vsi_setup_vectors(vsi);
10226 ret = i40e_alloc_rings(vsi);
10230 /* map all of the rings to the q_vectors */
10231 i40e_vsi_map_rings_to_vectors(vsi);
10233 i40e_vsi_reset_stats(vsi);
10237 /* no netdev or rings for the other VSI types */
10241 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
10242 (vsi->type == I40E_VSI_VMDQ2)) {
10243 ret = i40e_vsi_config_rss(vsi);
10248 i40e_vsi_free_q_vectors(vsi);
10250 if (vsi->netdev_registered) {
10251 vsi->netdev_registered = false;
10252 unregister_netdev(vsi->netdev);
10253 free_netdev(vsi->netdev);
10254 vsi->netdev = NULL;
10257 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
10259 i40e_vsi_clear(vsi);
10265 * i40e_veb_get_bw_info - Query VEB BW information
10266 * @veb: the veb to query
10268 * Query the Tx scheduler BW configuration data for given VEB
10270 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
10272 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
10273 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
10274 struct i40e_pf *pf = veb->pf;
10275 struct i40e_hw *hw = &pf->hw;
10280 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
10283 dev_info(&pf->pdev->dev,
10284 "query veb bw config failed, err %s aq_err %s\n",
10285 i40e_stat_str(&pf->hw, ret),
10286 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10290 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
10293 dev_info(&pf->pdev->dev,
10294 "query veb bw ets config failed, err %s aq_err %s\n",
10295 i40e_stat_str(&pf->hw, ret),
10296 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10300 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10301 veb->bw_max_quanta = ets_data.tc_bw_max;
10302 veb->is_abs_credits = bw_data.absolute_credits_enable;
10303 veb->enabled_tc = ets_data.tc_valid_bits;
10304 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10305 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10306 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10307 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10308 veb->bw_tc_limit_credits[i] =
10309 le16_to_cpu(bw_data.tc_bw_limits[i]);
10310 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10318 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10319 * @pf: board private structure
10321 * On error: returns error code (negative)
10322 * On success: returns vsi index in PF (positive)
10324 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10327 struct i40e_veb *veb;
10330 /* Need to protect the allocation of switch elements at the PF level */
10331 mutex_lock(&pf->switch_mutex);
10333 /* VEB list may be fragmented if VEB creation/destruction has
10334 * been happening. We can afford to do a quick scan to look
10335 * for any free slots in the list.
10337 * find next empty veb slot, looping back around if necessary
10340 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10342 if (i >= I40E_MAX_VEB) {
10344 goto err_alloc_veb; /* out of VEB slots! */
10347 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10350 goto err_alloc_veb;
10354 veb->enabled_tc = 1;
10359 mutex_unlock(&pf->switch_mutex);
10364 * i40e_switch_branch_release - Delete a branch of the switch tree
10365 * @branch: where to start deleting
10367 * This uses recursion to find the tips of the branch to be
10368 * removed, deleting until we get back to and can delete this VEB.
10370 static void i40e_switch_branch_release(struct i40e_veb *branch)
10372 struct i40e_pf *pf = branch->pf;
10373 u16 branch_seid = branch->seid;
10374 u16 veb_idx = branch->idx;
10377 /* release any VEBs on this VEB - RECURSION */
10378 for (i = 0; i < I40E_MAX_VEB; i++) {
10381 if (pf->veb[i]->uplink_seid == branch->seid)
10382 i40e_switch_branch_release(pf->veb[i]);
10385 /* Release the VSIs on this VEB, but not the owner VSI.
10387 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10388 * the VEB itself, so don't use (*branch) after this loop.
10390 for (i = 0; i < pf->num_alloc_vsi; i++) {
10393 if (pf->vsi[i]->uplink_seid == branch_seid &&
10394 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10395 i40e_vsi_release(pf->vsi[i]);
10399 /* There's one corner case where the VEB might not have been
10400 * removed, so double check it here and remove it if needed.
10401 * This case happens if the veb was created from the debugfs
10402 * commands and no VSIs were added to it.
10404 if (pf->veb[veb_idx])
10405 i40e_veb_release(pf->veb[veb_idx]);
10409 * i40e_veb_clear - remove veb struct
10410 * @veb: the veb to remove
10412 static void i40e_veb_clear(struct i40e_veb *veb)
10418 struct i40e_pf *pf = veb->pf;
10420 mutex_lock(&pf->switch_mutex);
10421 if (pf->veb[veb->idx] == veb)
10422 pf->veb[veb->idx] = NULL;
10423 mutex_unlock(&pf->switch_mutex);
10430 * i40e_veb_release - Delete a VEB and free its resources
10431 * @veb: the VEB being removed
10433 void i40e_veb_release(struct i40e_veb *veb)
10435 struct i40e_vsi *vsi = NULL;
10436 struct i40e_pf *pf;
10441 /* find the remaining VSI and check for extras */
10442 for (i = 0; i < pf->num_alloc_vsi; i++) {
10443 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10449 dev_info(&pf->pdev->dev,
10450 "can't remove VEB %d with %d VSIs left\n",
10455 /* move the remaining VSI to uplink veb */
10456 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10457 if (veb->uplink_seid) {
10458 vsi->uplink_seid = veb->uplink_seid;
10459 if (veb->uplink_seid == pf->mac_seid)
10460 vsi->veb_idx = I40E_NO_VEB;
10462 vsi->veb_idx = veb->veb_idx;
10465 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10466 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10469 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10470 i40e_veb_clear(veb);
10474 * i40e_add_veb - create the VEB in the switch
10475 * @veb: the VEB to be instantiated
10476 * @vsi: the controlling VSI
10478 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10480 struct i40e_pf *pf = veb->pf;
10481 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10484 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10485 veb->enabled_tc, false,
10486 &veb->seid, enable_stats, NULL);
10488 /* get a VEB from the hardware */
10490 dev_info(&pf->pdev->dev,
10491 "couldn't add VEB, err %s aq_err %s\n",
10492 i40e_stat_str(&pf->hw, ret),
10493 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10497 /* get statistics counter */
10498 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10499 &veb->stats_idx, NULL, NULL, NULL);
10501 dev_info(&pf->pdev->dev,
10502 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10503 i40e_stat_str(&pf->hw, ret),
10504 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10507 ret = i40e_veb_get_bw_info(veb);
10509 dev_info(&pf->pdev->dev,
10510 "couldn't get VEB bw info, err %s aq_err %s\n",
10511 i40e_stat_str(&pf->hw, ret),
10512 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10513 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10517 vsi->uplink_seid = veb->seid;
10518 vsi->veb_idx = veb->idx;
10519 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10525 * i40e_veb_setup - Set up a VEB
10526 * @pf: board private structure
10527 * @flags: VEB setup flags
10528 * @uplink_seid: the switch element to link to
10529 * @vsi_seid: the initial VSI seid
10530 * @enabled_tc: Enabled TC bit-map
10532 * This allocates the sw VEB structure and links it into the switch
10533 * It is possible and legal for this to be a duplicate of an already
10534 * existing VEB. It is also possible for both uplink and vsi seids
10535 * to be zero, in order to create a floating VEB.
10537 * Returns pointer to the successfully allocated VEB sw struct on
10538 * success, otherwise returns NULL on failure.
10540 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10541 u16 uplink_seid, u16 vsi_seid,
10544 struct i40e_veb *veb, *uplink_veb = NULL;
10545 int vsi_idx, veb_idx;
10548 /* if one seid is 0, the other must be 0 to create a floating relay */
10549 if ((uplink_seid == 0 || vsi_seid == 0) &&
10550 (uplink_seid + vsi_seid != 0)) {
10551 dev_info(&pf->pdev->dev,
10552 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10553 uplink_seid, vsi_seid);
10557 /* make sure there is such a vsi and uplink */
10558 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10559 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10561 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10562 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10567 if (uplink_seid && uplink_seid != pf->mac_seid) {
10568 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10569 if (pf->veb[veb_idx] &&
10570 pf->veb[veb_idx]->seid == uplink_seid) {
10571 uplink_veb = pf->veb[veb_idx];
10576 dev_info(&pf->pdev->dev,
10577 "uplink seid %d not found\n", uplink_seid);
10582 /* get veb sw struct */
10583 veb_idx = i40e_veb_mem_alloc(pf);
10586 veb = pf->veb[veb_idx];
10587 veb->flags = flags;
10588 veb->uplink_seid = uplink_seid;
10589 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10590 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10592 /* create the VEB in the switch */
10593 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10596 if (vsi_idx == pf->lan_vsi)
10597 pf->lan_veb = veb->idx;
10602 i40e_veb_clear(veb);
10608 * i40e_setup_pf_switch_element - set PF vars based on switch type
10609 * @pf: board private structure
10610 * @ele: element we are building info from
10611 * @num_reported: total number of elements
10612 * @printconfig: should we print the contents
10614 * helper function to assist in extracting a few useful SEID values.
10616 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10617 struct i40e_aqc_switch_config_element_resp *ele,
10618 u16 num_reported, bool printconfig)
10620 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10621 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10622 u8 element_type = ele->element_type;
10623 u16 seid = le16_to_cpu(ele->seid);
10626 dev_info(&pf->pdev->dev,
10627 "type=%d seid=%d uplink=%d downlink=%d\n",
10628 element_type, seid, uplink_seid, downlink_seid);
10630 switch (element_type) {
10631 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10632 pf->mac_seid = seid;
10634 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10636 if (uplink_seid != pf->mac_seid)
10638 if (pf->lan_veb == I40E_NO_VEB) {
10641 /* find existing or else empty VEB */
10642 for (v = 0; v < I40E_MAX_VEB; v++) {
10643 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10648 if (pf->lan_veb == I40E_NO_VEB) {
10649 v = i40e_veb_mem_alloc(pf);
10656 pf->veb[pf->lan_veb]->seid = seid;
10657 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10658 pf->veb[pf->lan_veb]->pf = pf;
10659 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10661 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10662 if (num_reported != 1)
10664 /* This is immediately after a reset so we can assume this is
10667 pf->mac_seid = uplink_seid;
10668 pf->pf_seid = downlink_seid;
10669 pf->main_vsi_seid = seid;
10671 dev_info(&pf->pdev->dev,
10672 "pf_seid=%d main_vsi_seid=%d\n",
10673 pf->pf_seid, pf->main_vsi_seid);
10675 case I40E_SWITCH_ELEMENT_TYPE_PF:
10676 case I40E_SWITCH_ELEMENT_TYPE_VF:
10677 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10678 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10679 case I40E_SWITCH_ELEMENT_TYPE_PE:
10680 case I40E_SWITCH_ELEMENT_TYPE_PA:
10681 /* ignore these for now */
10684 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10685 element_type, seid);
10691 * i40e_fetch_switch_configuration - Get switch config from firmware
10692 * @pf: board private structure
10693 * @printconfig: should we print the contents
10695 * Get the current switch configuration from the device and
10696 * extract a few useful SEID values.
10698 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10700 struct i40e_aqc_get_switch_config_resp *sw_config;
10706 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10710 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10712 u16 num_reported, num_total;
10714 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10718 dev_info(&pf->pdev->dev,
10719 "get switch config failed err %s aq_err %s\n",
10720 i40e_stat_str(&pf->hw, ret),
10721 i40e_aq_str(&pf->hw,
10722 pf->hw.aq.asq_last_status));
10727 num_reported = le16_to_cpu(sw_config->header.num_reported);
10728 num_total = le16_to_cpu(sw_config->header.num_total);
10731 dev_info(&pf->pdev->dev,
10732 "header: %d reported %d total\n",
10733 num_reported, num_total);
10735 for (i = 0; i < num_reported; i++) {
10736 struct i40e_aqc_switch_config_element_resp *ele =
10737 &sw_config->element[i];
10739 i40e_setup_pf_switch_element(pf, ele, num_reported,
10742 } while (next_seid != 0);
10749 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10750 * @pf: board private structure
10751 * @reinit: if the Main VSI needs to re-initialized.
10753 * Returns 0 on success, negative value on failure
10755 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10760 /* find out what's out there already */
10761 ret = i40e_fetch_switch_configuration(pf, false);
10763 dev_info(&pf->pdev->dev,
10764 "couldn't fetch switch config, err %s aq_err %s\n",
10765 i40e_stat_str(&pf->hw, ret),
10766 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10769 i40e_pf_reset_stats(pf);
10771 /* set the switch config bit for the whole device to
10772 * support limited promisc or true promisc
10773 * when user requests promisc. The default is limited
10777 if ((pf->hw.pf_id == 0) &&
10778 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10779 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10781 if (pf->hw.pf_id == 0) {
10784 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10785 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10787 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10788 dev_info(&pf->pdev->dev,
10789 "couldn't set switch config bits, err %s aq_err %s\n",
10790 i40e_stat_str(&pf->hw, ret),
10791 i40e_aq_str(&pf->hw,
10792 pf->hw.aq.asq_last_status));
10793 /* not a fatal problem, just keep going */
10797 /* first time setup */
10798 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10799 struct i40e_vsi *vsi = NULL;
10802 /* Set up the PF VSI associated with the PF's main VSI
10803 * that is already in the HW switch
10805 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10806 uplink_seid = pf->veb[pf->lan_veb]->seid;
10808 uplink_seid = pf->mac_seid;
10809 if (pf->lan_vsi == I40E_NO_VSI)
10810 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10812 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10814 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10815 i40e_fdir_teardown(pf);
10819 /* force a reset of TC and queue layout configurations */
10820 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10822 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10823 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10824 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10826 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10828 i40e_fdir_sb_setup(pf);
10830 /* Setup static PF queue filter control settings */
10831 ret = i40e_setup_pf_filter_control(pf);
10833 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10835 /* Failure here should not stop continuing other steps */
10838 /* enable RSS in the HW, even for only one queue, as the stack can use
10841 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10842 i40e_pf_config_rss(pf);
10844 /* fill in link information and enable LSE reporting */
10845 i40e_link_event(pf);
10847 /* Initialize user-specific link properties */
10848 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10849 I40E_AQ_AN_COMPLETED) ? true : false);
10857 * i40e_determine_queue_usage - Work out queue distribution
10858 * @pf: board private structure
10860 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10864 pf->num_lan_qps = 0;
10866 pf->num_fcoe_qps = 0;
10869 /* Find the max queues to be put into basic use. We'll always be
10870 * using TC0, whether or not DCB is running, and TC0 will get the
10873 queues_left = pf->hw.func_caps.num_tx_qp;
10875 if ((queues_left == 1) ||
10876 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10877 /* one qp for PF, no queues for anything else */
10879 pf->alloc_rss_size = pf->num_lan_qps = 1;
10881 /* make sure all the fancies are disabled */
10882 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10883 I40E_FLAG_IWARP_ENABLED |
10885 I40E_FLAG_FCOE_ENABLED |
10887 I40E_FLAG_FD_SB_ENABLED |
10888 I40E_FLAG_FD_ATR_ENABLED |
10889 I40E_FLAG_DCB_CAPABLE |
10890 I40E_FLAG_DCB_ENABLED |
10891 I40E_FLAG_SRIOV_ENABLED |
10892 I40E_FLAG_VMDQ_ENABLED);
10893 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10894 I40E_FLAG_FD_SB_ENABLED |
10895 I40E_FLAG_FD_ATR_ENABLED |
10896 I40E_FLAG_DCB_CAPABLE))) {
10897 /* one qp for PF */
10898 pf->alloc_rss_size = pf->num_lan_qps = 1;
10899 queues_left -= pf->num_lan_qps;
10901 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10902 I40E_FLAG_IWARP_ENABLED |
10904 I40E_FLAG_FCOE_ENABLED |
10906 I40E_FLAG_FD_SB_ENABLED |
10907 I40E_FLAG_FD_ATR_ENABLED |
10908 I40E_FLAG_DCB_ENABLED |
10909 I40E_FLAG_VMDQ_ENABLED);
10911 /* Not enough queues for all TCs */
10912 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10913 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10914 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10915 I40E_FLAG_DCB_ENABLED);
10916 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10918 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10919 num_online_cpus());
10920 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10921 pf->hw.func_caps.num_tx_qp);
10923 queues_left -= pf->num_lan_qps;
10927 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10928 if (I40E_DEFAULT_FCOE <= queues_left) {
10929 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10930 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10931 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10933 pf->num_fcoe_qps = 0;
10934 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10935 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10938 queues_left -= pf->num_fcoe_qps;
10942 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10943 if (queues_left > 1) {
10944 queues_left -= 1; /* save 1 queue for FD */
10946 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10947 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10951 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10952 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10953 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10954 (queues_left / pf->num_vf_qps));
10955 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10958 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10959 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10960 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10961 (queues_left / pf->num_vmdq_qps));
10962 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10965 pf->queues_left = queues_left;
10966 dev_dbg(&pf->pdev->dev,
10967 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10968 pf->hw.func_caps.num_tx_qp,
10969 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10970 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10971 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10974 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10979 * i40e_setup_pf_filter_control - Setup PF static filter control
10980 * @pf: PF to be setup
10982 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10983 * settings. If PE/FCoE are enabled then it will also set the per PF
10984 * based filter sizes required for them. It also enables Flow director,
10985 * ethertype and macvlan type filter settings for the pf.
10987 * Returns 0 on success, negative on failure
10989 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10991 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10993 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10995 /* Flow Director is enabled */
10996 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10997 settings->enable_fdir = true;
10999 /* Ethtype and MACVLAN filters enabled for PF */
11000 settings->enable_ethtype = true;
11001 settings->enable_macvlan = true;
11003 if (i40e_set_filter_control(&pf->hw, settings))
11009 #define INFO_STRING_LEN 255
11010 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
11011 static void i40e_print_features(struct i40e_pf *pf)
11013 struct i40e_hw *hw = &pf->hw;
11017 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
11021 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
11022 #ifdef CONFIG_PCI_IOV
11023 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
11025 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
11026 pf->hw.func_caps.num_vsis,
11027 pf->vsi[pf->lan_vsi]->num_queue_pairs);
11028 if (pf->flags & I40E_FLAG_RSS_ENABLED)
11029 i += snprintf(&buf[i], REMAIN(i), " RSS");
11030 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
11031 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
11032 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11033 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
11034 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
11036 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
11037 i += snprintf(&buf[i], REMAIN(i), " DCB");
11038 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
11039 i += snprintf(&buf[i], REMAIN(i), " Geneve");
11040 if (pf->flags & I40E_FLAG_PTP)
11041 i += snprintf(&buf[i], REMAIN(i), " PTP");
11043 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
11044 i += snprintf(&buf[i], REMAIN(i), " FCOE");
11046 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
11047 i += snprintf(&buf[i], REMAIN(i), " VEB");
11049 i += snprintf(&buf[i], REMAIN(i), " VEPA");
11051 dev_info(&pf->pdev->dev, "%s\n", buf);
11053 WARN_ON(i > INFO_STRING_LEN);
11057 * i40e_get_platform_mac_addr - get platform-specific MAC address
11059 * @pdev: PCI device information struct
11060 * @pf: board private structure
11062 * Look up the MAC address in Open Firmware on systems that support it,
11063 * and use IDPROM on SPARC if no OF address is found. On return, the
11064 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
11065 * has been selected.
11067 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
11069 pf->flags &= ~I40E_FLAG_PF_MAC;
11070 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
11071 pf->flags |= I40E_FLAG_PF_MAC;
11075 * i40e_probe - Device initialization routine
11076 * @pdev: PCI device information struct
11077 * @ent: entry in i40e_pci_tbl
11079 * i40e_probe initializes a PF identified by a pci_dev structure.
11080 * The OS initialization, configuring of the PF private structure,
11081 * and a hardware reset occur.
11083 * Returns 0 on success, negative on failure
11085 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
11087 struct i40e_aq_get_phy_abilities_resp abilities;
11088 struct i40e_pf *pf;
11089 struct i40e_hw *hw;
11090 static u16 pfs_found;
11098 err = pci_enable_device_mem(pdev);
11102 /* set up for high or low dma */
11103 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11105 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11107 dev_err(&pdev->dev,
11108 "DMA configuration failed: 0x%x\n", err);
11113 /* set up pci connections */
11114 err = pci_request_mem_regions(pdev, i40e_driver_name);
11116 dev_info(&pdev->dev,
11117 "pci_request_selected_regions failed %d\n", err);
11121 pci_enable_pcie_error_reporting(pdev);
11122 pci_set_master(pdev);
11124 /* Now that we have a PCI connection, we need to do the
11125 * low level device setup. This is primarily setting up
11126 * the Admin Queue structures and then querying for the
11127 * device's current profile information.
11129 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
11136 set_bit(__I40E_DOWN, &pf->state);
11141 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
11142 I40E_MAX_CSR_SPACE);
11144 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
11145 if (!hw->hw_addr) {
11147 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
11148 (unsigned int)pci_resource_start(pdev, 0),
11149 pf->ioremap_len, err);
11152 hw->vendor_id = pdev->vendor;
11153 hw->device_id = pdev->device;
11154 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
11155 hw->subsystem_vendor_id = pdev->subsystem_vendor;
11156 hw->subsystem_device_id = pdev->subsystem_device;
11157 hw->bus.device = PCI_SLOT(pdev->devfn);
11158 hw->bus.func = PCI_FUNC(pdev->devfn);
11159 hw->bus.bus_id = pdev->bus->number;
11160 pf->instance = pfs_found;
11162 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
11163 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
11165 /* set up the locks for the AQ, do this only once in probe
11166 * and destroy them only once in remove
11168 mutex_init(&hw->aq.asq_mutex);
11169 mutex_init(&hw->aq.arq_mutex);
11171 pf->msg_enable = netif_msg_init(debug,
11176 pf->hw.debug_mask = debug;
11178 /* do a special CORER for clearing PXE mode once at init */
11179 if (hw->revision_id == 0 &&
11180 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
11181 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
11186 i40e_clear_pxe_mode(hw);
11189 /* Reset here to make sure all is clean and to define PF 'n' */
11191 err = i40e_pf_reset(hw);
11193 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
11198 hw->aq.num_arq_entries = I40E_AQ_LEN;
11199 hw->aq.num_asq_entries = I40E_AQ_LEN;
11200 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11201 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
11202 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
11204 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
11206 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
11208 err = i40e_init_shared_code(hw);
11210 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
11215 /* set up a default setting for link flow control */
11216 pf->hw.fc.requested_mode = I40E_FC_NONE;
11218 err = i40e_init_adminq(hw);
11220 if (err == I40E_ERR_FIRMWARE_API_VERSION)
11221 dev_info(&pdev->dev,
11222 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
11224 dev_info(&pdev->dev,
11225 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
11230 /* provide nvm, fw, api versions */
11231 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
11232 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
11233 hw->aq.api_maj_ver, hw->aq.api_min_ver,
11234 i40e_nvm_version_str(hw));
11236 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
11237 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
11238 dev_info(&pdev->dev,
11239 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
11240 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
11241 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
11242 dev_info(&pdev->dev,
11243 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
11245 i40e_verify_eeprom(pf);
11247 /* Rev 0 hardware was never productized */
11248 if (hw->revision_id < 1)
11249 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
11251 i40e_clear_pxe_mode(hw);
11252 err = i40e_get_capabilities(pf);
11254 goto err_adminq_setup;
11256 err = i40e_sw_init(pf);
11258 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
11262 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
11263 hw->func_caps.num_rx_qp,
11264 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
11266 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
11267 goto err_init_lan_hmc;
11270 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
11272 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
11274 goto err_configure_lan_hmc;
11277 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
11278 * Ignore error return codes because if it was already disabled via
11279 * hardware settings this will fail
11281 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
11282 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
11283 i40e_aq_stop_lldp(hw, true, NULL);
11286 i40e_get_mac_addr(hw, hw->mac.addr);
11287 /* allow a platform config to override the HW addr */
11288 i40e_get_platform_mac_addr(pdev, pf);
11289 if (!is_valid_ether_addr(hw->mac.addr)) {
11290 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
11294 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
11295 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
11296 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
11297 if (is_valid_ether_addr(hw->mac.port_addr))
11298 pf->flags |= I40E_FLAG_PORT_ID_VALID;
11300 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
11302 dev_info(&pdev->dev,
11303 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
11304 if (!is_valid_ether_addr(hw->mac.san_addr)) {
11305 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
11307 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
11309 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
11310 #endif /* I40E_FCOE */
11312 pci_set_drvdata(pdev, pf);
11313 pci_save_state(pdev);
11314 #ifdef CONFIG_I40E_DCB
11315 err = i40e_init_pf_dcb(pf);
11317 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
11318 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
11319 /* Continue without DCB enabled */
11321 #endif /* CONFIG_I40E_DCB */
11323 /* set up periodic task facility */
11324 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11325 pf->service_timer_period = HZ;
11327 INIT_WORK(&pf->service_task, i40e_service_task);
11328 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11329 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
11331 /* NVM bit on means WoL disabled for the port */
11332 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11333 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11334 pf->wol_en = false;
11337 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11339 /* set up the main switch operations */
11340 i40e_determine_queue_usage(pf);
11341 err = i40e_init_interrupt_scheme(pf);
11343 goto err_switch_setup;
11345 /* The number of VSIs reported by the FW is the minimum guaranteed
11346 * to us; HW supports far more and we share the remaining pool with
11347 * the other PFs. We allocate space for more than the guarantee with
11348 * the understanding that we might not get them all later.
11350 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11351 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11353 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11355 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11356 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11360 goto err_switch_setup;
11363 #ifdef CONFIG_PCI_IOV
11364 /* prep for VF support */
11365 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11366 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11367 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11368 if (pci_num_vf(pdev))
11369 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11372 err = i40e_setup_pf_switch(pf, false);
11374 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11378 /* Make sure flow control is set according to current settings */
11379 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11380 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11381 dev_dbg(&pf->pdev->dev,
11382 "Set fc with err %s aq_err %s on get_phy_cap\n",
11383 i40e_stat_str(hw, err),
11384 i40e_aq_str(hw, hw->aq.asq_last_status));
11385 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11386 dev_dbg(&pf->pdev->dev,
11387 "Set fc with err %s aq_err %s on set_phy_config\n",
11388 i40e_stat_str(hw, err),
11389 i40e_aq_str(hw, hw->aq.asq_last_status));
11390 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11391 dev_dbg(&pf->pdev->dev,
11392 "Set fc with err %s aq_err %s on get_link_info\n",
11393 i40e_stat_str(hw, err),
11394 i40e_aq_str(hw, hw->aq.asq_last_status));
11396 /* if FDIR VSI was set up, start it now */
11397 for (i = 0; i < pf->num_alloc_vsi; i++) {
11398 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11399 i40e_vsi_open(pf->vsi[i]);
11404 /* The driver only wants link up/down and module qualification
11405 * reports from firmware. Note the negative logic.
11407 err = i40e_aq_set_phy_int_mask(&pf->hw,
11408 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11409 I40E_AQ_EVENT_MEDIA_NA |
11410 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11412 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11413 i40e_stat_str(&pf->hw, err),
11414 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11416 /* Reconfigure hardware for allowing smaller MSS in the case
11417 * of TSO, so that we avoid the MDD being fired and causing
11418 * a reset in the case of small MSS+TSO.
11420 val = rd32(hw, I40E_REG_MSS);
11421 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11422 val &= ~I40E_REG_MSS_MIN_MASK;
11423 val |= I40E_64BYTE_MSS;
11424 wr32(hw, I40E_REG_MSS, val);
11427 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11429 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11431 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11432 i40e_stat_str(&pf->hw, err),
11433 i40e_aq_str(&pf->hw,
11434 pf->hw.aq.asq_last_status));
11436 /* The main driver is (mostly) up and happy. We need to set this state
11437 * before setting up the misc vector or we get a race and the vector
11438 * ends up disabled forever.
11440 clear_bit(__I40E_DOWN, &pf->state);
11442 /* In case of MSIX we are going to setup the misc vector right here
11443 * to handle admin queue events etc. In case of legacy and MSI
11444 * the misc functionality and queue processing is combined in
11445 * the same vector and that gets setup at open.
11447 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11448 err = i40e_setup_misc_vector(pf);
11450 dev_info(&pdev->dev,
11451 "setup of misc vector failed: %d\n", err);
11456 #ifdef CONFIG_PCI_IOV
11457 /* prep for VF support */
11458 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11459 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11460 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11461 /* disable link interrupts for VFs */
11462 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11463 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11464 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11467 if (pci_num_vf(pdev)) {
11468 dev_info(&pdev->dev,
11469 "Active VFs found, allocating resources.\n");
11470 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11472 dev_info(&pdev->dev,
11473 "Error %d allocating resources for existing VFs\n",
11477 #endif /* CONFIG_PCI_IOV */
11479 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11480 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11481 pf->num_iwarp_msix,
11482 I40E_IWARP_IRQ_PILE_ID);
11483 if (pf->iwarp_base_vector < 0) {
11484 dev_info(&pdev->dev,
11485 "failed to get tracking for %d vectors for IWARP err=%d\n",
11486 pf->num_iwarp_msix, pf->iwarp_base_vector);
11487 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11491 i40e_dbg_pf_init(pf);
11493 /* tell the firmware that we're starting */
11494 i40e_send_version(pf);
11496 /* since everything's happy, start the service_task timer */
11497 mod_timer(&pf->service_timer,
11498 round_jiffies(jiffies + pf->service_timer_period));
11500 /* add this PF to client device list and launch a client service task */
11501 err = i40e_lan_add_device(pf);
11503 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11507 /* create FCoE interface */
11508 i40e_fcoe_vsi_setup(pf);
11511 #define PCI_SPEED_SIZE 8
11512 #define PCI_WIDTH_SIZE 8
11513 /* Devices on the IOSF bus do not have this information
11514 * and will report PCI Gen 1 x 1 by default so don't bother
11517 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11518 char speed[PCI_SPEED_SIZE] = "Unknown";
11519 char width[PCI_WIDTH_SIZE] = "Unknown";
11521 /* Get the negotiated link width and speed from PCI config
11524 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11527 i40e_set_pci_config_data(hw, link_status);
11529 switch (hw->bus.speed) {
11530 case i40e_bus_speed_8000:
11531 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11532 case i40e_bus_speed_5000:
11533 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11534 case i40e_bus_speed_2500:
11535 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11539 switch (hw->bus.width) {
11540 case i40e_bus_width_pcie_x8:
11541 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11542 case i40e_bus_width_pcie_x4:
11543 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11544 case i40e_bus_width_pcie_x2:
11545 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11546 case i40e_bus_width_pcie_x1:
11547 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11552 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11555 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11556 hw->bus.speed < i40e_bus_speed_8000) {
11557 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11558 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11562 /* get the requested speeds from the fw */
11563 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11565 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11566 i40e_stat_str(&pf->hw, err),
11567 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11568 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11570 /* get the supported phy types from the fw */
11571 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11573 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11574 i40e_stat_str(&pf->hw, err),
11575 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11577 /* Add a filter to drop all Flow control frames from any VSI from being
11578 * transmitted. By doing so we stop a malicious VF from sending out
11579 * PAUSE or PFC frames and potentially controlling traffic for other
11581 * The FW can still send Flow control frames if enabled.
11583 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11584 pf->main_vsi_seid);
11586 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11587 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11588 pf->flags |= I40E_FLAG_PHY_CONTROLS_LEDS;
11589 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
11590 pf->flags |= I40E_FLAG_HAVE_CRT_RETIMER;
11591 /* print a string summarizing features */
11592 i40e_print_features(pf);
11596 /* Unwind what we've done if something failed in the setup */
11598 set_bit(__I40E_DOWN, &pf->state);
11599 i40e_clear_interrupt_scheme(pf);
11602 i40e_reset_interrupt_capability(pf);
11603 del_timer_sync(&pf->service_timer);
11605 err_configure_lan_hmc:
11606 (void)i40e_shutdown_lan_hmc(hw);
11608 kfree(pf->qp_pile);
11612 iounmap(hw->hw_addr);
11616 pci_disable_pcie_error_reporting(pdev);
11617 pci_release_mem_regions(pdev);
11620 pci_disable_device(pdev);
11625 * i40e_remove - Device removal routine
11626 * @pdev: PCI device information struct
11628 * i40e_remove is called by the PCI subsystem to alert the driver
11629 * that is should release a PCI device. This could be caused by a
11630 * Hot-Plug event, or because the driver is going to be removed from
11633 static void i40e_remove(struct pci_dev *pdev)
11635 struct i40e_pf *pf = pci_get_drvdata(pdev);
11636 struct i40e_hw *hw = &pf->hw;
11637 i40e_status ret_code;
11640 i40e_dbg_pf_exit(pf);
11644 /* Disable RSS in hw */
11645 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11646 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11648 /* no more scheduling of any task */
11649 set_bit(__I40E_SUSPENDED, &pf->state);
11650 set_bit(__I40E_DOWN, &pf->state);
11651 if (pf->service_timer.data)
11652 del_timer_sync(&pf->service_timer);
11653 if (pf->service_task.func)
11654 cancel_work_sync(&pf->service_task);
11656 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11658 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11661 i40e_fdir_teardown(pf);
11663 /* If there is a switch structure or any orphans, remove them.
11664 * This will leave only the PF's VSI remaining.
11666 for (i = 0; i < I40E_MAX_VEB; i++) {
11670 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11671 pf->veb[i]->uplink_seid == 0)
11672 i40e_switch_branch_release(pf->veb[i]);
11675 /* Now we can shutdown the PF's VSI, just before we kill
11678 if (pf->vsi[pf->lan_vsi])
11679 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11681 /* remove attached clients */
11682 ret_code = i40e_lan_del_device(pf);
11684 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11688 /* shutdown and destroy the HMC */
11689 if (hw->hmc.hmc_obj) {
11690 ret_code = i40e_shutdown_lan_hmc(hw);
11692 dev_warn(&pdev->dev,
11693 "Failed to destroy the HMC resources: %d\n",
11697 /* shutdown the adminq */
11698 i40e_shutdown_adminq(hw);
11700 /* destroy the locks only once, here */
11701 mutex_destroy(&hw->aq.arq_mutex);
11702 mutex_destroy(&hw->aq.asq_mutex);
11704 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11705 i40e_clear_interrupt_scheme(pf);
11706 for (i = 0; i < pf->num_alloc_vsi; i++) {
11708 i40e_vsi_clear_rings(pf->vsi[i]);
11709 i40e_vsi_clear(pf->vsi[i]);
11714 for (i = 0; i < I40E_MAX_VEB; i++) {
11719 kfree(pf->qp_pile);
11722 iounmap(hw->hw_addr);
11724 pci_release_mem_regions(pdev);
11726 pci_disable_pcie_error_reporting(pdev);
11727 pci_disable_device(pdev);
11731 * i40e_pci_error_detected - warning that something funky happened in PCI land
11732 * @pdev: PCI device information struct
11734 * Called to warn that something happened and the error handling steps
11735 * are in progress. Allows the driver to quiesce things, be ready for
11738 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11739 enum pci_channel_state error)
11741 struct i40e_pf *pf = pci_get_drvdata(pdev);
11743 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11746 dev_info(&pdev->dev,
11747 "Cannot recover - error happened during device probe\n");
11748 return PCI_ERS_RESULT_DISCONNECT;
11751 /* shutdown all operations */
11752 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11754 i40e_prep_for_reset(pf);
11758 /* Request a slot reset */
11759 return PCI_ERS_RESULT_NEED_RESET;
11763 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11764 * @pdev: PCI device information struct
11766 * Called to find if the driver can work with the device now that
11767 * the pci slot has been reset. If a basic connection seems good
11768 * (registers are readable and have sane content) then return a
11769 * happy little PCI_ERS_RESULT_xxx.
11771 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11773 struct i40e_pf *pf = pci_get_drvdata(pdev);
11774 pci_ers_result_t result;
11778 dev_dbg(&pdev->dev, "%s\n", __func__);
11779 if (pci_enable_device_mem(pdev)) {
11780 dev_info(&pdev->dev,
11781 "Cannot re-enable PCI device after reset.\n");
11782 result = PCI_ERS_RESULT_DISCONNECT;
11784 pci_set_master(pdev);
11785 pci_restore_state(pdev);
11786 pci_save_state(pdev);
11787 pci_wake_from_d3(pdev, false);
11789 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11791 result = PCI_ERS_RESULT_RECOVERED;
11793 result = PCI_ERS_RESULT_DISCONNECT;
11796 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11798 dev_info(&pdev->dev,
11799 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11801 /* non-fatal, continue */
11808 * i40e_pci_error_resume - restart operations after PCI error recovery
11809 * @pdev: PCI device information struct
11811 * Called to allow the driver to bring things back up after PCI error
11812 * and/or reset recovery has finished.
11814 static void i40e_pci_error_resume(struct pci_dev *pdev)
11816 struct i40e_pf *pf = pci_get_drvdata(pdev);
11818 dev_dbg(&pdev->dev, "%s\n", __func__);
11819 if (test_bit(__I40E_SUSPENDED, &pf->state))
11823 i40e_handle_reset_warning(pf);
11828 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
11829 * using the mac_address_write admin q function
11830 * @pf: pointer to i40e_pf struct
11832 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
11834 struct i40e_hw *hw = &pf->hw;
11839 /* Get current MAC address in case it's an LAA */
11840 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
11841 ether_addr_copy(mac_addr,
11842 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
11844 dev_err(&pf->pdev->dev,
11845 "Failed to retrieve MAC address; using default\n");
11846 ether_addr_copy(mac_addr, hw->mac.addr);
11849 /* The FW expects the mac address write cmd to first be called with
11850 * one of these flags before calling it again with the multicast
11853 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
11855 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
11856 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
11858 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11860 dev_err(&pf->pdev->dev,
11861 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
11865 flags = I40E_AQC_MC_MAG_EN
11866 | I40E_AQC_WOL_PRESERVE_ON_PFR
11867 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
11868 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
11870 dev_err(&pf->pdev->dev,
11871 "Failed to enable Multicast Magic Packet wake up\n");
11875 * i40e_shutdown - PCI callback for shutting down
11876 * @pdev: PCI device information struct
11878 static void i40e_shutdown(struct pci_dev *pdev)
11880 struct i40e_pf *pf = pci_get_drvdata(pdev);
11881 struct i40e_hw *hw = &pf->hw;
11883 set_bit(__I40E_SUSPENDED, &pf->state);
11884 set_bit(__I40E_DOWN, &pf->state);
11886 i40e_prep_for_reset(pf);
11889 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11890 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11892 del_timer_sync(&pf->service_timer);
11893 cancel_work_sync(&pf->service_task);
11894 i40e_fdir_teardown(pf);
11896 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11897 i40e_enable_mc_magic_wake(pf);
11900 i40e_prep_for_reset(pf);
11903 wr32(hw, I40E_PFPM_APM,
11904 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11905 wr32(hw, I40E_PFPM_WUFC,
11906 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11908 i40e_clear_interrupt_scheme(pf);
11910 if (system_state == SYSTEM_POWER_OFF) {
11911 pci_wake_from_d3(pdev, pf->wol_en);
11912 pci_set_power_state(pdev, PCI_D3hot);
11918 * i40e_suspend - PCI callback for moving to D3
11919 * @pdev: PCI device information struct
11921 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11923 struct i40e_pf *pf = pci_get_drvdata(pdev);
11924 struct i40e_hw *hw = &pf->hw;
11927 set_bit(__I40E_SUSPENDED, &pf->state);
11928 set_bit(__I40E_DOWN, &pf->state);
11930 if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE))
11931 i40e_enable_mc_magic_wake(pf);
11934 i40e_prep_for_reset(pf);
11937 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11938 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11940 i40e_stop_misc_vector(pf);
11942 retval = pci_save_state(pdev);
11946 pci_wake_from_d3(pdev, pf->wol_en);
11947 pci_set_power_state(pdev, PCI_D3hot);
11953 * i40e_resume - PCI callback for waking up from D3
11954 * @pdev: PCI device information struct
11956 static int i40e_resume(struct pci_dev *pdev)
11958 struct i40e_pf *pf = pci_get_drvdata(pdev);
11961 pci_set_power_state(pdev, PCI_D0);
11962 pci_restore_state(pdev);
11963 /* pci_restore_state() clears dev->state_saves, so
11964 * call pci_save_state() again to restore it.
11966 pci_save_state(pdev);
11968 err = pci_enable_device_mem(pdev);
11970 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11973 pci_set_master(pdev);
11975 /* no wakeup events while running */
11976 pci_wake_from_d3(pdev, false);
11978 /* handling the reset will rebuild the device state */
11979 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11980 clear_bit(__I40E_DOWN, &pf->state);
11982 i40e_reset_and_rebuild(pf, false);
11990 static const struct pci_error_handlers i40e_err_handler = {
11991 .error_detected = i40e_pci_error_detected,
11992 .slot_reset = i40e_pci_error_slot_reset,
11993 .resume = i40e_pci_error_resume,
11996 static struct pci_driver i40e_driver = {
11997 .name = i40e_driver_name,
11998 .id_table = i40e_pci_tbl,
11999 .probe = i40e_probe,
12000 .remove = i40e_remove,
12002 .suspend = i40e_suspend,
12003 .resume = i40e_resume,
12005 .shutdown = i40e_shutdown,
12006 .err_handler = &i40e_err_handler,
12007 .sriov_configure = i40e_pci_sriov_configure,
12011 * i40e_init_module - Driver registration routine
12013 * i40e_init_module is the first routine called when the driver is
12014 * loaded. All it does is register with the PCI subsystem.
12016 static int __init i40e_init_module(void)
12018 pr_info("%s: %s - version %s\n", i40e_driver_name,
12019 i40e_driver_string, i40e_driver_version_str);
12020 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
12022 /* we will see if single thread per module is enough for now,
12023 * it can't be any worse than using the system workqueue which
12024 * was already single threaded
12026 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
12029 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
12034 return pci_register_driver(&i40e_driver);
12036 module_init(i40e_init_module);
12039 * i40e_exit_module - Driver exit cleanup routine
12041 * i40e_exit_module is called just before the driver is removed
12044 static void __exit i40e_exit_module(void)
12046 pci_unregister_driver(&i40e_driver);
12047 destroy_workqueue(i40e_wq);
12050 module_exit(i40e_exit_module);