1 /* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/vmalloc.h>
29 #include <linux/pagemap.h>
30 #include <linux/delay.h>
31 #include <linux/netdevice.h>
32 #include <linux/interrupt.h>
33 #include <linux/tcp.h>
34 #include <linux/ipv6.h>
35 #include <linux/slab.h>
36 #include <net/checksum.h>
37 #include <net/ip6_checksum.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/cpu.h>
41 #include <linux/smp.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/aer.h>
45 #include <linux/prefetch.h>
49 #define DRV_EXTRAVERSION "-k"
51 #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
52 char e1000e_driver_name[] = "e1000e";
53 const char e1000e_driver_version[] = DRV_VERSION;
55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
56 static int debug = -1;
57 module_param(debug, int, 0);
58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
60 static const struct e1000_info *e1000_info_tbl[] = {
61 [board_82571] = &e1000_82571_info,
62 [board_82572] = &e1000_82572_info,
63 [board_82573] = &e1000_82573_info,
64 [board_82574] = &e1000_82574_info,
65 [board_82583] = &e1000_82583_info,
66 [board_80003es2lan] = &e1000_es2_info,
67 [board_ich8lan] = &e1000_ich8_info,
68 [board_ich9lan] = &e1000_ich9_info,
69 [board_ich10lan] = &e1000_ich10_info,
70 [board_pchlan] = &e1000_pch_info,
71 [board_pch2lan] = &e1000_pch2_info,
72 [board_pch_lpt] = &e1000_pch_lpt_info,
75 struct e1000_reg_info {
80 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
81 /* General Registers */
83 {E1000_STATUS, "STATUS"},
84 {E1000_CTRL_EXT, "CTRL_EXT"},
86 /* Interrupt Registers */
91 {E1000_RDLEN(0), "RDLEN"},
92 {E1000_RDH(0), "RDH"},
93 {E1000_RDT(0), "RDT"},
95 {E1000_RXDCTL(0), "RXDCTL"},
97 {E1000_RDBAL(0), "RDBAL"},
98 {E1000_RDBAH(0), "RDBAH"},
100 {E1000_RDFT, "RDFT"},
101 {E1000_RDFHS, "RDFHS"},
102 {E1000_RDFTS, "RDFTS"},
103 {E1000_RDFPC, "RDFPC"},
106 {E1000_TCTL, "TCTL"},
107 {E1000_TDBAL(0), "TDBAL"},
108 {E1000_TDBAH(0), "TDBAH"},
109 {E1000_TDLEN(0), "TDLEN"},
110 {E1000_TDH(0), "TDH"},
111 {E1000_TDT(0), "TDT"},
112 {E1000_TIDV, "TIDV"},
113 {E1000_TXDCTL(0), "TXDCTL"},
114 {E1000_TADV, "TADV"},
115 {E1000_TARC(0), "TARC"},
116 {E1000_TDFH, "TDFH"},
117 {E1000_TDFT, "TDFT"},
118 {E1000_TDFHS, "TDFHS"},
119 {E1000_TDFTS, "TDFTS"},
120 {E1000_TDFPC, "TDFPC"},
122 /* List Terminator */
127 * e1000_regdump - register printout routine
128 * @hw: pointer to the HW structure
129 * @reginfo: pointer to the register info table
131 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
137 switch (reginfo->ofs) {
138 case E1000_RXDCTL(0):
139 for (n = 0; n < 2; n++)
140 regs[n] = __er32(hw, E1000_RXDCTL(n));
142 case E1000_TXDCTL(0):
143 for (n = 0; n < 2; n++)
144 regs[n] = __er32(hw, E1000_TXDCTL(n));
147 for (n = 0; n < 2; n++)
148 regs[n] = __er32(hw, E1000_TARC(n));
151 pr_info("%-15s %08x\n",
152 reginfo->name, __er32(hw, reginfo->ofs));
156 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
157 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
160 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
161 struct e1000_buffer *bi)
164 struct e1000_ps_page *ps_page;
166 for (i = 0; i < adapter->rx_ps_pages; i++) {
167 ps_page = &bi->ps_pages[i];
170 pr_info("packet dump for ps_page %d:\n", i);
171 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
172 16, 1, page_address(ps_page->page),
179 * e1000e_dump - Print registers, Tx-ring and Rx-ring
180 * @adapter: board private structure
182 static void e1000e_dump(struct e1000_adapter *adapter)
184 struct net_device *netdev = adapter->netdev;
185 struct e1000_hw *hw = &adapter->hw;
186 struct e1000_reg_info *reginfo;
187 struct e1000_ring *tx_ring = adapter->tx_ring;
188 struct e1000_tx_desc *tx_desc;
193 struct e1000_buffer *buffer_info;
194 struct e1000_ring *rx_ring = adapter->rx_ring;
195 union e1000_rx_desc_packet_split *rx_desc_ps;
196 union e1000_rx_desc_extended *rx_desc;
206 if (!netif_msg_hw(adapter))
209 /* Print netdevice Info */
211 dev_info(&adapter->pdev->dev, "Net device Info\n");
212 pr_info("Device Name state trans_start last_rx\n");
213 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
214 netdev->state, netdev->trans_start, netdev->last_rx);
217 /* Print Registers */
218 dev_info(&adapter->pdev->dev, "Register Dump\n");
219 pr_info(" Register Name Value\n");
220 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
221 reginfo->name; reginfo++) {
222 e1000_regdump(hw, reginfo);
225 /* Print Tx Ring Summary */
226 if (!netdev || !netif_running(netdev))
229 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
230 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
231 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
232 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
233 0, tx_ring->next_to_use, tx_ring->next_to_clean,
234 (unsigned long long)buffer_info->dma,
236 buffer_info->next_to_watch,
237 (unsigned long long)buffer_info->time_stamp);
240 if (!netif_msg_tx_done(adapter))
241 goto rx_ring_summary;
243 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
245 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
247 * Legacy Transmit Descriptor
248 * +--------------------------------------------------------------+
249 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
250 * +--------------------------------------------------------------+
251 * 8 | Special | CSS | Status | CMD | CSO | Length |
252 * +--------------------------------------------------------------+
253 * 63 48 47 36 35 32 31 24 23 16 15 0
255 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
256 * 63 48 47 40 39 32 31 16 15 8 7 0
257 * +----------------------------------------------------------------+
258 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
259 * +----------------------------------------------------------------+
260 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
261 * +----------------------------------------------------------------+
262 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 * Extended Data Descriptor (DTYP=0x1)
265 * +----------------------------------------------------------------+
266 * 0 | Buffer Address [63:0] |
267 * +----------------------------------------------------------------+
268 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
269 * +----------------------------------------------------------------+
270 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
272 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
273 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
274 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
275 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
276 const char *next_desc;
277 tx_desc = E1000_TX_DESC(*tx_ring, i);
278 buffer_info = &tx_ring->buffer_info[i];
279 u0 = (struct my_u0 *)tx_desc;
280 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
281 next_desc = " NTC/U";
282 else if (i == tx_ring->next_to_use)
284 else if (i == tx_ring->next_to_clean)
288 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
289 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
290 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
292 (unsigned long long)le64_to_cpu(u0->a),
293 (unsigned long long)le64_to_cpu(u0->b),
294 (unsigned long long)buffer_info->dma,
295 buffer_info->length, buffer_info->next_to_watch,
296 (unsigned long long)buffer_info->time_stamp,
297 buffer_info->skb, next_desc);
299 if (netif_msg_pktdata(adapter) && buffer_info->skb)
300 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
301 16, 1, buffer_info->skb->data,
302 buffer_info->skb->len, true);
305 /* Print Rx Ring Summary */
307 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
308 pr_info("Queue [NTU] [NTC]\n");
309 pr_info(" %5d %5X %5X\n",
310 0, rx_ring->next_to_use, rx_ring->next_to_clean);
313 if (!netif_msg_rx_status(adapter))
316 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
317 switch (adapter->rx_ps_pages) {
321 /* [Extended] Packet Split Receive Descriptor Format
323 * +-----------------------------------------------------+
324 * 0 | Buffer Address 0 [63:0] |
325 * +-----------------------------------------------------+
326 * 8 | Buffer Address 1 [63:0] |
327 * +-----------------------------------------------------+
328 * 16 | Buffer Address 2 [63:0] |
329 * +-----------------------------------------------------+
330 * 24 | Buffer Address 3 [63:0] |
331 * +-----------------------------------------------------+
333 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
334 /* [Extended] Receive Descriptor (Write-Back) Format
336 * 63 48 47 32 31 13 12 8 7 4 3 0
337 * +------------------------------------------------------+
338 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
339 * | Checksum | Ident | | Queue | | Type |
340 * +------------------------------------------------------+
341 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
342 * +------------------------------------------------------+
343 * 63 48 47 32 31 20 19 0
345 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
346 for (i = 0; i < rx_ring->count; i++) {
347 const char *next_desc;
348 buffer_info = &rx_ring->buffer_info[i];
349 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
350 u1 = (struct my_u1 *)rx_desc_ps;
352 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
354 if (i == rx_ring->next_to_use)
356 else if (i == rx_ring->next_to_clean)
361 if (staterr & E1000_RXD_STAT_DD) {
362 /* Descriptor Done */
363 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
365 (unsigned long long)le64_to_cpu(u1->a),
366 (unsigned long long)le64_to_cpu(u1->b),
367 (unsigned long long)le64_to_cpu(u1->c),
368 (unsigned long long)le64_to_cpu(u1->d),
369 buffer_info->skb, next_desc);
371 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
373 (unsigned long long)le64_to_cpu(u1->a),
374 (unsigned long long)le64_to_cpu(u1->b),
375 (unsigned long long)le64_to_cpu(u1->c),
376 (unsigned long long)le64_to_cpu(u1->d),
377 (unsigned long long)buffer_info->dma,
378 buffer_info->skb, next_desc);
380 if (netif_msg_pktdata(adapter))
381 e1000e_dump_ps_pages(adapter,
388 /* Extended Receive Descriptor (Read) Format
390 * +-----------------------------------------------------+
391 * 0 | Buffer Address [63:0] |
392 * +-----------------------------------------------------+
394 * +-----------------------------------------------------+
396 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
397 /* Extended Receive Descriptor (Write-Back) Format
399 * 63 48 47 32 31 24 23 4 3 0
400 * +------------------------------------------------------+
402 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
403 * | Packet | IP | | | Type |
404 * | Checksum | Ident | | | |
405 * +------------------------------------------------------+
406 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
407 * +------------------------------------------------------+
408 * 63 48 47 32 31 20 19 0
410 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
412 for (i = 0; i < rx_ring->count; i++) {
413 const char *next_desc;
415 buffer_info = &rx_ring->buffer_info[i];
416 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
417 u1 = (struct my_u1 *)rx_desc;
418 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
420 if (i == rx_ring->next_to_use)
422 else if (i == rx_ring->next_to_clean)
427 if (staterr & E1000_RXD_STAT_DD) {
428 /* Descriptor Done */
429 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
431 (unsigned long long)le64_to_cpu(u1->a),
432 (unsigned long long)le64_to_cpu(u1->b),
433 buffer_info->skb, next_desc);
435 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
437 (unsigned long long)le64_to_cpu(u1->a),
438 (unsigned long long)le64_to_cpu(u1->b),
439 (unsigned long long)buffer_info->dma,
440 buffer_info->skb, next_desc);
442 if (netif_msg_pktdata(adapter) &&
444 print_hex_dump(KERN_INFO, "",
445 DUMP_PREFIX_ADDRESS, 16,
447 buffer_info->skb->data,
448 adapter->rx_buffer_len,
456 * e1000_desc_unused - calculate if we have unused descriptors
458 static int e1000_desc_unused(struct e1000_ring *ring)
460 if (ring->next_to_clean > ring->next_to_use)
461 return ring->next_to_clean - ring->next_to_use - 1;
463 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
467 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
468 * @adapter: board private structure
469 * @hwtstamps: time stamp structure to update
470 * @systim: unsigned 64bit system time value.
472 * Convert the system time value stored in the RX/TXSTMP registers into a
473 * hwtstamp which can be used by the upper level time stamping functions.
475 * The 'systim_lock' spinlock is used to protect the consistency of the
476 * system time value. This is needed because reading the 64 bit time
477 * value involves reading two 32 bit registers. The first read latches the
480 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
481 struct skb_shared_hwtstamps *hwtstamps,
487 spin_lock_irqsave(&adapter->systim_lock, flags);
488 ns = timecounter_cyc2time(&adapter->tc, systim);
489 spin_unlock_irqrestore(&adapter->systim_lock, flags);
491 memset(hwtstamps, 0, sizeof(*hwtstamps));
492 hwtstamps->hwtstamp = ns_to_ktime(ns);
496 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
497 * @adapter: board private structure
498 * @status: descriptor extended error and status field
499 * @skb: particular skb to include time stamp
501 * If the time stamp is valid, convert it into the timecounter ns value
502 * and store that result into the shhwtstamps structure which is passed
503 * up the network stack.
505 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
508 struct e1000_hw *hw = &adapter->hw;
511 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
512 !(status & E1000_RXDEXT_STATERR_TST) ||
513 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
516 /* The Rx time stamp registers contain the time stamp. No other
517 * received packet will be time stamped until the Rx time stamp
518 * registers are read. Because only one packet can be time stamped
519 * at a time, the register values must belong to this packet and
520 * therefore none of the other additional attributes need to be
523 rxstmp = (u64)er32(RXSTMPL);
524 rxstmp |= (u64)er32(RXSTMPH) << 32;
525 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
527 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
531 * e1000_receive_skb - helper function to handle Rx indications
532 * @adapter: board private structure
533 * @staterr: descriptor extended error and status field as written by hardware
534 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
535 * @skb: pointer to sk_buff to be indicated to stack
537 static void e1000_receive_skb(struct e1000_adapter *adapter,
538 struct net_device *netdev, struct sk_buff *skb,
539 u32 staterr, __le16 vlan)
541 u16 tag = le16_to_cpu(vlan);
543 e1000e_rx_hwtstamp(adapter, staterr, skb);
545 skb->protocol = eth_type_trans(skb, netdev);
547 if (staterr & E1000_RXD_STAT_VP)
548 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
550 napi_gro_receive(&adapter->napi, skb);
554 * e1000_rx_checksum - Receive Checksum Offload
555 * @adapter: board private structure
556 * @status_err: receive descriptor status and error fields
557 * @csum: receive descriptor csum field
558 * @sk_buff: socket buffer with received data
560 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
563 u16 status = (u16)status_err;
564 u8 errors = (u8)(status_err >> 24);
566 skb_checksum_none_assert(skb);
568 /* Rx checksum disabled */
569 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
572 /* Ignore Checksum bit is set */
573 if (status & E1000_RXD_STAT_IXSM)
576 /* TCP/UDP checksum error bit or IP checksum error bit is set */
577 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
578 /* let the stack verify checksum errors */
579 adapter->hw_csum_err++;
583 /* TCP/UDP Checksum has not been calculated */
584 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
587 /* It must be a TCP or UDP packet with a valid checksum */
588 skb->ip_summed = CHECKSUM_UNNECESSARY;
589 adapter->hw_csum_good++;
592 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
594 struct e1000_adapter *adapter = rx_ring->adapter;
595 struct e1000_hw *hw = &adapter->hw;
596 s32 ret_val = __ew32_prepare(hw);
598 writel(i, rx_ring->tail);
600 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
601 u32 rctl = er32(RCTL);
602 ew32(RCTL, rctl & ~E1000_RCTL_EN);
603 e_err("ME firmware caused invalid RDT - resetting\n");
604 schedule_work(&adapter->reset_task);
608 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
610 struct e1000_adapter *adapter = tx_ring->adapter;
611 struct e1000_hw *hw = &adapter->hw;
612 s32 ret_val = __ew32_prepare(hw);
614 writel(i, tx_ring->tail);
616 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
617 u32 tctl = er32(TCTL);
618 ew32(TCTL, tctl & ~E1000_TCTL_EN);
619 e_err("ME firmware caused invalid TDT - resetting\n");
620 schedule_work(&adapter->reset_task);
625 * e1000_alloc_rx_buffers - Replace used receive buffers
626 * @rx_ring: Rx descriptor ring
628 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
629 int cleaned_count, gfp_t gfp)
631 struct e1000_adapter *adapter = rx_ring->adapter;
632 struct net_device *netdev = adapter->netdev;
633 struct pci_dev *pdev = adapter->pdev;
634 union e1000_rx_desc_extended *rx_desc;
635 struct e1000_buffer *buffer_info;
638 unsigned int bufsz = adapter->rx_buffer_len;
640 i = rx_ring->next_to_use;
641 buffer_info = &rx_ring->buffer_info[i];
643 while (cleaned_count--) {
644 skb = buffer_info->skb;
650 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
652 /* Better luck next round */
653 adapter->alloc_rx_buff_failed++;
657 buffer_info->skb = skb;
659 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
660 adapter->rx_buffer_len,
662 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
663 dev_err(&pdev->dev, "Rx DMA map failed\n");
664 adapter->rx_dma_failed++;
668 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
669 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
671 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
672 /* Force memory writes to complete before letting h/w
673 * know there are new descriptors to fetch. (Only
674 * applicable for weak-ordered memory model archs,
678 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
679 e1000e_update_rdt_wa(rx_ring, i);
681 writel(i, rx_ring->tail);
684 if (i == rx_ring->count)
686 buffer_info = &rx_ring->buffer_info[i];
689 rx_ring->next_to_use = i;
693 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
694 * @rx_ring: Rx descriptor ring
696 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
697 int cleaned_count, gfp_t gfp)
699 struct e1000_adapter *adapter = rx_ring->adapter;
700 struct net_device *netdev = adapter->netdev;
701 struct pci_dev *pdev = adapter->pdev;
702 union e1000_rx_desc_packet_split *rx_desc;
703 struct e1000_buffer *buffer_info;
704 struct e1000_ps_page *ps_page;
708 i = rx_ring->next_to_use;
709 buffer_info = &rx_ring->buffer_info[i];
711 while (cleaned_count--) {
712 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
714 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
715 ps_page = &buffer_info->ps_pages[j];
716 if (j >= adapter->rx_ps_pages) {
717 /* all unused desc entries get hw null ptr */
718 rx_desc->read.buffer_addr[j + 1] =
722 if (!ps_page->page) {
723 ps_page->page = alloc_page(gfp);
724 if (!ps_page->page) {
725 adapter->alloc_rx_buff_failed++;
728 ps_page->dma = dma_map_page(&pdev->dev,
732 if (dma_mapping_error(&pdev->dev,
734 dev_err(&adapter->pdev->dev,
735 "Rx DMA page map failed\n");
736 adapter->rx_dma_failed++;
740 /* Refresh the desc even if buffer_addrs
741 * didn't change because each write-back
744 rx_desc->read.buffer_addr[j + 1] =
745 cpu_to_le64(ps_page->dma);
748 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
752 adapter->alloc_rx_buff_failed++;
756 buffer_info->skb = skb;
757 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
758 adapter->rx_ps_bsize0,
760 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
761 dev_err(&pdev->dev, "Rx DMA map failed\n");
762 adapter->rx_dma_failed++;
764 dev_kfree_skb_any(skb);
765 buffer_info->skb = NULL;
769 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
771 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
772 /* Force memory writes to complete before letting h/w
773 * know there are new descriptors to fetch. (Only
774 * applicable for weak-ordered memory model archs,
778 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
779 e1000e_update_rdt_wa(rx_ring, i << 1);
781 writel(i << 1, rx_ring->tail);
785 if (i == rx_ring->count)
787 buffer_info = &rx_ring->buffer_info[i];
791 rx_ring->next_to_use = i;
795 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
796 * @rx_ring: Rx descriptor ring
797 * @cleaned_count: number of buffers to allocate this pass
800 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
801 int cleaned_count, gfp_t gfp)
803 struct e1000_adapter *adapter = rx_ring->adapter;
804 struct net_device *netdev = adapter->netdev;
805 struct pci_dev *pdev = adapter->pdev;
806 union e1000_rx_desc_extended *rx_desc;
807 struct e1000_buffer *buffer_info;
810 unsigned int bufsz = 256 - 16; /* for skb_reserve */
812 i = rx_ring->next_to_use;
813 buffer_info = &rx_ring->buffer_info[i];
815 while (cleaned_count--) {
816 skb = buffer_info->skb;
822 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
823 if (unlikely(!skb)) {
824 /* Better luck next round */
825 adapter->alloc_rx_buff_failed++;
829 buffer_info->skb = skb;
831 /* allocate a new page if necessary */
832 if (!buffer_info->page) {
833 buffer_info->page = alloc_page(gfp);
834 if (unlikely(!buffer_info->page)) {
835 adapter->alloc_rx_buff_failed++;
840 if (!buffer_info->dma) {
841 buffer_info->dma = dma_map_page(&pdev->dev,
842 buffer_info->page, 0,
845 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
846 adapter->alloc_rx_buff_failed++;
851 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
852 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
854 if (unlikely(++i == rx_ring->count))
856 buffer_info = &rx_ring->buffer_info[i];
859 if (likely(rx_ring->next_to_use != i)) {
860 rx_ring->next_to_use = i;
861 if (unlikely(i-- == 0))
862 i = (rx_ring->count - 1);
864 /* Force memory writes to complete before letting h/w
865 * know there are new descriptors to fetch. (Only
866 * applicable for weak-ordered memory model archs,
870 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
871 e1000e_update_rdt_wa(rx_ring, i);
873 writel(i, rx_ring->tail);
877 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
880 if (netdev->features & NETIF_F_RXHASH)
881 skb->rxhash = le32_to_cpu(rss);
885 * e1000_clean_rx_irq - Send received data up the network stack
886 * @rx_ring: Rx descriptor ring
888 * the return value indicates whether actual cleaning was done, there
889 * is no guarantee that everything was cleaned
891 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
894 struct e1000_adapter *adapter = rx_ring->adapter;
895 struct net_device *netdev = adapter->netdev;
896 struct pci_dev *pdev = adapter->pdev;
897 struct e1000_hw *hw = &adapter->hw;
898 union e1000_rx_desc_extended *rx_desc, *next_rxd;
899 struct e1000_buffer *buffer_info, *next_buffer;
902 int cleaned_count = 0;
903 bool cleaned = false;
904 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
906 i = rx_ring->next_to_clean;
907 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
908 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
909 buffer_info = &rx_ring->buffer_info[i];
911 while (staterr & E1000_RXD_STAT_DD) {
914 if (*work_done >= work_to_do)
917 rmb(); /* read descriptor and rx_buffer_info after status DD */
919 skb = buffer_info->skb;
920 buffer_info->skb = NULL;
922 prefetch(skb->data - NET_IP_ALIGN);
925 if (i == rx_ring->count)
927 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
930 next_buffer = &rx_ring->buffer_info[i];
934 dma_unmap_single(&pdev->dev, buffer_info->dma,
935 adapter->rx_buffer_len, DMA_FROM_DEVICE);
936 buffer_info->dma = 0;
938 length = le16_to_cpu(rx_desc->wb.upper.length);
940 /* !EOP means multiple descriptors were used to store a single
941 * packet, if that's the case we need to toss it. In fact, we
942 * need to toss every packet with the EOP bit clear and the
943 * next frame that _does_ have the EOP bit set, as it is by
944 * definition only a frame fragment
946 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
947 adapter->flags2 |= FLAG2_IS_DISCARDING;
949 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
950 /* All receives must fit into a single buffer */
951 e_dbg("Receive packet consumed multiple buffers\n");
953 buffer_info->skb = skb;
954 if (staterr & E1000_RXD_STAT_EOP)
955 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
959 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
960 !(netdev->features & NETIF_F_RXALL))) {
962 buffer_info->skb = skb;
966 /* adjust length to remove Ethernet CRC */
967 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
968 /* If configured to store CRC, don't subtract FCS,
969 * but keep the FCS bytes out of the total_rx_bytes
972 if (netdev->features & NETIF_F_RXFCS)
978 total_rx_bytes += length;
981 /* code added for copybreak, this should improve
982 * performance for small packets with large amounts
983 * of reassembly being done in the stack
985 if (length < copybreak) {
986 struct sk_buff *new_skb =
987 netdev_alloc_skb_ip_align(netdev, length);
989 skb_copy_to_linear_data_offset(new_skb,
995 /* save the skb in buffer_info as good */
996 buffer_info->skb = skb;
999 /* else just continue with the old one */
1001 /* end copybreak code */
1002 skb_put(skb, length);
1004 /* Receive Checksum Offload */
1005 e1000_rx_checksum(adapter, staterr, skb);
1007 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1009 e1000_receive_skb(adapter, netdev, skb, staterr,
1010 rx_desc->wb.upper.vlan);
1013 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1015 /* return some buffers to hardware, one at a time is too slow */
1016 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1017 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1022 /* use prefetched values */
1024 buffer_info = next_buffer;
1026 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1028 rx_ring->next_to_clean = i;
1030 cleaned_count = e1000_desc_unused(rx_ring);
1032 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1034 adapter->total_rx_bytes += total_rx_bytes;
1035 adapter->total_rx_packets += total_rx_packets;
1039 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1040 struct e1000_buffer *buffer_info)
1042 struct e1000_adapter *adapter = tx_ring->adapter;
1044 if (buffer_info->dma) {
1045 if (buffer_info->mapped_as_page)
1046 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1047 buffer_info->length, DMA_TO_DEVICE);
1049 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1050 buffer_info->length, DMA_TO_DEVICE);
1051 buffer_info->dma = 0;
1053 if (buffer_info->skb) {
1054 dev_kfree_skb_any(buffer_info->skb);
1055 buffer_info->skb = NULL;
1057 buffer_info->time_stamp = 0;
1060 static void e1000_print_hw_hang(struct work_struct *work)
1062 struct e1000_adapter *adapter = container_of(work,
1063 struct e1000_adapter,
1065 struct net_device *netdev = adapter->netdev;
1066 struct e1000_ring *tx_ring = adapter->tx_ring;
1067 unsigned int i = tx_ring->next_to_clean;
1068 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1069 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1070 struct e1000_hw *hw = &adapter->hw;
1071 u16 phy_status, phy_1000t_status, phy_ext_status;
1074 if (test_bit(__E1000_DOWN, &adapter->state))
1077 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1078 /* May be block on write-back, flush and detect again
1079 * flush pending descriptor writebacks to memory
1081 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1082 /* execute the writes immediately */
1084 /* Due to rare timing issues, write to TIDV again to ensure
1085 * the write is successful
1087 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1088 /* execute the writes immediately */
1090 adapter->tx_hang_recheck = true;
1093 /* Real hang detected */
1094 adapter->tx_hang_recheck = false;
1095 netif_stop_queue(netdev);
1097 e1e_rphy(hw, MII_BMSR, &phy_status);
1098 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1099 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1101 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1103 /* detected Hardware unit hang */
1104 e_err("Detected Hardware Unit Hang:\n"
1107 " next_to_use <%x>\n"
1108 " next_to_clean <%x>\n"
1109 "buffer_info[next_to_clean]:\n"
1110 " time_stamp <%lx>\n"
1111 " next_to_watch <%x>\n"
1113 " next_to_watch.status <%x>\n"
1116 "PHY 1000BASE-T Status <%x>\n"
1117 "PHY Extended Status <%x>\n"
1118 "PCI Status <%x>\n",
1119 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1120 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1121 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1122 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1124 /* Suggest workaround for known h/w issue */
1125 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1126 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1130 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1131 * @work: pointer to work struct
1133 * This work function polls the TSYNCTXCTL valid bit to determine when a
1134 * timestamp has been taken for the current stored skb. The timestamp must
1135 * be for this skb because only one such packet is allowed in the queue.
1137 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1139 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1141 struct e1000_hw *hw = &adapter->hw;
1143 if (!adapter->tx_hwtstamp_skb)
1146 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1147 struct skb_shared_hwtstamps shhwtstamps;
1150 txstmp = er32(TXSTMPL);
1151 txstmp |= (u64)er32(TXSTMPH) << 32;
1153 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1155 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1156 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1157 adapter->tx_hwtstamp_skb = NULL;
1159 /* reschedule to check later */
1160 schedule_work(&adapter->tx_hwtstamp_work);
1165 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1166 * @tx_ring: Tx descriptor ring
1168 * the return value indicates whether actual cleaning was done, there
1169 * is no guarantee that everything was cleaned
1171 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1173 struct e1000_adapter *adapter = tx_ring->adapter;
1174 struct net_device *netdev = adapter->netdev;
1175 struct e1000_hw *hw = &adapter->hw;
1176 struct e1000_tx_desc *tx_desc, *eop_desc;
1177 struct e1000_buffer *buffer_info;
1178 unsigned int i, eop;
1179 unsigned int count = 0;
1180 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1181 unsigned int bytes_compl = 0, pkts_compl = 0;
1183 i = tx_ring->next_to_clean;
1184 eop = tx_ring->buffer_info[i].next_to_watch;
1185 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1187 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1188 (count < tx_ring->count)) {
1189 bool cleaned = false;
1190 rmb(); /* read buffer_info after eop_desc */
1191 for (; !cleaned; count++) {
1192 tx_desc = E1000_TX_DESC(*tx_ring, i);
1193 buffer_info = &tx_ring->buffer_info[i];
1194 cleaned = (i == eop);
1197 total_tx_packets += buffer_info->segs;
1198 total_tx_bytes += buffer_info->bytecount;
1199 if (buffer_info->skb) {
1200 bytes_compl += buffer_info->skb->len;
1205 e1000_put_txbuf(tx_ring, buffer_info);
1206 tx_desc->upper.data = 0;
1209 if (i == tx_ring->count)
1213 if (i == tx_ring->next_to_use)
1215 eop = tx_ring->buffer_info[i].next_to_watch;
1216 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1219 tx_ring->next_to_clean = i;
1221 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1223 #define TX_WAKE_THRESHOLD 32
1224 if (count && netif_carrier_ok(netdev) &&
1225 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1226 /* Make sure that anybody stopping the queue after this
1227 * sees the new next_to_clean.
1231 if (netif_queue_stopped(netdev) &&
1232 !(test_bit(__E1000_DOWN, &adapter->state))) {
1233 netif_wake_queue(netdev);
1234 ++adapter->restart_queue;
1238 if (adapter->detect_tx_hung) {
1239 /* Detect a transmit hang in hardware, this serializes the
1240 * check with the clearing of time_stamp and movement of i
1242 adapter->detect_tx_hung = false;
1243 if (tx_ring->buffer_info[i].time_stamp &&
1244 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1245 + (adapter->tx_timeout_factor * HZ)) &&
1246 !(er32(STATUS) & E1000_STATUS_TXOFF))
1247 schedule_work(&adapter->print_hang_task);
1249 adapter->tx_hang_recheck = false;
1251 adapter->total_tx_bytes += total_tx_bytes;
1252 adapter->total_tx_packets += total_tx_packets;
1253 return count < tx_ring->count;
1257 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1258 * @rx_ring: Rx descriptor ring
1260 * the return value indicates whether actual cleaning was done, there
1261 * is no guarantee that everything was cleaned
1263 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1266 struct e1000_adapter *adapter = rx_ring->adapter;
1267 struct e1000_hw *hw = &adapter->hw;
1268 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1269 struct net_device *netdev = adapter->netdev;
1270 struct pci_dev *pdev = adapter->pdev;
1271 struct e1000_buffer *buffer_info, *next_buffer;
1272 struct e1000_ps_page *ps_page;
1273 struct sk_buff *skb;
1275 u32 length, staterr;
1276 int cleaned_count = 0;
1277 bool cleaned = false;
1278 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1280 i = rx_ring->next_to_clean;
1281 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1282 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1283 buffer_info = &rx_ring->buffer_info[i];
1285 while (staterr & E1000_RXD_STAT_DD) {
1286 if (*work_done >= work_to_do)
1289 skb = buffer_info->skb;
1290 rmb(); /* read descriptor and rx_buffer_info after status DD */
1292 /* in the packet split case this is header only */
1293 prefetch(skb->data - NET_IP_ALIGN);
1296 if (i == rx_ring->count)
1298 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1301 next_buffer = &rx_ring->buffer_info[i];
1305 dma_unmap_single(&pdev->dev, buffer_info->dma,
1306 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1307 buffer_info->dma = 0;
1309 /* see !EOP comment in other Rx routine */
1310 if (!(staterr & E1000_RXD_STAT_EOP))
1311 adapter->flags2 |= FLAG2_IS_DISCARDING;
1313 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1314 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1315 dev_kfree_skb_irq(skb);
1316 if (staterr & E1000_RXD_STAT_EOP)
1317 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1321 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1322 !(netdev->features & NETIF_F_RXALL))) {
1323 dev_kfree_skb_irq(skb);
1327 length = le16_to_cpu(rx_desc->wb.middle.length0);
1330 e_dbg("Last part of the packet spanning multiple descriptors\n");
1331 dev_kfree_skb_irq(skb);
1336 skb_put(skb, length);
1339 /* this looks ugly, but it seems compiler issues make
1340 * it more efficient than reusing j
1342 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1344 /* page alloc/put takes too long and effects small
1345 * packet throughput, so unsplit small packets and
1346 * save the alloc/put only valid in softirq (napi)
1347 * context to call kmap_*
1349 if (l1 && (l1 <= copybreak) &&
1350 ((length + l1) <= adapter->rx_ps_bsize0)) {
1353 ps_page = &buffer_info->ps_pages[0];
1355 /* there is no documentation about how to call
1356 * kmap_atomic, so we can't hold the mapping
1359 dma_sync_single_for_cpu(&pdev->dev,
1363 vaddr = kmap_atomic(ps_page->page);
1364 memcpy(skb_tail_pointer(skb), vaddr, l1);
1365 kunmap_atomic(vaddr);
1366 dma_sync_single_for_device(&pdev->dev,
1371 /* remove the CRC */
1372 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1373 if (!(netdev->features & NETIF_F_RXFCS))
1382 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1383 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1387 ps_page = &buffer_info->ps_pages[j];
1388 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1391 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1392 ps_page->page = NULL;
1394 skb->data_len += length;
1395 skb->truesize += PAGE_SIZE;
1398 /* strip the ethernet crc, problem is we're using pages now so
1399 * this whole operation can get a little cpu intensive
1401 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1402 if (!(netdev->features & NETIF_F_RXFCS))
1403 pskb_trim(skb, skb->len - 4);
1407 total_rx_bytes += skb->len;
1410 e1000_rx_checksum(adapter, staterr, skb);
1412 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1414 if (rx_desc->wb.upper.header_status &
1415 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1416 adapter->rx_hdr_split++;
1418 e1000_receive_skb(adapter, netdev, skb, staterr,
1419 rx_desc->wb.middle.vlan);
1422 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1423 buffer_info->skb = NULL;
1425 /* return some buffers to hardware, one at a time is too slow */
1426 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1427 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1432 /* use prefetched values */
1434 buffer_info = next_buffer;
1436 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1438 rx_ring->next_to_clean = i;
1440 cleaned_count = e1000_desc_unused(rx_ring);
1442 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1444 adapter->total_rx_bytes += total_rx_bytes;
1445 adapter->total_rx_packets += total_rx_packets;
1450 * e1000_consume_page - helper function
1452 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1457 skb->data_len += length;
1458 skb->truesize += PAGE_SIZE;
1462 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1463 * @adapter: board private structure
1465 * the return value indicates whether actual cleaning was done, there
1466 * is no guarantee that everything was cleaned
1468 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1471 struct e1000_adapter *adapter = rx_ring->adapter;
1472 struct net_device *netdev = adapter->netdev;
1473 struct pci_dev *pdev = adapter->pdev;
1474 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1475 struct e1000_buffer *buffer_info, *next_buffer;
1476 u32 length, staterr;
1478 int cleaned_count = 0;
1479 bool cleaned = false;
1480 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1481 struct skb_shared_info *shinfo;
1483 i = rx_ring->next_to_clean;
1484 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1485 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1486 buffer_info = &rx_ring->buffer_info[i];
1488 while (staterr & E1000_RXD_STAT_DD) {
1489 struct sk_buff *skb;
1491 if (*work_done >= work_to_do)
1494 rmb(); /* read descriptor and rx_buffer_info after status DD */
1496 skb = buffer_info->skb;
1497 buffer_info->skb = NULL;
1500 if (i == rx_ring->count)
1502 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1505 next_buffer = &rx_ring->buffer_info[i];
1509 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1511 buffer_info->dma = 0;
1513 length = le16_to_cpu(rx_desc->wb.upper.length);
1515 /* errors is only valid for DD + EOP descriptors */
1516 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1517 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1518 !(netdev->features & NETIF_F_RXALL)))) {
1519 /* recycle both page and skb */
1520 buffer_info->skb = skb;
1521 /* an error means any chain goes out the window too */
1522 if (rx_ring->rx_skb_top)
1523 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1524 rx_ring->rx_skb_top = NULL;
1527 #define rxtop (rx_ring->rx_skb_top)
1528 if (!(staterr & E1000_RXD_STAT_EOP)) {
1529 /* this descriptor is only the beginning (or middle) */
1531 /* this is the beginning of a chain */
1533 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1536 /* this is the middle of a chain */
1537 shinfo = skb_shinfo(rxtop);
1538 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1539 buffer_info->page, 0,
1541 /* re-use the skb, only consumed the page */
1542 buffer_info->skb = skb;
1544 e1000_consume_page(buffer_info, rxtop, length);
1548 /* end of the chain */
1549 shinfo = skb_shinfo(rxtop);
1550 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1551 buffer_info->page, 0,
1553 /* re-use the current skb, we only consumed the
1556 buffer_info->skb = skb;
1559 e1000_consume_page(buffer_info, skb, length);
1561 /* no chain, got EOP, this buf is the packet
1562 * copybreak to save the put_page/alloc_page
1564 if (length <= copybreak &&
1565 skb_tailroom(skb) >= length) {
1567 vaddr = kmap_atomic(buffer_info->page);
1568 memcpy(skb_tail_pointer(skb), vaddr,
1570 kunmap_atomic(vaddr);
1571 /* re-use the page, so don't erase
1574 skb_put(skb, length);
1576 skb_fill_page_desc(skb, 0,
1577 buffer_info->page, 0,
1579 e1000_consume_page(buffer_info, skb,
1585 /* Receive Checksum Offload */
1586 e1000_rx_checksum(adapter, staterr, skb);
1588 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1590 /* probably a little skewed due to removing CRC */
1591 total_rx_bytes += skb->len;
1594 /* eth type trans needs skb->data to point to something */
1595 if (!pskb_may_pull(skb, ETH_HLEN)) {
1596 e_err("pskb_may_pull failed.\n");
1597 dev_kfree_skb_irq(skb);
1601 e1000_receive_skb(adapter, netdev, skb, staterr,
1602 rx_desc->wb.upper.vlan);
1605 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1607 /* return some buffers to hardware, one at a time is too slow */
1608 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1609 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1614 /* use prefetched values */
1616 buffer_info = next_buffer;
1618 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1620 rx_ring->next_to_clean = i;
1622 cleaned_count = e1000_desc_unused(rx_ring);
1624 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1626 adapter->total_rx_bytes += total_rx_bytes;
1627 adapter->total_rx_packets += total_rx_packets;
1632 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1633 * @rx_ring: Rx descriptor ring
1635 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1637 struct e1000_adapter *adapter = rx_ring->adapter;
1638 struct e1000_buffer *buffer_info;
1639 struct e1000_ps_page *ps_page;
1640 struct pci_dev *pdev = adapter->pdev;
1643 /* Free all the Rx ring sk_buffs */
1644 for (i = 0; i < rx_ring->count; i++) {
1645 buffer_info = &rx_ring->buffer_info[i];
1646 if (buffer_info->dma) {
1647 if (adapter->clean_rx == e1000_clean_rx_irq)
1648 dma_unmap_single(&pdev->dev, buffer_info->dma,
1649 adapter->rx_buffer_len,
1651 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1652 dma_unmap_page(&pdev->dev, buffer_info->dma,
1653 PAGE_SIZE, DMA_FROM_DEVICE);
1654 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1655 dma_unmap_single(&pdev->dev, buffer_info->dma,
1656 adapter->rx_ps_bsize0,
1658 buffer_info->dma = 0;
1661 if (buffer_info->page) {
1662 put_page(buffer_info->page);
1663 buffer_info->page = NULL;
1666 if (buffer_info->skb) {
1667 dev_kfree_skb(buffer_info->skb);
1668 buffer_info->skb = NULL;
1671 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1672 ps_page = &buffer_info->ps_pages[j];
1675 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1678 put_page(ps_page->page);
1679 ps_page->page = NULL;
1683 /* there also may be some cached data from a chained receive */
1684 if (rx_ring->rx_skb_top) {
1685 dev_kfree_skb(rx_ring->rx_skb_top);
1686 rx_ring->rx_skb_top = NULL;
1689 /* Zero out the descriptor ring */
1690 memset(rx_ring->desc, 0, rx_ring->size);
1692 rx_ring->next_to_clean = 0;
1693 rx_ring->next_to_use = 0;
1694 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1696 writel(0, rx_ring->head);
1697 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1698 e1000e_update_rdt_wa(rx_ring, 0);
1700 writel(0, rx_ring->tail);
1703 static void e1000e_downshift_workaround(struct work_struct *work)
1705 struct e1000_adapter *adapter = container_of(work,
1706 struct e1000_adapter,
1709 if (test_bit(__E1000_DOWN, &adapter->state))
1712 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1716 * e1000_intr_msi - Interrupt Handler
1717 * @irq: interrupt number
1718 * @data: pointer to a network interface device structure
1720 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1722 struct net_device *netdev = data;
1723 struct e1000_adapter *adapter = netdev_priv(netdev);
1724 struct e1000_hw *hw = &adapter->hw;
1725 u32 icr = er32(ICR);
1727 /* read ICR disables interrupts using IAM */
1728 if (icr & E1000_ICR_LSC) {
1729 hw->mac.get_link_status = true;
1730 /* ICH8 workaround-- Call gig speed drop workaround on cable
1731 * disconnect (LSC) before accessing any PHY registers
1733 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1734 (!(er32(STATUS) & E1000_STATUS_LU)))
1735 schedule_work(&adapter->downshift_task);
1737 /* 80003ES2LAN workaround-- For packet buffer work-around on
1738 * link down event; disable receives here in the ISR and reset
1739 * adapter in watchdog
1741 if (netif_carrier_ok(netdev) &&
1742 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1743 /* disable receives */
1744 u32 rctl = er32(RCTL);
1745 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1746 adapter->flags |= FLAG_RESTART_NOW;
1748 /* guard against interrupt when we're going down */
1749 if (!test_bit(__E1000_DOWN, &adapter->state))
1750 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1753 /* Reset on uncorrectable ECC error */
1754 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1755 u32 pbeccsts = er32(PBECCSTS);
1757 adapter->corr_errors +=
1758 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1759 adapter->uncorr_errors +=
1760 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1761 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1763 /* Do the reset outside of interrupt context */
1764 schedule_work(&adapter->reset_task);
1766 /* return immediately since reset is imminent */
1770 if (napi_schedule_prep(&adapter->napi)) {
1771 adapter->total_tx_bytes = 0;
1772 adapter->total_tx_packets = 0;
1773 adapter->total_rx_bytes = 0;
1774 adapter->total_rx_packets = 0;
1775 __napi_schedule(&adapter->napi);
1782 * e1000_intr - Interrupt Handler
1783 * @irq: interrupt number
1784 * @data: pointer to a network interface device structure
1786 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1788 struct net_device *netdev = data;
1789 struct e1000_adapter *adapter = netdev_priv(netdev);
1790 struct e1000_hw *hw = &adapter->hw;
1791 u32 rctl, icr = er32(ICR);
1793 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1794 return IRQ_NONE; /* Not our interrupt */
1796 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1797 * not set, then the adapter didn't send an interrupt
1799 if (!(icr & E1000_ICR_INT_ASSERTED))
1802 /* Interrupt Auto-Mask...upon reading ICR,
1803 * interrupts are masked. No need for the
1807 if (icr & E1000_ICR_LSC) {
1808 hw->mac.get_link_status = true;
1809 /* ICH8 workaround-- Call gig speed drop workaround on cable
1810 * disconnect (LSC) before accessing any PHY registers
1812 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1813 (!(er32(STATUS) & E1000_STATUS_LU)))
1814 schedule_work(&adapter->downshift_task);
1816 /* 80003ES2LAN workaround--
1817 * For packet buffer work-around on link down event;
1818 * disable receives here in the ISR and
1819 * reset adapter in watchdog
1821 if (netif_carrier_ok(netdev) &&
1822 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1823 /* disable receives */
1825 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1826 adapter->flags |= FLAG_RESTART_NOW;
1828 /* guard against interrupt when we're going down */
1829 if (!test_bit(__E1000_DOWN, &adapter->state))
1830 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1833 /* Reset on uncorrectable ECC error */
1834 if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
1835 u32 pbeccsts = er32(PBECCSTS);
1837 adapter->corr_errors +=
1838 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1839 adapter->uncorr_errors +=
1840 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1841 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1843 /* Do the reset outside of interrupt context */
1844 schedule_work(&adapter->reset_task);
1846 /* return immediately since reset is imminent */
1850 if (napi_schedule_prep(&adapter->napi)) {
1851 adapter->total_tx_bytes = 0;
1852 adapter->total_tx_packets = 0;
1853 adapter->total_rx_bytes = 0;
1854 adapter->total_rx_packets = 0;
1855 __napi_schedule(&adapter->napi);
1861 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1863 struct net_device *netdev = data;
1864 struct e1000_adapter *adapter = netdev_priv(netdev);
1865 struct e1000_hw *hw = &adapter->hw;
1866 u32 icr = er32(ICR);
1868 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1869 if (!test_bit(__E1000_DOWN, &adapter->state))
1870 ew32(IMS, E1000_IMS_OTHER);
1874 if (icr & adapter->eiac_mask)
1875 ew32(ICS, (icr & adapter->eiac_mask));
1877 if (icr & E1000_ICR_OTHER) {
1878 if (!(icr & E1000_ICR_LSC))
1879 goto no_link_interrupt;
1880 hw->mac.get_link_status = true;
1881 /* guard against interrupt when we're going down */
1882 if (!test_bit(__E1000_DOWN, &adapter->state))
1883 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1887 if (!test_bit(__E1000_DOWN, &adapter->state))
1888 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1893 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1895 struct net_device *netdev = data;
1896 struct e1000_adapter *adapter = netdev_priv(netdev);
1897 struct e1000_hw *hw = &adapter->hw;
1898 struct e1000_ring *tx_ring = adapter->tx_ring;
1900 adapter->total_tx_bytes = 0;
1901 adapter->total_tx_packets = 0;
1903 if (!e1000_clean_tx_irq(tx_ring))
1904 /* Ring was not completely cleaned, so fire another interrupt */
1905 ew32(ICS, tx_ring->ims_val);
1910 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1912 struct net_device *netdev = data;
1913 struct e1000_adapter *adapter = netdev_priv(netdev);
1914 struct e1000_ring *rx_ring = adapter->rx_ring;
1916 /* Write the ITR value calculated at the end of the
1917 * previous interrupt.
1919 if (rx_ring->set_itr) {
1920 writel(1000000000 / (rx_ring->itr_val * 256),
1921 rx_ring->itr_register);
1922 rx_ring->set_itr = 0;
1925 if (napi_schedule_prep(&adapter->napi)) {
1926 adapter->total_rx_bytes = 0;
1927 adapter->total_rx_packets = 0;
1928 __napi_schedule(&adapter->napi);
1934 * e1000_configure_msix - Configure MSI-X hardware
1936 * e1000_configure_msix sets up the hardware to properly
1937 * generate MSI-X interrupts.
1939 static void e1000_configure_msix(struct e1000_adapter *adapter)
1941 struct e1000_hw *hw = &adapter->hw;
1942 struct e1000_ring *rx_ring = adapter->rx_ring;
1943 struct e1000_ring *tx_ring = adapter->tx_ring;
1945 u32 ctrl_ext, ivar = 0;
1947 adapter->eiac_mask = 0;
1949 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1950 if (hw->mac.type == e1000_82574) {
1951 u32 rfctl = er32(RFCTL);
1952 rfctl |= E1000_RFCTL_ACK_DIS;
1956 /* Configure Rx vector */
1957 rx_ring->ims_val = E1000_IMS_RXQ0;
1958 adapter->eiac_mask |= rx_ring->ims_val;
1959 if (rx_ring->itr_val)
1960 writel(1000000000 / (rx_ring->itr_val * 256),
1961 rx_ring->itr_register);
1963 writel(1, rx_ring->itr_register);
1964 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1966 /* Configure Tx vector */
1967 tx_ring->ims_val = E1000_IMS_TXQ0;
1969 if (tx_ring->itr_val)
1970 writel(1000000000 / (tx_ring->itr_val * 256),
1971 tx_ring->itr_register);
1973 writel(1, tx_ring->itr_register);
1974 adapter->eiac_mask |= tx_ring->ims_val;
1975 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1977 /* set vector for Other Causes, e.g. link changes */
1979 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1980 if (rx_ring->itr_val)
1981 writel(1000000000 / (rx_ring->itr_val * 256),
1982 hw->hw_addr + E1000_EITR_82574(vector));
1984 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1986 /* Cause Tx interrupts on every write back */
1991 /* enable MSI-X PBA support */
1992 ctrl_ext = er32(CTRL_EXT);
1993 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1995 /* Auto-Mask Other interrupts upon ICR read */
1996 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1997 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1998 ew32(CTRL_EXT, ctrl_ext);
2002 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2004 if (adapter->msix_entries) {
2005 pci_disable_msix(adapter->pdev);
2006 kfree(adapter->msix_entries);
2007 adapter->msix_entries = NULL;
2008 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2009 pci_disable_msi(adapter->pdev);
2010 adapter->flags &= ~FLAG_MSI_ENABLED;
2015 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2017 * Attempt to configure interrupts using the best available
2018 * capabilities of the hardware and kernel.
2020 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2025 switch (adapter->int_mode) {
2026 case E1000E_INT_MODE_MSIX:
2027 if (adapter->flags & FLAG_HAS_MSIX) {
2028 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2029 adapter->msix_entries = kcalloc(adapter->num_vectors,
2033 if (adapter->msix_entries) {
2034 struct e1000_adapter *a = adapter;
2036 for (i = 0; i < adapter->num_vectors; i++)
2037 adapter->msix_entries[i].entry = i;
2039 err = pci_enable_msix_range(a->pdev,
2046 /* MSI-X failed, so fall through and try MSI */
2047 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2048 e1000e_reset_interrupt_capability(adapter);
2050 adapter->int_mode = E1000E_INT_MODE_MSI;
2052 case E1000E_INT_MODE_MSI:
2053 if (!pci_enable_msi(adapter->pdev)) {
2054 adapter->flags |= FLAG_MSI_ENABLED;
2056 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2057 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2060 case E1000E_INT_MODE_LEGACY:
2061 /* Don't do anything; this is the system default */
2065 /* store the number of vectors being used */
2066 adapter->num_vectors = 1;
2070 * e1000_request_msix - Initialize MSI-X interrupts
2072 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2075 static int e1000_request_msix(struct e1000_adapter *adapter)
2077 struct net_device *netdev = adapter->netdev;
2078 int err = 0, vector = 0;
2080 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2081 snprintf(adapter->rx_ring->name,
2082 sizeof(adapter->rx_ring->name) - 1,
2083 "%s-rx-0", netdev->name);
2085 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2086 err = request_irq(adapter->msix_entries[vector].vector,
2087 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2091 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2092 E1000_EITR_82574(vector);
2093 adapter->rx_ring->itr_val = adapter->itr;
2096 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2097 snprintf(adapter->tx_ring->name,
2098 sizeof(adapter->tx_ring->name) - 1,
2099 "%s-tx-0", netdev->name);
2101 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2102 err = request_irq(adapter->msix_entries[vector].vector,
2103 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2107 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2108 E1000_EITR_82574(vector);
2109 adapter->tx_ring->itr_val = adapter->itr;
2112 err = request_irq(adapter->msix_entries[vector].vector,
2113 e1000_msix_other, 0, netdev->name, netdev);
2117 e1000_configure_msix(adapter);
2123 * e1000_request_irq - initialize interrupts
2125 * Attempts to configure interrupts using the best available
2126 * capabilities of the hardware and kernel.
2128 static int e1000_request_irq(struct e1000_adapter *adapter)
2130 struct net_device *netdev = adapter->netdev;
2133 if (adapter->msix_entries) {
2134 err = e1000_request_msix(adapter);
2137 /* fall back to MSI */
2138 e1000e_reset_interrupt_capability(adapter);
2139 adapter->int_mode = E1000E_INT_MODE_MSI;
2140 e1000e_set_interrupt_capability(adapter);
2142 if (adapter->flags & FLAG_MSI_ENABLED) {
2143 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2144 netdev->name, netdev);
2148 /* fall back to legacy interrupt */
2149 e1000e_reset_interrupt_capability(adapter);
2150 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2153 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2154 netdev->name, netdev);
2156 e_err("Unable to allocate interrupt, Error: %d\n", err);
2161 static void e1000_free_irq(struct e1000_adapter *adapter)
2163 struct net_device *netdev = adapter->netdev;
2165 if (adapter->msix_entries) {
2168 free_irq(adapter->msix_entries[vector].vector, netdev);
2171 free_irq(adapter->msix_entries[vector].vector, netdev);
2174 /* Other Causes interrupt vector */
2175 free_irq(adapter->msix_entries[vector].vector, netdev);
2179 free_irq(adapter->pdev->irq, netdev);
2183 * e1000_irq_disable - Mask off interrupt generation on the NIC
2185 static void e1000_irq_disable(struct e1000_adapter *adapter)
2187 struct e1000_hw *hw = &adapter->hw;
2190 if (adapter->msix_entries)
2191 ew32(EIAC_82574, 0);
2194 if (adapter->msix_entries) {
2196 for (i = 0; i < adapter->num_vectors; i++)
2197 synchronize_irq(adapter->msix_entries[i].vector);
2199 synchronize_irq(adapter->pdev->irq);
2204 * e1000_irq_enable - Enable default interrupt generation settings
2206 static void e1000_irq_enable(struct e1000_adapter *adapter)
2208 struct e1000_hw *hw = &adapter->hw;
2210 if (adapter->msix_entries) {
2211 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2212 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2213 } else if (hw->mac.type == e1000_pch_lpt) {
2214 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2216 ew32(IMS, IMS_ENABLE_MASK);
2222 * e1000e_get_hw_control - get control of the h/w from f/w
2223 * @adapter: address of board private structure
2225 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2226 * For ASF and Pass Through versions of f/w this means that
2227 * the driver is loaded. For AMT version (only with 82573)
2228 * of the f/w this means that the network i/f is open.
2230 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2232 struct e1000_hw *hw = &adapter->hw;
2236 /* Let firmware know the driver has taken over */
2237 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2239 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2240 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2241 ctrl_ext = er32(CTRL_EXT);
2242 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2247 * e1000e_release_hw_control - release control of the h/w to f/w
2248 * @adapter: address of board private structure
2250 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2251 * For ASF and Pass Through versions of f/w this means that the
2252 * driver is no longer loaded. For AMT version (only with 82573) i
2253 * of the f/w this means that the network i/f is closed.
2256 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2258 struct e1000_hw *hw = &adapter->hw;
2262 /* Let firmware taken over control of h/w */
2263 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2265 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2266 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2267 ctrl_ext = er32(CTRL_EXT);
2268 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2273 * e1000_alloc_ring_dma - allocate memory for a ring structure
2275 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2276 struct e1000_ring *ring)
2278 struct pci_dev *pdev = adapter->pdev;
2280 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2289 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2290 * @tx_ring: Tx descriptor ring
2292 * Return 0 on success, negative on failure
2294 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2296 struct e1000_adapter *adapter = tx_ring->adapter;
2297 int err = -ENOMEM, size;
2299 size = sizeof(struct e1000_buffer) * tx_ring->count;
2300 tx_ring->buffer_info = vzalloc(size);
2301 if (!tx_ring->buffer_info)
2304 /* round up to nearest 4K */
2305 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2306 tx_ring->size = ALIGN(tx_ring->size, 4096);
2308 err = e1000_alloc_ring_dma(adapter, tx_ring);
2312 tx_ring->next_to_use = 0;
2313 tx_ring->next_to_clean = 0;
2317 vfree(tx_ring->buffer_info);
2318 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2323 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2324 * @rx_ring: Rx descriptor ring
2326 * Returns 0 on success, negative on failure
2328 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2330 struct e1000_adapter *adapter = rx_ring->adapter;
2331 struct e1000_buffer *buffer_info;
2332 int i, size, desc_len, err = -ENOMEM;
2334 size = sizeof(struct e1000_buffer) * rx_ring->count;
2335 rx_ring->buffer_info = vzalloc(size);
2336 if (!rx_ring->buffer_info)
2339 for (i = 0; i < rx_ring->count; i++) {
2340 buffer_info = &rx_ring->buffer_info[i];
2341 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2342 sizeof(struct e1000_ps_page),
2344 if (!buffer_info->ps_pages)
2348 desc_len = sizeof(union e1000_rx_desc_packet_split);
2350 /* Round up to nearest 4K */
2351 rx_ring->size = rx_ring->count * desc_len;
2352 rx_ring->size = ALIGN(rx_ring->size, 4096);
2354 err = e1000_alloc_ring_dma(adapter, rx_ring);
2358 rx_ring->next_to_clean = 0;
2359 rx_ring->next_to_use = 0;
2360 rx_ring->rx_skb_top = NULL;
2365 for (i = 0; i < rx_ring->count; i++) {
2366 buffer_info = &rx_ring->buffer_info[i];
2367 kfree(buffer_info->ps_pages);
2370 vfree(rx_ring->buffer_info);
2371 e_err("Unable to allocate memory for the receive descriptor ring\n");
2376 * e1000_clean_tx_ring - Free Tx Buffers
2377 * @tx_ring: Tx descriptor ring
2379 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2381 struct e1000_adapter *adapter = tx_ring->adapter;
2382 struct e1000_buffer *buffer_info;
2386 for (i = 0; i < tx_ring->count; i++) {
2387 buffer_info = &tx_ring->buffer_info[i];
2388 e1000_put_txbuf(tx_ring, buffer_info);
2391 netdev_reset_queue(adapter->netdev);
2392 size = sizeof(struct e1000_buffer) * tx_ring->count;
2393 memset(tx_ring->buffer_info, 0, size);
2395 memset(tx_ring->desc, 0, tx_ring->size);
2397 tx_ring->next_to_use = 0;
2398 tx_ring->next_to_clean = 0;
2400 writel(0, tx_ring->head);
2401 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2402 e1000e_update_tdt_wa(tx_ring, 0);
2404 writel(0, tx_ring->tail);
2408 * e1000e_free_tx_resources - Free Tx Resources per Queue
2409 * @tx_ring: Tx descriptor ring
2411 * Free all transmit software resources
2413 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2415 struct e1000_adapter *adapter = tx_ring->adapter;
2416 struct pci_dev *pdev = adapter->pdev;
2418 e1000_clean_tx_ring(tx_ring);
2420 vfree(tx_ring->buffer_info);
2421 tx_ring->buffer_info = NULL;
2423 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2425 tx_ring->desc = NULL;
2429 * e1000e_free_rx_resources - Free Rx Resources
2430 * @rx_ring: Rx descriptor ring
2432 * Free all receive software resources
2434 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2436 struct e1000_adapter *adapter = rx_ring->adapter;
2437 struct pci_dev *pdev = adapter->pdev;
2440 e1000_clean_rx_ring(rx_ring);
2442 for (i = 0; i < rx_ring->count; i++)
2443 kfree(rx_ring->buffer_info[i].ps_pages);
2445 vfree(rx_ring->buffer_info);
2446 rx_ring->buffer_info = NULL;
2448 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2450 rx_ring->desc = NULL;
2454 * e1000_update_itr - update the dynamic ITR value based on statistics
2455 * @adapter: pointer to adapter
2456 * @itr_setting: current adapter->itr
2457 * @packets: the number of packets during this measurement interval
2458 * @bytes: the number of bytes during this measurement interval
2460 * Stores a new ITR value based on packets and byte
2461 * counts during the last interrupt. The advantage of per interrupt
2462 * computation is faster updates and more accurate ITR for the current
2463 * traffic pattern. Constants in this function were computed
2464 * based on theoretical maximum wire speed and thresholds were set based
2465 * on testing data as well as attempting to minimize response time
2466 * while increasing bulk throughput. This functionality is controlled
2467 * by the InterruptThrottleRate module parameter.
2469 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2471 unsigned int retval = itr_setting;
2476 switch (itr_setting) {
2477 case lowest_latency:
2478 /* handle TSO and jumbo frames */
2479 if (bytes / packets > 8000)
2480 retval = bulk_latency;
2481 else if ((packets < 5) && (bytes > 512))
2482 retval = low_latency;
2484 case low_latency: /* 50 usec aka 20000 ints/s */
2485 if (bytes > 10000) {
2486 /* this if handles the TSO accounting */
2487 if (bytes / packets > 8000)
2488 retval = bulk_latency;
2489 else if ((packets < 10) || ((bytes / packets) > 1200))
2490 retval = bulk_latency;
2491 else if ((packets > 35))
2492 retval = lowest_latency;
2493 } else if (bytes / packets > 2000) {
2494 retval = bulk_latency;
2495 } else if (packets <= 2 && bytes < 512) {
2496 retval = lowest_latency;
2499 case bulk_latency: /* 250 usec aka 4000 ints/s */
2500 if (bytes > 25000) {
2502 retval = low_latency;
2503 } else if (bytes < 6000) {
2504 retval = low_latency;
2512 static void e1000_set_itr(struct e1000_adapter *adapter)
2515 u32 new_itr = adapter->itr;
2517 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2518 if (adapter->link_speed != SPEED_1000) {
2524 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2529 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2530 adapter->total_tx_packets,
2531 adapter->total_tx_bytes);
2532 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2533 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2534 adapter->tx_itr = low_latency;
2536 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2537 adapter->total_rx_packets,
2538 adapter->total_rx_bytes);
2539 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2540 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2541 adapter->rx_itr = low_latency;
2543 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2545 /* counts and packets in update_itr are dependent on these numbers */
2546 switch (current_itr) {
2547 case lowest_latency:
2551 new_itr = 20000; /* aka hwitr = ~200 */
2561 if (new_itr != adapter->itr) {
2562 /* this attempts to bias the interrupt rate towards Bulk
2563 * by adding intermediate steps when interrupt rate is
2566 new_itr = new_itr > adapter->itr ?
2567 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2568 adapter->itr = new_itr;
2569 adapter->rx_ring->itr_val = new_itr;
2570 if (adapter->msix_entries)
2571 adapter->rx_ring->set_itr = 1;
2573 e1000e_write_itr(adapter, new_itr);
2578 * e1000e_write_itr - write the ITR value to the appropriate registers
2579 * @adapter: address of board private structure
2580 * @itr: new ITR value to program
2582 * e1000e_write_itr determines if the adapter is in MSI-X mode
2583 * and, if so, writes the EITR registers with the ITR value.
2584 * Otherwise, it writes the ITR value into the ITR register.
2586 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2588 struct e1000_hw *hw = &adapter->hw;
2589 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2591 if (adapter->msix_entries) {
2594 for (vector = 0; vector < adapter->num_vectors; vector++)
2595 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2602 * e1000_alloc_queues - Allocate memory for all rings
2603 * @adapter: board private structure to initialize
2605 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2607 int size = sizeof(struct e1000_ring);
2609 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2610 if (!adapter->tx_ring)
2612 adapter->tx_ring->count = adapter->tx_ring_count;
2613 adapter->tx_ring->adapter = adapter;
2615 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2616 if (!adapter->rx_ring)
2618 adapter->rx_ring->count = adapter->rx_ring_count;
2619 adapter->rx_ring->adapter = adapter;
2623 e_err("Unable to allocate memory for queues\n");
2624 kfree(adapter->rx_ring);
2625 kfree(adapter->tx_ring);
2630 * e1000e_poll - NAPI Rx polling callback
2631 * @napi: struct associated with this polling callback
2632 * @weight: number of packets driver is allowed to process this poll
2634 static int e1000e_poll(struct napi_struct *napi, int weight)
2636 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2638 struct e1000_hw *hw = &adapter->hw;
2639 struct net_device *poll_dev = adapter->netdev;
2640 int tx_cleaned = 1, work_done = 0;
2642 adapter = netdev_priv(poll_dev);
2644 if (!adapter->msix_entries ||
2645 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2646 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2648 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2653 /* If weight not fully consumed, exit the polling mode */
2654 if (work_done < weight) {
2655 if (adapter->itr_setting & 3)
2656 e1000_set_itr(adapter);
2657 napi_complete(napi);
2658 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2659 if (adapter->msix_entries)
2660 ew32(IMS, adapter->rx_ring->ims_val);
2662 e1000_irq_enable(adapter);
2669 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2670 __always_unused __be16 proto, u16 vid)
2672 struct e1000_adapter *adapter = netdev_priv(netdev);
2673 struct e1000_hw *hw = &adapter->hw;
2676 /* don't update vlan cookie if already programmed */
2677 if ((adapter->hw.mng_cookie.status &
2678 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2679 (vid == adapter->mng_vlan_id))
2682 /* add VID to filter table */
2683 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2684 index = (vid >> 5) & 0x7F;
2685 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2686 vfta |= (1 << (vid & 0x1F));
2687 hw->mac.ops.write_vfta(hw, index, vfta);
2690 set_bit(vid, adapter->active_vlans);
2695 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2696 __always_unused __be16 proto, u16 vid)
2698 struct e1000_adapter *adapter = netdev_priv(netdev);
2699 struct e1000_hw *hw = &adapter->hw;
2702 if ((adapter->hw.mng_cookie.status &
2703 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2704 (vid == adapter->mng_vlan_id)) {
2705 /* release control to f/w */
2706 e1000e_release_hw_control(adapter);
2710 /* remove VID from filter table */
2711 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2712 index = (vid >> 5) & 0x7F;
2713 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2714 vfta &= ~(1 << (vid & 0x1F));
2715 hw->mac.ops.write_vfta(hw, index, vfta);
2718 clear_bit(vid, adapter->active_vlans);
2724 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2725 * @adapter: board private structure to initialize
2727 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2729 struct net_device *netdev = adapter->netdev;
2730 struct e1000_hw *hw = &adapter->hw;
2733 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2734 /* disable VLAN receive filtering */
2736 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2739 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2740 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2741 adapter->mng_vlan_id);
2742 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2748 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2749 * @adapter: board private structure to initialize
2751 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2753 struct e1000_hw *hw = &adapter->hw;
2756 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2757 /* enable VLAN receive filtering */
2759 rctl |= E1000_RCTL_VFE;
2760 rctl &= ~E1000_RCTL_CFIEN;
2766 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2767 * @adapter: board private structure to initialize
2769 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2771 struct e1000_hw *hw = &adapter->hw;
2774 /* disable VLAN tag insert/strip */
2776 ctrl &= ~E1000_CTRL_VME;
2781 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2782 * @adapter: board private structure to initialize
2784 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2786 struct e1000_hw *hw = &adapter->hw;
2789 /* enable VLAN tag insert/strip */
2791 ctrl |= E1000_CTRL_VME;
2795 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2797 struct net_device *netdev = adapter->netdev;
2798 u16 vid = adapter->hw.mng_cookie.vlan_id;
2799 u16 old_vid = adapter->mng_vlan_id;
2801 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2802 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2803 adapter->mng_vlan_id = vid;
2806 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2807 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2810 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2814 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2816 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2817 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2820 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2822 struct e1000_hw *hw = &adapter->hw;
2823 u32 manc, manc2h, mdef, i, j;
2825 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2830 /* enable receiving management packets to the host. this will probably
2831 * generate destination unreachable messages from the host OS, but
2832 * the packets will be handled on SMBUS
2834 manc |= E1000_MANC_EN_MNG2HOST;
2835 manc2h = er32(MANC2H);
2837 switch (hw->mac.type) {
2839 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2843 /* Check if IPMI pass-through decision filter already exists;
2846 for (i = 0, j = 0; i < 8; i++) {
2847 mdef = er32(MDEF(i));
2849 /* Ignore filters with anything other than IPMI ports */
2850 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2853 /* Enable this decision filter in MANC2H */
2860 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2863 /* Create new decision filter in an empty filter */
2864 for (i = 0, j = 0; i < 8; i++)
2865 if (er32(MDEF(i)) == 0) {
2866 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2867 E1000_MDEF_PORT_664));
2874 e_warn("Unable to create IPMI pass-through filter\n");
2878 ew32(MANC2H, manc2h);
2883 * e1000_configure_tx - Configure Transmit Unit after Reset
2884 * @adapter: board private structure
2886 * Configure the Tx unit of the MAC after a reset.
2888 static void e1000_configure_tx(struct e1000_adapter *adapter)
2890 struct e1000_hw *hw = &adapter->hw;
2891 struct e1000_ring *tx_ring = adapter->tx_ring;
2895 /* Setup the HW Tx Head and Tail descriptor pointers */
2896 tdba = tx_ring->dma;
2897 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2898 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2899 ew32(TDBAH(0), (tdba >> 32));
2900 ew32(TDLEN(0), tdlen);
2903 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2904 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2906 /* Set the Tx Interrupt Delay register */
2907 ew32(TIDV, adapter->tx_int_delay);
2908 /* Tx irq moderation */
2909 ew32(TADV, adapter->tx_abs_int_delay);
2911 if (adapter->flags2 & FLAG2_DMA_BURST) {
2912 u32 txdctl = er32(TXDCTL(0));
2913 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2914 E1000_TXDCTL_WTHRESH);
2915 /* set up some performance related parameters to encourage the
2916 * hardware to use the bus more efficiently in bursts, depends
2917 * on the tx_int_delay to be enabled,
2918 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2919 * hthresh = 1 ==> prefetch when one or more available
2920 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2921 * BEWARE: this seems to work but should be considered first if
2922 * there are Tx hangs or other Tx related bugs
2924 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2925 ew32(TXDCTL(0), txdctl);
2927 /* erratum work around: set txdctl the same for both queues */
2928 ew32(TXDCTL(1), er32(TXDCTL(0)));
2930 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2931 tarc = er32(TARC(0));
2932 /* set the speed mode bit, we'll clear it if we're not at
2933 * gigabit link later
2935 #define SPEED_MODE_BIT (1 << 21)
2936 tarc |= SPEED_MODE_BIT;
2937 ew32(TARC(0), tarc);
2940 /* errata: program both queues to unweighted RR */
2941 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2942 tarc = er32(TARC(0));
2944 ew32(TARC(0), tarc);
2945 tarc = er32(TARC(1));
2947 ew32(TARC(1), tarc);
2950 /* Setup Transmit Descriptor Settings for eop descriptor */
2951 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2953 /* only set IDE if we are delaying interrupts using the timers */
2954 if (adapter->tx_int_delay)
2955 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2957 /* enable Report Status bit */
2958 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2960 hw->mac.ops.config_collision_dist(hw);
2964 * e1000_setup_rctl - configure the receive control registers
2965 * @adapter: Board private structure
2967 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2968 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2969 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2971 struct e1000_hw *hw = &adapter->hw;
2975 /* Workaround Si errata on PCHx - configure jumbo frame flow */
2976 if ((hw->mac.type >= e1000_pch2lan) &&
2977 (adapter->netdev->mtu > ETH_DATA_LEN) &&
2978 e1000_lv_jumbo_workaround_ich8lan(hw, true))
2979 e_dbg("failed to enable jumbo frame workaround mode\n");
2981 /* Program MC offset vector base */
2983 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2984 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2985 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2986 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2988 /* Do not Store bad packets */
2989 rctl &= ~E1000_RCTL_SBP;
2991 /* Enable Long Packet receive */
2992 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2993 rctl &= ~E1000_RCTL_LPE;
2995 rctl |= E1000_RCTL_LPE;
2997 /* Some systems expect that the CRC is included in SMBUS traffic. The
2998 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2999 * host memory when this is enabled
3001 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3002 rctl |= E1000_RCTL_SECRC;
3004 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3005 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3008 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3010 phy_data |= (1 << 2);
3011 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3013 e1e_rphy(hw, 22, &phy_data);
3015 phy_data |= (1 << 14);
3016 e1e_wphy(hw, 0x10, 0x2823);
3017 e1e_wphy(hw, 0x11, 0x0003);
3018 e1e_wphy(hw, 22, phy_data);
3021 /* Setup buffer sizes */
3022 rctl &= ~E1000_RCTL_SZ_4096;
3023 rctl |= E1000_RCTL_BSEX;
3024 switch (adapter->rx_buffer_len) {
3027 rctl |= E1000_RCTL_SZ_2048;
3028 rctl &= ~E1000_RCTL_BSEX;
3031 rctl |= E1000_RCTL_SZ_4096;
3034 rctl |= E1000_RCTL_SZ_8192;
3037 rctl |= E1000_RCTL_SZ_16384;
3041 /* Enable Extended Status in all Receive Descriptors */
3042 rfctl = er32(RFCTL);
3043 rfctl |= E1000_RFCTL_EXTEN;
3046 /* 82571 and greater support packet-split where the protocol
3047 * header is placed in skb->data and the packet data is
3048 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3049 * In the case of a non-split, skb->data is linearly filled,
3050 * followed by the page buffers. Therefore, skb->data is
3051 * sized to hold the largest protocol header.
3053 * allocations using alloc_page take too long for regular MTU
3054 * so only enable packet split for jumbo frames
3056 * Using pages when the page size is greater than 16k wastes
3057 * a lot of memory, since we allocate 3 pages at all times
3060 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3061 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3062 adapter->rx_ps_pages = pages;
3064 adapter->rx_ps_pages = 0;
3066 if (adapter->rx_ps_pages) {
3069 /* Enable Packet split descriptors */
3070 rctl |= E1000_RCTL_DTYP_PS;
3072 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3074 switch (adapter->rx_ps_pages) {
3076 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3079 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3082 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3086 ew32(PSRCTL, psrctl);
3089 /* This is useful for sniffing bad packets. */
3090 if (adapter->netdev->features & NETIF_F_RXALL) {
3091 /* UPE and MPE will be handled by normal PROMISC logic
3092 * in e1000e_set_rx_mode
3094 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3095 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3096 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3098 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3099 E1000_RCTL_DPF | /* Allow filtered pause */
3100 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3101 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3102 * and that breaks VLANs.
3107 /* just started the receive unit, no need to restart */
3108 adapter->flags &= ~FLAG_RESTART_NOW;
3112 * e1000_configure_rx - Configure Receive Unit after Reset
3113 * @adapter: board private structure
3115 * Configure the Rx unit of the MAC after a reset.
3117 static void e1000_configure_rx(struct e1000_adapter *adapter)
3119 struct e1000_hw *hw = &adapter->hw;
3120 struct e1000_ring *rx_ring = adapter->rx_ring;
3122 u32 rdlen, rctl, rxcsum, ctrl_ext;
3124 if (adapter->rx_ps_pages) {
3125 /* this is a 32 byte descriptor */
3126 rdlen = rx_ring->count *
3127 sizeof(union e1000_rx_desc_packet_split);
3128 adapter->clean_rx = e1000_clean_rx_irq_ps;
3129 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3130 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3131 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3132 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3133 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3135 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3136 adapter->clean_rx = e1000_clean_rx_irq;
3137 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3140 /* disable receives while setting up the descriptors */
3142 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3143 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3145 usleep_range(10000, 20000);
3147 if (adapter->flags2 & FLAG2_DMA_BURST) {
3148 /* set the writeback threshold (only takes effect if the RDTR
3149 * is set). set GRAN=1 and write back up to 0x4 worth, and
3150 * enable prefetching of 0x20 Rx descriptors
3156 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3157 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3159 /* override the delay timers for enabling bursting, only if
3160 * the value was not set by the user via module options
3162 if (adapter->rx_int_delay == DEFAULT_RDTR)
3163 adapter->rx_int_delay = BURST_RDTR;
3164 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3165 adapter->rx_abs_int_delay = BURST_RADV;
3168 /* set the Receive Delay Timer Register */
3169 ew32(RDTR, adapter->rx_int_delay);
3171 /* irq moderation */
3172 ew32(RADV, adapter->rx_abs_int_delay);
3173 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3174 e1000e_write_itr(adapter, adapter->itr);
3176 ctrl_ext = er32(CTRL_EXT);
3177 /* Auto-Mask interrupts upon ICR access */
3178 ctrl_ext |= E1000_CTRL_EXT_IAME;
3179 ew32(IAM, 0xffffffff);
3180 ew32(CTRL_EXT, ctrl_ext);
3183 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3184 * the Base and Length of the Rx Descriptor Ring
3186 rdba = rx_ring->dma;
3187 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3188 ew32(RDBAH(0), (rdba >> 32));
3189 ew32(RDLEN(0), rdlen);
3192 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3193 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3195 /* Enable Receive Checksum Offload for TCP and UDP */
3196 rxcsum = er32(RXCSUM);
3197 if (adapter->netdev->features & NETIF_F_RXCSUM)
3198 rxcsum |= E1000_RXCSUM_TUOFL;
3200 rxcsum &= ~E1000_RXCSUM_TUOFL;
3201 ew32(RXCSUM, rxcsum);
3203 /* With jumbo frames, excessive C-state transition latencies result
3204 * in dropped transactions.
3206 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3208 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3209 adapter->max_frame_size) * 8 / 1000;
3211 if (adapter->flags & FLAG_IS_ICH) {
3212 u32 rxdctl = er32(RXDCTL(0));
3213 ew32(RXDCTL(0), rxdctl | 0x3);
3216 pm_qos_update_request(&adapter->netdev->pm_qos_req, lat);
3218 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3219 PM_QOS_DEFAULT_VALUE);
3222 /* Enable Receives */
3227 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3228 * @netdev: network interface device structure
3230 * Writes multicast address list to the MTA hash table.
3231 * Returns: -ENOMEM on failure
3232 * 0 on no addresses written
3233 * X on writing X addresses to MTA
3235 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3237 struct e1000_adapter *adapter = netdev_priv(netdev);
3238 struct e1000_hw *hw = &adapter->hw;
3239 struct netdev_hw_addr *ha;
3243 if (netdev_mc_empty(netdev)) {
3244 /* nothing to program, so clear mc list */
3245 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3249 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3253 /* update_mc_addr_list expects a packed array of only addresses. */
3255 netdev_for_each_mc_addr(ha, netdev)
3256 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3258 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3261 return netdev_mc_count(netdev);
3265 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3266 * @netdev: network interface device structure
3268 * Writes unicast address list to the RAR table.
3269 * Returns: -ENOMEM on failure/insufficient address space
3270 * 0 on no addresses written
3271 * X on writing X addresses to the RAR table
3273 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3275 struct e1000_adapter *adapter = netdev_priv(netdev);
3276 struct e1000_hw *hw = &adapter->hw;
3277 unsigned int rar_entries = hw->mac.rar_entry_count;
3280 /* save a rar entry for our hardware address */
3283 /* save a rar entry for the LAA workaround */
3284 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3287 /* return ENOMEM indicating insufficient memory for addresses */
3288 if (netdev_uc_count(netdev) > rar_entries)
3291 if (!netdev_uc_empty(netdev) && rar_entries) {
3292 struct netdev_hw_addr *ha;
3294 /* write the addresses in reverse order to avoid write
3297 netdev_for_each_uc_addr(ha, netdev) {
3300 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3305 /* zero out the remaining RAR entries not used above */
3306 for (; rar_entries > 0; rar_entries--) {
3307 ew32(RAH(rar_entries), 0);
3308 ew32(RAL(rar_entries), 0);
3316 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3317 * @netdev: network interface device structure
3319 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3320 * address list or the network interface flags are updated. This routine is
3321 * responsible for configuring the hardware for proper unicast, multicast,
3322 * promiscuous mode, and all-multi behavior.
3324 static void e1000e_set_rx_mode(struct net_device *netdev)
3326 struct e1000_adapter *adapter = netdev_priv(netdev);
3327 struct e1000_hw *hw = &adapter->hw;
3330 /* Check for Promiscuous and All Multicast modes */
3333 /* clear the affected bits */
3334 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3336 if (netdev->flags & IFF_PROMISC) {
3337 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3338 /* Do not hardware filter VLANs in promisc mode */
3339 e1000e_vlan_filter_disable(adapter);
3343 if (netdev->flags & IFF_ALLMULTI) {
3344 rctl |= E1000_RCTL_MPE;
3346 /* Write addresses to the MTA, if the attempt fails
3347 * then we should just turn on promiscuous mode so
3348 * that we can at least receive multicast traffic
3350 count = e1000e_write_mc_addr_list(netdev);
3352 rctl |= E1000_RCTL_MPE;
3354 e1000e_vlan_filter_enable(adapter);
3355 /* Write addresses to available RAR registers, if there is not
3356 * sufficient space to store all the addresses then enable
3357 * unicast promiscuous mode
3359 count = e1000e_write_uc_addr_list(netdev);
3361 rctl |= E1000_RCTL_UPE;
3366 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3367 e1000e_vlan_strip_enable(adapter);
3369 e1000e_vlan_strip_disable(adapter);
3372 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3374 struct e1000_hw *hw = &adapter->hw;
3377 static const u32 rsskey[10] = {
3378 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3379 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3382 /* Fill out hash function seed */
3383 for (i = 0; i < 10; i++)
3384 ew32(RSSRK(i), rsskey[i]);
3386 /* Direct all traffic to queue 0 */
3387 for (i = 0; i < 32; i++)
3390 /* Disable raw packet checksumming so that RSS hash is placed in
3391 * descriptor on writeback.
3393 rxcsum = er32(RXCSUM);
3394 rxcsum |= E1000_RXCSUM_PCSD;
3396 ew32(RXCSUM, rxcsum);
3398 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3399 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3400 E1000_MRQC_RSS_FIELD_IPV6 |
3401 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3402 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3408 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3409 * @adapter: board private structure
3410 * @timinca: pointer to returned time increment attributes
3412 * Get attributes for incrementing the System Time Register SYSTIML/H at
3413 * the default base frequency, and set the cyclecounter shift value.
3415 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3417 struct e1000_hw *hw = &adapter->hw;
3418 u32 incvalue, incperiod, shift;
3420 /* Make sure clock is enabled on I217 before checking the frequency */
3421 if ((hw->mac.type == e1000_pch_lpt) &&
3422 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3423 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3424 u32 fextnvm7 = er32(FEXTNVM7);
3426 if (!(fextnvm7 & (1 << 0))) {
3427 ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3432 switch (hw->mac.type) {
3435 /* On I217, the clock frequency is 25MHz or 96MHz as
3436 * indicated by the System Clock Frequency Indication
3438 if ((hw->mac.type != e1000_pch_lpt) ||
3439 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
3440 /* Stable 96MHz frequency */
3441 incperiod = INCPERIOD_96MHz;
3442 incvalue = INCVALUE_96MHz;
3443 shift = INCVALUE_SHIFT_96MHz;
3444 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3450 /* Stable 25MHz frequency */
3451 incperiod = INCPERIOD_25MHz;
3452 incvalue = INCVALUE_25MHz;
3453 shift = INCVALUE_SHIFT_25MHz;
3454 adapter->cc.shift = shift;
3460 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3461 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3467 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3468 * @adapter: board private structure
3470 * Outgoing time stamping can be enabled and disabled. Play nice and
3471 * disable it when requested, although it shouldn't cause any overhead
3472 * when no packet needs it. At most one packet in the queue may be
3473 * marked for time stamping, otherwise it would be impossible to tell
3474 * for sure to which packet the hardware time stamp belongs.
3476 * Incoming time stamping has to be configured via the hardware filters.
3477 * Not all combinations are supported, in particular event type has to be
3478 * specified. Matching the kind of event packet is not supported, with the
3479 * exception of "all V2 events regardless of level 2 or 4".
3481 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3482 struct hwtstamp_config *config)
3484 struct e1000_hw *hw = &adapter->hw;
3485 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3486 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3494 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3497 /* flags reserved for future extensions - must be zero */
3501 switch (config->tx_type) {
3502 case HWTSTAMP_TX_OFF:
3505 case HWTSTAMP_TX_ON:
3511 switch (config->rx_filter) {
3512 case HWTSTAMP_FILTER_NONE:
3515 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3516 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3517 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3520 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3521 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3522 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3525 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3526 /* Also time stamps V2 L2 Path Delay Request/Response */
3527 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3528 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3531 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3532 /* Also time stamps V2 L2 Path Delay Request/Response. */
3533 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3534 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3537 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3538 /* Hardware cannot filter just V2 L4 Sync messages;
3539 * fall-through to V2 (both L2 and L4) Sync.
3541 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3542 /* Also time stamps V2 Path Delay Request/Response. */
3543 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3544 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3548 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3549 /* Hardware cannot filter just V2 L4 Delay Request messages;
3550 * fall-through to V2 (both L2 and L4) Delay Request.
3552 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3553 /* Also time stamps V2 Path Delay Request/Response. */
3554 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3555 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3559 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3560 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3561 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3562 * fall-through to all V2 (both L2 and L4) Events.
3564 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3565 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3566 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3570 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3571 /* For V1, the hardware can only filter Sync messages or
3572 * Delay Request messages but not both so fall-through to
3573 * time stamp all packets.
3575 case HWTSTAMP_FILTER_ALL:
3578 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3579 config->rx_filter = HWTSTAMP_FILTER_ALL;
3585 adapter->hwtstamp_config = *config;
3587 /* enable/disable Tx h/w time stamping */
3588 regval = er32(TSYNCTXCTL);
3589 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3590 regval |= tsync_tx_ctl;
3591 ew32(TSYNCTXCTL, regval);
3592 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3593 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3594 e_err("Timesync Tx Control register not set as expected\n");
3598 /* enable/disable Rx h/w time stamping */
3599 regval = er32(TSYNCRXCTL);
3600 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3601 regval |= tsync_rx_ctl;
3602 ew32(TSYNCRXCTL, regval);
3603 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3604 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3605 (regval & (E1000_TSYNCRXCTL_ENABLED |
3606 E1000_TSYNCRXCTL_TYPE_MASK))) {
3607 e_err("Timesync Rx Control register not set as expected\n");
3611 /* L2: define ethertype filter for time stamped packets */
3613 rxmtrl |= ETH_P_1588;
3615 /* define which PTP packets get time stamped */
3616 ew32(RXMTRL, rxmtrl);
3618 /* Filter by destination port */
3620 rxudp = PTP_EV_PORT;
3621 cpu_to_be16s(&rxudp);
3627 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3631 /* Get and set the System Time Register SYSTIM base frequency */
3632 ret_val = e1000e_get_base_timinca(adapter, ®val);
3635 ew32(TIMINCA, regval);
3637 /* reset the ns time counter */
3638 timecounter_init(&adapter->tc, &adapter->cc,
3639 ktime_to_ns(ktime_get_real()));
3645 * e1000_configure - configure the hardware for Rx and Tx
3646 * @adapter: private board structure
3648 static void e1000_configure(struct e1000_adapter *adapter)
3650 struct e1000_ring *rx_ring = adapter->rx_ring;
3652 e1000e_set_rx_mode(adapter->netdev);
3654 e1000_restore_vlan(adapter);
3655 e1000_init_manageability_pt(adapter);
3657 e1000_configure_tx(adapter);
3659 if (adapter->netdev->features & NETIF_F_RXHASH)
3660 e1000e_setup_rss_hash(adapter);
3661 e1000_setup_rctl(adapter);
3662 e1000_configure_rx(adapter);
3663 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3667 * e1000e_power_up_phy - restore link in case the phy was powered down
3668 * @adapter: address of board private structure
3670 * The phy may be powered down to save power and turn off link when the
3671 * driver is unloaded and wake on lan is not enabled (among others)
3672 * *** this routine MUST be followed by a call to e1000e_reset ***
3674 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3676 if (adapter->hw.phy.ops.power_up)
3677 adapter->hw.phy.ops.power_up(&adapter->hw);
3679 adapter->hw.mac.ops.setup_link(&adapter->hw);
3683 * e1000_power_down_phy - Power down the PHY
3685 * Power down the PHY so no link is implied when interface is down.
3686 * The PHY cannot be powered down if management or WoL is active.
3688 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3690 if (adapter->hw.phy.ops.power_down)
3691 adapter->hw.phy.ops.power_down(&adapter->hw);
3695 * e1000e_reset - bring the hardware into a known good state
3697 * This function boots the hardware and enables some settings that
3698 * require a configuration cycle of the hardware - those cannot be
3699 * set/changed during runtime. After reset the device needs to be
3700 * properly configured for Rx, Tx etc.
3702 void e1000e_reset(struct e1000_adapter *adapter)
3704 struct e1000_mac_info *mac = &adapter->hw.mac;
3705 struct e1000_fc_info *fc = &adapter->hw.fc;
3706 struct e1000_hw *hw = &adapter->hw;
3707 u32 tx_space, min_tx_space, min_rx_space;
3708 u32 pba = adapter->pba;
3711 /* reset Packet Buffer Allocation to default */
3714 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3715 /* To maintain wire speed transmits, the Tx FIFO should be
3716 * large enough to accommodate two full transmit packets,
3717 * rounded up to the next 1KB and expressed in KB. Likewise,
3718 * the Rx FIFO should be large enough to accommodate at least
3719 * one full receive packet and is similarly rounded up and
3723 /* upper 16 bits has Tx packet buffer allocation size in KB */
3724 tx_space = pba >> 16;
3725 /* lower 16 bits has Rx packet buffer allocation size in KB */
3727 /* the Tx fifo also stores 16 bytes of information about the Tx
3728 * but don't include ethernet FCS because hardware appends it
3730 min_tx_space = (adapter->max_frame_size +
3731 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3732 min_tx_space = ALIGN(min_tx_space, 1024);
3733 min_tx_space >>= 10;
3734 /* software strips receive CRC, so leave room for it */
3735 min_rx_space = adapter->max_frame_size;
3736 min_rx_space = ALIGN(min_rx_space, 1024);
3737 min_rx_space >>= 10;
3739 /* If current Tx allocation is less than the min Tx FIFO size,
3740 * and the min Tx FIFO size is less than the current Rx FIFO
3741 * allocation, take space away from current Rx allocation
3743 if ((tx_space < min_tx_space) &&
3744 ((min_tx_space - tx_space) < pba)) {
3745 pba -= min_tx_space - tx_space;
3747 /* if short on Rx space, Rx wins and must trump Tx
3750 if (pba < min_rx_space)
3757 /* flow control settings
3759 * The high water mark must be low enough to fit one full frame
3760 * (or the size used for early receive) above it in the Rx FIFO.
3761 * Set it to the lower of:
3762 * - 90% of the Rx FIFO size, and
3763 * - the full Rx FIFO size minus one full frame
3765 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3766 fc->pause_time = 0xFFFF;
3768 fc->pause_time = E1000_FC_PAUSE_TIME;
3769 fc->send_xon = true;
3770 fc->current_mode = fc->requested_mode;
3772 switch (hw->mac.type) {
3774 case e1000_ich10lan:
3775 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3778 fc->high_water = 0x2800;
3779 fc->low_water = fc->high_water - 8;
3784 hwm = min(((pba << 10) * 9 / 10),
3785 ((pba << 10) - adapter->max_frame_size));
3787 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3788 fc->low_water = fc->high_water - 8;
3791 /* Workaround PCH LOM adapter hangs with certain network
3792 * loads. If hangs persist, try disabling Tx flow control.
3794 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3795 fc->high_water = 0x3500;
3796 fc->low_water = 0x1500;
3798 fc->high_water = 0x5000;
3799 fc->low_water = 0x3000;
3801 fc->refresh_time = 0x1000;
3805 fc->refresh_time = 0x0400;
3807 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
3808 fc->high_water = 0x05C20;
3809 fc->low_water = 0x05048;
3810 fc->pause_time = 0x0650;
3816 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
3817 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
3821 /* Alignment of Tx data is on an arbitrary byte boundary with the
3822 * maximum size per Tx descriptor limited only to the transmit
3823 * allocation of the packet buffer minus 96 bytes with an upper
3824 * limit of 24KB due to receive synchronization limitations.
3826 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3829 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
3830 * fit in receive buffer.
3832 if (adapter->itr_setting & 0x3) {
3833 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3834 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3835 dev_info(&adapter->pdev->dev,
3836 "Interrupt Throttle Rate off\n");
3837 adapter->flags2 |= FLAG2_DISABLE_AIM;
3838 e1000e_write_itr(adapter, 0);
3840 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3841 dev_info(&adapter->pdev->dev,
3842 "Interrupt Throttle Rate on\n");
3843 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3844 adapter->itr = 20000;
3845 e1000e_write_itr(adapter, adapter->itr);
3849 /* Allow time for pending master requests to run */
3850 mac->ops.reset_hw(hw);
3852 /* For parts with AMT enabled, let the firmware know
3853 * that the network interface is in control
3855 if (adapter->flags & FLAG_HAS_AMT)
3856 e1000e_get_hw_control(adapter);
3860 if (mac->ops.init_hw(hw))
3861 e_err("Hardware Error\n");
3863 e1000_update_mng_vlan(adapter);
3865 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3866 ew32(VET, ETH_P_8021Q);
3868 e1000e_reset_adaptive(hw);
3870 /* initialize systim and reset the ns time counter */
3871 e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3873 /* Set EEE advertisement as appropriate */
3874 if (adapter->flags2 & FLAG2_HAS_EEE) {
3878 switch (hw->phy.type) {
3879 case e1000_phy_82579:
3880 adv_addr = I82579_EEE_ADVERTISEMENT;
3882 case e1000_phy_i217:
3883 adv_addr = I217_EEE_ADVERTISEMENT;
3886 dev_err(&adapter->pdev->dev,
3887 "Invalid PHY type setting EEE advertisement\n");
3891 ret_val = hw->phy.ops.acquire(hw);
3893 dev_err(&adapter->pdev->dev,
3894 "EEE advertisement - unable to acquire PHY\n");
3898 e1000_write_emi_reg_locked(hw, adv_addr,
3899 hw->dev_spec.ich8lan.eee_disable ?
3900 0 : adapter->eee_advert);
3902 hw->phy.ops.release(hw);
3905 if (!netif_running(adapter->netdev) &&
3906 !test_bit(__E1000_TESTING, &adapter->state))
3907 e1000_power_down_phy(adapter);
3909 e1000_get_phy_info(hw);
3911 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3912 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3914 /* speed up time to link by disabling smart power down, ignore
3915 * the return value of this function because there is nothing
3916 * different we would do if it failed
3918 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3919 phy_data &= ~IGP02E1000_PM_SPD;
3920 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3924 int e1000e_up(struct e1000_adapter *adapter)
3926 struct e1000_hw *hw = &adapter->hw;
3928 /* hardware has been reset, we need to reload some things */
3929 e1000_configure(adapter);
3931 clear_bit(__E1000_DOWN, &adapter->state);
3933 if (adapter->msix_entries)
3934 e1000_configure_msix(adapter);
3935 e1000_irq_enable(adapter);
3937 netif_start_queue(adapter->netdev);
3939 /* fire a link change interrupt to start the watchdog */
3940 if (adapter->msix_entries)
3941 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3943 ew32(ICS, E1000_ICS_LSC);
3948 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3950 struct e1000_hw *hw = &adapter->hw;
3952 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3955 /* flush pending descriptor writebacks to memory */
3956 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3957 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3959 /* execute the writes immediately */
3962 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
3963 * write is successful
3965 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3966 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3968 /* execute the writes immediately */
3972 static void e1000e_update_stats(struct e1000_adapter *adapter);
3975 * e1000e_down - quiesce the device and optionally reset the hardware
3976 * @adapter: board private structure
3977 * @reset: boolean flag to reset the hardware or not
3979 void e1000e_down(struct e1000_adapter *adapter, bool reset)
3981 struct net_device *netdev = adapter->netdev;
3982 struct e1000_hw *hw = &adapter->hw;
3985 /* signal that we're down so the interrupt handler does not
3986 * reschedule our watchdog timer
3988 set_bit(__E1000_DOWN, &adapter->state);
3990 /* disable receives in the hardware */
3992 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3993 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3994 /* flush and sleep below */
3996 netif_stop_queue(netdev);
3998 /* disable transmits in the hardware */
4000 tctl &= ~E1000_TCTL_EN;
4003 /* flush both disables and wait for them to finish */
4005 usleep_range(10000, 20000);
4007 e1000_irq_disable(adapter);
4009 napi_synchronize(&adapter->napi);
4011 del_timer_sync(&adapter->watchdog_timer);
4012 del_timer_sync(&adapter->phy_info_timer);
4014 netif_carrier_off(netdev);
4016 spin_lock(&adapter->stats64_lock);
4017 e1000e_update_stats(adapter);
4018 spin_unlock(&adapter->stats64_lock);
4020 e1000e_flush_descriptors(adapter);
4021 e1000_clean_tx_ring(adapter->tx_ring);
4022 e1000_clean_rx_ring(adapter->rx_ring);
4024 adapter->link_speed = 0;
4025 adapter->link_duplex = 0;
4027 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4028 if ((hw->mac.type >= e1000_pch2lan) &&
4029 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4030 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4031 e_dbg("failed to disable jumbo frame workaround mode\n");
4033 if (reset && !pci_channel_offline(adapter->pdev))
4034 e1000e_reset(adapter);
4037 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4040 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4041 usleep_range(1000, 2000);
4042 e1000e_down(adapter, true);
4044 clear_bit(__E1000_RESETTING, &adapter->state);
4048 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4049 * @cc: cyclecounter structure
4051 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4053 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4055 struct e1000_hw *hw = &adapter->hw;
4058 /* latch SYSTIMH on read of SYSTIML */
4059 systim = (cycle_t)er32(SYSTIML);
4060 systim |= (cycle_t)er32(SYSTIMH) << 32;
4066 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4067 * @adapter: board private structure to initialize
4069 * e1000_sw_init initializes the Adapter private data structure.
4070 * Fields are initialized based on PCI device information and
4071 * OS network device settings (MTU size).
4073 static int e1000_sw_init(struct e1000_adapter *adapter)
4075 struct net_device *netdev = adapter->netdev;
4077 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
4078 adapter->rx_ps_bsize0 = 128;
4079 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4080 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4081 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4082 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4084 spin_lock_init(&adapter->stats64_lock);
4086 e1000e_set_interrupt_capability(adapter);
4088 if (e1000_alloc_queues(adapter))
4091 /* Setup hardware time stamping cyclecounter */
4092 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4093 adapter->cc.read = e1000e_cyclecounter_read;
4094 adapter->cc.mask = CLOCKSOURCE_MASK(64);
4095 adapter->cc.mult = 1;
4096 /* cc.shift set in e1000e_get_base_tininca() */
4098 spin_lock_init(&adapter->systim_lock);
4099 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4102 /* Explicitly disable IRQ since the NIC can be in any state. */
4103 e1000_irq_disable(adapter);
4105 set_bit(__E1000_DOWN, &adapter->state);
4110 * e1000_intr_msi_test - Interrupt Handler
4111 * @irq: interrupt number
4112 * @data: pointer to a network interface device structure
4114 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4116 struct net_device *netdev = data;
4117 struct e1000_adapter *adapter = netdev_priv(netdev);
4118 struct e1000_hw *hw = &adapter->hw;
4119 u32 icr = er32(ICR);
4121 e_dbg("icr is %08X\n", icr);
4122 if (icr & E1000_ICR_RXSEQ) {
4123 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4124 /* Force memory writes to complete before acknowledging the
4125 * interrupt is handled.
4134 * e1000_test_msi_interrupt - Returns 0 for successful test
4135 * @adapter: board private struct
4137 * code flow taken from tg3.c
4139 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4141 struct net_device *netdev = adapter->netdev;
4142 struct e1000_hw *hw = &adapter->hw;
4145 /* poll_enable hasn't been called yet, so don't need disable */
4146 /* clear any pending events */
4149 /* free the real vector and request a test handler */
4150 e1000_free_irq(adapter);
4151 e1000e_reset_interrupt_capability(adapter);
4153 /* Assume that the test fails, if it succeeds then the test
4154 * MSI irq handler will unset this flag
4156 adapter->flags |= FLAG_MSI_TEST_FAILED;
4158 err = pci_enable_msi(adapter->pdev);
4160 goto msi_test_failed;
4162 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4163 netdev->name, netdev);
4165 pci_disable_msi(adapter->pdev);
4166 goto msi_test_failed;
4169 /* Force memory writes to complete before enabling and firing an
4174 e1000_irq_enable(adapter);
4176 /* fire an unusual interrupt on the test handler */
4177 ew32(ICS, E1000_ICS_RXSEQ);
4181 e1000_irq_disable(adapter);
4183 rmb(); /* read flags after interrupt has been fired */
4185 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4186 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4187 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4189 e_dbg("MSI interrupt test succeeded!\n");
4192 free_irq(adapter->pdev->irq, netdev);
4193 pci_disable_msi(adapter->pdev);
4196 e1000e_set_interrupt_capability(adapter);
4197 return e1000_request_irq(adapter);
4201 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4202 * @adapter: board private struct
4204 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4206 static int e1000_test_msi(struct e1000_adapter *adapter)
4211 if (!(adapter->flags & FLAG_MSI_ENABLED))
4214 /* disable SERR in case the MSI write causes a master abort */
4215 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4216 if (pci_cmd & PCI_COMMAND_SERR)
4217 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4218 pci_cmd & ~PCI_COMMAND_SERR);
4220 err = e1000_test_msi_interrupt(adapter);
4222 /* re-enable SERR */
4223 if (pci_cmd & PCI_COMMAND_SERR) {
4224 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4225 pci_cmd |= PCI_COMMAND_SERR;
4226 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4233 * e1000_open - Called when a network interface is made active
4234 * @netdev: network interface device structure
4236 * Returns 0 on success, negative value on failure
4238 * The open entry point is called when a network interface is made
4239 * active by the system (IFF_UP). At this point all resources needed
4240 * for transmit and receive operations are allocated, the interrupt
4241 * handler is registered with the OS, the watchdog timer is started,
4242 * and the stack is notified that the interface is ready.
4244 static int e1000_open(struct net_device *netdev)
4246 struct e1000_adapter *adapter = netdev_priv(netdev);
4247 struct e1000_hw *hw = &adapter->hw;
4248 struct pci_dev *pdev = adapter->pdev;
4251 /* disallow open during test */
4252 if (test_bit(__E1000_TESTING, &adapter->state))
4255 pm_runtime_get_sync(&pdev->dev);
4257 netif_carrier_off(netdev);
4259 /* allocate transmit descriptors */
4260 err = e1000e_setup_tx_resources(adapter->tx_ring);
4264 /* allocate receive descriptors */
4265 err = e1000e_setup_rx_resources(adapter->rx_ring);
4269 /* If AMT is enabled, let the firmware know that the network
4270 * interface is now open and reset the part to a known state.
4272 if (adapter->flags & FLAG_HAS_AMT) {
4273 e1000e_get_hw_control(adapter);
4274 e1000e_reset(adapter);
4277 e1000e_power_up_phy(adapter);
4279 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4280 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4281 e1000_update_mng_vlan(adapter);
4283 /* DMA latency requirement to workaround jumbo issue */
4284 pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4285 PM_QOS_DEFAULT_VALUE);
4287 /* before we allocate an interrupt, we must be ready to handle it.
4288 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4289 * as soon as we call pci_request_irq, so we have to setup our
4290 * clean_rx handler before we do so.
4292 e1000_configure(adapter);
4294 err = e1000_request_irq(adapter);
4298 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4299 * ignore e1000e MSI messages, which means we need to test our MSI
4302 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4303 err = e1000_test_msi(adapter);
4305 e_err("Interrupt allocation failed\n");
4310 /* From here on the code is the same as e1000e_up() */
4311 clear_bit(__E1000_DOWN, &adapter->state);
4313 napi_enable(&adapter->napi);
4315 e1000_irq_enable(adapter);
4317 adapter->tx_hang_recheck = false;
4318 netif_start_queue(netdev);
4320 adapter->idle_check = true;
4321 hw->mac.get_link_status = true;
4322 pm_runtime_put(&pdev->dev);
4324 /* fire a link status change interrupt to start the watchdog */
4325 if (adapter->msix_entries)
4326 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4328 ew32(ICS, E1000_ICS_LSC);
4333 e1000e_release_hw_control(adapter);
4334 e1000_power_down_phy(adapter);
4335 e1000e_free_rx_resources(adapter->rx_ring);
4337 e1000e_free_tx_resources(adapter->tx_ring);
4339 e1000e_reset(adapter);
4340 pm_runtime_put_sync(&pdev->dev);
4346 * e1000_close - Disables a network interface
4347 * @netdev: network interface device structure
4349 * Returns 0, this is not allowed to fail
4351 * The close entry point is called when an interface is de-activated
4352 * by the OS. The hardware is still under the drivers control, but
4353 * needs to be disabled. A global MAC reset is issued to stop the
4354 * hardware, and all transmit and receive resources are freed.
4356 static int e1000_close(struct net_device *netdev)
4358 struct e1000_adapter *adapter = netdev_priv(netdev);
4359 struct pci_dev *pdev = adapter->pdev;
4360 int count = E1000_CHECK_RESET_COUNT;
4362 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4363 usleep_range(10000, 20000);
4365 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4367 pm_runtime_get_sync(&pdev->dev);
4369 if (!test_bit(__E1000_DOWN, &adapter->state)) {
4370 e1000e_down(adapter, true);
4371 e1000_free_irq(adapter);
4374 napi_disable(&adapter->napi);
4376 e1000e_free_tx_resources(adapter->tx_ring);
4377 e1000e_free_rx_resources(adapter->rx_ring);
4379 /* kill manageability vlan ID if supported, but not if a vlan with
4380 * the same ID is registered on the host OS (let 8021q kill it)
4382 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4383 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4384 adapter->mng_vlan_id);
4386 /* If AMT is enabled, let the firmware know that the network
4387 * interface is now closed
4389 if ((adapter->flags & FLAG_HAS_AMT) &&
4390 !test_bit(__E1000_TESTING, &adapter->state))
4391 e1000e_release_hw_control(adapter);
4393 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
4395 pm_runtime_put_sync(&pdev->dev);
4401 * e1000_set_mac - Change the Ethernet Address of the NIC
4402 * @netdev: network interface device structure
4403 * @p: pointer to an address structure
4405 * Returns 0 on success, negative on failure
4407 static int e1000_set_mac(struct net_device *netdev, void *p)
4409 struct e1000_adapter *adapter = netdev_priv(netdev);
4410 struct e1000_hw *hw = &adapter->hw;
4411 struct sockaddr *addr = p;
4413 if (!is_valid_ether_addr(addr->sa_data))
4414 return -EADDRNOTAVAIL;
4416 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4417 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4419 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4421 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4422 /* activate the work around */
4423 e1000e_set_laa_state_82571(&adapter->hw, 1);
4425 /* Hold a copy of the LAA in RAR[14] This is done so that
4426 * between the time RAR[0] gets clobbered and the time it
4427 * gets fixed (in e1000_watchdog), the actual LAA is in one
4428 * of the RARs and no incoming packets directed to this port
4429 * are dropped. Eventually the LAA will be in RAR[0] and
4432 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4433 adapter->hw.mac.rar_entry_count - 1);
4440 * e1000e_update_phy_task - work thread to update phy
4441 * @work: pointer to our work struct
4443 * this worker thread exists because we must acquire a
4444 * semaphore to read the phy, which we could msleep while
4445 * waiting for it, and we can't msleep in a timer.
4447 static void e1000e_update_phy_task(struct work_struct *work)
4449 struct e1000_adapter *adapter = container_of(work,
4450 struct e1000_adapter,
4452 struct e1000_hw *hw = &adapter->hw;
4454 if (test_bit(__E1000_DOWN, &adapter->state))
4457 e1000_get_phy_info(hw);
4459 /* Enable EEE on 82579 after link up */
4460 if (hw->phy.type == e1000_phy_82579)
4461 e1000_set_eee_pchlan(hw);
4465 * e1000_update_phy_info - timre call-back to update PHY info
4466 * @data: pointer to adapter cast into an unsigned long
4468 * Need to wait a few seconds after link up to get diagnostic information from
4471 static void e1000_update_phy_info(unsigned long data)
4473 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4475 if (test_bit(__E1000_DOWN, &adapter->state))
4478 schedule_work(&adapter->update_phy_task);
4482 * e1000e_update_phy_stats - Update the PHY statistics counters
4483 * @adapter: board private structure
4485 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4487 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4489 struct e1000_hw *hw = &adapter->hw;
4493 ret_val = hw->phy.ops.acquire(hw);
4497 /* A page set is expensive so check if already on desired page.
4498 * If not, set to the page with the PHY status registers.
4501 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4505 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4506 ret_val = hw->phy.ops.set_page(hw,
4507 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4512 /* Single Collision Count */
4513 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4514 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4516 adapter->stats.scc += phy_data;
4518 /* Excessive Collision Count */
4519 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4520 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4522 adapter->stats.ecol += phy_data;
4524 /* Multiple Collision Count */
4525 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4526 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4528 adapter->stats.mcc += phy_data;
4530 /* Late Collision Count */
4531 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4532 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4534 adapter->stats.latecol += phy_data;
4536 /* Collision Count - also used for adaptive IFS */
4537 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4538 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4540 hw->mac.collision_delta = phy_data;
4543 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4544 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4546 adapter->stats.dc += phy_data;
4548 /* Transmit with no CRS */
4549 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4550 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4552 adapter->stats.tncrs += phy_data;
4555 hw->phy.ops.release(hw);
4559 * e1000e_update_stats - Update the board statistics counters
4560 * @adapter: board private structure
4562 static void e1000e_update_stats(struct e1000_adapter *adapter)
4564 struct net_device *netdev = adapter->netdev;
4565 struct e1000_hw *hw = &adapter->hw;
4566 struct pci_dev *pdev = adapter->pdev;
4568 /* Prevent stats update while adapter is being reset, or if the pci
4569 * connection is down.
4571 if (adapter->link_speed == 0)
4573 if (pci_channel_offline(pdev))
4576 adapter->stats.crcerrs += er32(CRCERRS);
4577 adapter->stats.gprc += er32(GPRC);
4578 adapter->stats.gorc += er32(GORCL);
4579 er32(GORCH); /* Clear gorc */
4580 adapter->stats.bprc += er32(BPRC);
4581 adapter->stats.mprc += er32(MPRC);
4582 adapter->stats.roc += er32(ROC);
4584 adapter->stats.mpc += er32(MPC);
4586 /* Half-duplex statistics */
4587 if (adapter->link_duplex == HALF_DUPLEX) {
4588 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4589 e1000e_update_phy_stats(adapter);
4591 adapter->stats.scc += er32(SCC);
4592 adapter->stats.ecol += er32(ECOL);
4593 adapter->stats.mcc += er32(MCC);
4594 adapter->stats.latecol += er32(LATECOL);
4595 adapter->stats.dc += er32(DC);
4597 hw->mac.collision_delta = er32(COLC);
4599 if ((hw->mac.type != e1000_82574) &&
4600 (hw->mac.type != e1000_82583))
4601 adapter->stats.tncrs += er32(TNCRS);
4603 adapter->stats.colc += hw->mac.collision_delta;
4606 adapter->stats.xonrxc += er32(XONRXC);
4607 adapter->stats.xontxc += er32(XONTXC);
4608 adapter->stats.xoffrxc += er32(XOFFRXC);
4609 adapter->stats.xofftxc += er32(XOFFTXC);
4610 adapter->stats.gptc += er32(GPTC);
4611 adapter->stats.gotc += er32(GOTCL);
4612 er32(GOTCH); /* Clear gotc */
4613 adapter->stats.rnbc += er32(RNBC);
4614 adapter->stats.ruc += er32(RUC);
4616 adapter->stats.mptc += er32(MPTC);
4617 adapter->stats.bptc += er32(BPTC);
4619 /* used for adaptive IFS */
4621 hw->mac.tx_packet_delta = er32(TPT);
4622 adapter->stats.tpt += hw->mac.tx_packet_delta;
4624 adapter->stats.algnerrc += er32(ALGNERRC);
4625 adapter->stats.rxerrc += er32(RXERRC);
4626 adapter->stats.cexterr += er32(CEXTERR);
4627 adapter->stats.tsctc += er32(TSCTC);
4628 adapter->stats.tsctfc += er32(TSCTFC);
4630 /* Fill out the OS statistics structure */
4631 netdev->stats.multicast = adapter->stats.mprc;
4632 netdev->stats.collisions = adapter->stats.colc;
4636 /* RLEC on some newer hardware can be incorrect so build
4637 * our own version based on RUC and ROC
4639 netdev->stats.rx_errors = adapter->stats.rxerrc +
4640 adapter->stats.crcerrs + adapter->stats.algnerrc +
4641 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4642 netdev->stats.rx_length_errors = adapter->stats.ruc +
4644 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4645 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4646 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4649 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4650 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4651 netdev->stats.tx_window_errors = adapter->stats.latecol;
4652 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4654 /* Tx Dropped needs to be maintained elsewhere */
4656 /* Management Stats */
4657 adapter->stats.mgptc += er32(MGTPTC);
4658 adapter->stats.mgprc += er32(MGTPRC);
4659 adapter->stats.mgpdc += er32(MGTPDC);
4661 /* Correctable ECC Errors */
4662 if (hw->mac.type == e1000_pch_lpt) {
4663 u32 pbeccsts = er32(PBECCSTS);
4664 adapter->corr_errors +=
4665 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4666 adapter->uncorr_errors +=
4667 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4668 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4673 * e1000_phy_read_status - Update the PHY register status snapshot
4674 * @adapter: board private structure
4676 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4678 struct e1000_hw *hw = &adapter->hw;
4679 struct e1000_phy_regs *phy = &adapter->phy_regs;
4681 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4682 (er32(STATUS) & E1000_STATUS_LU) &&
4683 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4686 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4687 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4688 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4689 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4690 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4691 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4692 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4693 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4695 e_warn("Error reading PHY register\n");
4697 /* Do not read PHY registers if link is not up
4698 * Set values to typical power-on defaults
4700 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4701 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4702 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4704 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4705 ADVERTISE_ALL | ADVERTISE_CSMA);
4707 phy->expansion = EXPANSION_ENABLENPAGE;
4708 phy->ctrl1000 = ADVERTISE_1000FULL;
4710 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4714 static void e1000_print_link_info(struct e1000_adapter *adapter)
4716 struct e1000_hw *hw = &adapter->hw;
4717 u32 ctrl = er32(CTRL);
4719 /* Link status message must follow this format for user tools */
4720 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4721 adapter->netdev->name, adapter->link_speed,
4722 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4723 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4724 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4725 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4728 static bool e1000e_has_link(struct e1000_adapter *adapter)
4730 struct e1000_hw *hw = &adapter->hw;
4731 bool link_active = false;
4734 /* get_link_status is set on LSC (link status) interrupt or
4735 * Rx sequence error interrupt. get_link_status will stay
4736 * false until the check_for_link establishes link
4737 * for copper adapters ONLY
4739 switch (hw->phy.media_type) {
4740 case e1000_media_type_copper:
4741 if (hw->mac.get_link_status) {
4742 ret_val = hw->mac.ops.check_for_link(hw);
4743 link_active = !hw->mac.get_link_status;
4748 case e1000_media_type_fiber:
4749 ret_val = hw->mac.ops.check_for_link(hw);
4750 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4752 case e1000_media_type_internal_serdes:
4753 ret_val = hw->mac.ops.check_for_link(hw);
4754 link_active = adapter->hw.mac.serdes_has_link;
4757 case e1000_media_type_unknown:
4761 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4762 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4763 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4764 e_info("Gigabit has been disabled, downgrading speed\n");
4770 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4772 /* make sure the receive unit is started */
4773 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4774 (adapter->flags & FLAG_RESTART_NOW)) {
4775 struct e1000_hw *hw = &adapter->hw;
4776 u32 rctl = er32(RCTL);
4777 ew32(RCTL, rctl | E1000_RCTL_EN);
4778 adapter->flags &= ~FLAG_RESTART_NOW;
4782 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4784 struct e1000_hw *hw = &adapter->hw;
4786 /* With 82574 controllers, PHY needs to be checked periodically
4787 * for hung state and reset, if two calls return true
4789 if (e1000_check_phy_82574(hw))
4790 adapter->phy_hang_count++;
4792 adapter->phy_hang_count = 0;
4794 if (adapter->phy_hang_count > 1) {
4795 adapter->phy_hang_count = 0;
4796 schedule_work(&adapter->reset_task);
4801 * e1000_watchdog - Timer Call-back
4802 * @data: pointer to adapter cast into an unsigned long
4804 static void e1000_watchdog(unsigned long data)
4806 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4808 /* Do the rest outside of interrupt context */
4809 schedule_work(&adapter->watchdog_task);
4811 /* TODO: make this use queue_delayed_work() */
4814 static void e1000_watchdog_task(struct work_struct *work)
4816 struct e1000_adapter *adapter = container_of(work,
4817 struct e1000_adapter,
4819 struct net_device *netdev = adapter->netdev;
4820 struct e1000_mac_info *mac = &adapter->hw.mac;
4821 struct e1000_phy_info *phy = &adapter->hw.phy;
4822 struct e1000_ring *tx_ring = adapter->tx_ring;
4823 struct e1000_hw *hw = &adapter->hw;
4826 if (test_bit(__E1000_DOWN, &adapter->state))
4829 link = e1000e_has_link(adapter);
4830 if ((netif_carrier_ok(netdev)) && link) {
4831 /* Cancel scheduled suspend requests. */
4832 pm_runtime_resume(netdev->dev.parent);
4834 e1000e_enable_receives(adapter);
4838 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4839 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4840 e1000_update_mng_vlan(adapter);
4843 if (!netif_carrier_ok(netdev)) {
4846 /* Cancel scheduled suspend requests. */
4847 pm_runtime_resume(netdev->dev.parent);
4849 /* update snapshot of PHY registers on LSC */
4850 e1000_phy_read_status(adapter);
4851 mac->ops.get_link_up_info(&adapter->hw,
4852 &adapter->link_speed,
4853 &adapter->link_duplex);
4854 e1000_print_link_info(adapter);
4856 /* check if SmartSpeed worked */
4857 e1000e_check_downshift(hw);
4858 if (phy->speed_downgraded)
4860 "Link Speed was downgraded by SmartSpeed\n");
4862 /* On supported PHYs, check for duplex mismatch only
4863 * if link has autonegotiated at 10/100 half
4865 if ((hw->phy.type == e1000_phy_igp_3 ||
4866 hw->phy.type == e1000_phy_bm) &&
4868 (adapter->link_speed == SPEED_10 ||
4869 adapter->link_speed == SPEED_100) &&
4870 (adapter->link_duplex == HALF_DUPLEX)) {
4873 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
4875 if (!(autoneg_exp & EXPANSION_NWAY))
4876 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
4879 /* adjust timeout factor according to speed/duplex */
4880 adapter->tx_timeout_factor = 1;
4881 switch (adapter->link_speed) {
4884 adapter->tx_timeout_factor = 16;
4888 adapter->tx_timeout_factor = 10;
4892 /* workaround: re-program speed mode bit after
4895 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4898 tarc0 = er32(TARC(0));
4899 tarc0 &= ~SPEED_MODE_BIT;
4900 ew32(TARC(0), tarc0);
4903 /* disable TSO for pcie and 10/100 speeds, to avoid
4904 * some hardware issues
4906 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4907 switch (adapter->link_speed) {
4910 e_info("10/100 speed: disabling TSO\n");
4911 netdev->features &= ~NETIF_F_TSO;
4912 netdev->features &= ~NETIF_F_TSO6;
4915 netdev->features |= NETIF_F_TSO;
4916 netdev->features |= NETIF_F_TSO6;
4924 /* enable transmits in the hardware, need to do this
4925 * after setting TARC(0)
4928 tctl |= E1000_TCTL_EN;
4931 /* Perform any post-link-up configuration before
4932 * reporting link up.
4934 if (phy->ops.cfg_on_link_up)
4935 phy->ops.cfg_on_link_up(hw);
4937 netif_carrier_on(netdev);
4939 if (!test_bit(__E1000_DOWN, &adapter->state))
4940 mod_timer(&adapter->phy_info_timer,
4941 round_jiffies(jiffies + 2 * HZ));
4944 if (netif_carrier_ok(netdev)) {
4945 adapter->link_speed = 0;
4946 adapter->link_duplex = 0;
4947 /* Link status message must follow this format */
4948 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4949 netif_carrier_off(netdev);
4950 if (!test_bit(__E1000_DOWN, &adapter->state))
4951 mod_timer(&adapter->phy_info_timer,
4952 round_jiffies(jiffies + 2 * HZ));
4954 /* The link is lost so the controller stops DMA.
4955 * If there is queued Tx work that cannot be done
4956 * or if on an 8000ES2LAN which requires a Rx packet
4957 * buffer work-around on link down event, reset the
4958 * controller to flush the Tx/Rx packet buffers.
4959 * (Do the reset outside of interrupt context).
4961 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) ||
4962 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
4963 adapter->flags |= FLAG_RESTART_NOW;
4965 pm_schedule_suspend(netdev->dev.parent,
4971 spin_lock(&adapter->stats64_lock);
4972 e1000e_update_stats(adapter);
4974 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4975 adapter->tpt_old = adapter->stats.tpt;
4976 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4977 adapter->colc_old = adapter->stats.colc;
4979 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4980 adapter->gorc_old = adapter->stats.gorc;
4981 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4982 adapter->gotc_old = adapter->stats.gotc;
4983 spin_unlock(&adapter->stats64_lock);
4985 if (adapter->flags & FLAG_RESTART_NOW) {
4986 schedule_work(&adapter->reset_task);
4987 /* return immediately since reset is imminent */
4991 e1000e_update_adaptive(&adapter->hw);
4993 /* Simple mode for Interrupt Throttle Rate (ITR) */
4994 if (adapter->itr_setting == 4) {
4995 /* Symmetric Tx/Rx gets a reduced ITR=2000;
4996 * Total asymmetrical Tx or Rx gets ITR=8000;
4997 * everyone else is between 2000-8000.
4999 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5000 u32 dif = (adapter->gotc > adapter->gorc ?
5001 adapter->gotc - adapter->gorc :
5002 adapter->gorc - adapter->gotc) / 10000;
5003 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5005 e1000e_write_itr(adapter, itr);
5008 /* Cause software interrupt to ensure Rx ring is cleaned */
5009 if (adapter->msix_entries)
5010 ew32(ICS, adapter->rx_ring->ims_val);
5012 ew32(ICS, E1000_ICS_RXDMT0);
5014 /* flush pending descriptors to memory before detecting Tx hang */
5015 e1000e_flush_descriptors(adapter);
5017 /* Force detection of hung controller every watchdog period */
5018 adapter->detect_tx_hung = true;
5020 /* With 82571 controllers, LAA may be overwritten due to controller
5021 * reset from the other port. Set the appropriate LAA in RAR[0]
5023 if (e1000e_get_laa_state_82571(hw))
5024 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5026 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5027 e1000e_check_82574_phy_workaround(adapter);
5029 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5030 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5031 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5032 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5034 adapter->rx_hwtstamp_cleared++;
5036 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5040 /* Reset the timer */
5041 if (!test_bit(__E1000_DOWN, &adapter->state))
5042 mod_timer(&adapter->watchdog_timer,
5043 round_jiffies(jiffies + 2 * HZ));
5046 #define E1000_TX_FLAGS_CSUM 0x00000001
5047 #define E1000_TX_FLAGS_VLAN 0x00000002
5048 #define E1000_TX_FLAGS_TSO 0x00000004
5049 #define E1000_TX_FLAGS_IPV4 0x00000008
5050 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5051 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5052 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5053 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5055 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
5057 struct e1000_context_desc *context_desc;
5058 struct e1000_buffer *buffer_info;
5062 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5064 if (!skb_is_gso(skb))
5067 if (skb_header_cloned(skb)) {
5068 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5074 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5075 mss = skb_shinfo(skb)->gso_size;
5076 if (skb->protocol == htons(ETH_P_IP)) {
5077 struct iphdr *iph = ip_hdr(skb);
5080 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5082 cmd_length = E1000_TXD_CMD_IP;
5083 ipcse = skb_transport_offset(skb) - 1;
5084 } else if (skb_is_gso_v6(skb)) {
5085 ipv6_hdr(skb)->payload_len = 0;
5086 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5087 &ipv6_hdr(skb)->daddr,
5091 ipcss = skb_network_offset(skb);
5092 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5093 tucss = skb_transport_offset(skb);
5094 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5096 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5097 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5099 i = tx_ring->next_to_use;
5100 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5101 buffer_info = &tx_ring->buffer_info[i];
5103 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5104 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5105 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5106 context_desc->upper_setup.tcp_fields.tucss = tucss;
5107 context_desc->upper_setup.tcp_fields.tucso = tucso;
5108 context_desc->upper_setup.tcp_fields.tucse = 0;
5109 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5110 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5111 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5113 buffer_info->time_stamp = jiffies;
5114 buffer_info->next_to_watch = i;
5117 if (i == tx_ring->count)
5119 tx_ring->next_to_use = i;
5124 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
5126 struct e1000_adapter *adapter = tx_ring->adapter;
5127 struct e1000_context_desc *context_desc;
5128 struct e1000_buffer *buffer_info;
5131 u32 cmd_len = E1000_TXD_CMD_DEXT;
5134 if (skb->ip_summed != CHECKSUM_PARTIAL)
5137 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
5138 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
5140 protocol = skb->protocol;
5143 case cpu_to_be16(ETH_P_IP):
5144 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5145 cmd_len |= E1000_TXD_CMD_TCP;
5147 case cpu_to_be16(ETH_P_IPV6):
5148 /* XXX not handling all IPV6 headers */
5149 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5150 cmd_len |= E1000_TXD_CMD_TCP;
5153 if (unlikely(net_ratelimit()))
5154 e_warn("checksum_partial proto=%x!\n",
5155 be16_to_cpu(protocol));
5159 css = skb_checksum_start_offset(skb);
5161 i = tx_ring->next_to_use;
5162 buffer_info = &tx_ring->buffer_info[i];
5163 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5165 context_desc->lower_setup.ip_config = 0;
5166 context_desc->upper_setup.tcp_fields.tucss = css;
5167 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5168 context_desc->upper_setup.tcp_fields.tucse = 0;
5169 context_desc->tcp_seg_setup.data = 0;
5170 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5172 buffer_info->time_stamp = jiffies;
5173 buffer_info->next_to_watch = i;
5176 if (i == tx_ring->count)
5178 tx_ring->next_to_use = i;
5183 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5184 unsigned int first, unsigned int max_per_txd,
5185 unsigned int nr_frags)
5187 struct e1000_adapter *adapter = tx_ring->adapter;
5188 struct pci_dev *pdev = adapter->pdev;
5189 struct e1000_buffer *buffer_info;
5190 unsigned int len = skb_headlen(skb);
5191 unsigned int offset = 0, size, count = 0, i;
5192 unsigned int f, bytecount, segs;
5194 i = tx_ring->next_to_use;
5197 buffer_info = &tx_ring->buffer_info[i];
5198 size = min(len, max_per_txd);
5200 buffer_info->length = size;
5201 buffer_info->time_stamp = jiffies;
5202 buffer_info->next_to_watch = i;
5203 buffer_info->dma = dma_map_single(&pdev->dev,
5205 size, DMA_TO_DEVICE);
5206 buffer_info->mapped_as_page = false;
5207 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5216 if (i == tx_ring->count)
5221 for (f = 0; f < nr_frags; f++) {
5222 const struct skb_frag_struct *frag;
5224 frag = &skb_shinfo(skb)->frags[f];
5225 len = skb_frag_size(frag);
5230 if (i == tx_ring->count)
5233 buffer_info = &tx_ring->buffer_info[i];
5234 size = min(len, max_per_txd);
5236 buffer_info->length = size;
5237 buffer_info->time_stamp = jiffies;
5238 buffer_info->next_to_watch = i;
5239 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5242 buffer_info->mapped_as_page = true;
5243 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5252 segs = skb_shinfo(skb)->gso_segs ? : 1;
5253 /* multiply data chunks by size of headers */
5254 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5256 tx_ring->buffer_info[i].skb = skb;
5257 tx_ring->buffer_info[i].segs = segs;
5258 tx_ring->buffer_info[i].bytecount = bytecount;
5259 tx_ring->buffer_info[first].next_to_watch = i;
5264 dev_err(&pdev->dev, "Tx DMA map failed\n");
5265 buffer_info->dma = 0;
5271 i += tx_ring->count;
5273 buffer_info = &tx_ring->buffer_info[i];
5274 e1000_put_txbuf(tx_ring, buffer_info);
5280 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5282 struct e1000_adapter *adapter = tx_ring->adapter;
5283 struct e1000_tx_desc *tx_desc = NULL;
5284 struct e1000_buffer *buffer_info;
5285 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5288 if (tx_flags & E1000_TX_FLAGS_TSO) {
5289 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5291 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5293 if (tx_flags & E1000_TX_FLAGS_IPV4)
5294 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5297 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5298 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5299 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5302 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5303 txd_lower |= E1000_TXD_CMD_VLE;
5304 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5307 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5308 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5310 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5311 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5312 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5315 i = tx_ring->next_to_use;
5318 buffer_info = &tx_ring->buffer_info[i];
5319 tx_desc = E1000_TX_DESC(*tx_ring, i);
5320 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5321 tx_desc->lower.data = cpu_to_le32(txd_lower |
5322 buffer_info->length);
5323 tx_desc->upper.data = cpu_to_le32(txd_upper);
5326 if (i == tx_ring->count)
5328 } while (--count > 0);
5330 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5332 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5333 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5334 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5336 /* Force memory writes to complete before letting h/w
5337 * know there are new descriptors to fetch. (Only
5338 * applicable for weak-ordered memory model archs,
5343 tx_ring->next_to_use = i;
5345 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5346 e1000e_update_tdt_wa(tx_ring, i);
5348 writel(i, tx_ring->tail);
5350 /* we need this if more than one processor can write to our tail
5351 * at a time, it synchronizes IO on IA64/Altix systems
5356 #define MINIMUM_DHCP_PACKET_SIZE 282
5357 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5358 struct sk_buff *skb)
5360 struct e1000_hw *hw = &adapter->hw;
5363 if (vlan_tx_tag_present(skb) &&
5364 !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5365 (adapter->hw.mng_cookie.status &
5366 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5369 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5372 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5376 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5379 if (ip->protocol != IPPROTO_UDP)
5382 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5383 if (ntohs(udp->dest) != 67)
5386 offset = (u8 *)udp + 8 - skb->data;
5387 length = skb->len - offset;
5388 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5394 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5396 struct e1000_adapter *adapter = tx_ring->adapter;
5398 netif_stop_queue(adapter->netdev);
5399 /* Herbert's original patch had:
5400 * smp_mb__after_netif_stop_queue();
5401 * but since that doesn't exist yet, just open code it.
5405 /* We need to check again in a case another CPU has just
5406 * made room available.
5408 if (e1000_desc_unused(tx_ring) < size)
5412 netif_start_queue(adapter->netdev);
5413 ++adapter->restart_queue;
5417 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5419 BUG_ON(size > tx_ring->count);
5421 if (e1000_desc_unused(tx_ring) >= size)
5423 return __e1000_maybe_stop_tx(tx_ring, size);
5426 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5427 struct net_device *netdev)
5429 struct e1000_adapter *adapter = netdev_priv(netdev);
5430 struct e1000_ring *tx_ring = adapter->tx_ring;
5432 unsigned int tx_flags = 0;
5433 unsigned int len = skb_headlen(skb);
5434 unsigned int nr_frags;
5440 if (test_bit(__E1000_DOWN, &adapter->state)) {
5441 dev_kfree_skb_any(skb);
5442 return NETDEV_TX_OK;
5445 if (skb->len <= 0) {
5446 dev_kfree_skb_any(skb);
5447 return NETDEV_TX_OK;
5450 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5451 * pad skb in order to meet this minimum size requirement
5453 if (unlikely(skb->len < 17)) {
5454 if (skb_pad(skb, 17 - skb->len))
5455 return NETDEV_TX_OK;
5457 skb_set_tail_pointer(skb, 17);
5460 mss = skb_shinfo(skb)->gso_size;
5464 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5465 * points to just header, pull a few bytes of payload from
5466 * frags into skb->data
5468 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5469 /* we do this workaround for ES2LAN, but it is un-necessary,
5470 * avoiding it could save a lot of cycles
5472 if (skb->data_len && (hdr_len == len)) {
5473 unsigned int pull_size;
5475 pull_size = min_t(unsigned int, 4, skb->data_len);
5476 if (!__pskb_pull_tail(skb, pull_size)) {
5477 e_err("__pskb_pull_tail failed.\n");
5478 dev_kfree_skb_any(skb);
5479 return NETDEV_TX_OK;
5481 len = skb_headlen(skb);
5485 /* reserve a descriptor for the offload context */
5486 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5490 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5492 nr_frags = skb_shinfo(skb)->nr_frags;
5493 for (f = 0; f < nr_frags; f++)
5494 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5495 adapter->tx_fifo_limit);
5497 if (adapter->hw.mac.tx_pkt_filtering)
5498 e1000_transfer_dhcp_info(adapter, skb);
5500 /* need: count + 2 desc gap to keep tail from touching
5501 * head, otherwise try next time
5503 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5504 return NETDEV_TX_BUSY;
5506 if (vlan_tx_tag_present(skb)) {
5507 tx_flags |= E1000_TX_FLAGS_VLAN;
5508 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5511 first = tx_ring->next_to_use;
5513 tso = e1000_tso(tx_ring, skb);
5515 dev_kfree_skb_any(skb);
5516 return NETDEV_TX_OK;
5520 tx_flags |= E1000_TX_FLAGS_TSO;
5521 else if (e1000_tx_csum(tx_ring, skb))
5522 tx_flags |= E1000_TX_FLAGS_CSUM;
5524 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5525 * 82571 hardware supports TSO capabilities for IPv6 as well...
5526 * no longer assume, we must.
5528 if (skb->protocol == htons(ETH_P_IP))
5529 tx_flags |= E1000_TX_FLAGS_IPV4;
5531 if (unlikely(skb->no_fcs))
5532 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5534 /* if count is 0 then mapping error has occurred */
5535 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5538 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5539 !adapter->tx_hwtstamp_skb)) {
5540 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5541 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5542 adapter->tx_hwtstamp_skb = skb_get(skb);
5543 schedule_work(&adapter->tx_hwtstamp_work);
5545 skb_tx_timestamp(skb);
5548 netdev_sent_queue(netdev, skb->len);
5549 e1000_tx_queue(tx_ring, tx_flags, count);
5550 /* Make sure there is space in the ring for the next send. */
5551 e1000_maybe_stop_tx(tx_ring,
5553 DIV_ROUND_UP(PAGE_SIZE,
5554 adapter->tx_fifo_limit) + 2));
5556 dev_kfree_skb_any(skb);
5557 tx_ring->buffer_info[first].time_stamp = 0;
5558 tx_ring->next_to_use = first;
5561 return NETDEV_TX_OK;
5565 * e1000_tx_timeout - Respond to a Tx Hang
5566 * @netdev: network interface device structure
5568 static void e1000_tx_timeout(struct net_device *netdev)
5570 struct e1000_adapter *adapter = netdev_priv(netdev);
5572 /* Do the reset outside of interrupt context */
5573 adapter->tx_timeout_count++;
5574 schedule_work(&adapter->reset_task);
5577 static void e1000_reset_task(struct work_struct *work)
5579 struct e1000_adapter *adapter;
5580 adapter = container_of(work, struct e1000_adapter, reset_task);
5582 /* don't run the task if already down */
5583 if (test_bit(__E1000_DOWN, &adapter->state))
5586 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5587 e1000e_dump(adapter);
5588 e_err("Reset adapter unexpectedly\n");
5590 e1000e_reinit_locked(adapter);
5594 * e1000_get_stats64 - Get System Network Statistics
5595 * @netdev: network interface device structure
5596 * @stats: rtnl_link_stats64 pointer
5598 * Returns the address of the device statistics structure.
5600 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5601 struct rtnl_link_stats64 *stats)
5603 struct e1000_adapter *adapter = netdev_priv(netdev);
5605 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5606 spin_lock(&adapter->stats64_lock);
5607 e1000e_update_stats(adapter);
5608 /* Fill out the OS statistics structure */
5609 stats->rx_bytes = adapter->stats.gorc;
5610 stats->rx_packets = adapter->stats.gprc;
5611 stats->tx_bytes = adapter->stats.gotc;
5612 stats->tx_packets = adapter->stats.gptc;
5613 stats->multicast = adapter->stats.mprc;
5614 stats->collisions = adapter->stats.colc;
5618 /* RLEC on some newer hardware can be incorrect so build
5619 * our own version based on RUC and ROC
5621 stats->rx_errors = adapter->stats.rxerrc +
5622 adapter->stats.crcerrs + adapter->stats.algnerrc +
5623 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5624 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5625 stats->rx_crc_errors = adapter->stats.crcerrs;
5626 stats->rx_frame_errors = adapter->stats.algnerrc;
5627 stats->rx_missed_errors = adapter->stats.mpc;
5630 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5631 stats->tx_aborted_errors = adapter->stats.ecol;
5632 stats->tx_window_errors = adapter->stats.latecol;
5633 stats->tx_carrier_errors = adapter->stats.tncrs;
5635 /* Tx Dropped needs to be maintained elsewhere */
5637 spin_unlock(&adapter->stats64_lock);
5642 * e1000_change_mtu - Change the Maximum Transfer Unit
5643 * @netdev: network interface device structure
5644 * @new_mtu: new value for maximum frame size
5646 * Returns 0 on success, negative on failure
5648 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5650 struct e1000_adapter *adapter = netdev_priv(netdev);
5651 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5653 /* Jumbo frame support */
5654 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5655 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5656 e_err("Jumbo Frames not supported.\n");
5660 /* Supported frame sizes */
5661 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5662 (max_frame > adapter->max_hw_frame_size)) {
5663 e_err("Unsupported MTU setting\n");
5667 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5668 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5669 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5670 (new_mtu > ETH_DATA_LEN)) {
5671 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5675 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5676 usleep_range(1000, 2000);
5677 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5678 adapter->max_frame_size = max_frame;
5679 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5680 netdev->mtu = new_mtu;
5681 if (netif_running(netdev))
5682 e1000e_down(adapter, true);
5684 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5685 * means we reserve 2 more, this pushes us to allocate from the next
5687 * i.e. RXBUFFER_2048 --> size-4096 slab
5688 * However with the new *_jumbo_rx* routines, jumbo receives will use
5692 if (max_frame <= 2048)
5693 adapter->rx_buffer_len = 2048;
5695 adapter->rx_buffer_len = 4096;
5697 /* adjust allocation if LPE protects us, and we aren't using SBP */
5698 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5699 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5700 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5703 if (netif_running(netdev))
5706 e1000e_reset(adapter);
5708 clear_bit(__E1000_RESETTING, &adapter->state);
5713 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5716 struct e1000_adapter *adapter = netdev_priv(netdev);
5717 struct mii_ioctl_data *data = if_mii(ifr);
5719 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5724 data->phy_id = adapter->hw.phy.addr;
5727 e1000_phy_read_status(adapter);
5729 switch (data->reg_num & 0x1F) {
5731 data->val_out = adapter->phy_regs.bmcr;
5734 data->val_out = adapter->phy_regs.bmsr;
5737 data->val_out = (adapter->hw.phy.id >> 16);
5740 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5743 data->val_out = adapter->phy_regs.advertise;
5746 data->val_out = adapter->phy_regs.lpa;
5749 data->val_out = adapter->phy_regs.expansion;
5752 data->val_out = adapter->phy_regs.ctrl1000;
5755 data->val_out = adapter->phy_regs.stat1000;
5758 data->val_out = adapter->phy_regs.estatus;
5772 * e1000e_hwtstamp_ioctl - control hardware time stamping
5773 * @netdev: network interface device structure
5774 * @ifreq: interface request
5776 * Outgoing time stamping can be enabled and disabled. Play nice and
5777 * disable it when requested, although it shouldn't cause any overhead
5778 * when no packet needs it. At most one packet in the queue may be
5779 * marked for time stamping, otherwise it would be impossible to tell
5780 * for sure to which packet the hardware time stamp belongs.
5782 * Incoming time stamping has to be configured via the hardware filters.
5783 * Not all combinations are supported, in particular event type has to be
5784 * specified. Matching the kind of event packet is not supported, with the
5785 * exception of "all V2 events regardless of level 2 or 4".
5787 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
5789 struct e1000_adapter *adapter = netdev_priv(netdev);
5790 struct hwtstamp_config config;
5793 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5796 ret_val = e1000e_config_hwtstamp(adapter, &config);
5800 switch (config.rx_filter) {
5801 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
5802 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5803 case HWTSTAMP_FILTER_PTP_V2_SYNC:
5804 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
5805 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5806 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
5807 /* With V2 type filters which specify a Sync or Delay Request,
5808 * Path Delay Request/Response messages are also time stamped
5809 * by hardware so notify the caller the requested packets plus
5810 * some others are time stamped.
5812 config.rx_filter = HWTSTAMP_FILTER_SOME;
5818 return copy_to_user(ifr->ifr_data, &config,
5819 sizeof(config)) ? -EFAULT : 0;
5822 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
5824 struct e1000_adapter *adapter = netdev_priv(netdev);
5826 return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
5827 sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
5830 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5836 return e1000_mii_ioctl(netdev, ifr, cmd);
5838 return e1000e_hwtstamp_set(netdev, ifr);
5840 return e1000e_hwtstamp_get(netdev, ifr);
5846 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5848 struct e1000_hw *hw = &adapter->hw;
5850 u16 phy_reg, wuc_enable;
5853 /* copy MAC RARs to PHY RARs */
5854 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5856 retval = hw->phy.ops.acquire(hw);
5858 e_err("Could not acquire PHY\n");
5862 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5863 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5867 /* copy MAC MTA to PHY MTA - only needed for pchlan */
5868 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5869 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5870 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5871 (u16)(mac_reg & 0xFFFF));
5872 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5873 (u16)((mac_reg >> 16) & 0xFFFF));
5876 /* configure PHY Rx Control register */
5877 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5878 mac_reg = er32(RCTL);
5879 if (mac_reg & E1000_RCTL_UPE)
5880 phy_reg |= BM_RCTL_UPE;
5881 if (mac_reg & E1000_RCTL_MPE)
5882 phy_reg |= BM_RCTL_MPE;
5883 phy_reg &= ~(BM_RCTL_MO_MASK);
5884 if (mac_reg & E1000_RCTL_MO_3)
5885 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5886 << BM_RCTL_MO_SHIFT);
5887 if (mac_reg & E1000_RCTL_BAM)
5888 phy_reg |= BM_RCTL_BAM;
5889 if (mac_reg & E1000_RCTL_PMCF)
5890 phy_reg |= BM_RCTL_PMCF;
5891 mac_reg = er32(CTRL);
5892 if (mac_reg & E1000_CTRL_RFCE)
5893 phy_reg |= BM_RCTL_RFCE;
5894 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5896 /* enable PHY wakeup in MAC register */
5898 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5900 /* configure and enable PHY wakeup in PHY registers */
5901 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5902 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5904 /* activate PHY wakeup */
5905 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5906 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5908 e_err("Could not set PHY Host Wakeup bit\n");
5910 hw->phy.ops.release(hw);
5915 static int e1000e_pm_freeze(struct device *dev)
5917 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
5918 struct e1000_adapter *adapter = netdev_priv(netdev);
5920 netif_device_detach(netdev);
5922 if (netif_running(netdev)) {
5923 int count = E1000_CHECK_RESET_COUNT;
5925 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
5926 usleep_range(10000, 20000);
5928 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5930 /* Quiesce the device without resetting the hardware */
5931 e1000e_down(adapter, false);
5932 e1000_free_irq(adapter);
5934 e1000e_reset_interrupt_capability(adapter);
5936 /* Allow time for pending master requests to run */
5937 e1000e_disable_pcie_master(&adapter->hw);
5942 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
5944 struct net_device *netdev = pci_get_drvdata(pdev);
5945 struct e1000_adapter *adapter = netdev_priv(netdev);
5946 struct e1000_hw *hw = &adapter->hw;
5947 u32 ctrl, ctrl_ext, rctl, status;
5948 /* Runtime suspend should only enable wakeup for link changes */
5949 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5952 status = er32(STATUS);
5953 if (status & E1000_STATUS_LU)
5954 wufc &= ~E1000_WUFC_LNKC;
5957 e1000_setup_rctl(adapter);
5958 e1000e_set_rx_mode(netdev);
5960 /* turn on all-multi mode if wake on multicast is enabled */
5961 if (wufc & E1000_WUFC_MC) {
5963 rctl |= E1000_RCTL_MPE;
5968 ctrl |= E1000_CTRL_ADVD3WUC;
5969 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5970 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5973 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5974 adapter->hw.phy.media_type ==
5975 e1000_media_type_internal_serdes) {
5976 /* keep the laser running in D3 */
5977 ctrl_ext = er32(CTRL_EXT);
5978 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5979 ew32(CTRL_EXT, ctrl_ext);
5982 if (adapter->flags & FLAG_IS_ICH)
5983 e1000_suspend_workarounds_ich8lan(&adapter->hw);
5985 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5986 /* enable wakeup by the PHY */
5987 retval = e1000_init_phy_wakeup(adapter, wufc);
5991 /* enable wakeup by the MAC */
5993 ew32(WUC, E1000_WUC_PME_EN);
5999 e1000_power_down_phy(adapter);
6002 if (adapter->hw.phy.type == e1000_phy_igp_3)
6003 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6005 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6006 * would have already happened in close and is redundant.
6008 e1000e_release_hw_control(adapter);
6010 pci_clear_master(pdev);
6012 /* The pci-e switch on some quad port adapters will report a
6013 * correctable error when the MAC transitions from D0 to D3. To
6014 * prevent this we need to mask off the correctable errors on the
6015 * downstream port of the pci-e switch.
6017 * We don't have the associated upstream bridge while assigning
6018 * the PCI device into guest. For example, the KVM on power is
6021 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6022 struct pci_dev *us_dev = pdev->bus->self;
6028 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6029 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6030 (devctl & ~PCI_EXP_DEVCTL_CERE));
6032 pci_save_state(pdev);
6033 pci_prepare_to_sleep(pdev);
6035 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6042 * e1000e_disable_aspm - Disable ASPM states
6043 * @pdev: pointer to PCI device struct
6044 * @state: bit-mask of ASPM states to disable
6046 * Some devices *must* have certain ASPM states disabled per hardware errata.
6048 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6050 struct pci_dev *parent = pdev->bus->self;
6051 u16 aspm_dis_mask = 0;
6052 u16 pdev_aspmc, parent_aspmc;
6055 case PCIE_LINK_STATE_L0S:
6056 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6057 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6058 /* fall-through - can't have L1 without L0s */
6059 case PCIE_LINK_STATE_L1:
6060 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6066 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6067 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6070 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6072 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6075 /* Nothing to do if the ASPM states to be disabled already are */
6076 if (!(pdev_aspmc & aspm_dis_mask) &&
6077 (!parent || !(parent_aspmc & aspm_dis_mask)))
6080 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6081 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6083 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6086 #ifdef CONFIG_PCIEASPM
6087 pci_disable_link_state_locked(pdev, state);
6089 /* Double-check ASPM control. If not disabled by the above, the
6090 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6091 * not enabled); override by writing PCI config space directly.
6093 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6094 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6096 if (!(aspm_dis_mask & pdev_aspmc))
6100 /* Both device and parent should have the same ASPM setting.
6101 * Disable ASPM in downstream component first and then upstream.
6103 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6106 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6111 static bool e1000e_pm_ready(struct e1000_adapter *adapter)
6113 return !!adapter->tx_ring->buffer_info;
6116 static int __e1000_resume(struct pci_dev *pdev)
6118 struct net_device *netdev = pci_get_drvdata(pdev);
6119 struct e1000_adapter *adapter = netdev_priv(netdev);
6120 struct e1000_hw *hw = &adapter->hw;
6121 u16 aspm_disable_flag = 0;
6123 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6124 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6125 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6126 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6127 if (aspm_disable_flag)
6128 e1000e_disable_aspm(pdev, aspm_disable_flag);
6130 pci_set_master(pdev);
6132 if (hw->mac.type >= e1000_pch2lan)
6133 e1000_resume_workarounds_pchlan(&adapter->hw);
6135 e1000e_power_up_phy(adapter);
6137 /* report the system wakeup cause from S3/S4 */
6138 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6141 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6143 e_info("PHY Wakeup cause - %s\n",
6144 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6145 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6146 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6147 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6148 phy_data & E1000_WUS_LNKC ?
6149 "Link Status Change" : "other");
6151 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6153 u32 wus = er32(WUS);
6155 e_info("MAC Wakeup cause - %s\n",
6156 wus & E1000_WUS_EX ? "Unicast Packet" :
6157 wus & E1000_WUS_MC ? "Multicast Packet" :
6158 wus & E1000_WUS_BC ? "Broadcast Packet" :
6159 wus & E1000_WUS_MAG ? "Magic Packet" :
6160 wus & E1000_WUS_LNKC ? "Link Status Change" :
6166 e1000e_reset(adapter);
6168 e1000_init_manageability_pt(adapter);
6170 if (netif_running(netdev))
6173 netif_device_attach(netdev);
6175 /* If the controller has AMT, do not set DRV_LOAD until the interface
6176 * is up. For all other cases, let the f/w know that the h/w is now
6177 * under the control of the driver.
6179 if (!(adapter->flags & FLAG_HAS_AMT))
6180 e1000e_get_hw_control(adapter);
6185 static int e1000e_pm_thaw(struct device *dev)
6187 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6188 struct e1000_adapter *adapter = netdev_priv(netdev);
6190 e1000e_set_interrupt_capability(adapter);
6191 if (netif_running(netdev)) {
6192 u32 err = e1000_request_irq(adapter);
6200 netif_device_attach(netdev);
6205 #ifdef CONFIG_PM_SLEEP
6206 static int e1000e_pm_suspend(struct device *dev)
6208 struct pci_dev *pdev = to_pci_dev(dev);
6210 e1000e_pm_freeze(dev);
6212 return __e1000_shutdown(pdev, false);
6215 static int e1000e_pm_resume(struct device *dev)
6217 struct pci_dev *pdev = to_pci_dev(dev);
6220 rc = __e1000_resume(pdev);
6224 return e1000e_pm_thaw(dev);
6226 #endif /* CONFIG_PM_SLEEP */
6228 #ifdef CONFIG_PM_RUNTIME
6229 static int e1000_runtime_suspend(struct device *dev)
6231 struct pci_dev *pdev = to_pci_dev(dev);
6232 struct net_device *netdev = pci_get_drvdata(pdev);
6233 struct e1000_adapter *adapter = netdev_priv(netdev);
6235 if (!e1000e_pm_ready(adapter))
6238 return __e1000_shutdown(pdev, true);
6241 static int e1000_idle(struct device *dev)
6243 struct pci_dev *pdev = to_pci_dev(dev);
6244 struct net_device *netdev = pci_get_drvdata(pdev);
6245 struct e1000_adapter *adapter = netdev_priv(netdev);
6247 if (!e1000e_pm_ready(adapter))
6250 if (adapter->idle_check) {
6251 adapter->idle_check = false;
6252 if (!e1000e_has_link(adapter))
6253 pm_schedule_suspend(dev, MSEC_PER_SEC);
6259 static int e1000_runtime_resume(struct device *dev)
6261 struct pci_dev *pdev = to_pci_dev(dev);
6262 struct net_device *netdev = pci_get_drvdata(pdev);
6263 struct e1000_adapter *adapter = netdev_priv(netdev);
6265 if (!e1000e_pm_ready(adapter))
6268 adapter->idle_check = !dev->power.runtime_auto;
6269 return __e1000_resume(pdev);
6271 #endif /* CONFIG_PM_RUNTIME */
6272 #endif /* CONFIG_PM */
6274 static void e1000_shutdown(struct pci_dev *pdev)
6276 e1000e_pm_freeze(&pdev->dev);
6278 __e1000_shutdown(pdev, false);
6281 #ifdef CONFIG_NET_POLL_CONTROLLER
6283 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6285 struct net_device *netdev = data;
6286 struct e1000_adapter *adapter = netdev_priv(netdev);
6288 if (adapter->msix_entries) {
6289 int vector, msix_irq;
6292 msix_irq = adapter->msix_entries[vector].vector;
6293 disable_irq(msix_irq);
6294 e1000_intr_msix_rx(msix_irq, netdev);
6295 enable_irq(msix_irq);
6298 msix_irq = adapter->msix_entries[vector].vector;
6299 disable_irq(msix_irq);
6300 e1000_intr_msix_tx(msix_irq, netdev);
6301 enable_irq(msix_irq);
6304 msix_irq = adapter->msix_entries[vector].vector;
6305 disable_irq(msix_irq);
6306 e1000_msix_other(msix_irq, netdev);
6307 enable_irq(msix_irq);
6315 * @netdev: network interface device structure
6317 * Polling 'interrupt' - used by things like netconsole to send skbs
6318 * without having to re-enable interrupts. It's not called while
6319 * the interrupt routine is executing.
6321 static void e1000_netpoll(struct net_device *netdev)
6323 struct e1000_adapter *adapter = netdev_priv(netdev);
6325 switch (adapter->int_mode) {
6326 case E1000E_INT_MODE_MSIX:
6327 e1000_intr_msix(adapter->pdev->irq, netdev);
6329 case E1000E_INT_MODE_MSI:
6330 disable_irq(adapter->pdev->irq);
6331 e1000_intr_msi(adapter->pdev->irq, netdev);
6332 enable_irq(adapter->pdev->irq);
6334 default: /* E1000E_INT_MODE_LEGACY */
6335 disable_irq(adapter->pdev->irq);
6336 e1000_intr(adapter->pdev->irq, netdev);
6337 enable_irq(adapter->pdev->irq);
6344 * e1000_io_error_detected - called when PCI error is detected
6345 * @pdev: Pointer to PCI device
6346 * @state: The current pci connection state
6348 * This function is called after a PCI bus error affecting
6349 * this device has been detected.
6351 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6352 pci_channel_state_t state)
6354 struct net_device *netdev = pci_get_drvdata(pdev);
6355 struct e1000_adapter *adapter = netdev_priv(netdev);
6357 netif_device_detach(netdev);
6359 if (state == pci_channel_io_perm_failure)
6360 return PCI_ERS_RESULT_DISCONNECT;
6362 if (netif_running(netdev))
6363 e1000e_down(adapter, true);
6364 pci_disable_device(pdev);
6366 /* Request a slot slot reset. */
6367 return PCI_ERS_RESULT_NEED_RESET;
6371 * e1000_io_slot_reset - called after the pci bus has been reset.
6372 * @pdev: Pointer to PCI device
6374 * Restart the card from scratch, as if from a cold-boot. Implementation
6375 * resembles the first-half of the e1000e_pm_resume routine.
6377 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6379 struct net_device *netdev = pci_get_drvdata(pdev);
6380 struct e1000_adapter *adapter = netdev_priv(netdev);
6381 struct e1000_hw *hw = &adapter->hw;
6382 u16 aspm_disable_flag = 0;
6384 pci_ers_result_t result;
6386 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6387 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6388 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6389 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6390 if (aspm_disable_flag)
6391 e1000e_disable_aspm(pdev, aspm_disable_flag);
6393 err = pci_enable_device_mem(pdev);
6396 "Cannot re-enable PCI device after reset.\n");
6397 result = PCI_ERS_RESULT_DISCONNECT;
6399 pdev->state_saved = true;
6400 pci_restore_state(pdev);
6401 pci_set_master(pdev);
6403 pci_enable_wake(pdev, PCI_D3hot, 0);
6404 pci_enable_wake(pdev, PCI_D3cold, 0);
6406 e1000e_reset(adapter);
6408 result = PCI_ERS_RESULT_RECOVERED;
6411 pci_cleanup_aer_uncorrect_error_status(pdev);
6417 * e1000_io_resume - called when traffic can start flowing again.
6418 * @pdev: Pointer to PCI device
6420 * This callback is called when the error recovery driver tells us that
6421 * its OK to resume normal operation. Implementation resembles the
6422 * second-half of the e1000e_pm_resume routine.
6424 static void e1000_io_resume(struct pci_dev *pdev)
6426 struct net_device *netdev = pci_get_drvdata(pdev);
6427 struct e1000_adapter *adapter = netdev_priv(netdev);
6429 e1000_init_manageability_pt(adapter);
6431 if (netif_running(netdev)) {
6432 if (e1000e_up(adapter)) {
6434 "can't bring device back up after reset\n");
6439 netif_device_attach(netdev);
6441 /* If the controller has AMT, do not set DRV_LOAD until the interface
6442 * is up. For all other cases, let the f/w know that the h/w is now
6443 * under the control of the driver.
6445 if (!(adapter->flags & FLAG_HAS_AMT))
6446 e1000e_get_hw_control(adapter);
6449 static void e1000_print_device_info(struct e1000_adapter *adapter)
6451 struct e1000_hw *hw = &adapter->hw;
6452 struct net_device *netdev = adapter->netdev;
6454 u8 pba_str[E1000_PBANUM_LENGTH];
6456 /* print bus type/speed/width info */
6457 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6459 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6463 e_info("Intel(R) PRO/%s Network Connection\n",
6464 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6465 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6466 E1000_PBANUM_LENGTH);
6468 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6469 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6470 hw->mac.type, hw->phy.type, pba_str);
6473 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6475 struct e1000_hw *hw = &adapter->hw;
6479 if (hw->mac.type != e1000_82573)
6482 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6484 if (!ret_val && (!(buf & (1 << 0)))) {
6485 /* Deep Smart Power Down (DSPD) */
6486 dev_warn(&adapter->pdev->dev,
6487 "Warning: detected DSPD enabled in EEPROM\n");
6491 static int e1000_set_features(struct net_device *netdev,
6492 netdev_features_t features)
6494 struct e1000_adapter *adapter = netdev_priv(netdev);
6495 netdev_features_t changed = features ^ netdev->features;
6497 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6498 adapter->flags |= FLAG_TSO_FORCE;
6500 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6501 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6505 if (changed & NETIF_F_RXFCS) {
6506 if (features & NETIF_F_RXFCS) {
6507 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6509 /* We need to take it back to defaults, which might mean
6510 * stripping is still disabled at the adapter level.
6512 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6513 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6515 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6519 netdev->features = features;
6521 if (netif_running(netdev))
6522 e1000e_reinit_locked(adapter);
6524 e1000e_reset(adapter);
6529 static const struct net_device_ops e1000e_netdev_ops = {
6530 .ndo_open = e1000_open,
6531 .ndo_stop = e1000_close,
6532 .ndo_start_xmit = e1000_xmit_frame,
6533 .ndo_get_stats64 = e1000e_get_stats64,
6534 .ndo_set_rx_mode = e1000e_set_rx_mode,
6535 .ndo_set_mac_address = e1000_set_mac,
6536 .ndo_change_mtu = e1000_change_mtu,
6537 .ndo_do_ioctl = e1000_ioctl,
6538 .ndo_tx_timeout = e1000_tx_timeout,
6539 .ndo_validate_addr = eth_validate_addr,
6541 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6542 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6543 #ifdef CONFIG_NET_POLL_CONTROLLER
6544 .ndo_poll_controller = e1000_netpoll,
6546 .ndo_set_features = e1000_set_features,
6550 * e1000_probe - Device Initialization Routine
6551 * @pdev: PCI device information struct
6552 * @ent: entry in e1000_pci_tbl
6554 * Returns 0 on success, negative on failure
6556 * e1000_probe initializes an adapter identified by a pci_dev structure.
6557 * The OS initialization, configuring of the adapter private structure,
6558 * and a hardware reset occur.
6560 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6562 struct net_device *netdev;
6563 struct e1000_adapter *adapter;
6564 struct e1000_hw *hw;
6565 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6566 resource_size_t mmio_start, mmio_len;
6567 resource_size_t flash_start, flash_len;
6568 static int cards_found;
6569 u16 aspm_disable_flag = 0;
6570 int bars, i, err, pci_using_dac;
6571 u16 eeprom_data = 0;
6572 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6574 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6575 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6576 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6577 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6578 if (aspm_disable_flag)
6579 e1000e_disable_aspm(pdev, aspm_disable_flag);
6581 err = pci_enable_device_mem(pdev);
6586 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6590 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6593 "No usable DMA configuration, aborting\n");
6598 bars = pci_select_bars(pdev, IORESOURCE_MEM);
6599 err = pci_request_selected_regions_exclusive(pdev, bars,
6600 e1000e_driver_name);
6604 /* AER (Advanced Error Reporting) hooks */
6605 pci_enable_pcie_error_reporting(pdev);
6607 pci_set_master(pdev);
6608 /* PCI config space info */
6609 err = pci_save_state(pdev);
6611 goto err_alloc_etherdev;
6614 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6616 goto err_alloc_etherdev;
6618 SET_NETDEV_DEV(netdev, &pdev->dev);
6620 netdev->irq = pdev->irq;
6622 pci_set_drvdata(pdev, netdev);
6623 adapter = netdev_priv(netdev);
6625 adapter->netdev = netdev;
6626 adapter->pdev = pdev;
6628 adapter->pba = ei->pba;
6629 adapter->flags = ei->flags;
6630 adapter->flags2 = ei->flags2;
6631 adapter->hw.adapter = adapter;
6632 adapter->hw.mac.type = ei->mac;
6633 adapter->max_hw_frame_size = ei->max_hw_frame_size;
6634 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6636 mmio_start = pci_resource_start(pdev, 0);
6637 mmio_len = pci_resource_len(pdev, 0);
6640 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6641 if (!adapter->hw.hw_addr)
6644 if ((adapter->flags & FLAG_HAS_FLASH) &&
6645 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6646 flash_start = pci_resource_start(pdev, 1);
6647 flash_len = pci_resource_len(pdev, 1);
6648 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6649 if (!adapter->hw.flash_address)
6653 /* Set default EEE advertisement */
6654 if (adapter->flags2 & FLAG2_HAS_EEE)
6655 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
6657 /* construct the net_device struct */
6658 netdev->netdev_ops = &e1000e_netdev_ops;
6659 e1000e_set_ethtool_ops(netdev);
6660 netdev->watchdog_timeo = 5 * HZ;
6661 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6662 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6664 netdev->mem_start = mmio_start;
6665 netdev->mem_end = mmio_start + mmio_len;
6667 adapter->bd_number = cards_found++;
6669 e1000e_check_options(adapter);
6671 /* setup adapter struct */
6672 err = e1000_sw_init(adapter);
6676 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6677 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6678 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6680 err = ei->get_variants(adapter);
6684 if ((adapter->flags & FLAG_IS_ICH) &&
6685 (adapter->flags & FLAG_READ_ONLY_NVM))
6686 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6688 hw->mac.ops.get_bus_info(&adapter->hw);
6690 adapter->hw.phy.autoneg_wait_to_complete = 0;
6692 /* Copper options */
6693 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6694 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6695 adapter->hw.phy.disable_polarity_correction = 0;
6696 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6699 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6700 dev_info(&pdev->dev,
6701 "PHY reset is blocked due to SOL/IDER session.\n");
6703 /* Set initial default active device features */
6704 netdev->features = (NETIF_F_SG |
6705 NETIF_F_HW_VLAN_CTAG_RX |
6706 NETIF_F_HW_VLAN_CTAG_TX |
6713 /* Set user-changeable features (subset of all device features) */
6714 netdev->hw_features = netdev->features;
6715 netdev->hw_features |= NETIF_F_RXFCS;
6716 netdev->priv_flags |= IFF_SUPP_NOFCS;
6717 netdev->hw_features |= NETIF_F_RXALL;
6719 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6720 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6722 netdev->vlan_features |= (NETIF_F_SG |
6727 netdev->priv_flags |= IFF_UNICAST_FLT;
6729 if (pci_using_dac) {
6730 netdev->features |= NETIF_F_HIGHDMA;
6731 netdev->vlan_features |= NETIF_F_HIGHDMA;
6734 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6735 adapter->flags |= FLAG_MNG_PT_ENABLED;
6737 /* before reading the NVM, reset the controller to
6738 * put the device in a known good starting state
6740 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6742 /* systems with ASPM and others may see the checksum fail on the first
6743 * attempt. Let's give it a few tries
6746 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6749 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
6755 e1000_eeprom_checks(adapter);
6757 /* copy the MAC address */
6758 if (e1000e_read_mac_addr(&adapter->hw))
6760 "NVM Read Error while reading MAC address\n");
6762 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6764 if (!is_valid_ether_addr(netdev->dev_addr)) {
6765 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
6771 init_timer(&adapter->watchdog_timer);
6772 adapter->watchdog_timer.function = e1000_watchdog;
6773 adapter->watchdog_timer.data = (unsigned long)adapter;
6775 init_timer(&adapter->phy_info_timer);
6776 adapter->phy_info_timer.function = e1000_update_phy_info;
6777 adapter->phy_info_timer.data = (unsigned long)adapter;
6779 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6780 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6781 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6782 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6783 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6785 /* Initialize link parameters. User can change them with ethtool */
6786 adapter->hw.mac.autoneg = 1;
6787 adapter->fc_autoneg = true;
6788 adapter->hw.fc.requested_mode = e1000_fc_default;
6789 adapter->hw.fc.current_mode = e1000_fc_default;
6790 adapter->hw.phy.autoneg_advertised = 0x2f;
6792 /* Initial Wake on LAN setting - If APM wake is enabled in
6793 * the EEPROM, enable the ACPI Magic Packet filter
6795 if (adapter->flags & FLAG_APME_IN_WUC) {
6796 /* APME bit in EEPROM is mapped to WUC.APME */
6797 eeprom_data = er32(WUC);
6798 eeprom_apme_mask = E1000_WUC_APME;
6799 if ((hw->mac.type > e1000_ich10lan) &&
6800 (eeprom_data & E1000_WUC_PHY_WAKE))
6801 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6802 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6803 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6804 (adapter->hw.bus.func == 1))
6805 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6808 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6812 /* fetch WoL from EEPROM */
6813 if (eeprom_data & eeprom_apme_mask)
6814 adapter->eeprom_wol |= E1000_WUFC_MAG;
6816 /* now that we have the eeprom settings, apply the special cases
6817 * where the eeprom may be wrong or the board simply won't support
6818 * wake on lan on a particular port
6820 if (!(adapter->flags & FLAG_HAS_WOL))
6821 adapter->eeprom_wol = 0;
6823 /* initialize the wol settings based on the eeprom settings */
6824 adapter->wol = adapter->eeprom_wol;
6826 /* make sure adapter isn't asleep if manageability is enabled */
6827 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
6828 (hw->mac.ops.check_mng_mode(hw)))
6829 device_wakeup_enable(&pdev->dev);
6831 /* save off EEPROM version number */
6832 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6834 /* reset the hardware with the new settings */
6835 e1000e_reset(adapter);
6837 /* If the controller has AMT, do not set DRV_LOAD until the interface
6838 * is up. For all other cases, let the f/w know that the h/w is now
6839 * under the control of the driver.
6841 if (!(adapter->flags & FLAG_HAS_AMT))
6842 e1000e_get_hw_control(adapter);
6844 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6845 err = register_netdev(netdev);
6849 /* carrier off reporting is important to ethtool even BEFORE open */
6850 netif_carrier_off(netdev);
6852 /* init PTP hardware clock */
6853 e1000e_ptp_init(adapter);
6855 e1000_print_device_info(adapter);
6857 if (pci_dev_run_wake(pdev))
6858 pm_runtime_put_noidle(&pdev->dev);
6863 if (!(adapter->flags & FLAG_HAS_AMT))
6864 e1000e_release_hw_control(adapter);
6866 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
6867 e1000_phy_hw_reset(&adapter->hw);
6869 kfree(adapter->tx_ring);
6870 kfree(adapter->rx_ring);
6872 if (adapter->hw.flash_address)
6873 iounmap(adapter->hw.flash_address);
6874 e1000e_reset_interrupt_capability(adapter);
6876 iounmap(adapter->hw.hw_addr);
6878 free_netdev(netdev);
6880 pci_release_selected_regions(pdev,
6881 pci_select_bars(pdev, IORESOURCE_MEM));
6884 pci_disable_device(pdev);
6889 * e1000_remove - Device Removal Routine
6890 * @pdev: PCI device information struct
6892 * e1000_remove is called by the PCI subsystem to alert the driver
6893 * that it should release a PCI device. The could be caused by a
6894 * Hot-Plug event, or because the driver is going to be removed from
6897 static void e1000_remove(struct pci_dev *pdev)
6899 struct net_device *netdev = pci_get_drvdata(pdev);
6900 struct e1000_adapter *adapter = netdev_priv(netdev);
6901 bool down = test_bit(__E1000_DOWN, &adapter->state);
6903 e1000e_ptp_remove(adapter);
6905 /* The timers may be rescheduled, so explicitly disable them
6906 * from being rescheduled.
6909 set_bit(__E1000_DOWN, &adapter->state);
6910 del_timer_sync(&adapter->watchdog_timer);
6911 del_timer_sync(&adapter->phy_info_timer);
6913 cancel_work_sync(&adapter->reset_task);
6914 cancel_work_sync(&adapter->watchdog_task);
6915 cancel_work_sync(&adapter->downshift_task);
6916 cancel_work_sync(&adapter->update_phy_task);
6917 cancel_work_sync(&adapter->print_hang_task);
6919 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
6920 cancel_work_sync(&adapter->tx_hwtstamp_work);
6921 if (adapter->tx_hwtstamp_skb) {
6922 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
6923 adapter->tx_hwtstamp_skb = NULL;
6927 /* Don't lie to e1000_close() down the road. */
6929 clear_bit(__E1000_DOWN, &adapter->state);
6930 unregister_netdev(netdev);
6932 if (pci_dev_run_wake(pdev))
6933 pm_runtime_get_noresume(&pdev->dev);
6935 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6936 * would have already happened in close and is redundant.
6938 e1000e_release_hw_control(adapter);
6940 e1000e_reset_interrupt_capability(adapter);
6941 kfree(adapter->tx_ring);
6942 kfree(adapter->rx_ring);
6944 iounmap(adapter->hw.hw_addr);
6945 if (adapter->hw.flash_address)
6946 iounmap(adapter->hw.flash_address);
6947 pci_release_selected_regions(pdev,
6948 pci_select_bars(pdev, IORESOURCE_MEM));
6950 free_netdev(netdev);
6953 pci_disable_pcie_error_reporting(pdev);
6955 pci_disable_device(pdev);
6958 /* PCI Error Recovery (ERS) */
6959 static const struct pci_error_handlers e1000_err_handler = {
6960 .error_detected = e1000_io_error_detected,
6961 .slot_reset = e1000_io_slot_reset,
6962 .resume = e1000_io_resume,
6965 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6966 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6967 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6968 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6969 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
6971 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6972 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6973 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6974 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6975 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6977 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6978 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6979 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6980 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6982 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6983 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6984 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6986 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6987 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6988 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6990 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6991 board_80003es2lan },
6992 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6993 board_80003es2lan },
6994 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6995 board_80003es2lan },
6996 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6997 board_80003es2lan },
6999 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7000 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7001 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7002 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7003 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7004 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7005 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7006 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7008 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7009 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7010 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7011 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7012 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7013 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7014 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7015 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7016 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7018 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7019 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7020 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7022 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7023 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7024 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7026 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7027 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7028 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7029 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7031 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7032 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7034 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7035 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7036 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7037 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7038 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7039 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7040 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7041 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7043 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7045 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7047 static const struct dev_pm_ops e1000_pm_ops = {
7048 .suspend = e1000e_pm_suspend,
7049 .resume = e1000e_pm_resume,
7050 .freeze = e1000e_pm_freeze,
7051 .thaw = e1000e_pm_thaw,
7052 .poweroff = e1000e_pm_suspend,
7053 .restore = e1000e_pm_resume,
7054 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, e1000_runtime_resume,
7058 /* PCI Device API Driver */
7059 static struct pci_driver e1000_driver = {
7060 .name = e1000e_driver_name,
7061 .id_table = e1000_pci_tbl,
7062 .probe = e1000_probe,
7063 .remove = e1000_remove,
7065 .pm = &e1000_pm_ops,
7067 .shutdown = e1000_shutdown,
7068 .err_handler = &e1000_err_handler
7072 * e1000_init_module - Driver Registration Routine
7074 * e1000_init_module is the first routine called when the driver is
7075 * loaded. All it does is register with the PCI subsystem.
7077 static int __init e1000_init_module(void)
7080 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7081 e1000e_driver_version);
7082 pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n");
7083 ret = pci_register_driver(&e1000_driver);
7087 module_init(e1000_init_module);
7090 * e1000_exit_module - Driver Exit Cleanup Routine
7092 * e1000_exit_module is called just before the driver is removed
7095 static void __exit e1000_exit_module(void)
7097 pci_unregister_driver(&e1000_driver);
7099 module_exit(e1000_exit_module);
7101 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7102 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7103 MODULE_LICENSE("GPL");
7104 MODULE_VERSION(DRV_VERSION);