drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/ip.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/aer.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/sctp.h>
  18 #include <linux/vermagic.h>
  19 #include <net/gre.h>
  20 #include <net/ip6_checksum.h>
  21 #include <net/pkt_cls.h>
  22 #include <net/tcp.h>
  23 #include <net/vxlan.h>
  24
  25 #include "hnae3.h"
  26 #include "hns3_enet.h"
  27
  28 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  29 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  30
  31 #define hns3_rl_err(fmt, ...)                                           \
  32         do {                                                            \
  33                 if (net_ratelimit())                                    \
  34                         netdev_err(fmt, ##__VA_ARGS__);                 \
  35         } while (0)
  36
  37 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
  38 static void hns3_remove_hw_addr(struct net_device *netdev);
  39
  40 static const char hns3_driver_name[] = "hns3";
  41 const char hns3_driver_version[] = VERMAGIC_STRING;
  42 static const char hns3_driver_string[] =
  43                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  44 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  45 static struct hnae3_client client;
  46
  47 static int debug = -1;
  48 module_param(debug, int, 0);
  49 MODULE_PARM_DESC(debug, " Network interface message level setting");
  50
  51 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  52                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  53
  54 #define HNS3_INNER_VLAN_TAG     1
  55 #define HNS3_OUTER_VLAN_TAG     2
  56
  57 /* hns3_pci_tbl - PCI Device ID Table
  58  *
  59  * Last entry must be all 0s
  60  *
  61  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  62  *   Class, Class Mask, private data (not used) }
  63  */
  64 static const struct pci_device_id hns3_pci_tbl[] = {
  65         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  66         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  67         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  68          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  69         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  70          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  71         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  72          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  73         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  74          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  75         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  76          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  77         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  78         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  79          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  80         /* required last entry */
  81         {0, }
  82 };
  83 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  84
  85 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  86 {
  87         struct hns3_enet_tqp_vector *tqp_vector = vector;
  88
  89         napi_schedule_irqoff(&tqp_vector->napi);
  90
  91         return IRQ_HANDLED;
  92 }
  93
  94 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
  95 {
  96         struct hns3_enet_tqp_vector *tqp_vectors;
  97         unsigned int i;
  98
  99         for (i = 0; i < priv->vector_num; i++) {
 100                 tqp_vectors = &priv->tqp_vector[i];
 101
 102                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 103                         continue;
 104
 105                 /* clear the affinity mask */
 106                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 107
 108                 /* release the irq resource */
 109                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 110                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 111         }
 112 }
 113
 114 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 115 {
 116         struct hns3_enet_tqp_vector *tqp_vectors;
 117         int txrx_int_idx = 0;
 118         int rx_int_idx = 0;
 119         int tx_int_idx = 0;
 120         unsigned int i;
 121         int ret;
 122
 123         for (i = 0; i < priv->vector_num; i++) {
 124                 tqp_vectors = &priv->tqp_vector[i];
 125
 126                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 127                         continue;
 128
 129                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 130                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 131                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 132                                  txrx_int_idx++);
 133                         txrx_int_idx++;
 134                 } else if (tqp_vectors->rx_group.ring) {
 135                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 136                                  "%s-%s-%d", priv->netdev->name, "Rx",
 137                                  rx_int_idx++);
 138                 } else if (tqp_vectors->tx_group.ring) {
 139                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 140                                  "%s-%s-%d", priv->netdev->name, "Tx",
 141                                  tx_int_idx++);
 142                 } else {
 143                         /* Skip this unused q_vector */
 144                         continue;
 145                 }
 146
 147                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 148
 149                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 150                                   tqp_vectors->name, tqp_vectors);
 151                 if (ret) {
 152                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 153                                    tqp_vectors->vector_irq);
 154                         hns3_nic_uninit_irq(priv);
 155                         return ret;
 156                 }
 157
 158                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 159                                       &tqp_vectors->affinity_mask);
 160
 161                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 162         }
 163
 164         return 0;
 165 }
 166
 167 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 168                                  u32 mask_en)
 169 {
 170         writel(mask_en, tqp_vector->mask_addr);
 171 }
 172
 173 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 174 {
 175         napi_enable(&tqp_vector->napi);
 176
 177         /* enable vector */
 178         hns3_mask_vector_irq(tqp_vector, 1);
 179 }
 180
 181 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 182 {
 183         /* disable vector */
 184         hns3_mask_vector_irq(tqp_vector, 0);
 185
 186         disable_irq(tqp_vector->vector_irq);
 187         napi_disable(&tqp_vector->napi);
 188 }
 189
 190 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 191                                  u32 rl_value)
 192 {
 193         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 194
 195         /* this defines the configuration for RL (Interrupt Rate Limiter).
 196          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 197          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 198          */
 199
 200         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 201             !tqp_vector->rx_group.coal.gl_adapt_enable)
 202                 /* According to the hardware, the range of rl_reg is
 203                  * 0-59 and the unit is 4.
 204                  */
 205                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 206
 207         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 208 }
 209
 210 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 211                                     u32 gl_value)
 212 {
 213         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 214
 215         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 216 }
 217
 218 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 219                                     u32 gl_value)
 220 {
 221         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 222
 223         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 224 }
 225
 226 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 227                                    struct hns3_nic_priv *priv)
 228 {
 229         /* initialize the configuration for interrupt coalescing.
 230          * 1. GL (Interrupt Gap Limiter)
 231          * 2. RL (Interrupt Rate Limiter)
 232          *
 233          * Default: enable interrupt coalescing self-adaptive and GL
 234          */
 235         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 236         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 237
 238         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 239         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 240
 241         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 242         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 243 }
 244
 245 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 246                                       struct hns3_nic_priv *priv)
 247 {
 248         struct hnae3_handle *h = priv->ae_handle;
 249
 250         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 251                                        tqp_vector->tx_group.coal.int_gl);
 252         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 253                                        tqp_vector->rx_group.coal.int_gl);
 254         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 255 }
 256
 257 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 258 {
 259         struct hnae3_handle *h = hns3_get_handle(netdev);
 260         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 261         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 262         int i, ret;
 263
 264         if (kinfo->num_tc <= 1) {
 265                 netdev_reset_tc(netdev);
 266         } else {
 267                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 268                 if (ret) {
 269                         netdev_err(netdev,
 270                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 271                         return ret;
 272                 }
 273
 274                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 275                         if (!kinfo->tc_info[i].enable)
 276                                 continue;
 277
 278                         netdev_set_tc_queue(netdev,
 279                                             kinfo->tc_info[i].tc,
 280                                             kinfo->tc_info[i].tqp_count,
 281                                             kinfo->tc_info[i].tqp_offset);
 282                 }
 283         }
 284
 285         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 286         if (ret) {
 287                 netdev_err(netdev,
 288                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 289                 return ret;
 290         }
 291
 292         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 293         if (ret) {
 294                 netdev_err(netdev,
 295                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 296                 return ret;
 297         }
 298
 299         return 0;
 300 }
 301
 302 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 303 {
 304         u16 alloc_tqps, max_rss_size, rss_size;
 305
 306         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 307         rss_size = alloc_tqps / h->kinfo.num_tc;
 308
 309         return min_t(u16, rss_size, max_rss_size);
 310 }
 311
 312 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 313 {
 314         u32 rcb_reg;
 315
 316         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 317         rcb_reg |= BIT(HNS3_RING_EN_B);
 318         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 319 }
 320
 321 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 322 {
 323         u32 rcb_reg;
 324
 325         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 326         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 327         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 328 }
 329
 330 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 331 {
 332 #ifdef CONFIG_RFS_ACCEL
 333         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 334         netdev->rx_cpu_rmap = NULL;
 335 #endif
 336 }
 337
 338 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 339 {
 340 #ifdef CONFIG_RFS_ACCEL
 341         struct hns3_nic_priv *priv = netdev_priv(netdev);
 342         struct hns3_enet_tqp_vector *tqp_vector;
 343         int i, ret;
 344
 345         if (!netdev->rx_cpu_rmap) {
 346                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 347                 if (!netdev->rx_cpu_rmap)
 348                         return -ENOMEM;
 349         }
 350
 351         for (i = 0; i < priv->vector_num; i++) {
 352                 tqp_vector = &priv->tqp_vector[i];
 353                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 354                                        tqp_vector->vector_irq);
 355                 if (ret) {
 356                         hns3_free_rx_cpu_rmap(netdev);
 357                         return ret;
 358                 }
 359         }
 360 #endif
 361         return 0;
 362 }
 363
 364 static int hns3_nic_net_up(struct net_device *netdev)
 365 {
 366         struct hns3_nic_priv *priv = netdev_priv(netdev);
 367         struct hnae3_handle *h = priv->ae_handle;
 368         int i, j;
 369         int ret;
 370
 371         ret = hns3_nic_reset_all_ring(h);
 372         if (ret)
 373                 return ret;
 374
 375         /* the device can work without cpu rmap, only aRFS needs it */
 376         ret = hns3_set_rx_cpu_rmap(netdev);
 377         if (ret)
 378                 netdev_warn(netdev, "set rx cpu rmap fail, ret=%d!\n", ret);
 379
 380         /* get irq resource for all vectors */
 381         ret = hns3_nic_init_irq(priv);
 382         if (ret) {
 383                 netdev_err(netdev, "init irq failed! ret=%d\n", ret);
 384                 goto free_rmap;
 385         }
 386
 387         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 388
 389         /* enable the vectors */
 390         for (i = 0; i < priv->vector_num; i++)
 391                 hns3_vector_enable(&priv->tqp_vector[i]);
 392
 393         /* enable rcb */
 394         for (j = 0; j < h->kinfo.num_tqps; j++)
 395                 hns3_tqp_enable(h->kinfo.tqp[j]);
 396
 397         /* start the ae_dev */
 398         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 399         if (ret)
 400                 goto out_start_err;
 401
 402         return 0;
 403
 404 out_start_err:
 405         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 406         while (j--)
 407                 hns3_tqp_disable(h->kinfo.tqp[j]);
 408
 409         for (j = i - 1; j >= 0; j--)
 410                 hns3_vector_disable(&priv->tqp_vector[j]);
 411
 412         hns3_nic_uninit_irq(priv);
 413 free_rmap:
 414         hns3_free_rx_cpu_rmap(netdev);
 415         return ret;
 416 }
 417
 418 static void hns3_config_xps(struct hns3_nic_priv *priv)
 419 {
 420         int i;
 421
 422         for (i = 0; i < priv->vector_num; i++) {
 423                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 424                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 425
 426                 while (ring) {
 427                         int ret;
 428
 429                         ret = netif_set_xps_queue(priv->netdev,
 430                                                   &tqp_vector->affinity_mask,
 431                                                   ring->tqp->tqp_index);
 432                         if (ret)
 433                                 netdev_warn(priv->netdev,
 434                                             "set xps queue failed: %d", ret);
 435
 436                         ring = ring->next;
 437                 }
 438         }
 439 }
 440
 441 static int hns3_nic_net_open(struct net_device *netdev)
 442 {
 443         struct hns3_nic_priv *priv = netdev_priv(netdev);
 444         struct hnae3_handle *h = hns3_get_handle(netdev);
 445         struct hnae3_knic_private_info *kinfo;
 446         int i, ret;
 447
 448         if (hns3_nic_resetting(netdev))
 449                 return -EBUSY;
 450
 451         netif_carrier_off(netdev);
 452
 453         ret = hns3_nic_set_real_num_queue(netdev);
 454         if (ret)
 455                 return ret;
 456
 457         ret = hns3_nic_net_up(netdev);
 458         if (ret) {
 459                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 460                 return ret;
 461         }
 462
 463         kinfo = &h->kinfo;
 464         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 465                 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
 466
 467         if (h->ae_algo->ops->set_timer_task)
 468                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 469
 470         hns3_config_xps(priv);
 471
 472         netif_dbg(h, drv, netdev, "net open\n");
 473
 474         return 0;
 475 }
 476
 477 static void hns3_reset_tx_queue(struct hnae3_handle *h)
 478 {
 479         struct net_device *ndev = h->kinfo.netdev;
 480         struct hns3_nic_priv *priv = netdev_priv(ndev);
 481         struct netdev_queue *dev_queue;
 482         u32 i;
 483
 484         for (i = 0; i < h->kinfo.num_tqps; i++) {
 485                 dev_queue = netdev_get_tx_queue(ndev,
 486                                                 priv->ring_data[i].queue_index);
 487                 netdev_tx_reset_queue(dev_queue);
 488         }
 489 }
 490
 491 static void hns3_nic_net_down(struct net_device *netdev)
 492 {
 493         struct hns3_nic_priv *priv = netdev_priv(netdev);
 494         struct hnae3_handle *h = hns3_get_handle(netdev);
 495         const struct hnae3_ae_ops *ops;
 496         int i;
 497
 498         /* disable vectors */
 499         for (i = 0; i < priv->vector_num; i++)
 500                 hns3_vector_disable(&priv->tqp_vector[i]);
 501
 502         /* disable rcb */
 503         for (i = 0; i < h->kinfo.num_tqps; i++)
 504                 hns3_tqp_disable(h->kinfo.tqp[i]);
 505
 506         /* stop ae_dev */
 507         ops = priv->ae_handle->ae_algo->ops;
 508         if (ops->stop)
 509                 ops->stop(priv->ae_handle);
 510
 511         hns3_free_rx_cpu_rmap(netdev);
 512
 513         /* free irq resources */
 514         hns3_nic_uninit_irq(priv);
 515
 516         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 517          * during reset process, because driver may not be able
 518          * to disable the ring through firmware when downing the netdev.
 519          */
 520         if (!hns3_nic_resetting(netdev))
 521                 hns3_clear_all_ring(priv->ae_handle, false);
 522
 523         hns3_reset_tx_queue(priv->ae_handle);
 524 }
 525
 526 static int hns3_nic_net_stop(struct net_device *netdev)
 527 {
 528         struct hns3_nic_priv *priv = netdev_priv(netdev);
 529         struct hnae3_handle *h = hns3_get_handle(netdev);
 530
 531         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 532                 return 0;
 533
 534         netif_dbg(h, drv, netdev, "net stop\n");
 535
 536         if (h->ae_algo->ops->set_timer_task)
 537                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 538
 539         netif_tx_stop_all_queues(netdev);
 540         netif_carrier_off(netdev);
 541
 542         hns3_nic_net_down(netdev);
 543
 544         return 0;
 545 }
 546
 547 static int hns3_nic_uc_sync(struct net_device *netdev,
 548                             const unsigned char *addr)
 549 {
 550         struct hnae3_handle *h = hns3_get_handle(netdev);
 551
 552         if (h->ae_algo->ops->add_uc_addr)
 553                 return h->ae_algo->ops->add_uc_addr(h, addr);
 554
 555         return 0;
 556 }
 557
 558 static int hns3_nic_uc_unsync(struct net_device *netdev,
 559                               const unsigned char *addr)
 560 {
 561         struct hnae3_handle *h = hns3_get_handle(netdev);
 562
 563         if (h->ae_algo->ops->rm_uc_addr)
 564                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 565
 566         return 0;
 567 }
 568
 569 static int hns3_nic_mc_sync(struct net_device *netdev,
 570                             const unsigned char *addr)
 571 {
 572         struct hnae3_handle *h = hns3_get_handle(netdev);
 573
 574         if (h->ae_algo->ops->add_mc_addr)
 575                 return h->ae_algo->ops->add_mc_addr(h, addr);
 576
 577         return 0;
 578 }
 579
 580 static int hns3_nic_mc_unsync(struct net_device *netdev,
 581                               const unsigned char *addr)
 582 {
 583         struct hnae3_handle *h = hns3_get_handle(netdev);
 584
 585         if (h->ae_algo->ops->rm_mc_addr)
 586                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 587
 588         return 0;
 589 }
 590
 591 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 592 {
 593         u8 flags = 0;
 594
 595         if (netdev->flags & IFF_PROMISC) {
 596                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 597         } else {
 598                 flags |= HNAE3_VLAN_FLTR;
 599                 if (netdev->flags & IFF_ALLMULTI)
 600                         flags |= HNAE3_USER_MPE;
 601         }
 602
 603         return flags;
 604 }
 605
 606 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 607 {
 608         struct hnae3_handle *h = hns3_get_handle(netdev);
 609         u8 new_flags;
 610         int ret;
 611
 612         new_flags = hns3_get_netdev_flags(netdev);
 613
 614         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 615         if (ret) {
 616                 netdev_err(netdev, "sync uc address fail\n");
 617                 if (ret == -ENOSPC)
 618                         new_flags |= HNAE3_OVERFLOW_UPE;
 619         }
 620
 621         if (netdev->flags & IFF_MULTICAST) {
 622                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 623                                     hns3_nic_mc_unsync);
 624                 if (ret) {
 625                         netdev_err(netdev, "sync mc address fail\n");
 626                         if (ret == -ENOSPC)
 627                                 new_flags |= HNAE3_OVERFLOW_MPE;
 628                 }
 629         }
 630
 631         /* User mode Promisc mode enable and vlan filtering is disabled to
 632          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 633          * vlan fitering is enabled
 634          */
 635         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 636         h->netdev_flags = new_flags;
 637         hns3_update_promisc_mode(netdev, new_flags);
 638 }
 639
 640 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 641 {
 642         struct hns3_nic_priv *priv = netdev_priv(netdev);
 643         struct hnae3_handle *h = priv->ae_handle;
 644
 645         if (h->ae_algo->ops->set_promisc_mode) {
 646                 return h->ae_algo->ops->set_promisc_mode(h,
 647                                                 promisc_flags & HNAE3_UPE,
 648                                                 promisc_flags & HNAE3_MPE);
 649         }
 650
 651         return 0;
 652 }
 653
 654 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 655 {
 656         struct hns3_nic_priv *priv = netdev_priv(netdev);
 657         struct hnae3_handle *h = priv->ae_handle;
 658         bool last_state;
 659
 660         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 661                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 662                 if (enable != last_state) {
 663                         netdev_info(netdev,
 664                                     "%s vlan filter\n",
 665                                     enable ? "enable" : "disable");
 666                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 667                 }
 668         }
 669 }
 670
 671 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 672                         u16 *mss, u32 *type_cs_vlan_tso)
 673 {
 674         u32 l4_offset, hdr_len;
 675         union l3_hdr_info l3;
 676         union l4_hdr_info l4;
 677         u32 l4_paylen;
 678         int ret;
 679
 680         if (!skb_is_gso(skb))
 681                 return 0;
 682
 683         ret = skb_cow_head(skb, 0);
 684         if (unlikely(ret))
 685                 return ret;
 686
 687         l3.hdr = skb_network_header(skb);
 688         l4.hdr = skb_transport_header(skb);
 689
 690         /* Software should clear the IPv4's checksum field when tso is
 691          * needed.
 692          */
 693         if (l3.v4->version == 4)
 694                 l3.v4->check = 0;
 695
 696         /* tunnel packet */
 697         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 698                                          SKB_GSO_GRE_CSUM |
 699                                          SKB_GSO_UDP_TUNNEL |
 700                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 701                 if ((!(skb_shinfo(skb)->gso_type &
 702                     SKB_GSO_PARTIAL)) &&
 703                     (skb_shinfo(skb)->gso_type &
 704                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 705                         /* Software should clear the udp's checksum
 706                          * field when tso is needed.
 707                          */
 708                         l4.udp->check = 0;
 709                 }
 710                 /* reset l3&l4 pointers from outer to inner headers */
 711                 l3.hdr = skb_inner_network_header(skb);
 712                 l4.hdr = skb_inner_transport_header(skb);
 713
 714                 /* Software should clear the IPv4's checksum field when
 715                  * tso is needed.
 716                  */
 717                 if (l3.v4->version == 4)
 718                         l3.v4->check = 0;
 719         }
 720
 721         /* normal or tunnel packet */
 722         l4_offset = l4.hdr - skb->data;
 723         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 724
 725         /* remove payload length from inner pseudo checksum when tso */
 726         l4_paylen = skb->len - l4_offset;
 727         csum_replace_by_diff(&l4.tcp->check,
 728                              (__force __wsum)htonl(l4_paylen));
 729
 730         /* find the txbd field values */
 731         *paylen = skb->len - hdr_len;
 732         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 733
 734         /* get MSS for TSO */
 735         *mss = skb_shinfo(skb)->gso_size;
 736
 737         return 0;
 738 }
 739
 740 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 741                                 u8 *il4_proto)
 742 {
 743         union l3_hdr_info l3;
 744         unsigned char *l4_hdr;
 745         unsigned char *exthdr;
 746         u8 l4_proto_tmp;
 747         __be16 frag_off;
 748
 749         /* find outer header point */
 750         l3.hdr = skb_network_header(skb);
 751         l4_hdr = skb_transport_header(skb);
 752
 753         if (skb->protocol == htons(ETH_P_IPV6)) {
 754                 exthdr = l3.hdr + sizeof(*l3.v6);
 755                 l4_proto_tmp = l3.v6->nexthdr;
 756                 if (l4_hdr != exthdr)
 757                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 758                                          &l4_proto_tmp, &frag_off);
 759         } else if (skb->protocol == htons(ETH_P_IP)) {
 760                 l4_proto_tmp = l3.v4->protocol;
 761         } else {
 762                 return -EINVAL;
 763         }
 764
 765         *ol4_proto = l4_proto_tmp;
 766
 767         /* tunnel packet */
 768         if (!skb->encapsulation) {
 769                 *il4_proto = 0;
 770                 return 0;
 771         }
 772
 773         /* find inner header point */
 774         l3.hdr = skb_inner_network_header(skb);
 775         l4_hdr = skb_inner_transport_header(skb);
 776
 777         if (l3.v6->version == 6) {
 778                 exthdr = l3.hdr + sizeof(*l3.v6);
 779                 l4_proto_tmp = l3.v6->nexthdr;
 780                 if (l4_hdr != exthdr)
 781                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 782                                          &l4_proto_tmp, &frag_off);
 783         } else if (l3.v4->version == 4) {
 784                 l4_proto_tmp = l3.v4->protocol;
 785         }
 786
 787         *il4_proto = l4_proto_tmp;
 788
 789         return 0;
 790 }
 791
 792 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 793  * and it is udp packet, which has a dest port as the IANA assigned.
 794  * the hardware is expected to do the checksum offload, but the
 795  * hardware will not do the checksum offload when udp dest port is
 796  * 4789.
 797  */
 798 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 799 {
 800         union l4_hdr_info l4;
 801
 802         l4.hdr = skb_transport_header(skb);
 803
 804         if (!(!skb->encapsulation &&
 805               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 806                 return false;
 807
 808         skb_checksum_help(skb);
 809
 810         return true;
 811 }
 812
 813 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 814                                   u32 *ol_type_vlan_len_msec)
 815 {
 816         u32 l2_len, l3_len, l4_len;
 817         unsigned char *il2_hdr;
 818         union l3_hdr_info l3;
 819         union l4_hdr_info l4;
 820
 821         l3.hdr = skb_network_header(skb);
 822         l4.hdr = skb_transport_header(skb);
 823
 824         /* compute OL2 header size, defined in 2 Bytes */
 825         l2_len = l3.hdr - skb->data;
 826         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 827
 828         /* compute OL3 header size, defined in 4 Bytes */
 829         l3_len = l4.hdr - l3.hdr;
 830         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 831
 832         il2_hdr = skb_inner_mac_header(skb);
 833         /* compute OL4 header size, defined in 4 Bytes */
 834         l4_len = il2_hdr - l4.hdr;
 835         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 836
 837         /* define outer network header type */
 838         if (skb->protocol == htons(ETH_P_IP)) {
 839                 if (skb_is_gso(skb))
 840                         hns3_set_field(*ol_type_vlan_len_msec,
 841                                        HNS3_TXD_OL3T_S,
 842                                        HNS3_OL3T_IPV4_CSUM);
 843                 else
 844                         hns3_set_field(*ol_type_vlan_len_msec,
 845                                        HNS3_TXD_OL3T_S,
 846                                        HNS3_OL3T_IPV4_NO_CSUM);
 847
 848         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 849                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 850                                HNS3_OL3T_IPV6);
 851         }
 852
 853         if (ol4_proto == IPPROTO_UDP)
 854                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 855                                HNS3_TUN_MAC_IN_UDP);
 856         else if (ol4_proto == IPPROTO_GRE)
 857                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 858                                HNS3_TUN_NVGRE);
 859 }
 860
 861 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 862                            u8 il4_proto, u32 *type_cs_vlan_tso,
 863                            u32 *ol_type_vlan_len_msec)
 864 {
 865         unsigned char *l2_hdr = skb->data;
 866         u32 l4_proto = ol4_proto;
 867         union l4_hdr_info l4;
 868         union l3_hdr_info l3;
 869         u32 l2_len, l3_len;
 870
 871         l4.hdr = skb_transport_header(skb);
 872         l3.hdr = skb_network_header(skb);
 873
 874         /* handle encapsulation skb */
 875         if (skb->encapsulation) {
 876                 /* If this is a not UDP/GRE encapsulation skb */
 877                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 878                         /* drop the skb tunnel packet if hardware don't support,
 879                          * because hardware can't calculate csum when TSO.
 880                          */
 881                         if (skb_is_gso(skb))
 882                                 return -EDOM;
 883
 884                         /* the stack computes the IP header already,
 885                          * driver calculate l4 checksum when not TSO.
 886                          */
 887                         skb_checksum_help(skb);
 888                         return 0;
 889                 }
 890
 891                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 892
 893                 /* switch to inner header */
 894                 l2_hdr = skb_inner_mac_header(skb);
 895                 l3.hdr = skb_inner_network_header(skb);
 896                 l4.hdr = skb_inner_transport_header(skb);
 897                 l4_proto = il4_proto;
 898         }
 899
 900         if (l3.v4->version == 4) {
 901                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 902                                HNS3_L3T_IPV4);
 903
 904                 /* the stack computes the IP header already, the only time we
 905                  * need the hardware to recompute it is in the case of TSO.
 906                  */
 907                 if (skb_is_gso(skb))
 908                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 909         } else if (l3.v6->version == 6) {
 910                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 911                                HNS3_L3T_IPV6);
 912         }
 913
 914         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 915         l2_len = l3.hdr - l2_hdr;
 916         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 917
 918         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 919         l3_len = l4.hdr - l3.hdr;
 920         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 921
 922         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 923         switch (l4_proto) {
 924         case IPPROTO_TCP:
 925                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 926                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 927                                HNS3_L4T_TCP);
 928                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 929                                l4.tcp->doff);
 930                 break;
 931         case IPPROTO_UDP:
 932                 if (hns3_tunnel_csum_bug(skb))
 933                         break;
 934
 935                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 936                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 937                                HNS3_L4T_UDP);
 938                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 939                                (sizeof(struct udphdr) >> 2));
 940                 break;
 941         case IPPROTO_SCTP:
 942                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 943                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 944                                HNS3_L4T_SCTP);
 945                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 946                                (sizeof(struct sctphdr) >> 2));
 947                 break;
 948         default:
 949                 /* drop the skb tunnel packet if hardware don't support,
 950                  * because hardware can't calculate csum when TSO.
 951                  */
 952                 if (skb_is_gso(skb))
 953                         return -EDOM;
 954
 955                 /* the stack computes the IP header already,
 956                  * driver calculate l4 checksum when not TSO.
 957                  */
 958                 skb_checksum_help(skb);
 959                 return 0;
 960         }
 961
 962         return 0;
 963 }
 964
 965 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 966 {
 967         /* Config bd buffer end */
 968         if (!!frag_end)
 969                 hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, 1U);
 970         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1U);
 971 }
 972
 973 static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,
 974                              struct sk_buff *skb)
 975 {
 976         struct hnae3_handle *handle = tx_ring->tqp->handle;
 977         struct vlan_ethhdr *vhdr;
 978         int rc;
 979
 980         if (!(skb->protocol == htons(ETH_P_8021Q) ||
 981               skb_vlan_tag_present(skb)))
 982                 return 0;
 983
 984         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 985          * header is allowed in skb, otherwise it will cause RAS error.
 986          */
 987         if (unlikely(skb_vlan_tagged_multi(skb) &&
 988                      handle->port_base_vlan_state ==
 989                      HNAE3_PORT_BASE_VLAN_ENABLE))
 990                 return -EINVAL;
 991
 992         if (skb->protocol == htons(ETH_P_8021Q) &&
 993             !(handle->kinfo.netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
 994                 /* When HW VLAN acceleration is turned off, and the stack
 995                  * sets the protocol to 802.1q, the driver just need to
 996                  * set the protocol to the encapsulated ethertype.
 997                  */
 998                 skb->protocol = vlan_get_protocol(skb);
 999                 return 0;
1000         }
1001
1002         if (skb_vlan_tag_present(skb)) {
1003                 /* Based on hw strategy, use out_vtag in two layer tag case,
1004                  * and use inner_vtag in one tag case.
1005                  */
1006                 if (skb->protocol == htons(ETH_P_8021Q) &&
1007                     handle->port_base_vlan_state ==
1008                     HNAE3_PORT_BASE_VLAN_DISABLE)
1009                         rc = HNS3_OUTER_VLAN_TAG;
1010                 else
1011                         rc = HNS3_INNER_VLAN_TAG;
1012
1013                 skb->protocol = vlan_get_protocol(skb);
1014                 return rc;
1015         }
1016
1017         rc = skb_cow_head(skb, 0);
1018         if (unlikely(rc < 0))
1019                 return rc;
1020
1021         vhdr = (struct vlan_ethhdr *)skb->data;
1022         vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority << VLAN_PRIO_SHIFT)
1023                                          & VLAN_PRIO_MASK);
1024
1025         skb->protocol = vlan_get_protocol(skb);
1026         return 0;
1027 }
1028
1029 static int hns3_fill_skb_desc(struct hns3_enet_ring *ring,
1030                               struct sk_buff *skb, struct hns3_desc *desc)
1031 {
1032         u32 ol_type_vlan_len_msec = 0;
1033         u32 type_cs_vlan_tso = 0;
1034         u32 paylen = skb->len;
1035         u16 inner_vtag = 0;
1036         u16 out_vtag = 0;
1037         u16 mss = 0;
1038         int ret;
1039
1040         ret = hns3_handle_vtags(ring, skb);
1041         if (unlikely(ret < 0)) {
1042                 u64_stats_update_begin(&ring->syncp);
1043                 ring->stats.tx_vlan_err++;
1044                 u64_stats_update_end(&ring->syncp);
1045                 return ret;
1046         } else if (ret == HNS3_INNER_VLAN_TAG) {
1047                 inner_vtag = skb_vlan_tag_get(skb);
1048                 inner_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1049                                 VLAN_PRIO_MASK;
1050                 hns3_set_field(type_cs_vlan_tso, HNS3_TXD_VLAN_B, 1);
1051         } else if (ret == HNS3_OUTER_VLAN_TAG) {
1052                 out_vtag = skb_vlan_tag_get(skb);
1053                 out_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1054                                 VLAN_PRIO_MASK;
1055                 hns3_set_field(ol_type_vlan_len_msec, HNS3_TXD_OVLAN_B,
1056                                1);
1057         }
1058
1059         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1060                 u8 ol4_proto, il4_proto;
1061
1062                 skb_reset_mac_len(skb);
1063
1064                 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1065                 if (unlikely(ret)) {
1066                         u64_stats_update_begin(&ring->syncp);
1067                         ring->stats.tx_l4_proto_err++;
1068                         u64_stats_update_end(&ring->syncp);
1069                         return ret;
1070                 }
1071
1072                 ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1073                                       &type_cs_vlan_tso,
1074                                       &ol_type_vlan_len_msec);
1075                 if (unlikely(ret)) {
1076                         u64_stats_update_begin(&ring->syncp);
1077                         ring->stats.tx_l2l3l4_err++;
1078                         u64_stats_update_end(&ring->syncp);
1079                         return ret;
1080                 }
1081
1082                 ret = hns3_set_tso(skb, &paylen, &mss,
1083                                    &type_cs_vlan_tso);
1084                 if (unlikely(ret)) {
1085                         u64_stats_update_begin(&ring->syncp);
1086                         ring->stats.tx_tso_err++;
1087                         u64_stats_update_end(&ring->syncp);
1088                         return ret;
1089                 }
1090         }
1091
1092         /* Set txbd */
1093         desc->tx.ol_type_vlan_len_msec =
1094                 cpu_to_le32(ol_type_vlan_len_msec);
1095         desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1096         desc->tx.paylen = cpu_to_le32(paylen);
1097         desc->tx.mss = cpu_to_le16(mss);
1098         desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1099         desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1100
1101         return 0;
1102 }
1103
1104 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1105                           unsigned int size, int frag_end,
1106                           enum hns_desc_type type)
1107 {
1108         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1109         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1110         struct device *dev = ring_to_dev(ring);
1111         skb_frag_t *frag;
1112         unsigned int frag_buf_num;
1113         int k, sizeoflast;
1114         dma_addr_t dma;
1115
1116         if (type == DESC_TYPE_SKB) {
1117                 struct sk_buff *skb = (struct sk_buff *)priv;
1118                 int ret;
1119
1120                 ret = hns3_fill_skb_desc(ring, skb, desc);
1121                 if (unlikely(ret))
1122                         return ret;
1123
1124                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1125         } else {
1126                 frag = (skb_frag_t *)priv;
1127                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1128         }
1129
1130         if (unlikely(dma_mapping_error(dev, dma))) {
1131                 u64_stats_update_begin(&ring->syncp);
1132                 ring->stats.sw_err_cnt++;
1133                 u64_stats_update_end(&ring->syncp);
1134                 return -ENOMEM;
1135         }
1136
1137         desc_cb->length = size;
1138
1139         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1140                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1141
1142                 desc_cb->priv = priv;
1143                 desc_cb->dma = dma;
1144                 desc_cb->type = type;
1145                 desc->addr = cpu_to_le64(dma);
1146                 desc->tx.send_size = cpu_to_le16(size);
1147                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1148                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1149                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1150
1151                 ring_ptr_move_fw(ring, next_to_use);
1152                 return 0;
1153         }
1154
1155         frag_buf_num = hns3_tx_bd_count(size);
1156         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1157         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1158
1159         /* When frag size is bigger than hardware limit, split this frag */
1160         for (k = 0; k < frag_buf_num; k++) {
1161                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1162
1163                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1164                 desc_cb->priv = priv;
1165                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1166                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1167                                 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1168
1169                 /* now, fill the descriptor */
1170                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1171                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1172                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1173                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1174                                        frag_end && (k == frag_buf_num - 1) ?
1175                                                 1 : 0);
1176                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1177                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1178
1179                 /* move ring pointer to next */
1180                 ring_ptr_move_fw(ring, next_to_use);
1181
1182                 desc_cb = &ring->desc_cb[ring->next_to_use];
1183                 desc = &ring->desc[ring->next_to_use];
1184         }
1185
1186         return 0;
1187 }
1188
1189 static unsigned int hns3_nic_bd_num(struct sk_buff *skb)
1190 {
1191         unsigned int bd_num;
1192         int i;
1193
1194         /* if the total len is within the max bd limit */
1195         if (likely(skb->len <= HNS3_MAX_BD_SIZE))
1196                 return skb_shinfo(skb)->nr_frags + 1;
1197
1198         bd_num = hns3_tx_bd_count(skb_headlen(skb));
1199
1200         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1201                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1202                 bd_num += hns3_tx_bd_count(skb_frag_size(frag));
1203         }
1204
1205         return bd_num;
1206 }
1207
1208 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1209 {
1210         if (!skb->encapsulation)
1211                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1212
1213         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1214 }
1215
1216 /* HW need every continuous 8 buffer data to be larger than MSS,
1217  * we simplify it by ensuring skb_headlen + the first continuous
1218  * 7 frags to to be larger than gso header len + mss, and the remaining
1219  * continuous 7 frags to be larger than MSS except the last 7 frags.
1220  */
1221 static bool hns3_skb_need_linearized(struct sk_buff *skb)
1222 {
1223         int bd_limit = HNS3_MAX_BD_NUM_NORMAL - 1;
1224         unsigned int tot_len = 0;
1225         int i;
1226
1227         for (i = 0; i < bd_limit; i++)
1228                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i]);
1229
1230         /* ensure headlen + the first 7 frags is greater than mss + header
1231          * and the first 7 frags is greater than mss.
1232          */
1233         if (((tot_len + skb_headlen(skb)) < (skb_shinfo(skb)->gso_size +
1234             hns3_gso_hdr_len(skb))) || (tot_len < skb_shinfo(skb)->gso_size))
1235                 return true;
1236
1237         /* ensure the remaining continuous 7 buffer is greater than mss */
1238         for (i = 0; i < (skb_shinfo(skb)->nr_frags - bd_limit - 1); i++) {
1239                 tot_len -= skb_frag_size(&skb_shinfo(skb)->frags[i]);
1240                 tot_len += skb_frag_size(&skb_shinfo(skb)->frags[i + bd_limit]);
1241
1242                 if (tot_len < skb_shinfo(skb)->gso_size)
1243                         return true;
1244         }
1245
1246         return false;
1247 }
1248
1249 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1250                                   struct sk_buff **out_skb)
1251 {
1252         struct sk_buff *skb = *out_skb;
1253         unsigned int bd_num;
1254
1255         bd_num = hns3_nic_bd_num(skb);
1256         if (unlikely(bd_num > HNS3_MAX_BD_NUM_NORMAL)) {
1257                 struct sk_buff *new_skb;
1258
1259                 if (skb_is_gso(skb) && bd_num <= HNS3_MAX_BD_NUM_TSO &&
1260                     !hns3_skb_need_linearized(skb))
1261                         goto out;
1262
1263                 /* manual split the send packet */
1264                 new_skb = skb_copy(skb, GFP_ATOMIC);
1265                 if (!new_skb)
1266                         return -ENOMEM;
1267                 dev_kfree_skb_any(skb);
1268                 *out_skb = new_skb;
1269
1270                 bd_num = hns3_nic_bd_num(new_skb);
1271                 if ((skb_is_gso(new_skb) && bd_num > HNS3_MAX_BD_NUM_TSO) ||
1272                     (!skb_is_gso(new_skb) && bd_num > HNS3_MAX_BD_NUM_NORMAL))
1273                         return -ENOMEM;
1274
1275                 u64_stats_update_begin(&ring->syncp);
1276                 ring->stats.tx_copy++;
1277                 u64_stats_update_end(&ring->syncp);
1278         }
1279
1280 out:
1281         if (unlikely(ring_space(ring) < bd_num))
1282                 return -EBUSY;
1283
1284         return bd_num;
1285 }
1286
1287 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1288 {
1289         struct device *dev = ring_to_dev(ring);
1290         unsigned int i;
1291
1292         for (i = 0; i < ring->desc_num; i++) {
1293                 /* check if this is where we started */
1294                 if (ring->next_to_use == next_to_use_orig)
1295                         break;
1296
1297                 /* rollback one */
1298                 ring_ptr_move_bw(ring, next_to_use);
1299
1300                 /* unmap the descriptor dma address */
1301                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1302                         dma_unmap_single(dev,
1303                                          ring->desc_cb[ring->next_to_use].dma,
1304                                         ring->desc_cb[ring->next_to_use].length,
1305                                         DMA_TO_DEVICE);
1306                 else if (ring->desc_cb[ring->next_to_use].length)
1307                         dma_unmap_page(dev,
1308                                        ring->desc_cb[ring->next_to_use].dma,
1309                                        ring->desc_cb[ring->next_to_use].length,
1310                                        DMA_TO_DEVICE);
1311
1312                 ring->desc_cb[ring->next_to_use].length = 0;
1313                 ring->desc_cb[ring->next_to_use].dma = 0;
1314         }
1315 }
1316
1317 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1318 {
1319         struct hns3_nic_priv *priv = netdev_priv(netdev);
1320         struct hns3_nic_ring_data *ring_data =
1321                 &tx_ring_data(priv, skb->queue_mapping);
1322         struct hns3_enet_ring *ring = ring_data->ring;
1323         struct netdev_queue *dev_queue;
1324         skb_frag_t *frag;
1325         int next_to_use_head;
1326         int buf_num;
1327         int seg_num;
1328         int size;
1329         int ret;
1330         int i;
1331
1332         /* Prefetch the data used later */
1333         prefetch(skb->data);
1334
1335         buf_num = hns3_nic_maybe_stop_tx(ring, &skb);
1336         if (unlikely(buf_num <= 0)) {
1337                 if (buf_num == -EBUSY) {
1338                         u64_stats_update_begin(&ring->syncp);
1339                         ring->stats.tx_busy++;
1340                         u64_stats_update_end(&ring->syncp);
1341                         goto out_net_tx_busy;
1342                 } else if (buf_num == -ENOMEM) {
1343                         u64_stats_update_begin(&ring->syncp);
1344                         ring->stats.sw_err_cnt++;
1345                         u64_stats_update_end(&ring->syncp);
1346                 }
1347
1348                 hns3_rl_err(netdev, "xmit error: %d!\n", buf_num);
1349                 goto out_err_tx_ok;
1350         }
1351
1352         /* No. of segments (plus a header) */
1353         seg_num = skb_shinfo(skb)->nr_frags + 1;
1354         /* Fill the first part */
1355         size = skb_headlen(skb);
1356
1357         next_to_use_head = ring->next_to_use;
1358
1359         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1360                              DESC_TYPE_SKB);
1361         if (unlikely(ret))
1362                 goto fill_err;
1363
1364         /* Fill the fragments */
1365         for (i = 1; i < seg_num; i++) {
1366                 frag = &skb_shinfo(skb)->frags[i - 1];
1367                 size = skb_frag_size(frag);
1368
1369                 ret = hns3_fill_desc(ring, frag, size,
1370                                      seg_num - 1 == i ? 1 : 0,
1371                                      DESC_TYPE_PAGE);
1372
1373                 if (unlikely(ret))
1374                         goto fill_err;
1375         }
1376
1377         /* Complete translate all packets */
1378         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1379         netdev_tx_sent_queue(dev_queue, skb->len);
1380
1381         wmb(); /* Commit all data before submit */
1382
1383         hnae3_queue_xmit(ring->tqp, buf_num);
1384
1385         return NETDEV_TX_OK;
1386
1387 fill_err:
1388         hns3_clear_desc(ring, next_to_use_head);
1389
1390 out_err_tx_ok:
1391         dev_kfree_skb_any(skb);
1392         return NETDEV_TX_OK;
1393
1394 out_net_tx_busy:
1395         netif_stop_subqueue(netdev, ring_data->queue_index);
1396         smp_mb(); /* Commit all data before submit */
1397
1398         return NETDEV_TX_BUSY;
1399 }
1400
1401 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1402 {
1403         struct hnae3_handle *h = hns3_get_handle(netdev);
1404         struct sockaddr *mac_addr = p;
1405         int ret;
1406
1407         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1408                 return -EADDRNOTAVAIL;
1409
1410         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1411                 netdev_info(netdev, "already using mac address %pM\n",
1412                             mac_addr->sa_data);
1413                 return 0;
1414         }
1415
1416         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1417         if (ret) {
1418                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1419                 return ret;
1420         }
1421
1422         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1423
1424         return 0;
1425 }
1426
1427 static int hns3_nic_do_ioctl(struct net_device *netdev,
1428                              struct ifreq *ifr, int cmd)
1429 {
1430         struct hnae3_handle *h = hns3_get_handle(netdev);
1431
1432         if (!netif_running(netdev))
1433                 return -EINVAL;
1434
1435         if (!h->ae_algo->ops->do_ioctl)
1436                 return -EOPNOTSUPP;
1437
1438         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1439 }
1440
1441 static int hns3_nic_set_features(struct net_device *netdev,
1442                                  netdev_features_t features)
1443 {
1444         netdev_features_t changed = netdev->features ^ features;
1445         struct hns3_nic_priv *priv = netdev_priv(netdev);
1446         struct hnae3_handle *h = priv->ae_handle;
1447         bool enable;
1448         int ret;
1449
1450         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1451                 enable = !!(features & NETIF_F_GRO_HW);
1452                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1453                 if (ret)
1454                         return ret;
1455         }
1456
1457         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1458             h->ae_algo->ops->enable_vlan_filter) {
1459                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1460                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1461         }
1462
1463         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1464             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1465                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1466                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1467                 if (ret)
1468                         return ret;
1469         }
1470
1471         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1472                 enable = !!(features & NETIF_F_NTUPLE);
1473                 h->ae_algo->ops->enable_fd(h, enable);
1474         }
1475
1476         netdev->features = features;
1477         return 0;
1478 }
1479
1480 static void hns3_nic_get_stats64(struct net_device *netdev,
1481                                  struct rtnl_link_stats64 *stats)
1482 {
1483         struct hns3_nic_priv *priv = netdev_priv(netdev);
1484         int queue_num = priv->ae_handle->kinfo.num_tqps;
1485         struct hnae3_handle *handle = priv->ae_handle;
1486         struct hns3_enet_ring *ring;
1487         u64 rx_length_errors = 0;
1488         u64 rx_crc_errors = 0;
1489         u64 rx_multicast = 0;
1490         unsigned int start;
1491         u64 tx_errors = 0;
1492         u64 rx_errors = 0;
1493         unsigned int idx;
1494         u64 tx_bytes = 0;
1495         u64 rx_bytes = 0;
1496         u64 tx_pkts = 0;
1497         u64 rx_pkts = 0;
1498         u64 tx_drop = 0;
1499         u64 rx_drop = 0;
1500
1501         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1502                 return;
1503
1504         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1505
1506         for (idx = 0; idx < queue_num; idx++) {
1507                 /* fetch the tx stats */
1508                 ring = priv->ring_data[idx].ring;
1509                 do {
1510                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1511                         tx_bytes += ring->stats.tx_bytes;
1512                         tx_pkts += ring->stats.tx_pkts;
1513                         tx_drop += ring->stats.sw_err_cnt;
1514                         tx_drop += ring->stats.tx_vlan_err;
1515                         tx_drop += ring->stats.tx_l4_proto_err;
1516                         tx_drop += ring->stats.tx_l2l3l4_err;
1517                         tx_drop += ring->stats.tx_tso_err;
1518                         tx_errors += ring->stats.sw_err_cnt;
1519                         tx_errors += ring->stats.tx_vlan_err;
1520                         tx_errors += ring->stats.tx_l4_proto_err;
1521                         tx_errors += ring->stats.tx_l2l3l4_err;
1522                         tx_errors += ring->stats.tx_tso_err;
1523                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1524
1525                 /* fetch the rx stats */
1526                 ring = priv->ring_data[idx + queue_num].ring;
1527                 do {
1528                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1529                         rx_bytes += ring->stats.rx_bytes;
1530                         rx_pkts += ring->stats.rx_pkts;
1531                         rx_drop += ring->stats.l2_err;
1532                         rx_errors += ring->stats.l2_err;
1533                         rx_errors += ring->stats.l3l4_csum_err;
1534                         rx_crc_errors += ring->stats.l2_err;
1535                         rx_multicast += ring->stats.rx_multicast;
1536                         rx_length_errors += ring->stats.err_pkt_len;
1537                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1538         }
1539
1540         stats->tx_bytes = tx_bytes;
1541         stats->tx_packets = tx_pkts;
1542         stats->rx_bytes = rx_bytes;
1543         stats->rx_packets = rx_pkts;
1544
1545         stats->rx_errors = rx_errors;
1546         stats->multicast = rx_multicast;
1547         stats->rx_length_errors = rx_length_errors;
1548         stats->rx_crc_errors = rx_crc_errors;
1549         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1550
1551         stats->tx_errors = tx_errors;
1552         stats->rx_dropped = rx_drop;
1553         stats->tx_dropped = tx_drop;
1554         stats->collisions = netdev->stats.collisions;
1555         stats->rx_over_errors = netdev->stats.rx_over_errors;
1556         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1557         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1558         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1559         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1560         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1561         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1562         stats->tx_window_errors = netdev->stats.tx_window_errors;
1563         stats->rx_compressed = netdev->stats.rx_compressed;
1564         stats->tx_compressed = netdev->stats.tx_compressed;
1565 }
1566
1567 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1568 {
1569         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1570         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1571         struct hnae3_knic_private_info *kinfo;
1572         u8 tc = mqprio_qopt->qopt.num_tc;
1573         u16 mode = mqprio_qopt->mode;
1574         u8 hw = mqprio_qopt->qopt.hw;
1575         struct hnae3_handle *h;
1576
1577         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1578                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1579                 return -EOPNOTSUPP;
1580
1581         if (tc > HNAE3_MAX_TC)
1582                 return -EINVAL;
1583
1584         if (!netdev)
1585                 return -EINVAL;
1586
1587         h = hns3_get_handle(netdev);
1588         kinfo = &h->kinfo;
1589
1590         netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1591
1592         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1593                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1594 }
1595
1596 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1597                              void *type_data)
1598 {
1599         if (type != TC_SETUP_QDISC_MQPRIO)
1600                 return -EOPNOTSUPP;
1601
1602         return hns3_setup_tc(dev, type_data);
1603 }
1604
1605 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1606                                 __be16 proto, u16 vid)
1607 {
1608         struct hnae3_handle *h = hns3_get_handle(netdev);
1609         int ret = -EIO;
1610
1611         if (h->ae_algo->ops->set_vlan_filter)
1612                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1613
1614         return ret;
1615 }
1616
1617 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1618                                  __be16 proto, u16 vid)
1619 {
1620         struct hnae3_handle *h = hns3_get_handle(netdev);
1621         int ret = -EIO;
1622
1623         if (h->ae_algo->ops->set_vlan_filter)
1624                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1625
1626         return ret;
1627 }
1628
1629 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1630                                 u8 qos, __be16 vlan_proto)
1631 {
1632         struct hnae3_handle *h = hns3_get_handle(netdev);
1633         int ret = -EIO;
1634
1635         netif_dbg(h, drv, netdev,
1636                   "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=%u\n",
1637                   vf, vlan, qos, vlan_proto);
1638
1639         if (h->ae_algo->ops->set_vf_vlan_filter)
1640                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1641                                                           qos, vlan_proto);
1642
1643         return ret;
1644 }
1645
1646 static int hns3_set_vf_spoofchk(struct net_device *netdev, int vf, bool enable)
1647 {
1648         struct hnae3_handle *handle = hns3_get_handle(netdev);
1649
1650         if (hns3_nic_resetting(netdev))
1651                 return -EBUSY;
1652
1653         if (!handle->ae_algo->ops->set_vf_spoofchk)
1654                 return -EOPNOTSUPP;
1655
1656         return handle->ae_algo->ops->set_vf_spoofchk(handle, vf, enable);
1657 }
1658
1659 static int hns3_set_vf_trust(struct net_device *netdev, int vf, bool enable)
1660 {
1661         struct hnae3_handle *handle = hns3_get_handle(netdev);
1662
1663         if (!handle->ae_algo->ops->set_vf_trust)
1664                 return -EOPNOTSUPP;
1665
1666         return handle->ae_algo->ops->set_vf_trust(handle, vf, enable);
1667 }
1668
1669 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1670 {
1671         struct hnae3_handle *h = hns3_get_handle(netdev);
1672         int ret;
1673
1674         if (hns3_nic_resetting(netdev))
1675                 return -EBUSY;
1676
1677         if (!h->ae_algo->ops->set_mtu)
1678                 return -EOPNOTSUPP;
1679
1680         netif_dbg(h, drv, netdev,
1681                   "change mtu from %u to %d\n", netdev->mtu, new_mtu);
1682
1683         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1684         if (ret)
1685                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1686                            ret);
1687         else
1688                 netdev->mtu = new_mtu;
1689
1690         return ret;
1691 }
1692
1693 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1694 {
1695         struct hns3_nic_priv *priv = netdev_priv(ndev);
1696         struct hnae3_handle *h = hns3_get_handle(ndev);
1697         struct hns3_enet_ring *tx_ring = NULL;
1698         struct napi_struct *napi;
1699         int timeout_queue = 0;
1700         int hw_head, hw_tail;
1701         int fbd_num, fbd_oft;
1702         int ebd_num, ebd_oft;
1703         int bd_num, bd_err;
1704         int ring_en, tc;
1705         int i;
1706
1707         /* Find the stopped queue the same way the stack does */
1708         for (i = 0; i < ndev->num_tx_queues; i++) {
1709                 struct netdev_queue *q;
1710                 unsigned long trans_start;
1711
1712                 q = netdev_get_tx_queue(ndev, i);
1713                 trans_start = q->trans_start;
1714                 if (netif_xmit_stopped(q) &&
1715                     time_after(jiffies,
1716                                (trans_start + ndev->watchdog_timeo))) {
1717                         timeout_queue = i;
1718                         break;
1719                 }
1720         }
1721
1722         if (i == ndev->num_tx_queues) {
1723                 netdev_info(ndev,
1724                             "no netdev TX timeout queue found, timeout count: %llu\n",
1725                             priv->tx_timeout_count);
1726                 return false;
1727         }
1728
1729         priv->tx_timeout_count++;
1730
1731         tx_ring = priv->ring_data[timeout_queue].ring;
1732         napi = &tx_ring->tqp_vector->napi;
1733
1734         netdev_info(ndev,
1735                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1736                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1737                     tx_ring->next_to_clean, napi->state);
1738
1739         netdev_info(ndev,
1740                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1741                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1742                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1743
1744         netdev_info(ndev,
1745                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1746                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1747                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1748
1749         /* When mac received many pause frames continuous, it's unable to send
1750          * packets, which may cause tx timeout
1751          */
1752         if (h->ae_algo->ops->get_mac_stats) {
1753                 struct hns3_mac_stats mac_stats;
1754
1755                 h->ae_algo->ops->get_mac_stats(h, &mac_stats);
1756                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1757                             mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
1758         }
1759
1760         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1761                                 HNS3_RING_TX_RING_HEAD_REG);
1762         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1763                                 HNS3_RING_TX_RING_TAIL_REG);
1764         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1765                                 HNS3_RING_TX_RING_FBDNUM_REG);
1766         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1767                                 HNS3_RING_TX_RING_OFFSET_REG);
1768         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1769                                 HNS3_RING_TX_RING_EBDNUM_REG);
1770         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1771                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1772         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1773                                HNS3_RING_TX_RING_BD_NUM_REG);
1774         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1775                                HNS3_RING_TX_RING_BD_ERR_REG);
1776         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1777         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1778
1779         netdev_info(ndev,
1780                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1781                     bd_num, hw_head, hw_tail, bd_err,
1782                     readl(tx_ring->tqp_vector->mask_addr));
1783         netdev_info(ndev,
1784                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1785                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1786
1787         return true;
1788 }
1789
1790 static void hns3_nic_net_timeout(struct net_device *ndev)
1791 {
1792         struct hns3_nic_priv *priv = netdev_priv(ndev);
1793         struct hnae3_handle *h = priv->ae_handle;
1794
1795         if (!hns3_get_tx_timeo_queue_info(ndev))
1796                 return;
1797
1798         /* request the reset, and let the hclge to determine
1799          * which reset level should be done
1800          */
1801         if (h->ae_algo->ops->reset_event)
1802                 h->ae_algo->ops->reset_event(h->pdev, h);
1803 }
1804
1805 #ifdef CONFIG_RFS_ACCEL
1806 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1807                               u16 rxq_index, u32 flow_id)
1808 {
1809         struct hnae3_handle *h = hns3_get_handle(dev);
1810         struct flow_keys fkeys;
1811
1812         if (!h->ae_algo->ops->add_arfs_entry)
1813                 return -EOPNOTSUPP;
1814
1815         if (skb->encapsulation)
1816                 return -EPROTONOSUPPORT;
1817
1818         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1819                 return -EPROTONOSUPPORT;
1820
1821         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1822              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1823             (fkeys.basic.ip_proto != IPPROTO_TCP &&
1824              fkeys.basic.ip_proto != IPPROTO_UDP))
1825                 return -EPROTONOSUPPORT;
1826
1827         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1828 }
1829 #endif
1830
1831 static int hns3_nic_get_vf_config(struct net_device *ndev, int vf,
1832                                   struct ifla_vf_info *ivf)
1833 {
1834         struct hnae3_handle *h = hns3_get_handle(ndev);
1835
1836         if (!h->ae_algo->ops->get_vf_config)
1837                 return -EOPNOTSUPP;
1838
1839         return h->ae_algo->ops->get_vf_config(h, vf, ivf);
1840 }
1841
1842 static int hns3_nic_set_vf_link_state(struct net_device *ndev, int vf,
1843                                       int link_state)
1844 {
1845         struct hnae3_handle *h = hns3_get_handle(ndev);
1846
1847         if (!h->ae_algo->ops->set_vf_link_state)
1848                 return -EOPNOTSUPP;
1849
1850         return h->ae_algo->ops->set_vf_link_state(h, vf, link_state);
1851 }
1852
1853 static int hns3_nic_set_vf_rate(struct net_device *ndev, int vf,
1854                                 int min_tx_rate, int max_tx_rate)
1855 {
1856         struct hnae3_handle *h = hns3_get_handle(ndev);
1857
1858         if (!h->ae_algo->ops->set_vf_rate)
1859                 return -EOPNOTSUPP;
1860
1861         return h->ae_algo->ops->set_vf_rate(h, vf, min_tx_rate, max_tx_rate,
1862                                             false);
1863 }
1864
1865 static const struct net_device_ops hns3_nic_netdev_ops = {
1866         .ndo_open               = hns3_nic_net_open,
1867         .ndo_stop               = hns3_nic_net_stop,
1868         .ndo_start_xmit         = hns3_nic_net_xmit,
1869         .ndo_tx_timeout         = hns3_nic_net_timeout,
1870         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1871         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1872         .ndo_change_mtu         = hns3_nic_change_mtu,
1873         .ndo_set_features       = hns3_nic_set_features,
1874         .ndo_get_stats64        = hns3_nic_get_stats64,
1875         .ndo_setup_tc           = hns3_nic_setup_tc,
1876         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1877         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1878         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1879         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1880         .ndo_set_vf_spoofchk    = hns3_set_vf_spoofchk,
1881         .ndo_set_vf_trust       = hns3_set_vf_trust,
1882 #ifdef CONFIG_RFS_ACCEL
1883         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
1884 #endif
1885         .ndo_get_vf_config      = hns3_nic_get_vf_config,
1886         .ndo_set_vf_link_state  = hns3_nic_set_vf_link_state,
1887         .ndo_set_vf_rate        = hns3_nic_set_vf_rate,
1888 };
1889
1890 bool hns3_is_phys_func(struct pci_dev *pdev)
1891 {
1892         u32 dev_id = pdev->device;
1893
1894         switch (dev_id) {
1895         case HNAE3_DEV_ID_GE:
1896         case HNAE3_DEV_ID_25GE:
1897         case HNAE3_DEV_ID_25GE_RDMA:
1898         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1899         case HNAE3_DEV_ID_50GE_RDMA:
1900         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1901         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1902                 return true;
1903         case HNAE3_DEV_ID_100G_VF:
1904         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1905                 return false;
1906         default:
1907                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1908                          dev_id);
1909         }
1910
1911         return false;
1912 }
1913
1914 static void hns3_disable_sriov(struct pci_dev *pdev)
1915 {
1916         /* If our VFs are assigned we cannot shut down SR-IOV
1917          * without causing issues, so just leave the hardware
1918          * available but disabled
1919          */
1920         if (pci_vfs_assigned(pdev)) {
1921                 dev_warn(&pdev->dev,
1922                          "disabling driver while VFs are assigned\n");
1923                 return;
1924         }
1925
1926         pci_disable_sriov(pdev);
1927 }
1928
1929 static void hns3_get_dev_capability(struct pci_dev *pdev,
1930                                     struct hnae3_ae_dev *ae_dev)
1931 {
1932         if (pdev->revision >= 0x21) {
1933                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1934                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1935         }
1936 }
1937
1938 /* hns3_probe - Device initialization routine
1939  * @pdev: PCI device information struct
1940  * @ent: entry in hns3_pci_tbl
1941  *
1942  * hns3_probe initializes a PF identified by a pci_dev structure.
1943  * The OS initialization, configuring of the PF private structure,
1944  * and a hardware reset occur.
1945  *
1946  * Returns 0 on success, negative on failure
1947  */
1948 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1949 {
1950         struct hnae3_ae_dev *ae_dev;
1951         int ret;
1952
1953         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
1954         if (!ae_dev) {
1955                 ret = -ENOMEM;
1956                 return ret;
1957         }
1958
1959         ae_dev->pdev = pdev;
1960         ae_dev->flag = ent->driver_data;
1961         ae_dev->reset_type = HNAE3_NONE_RESET;
1962         hns3_get_dev_capability(pdev, ae_dev);
1963         pci_set_drvdata(pdev, ae_dev);
1964
1965         ret = hnae3_register_ae_dev(ae_dev);
1966         if (ret) {
1967                 devm_kfree(&pdev->dev, ae_dev);
1968                 pci_set_drvdata(pdev, NULL);
1969         }
1970
1971         return ret;
1972 }
1973
1974 /* hns3_remove - Device removal routine
1975  * @pdev: PCI device information struct
1976  */
1977 static void hns3_remove(struct pci_dev *pdev)
1978 {
1979         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1980
1981         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1982                 hns3_disable_sriov(pdev);
1983
1984         hnae3_unregister_ae_dev(ae_dev);
1985         pci_set_drvdata(pdev, NULL);
1986 }
1987
1988 /**
1989  * hns3_pci_sriov_configure
1990  * @pdev: pointer to a pci_dev structure
1991  * @num_vfs: number of VFs to allocate
1992  *
1993  * Enable or change the number of VFs. Called when the user updates the number
1994  * of VFs in sysfs.
1995  **/
1996 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1997 {
1998         int ret;
1999
2000         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
2001                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
2002                 return -EINVAL;
2003         }
2004
2005         if (num_vfs) {
2006                 ret = pci_enable_sriov(pdev, num_vfs);
2007                 if (ret)
2008                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
2009                 else
2010                         return num_vfs;
2011         } else if (!pci_vfs_assigned(pdev)) {
2012                 pci_disable_sriov(pdev);
2013         } else {
2014                 dev_warn(&pdev->dev,
2015                          "Unable to free VFs because some are assigned to VMs.\n");
2016         }
2017
2018         return 0;
2019 }
2020
2021 static void hns3_shutdown(struct pci_dev *pdev)
2022 {
2023         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2024
2025         hnae3_unregister_ae_dev(ae_dev);
2026         devm_kfree(&pdev->dev, ae_dev);
2027         pci_set_drvdata(pdev, NULL);
2028
2029         if (system_state == SYSTEM_POWER_OFF)
2030                 pci_set_power_state(pdev, PCI_D3hot);
2031 }
2032
2033 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
2034                                             pci_channel_state_t state)
2035 {
2036         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2037         pci_ers_result_t ret;
2038
2039         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
2040
2041         if (state == pci_channel_io_perm_failure)
2042                 return PCI_ERS_RESULT_DISCONNECT;
2043
2044         if (!ae_dev || !ae_dev->ops) {
2045                 dev_err(&pdev->dev,
2046                         "Can't recover - error happened before device initialized\n");
2047                 return PCI_ERS_RESULT_NONE;
2048         }
2049
2050         if (ae_dev->ops->handle_hw_ras_error)
2051                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
2052         else
2053                 return PCI_ERS_RESULT_NONE;
2054
2055         return ret;
2056 }
2057
2058 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
2059 {
2060         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2061         const struct hnae3_ae_ops *ops;
2062         enum hnae3_reset_type reset_type;
2063         struct device *dev = &pdev->dev;
2064
2065         if (!ae_dev || !ae_dev->ops)
2066                 return PCI_ERS_RESULT_NONE;
2067
2068         ops = ae_dev->ops;
2069         /* request the reset */
2070         if (ops->reset_event && ops->get_reset_level &&
2071             ops->set_default_reset_request) {
2072                 if (ae_dev->hw_err_reset_req) {
2073                         reset_type = ops->get_reset_level(ae_dev,
2074                                                 &ae_dev->hw_err_reset_req);
2075                         ops->set_default_reset_request(ae_dev, reset_type);
2076                         dev_info(dev, "requesting reset due to PCI error\n");
2077                         ops->reset_event(pdev, NULL);
2078                 }
2079
2080                 return PCI_ERS_RESULT_RECOVERED;
2081         }
2082
2083         return PCI_ERS_RESULT_DISCONNECT;
2084 }
2085
2086 static void hns3_reset_prepare(struct pci_dev *pdev)
2087 {
2088         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2089
2090         dev_info(&pdev->dev, "hns3 flr prepare\n");
2091         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
2092                 ae_dev->ops->flr_prepare(ae_dev);
2093 }
2094
2095 static void hns3_reset_done(struct pci_dev *pdev)
2096 {
2097         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2098
2099         dev_info(&pdev->dev, "hns3 flr done\n");
2100         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
2101                 ae_dev->ops->flr_done(ae_dev);
2102 }
2103
2104 static const struct pci_error_handlers hns3_err_handler = {
2105         .error_detected = hns3_error_detected,
2106         .slot_reset     = hns3_slot_reset,
2107         .reset_prepare  = hns3_reset_prepare,
2108         .reset_done     = hns3_reset_done,
2109 };
2110
2111 static struct pci_driver hns3_driver = {
2112         .name     = hns3_driver_name,
2113         .id_table = hns3_pci_tbl,
2114         .probe    = hns3_probe,
2115         .remove   = hns3_remove,
2116         .shutdown = hns3_shutdown,
2117         .sriov_configure = hns3_pci_sriov_configure,
2118         .err_handler    = &hns3_err_handler,
2119 };
2120
2121 /* set default feature to hns3 */
2122 static void hns3_set_default_feature(struct net_device *netdev)
2123 {
2124         struct hnae3_handle *h = hns3_get_handle(netdev);
2125         struct pci_dev *pdev = h->pdev;
2126
2127         netdev->priv_flags |= IFF_UNICAST_FLT;
2128
2129         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2130                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2131                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2132                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2133                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2134
2135         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
2136
2137         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2138
2139         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2140                 NETIF_F_HW_VLAN_CTAG_FILTER |
2141                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2142                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2143                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2144                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2145                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2146
2147         netdev->vlan_features |=
2148                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2149                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2150                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2151                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2152                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2153
2154         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2155                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2156                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2157                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2158                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2159                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
2160
2161         if (pdev->revision >= 0x21) {
2162                 netdev->hw_features |= NETIF_F_GRO_HW;
2163                 netdev->features |= NETIF_F_GRO_HW;
2164
2165                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2166                         netdev->hw_features |= NETIF_F_NTUPLE;
2167                         netdev->features |= NETIF_F_NTUPLE;
2168                 }
2169         }
2170 }
2171
2172 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2173                              struct hns3_desc_cb *cb)
2174 {
2175         unsigned int order = hns3_page_order(ring);
2176         struct page *p;
2177
2178         p = dev_alloc_pages(order);
2179         if (!p)
2180                 return -ENOMEM;
2181
2182         cb->priv = p;
2183         cb->page_offset = 0;
2184         cb->reuse_flag = 0;
2185         cb->buf  = page_address(p);
2186         cb->length = hns3_page_size(ring);
2187         cb->type = DESC_TYPE_PAGE;
2188
2189         return 0;
2190 }
2191
2192 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2193                              struct hns3_desc_cb *cb)
2194 {
2195         if (cb->type == DESC_TYPE_SKB)
2196                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2197         else if (!HNAE3_IS_TX_RING(ring))
2198                 put_page((struct page *)cb->priv);
2199         memset(cb, 0, sizeof(*cb));
2200 }
2201
2202 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2203 {
2204         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2205                                cb->length, ring_to_dma_dir(ring));
2206
2207         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2208                 return -EIO;
2209
2210         return 0;
2211 }
2212
2213 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2214                               struct hns3_desc_cb *cb)
2215 {
2216         if (cb->type == DESC_TYPE_SKB)
2217                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2218                                  ring_to_dma_dir(ring));
2219         else if (cb->length)
2220                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2221                                ring_to_dma_dir(ring));
2222 }
2223
2224 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2225 {
2226         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2227         ring->desc[i].addr = 0;
2228 }
2229
2230 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2231 {
2232         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2233
2234         if (!ring->desc_cb[i].dma)
2235                 return;
2236
2237         hns3_buffer_detach(ring, i);
2238         hns3_free_buffer(ring, cb);
2239 }
2240
2241 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2242 {
2243         int i;
2244
2245         for (i = 0; i < ring->desc_num; i++)
2246                 hns3_free_buffer_detach(ring, i);
2247 }
2248
2249 /* free desc along with its attached buffer */
2250 static void hns3_free_desc(struct hns3_enet_ring *ring)
2251 {
2252         int size = ring->desc_num * sizeof(ring->desc[0]);
2253
2254         hns3_free_buffers(ring);
2255
2256         if (ring->desc) {
2257                 dma_free_coherent(ring_to_dev(ring), size,
2258                                   ring->desc, ring->desc_dma_addr);
2259                 ring->desc = NULL;
2260         }
2261 }
2262
2263 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2264 {
2265         int size = ring->desc_num * sizeof(ring->desc[0]);
2266
2267         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2268                                         &ring->desc_dma_addr, GFP_KERNEL);
2269         if (!ring->desc)
2270                 return -ENOMEM;
2271
2272         return 0;
2273 }
2274
2275 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2276                                    struct hns3_desc_cb *cb)
2277 {
2278         int ret;
2279
2280         ret = hns3_alloc_buffer(ring, cb);
2281         if (ret)
2282                 goto out;
2283
2284         ret = hns3_map_buffer(ring, cb);
2285         if (ret)
2286                 goto out_with_buf;
2287
2288         return 0;
2289
2290 out_with_buf:
2291         hns3_free_buffer(ring, cb);
2292 out:
2293         return ret;
2294 }
2295
2296 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2297 {
2298         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2299
2300         if (ret)
2301                 return ret;
2302
2303         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2304
2305         return 0;
2306 }
2307
2308 /* Allocate memory for raw pkg, and map with dma */
2309 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2310 {
2311         int i, j, ret;
2312
2313         for (i = 0; i < ring->desc_num; i++) {
2314                 ret = hns3_alloc_buffer_attach(ring, i);
2315                 if (ret)
2316                         goto out_buffer_fail;
2317         }
2318
2319         return 0;
2320
2321 out_buffer_fail:
2322         for (j = i - 1; j >= 0; j--)
2323                 hns3_free_buffer_detach(ring, j);
2324         return ret;
2325 }
2326
2327 /* detach a in-used buffer and replace with a reserved one */
2328 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2329                                 struct hns3_desc_cb *res_cb)
2330 {
2331         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2332         ring->desc_cb[i] = *res_cb;
2333         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2334         ring->desc[i].rx.bd_base_info = 0;
2335 }
2336
2337 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2338 {
2339         ring->desc_cb[i].reuse_flag = 0;
2340         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2341                                          ring->desc_cb[i].page_offset);
2342         ring->desc[i].rx.bd_base_info = 0;
2343 }
2344
2345 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2346                                   int *bytes, int *pkts)
2347 {
2348         int ntc = ring->next_to_clean;
2349         struct hns3_desc_cb *desc_cb;
2350
2351         while (head != ntc) {
2352                 desc_cb = &ring->desc_cb[ntc];
2353                 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2354                 (*bytes) += desc_cb->length;
2355                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2356                 hns3_free_buffer_detach(ring, ntc);
2357
2358                 if (++ntc == ring->desc_num)
2359                         ntc = 0;
2360
2361                 /* Issue prefetch for next Tx descriptor */
2362                 prefetch(&ring->desc_cb[ntc]);
2363         }
2364
2365         /* This smp_store_release() pairs with smp_load_acquire() in
2366          * ring_space called by hns3_nic_net_xmit.
2367          */
2368         smp_store_release(&ring->next_to_clean, ntc);
2369 }
2370
2371 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2372 {
2373         int u = ring->next_to_use;
2374         int c = ring->next_to_clean;
2375
2376         if (unlikely(h > ring->desc_num))
2377                 return 0;
2378
2379         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2380 }
2381
2382 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2383 {
2384         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2385         struct hns3_nic_priv *priv = netdev_priv(netdev);
2386         struct netdev_queue *dev_queue;
2387         int bytes, pkts;
2388         int head;
2389
2390         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2391         rmb(); /* Make sure head is ready before touch any data */
2392
2393         if (is_ring_empty(ring) || head == ring->next_to_clean)
2394                 return; /* no data to poll */
2395
2396         if (unlikely(!is_valid_clean_head(ring, head))) {
2397                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2398                            ring->next_to_use, ring->next_to_clean);
2399
2400                 u64_stats_update_begin(&ring->syncp);
2401                 ring->stats.io_err_cnt++;
2402                 u64_stats_update_end(&ring->syncp);
2403                 return;
2404         }
2405
2406         bytes = 0;
2407         pkts = 0;
2408         hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2409
2410         ring->tqp_vector->tx_group.total_bytes += bytes;
2411         ring->tqp_vector->tx_group.total_packets += pkts;
2412
2413         u64_stats_update_begin(&ring->syncp);
2414         ring->stats.tx_bytes += bytes;
2415         ring->stats.tx_pkts += pkts;
2416         u64_stats_update_end(&ring->syncp);
2417
2418         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2419         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2420
2421         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2422                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2423                 /* Make sure that anybody stopping the queue after this
2424                  * sees the new next_to_clean.
2425                  */
2426                 smp_mb();
2427                 if (netif_tx_queue_stopped(dev_queue) &&
2428                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2429                         netif_tx_wake_queue(dev_queue);
2430                         ring->stats.restart_queue++;
2431                 }
2432         }
2433 }
2434
2435 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2436 {
2437         int ntc = ring->next_to_clean;
2438         int ntu = ring->next_to_use;
2439
2440         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2441 }
2442
2443 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2444                                       int cleand_count)
2445 {
2446         struct hns3_desc_cb *desc_cb;
2447         struct hns3_desc_cb res_cbs;
2448         int i, ret;
2449
2450         for (i = 0; i < cleand_count; i++) {
2451                 desc_cb = &ring->desc_cb[ring->next_to_use];
2452                 if (desc_cb->reuse_flag) {
2453                         u64_stats_update_begin(&ring->syncp);
2454                         ring->stats.reuse_pg_cnt++;
2455                         u64_stats_update_end(&ring->syncp);
2456
2457                         hns3_reuse_buffer(ring, ring->next_to_use);
2458                 } else {
2459                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2460                         if (ret) {
2461                                 u64_stats_update_begin(&ring->syncp);
2462                                 ring->stats.sw_err_cnt++;
2463                                 u64_stats_update_end(&ring->syncp);
2464
2465                                 hns3_rl_err(ring->tqp_vector->napi.dev,
2466                                             "alloc rx buffer failed: %d\n",
2467                                             ret);
2468                                 break;
2469                         }
2470                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2471
2472                         u64_stats_update_begin(&ring->syncp);
2473                         ring->stats.non_reuse_pg++;
2474                         u64_stats_update_end(&ring->syncp);
2475                 }
2476
2477                 ring_ptr_move_fw(ring, next_to_use);
2478         }
2479
2480         wmb(); /* Make all data has been write before submit */
2481         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2482 }
2483
2484 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2485                                 struct hns3_enet_ring *ring, int pull_len,
2486                                 struct hns3_desc_cb *desc_cb)
2487 {
2488         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2489         int size = le16_to_cpu(desc->rx.size);
2490         u32 truesize = hns3_buf_size(ring);
2491
2492         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2493                         size - pull_len, truesize);
2494
2495         /* Avoid re-using remote pages, or the stack is still using the page
2496          * when page_offset rollback to zero, flag default unreuse
2497          */
2498         if (unlikely(page_to_nid(desc_cb->priv) != numa_mem_id()) ||
2499             (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2500                 return;
2501
2502         /* Move offset up to the next cache line */
2503         desc_cb->page_offset += truesize;
2504
2505         if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2506                 desc_cb->reuse_flag = 1;
2507                 /* Bump ref count on page before it is given */
2508                 get_page(desc_cb->priv);
2509         } else if (page_count(desc_cb->priv) == 1) {
2510                 desc_cb->reuse_flag = 1;
2511                 desc_cb->page_offset = 0;
2512                 get_page(desc_cb->priv);
2513         }
2514 }
2515
2516 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2517 {
2518         __be16 type = skb->protocol;
2519         struct tcphdr *th;
2520         int depth = 0;
2521
2522         while (eth_type_vlan(type)) {
2523                 struct vlan_hdr *vh;
2524
2525                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2526                         return -EFAULT;
2527
2528                 vh = (struct vlan_hdr *)(skb->data + depth);
2529                 type = vh->h_vlan_encapsulated_proto;
2530                 depth += VLAN_HLEN;
2531         }
2532
2533         skb_set_network_header(skb, depth);
2534
2535         if (type == htons(ETH_P_IP)) {
2536                 const struct iphdr *iph = ip_hdr(skb);
2537
2538                 depth += sizeof(struct iphdr);
2539                 skb_set_transport_header(skb, depth);
2540                 th = tcp_hdr(skb);
2541                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2542                                           iph->daddr, 0);
2543         } else if (type == htons(ETH_P_IPV6)) {
2544                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2545
2546                 depth += sizeof(struct ipv6hdr);
2547                 skb_set_transport_header(skb, depth);
2548                 th = tcp_hdr(skb);
2549                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2550                                           &iph->daddr, 0);
2551         } else {
2552                 hns3_rl_err(skb->dev,
2553                             "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2554                             be16_to_cpu(type), depth);
2555                 return -EFAULT;
2556         }
2557
2558         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2559         if (th->cwr)
2560                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2561
2562         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2563                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2564
2565         skb->csum_start = (unsigned char *)th - skb->head;
2566         skb->csum_offset = offsetof(struct tcphdr, check);
2567         skb->ip_summed = CHECKSUM_PARTIAL;
2568         return 0;
2569 }
2570
2571 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2572                              u32 l234info, u32 bd_base_info, u32 ol_info)
2573 {
2574         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2575         int l3_type, l4_type;
2576         int ol4_type;
2577
2578         skb->ip_summed = CHECKSUM_NONE;
2579
2580         skb_checksum_none_assert(skb);
2581
2582         if (!(netdev->features & NETIF_F_RXCSUM))
2583                 return;
2584
2585         /* check if hardware has done checksum */
2586         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2587                 return;
2588
2589         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2590                                  BIT(HNS3_RXD_OL3E_B) |
2591                                  BIT(HNS3_RXD_OL4E_B)))) {
2592                 u64_stats_update_begin(&ring->syncp);
2593                 ring->stats.l3l4_csum_err++;
2594                 u64_stats_update_end(&ring->syncp);
2595
2596                 return;
2597         }
2598
2599         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2600                                    HNS3_RXD_OL4ID_S);
2601         switch (ol4_type) {
2602         case HNS3_OL4_TYPE_MAC_IN_UDP:
2603         case HNS3_OL4_TYPE_NVGRE:
2604                 skb->csum_level = 1;
2605                 /* fall through */
2606         case HNS3_OL4_TYPE_NO_TUN:
2607                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2608                                           HNS3_RXD_L3ID_S);
2609                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2610                                           HNS3_RXD_L4ID_S);
2611
2612                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2613                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2614                      l3_type == HNS3_L3_TYPE_IPV6) &&
2615                     (l4_type == HNS3_L4_TYPE_UDP ||
2616                      l4_type == HNS3_L4_TYPE_TCP ||
2617                      l4_type == HNS3_L4_TYPE_SCTP))
2618                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2619                 break;
2620         default:
2621                 break;
2622         }
2623 }
2624
2625 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2626 {
2627         if (skb_has_frag_list(skb))
2628                 napi_gro_flush(&ring->tqp_vector->napi, false);
2629
2630         napi_gro_receive(&ring->tqp_vector->napi, skb);
2631 }
2632
2633 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2634                                 struct hns3_desc *desc, u32 l234info,
2635                                 u16 *vlan_tag)
2636 {
2637         struct hnae3_handle *handle = ring->tqp->handle;
2638         struct pci_dev *pdev = ring->tqp->handle->pdev;
2639
2640         if (pdev->revision == 0x20) {
2641                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2642                 if (!(*vlan_tag & VLAN_VID_MASK))
2643                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2644
2645                 return (*vlan_tag != 0);
2646         }
2647
2648 #define HNS3_STRP_OUTER_VLAN    0x1
2649 #define HNS3_STRP_INNER_VLAN    0x2
2650 #define HNS3_STRP_BOTH          0x3
2651
2652         /* Hardware always insert VLAN tag into RX descriptor when
2653          * remove the tag from packet, driver needs to determine
2654          * reporting which tag to stack.
2655          */
2656         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2657                                 HNS3_RXD_STRP_TAGP_S)) {
2658         case HNS3_STRP_OUTER_VLAN:
2659                 if (handle->port_base_vlan_state !=
2660                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2661                         return false;
2662
2663                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2664                 return true;
2665         case HNS3_STRP_INNER_VLAN:
2666                 if (handle->port_base_vlan_state !=
2667                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2668                         return false;
2669
2670                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2671                 return true;
2672         case HNS3_STRP_BOTH:
2673                 if (handle->port_base_vlan_state ==
2674                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2675                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2676                 else
2677                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2678
2679                 return true;
2680         default:
2681                 return false;
2682         }
2683 }
2684
2685 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
2686                           unsigned char *va)
2687 {
2688 #define HNS3_NEED_ADD_FRAG      1
2689         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2690         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2691         struct sk_buff *skb;
2692
2693         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2694         skb = ring->skb;
2695         if (unlikely(!skb)) {
2696                 hns3_rl_err(netdev, "alloc rx skb fail\n");
2697
2698                 u64_stats_update_begin(&ring->syncp);
2699                 ring->stats.sw_err_cnt++;
2700                 u64_stats_update_end(&ring->syncp);
2701
2702                 return -ENOMEM;
2703         }
2704
2705         prefetchw(skb->data);
2706
2707         ring->pending_buf = 1;
2708         ring->frag_num = 0;
2709         ring->tail_skb = NULL;
2710         if (length <= HNS3_RX_HEAD_SIZE) {
2711                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2712
2713                 /* We can reuse buffer as-is, just make sure it is local */
2714                 if (likely(page_to_nid(desc_cb->priv) == numa_mem_id()))
2715                         desc_cb->reuse_flag = 1;
2716                 else /* This page cannot be reused so discard it */
2717                         put_page(desc_cb->priv);
2718
2719                 ring_ptr_move_fw(ring, next_to_clean);
2720                 return 0;
2721         }
2722         u64_stats_update_begin(&ring->syncp);
2723         ring->stats.seg_pkt_cnt++;
2724         u64_stats_update_end(&ring->syncp);
2725
2726         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2727         __skb_put(skb, ring->pull_len);
2728         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2729                             desc_cb);
2730         ring_ptr_move_fw(ring, next_to_clean);
2731
2732         return HNS3_NEED_ADD_FRAG;
2733 }
2734
2735 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2736                          struct sk_buff **out_skb, bool pending)
2737 {
2738         struct sk_buff *skb = *out_skb;
2739         struct sk_buff *head_skb = *out_skb;
2740         struct sk_buff *new_skb;
2741         struct hns3_desc_cb *desc_cb;
2742         struct hns3_desc *pre_desc;
2743         u32 bd_base_info;
2744         int pre_bd;
2745
2746         /* if there is pending bd, the SW param next_to_clean has moved
2747          * to next and the next is NULL
2748          */
2749         if (pending) {
2750                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2751                          ring->desc_num;
2752                 pre_desc = &ring->desc[pre_bd];
2753                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2754         } else {
2755                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2756         }
2757
2758         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2759                 desc = &ring->desc[ring->next_to_clean];
2760                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2761                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2762                 /* make sure HW write desc complete */
2763                 dma_rmb();
2764                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2765                         return -ENXIO;
2766
2767                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2768                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2769                                                  HNS3_RX_HEAD_SIZE);
2770                         if (unlikely(!new_skb)) {
2771                                 hns3_rl_err(ring->tqp_vector->napi.dev,
2772                                             "alloc rx fraglist skb fail\n");
2773                                 return -ENXIO;
2774                         }
2775                         ring->frag_num = 0;
2776
2777                         if (ring->tail_skb) {
2778                                 ring->tail_skb->next = new_skb;
2779                                 ring->tail_skb = new_skb;
2780                         } else {
2781                                 skb_shinfo(skb)->frag_list = new_skb;
2782                                 ring->tail_skb = new_skb;
2783                         }
2784                 }
2785
2786                 if (ring->tail_skb) {
2787                         head_skb->truesize += hns3_buf_size(ring);
2788                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2789                         head_skb->len += le16_to_cpu(desc->rx.size);
2790                         skb = ring->tail_skb;
2791                 }
2792
2793                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2794                 ring_ptr_move_fw(ring, next_to_clean);
2795                 ring->pending_buf++;
2796         }
2797
2798         return 0;
2799 }
2800
2801 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2802                                      struct sk_buff *skb, u32 l234info,
2803                                      u32 bd_base_info, u32 ol_info)
2804 {
2805         u32 l3_type;
2806
2807         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2808                                                     HNS3_RXD_GRO_SIZE_M,
2809                                                     HNS3_RXD_GRO_SIZE_S);
2810         /* if there is no HW GRO, do not set gro params */
2811         if (!skb_shinfo(skb)->gso_size) {
2812                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2813                 return 0;
2814         }
2815
2816         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2817                                                   HNS3_RXD_GRO_COUNT_M,
2818                                                   HNS3_RXD_GRO_COUNT_S);
2819
2820         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2821         if (l3_type == HNS3_L3_TYPE_IPV4)
2822                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2823         else if (l3_type == HNS3_L3_TYPE_IPV6)
2824                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2825         else
2826                 return -EFAULT;
2827
2828         return  hns3_gro_complete(skb, l234info);
2829 }
2830
2831 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2832                                      struct sk_buff *skb, u32 rss_hash)
2833 {
2834         struct hnae3_handle *handle = ring->tqp->handle;
2835         enum pkt_hash_types rss_type;
2836
2837         if (rss_hash)
2838                 rss_type = handle->kinfo.rss_type;
2839         else
2840                 rss_type = PKT_HASH_TYPE_NONE;
2841
2842         skb_set_hash(skb, rss_hash, rss_type);
2843 }
2844
2845 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2846 {
2847         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2848         enum hns3_pkt_l2t_type l2_frame_type;
2849         u32 bd_base_info, l234info, ol_info;
2850         struct hns3_desc *desc;
2851         unsigned int len;
2852         int pre_ntc, ret;
2853
2854         /* bdinfo handled below is only valid on the last BD of the
2855          * current packet, and ring->next_to_clean indicates the first
2856          * descriptor of next packet, so need - 1 below.
2857          */
2858         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2859                                         (ring->desc_num - 1);
2860         desc = &ring->desc[pre_ntc];
2861         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2862         l234info = le32_to_cpu(desc->rx.l234_info);
2863         ol_info = le32_to_cpu(desc->rx.ol_info);
2864
2865         /* Based on hw strategy, the tag offloaded will be stored at
2866          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2867          * in one layer tag case.
2868          */
2869         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2870                 u16 vlan_tag;
2871
2872                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2873                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2874                                                vlan_tag);
2875         }
2876
2877         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2878                                   BIT(HNS3_RXD_L2E_B))))) {
2879                 u64_stats_update_begin(&ring->syncp);
2880                 if (l234info & BIT(HNS3_RXD_L2E_B))
2881                         ring->stats.l2_err++;
2882                 else
2883                         ring->stats.err_pkt_len++;
2884                 u64_stats_update_end(&ring->syncp);
2885
2886                 return -EFAULT;
2887         }
2888
2889         len = skb->len;
2890
2891         /* Do update ip stack process */
2892         skb->protocol = eth_type_trans(skb, netdev);
2893
2894         /* This is needed in order to enable forwarding support */
2895         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
2896                                         bd_base_info, ol_info);
2897         if (unlikely(ret)) {
2898                 u64_stats_update_begin(&ring->syncp);
2899                 ring->stats.rx_err_cnt++;
2900                 u64_stats_update_end(&ring->syncp);
2901                 return ret;
2902         }
2903
2904         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2905                                         HNS3_RXD_DMAC_S);
2906
2907         u64_stats_update_begin(&ring->syncp);
2908         ring->stats.rx_pkts++;
2909         ring->stats.rx_bytes += len;
2910
2911         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2912                 ring->stats.rx_multicast++;
2913
2914         u64_stats_update_end(&ring->syncp);
2915
2916         ring->tqp_vector->rx_group.total_bytes += len;
2917
2918         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
2919         return 0;
2920 }
2921
2922 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2923                              struct sk_buff **out_skb)
2924 {
2925         struct sk_buff *skb = ring->skb;
2926         struct hns3_desc_cb *desc_cb;
2927         struct hns3_desc *desc;
2928         unsigned int length;
2929         u32 bd_base_info;
2930         int ret;
2931
2932         desc = &ring->desc[ring->next_to_clean];
2933         desc_cb = &ring->desc_cb[ring->next_to_clean];
2934
2935         prefetch(desc);
2936
2937         length = le16_to_cpu(desc->rx.size);
2938         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2939
2940         /* Check valid BD */
2941         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2942                 return -ENXIO;
2943
2944         if (!skb)
2945                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2946
2947         /* Prefetch first cache line of first page
2948          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2949          * line size is 64B so need to prefetch twice to make it 128B. But in
2950          * actual we can have greater size of caches with 128B Level 1 cache
2951          * lines. In such a case, single fetch would suffice to cache in the
2952          * relevant part of the header.
2953          */
2954         prefetch(ring->va);
2955 #if L1_CACHE_BYTES < 128
2956         prefetch(ring->va + L1_CACHE_BYTES);
2957 #endif
2958
2959         if (!skb) {
2960                 ret = hns3_alloc_skb(ring, length, ring->va);
2961                 *out_skb = skb = ring->skb;
2962
2963                 if (ret < 0) /* alloc buffer fail */
2964                         return ret;
2965                 if (ret > 0) { /* need add frag */
2966                         ret = hns3_add_frag(ring, desc, &skb, false);
2967                         if (ret)
2968                                 return ret;
2969
2970                         /* As the head data may be changed when GRO enable, copy
2971                          * the head data in after other data rx completed
2972                          */
2973                         memcpy(skb->data, ring->va,
2974                                ALIGN(ring->pull_len, sizeof(long)));
2975                 }
2976         } else {
2977                 ret = hns3_add_frag(ring, desc, &skb, true);
2978                 if (ret)
2979                         return ret;
2980
2981                 /* As the head data may be changed when GRO enable, copy
2982                  * the head data in after other data rx completed
2983                  */
2984                 memcpy(skb->data, ring->va,
2985                        ALIGN(ring->pull_len, sizeof(long)));
2986         }
2987
2988         ret = hns3_handle_bdinfo(ring, skb);
2989         if (unlikely(ret)) {
2990                 dev_kfree_skb_any(skb);
2991                 return ret;
2992         }
2993
2994         skb_record_rx_queue(skb, ring->tqp->tqp_index);
2995         *out_skb = skb;
2996
2997         return 0;
2998 }
2999
3000 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
3001                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
3002 {
3003 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
3004         int unused_count = hns3_desc_unused(ring);
3005         struct sk_buff *skb = ring->skb;
3006         int recv_pkts = 0;
3007         int recv_bds = 0;
3008         int err, num;
3009
3010         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
3011         rmb(); /* Make sure num taken effect before the other data is touched */
3012
3013         num -= unused_count;
3014         unused_count -= ring->pending_buf;
3015
3016         while (recv_pkts < budget && recv_bds < num) {
3017                 /* Reuse or realloc buffers */
3018                 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
3019                         hns3_nic_alloc_rx_buffers(ring, unused_count);
3020                         unused_count = hns3_desc_unused(ring) -
3021                                         ring->pending_buf;
3022                 }
3023
3024                 /* Poll one pkt */
3025                 err = hns3_handle_rx_bd(ring, &skb);
3026                 if (unlikely(!skb)) /* This fault cannot be repaired */
3027                         goto out;
3028
3029                 if (err == -ENXIO) { /* Do not get FE for the packet */
3030                         goto out;
3031                 } else if (unlikely(err)) {  /* Do jump the err */
3032                         recv_bds += ring->pending_buf;
3033                         unused_count += ring->pending_buf;
3034                         ring->skb = NULL;
3035                         ring->pending_buf = 0;
3036                         continue;
3037                 }
3038
3039                 rx_fn(ring, skb);
3040                 recv_bds += ring->pending_buf;
3041                 unused_count += ring->pending_buf;
3042                 ring->skb = NULL;
3043                 ring->pending_buf = 0;
3044
3045                 recv_pkts++;
3046         }
3047
3048 out:
3049         /* Make all data has been write before submit */
3050         if (unused_count > 0)
3051                 hns3_nic_alloc_rx_buffers(ring, unused_count);
3052
3053         return recv_pkts;
3054 }
3055
3056 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
3057 {
3058 #define HNS3_RX_LOW_BYTE_RATE 10000
3059 #define HNS3_RX_MID_BYTE_RATE 20000
3060 #define HNS3_RX_ULTRA_PACKET_RATE 40
3061
3062         enum hns3_flow_level_range new_flow_level;
3063         struct hns3_enet_tqp_vector *tqp_vector;
3064         int packets_per_msecs, bytes_per_msecs;
3065         u32 time_passed_ms;
3066
3067         tqp_vector = ring_group->ring->tqp_vector;
3068         time_passed_ms =
3069                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
3070         if (!time_passed_ms)
3071                 return false;
3072
3073         do_div(ring_group->total_packets, time_passed_ms);
3074         packets_per_msecs = ring_group->total_packets;
3075
3076         do_div(ring_group->total_bytes, time_passed_ms);
3077         bytes_per_msecs = ring_group->total_bytes;
3078
3079         new_flow_level = ring_group->coal.flow_level;
3080
3081         /* Simple throttlerate management
3082          * 0-10MB/s   lower     (50000 ints/s)
3083          * 10-20MB/s   middle    (20000 ints/s)
3084          * 20-1249MB/s high      (18000 ints/s)
3085          * > 40000pps  ultra     (8000 ints/s)
3086          */
3087         switch (new_flow_level) {
3088         case HNS3_FLOW_LOW:
3089                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3090                         new_flow_level = HNS3_FLOW_MID;
3091                 break;
3092         case HNS3_FLOW_MID:
3093                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3094                         new_flow_level = HNS3_FLOW_HIGH;
3095                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3096                         new_flow_level = HNS3_FLOW_LOW;
3097                 break;
3098         case HNS3_FLOW_HIGH:
3099         case HNS3_FLOW_ULTRA:
3100         default:
3101                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3102                         new_flow_level = HNS3_FLOW_MID;
3103                 break;
3104         }
3105
3106         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3107             &tqp_vector->rx_group == ring_group)
3108                 new_flow_level = HNS3_FLOW_ULTRA;
3109
3110         ring_group->total_bytes = 0;
3111         ring_group->total_packets = 0;
3112         ring_group->coal.flow_level = new_flow_level;
3113
3114         return true;
3115 }
3116
3117 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3118 {
3119         struct hns3_enet_tqp_vector *tqp_vector;
3120         u16 new_int_gl;
3121
3122         if (!ring_group->ring)
3123                 return false;
3124
3125         tqp_vector = ring_group->ring->tqp_vector;
3126         if (!tqp_vector->last_jiffies)
3127                 return false;
3128
3129         if (ring_group->total_packets == 0) {
3130                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3131                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3132                 return true;
3133         }
3134
3135         if (!hns3_get_new_flow_lvl(ring_group))
3136                 return false;
3137
3138         new_int_gl = ring_group->coal.int_gl;
3139         switch (ring_group->coal.flow_level) {
3140         case HNS3_FLOW_LOW:
3141                 new_int_gl = HNS3_INT_GL_50K;
3142                 break;
3143         case HNS3_FLOW_MID:
3144                 new_int_gl = HNS3_INT_GL_20K;
3145                 break;
3146         case HNS3_FLOW_HIGH:
3147                 new_int_gl = HNS3_INT_GL_18K;
3148                 break;
3149         case HNS3_FLOW_ULTRA:
3150                 new_int_gl = HNS3_INT_GL_8K;
3151                 break;
3152         default:
3153                 break;
3154         }
3155
3156         if (new_int_gl != ring_group->coal.int_gl) {
3157                 ring_group->coal.int_gl = new_int_gl;
3158                 return true;
3159         }
3160         return false;
3161 }
3162
3163 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3164 {
3165         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3166         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3167         bool rx_update, tx_update;
3168
3169         /* update param every 1000ms */
3170         if (time_before(jiffies,
3171                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3172                 return;
3173
3174         if (rx_group->coal.gl_adapt_enable) {
3175                 rx_update = hns3_get_new_int_gl(rx_group);
3176                 if (rx_update)
3177                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3178                                                        rx_group->coal.int_gl);
3179         }
3180
3181         if (tx_group->coal.gl_adapt_enable) {
3182                 tx_update = hns3_get_new_int_gl(tx_group);
3183                 if (tx_update)
3184                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3185                                                        tx_group->coal.int_gl);
3186         }
3187
3188         tqp_vector->last_jiffies = jiffies;
3189 }
3190
3191 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3192 {
3193         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3194         struct hns3_enet_ring *ring;
3195         int rx_pkt_total = 0;
3196
3197         struct hns3_enet_tqp_vector *tqp_vector =
3198                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3199         bool clean_complete = true;
3200         int rx_budget = budget;
3201
3202         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3203                 napi_complete(napi);
3204                 return 0;
3205         }
3206
3207         /* Since the actual Tx work is minimal, we can give the Tx a larger
3208          * budget and be more aggressive about cleaning up the Tx descriptors.
3209          */
3210         hns3_for_each_ring(ring, tqp_vector->tx_group)
3211                 hns3_clean_tx_ring(ring);
3212
3213         /* make sure rx ring budget not smaller than 1 */
3214         if (tqp_vector->num_tqps > 1)
3215                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3216
3217         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3218                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3219                                                     hns3_rx_skb);
3220
3221                 if (rx_cleaned >= rx_budget)
3222                         clean_complete = false;
3223
3224                 rx_pkt_total += rx_cleaned;
3225         }
3226
3227         tqp_vector->rx_group.total_packets += rx_pkt_total;
3228
3229         if (!clean_complete)
3230                 return budget;
3231
3232         if (napi_complete(napi) &&
3233             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3234                 hns3_update_new_int_gl(tqp_vector);
3235                 hns3_mask_vector_irq(tqp_vector, 1);
3236         }
3237
3238         return rx_pkt_total;
3239 }
3240
3241 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3242                                       struct hnae3_ring_chain_node *head)
3243 {
3244         struct pci_dev *pdev = tqp_vector->handle->pdev;
3245         struct hnae3_ring_chain_node *cur_chain = head;
3246         struct hnae3_ring_chain_node *chain;
3247         struct hns3_enet_ring *tx_ring;
3248         struct hns3_enet_ring *rx_ring;
3249
3250         tx_ring = tqp_vector->tx_group.ring;
3251         if (tx_ring) {
3252                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3253                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3254                               HNAE3_RING_TYPE_TX);
3255                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3256                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3257
3258                 cur_chain->next = NULL;
3259
3260                 while (tx_ring->next) {
3261                         tx_ring = tx_ring->next;
3262
3263                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3264                                              GFP_KERNEL);
3265                         if (!chain)
3266                                 goto err_free_chain;
3267
3268                         cur_chain->next = chain;
3269                         chain->tqp_index = tx_ring->tqp->tqp_index;
3270                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3271                                       HNAE3_RING_TYPE_TX);
3272                         hnae3_set_field(chain->int_gl_idx,
3273                                         HNAE3_RING_GL_IDX_M,
3274                                         HNAE3_RING_GL_IDX_S,
3275                                         HNAE3_RING_GL_TX);
3276
3277                         cur_chain = chain;
3278                 }
3279         }
3280
3281         rx_ring = tqp_vector->rx_group.ring;
3282         if (!tx_ring && rx_ring) {
3283                 cur_chain->next = NULL;
3284                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3285                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3286                               HNAE3_RING_TYPE_RX);
3287                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3288                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3289
3290                 rx_ring = rx_ring->next;
3291         }
3292
3293         while (rx_ring) {
3294                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3295                 if (!chain)
3296                         goto err_free_chain;
3297
3298                 cur_chain->next = chain;
3299                 chain->tqp_index = rx_ring->tqp->tqp_index;
3300                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3301                               HNAE3_RING_TYPE_RX);
3302                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3303                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3304
3305                 cur_chain = chain;
3306
3307                 rx_ring = rx_ring->next;
3308         }
3309
3310         return 0;
3311
3312 err_free_chain:
3313         cur_chain = head->next;
3314         while (cur_chain) {
3315                 chain = cur_chain->next;
3316                 devm_kfree(&pdev->dev, cur_chain);
3317                 cur_chain = chain;
3318         }
3319         head->next = NULL;
3320
3321         return -ENOMEM;
3322 }
3323
3324 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3325                                         struct hnae3_ring_chain_node *head)
3326 {
3327         struct pci_dev *pdev = tqp_vector->handle->pdev;
3328         struct hnae3_ring_chain_node *chain_tmp, *chain;
3329
3330         chain = head->next;
3331
3332         while (chain) {
3333                 chain_tmp = chain->next;
3334                 devm_kfree(&pdev->dev, chain);
3335                 chain = chain_tmp;
3336         }
3337 }
3338
3339 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3340                                    struct hns3_enet_ring *ring)
3341 {
3342         ring->next = group->ring;
3343         group->ring = ring;
3344
3345         group->count++;
3346 }
3347
3348 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3349 {
3350         struct pci_dev *pdev = priv->ae_handle->pdev;
3351         struct hns3_enet_tqp_vector *tqp_vector;
3352         int num_vectors = priv->vector_num;
3353         int numa_node;
3354         int vector_i;
3355
3356         numa_node = dev_to_node(&pdev->dev);
3357
3358         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3359                 tqp_vector = &priv->tqp_vector[vector_i];
3360                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3361                                 &tqp_vector->affinity_mask);
3362         }
3363 }
3364
3365 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3366 {
3367         struct hnae3_ring_chain_node vector_ring_chain;
3368         struct hnae3_handle *h = priv->ae_handle;
3369         struct hns3_enet_tqp_vector *tqp_vector;
3370         int ret = 0;
3371         int i;
3372
3373         hns3_nic_set_cpumask(priv);
3374
3375         for (i = 0; i < priv->vector_num; i++) {
3376                 tqp_vector = &priv->tqp_vector[i];
3377                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3378                 tqp_vector->num_tqps = 0;
3379         }
3380
3381         for (i = 0; i < h->kinfo.num_tqps; i++) {
3382                 u16 vector_i = i % priv->vector_num;
3383                 u16 tqp_num = h->kinfo.num_tqps;
3384
3385                 tqp_vector = &priv->tqp_vector[vector_i];
3386
3387                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3388                                        priv->ring_data[i].ring);
3389
3390                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3391                                        priv->ring_data[i + tqp_num].ring);
3392
3393                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3394                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3395                 tqp_vector->num_tqps++;
3396         }
3397
3398         for (i = 0; i < priv->vector_num; i++) {
3399                 tqp_vector = &priv->tqp_vector[i];
3400
3401                 tqp_vector->rx_group.total_bytes = 0;
3402                 tqp_vector->rx_group.total_packets = 0;
3403                 tqp_vector->tx_group.total_bytes = 0;
3404                 tqp_vector->tx_group.total_packets = 0;
3405                 tqp_vector->handle = h;
3406
3407                 ret = hns3_get_vector_ring_chain(tqp_vector,
3408                                                  &vector_ring_chain);
3409                 if (ret)
3410                         goto map_ring_fail;
3411
3412                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3413                         tqp_vector->vector_irq, &vector_ring_chain);
3414
3415                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3416
3417                 if (ret)
3418                         goto map_ring_fail;
3419
3420                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3421                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3422         }
3423
3424         return 0;
3425
3426 map_ring_fail:
3427         while (i--)
3428                 netif_napi_del(&priv->tqp_vector[i].napi);
3429
3430         return ret;
3431 }
3432
3433 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3434 {
3435 #define HNS3_VECTOR_PF_MAX_NUM          64
3436
3437         struct hnae3_handle *h = priv->ae_handle;
3438         struct hns3_enet_tqp_vector *tqp_vector;
3439         struct hnae3_vector_info *vector;
3440         struct pci_dev *pdev = h->pdev;
3441         u16 tqp_num = h->kinfo.num_tqps;
3442         u16 vector_num;
3443         int ret = 0;
3444         u16 i;
3445
3446         /* RSS size, cpu online and vector_num should be the same */
3447         /* Should consider 2p/4p later */
3448         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3449         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3450
3451         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3452                               GFP_KERNEL);
3453         if (!vector)
3454                 return -ENOMEM;
3455
3456         /* save the actual available vector number */
3457         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3458
3459         priv->vector_num = vector_num;
3460         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3461                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3462                              GFP_KERNEL);
3463         if (!priv->tqp_vector) {
3464                 ret = -ENOMEM;
3465                 goto out;
3466         }
3467
3468         for (i = 0; i < priv->vector_num; i++) {
3469                 tqp_vector = &priv->tqp_vector[i];
3470                 tqp_vector->idx = i;
3471                 tqp_vector->mask_addr = vector[i].io_addr;
3472                 tqp_vector->vector_irq = vector[i].vector;
3473                 hns3_vector_gl_rl_init(tqp_vector, priv);
3474         }
3475
3476 out:
3477         devm_kfree(&pdev->dev, vector);
3478         return ret;
3479 }
3480
3481 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3482 {
3483         group->ring = NULL;
3484         group->count = 0;
3485 }
3486
3487 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3488 {
3489         struct hnae3_ring_chain_node vector_ring_chain;
3490         struct hnae3_handle *h = priv->ae_handle;
3491         struct hns3_enet_tqp_vector *tqp_vector;
3492         int i;
3493
3494         for (i = 0; i < priv->vector_num; i++) {
3495                 tqp_vector = &priv->tqp_vector[i];
3496
3497                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3498                         continue;
3499
3500                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3501
3502                 h->ae_algo->ops->unmap_ring_from_vector(h,
3503                         tqp_vector->vector_irq, &vector_ring_chain);
3504
3505                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3506
3507                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3508                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3509                         free_irq(tqp_vector->vector_irq, tqp_vector);
3510                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3511                 }
3512
3513                 hns3_clear_ring_group(&tqp_vector->rx_group);
3514                 hns3_clear_ring_group(&tqp_vector->tx_group);
3515                 netif_napi_del(&priv->tqp_vector[i].napi);
3516         }
3517 }
3518
3519 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3520 {
3521         struct hnae3_handle *h = priv->ae_handle;
3522         struct pci_dev *pdev = h->pdev;
3523         int i, ret;
3524
3525         for (i = 0; i < priv->vector_num; i++) {
3526                 struct hns3_enet_tqp_vector *tqp_vector;
3527
3528                 tqp_vector = &priv->tqp_vector[i];
3529                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3530                 if (ret)
3531                         return ret;
3532         }
3533
3534         devm_kfree(&pdev->dev, priv->tqp_vector);
3535         return 0;
3536 }
3537
3538 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3539                              unsigned int ring_type)
3540 {
3541         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3542         int queue_num = priv->ae_handle->kinfo.num_tqps;
3543         struct pci_dev *pdev = priv->ae_handle->pdev;
3544         struct hns3_enet_ring *ring;
3545         int desc_num;
3546
3547         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3548         if (!ring)
3549                 return -ENOMEM;
3550
3551         if (ring_type == HNAE3_RING_TYPE_TX) {
3552                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3553                 ring_data[q->tqp_index].ring = ring;
3554                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3555                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3556         } else {
3557                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3558                 ring_data[q->tqp_index + queue_num].ring = ring;
3559                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3560                 ring->io_base = q->io_base;
3561         }
3562
3563         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3564
3565         ring->tqp = q;
3566         ring->desc = NULL;
3567         ring->desc_cb = NULL;
3568         ring->dev = priv->dev;
3569         ring->desc_dma_addr = 0;
3570         ring->buf_size = q->buf_size;
3571         ring->desc_num = desc_num;
3572         ring->next_to_use = 0;
3573         ring->next_to_clean = 0;
3574
3575         return 0;
3576 }
3577
3578 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3579                               struct hns3_nic_priv *priv)
3580 {
3581         int ret;
3582
3583         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3584         if (ret)
3585                 return ret;
3586
3587         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3588         if (ret) {
3589                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3590                 return ret;
3591         }
3592
3593         return 0;
3594 }
3595
3596 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3597 {
3598         struct hnae3_handle *h = priv->ae_handle;
3599         struct pci_dev *pdev = h->pdev;
3600         int i, ret;
3601
3602         priv->ring_data =  devm_kzalloc(&pdev->dev,
3603                                         array3_size(h->kinfo.num_tqps,
3604                                                     sizeof(*priv->ring_data),
3605                                                     2),
3606                                         GFP_KERNEL);
3607         if (!priv->ring_data)
3608                 return -ENOMEM;
3609
3610         for (i = 0; i < h->kinfo.num_tqps; i++) {
3611                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3612                 if (ret)
3613                         goto err;
3614         }
3615
3616         return 0;
3617 err:
3618         while (i--) {
3619                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3620                 devm_kfree(priv->dev,
3621                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3622         }
3623
3624         devm_kfree(&pdev->dev, priv->ring_data);
3625         priv->ring_data = NULL;
3626         return ret;
3627 }
3628
3629 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3630 {
3631         struct hnae3_handle *h = priv->ae_handle;
3632         int i;
3633
3634         if (!priv->ring_data)
3635                 return;
3636
3637         for (i = 0; i < h->kinfo.num_tqps; i++) {
3638                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3639                 devm_kfree(priv->dev,
3640                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3641         }
3642         devm_kfree(priv->dev, priv->ring_data);
3643         priv->ring_data = NULL;
3644 }
3645
3646 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3647 {
3648         int ret;
3649
3650         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3651                 return -EINVAL;
3652
3653         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3654                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
3655         if (!ring->desc_cb) {
3656                 ret = -ENOMEM;
3657                 goto out;
3658         }
3659
3660         ret = hns3_alloc_desc(ring);
3661         if (ret)
3662                 goto out_with_desc_cb;
3663
3664         if (!HNAE3_IS_TX_RING(ring)) {
3665                 ret = hns3_alloc_ring_buffers(ring);
3666                 if (ret)
3667                         goto out_with_desc;
3668         }
3669
3670         return 0;
3671
3672 out_with_desc:
3673         hns3_free_desc(ring);
3674 out_with_desc_cb:
3675         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3676         ring->desc_cb = NULL;
3677 out:
3678         return ret;
3679 }
3680
3681 void hns3_fini_ring(struct hns3_enet_ring *ring)
3682 {
3683         hns3_free_desc(ring);
3684         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3685         ring->desc_cb = NULL;
3686         ring->next_to_clean = 0;
3687         ring->next_to_use = 0;
3688         ring->pending_buf = 0;
3689         if (ring->skb) {
3690                 dev_kfree_skb_any(ring->skb);
3691                 ring->skb = NULL;
3692         }
3693 }
3694
3695 static int hns3_buf_size2type(u32 buf_size)
3696 {
3697         int bd_size_type;
3698
3699         switch (buf_size) {
3700         case 512:
3701                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3702                 break;
3703         case 1024:
3704                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3705                 break;
3706         case 2048:
3707                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3708                 break;
3709         case 4096:
3710                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3711                 break;
3712         default:
3713                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3714         }
3715
3716         return bd_size_type;
3717 }
3718
3719 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3720 {
3721         dma_addr_t dma = ring->desc_dma_addr;
3722         struct hnae3_queue *q = ring->tqp;
3723
3724         if (!HNAE3_IS_TX_RING(ring)) {
3725                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3726                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3727                                (u32)((dma >> 31) >> 1));
3728
3729                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3730                                hns3_buf_size2type(ring->buf_size));
3731                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3732                                ring->desc_num / 8 - 1);
3733
3734         } else {
3735                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3736                                (u32)dma);
3737                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3738                                (u32)((dma >> 31) >> 1));
3739
3740                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3741                                ring->desc_num / 8 - 1);
3742         }
3743 }
3744
3745 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3746 {
3747         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3748         int i;
3749
3750         for (i = 0; i < HNAE3_MAX_TC; i++) {
3751                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3752                 int j;
3753
3754                 if (!tc_info->enable)
3755                         continue;
3756
3757                 for (j = 0; j < tc_info->tqp_count; j++) {
3758                         struct hnae3_queue *q;
3759
3760                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3761                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3762                                        tc_info->tc);
3763                 }
3764         }
3765 }
3766
3767 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3768 {
3769         struct hnae3_handle *h = priv->ae_handle;
3770         int ring_num = h->kinfo.num_tqps * 2;
3771         int i, j;
3772         int ret;
3773
3774         for (i = 0; i < ring_num; i++) {
3775                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3776                 if (ret) {
3777                         dev_err(priv->dev,
3778                                 "Alloc ring memory fail! ret=%d\n", ret);
3779                         goto out_when_alloc_ring_memory;
3780                 }
3781
3782                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3783         }
3784
3785         return 0;
3786
3787 out_when_alloc_ring_memory:
3788         for (j = i - 1; j >= 0; j--)
3789                 hns3_fini_ring(priv->ring_data[j].ring);
3790
3791         return -ENOMEM;
3792 }
3793
3794 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3795 {
3796         struct hnae3_handle *h = priv->ae_handle;
3797         int i;
3798
3799         for (i = 0; i < h->kinfo.num_tqps; i++) {
3800                 hns3_fini_ring(priv->ring_data[i].ring);
3801                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3802         }
3803         return 0;
3804 }
3805
3806 /* Set mac addr if it is configured. or leave it to the AE driver */
3807 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3808 {
3809         struct hns3_nic_priv *priv = netdev_priv(netdev);
3810         struct hnae3_handle *h = priv->ae_handle;
3811         u8 mac_addr_temp[ETH_ALEN];
3812         int ret = 0;
3813
3814         if (h->ae_algo->ops->get_mac_addr && init) {
3815                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3816                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3817         }
3818
3819         /* Check if the MAC address is valid, if not get a random one */
3820         if (!is_valid_ether_addr(netdev->dev_addr)) {
3821                 eth_hw_addr_random(netdev);
3822                 dev_warn(priv->dev, "using random MAC address %pM\n",
3823                          netdev->dev_addr);
3824         }
3825
3826         if (h->ae_algo->ops->set_mac_addr)
3827                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3828
3829         return ret;
3830 }
3831
3832 static int hns3_init_phy(struct net_device *netdev)
3833 {
3834         struct hnae3_handle *h = hns3_get_handle(netdev);
3835         int ret = 0;
3836
3837         if (h->ae_algo->ops->mac_connect_phy)
3838                 ret = h->ae_algo->ops->mac_connect_phy(h);
3839
3840         return ret;
3841 }
3842
3843 static void hns3_uninit_phy(struct net_device *netdev)
3844 {
3845         struct hnae3_handle *h = hns3_get_handle(netdev);
3846
3847         if (h->ae_algo->ops->mac_disconnect_phy)
3848                 h->ae_algo->ops->mac_disconnect_phy(h);
3849 }
3850
3851 static int hns3_restore_fd_rules(struct net_device *netdev)
3852 {
3853         struct hnae3_handle *h = hns3_get_handle(netdev);
3854         int ret = 0;
3855
3856         if (h->ae_algo->ops->restore_fd_rules)
3857                 ret = h->ae_algo->ops->restore_fd_rules(h);
3858
3859         return ret;
3860 }
3861
3862 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3863 {
3864         struct hnae3_handle *h = hns3_get_handle(netdev);
3865
3866         if (h->ae_algo->ops->del_all_fd_entries)
3867                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3868 }
3869
3870 static int hns3_client_start(struct hnae3_handle *handle)
3871 {
3872         if (!handle->ae_algo->ops->client_start)
3873                 return 0;
3874
3875         return handle->ae_algo->ops->client_start(handle);
3876 }
3877
3878 static void hns3_client_stop(struct hnae3_handle *handle)
3879 {
3880         if (!handle->ae_algo->ops->client_stop)
3881                 return;
3882
3883         handle->ae_algo->ops->client_stop(handle);
3884 }
3885
3886 static void hns3_info_show(struct hns3_nic_priv *priv)
3887 {
3888         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3889
3890         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3891         dev_info(priv->dev, "Task queue pairs numbers: %d\n", kinfo->num_tqps);
3892         dev_info(priv->dev, "RSS size: %d\n", kinfo->rss_size);
3893         dev_info(priv->dev, "Allocated RSS size: %d\n", kinfo->req_rss_size);
3894         dev_info(priv->dev, "RX buffer length: %d\n", kinfo->rx_buf_len);
3895         dev_info(priv->dev, "Desc num per TX queue: %d\n", kinfo->num_tx_desc);
3896         dev_info(priv->dev, "Desc num per RX queue: %d\n", kinfo->num_rx_desc);
3897         dev_info(priv->dev, "Total number of enabled TCs: %d\n", kinfo->num_tc);
3898         dev_info(priv->dev, "Max mtu size: %d\n", priv->netdev->max_mtu);
3899 }
3900
3901 static int hns3_client_init(struct hnae3_handle *handle)
3902 {
3903         struct pci_dev *pdev = handle->pdev;
3904         u16 alloc_tqps, max_rss_size;
3905         struct hns3_nic_priv *priv;
3906         struct net_device *netdev;
3907         int ret;
3908
3909         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3910                                                     &max_rss_size);
3911         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3912         if (!netdev)
3913                 return -ENOMEM;
3914
3915         priv = netdev_priv(netdev);
3916         priv->dev = &pdev->dev;
3917         priv->netdev = netdev;
3918         priv->ae_handle = handle;
3919         priv->tx_timeout_count = 0;
3920         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3921
3922         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3923
3924         handle->kinfo.netdev = netdev;
3925         handle->priv = (void *)priv;
3926
3927         hns3_init_mac_addr(netdev, true);
3928
3929         hns3_set_default_feature(netdev);
3930
3931         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3932         netdev->priv_flags |= IFF_UNICAST_FLT;
3933         netdev->netdev_ops = &hns3_nic_netdev_ops;
3934         SET_NETDEV_DEV(netdev, &pdev->dev);
3935         hns3_ethtool_set_ops(netdev);
3936
3937         /* Carrier off reporting is important to ethtool even BEFORE open */
3938         netif_carrier_off(netdev);
3939
3940         ret = hns3_get_ring_config(priv);
3941         if (ret) {
3942                 ret = -ENOMEM;
3943                 goto out_get_ring_cfg;
3944         }
3945
3946         ret = hns3_nic_alloc_vector_data(priv);
3947         if (ret) {
3948                 ret = -ENOMEM;
3949                 goto out_alloc_vector_data;
3950         }
3951
3952         ret = hns3_nic_init_vector_data(priv);
3953         if (ret) {
3954                 ret = -ENOMEM;
3955                 goto out_init_vector_data;
3956         }
3957
3958         ret = hns3_init_all_ring(priv);
3959         if (ret) {
3960                 ret = -ENOMEM;
3961                 goto out_init_ring_data;
3962         }
3963
3964         ret = hns3_init_phy(netdev);
3965         if (ret)
3966                 goto out_init_phy;
3967
3968         ret = register_netdev(netdev);
3969         if (ret) {
3970                 dev_err(priv->dev, "probe register netdev fail!\n");
3971                 goto out_reg_netdev_fail;
3972         }
3973
3974         ret = hns3_client_start(handle);
3975         if (ret) {
3976                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3977                 goto out_client_start;
3978         }
3979
3980         hns3_dcbnl_setup(handle);
3981
3982         hns3_dbg_init(handle);
3983
3984         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3985         netdev->max_mtu = HNS3_MAX_MTU;
3986
3987         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3988
3989         if (netif_msg_drv(handle))
3990                 hns3_info_show(priv);
3991
3992         return ret;
3993
3994 out_client_start:
3995         unregister_netdev(netdev);
3996 out_reg_netdev_fail:
3997         hns3_uninit_phy(netdev);
3998 out_init_phy:
3999         hns3_uninit_all_ring(priv);
4000 out_init_ring_data:
4001         hns3_nic_uninit_vector_data(priv);
4002 out_init_vector_data:
4003         hns3_nic_dealloc_vector_data(priv);
4004 out_alloc_vector_data:
4005         priv->ring_data = NULL;
4006 out_get_ring_cfg:
4007         priv->ae_handle = NULL;
4008         free_netdev(netdev);
4009         return ret;
4010 }
4011
4012 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
4013 {
4014         struct net_device *netdev = handle->kinfo.netdev;
4015         struct hns3_nic_priv *priv = netdev_priv(netdev);
4016         int ret;
4017
4018         hns3_remove_hw_addr(netdev);
4019
4020         if (netdev->reg_state != NETREG_UNINITIALIZED)
4021                 unregister_netdev(netdev);
4022
4023         hns3_client_stop(handle);
4024
4025         hns3_uninit_phy(netdev);
4026
4027         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4028                 netdev_warn(netdev, "already uninitialized\n");
4029                 goto out_netdev_free;
4030         }
4031
4032         hns3_del_all_fd_rules(netdev, true);
4033
4034         hns3_clear_all_ring(handle, true);
4035
4036         hns3_nic_uninit_vector_data(priv);
4037
4038         ret = hns3_nic_dealloc_vector_data(priv);
4039         if (ret)
4040                 netdev_err(netdev, "dealloc vector error\n");
4041
4042         ret = hns3_uninit_all_ring(priv);
4043         if (ret)
4044                 netdev_err(netdev, "uninit ring error\n");
4045
4046         hns3_put_ring_config(priv);
4047
4048         hns3_dbg_uninit(handle);
4049
4050 out_netdev_free:
4051         free_netdev(netdev);
4052 }
4053
4054 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
4055 {
4056         struct net_device *netdev = handle->kinfo.netdev;
4057
4058         if (!netdev)
4059                 return;
4060
4061         if (linkup) {
4062                 netif_carrier_on(netdev);
4063                 netif_tx_wake_all_queues(netdev);
4064                 if (netif_msg_link(handle))
4065                         netdev_info(netdev, "link up\n");
4066         } else {
4067                 netif_carrier_off(netdev);
4068                 netif_tx_stop_all_queues(netdev);
4069                 if (netif_msg_link(handle))
4070                         netdev_info(netdev, "link down\n");
4071         }
4072 }
4073
4074 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
4075 {
4076         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4077         struct net_device *ndev = kinfo->netdev;
4078
4079         if (tc > HNAE3_MAX_TC)
4080                 return -EINVAL;
4081
4082         if (!ndev)
4083                 return -ENODEV;
4084
4085         return hns3_nic_set_real_num_queue(ndev);
4086 }
4087
4088 static int hns3_recover_hw_addr(struct net_device *ndev)
4089 {
4090         struct netdev_hw_addr_list *list;
4091         struct netdev_hw_addr *ha, *tmp;
4092         int ret = 0;
4093
4094         netif_addr_lock_bh(ndev);
4095         /* go through and sync uc_addr entries to the device */
4096         list = &ndev->uc;
4097         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4098                 ret = hns3_nic_uc_sync(ndev, ha->addr);
4099                 if (ret)
4100                         goto out;
4101         }
4102
4103         /* go through and sync mc_addr entries to the device */
4104         list = &ndev->mc;
4105         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4106                 ret = hns3_nic_mc_sync(ndev, ha->addr);
4107                 if (ret)
4108                         goto out;
4109         }
4110
4111 out:
4112         netif_addr_unlock_bh(ndev);
4113         return ret;
4114 }
4115
4116 static void hns3_remove_hw_addr(struct net_device *netdev)
4117 {
4118         struct netdev_hw_addr_list *list;
4119         struct netdev_hw_addr *ha, *tmp;
4120
4121         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4122
4123         netif_addr_lock_bh(netdev);
4124         /* go through and unsync uc_addr entries to the device */
4125         list = &netdev->uc;
4126         list_for_each_entry_safe(ha, tmp, &list->list, list)
4127                 hns3_nic_uc_unsync(netdev, ha->addr);
4128
4129         /* go through and unsync mc_addr entries to the device */
4130         list = &netdev->mc;
4131         list_for_each_entry_safe(ha, tmp, &list->list, list)
4132                 if (ha->refcount > 1)
4133                         hns3_nic_mc_unsync(netdev, ha->addr);
4134
4135         netif_addr_unlock_bh(netdev);
4136 }
4137
4138 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4139 {
4140         while (ring->next_to_clean != ring->next_to_use) {
4141                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4142                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4143                 ring_ptr_move_fw(ring, next_to_clean);
4144         }
4145 }
4146
4147 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4148 {
4149         struct hns3_desc_cb res_cbs;
4150         int ret;
4151
4152         while (ring->next_to_use != ring->next_to_clean) {
4153                 /* When a buffer is not reused, it's memory has been
4154                  * freed in hns3_handle_rx_bd or will be freed by
4155                  * stack, so we need to replace the buffer here.
4156                  */
4157                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4158                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4159                         if (ret) {
4160                                 u64_stats_update_begin(&ring->syncp);
4161                                 ring->stats.sw_err_cnt++;
4162                                 u64_stats_update_end(&ring->syncp);
4163                                 /* if alloc new buffer fail, exit directly
4164                                  * and reclear in up flow.
4165                                  */
4166                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
4167                                             "reserve buffer map failed, ret = %d\n",
4168                                             ret);
4169                                 return ret;
4170                         }
4171                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4172                 }
4173                 ring_ptr_move_fw(ring, next_to_use);
4174         }
4175
4176         /* Free the pending skb in rx ring */
4177         if (ring->skb) {
4178                 dev_kfree_skb_any(ring->skb);
4179                 ring->skb = NULL;
4180                 ring->pending_buf = 0;
4181         }
4182
4183         return 0;
4184 }
4185
4186 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4187 {
4188         while (ring->next_to_use != ring->next_to_clean) {
4189                 /* When a buffer is not reused, it's memory has been
4190                  * freed in hns3_handle_rx_bd or will be freed by
4191                  * stack, so only need to unmap the buffer here.
4192                  */
4193                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4194                         hns3_unmap_buffer(ring,
4195                                           &ring->desc_cb[ring->next_to_use]);
4196                         ring->desc_cb[ring->next_to_use].dma = 0;
4197                 }
4198
4199                 ring_ptr_move_fw(ring, next_to_use);
4200         }
4201 }
4202
4203 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4204 {
4205         struct net_device *ndev = h->kinfo.netdev;
4206         struct hns3_nic_priv *priv = netdev_priv(ndev);
4207         u32 i;
4208
4209         for (i = 0; i < h->kinfo.num_tqps; i++) {
4210                 struct hns3_enet_ring *ring;
4211
4212                 ring = priv->ring_data[i].ring;
4213                 hns3_clear_tx_ring(ring);
4214
4215                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4216                 /* Continue to clear other rings even if clearing some
4217                  * rings failed.
4218                  */
4219                 if (force)
4220                         hns3_force_clear_rx_ring(ring);
4221                 else
4222                         hns3_clear_rx_ring(ring);
4223         }
4224 }
4225
4226 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4227 {
4228         struct net_device *ndev = h->kinfo.netdev;
4229         struct hns3_nic_priv *priv = netdev_priv(ndev);
4230         struct hns3_enet_ring *rx_ring;
4231         int i, j;
4232         int ret;
4233
4234         for (i = 0; i < h->kinfo.num_tqps; i++) {
4235                 ret = h->ae_algo->ops->reset_queue(h, i);
4236                 if (ret)
4237                         return ret;
4238
4239                 hns3_init_ring_hw(priv->ring_data[i].ring);
4240
4241                 /* We need to clear tx ring here because self test will
4242                  * use the ring and will not run down before up
4243                  */
4244                 hns3_clear_tx_ring(priv->ring_data[i].ring);
4245                 priv->ring_data[i].ring->next_to_clean = 0;
4246                 priv->ring_data[i].ring->next_to_use = 0;
4247
4248                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
4249                 hns3_init_ring_hw(rx_ring);
4250                 ret = hns3_clear_rx_ring(rx_ring);
4251                 if (ret)
4252                         return ret;
4253
4254                 /* We can not know the hardware head and tail when this
4255                  * function is called in reset flow, so we reuse all desc.
4256                  */
4257                 for (j = 0; j < rx_ring->desc_num; j++)
4258                         hns3_reuse_buffer(rx_ring, j);
4259
4260                 rx_ring->next_to_clean = 0;
4261                 rx_ring->next_to_use = 0;
4262         }
4263
4264         hns3_init_tx_ring_tc(priv);
4265
4266         return 0;
4267 }
4268
4269 static void hns3_store_coal(struct hns3_nic_priv *priv)
4270 {
4271         /* ethtool only support setting and querying one coal
4272          * configuration for now, so save the vector 0' coal
4273          * configuration here in order to restore it.
4274          */
4275         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4276                sizeof(struct hns3_enet_coalesce));
4277         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4278                sizeof(struct hns3_enet_coalesce));
4279 }
4280
4281 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4282 {
4283         u16 vector_num = priv->vector_num;
4284         int i;
4285
4286         for (i = 0; i < vector_num; i++) {
4287                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4288                        sizeof(struct hns3_enet_coalesce));
4289                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4290                        sizeof(struct hns3_enet_coalesce));
4291         }
4292 }
4293
4294 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4295 {
4296         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4297         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4298         struct net_device *ndev = kinfo->netdev;
4299         struct hns3_nic_priv *priv = netdev_priv(ndev);
4300
4301         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4302                 return 0;
4303
4304         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4305          * from table space. Hence, for function reset software intervention is
4306          * required to delete the entries
4307          */
4308         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4309                 hns3_remove_hw_addr(ndev);
4310                 hns3_del_all_fd_rules(ndev, false);
4311         }
4312
4313         if (!netif_running(ndev))
4314                 return 0;
4315
4316         return hns3_nic_net_stop(ndev);
4317 }
4318
4319 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4320 {
4321         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4322         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4323         int ret = 0;
4324
4325         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4326
4327         if (netif_running(kinfo->netdev)) {
4328                 ret = hns3_nic_net_open(kinfo->netdev);
4329                 if (ret) {
4330                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4331                         netdev_err(kinfo->netdev,
4332                                    "net up fail, ret=%d!\n", ret);
4333                         return ret;
4334                 }
4335         }
4336
4337         return ret;
4338 }
4339
4340 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4341 {
4342         struct net_device *netdev = handle->kinfo.netdev;
4343         struct hns3_nic_priv *priv = netdev_priv(netdev);
4344         int ret;
4345
4346         /* Carrier off reporting is important to ethtool even BEFORE open */
4347         netif_carrier_off(netdev);
4348
4349         ret = hns3_get_ring_config(priv);
4350         if (ret)
4351                 return ret;
4352
4353         ret = hns3_nic_alloc_vector_data(priv);
4354         if (ret)
4355                 goto err_put_ring;
4356
4357         hns3_restore_coal(priv);
4358
4359         ret = hns3_nic_init_vector_data(priv);
4360         if (ret)
4361                 goto err_dealloc_vector;
4362
4363         ret = hns3_init_all_ring(priv);
4364         if (ret)
4365                 goto err_uninit_vector;
4366
4367         ret = hns3_client_start(handle);
4368         if (ret) {
4369                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4370                 goto err_uninit_ring;
4371         }
4372
4373         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4374
4375         return ret;
4376
4377 err_uninit_ring:
4378         hns3_uninit_all_ring(priv);
4379 err_uninit_vector:
4380         hns3_nic_uninit_vector_data(priv);
4381 err_dealloc_vector:
4382         hns3_nic_dealloc_vector_data(priv);
4383 err_put_ring:
4384         hns3_put_ring_config(priv);
4385
4386         return ret;
4387 }
4388
4389 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4390 {
4391         struct net_device *netdev = handle->kinfo.netdev;
4392         bool vlan_filter_enable;
4393         int ret;
4394
4395         ret = hns3_init_mac_addr(netdev, false);
4396         if (ret)
4397                 return ret;
4398
4399         ret = hns3_recover_hw_addr(netdev);
4400         if (ret)
4401                 return ret;
4402
4403         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4404         if (ret)
4405                 return ret;
4406
4407         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4408         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4409
4410         if (handle->ae_algo->ops->restore_vlan_table)
4411                 handle->ae_algo->ops->restore_vlan_table(handle);
4412
4413         return hns3_restore_fd_rules(netdev);
4414 }
4415
4416 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4417 {
4418         struct net_device *netdev = handle->kinfo.netdev;
4419         struct hns3_nic_priv *priv = netdev_priv(netdev);
4420         int ret;
4421
4422         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4423                 netdev_warn(netdev, "already uninitialized\n");
4424                 return 0;
4425         }
4426
4427         hns3_clear_all_ring(handle, true);
4428         hns3_reset_tx_queue(priv->ae_handle);
4429
4430         hns3_nic_uninit_vector_data(priv);
4431
4432         hns3_store_coal(priv);
4433
4434         ret = hns3_nic_dealloc_vector_data(priv);
4435         if (ret)
4436                 netdev_err(netdev, "dealloc vector error\n");
4437
4438         ret = hns3_uninit_all_ring(priv);
4439         if (ret)
4440                 netdev_err(netdev, "uninit ring error\n");
4441
4442         hns3_put_ring_config(priv);
4443
4444         return ret;
4445 }
4446
4447 static int hns3_reset_notify(struct hnae3_handle *handle,
4448                              enum hnae3_reset_notify_type type)
4449 {
4450         int ret = 0;
4451
4452         switch (type) {
4453         case HNAE3_UP_CLIENT:
4454                 ret = hns3_reset_notify_up_enet(handle);
4455                 break;
4456         case HNAE3_DOWN_CLIENT:
4457                 ret = hns3_reset_notify_down_enet(handle);
4458                 break;
4459         case HNAE3_INIT_CLIENT:
4460                 ret = hns3_reset_notify_init_enet(handle);
4461                 break;
4462         case HNAE3_UNINIT_CLIENT:
4463                 ret = hns3_reset_notify_uninit_enet(handle);
4464                 break;
4465         case HNAE3_RESTORE_CLIENT:
4466                 ret = hns3_reset_notify_restore_enet(handle);
4467                 break;
4468         default:
4469                 break;
4470         }
4471
4472         return ret;
4473 }
4474
4475 static int hns3_change_channels(struct hnae3_handle *handle, u32 new_tqp_num,
4476                                 bool rxfh_configured)
4477 {
4478         int ret;
4479
4480         ret = handle->ae_algo->ops->set_channels(handle, new_tqp_num,
4481                                                  rxfh_configured);
4482         if (ret) {
4483                 dev_err(&handle->pdev->dev,
4484                         "Change tqp num(%u) fail.\n", new_tqp_num);
4485                 return ret;
4486         }
4487
4488         ret = hns3_reset_notify(handle, HNAE3_INIT_CLIENT);
4489         if (ret)
4490                 return ret;
4491
4492         ret =  hns3_reset_notify(handle, HNAE3_UP_CLIENT);
4493         if (ret)
4494                 hns3_reset_notify(handle, HNAE3_UNINIT_CLIENT);
4495
4496         return ret;
4497 }
4498
4499 int hns3_set_channels(struct net_device *netdev,
4500                       struct ethtool_channels *ch)
4501 {
4502         struct hnae3_handle *h = hns3_get_handle(netdev);
4503         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4504         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4505         u32 new_tqp_num = ch->combined_count;
4506         u16 org_tqp_num;
4507         int ret;
4508
4509         if (hns3_nic_resetting(netdev))
4510                 return -EBUSY;
4511
4512         if (ch->rx_count || ch->tx_count)
4513                 return -EINVAL;
4514
4515         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4516             new_tqp_num < 1) {
4517                 dev_err(&netdev->dev,
4518                         "Change tqps fail, the tqp range is from 1 to %d",
4519                         hns3_get_max_available_channels(h));
4520                 return -EINVAL;
4521         }
4522
4523         if (kinfo->rss_size == new_tqp_num)
4524                 return 0;
4525
4526         netif_dbg(h, drv, netdev,
4527                   "set channels: tqp_num=%u, rxfh=%d\n",
4528                   new_tqp_num, rxfh_configured);
4529
4530         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4531         if (ret)
4532                 return ret;
4533
4534         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4535         if (ret)
4536                 return ret;
4537
4538         org_tqp_num = h->kinfo.num_tqps;
4539         ret = hns3_change_channels(h, new_tqp_num, rxfh_configured);
4540         if (ret) {
4541                 int ret1;
4542
4543                 netdev_warn(netdev,
4544                             "Change channels fail, revert to old value\n");
4545                 ret1 = hns3_change_channels(h, org_tqp_num, rxfh_configured);
4546                 if (ret1) {
4547                         netdev_err(netdev,
4548                                    "revert to old channel fail\n");
4549                         return ret1;
4550                 }
4551
4552                 return ret;
4553         }
4554
4555         return 0;
4556 }
4557
4558 static const struct hns3_hw_error_info hns3_hw_err[] = {
4559         { .type = HNAE3_PPU_POISON_ERROR,
4560           .msg = "PPU poison" },
4561         { .type = HNAE3_CMDQ_ECC_ERROR,
4562           .msg = "IMP CMDQ error" },
4563         { .type = HNAE3_IMP_RD_POISON_ERROR,
4564           .msg = "IMP RD poison" },
4565 };
4566
4567 static void hns3_process_hw_error(struct hnae3_handle *handle,
4568                                   enum hnae3_hw_error_type type)
4569 {
4570         int i;
4571
4572         for (i = 0; i < ARRAY_SIZE(hns3_hw_err); i++) {
4573                 if (hns3_hw_err[i].type == type) {
4574                         dev_err(&handle->pdev->dev, "Detected %s!\n",
4575                                 hns3_hw_err[i].msg);
4576                         break;
4577                 }
4578         }
4579 }
4580
4581 static const struct hnae3_client_ops client_ops = {
4582         .init_instance = hns3_client_init,
4583         .uninit_instance = hns3_client_uninit,
4584         .link_status_change = hns3_link_status_change,
4585         .setup_tc = hns3_client_setup_tc,
4586         .reset_notify = hns3_reset_notify,
4587         .process_hw_error = hns3_process_hw_error,
4588 };
4589
4590 /* hns3_init_module - Driver registration routine
4591  * hns3_init_module is the first routine called when the driver is
4592  * loaded. All it does is register with the PCI subsystem.
4593  */
4594 static int __init hns3_init_module(void)
4595 {
4596         int ret;
4597
4598         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4599         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4600
4601         client.type = HNAE3_CLIENT_KNIC;
4602         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4603                  hns3_driver_name);
4604
4605         client.ops = &client_ops;
4606
4607         INIT_LIST_HEAD(&client.node);
4608
4609         hns3_dbg_register_debugfs(hns3_driver_name);
4610
4611         ret = hnae3_register_client(&client);
4612         if (ret)
4613                 goto err_reg_client;
4614
4615         ret = pci_register_driver(&hns3_driver);
4616         if (ret)
4617                 goto err_reg_driver;
4618
4619         return ret;
4620
4621 err_reg_driver:
4622         hnae3_unregister_client(&client);
4623 err_reg_client:
4624         hns3_dbg_unregister_debugfs();
4625         return ret;
4626 }
4627 module_init(hns3_init_module);
4628
4629 /* hns3_exit_module - Driver exit cleanup routine
4630  * hns3_exit_module is called just before the driver is removed
4631  * from memory.
4632  */
4633 static void __exit hns3_exit_module(void)
4634 {
4635         pci_unregister_driver(&hns3_driver);
4636         hnae3_unregister_client(&client);
4637         hns3_dbg_unregister_debugfs();
4638 }
4639 module_exit(hns3_exit_module);
4640
4641 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4642 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4643 MODULE_LICENSE("GPL");
4644 MODULE_ALIAS("pci:hns-nic");
4645 MODULE_VERSION(HNS3_MOD_VERSION);