2 * Faraday FTGMAC100 Gigabit Ethernet
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/dma-mapping.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
31 #include <linux/phy.h>
32 #include <linux/platform_device.h>
35 #include "ftgmac100.h"
37 #define DRV_NAME "ftgmac100"
38 #define DRV_VERSION "0.7"
40 #define RX_QUEUE_ENTRIES 256 /* must be power of 2 */
41 #define TX_QUEUE_ENTRIES 512 /* must be power of 2 */
43 #define MAX_PKT_SIZE 1518
44 #define RX_BUF_SIZE PAGE_SIZE /* must be smaller than 0x3fff */
46 /******************************************************************************
48 *****************************************************************************/
49 struct ftgmac100_descs {
50 struct ftgmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
51 struct ftgmac100_txdes txdes[TX_QUEUE_ENTRIES];
59 struct ftgmac100_descs *descs;
60 dma_addr_t descs_dma_addr;
62 unsigned int rx_pointer;
63 unsigned int tx_clean_pointer;
64 unsigned int tx_pointer;
65 unsigned int tx_pending;
69 struct net_device *netdev;
71 struct napi_struct napi;
73 struct mii_bus *mii_bus;
77 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
78 struct ftgmac100_rxdes *rxdes, gfp_t gfp);
80 /******************************************************************************
81 * internal functions (hardware register access)
82 *****************************************************************************/
83 #define INT_MASK_ALL_ENABLED (FTGMAC100_INT_RPKT_LOST | \
84 FTGMAC100_INT_XPKT_ETH | \
85 FTGMAC100_INT_XPKT_LOST | \
86 FTGMAC100_INT_AHB_ERR | \
87 FTGMAC100_INT_PHYSTS_CHG | \
88 FTGMAC100_INT_RPKT_BUF | \
89 FTGMAC100_INT_NO_RXBUF)
91 static void ftgmac100_set_rx_ring_base(struct ftgmac100 *priv, dma_addr_t addr)
93 iowrite32(addr, priv->base + FTGMAC100_OFFSET_RXR_BADR);
96 static void ftgmac100_set_rx_buffer_size(struct ftgmac100 *priv,
99 size = FTGMAC100_RBSR_SIZE(size);
100 iowrite32(size, priv->base + FTGMAC100_OFFSET_RBSR);
103 static void ftgmac100_set_normal_prio_tx_ring_base(struct ftgmac100 *priv,
106 iowrite32(addr, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
109 static void ftgmac100_txdma_normal_prio_start_polling(struct ftgmac100 *priv)
111 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD);
114 static int ftgmac100_reset_hw(struct ftgmac100 *priv)
116 struct net_device *netdev = priv->netdev;
119 /* NOTE: reset clears all registers */
120 iowrite32(FTGMAC100_MACCR_SW_RST, priv->base + FTGMAC100_OFFSET_MACCR);
121 for (i = 0; i < 5; i++) {
124 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR);
125 if (!(maccr & FTGMAC100_MACCR_SW_RST))
131 netdev_err(netdev, "software reset failed\n");
135 static void ftgmac100_set_mac(struct ftgmac100 *priv, const unsigned char *mac)
137 unsigned int maddr = mac[0] << 8 | mac[1];
138 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
140 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR);
141 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR);
144 static void ftgmac100_init_hw(struct ftgmac100 *priv)
146 /* setup ring buffer base registers */
147 ftgmac100_set_rx_ring_base(priv,
148 priv->descs_dma_addr +
149 offsetof(struct ftgmac100_descs, rxdes));
150 ftgmac100_set_normal_prio_tx_ring_base(priv,
151 priv->descs_dma_addr +
152 offsetof(struct ftgmac100_descs, txdes));
154 ftgmac100_set_rx_buffer_size(priv, RX_BUF_SIZE);
156 iowrite32(FTGMAC100_APTC_RXPOLL_CNT(1), priv->base + FTGMAC100_OFFSET_APTC);
158 ftgmac100_set_mac(priv, priv->netdev->dev_addr);
161 #define MACCR_ENABLE_ALL (FTGMAC100_MACCR_TXDMA_EN | \
162 FTGMAC100_MACCR_RXDMA_EN | \
163 FTGMAC100_MACCR_TXMAC_EN | \
164 FTGMAC100_MACCR_RXMAC_EN | \
165 FTGMAC100_MACCR_FULLDUP | \
166 FTGMAC100_MACCR_CRC_APD | \
167 FTGMAC100_MACCR_RX_RUNT | \
168 FTGMAC100_MACCR_RX_BROADPKT)
170 static void ftgmac100_start_hw(struct ftgmac100 *priv, int speed)
172 int maccr = MACCR_ENABLE_ALL;
180 maccr |= FTGMAC100_MACCR_FAST_MODE;
184 maccr |= FTGMAC100_MACCR_GIGA_MODE;
188 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
191 static void ftgmac100_stop_hw(struct ftgmac100 *priv)
193 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
196 /******************************************************************************
197 * internal functions (receive descriptor)
198 *****************************************************************************/
199 static bool ftgmac100_rxdes_first_segment(struct ftgmac100_rxdes *rxdes)
201 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FRS);
204 static bool ftgmac100_rxdes_last_segment(struct ftgmac100_rxdes *rxdes)
206 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_LRS);
209 static bool ftgmac100_rxdes_packet_ready(struct ftgmac100_rxdes *rxdes)
211 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY);
214 static void ftgmac100_rxdes_set_dma_own(struct ftgmac100_rxdes *rxdes)
216 /* clear status bits */
217 rxdes->rxdes0 &= cpu_to_le32(FTGMAC100_RXDES0_EDORR);
220 static bool ftgmac100_rxdes_rx_error(struct ftgmac100_rxdes *rxdes)
222 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ERR);
225 static bool ftgmac100_rxdes_crc_error(struct ftgmac100_rxdes *rxdes)
227 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_CRC_ERR);
230 static bool ftgmac100_rxdes_frame_too_long(struct ftgmac100_rxdes *rxdes)
232 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FTL);
235 static bool ftgmac100_rxdes_runt(struct ftgmac100_rxdes *rxdes)
237 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RUNT);
240 static bool ftgmac100_rxdes_odd_nibble(struct ftgmac100_rxdes *rxdes)
242 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ODD_NB);
245 static unsigned int ftgmac100_rxdes_data_length(struct ftgmac100_rxdes *rxdes)
247 return le32_to_cpu(rxdes->rxdes0) & FTGMAC100_RXDES0_VDBC;
250 static bool ftgmac100_rxdes_multicast(struct ftgmac100_rxdes *rxdes)
252 return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_MULTICAST);
255 static void ftgmac100_rxdes_set_end_of_ring(struct ftgmac100_rxdes *rxdes)
257 rxdes->rxdes0 |= cpu_to_le32(FTGMAC100_RXDES0_EDORR);
260 static void ftgmac100_rxdes_set_dma_addr(struct ftgmac100_rxdes *rxdes,
263 rxdes->rxdes3 = cpu_to_le32(addr);
266 static dma_addr_t ftgmac100_rxdes_get_dma_addr(struct ftgmac100_rxdes *rxdes)
268 return le32_to_cpu(rxdes->rxdes3);
271 static bool ftgmac100_rxdes_is_tcp(struct ftgmac100_rxdes *rxdes)
273 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
274 cpu_to_le32(FTGMAC100_RXDES1_PROT_TCPIP);
277 static bool ftgmac100_rxdes_is_udp(struct ftgmac100_rxdes *rxdes)
279 return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
280 cpu_to_le32(FTGMAC100_RXDES1_PROT_UDPIP);
283 static bool ftgmac100_rxdes_tcpcs_err(struct ftgmac100_rxdes *rxdes)
285 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_TCP_CHKSUM_ERR);
288 static bool ftgmac100_rxdes_udpcs_err(struct ftgmac100_rxdes *rxdes)
290 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_UDP_CHKSUM_ERR);
293 static bool ftgmac100_rxdes_ipcs_err(struct ftgmac100_rxdes *rxdes)
295 return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_IP_CHKSUM_ERR);
299 * rxdes2 is not used by hardware. We use it to keep track of page.
300 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
302 static void ftgmac100_rxdes_set_page(struct ftgmac100_rxdes *rxdes, struct page *page)
304 rxdes->rxdes2 = (unsigned int)page;
307 static struct page *ftgmac100_rxdes_get_page(struct ftgmac100_rxdes *rxdes)
309 return (struct page *)rxdes->rxdes2;
312 /******************************************************************************
313 * internal functions (receive)
314 *****************************************************************************/
315 static int ftgmac100_next_rx_pointer(int pointer)
317 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
320 static void ftgmac100_rx_pointer_advance(struct ftgmac100 *priv)
322 priv->rx_pointer = ftgmac100_next_rx_pointer(priv->rx_pointer);
325 static struct ftgmac100_rxdes *ftgmac100_current_rxdes(struct ftgmac100 *priv)
327 return &priv->descs->rxdes[priv->rx_pointer];
330 static struct ftgmac100_rxdes *
331 ftgmac100_rx_locate_first_segment(struct ftgmac100 *priv)
333 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
335 while (ftgmac100_rxdes_packet_ready(rxdes)) {
336 if (ftgmac100_rxdes_first_segment(rxdes))
339 ftgmac100_rxdes_set_dma_own(rxdes);
340 ftgmac100_rx_pointer_advance(priv);
341 rxdes = ftgmac100_current_rxdes(priv);
347 static bool ftgmac100_rx_packet_error(struct ftgmac100 *priv,
348 struct ftgmac100_rxdes *rxdes)
350 struct net_device *netdev = priv->netdev;
353 if (unlikely(ftgmac100_rxdes_rx_error(rxdes))) {
355 netdev_info(netdev, "rx err\n");
357 netdev->stats.rx_errors++;
361 if (unlikely(ftgmac100_rxdes_crc_error(rxdes))) {
363 netdev_info(netdev, "rx crc err\n");
365 netdev->stats.rx_crc_errors++;
367 } else if (unlikely(ftgmac100_rxdes_ipcs_err(rxdes))) {
369 netdev_info(netdev, "rx IP checksum err\n");
374 if (unlikely(ftgmac100_rxdes_frame_too_long(rxdes))) {
376 netdev_info(netdev, "rx frame too long\n");
378 netdev->stats.rx_length_errors++;
380 } else if (unlikely(ftgmac100_rxdes_runt(rxdes))) {
382 netdev_info(netdev, "rx runt\n");
384 netdev->stats.rx_length_errors++;
386 } else if (unlikely(ftgmac100_rxdes_odd_nibble(rxdes))) {
388 netdev_info(netdev, "rx odd nibble\n");
390 netdev->stats.rx_length_errors++;
397 static void ftgmac100_rx_drop_packet(struct ftgmac100 *priv)
399 struct net_device *netdev = priv->netdev;
400 struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
404 netdev_dbg(netdev, "drop packet %p\n", rxdes);
407 if (ftgmac100_rxdes_last_segment(rxdes))
410 ftgmac100_rxdes_set_dma_own(rxdes);
411 ftgmac100_rx_pointer_advance(priv);
412 rxdes = ftgmac100_current_rxdes(priv);
413 } while (!done && ftgmac100_rxdes_packet_ready(rxdes));
415 netdev->stats.rx_dropped++;
418 static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
420 struct net_device *netdev = priv->netdev;
421 struct ftgmac100_rxdes *rxdes;
425 rxdes = ftgmac100_rx_locate_first_segment(priv);
429 if (unlikely(ftgmac100_rx_packet_error(priv, rxdes))) {
430 ftgmac100_rx_drop_packet(priv);
434 /* start processing */
435 skb = netdev_alloc_skb_ip_align(netdev, 128);
436 if (unlikely(!skb)) {
438 netdev_err(netdev, "rx skb alloc failed\n");
440 ftgmac100_rx_drop_packet(priv);
444 if (unlikely(ftgmac100_rxdes_multicast(rxdes)))
445 netdev->stats.multicast++;
448 * It seems that HW does checksum incorrectly with fragmented packets,
449 * so we are conservative here - if HW checksum error, let software do
450 * the checksum again.
452 if ((ftgmac100_rxdes_is_tcp(rxdes) && !ftgmac100_rxdes_tcpcs_err(rxdes)) ||
453 (ftgmac100_rxdes_is_udp(rxdes) && !ftgmac100_rxdes_udpcs_err(rxdes)))
454 skb->ip_summed = CHECKSUM_UNNECESSARY;
457 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
458 struct page *page = ftgmac100_rxdes_get_page(rxdes);
461 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
463 size = ftgmac100_rxdes_data_length(rxdes);
464 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, page, 0, size);
467 skb->data_len += size;
468 skb->truesize += PAGE_SIZE;
470 if (ftgmac100_rxdes_last_segment(rxdes))
473 ftgmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
475 ftgmac100_rx_pointer_advance(priv);
476 rxdes = ftgmac100_current_rxdes(priv);
479 /* Small frames are copied into linear part of skb to free one page */
480 if (skb->len <= 128) {
481 skb->truesize -= PAGE_SIZE;
482 __pskb_pull_tail(skb, skb->len);
484 /* We pull the minimum amount into linear part */
485 __pskb_pull_tail(skb, ETH_HLEN);
487 skb->protocol = eth_type_trans(skb, netdev);
489 netdev->stats.rx_packets++;
490 netdev->stats.rx_bytes += skb->len;
492 /* push packet to protocol stack */
493 napi_gro_receive(&priv->napi, skb);
499 /******************************************************************************
500 * internal functions (transmit descriptor)
501 *****************************************************************************/
502 static void ftgmac100_txdes_reset(struct ftgmac100_txdes *txdes)
504 /* clear all except end of ring bit */
505 txdes->txdes0 &= cpu_to_le32(FTGMAC100_TXDES0_EDOTR);
511 static bool ftgmac100_txdes_owned_by_dma(struct ftgmac100_txdes *txdes)
513 return txdes->txdes0 & cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
516 static void ftgmac100_txdes_set_dma_own(struct ftgmac100_txdes *txdes)
519 * Make sure dma own bit will not be set before any other
523 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXDMA_OWN);
526 static void ftgmac100_txdes_set_end_of_ring(struct ftgmac100_txdes *txdes)
528 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_EDOTR);
531 static void ftgmac100_txdes_set_first_segment(struct ftgmac100_txdes *txdes)
533 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_FTS);
536 static void ftgmac100_txdes_set_last_segment(struct ftgmac100_txdes *txdes)
538 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_LTS);
541 static void ftgmac100_txdes_set_buffer_size(struct ftgmac100_txdes *txdes,
544 txdes->txdes0 |= cpu_to_le32(FTGMAC100_TXDES0_TXBUF_SIZE(len));
547 static void ftgmac100_txdes_set_txint(struct ftgmac100_txdes *txdes)
549 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TXIC);
552 static void ftgmac100_txdes_set_tcpcs(struct ftgmac100_txdes *txdes)
554 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_TCP_CHKSUM);
557 static void ftgmac100_txdes_set_udpcs(struct ftgmac100_txdes *txdes)
559 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_UDP_CHKSUM);
562 static void ftgmac100_txdes_set_ipcs(struct ftgmac100_txdes *txdes)
564 txdes->txdes1 |= cpu_to_le32(FTGMAC100_TXDES1_IP_CHKSUM);
567 static void ftgmac100_txdes_set_dma_addr(struct ftgmac100_txdes *txdes,
570 txdes->txdes3 = cpu_to_le32(addr);
573 static dma_addr_t ftgmac100_txdes_get_dma_addr(struct ftgmac100_txdes *txdes)
575 return le32_to_cpu(txdes->txdes3);
579 * txdes2 is not used by hardware. We use it to keep track of socket buffer.
580 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
582 static void ftgmac100_txdes_set_skb(struct ftgmac100_txdes *txdes,
585 txdes->txdes2 = (unsigned int)skb;
588 static struct sk_buff *ftgmac100_txdes_get_skb(struct ftgmac100_txdes *txdes)
590 return (struct sk_buff *)txdes->txdes2;
593 /******************************************************************************
594 * internal functions (transmit)
595 *****************************************************************************/
596 static int ftgmac100_next_tx_pointer(int pointer)
598 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
601 static void ftgmac100_tx_pointer_advance(struct ftgmac100 *priv)
603 priv->tx_pointer = ftgmac100_next_tx_pointer(priv->tx_pointer);
606 static void ftgmac100_tx_clean_pointer_advance(struct ftgmac100 *priv)
608 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv->tx_clean_pointer);
611 static struct ftgmac100_txdes *ftgmac100_current_txdes(struct ftgmac100 *priv)
613 return &priv->descs->txdes[priv->tx_pointer];
616 static struct ftgmac100_txdes *
617 ftgmac100_current_clean_txdes(struct ftgmac100 *priv)
619 return &priv->descs->txdes[priv->tx_clean_pointer];
622 static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv)
624 struct net_device *netdev = priv->netdev;
625 struct ftgmac100_txdes *txdes;
629 if (priv->tx_pending == 0)
632 txdes = ftgmac100_current_clean_txdes(priv);
634 if (ftgmac100_txdes_owned_by_dma(txdes))
637 skb = ftgmac100_txdes_get_skb(txdes);
638 map = ftgmac100_txdes_get_dma_addr(txdes);
640 netdev->stats.tx_packets++;
641 netdev->stats.tx_bytes += skb->len;
643 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
647 ftgmac100_txdes_reset(txdes);
649 ftgmac100_tx_clean_pointer_advance(priv);
651 spin_lock(&priv->tx_lock);
653 spin_unlock(&priv->tx_lock);
654 netif_wake_queue(netdev);
659 static void ftgmac100_tx_complete(struct ftgmac100 *priv)
661 while (ftgmac100_tx_complete_packet(priv))
665 static int ftgmac100_xmit(struct ftgmac100 *priv, struct sk_buff *skb,
668 struct net_device *netdev = priv->netdev;
669 struct ftgmac100_txdes *txdes;
670 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
672 txdes = ftgmac100_current_txdes(priv);
673 ftgmac100_tx_pointer_advance(priv);
675 /* setup TX descriptor */
676 ftgmac100_txdes_set_skb(txdes, skb);
677 ftgmac100_txdes_set_dma_addr(txdes, map);
678 ftgmac100_txdes_set_buffer_size(txdes, len);
680 ftgmac100_txdes_set_first_segment(txdes);
681 ftgmac100_txdes_set_last_segment(txdes);
682 ftgmac100_txdes_set_txint(txdes);
683 if (skb->ip_summed == CHECKSUM_PARTIAL) {
684 __be16 protocol = skb->protocol;
686 if (protocol == cpu_to_be16(ETH_P_IP)) {
687 u8 ip_proto = ip_hdr(skb)->protocol;
689 ftgmac100_txdes_set_ipcs(txdes);
690 if (ip_proto == IPPROTO_TCP)
691 ftgmac100_txdes_set_tcpcs(txdes);
692 else if (ip_proto == IPPROTO_UDP)
693 ftgmac100_txdes_set_udpcs(txdes);
697 spin_lock(&priv->tx_lock);
699 if (priv->tx_pending == TX_QUEUE_ENTRIES)
700 netif_stop_queue(netdev);
703 ftgmac100_txdes_set_dma_own(txdes);
704 spin_unlock(&priv->tx_lock);
706 ftgmac100_txdma_normal_prio_start_polling(priv);
711 /******************************************************************************
712 * internal functions (buffer)
713 *****************************************************************************/
714 static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
715 struct ftgmac100_rxdes *rxdes, gfp_t gfp)
717 struct net_device *netdev = priv->netdev;
721 page = alloc_page(gfp);
724 netdev_err(netdev, "failed to allocate rx page\n");
728 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
729 if (unlikely(dma_mapping_error(priv->dev, map))) {
731 netdev_err(netdev, "failed to map rx page\n");
736 ftgmac100_rxdes_set_page(rxdes, page);
737 ftgmac100_rxdes_set_dma_addr(rxdes, map);
738 ftgmac100_rxdes_set_dma_own(rxdes);
742 static void ftgmac100_free_buffers(struct ftgmac100 *priv)
746 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
747 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
748 struct page *page = ftgmac100_rxdes_get_page(rxdes);
749 dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
754 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
758 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
759 struct ftgmac100_txdes *txdes = &priv->descs->txdes[i];
760 struct sk_buff *skb = ftgmac100_txdes_get_skb(txdes);
761 dma_addr_t map = ftgmac100_txdes_get_dma_addr(txdes);
766 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
770 dma_free_coherent(priv->dev, sizeof(struct ftgmac100_descs),
771 priv->descs, priv->descs_dma_addr);
774 static int ftgmac100_alloc_buffers(struct ftgmac100 *priv)
778 priv->descs = dma_zalloc_coherent(priv->dev,
779 sizeof(struct ftgmac100_descs),
780 &priv->descs_dma_addr, GFP_KERNEL);
784 /* initialize RX ring */
785 ftgmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
787 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
788 struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
790 if (ftgmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
794 /* initialize TX ring */
795 ftgmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
799 ftgmac100_free_buffers(priv);
803 /******************************************************************************
804 * internal functions (mdio)
805 *****************************************************************************/
806 static void ftgmac100_adjust_link(struct net_device *netdev)
808 struct ftgmac100 *priv = netdev_priv(netdev);
809 struct phy_device *phydev = netdev->phydev;
812 if (phydev->speed == priv->old_speed)
815 priv->old_speed = phydev->speed;
817 ier = ioread32(priv->base + FTGMAC100_OFFSET_IER);
819 /* disable all interrupts */
820 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
822 netif_stop_queue(netdev);
823 ftgmac100_stop_hw(priv);
825 netif_start_queue(netdev);
826 ftgmac100_init_hw(priv);
827 ftgmac100_start_hw(priv, phydev->speed);
829 /* re-enable interrupts */
830 iowrite32(ier, priv->base + FTGMAC100_OFFSET_IER);
833 static int ftgmac100_mii_probe(struct ftgmac100 *priv)
835 struct net_device *netdev = priv->netdev;
836 struct phy_device *phydev;
838 phydev = phy_find_first(priv->mii_bus);
840 netdev_info(netdev, "%s: no PHY found\n", netdev->name);
844 phydev = phy_connect(netdev, phydev_name(phydev),
845 &ftgmac100_adjust_link, PHY_INTERFACE_MODE_GMII);
847 if (IS_ERR(phydev)) {
848 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name);
849 return PTR_ERR(phydev);
855 /******************************************************************************
856 * struct mii_bus functions
857 *****************************************************************************/
858 static int ftgmac100_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
860 struct net_device *netdev = bus->priv;
861 struct ftgmac100 *priv = netdev_priv(netdev);
865 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
867 /* preserve MDC cycle threshold */
868 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
870 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
871 FTGMAC100_PHYCR_REGAD(regnum) |
872 FTGMAC100_PHYCR_MIIRD;
874 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
876 for (i = 0; i < 10; i++) {
877 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
879 if ((phycr & FTGMAC100_PHYCR_MIIRD) == 0) {
882 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA);
883 return FTGMAC100_PHYDATA_MIIRDATA(data);
889 netdev_err(netdev, "mdio read timed out\n");
893 static int ftgmac100_mdiobus_write(struct mii_bus *bus, int phy_addr,
894 int regnum, u16 value)
896 struct net_device *netdev = bus->priv;
897 struct ftgmac100 *priv = netdev_priv(netdev);
902 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
904 /* preserve MDC cycle threshold */
905 phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
907 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) |
908 FTGMAC100_PHYCR_REGAD(regnum) |
909 FTGMAC100_PHYCR_MIIWR;
911 data = FTGMAC100_PHYDATA_MIIWDATA(value);
913 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA);
914 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);
916 for (i = 0; i < 10; i++) {
917 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR);
919 if ((phycr & FTGMAC100_PHYCR_MIIWR) == 0)
925 netdev_err(netdev, "mdio write timed out\n");
929 /******************************************************************************
930 * struct ethtool_ops functions
931 *****************************************************************************/
932 static void ftgmac100_get_drvinfo(struct net_device *netdev,
933 struct ethtool_drvinfo *info)
935 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
936 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
937 strlcpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
940 static const struct ethtool_ops ftgmac100_ethtool_ops = {
941 .get_drvinfo = ftgmac100_get_drvinfo,
942 .get_link = ethtool_op_get_link,
943 .get_link_ksettings = phy_ethtool_get_link_ksettings,
944 .set_link_ksettings = phy_ethtool_set_link_ksettings,
947 /******************************************************************************
949 *****************************************************************************/
950 static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
952 struct net_device *netdev = dev_id;
953 struct ftgmac100 *priv = netdev_priv(netdev);
955 if (likely(netif_running(netdev))) {
956 /* Disable interrupts for polling */
957 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
958 napi_schedule(&priv->napi);
964 /******************************************************************************
965 * struct napi_struct functions
966 *****************************************************************************/
967 static int ftgmac100_poll(struct napi_struct *napi, int budget)
969 struct ftgmac100 *priv = container_of(napi, struct ftgmac100, napi);
970 struct net_device *netdev = priv->netdev;
972 bool completed = true;
975 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR);
976 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR);
978 if (status & (FTGMAC100_INT_RPKT_BUF | FTGMAC100_INT_NO_RXBUF)) {
980 * FTGMAC100_INT_RPKT_BUF:
981 * RX DMA has received packets into RX buffer successfully
983 * FTGMAC100_INT_NO_RXBUF:
984 * RX buffer unavailable
989 retry = ftgmac100_rx_packet(priv, &rx);
990 } while (retry && rx < budget);
992 if (retry && rx == budget)
996 if (status & (FTGMAC100_INT_XPKT_ETH | FTGMAC100_INT_XPKT_LOST)) {
998 * FTGMAC100_INT_XPKT_ETH:
999 * packet transmitted to ethernet successfully
1001 * FTGMAC100_INT_XPKT_LOST:
1002 * packet transmitted to ethernet lost due to late
1003 * collision or excessive collision
1005 ftgmac100_tx_complete(priv);
1008 if (status & (FTGMAC100_INT_NO_RXBUF | FTGMAC100_INT_RPKT_LOST |
1009 FTGMAC100_INT_AHB_ERR | FTGMAC100_INT_PHYSTS_CHG)) {
1010 if (net_ratelimit())
1011 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
1012 status & FTGMAC100_INT_NO_RXBUF ? "NO_RXBUF " : "",
1013 status & FTGMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
1014 status & FTGMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
1015 status & FTGMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
1017 if (status & FTGMAC100_INT_NO_RXBUF) {
1018 /* RX buffer unavailable */
1019 netdev->stats.rx_over_errors++;
1022 if (status & FTGMAC100_INT_RPKT_LOST) {
1023 /* received packet lost due to RX FIFO full */
1024 netdev->stats.rx_fifo_errors++;
1029 napi_complete(napi);
1031 /* enable all interrupts */
1032 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTGMAC100_OFFSET_IER);
1038 /******************************************************************************
1039 * struct net_device_ops functions
1040 *****************************************************************************/
1041 static int ftgmac100_open(struct net_device *netdev)
1043 struct ftgmac100 *priv = netdev_priv(netdev);
1046 err = ftgmac100_alloc_buffers(priv);
1048 netdev_err(netdev, "failed to allocate buffers\n");
1052 err = request_irq(priv->irq, ftgmac100_interrupt, 0, netdev->name, netdev);
1054 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
1058 priv->rx_pointer = 0;
1059 priv->tx_clean_pointer = 0;
1060 priv->tx_pointer = 0;
1061 priv->tx_pending = 0;
1063 err = ftgmac100_reset_hw(priv);
1067 ftgmac100_init_hw(priv);
1068 ftgmac100_start_hw(priv, 10);
1070 phy_start(netdev->phydev);
1072 napi_enable(&priv->napi);
1073 netif_start_queue(netdev);
1075 /* enable all interrupts */
1076 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTGMAC100_OFFSET_IER);
1080 free_irq(priv->irq, netdev);
1082 ftgmac100_free_buffers(priv);
1087 static int ftgmac100_stop(struct net_device *netdev)
1089 struct ftgmac100 *priv = netdev_priv(netdev);
1091 /* disable all interrupts */
1092 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
1094 netif_stop_queue(netdev);
1095 napi_disable(&priv->napi);
1096 phy_stop(netdev->phydev);
1098 ftgmac100_stop_hw(priv);
1099 free_irq(priv->irq, netdev);
1100 ftgmac100_free_buffers(priv);
1105 static int ftgmac100_hard_start_xmit(struct sk_buff *skb,
1106 struct net_device *netdev)
1108 struct ftgmac100 *priv = netdev_priv(netdev);
1111 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1112 if (net_ratelimit())
1113 netdev_dbg(netdev, "tx packet too big\n");
1115 netdev->stats.tx_dropped++;
1117 return NETDEV_TX_OK;
1120 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1121 if (unlikely(dma_mapping_error(priv->dev, map))) {
1123 if (net_ratelimit())
1124 netdev_err(netdev, "map socket buffer failed\n");
1126 netdev->stats.tx_dropped++;
1128 return NETDEV_TX_OK;
1131 return ftgmac100_xmit(priv, skb, map);
1135 static int ftgmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1137 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
1140 static const struct net_device_ops ftgmac100_netdev_ops = {
1141 .ndo_open = ftgmac100_open,
1142 .ndo_stop = ftgmac100_stop,
1143 .ndo_start_xmit = ftgmac100_hard_start_xmit,
1144 .ndo_set_mac_address = eth_mac_addr,
1145 .ndo_validate_addr = eth_validate_addr,
1146 .ndo_do_ioctl = ftgmac100_do_ioctl,
1149 /******************************************************************************
1150 * struct platform_driver functions
1151 *****************************************************************************/
1152 static int ftgmac100_probe(struct platform_device *pdev)
1154 struct resource *res;
1156 struct net_device *netdev;
1157 struct ftgmac100 *priv;
1163 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1167 irq = platform_get_irq(pdev, 0);
1171 /* setup net_device */
1172 netdev = alloc_etherdev(sizeof(*priv));
1175 goto err_alloc_etherdev;
1178 SET_NETDEV_DEV(netdev, &pdev->dev);
1180 netdev->ethtool_ops = &ftgmac100_ethtool_ops;
1181 netdev->netdev_ops = &ftgmac100_netdev_ops;
1182 netdev->features = NETIF_F_IP_CSUM | NETIF_F_GRO;
1184 platform_set_drvdata(pdev, netdev);
1186 /* setup private data */
1187 priv = netdev_priv(netdev);
1188 priv->netdev = netdev;
1189 priv->dev = &pdev->dev;
1191 spin_lock_init(&priv->tx_lock);
1193 /* initialize NAPI */
1194 netif_napi_add(netdev, &priv->napi, ftgmac100_poll, 64);
1197 priv->res = request_mem_region(res->start, resource_size(res),
1198 dev_name(&pdev->dev));
1200 dev_err(&pdev->dev, "Could not reserve memory region\n");
1205 priv->base = ioremap(res->start, resource_size(res));
1207 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1214 /* initialize mdio bus */
1215 priv->mii_bus = mdiobus_alloc();
1216 if (!priv->mii_bus) {
1218 goto err_alloc_mdiobus;
1221 priv->mii_bus->name = "ftgmac100_mdio";
1222 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "ftgmac100_mii");
1224 priv->mii_bus->priv = netdev;
1225 priv->mii_bus->read = ftgmac100_mdiobus_read;
1226 priv->mii_bus->write = ftgmac100_mdiobus_write;
1228 err = mdiobus_register(priv->mii_bus);
1230 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1231 goto err_register_mdiobus;
1234 err = ftgmac100_mii_probe(priv);
1236 dev_err(&pdev->dev, "MII Probe failed!\n");
1240 /* register network device */
1241 err = register_netdev(netdev);
1243 dev_err(&pdev->dev, "Failed to register netdev\n");
1244 goto err_register_netdev;
1247 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1249 if (!is_valid_ether_addr(netdev->dev_addr)) {
1250 eth_hw_addr_random(netdev);
1251 netdev_info(netdev, "generated random MAC address %pM\n",
1257 err_register_netdev:
1258 phy_disconnect(netdev->phydev);
1260 mdiobus_unregister(priv->mii_bus);
1261 err_register_mdiobus:
1262 mdiobus_free(priv->mii_bus);
1264 iounmap(priv->base);
1266 release_resource(priv->res);
1268 netif_napi_del(&priv->napi);
1269 free_netdev(netdev);
1274 static int __exit ftgmac100_remove(struct platform_device *pdev)
1276 struct net_device *netdev;
1277 struct ftgmac100 *priv;
1279 netdev = platform_get_drvdata(pdev);
1280 priv = netdev_priv(netdev);
1282 unregister_netdev(netdev);
1284 phy_disconnect(netdev->phydev);
1285 mdiobus_unregister(priv->mii_bus);
1286 mdiobus_free(priv->mii_bus);
1288 iounmap(priv->base);
1289 release_resource(priv->res);
1291 netif_napi_del(&priv->napi);
1292 free_netdev(netdev);
1296 static struct platform_driver ftgmac100_driver = {
1297 .probe = ftgmac100_probe,
1298 .remove = __exit_p(ftgmac100_remove),
1304 module_platform_driver(ftgmac100_driver);
1306 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1307 MODULE_DESCRIPTION("FTGMAC100 driver");
1308 MODULE_LICENSE("GPL");