1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Davicom DM9000 Fast Ethernet driver for Linux.
4 * Copyright (C) 1997 Sten Wang
6 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
8 * Additional updates, Copyright:
9 * Ben Dooks <ben@simtec.co.uk>
10 * Sascha Hauer <s.hauer@pengutronix.de>
13 #include <linux/module.h>
14 #include <linux/ioport.h>
15 #include <linux/netdevice.h>
16 #include <linux/etherdevice.h>
17 #include <linux/interrupt.h>
18 #include <linux/skbuff.h>
19 #include <linux/spinlock.h>
20 #include <linux/crc32.h>
21 #include <linux/mii.h>
23 #include <linux/of_net.h>
24 #include <linux/ethtool.h>
25 #include <linux/dm9000.h>
26 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/irq.h>
29 #include <linux/slab.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/gpio.h>
32 #include <linux/of_gpio.h>
34 #include <asm/delay.h>
40 /* Board/System/Debug information/definition ---------------- */
42 #define DM9000_PHY 0x40 /* PHY address 0x01 */
44 #define CARDNAME "dm9000"
45 #define DRV_VERSION "1.31"
48 * Transmit timeout, default 5 seconds.
50 static int watchdog = 5000;
51 module_param(watchdog, int, 0400);
52 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
55 * Debug messages level
58 module_param(debug, int, 0644);
59 MODULE_PARM_DESC(debug, "dm9000 debug level (0-6)");
61 /* DM9000 register address locking.
63 * The DM9000 uses an address register to control where data written
64 * to the data register goes. This means that the address register
65 * must be preserved over interrupts or similar calls.
67 * During interrupt and other critical calls, a spinlock is used to
68 * protect the system, but the calls themselves save the address
69 * in the address register in case they are interrupting another
70 * access to the device.
72 * For general accesses a lock is provided so that calls which are
73 * allowed to sleep are serialised so that the address register does
74 * not need to be saved. This lock also serves to serialise access
75 * to the EEPROM and PHY access registers which are shared between
79 /* The driver supports the original DM9000E, and now the two newer
80 * devices, DM9000A and DM9000B.
84 TYPE_DM9000E, /* original DM9000 */
89 /* Structure/enum declaration ------------------------------- */
92 void __iomem *io_addr; /* Register I/O base address */
93 void __iomem *io_data; /* Data I/O address */
101 u8 io_mode; /* 0:word, 2:byte */
106 unsigned int in_timeout:1;
107 unsigned int in_suspend:1;
108 unsigned int wake_supported:1;
110 enum dm9000_type type;
112 void (*inblk)(void __iomem *port, void *data, int length);
113 void (*outblk)(void __iomem *port, void *data, int length);
114 void (*dumpblk)(void __iomem *port, int length);
116 struct device *dev; /* parent device */
118 struct resource *addr_res; /* resources found */
119 struct resource *data_res;
120 struct resource *addr_req; /* resources requested */
121 struct resource *data_req;
125 struct mutex addr_lock; /* phy and eeprom access lock */
127 struct delayed_work phy_poll;
128 struct net_device *ndev;
132 struct mii_if_info mii;
141 #define dm9000_dbg(db, lev, msg...) do { \
142 if ((lev) < debug) { \
143 dev_dbg(db->dev, msg); \
147 static inline struct board_info *to_dm9000_board(struct net_device *dev)
149 return netdev_priv(dev);
152 /* DM9000 network board routine ---------------------------- */
155 * Read a byte from I/O port
158 ior(struct board_info *db, int reg)
160 writeb(reg, db->io_addr);
161 return readb(db->io_data);
165 * Write a byte to I/O port
169 iow(struct board_info *db, int reg, int value)
171 writeb(reg, db->io_addr);
172 writeb(value, db->io_data);
176 dm9000_reset(struct board_info *db)
178 dev_dbg(db->dev, "resetting device\n");
180 /* Reset DM9000, see DM9000 Application Notes V1.22 Jun 11, 2004 page 29
181 * The essential point is that we have to do a double reset, and the
182 * instruction is to set LBK into MAC internal loopback mode.
184 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
185 udelay(100); /* Application note says at least 20 us */
186 if (ior(db, DM9000_NCR) & 1)
187 dev_err(db->dev, "dm9000 did not respond to first reset\n");
189 iow(db, DM9000_NCR, 0);
190 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
192 if (ior(db, DM9000_NCR) & 1)
193 dev_err(db->dev, "dm9000 did not respond to second reset\n");
196 /* routines for sending block to chip */
198 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
200 iowrite8_rep(reg, data, count);
203 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
205 iowrite16_rep(reg, data, (count+1) >> 1);
208 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
210 iowrite32_rep(reg, data, (count+3) >> 2);
213 /* input block from chip to memory */
215 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
217 ioread8_rep(reg, data, count);
221 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
223 ioread16_rep(reg, data, (count+1) >> 1);
226 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
228 ioread32_rep(reg, data, (count+3) >> 2);
231 /* dump block from chip to null */
233 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
238 for (i = 0; i < count; i++)
242 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
247 count = (count + 1) >> 1;
249 for (i = 0; i < count; i++)
253 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
258 count = (count + 3) >> 2;
260 for (i = 0; i < count; i++)
265 * Sleep, either by using msleep() or if we are suspending, then
266 * use mdelay() to sleep.
268 static void dm9000_msleep(struct board_info *db, unsigned int ms)
270 if (db->in_suspend || db->in_timeout)
276 /* Read a word from phyxcer */
278 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
280 struct board_info *db = netdev_priv(dev);
282 unsigned int reg_save;
285 mutex_lock(&db->addr_lock);
287 spin_lock_irqsave(&db->lock, flags);
289 /* Save previous register address */
290 reg_save = readb(db->io_addr);
292 /* Fill the phyxcer register into REG_0C */
293 iow(db, DM9000_EPAR, DM9000_PHY | reg);
295 /* Issue phyxcer read command */
296 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS);
298 writeb(reg_save, db->io_addr);
299 spin_unlock_irqrestore(&db->lock, flags);
301 dm9000_msleep(db, 1); /* Wait read complete */
303 spin_lock_irqsave(&db->lock, flags);
304 reg_save = readb(db->io_addr);
306 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
308 /* The read data keeps on REG_0D & REG_0E */
309 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
311 /* restore the previous address */
312 writeb(reg_save, db->io_addr);
313 spin_unlock_irqrestore(&db->lock, flags);
315 mutex_unlock(&db->addr_lock);
317 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
321 /* Write a word to phyxcer */
323 dm9000_phy_write(struct net_device *dev,
324 int phyaddr_unused, int reg, int value)
326 struct board_info *db = netdev_priv(dev);
328 unsigned long reg_save;
330 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
332 mutex_lock(&db->addr_lock);
334 spin_lock_irqsave(&db->lock, flags);
336 /* Save previous register address */
337 reg_save = readb(db->io_addr);
339 /* Fill the phyxcer register into REG_0C */
340 iow(db, DM9000_EPAR, DM9000_PHY | reg);
342 /* Fill the written data into REG_0D & REG_0E */
343 iow(db, DM9000_EPDRL, value);
344 iow(db, DM9000_EPDRH, value >> 8);
346 /* Issue phyxcer write command */
347 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW);
349 writeb(reg_save, db->io_addr);
350 spin_unlock_irqrestore(&db->lock, flags);
352 dm9000_msleep(db, 1); /* Wait write complete */
354 spin_lock_irqsave(&db->lock, flags);
355 reg_save = readb(db->io_addr);
357 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
359 /* restore the previous address */
360 writeb(reg_save, db->io_addr);
362 spin_unlock_irqrestore(&db->lock, flags);
364 mutex_unlock(&db->addr_lock);
369 * select the specified set of io routines to use with the
373 static void dm9000_set_io(struct board_info *db, int byte_width)
375 /* use the size of the data resource to work out what IO
376 * routines we want to use
379 switch (byte_width) {
381 db->dumpblk = dm9000_dumpblk_8bit;
382 db->outblk = dm9000_outblk_8bit;
383 db->inblk = dm9000_inblk_8bit;
388 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
391 db->dumpblk = dm9000_dumpblk_16bit;
392 db->outblk = dm9000_outblk_16bit;
393 db->inblk = dm9000_inblk_16bit;
398 db->dumpblk = dm9000_dumpblk_32bit;
399 db->outblk = dm9000_outblk_32bit;
400 db->inblk = dm9000_inblk_32bit;
405 static void dm9000_schedule_poll(struct board_info *db)
407 if (db->type == TYPE_DM9000E)
408 schedule_delayed_work(&db->phy_poll, HZ * 2);
411 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
413 struct board_info *dm = to_dm9000_board(dev);
415 if (!netif_running(dev))
418 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
422 dm9000_read_locked(struct board_info *db, int reg)
427 spin_lock_irqsave(&db->lock, flags);
429 spin_unlock_irqrestore(&db->lock, flags);
434 static int dm9000_wait_eeprom(struct board_info *db)
437 int timeout = 8; /* wait max 8msec */
439 /* The DM9000 data sheets say we should be able to
440 * poll the ERRE bit in EPCR to wait for the EEPROM
441 * operation. From testing several chips, this bit
442 * does not seem to work.
444 * We attempt to use the bit, but fall back to the
445 * timeout (which is why we do not return an error
446 * on expiry) to say that the EEPROM operation has
451 status = dm9000_read_locked(db, DM9000_EPCR);
453 if ((status & EPCR_ERRE) == 0)
459 dev_dbg(db->dev, "timeout waiting EEPROM\n");
468 * Read a word data from EEPROM
471 dm9000_read_eeprom(struct board_info *db, int offset, u8 *to)
475 if (db->flags & DM9000_PLATF_NO_EEPROM) {
481 mutex_lock(&db->addr_lock);
483 spin_lock_irqsave(&db->lock, flags);
485 iow(db, DM9000_EPAR, offset);
486 iow(db, DM9000_EPCR, EPCR_ERPRR);
488 spin_unlock_irqrestore(&db->lock, flags);
490 dm9000_wait_eeprom(db);
492 /* delay for at-least 150uS */
495 spin_lock_irqsave(&db->lock, flags);
497 iow(db, DM9000_EPCR, 0x0);
499 to[0] = ior(db, DM9000_EPDRL);
500 to[1] = ior(db, DM9000_EPDRH);
502 spin_unlock_irqrestore(&db->lock, flags);
504 mutex_unlock(&db->addr_lock);
508 * Write a word data to SROM
511 dm9000_write_eeprom(struct board_info *db, int offset, u8 *data)
515 if (db->flags & DM9000_PLATF_NO_EEPROM)
518 mutex_lock(&db->addr_lock);
520 spin_lock_irqsave(&db->lock, flags);
521 iow(db, DM9000_EPAR, offset);
522 iow(db, DM9000_EPDRH, data[1]);
523 iow(db, DM9000_EPDRL, data[0]);
524 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
525 spin_unlock_irqrestore(&db->lock, flags);
527 dm9000_wait_eeprom(db);
529 mdelay(1); /* wait at least 150uS to clear */
531 spin_lock_irqsave(&db->lock, flags);
532 iow(db, DM9000_EPCR, 0);
533 spin_unlock_irqrestore(&db->lock, flags);
535 mutex_unlock(&db->addr_lock);
540 static void dm9000_get_drvinfo(struct net_device *dev,
541 struct ethtool_drvinfo *info)
543 struct board_info *dm = to_dm9000_board(dev);
545 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
546 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
547 strlcpy(info->bus_info, to_platform_device(dm->dev)->name,
548 sizeof(info->bus_info));
551 static u32 dm9000_get_msglevel(struct net_device *dev)
553 struct board_info *dm = to_dm9000_board(dev);
555 return dm->msg_enable;
558 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
560 struct board_info *dm = to_dm9000_board(dev);
562 dm->msg_enable = value;
565 static int dm9000_get_link_ksettings(struct net_device *dev,
566 struct ethtool_link_ksettings *cmd)
568 struct board_info *dm = to_dm9000_board(dev);
570 mii_ethtool_get_link_ksettings(&dm->mii, cmd);
574 static int dm9000_set_link_ksettings(struct net_device *dev,
575 const struct ethtool_link_ksettings *cmd)
577 struct board_info *dm = to_dm9000_board(dev);
579 return mii_ethtool_set_link_ksettings(&dm->mii, cmd);
582 static int dm9000_nway_reset(struct net_device *dev)
584 struct board_info *dm = to_dm9000_board(dev);
585 return mii_nway_restart(&dm->mii);
588 static int dm9000_set_features(struct net_device *dev,
589 netdev_features_t features)
591 struct board_info *dm = to_dm9000_board(dev);
592 netdev_features_t changed = dev->features ^ features;
595 if (!(changed & NETIF_F_RXCSUM))
598 spin_lock_irqsave(&dm->lock, flags);
599 iow(dm, DM9000_RCSR, (features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
600 spin_unlock_irqrestore(&dm->lock, flags);
605 static u32 dm9000_get_link(struct net_device *dev)
607 struct board_info *dm = to_dm9000_board(dev);
610 if (dm->flags & DM9000_PLATF_EXT_PHY)
611 ret = mii_link_ok(&dm->mii);
613 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
618 #define DM_EEPROM_MAGIC (0x444D394B)
620 static int dm9000_get_eeprom_len(struct net_device *dev)
625 static int dm9000_get_eeprom(struct net_device *dev,
626 struct ethtool_eeprom *ee, u8 *data)
628 struct board_info *dm = to_dm9000_board(dev);
629 int offset = ee->offset;
633 /* EEPROM access is aligned to two bytes */
635 if ((len & 1) != 0 || (offset & 1) != 0)
638 if (dm->flags & DM9000_PLATF_NO_EEPROM)
641 ee->magic = DM_EEPROM_MAGIC;
643 for (i = 0; i < len; i += 2)
644 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
649 static int dm9000_set_eeprom(struct net_device *dev,
650 struct ethtool_eeprom *ee, u8 *data)
652 struct board_info *dm = to_dm9000_board(dev);
653 int offset = ee->offset;
657 /* EEPROM access is aligned to two bytes */
659 if (dm->flags & DM9000_PLATF_NO_EEPROM)
662 if (ee->magic != DM_EEPROM_MAGIC)
666 if (len & 1 || offset & 1) {
667 int which = offset & 1;
670 dm9000_read_eeprom(dm, offset / 2, tmp);
672 dm9000_write_eeprom(dm, offset / 2, tmp);
676 dm9000_write_eeprom(dm, offset / 2, data);
688 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
690 struct board_info *dm = to_dm9000_board(dev);
692 memset(w, 0, sizeof(struct ethtool_wolinfo));
694 /* note, we could probably support wake-phy too */
695 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
696 w->wolopts = dm->wake_state;
699 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
701 struct board_info *dm = to_dm9000_board(dev);
703 u32 opts = w->wolopts;
706 if (!dm->wake_supported)
709 if (opts & ~WAKE_MAGIC)
712 if (opts & WAKE_MAGIC)
715 mutex_lock(&dm->addr_lock);
717 spin_lock_irqsave(&dm->lock, flags);
718 iow(dm, DM9000_WCR, wcr);
719 spin_unlock_irqrestore(&dm->lock, flags);
721 mutex_unlock(&dm->addr_lock);
723 if (dm->wake_state != opts) {
724 /* change in wol state, update IRQ state */
727 irq_set_irq_wake(dm->irq_wake, 1);
728 else if (dm->wake_state && !opts)
729 irq_set_irq_wake(dm->irq_wake, 0);
732 dm->wake_state = opts;
736 static const struct ethtool_ops dm9000_ethtool_ops = {
737 .get_drvinfo = dm9000_get_drvinfo,
738 .get_msglevel = dm9000_get_msglevel,
739 .set_msglevel = dm9000_set_msglevel,
740 .nway_reset = dm9000_nway_reset,
741 .get_link = dm9000_get_link,
742 .get_wol = dm9000_get_wol,
743 .set_wol = dm9000_set_wol,
744 .get_eeprom_len = dm9000_get_eeprom_len,
745 .get_eeprom = dm9000_get_eeprom,
746 .set_eeprom = dm9000_set_eeprom,
747 .get_link_ksettings = dm9000_get_link_ksettings,
748 .set_link_ksettings = dm9000_set_link_ksettings,
751 static void dm9000_show_carrier(struct board_info *db,
752 unsigned carrier, unsigned nsr)
755 struct net_device *ndev = db->ndev;
756 struct mii_if_info *mii = &db->mii;
757 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
760 lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
762 "%s: link up, %dMbps, %s-duplex, lpa 0x%04X\n",
763 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
764 (ncr & NCR_FDX) ? "full" : "half", lpa);
766 dev_info(db->dev, "%s: link down\n", ndev->name);
771 dm9000_poll_work(struct work_struct *w)
773 struct delayed_work *dw = to_delayed_work(w);
774 struct board_info *db = container_of(dw, struct board_info, phy_poll);
775 struct net_device *ndev = db->ndev;
777 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
778 !(db->flags & DM9000_PLATF_EXT_PHY)) {
779 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
780 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
781 unsigned new_carrier;
783 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
785 if (old_carrier != new_carrier) {
786 if (netif_msg_link(db))
787 dm9000_show_carrier(db, new_carrier, nsr);
790 netif_carrier_off(ndev);
792 netif_carrier_on(ndev);
795 mii_check_media(&db->mii, netif_msg_link(db), 0);
797 if (netif_running(ndev))
798 dm9000_schedule_poll(db);
801 /* dm9000_release_board
803 * release a board, and any mapped resources
807 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
809 /* unmap our resources */
811 iounmap(db->io_addr);
812 iounmap(db->io_data);
814 /* release the resources */
817 release_resource(db->data_req);
821 release_resource(db->addr_req);
825 static unsigned char dm9000_type_to_char(enum dm9000_type type)
828 case TYPE_DM9000E: return 'e';
829 case TYPE_DM9000A: return 'a';
830 case TYPE_DM9000B: return 'b';
837 * Set DM9000 multicast address
840 dm9000_hash_table_unlocked(struct net_device *dev)
842 struct board_info *db = netdev_priv(dev);
843 struct netdev_hw_addr *ha;
846 u16 hash_table[4] = { 0, 0, 0, 0x8000 }; /* broadcast address */
847 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
849 dm9000_dbg(db, 1, "entering %s\n", __func__);
851 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
852 iow(db, oft, dev->dev_addr[i]);
854 if (dev->flags & IFF_PROMISC)
857 if (dev->flags & IFF_ALLMULTI)
860 /* the multicast address in Hash Table : 64 bits */
861 netdev_for_each_mc_addr(ha, dev) {
862 hash_val = ether_crc_le(6, ha->addr) & 0x3f;
863 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
866 /* Write the hash table to MAC MD table */
867 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
868 iow(db, oft++, hash_table[i]);
869 iow(db, oft++, hash_table[i] >> 8);
872 iow(db, DM9000_RCR, rcr);
876 dm9000_hash_table(struct net_device *dev)
878 struct board_info *db = netdev_priv(dev);
881 spin_lock_irqsave(&db->lock, flags);
882 dm9000_hash_table_unlocked(dev);
883 spin_unlock_irqrestore(&db->lock, flags);
887 dm9000_mask_interrupts(struct board_info *db)
889 iow(db, DM9000_IMR, IMR_PAR);
893 dm9000_unmask_interrupts(struct board_info *db)
895 iow(db, DM9000_IMR, db->imr_all);
899 * Initialize dm9000 board
902 dm9000_init_dm9000(struct net_device *dev)
904 struct board_info *db = netdev_priv(dev);
908 dm9000_dbg(db, 1, "entering %s\n", __func__);
911 dm9000_mask_interrupts(db);
914 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
917 if (dev->hw_features & NETIF_F_RXCSUM)
919 (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0);
921 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
922 iow(db, DM9000_GPR, 0);
924 /* If we are dealing with DM9000B, some extra steps are required: a
925 * manual phy reset, and setting init params.
927 if (db->type == TYPE_DM9000B) {
928 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET);
929 dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM);
932 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
934 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
935 * up dumping the wake events if we disable this. There is already
936 * a wake-mask in DM9000_WCR */
937 if (db->wake_supported)
940 iow(db, DM9000_NCR, ncr);
942 /* Program operating register */
943 iow(db, DM9000_TCR, 0); /* TX Polling clear */
944 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
945 iow(db, DM9000_FCR, 0xff); /* Flow Control */
946 iow(db, DM9000_SMCR, 0); /* Special Mode */
947 /* clear TX status */
948 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
949 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
951 /* Set address filter table */
952 dm9000_hash_table_unlocked(dev);
954 imr = IMR_PAR | IMR_PTM | IMR_PRM;
955 if (db->type != TYPE_DM9000E)
960 /* Init Driver variable */
962 db->queue_pkt_len = 0;
963 netif_trans_update(dev);
966 /* Our watchdog timed out. Called by the networking layer */
967 static void dm9000_timeout(struct net_device *dev)
969 struct board_info *db = netdev_priv(dev);
973 /* Save previous register address */
974 spin_lock_irqsave(&db->lock, flags);
976 reg_save = readb(db->io_addr);
978 netif_stop_queue(dev);
979 dm9000_init_dm9000(dev);
980 dm9000_unmask_interrupts(db);
981 /* We can accept TX packets again */
982 netif_trans_update(dev); /* prevent tx timeout */
983 netif_wake_queue(dev);
985 /* Restore previous register address */
986 writeb(reg_save, db->io_addr);
988 spin_unlock_irqrestore(&db->lock, flags);
991 static void dm9000_send_packet(struct net_device *dev,
995 struct board_info *dm = to_dm9000_board(dev);
997 /* The DM9000 is not smart enough to leave fragmented packets alone. */
998 if (dm->ip_summed != ip_summed) {
999 if (ip_summed == CHECKSUM_NONE)
1000 iow(dm, DM9000_TCCR, 0);
1002 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
1003 dm->ip_summed = ip_summed;
1006 /* Set TX length to DM9000 */
1007 iow(dm, DM9000_TXPLL, pkt_len);
1008 iow(dm, DM9000_TXPLH, pkt_len >> 8);
1010 /* Issue TX polling command */
1011 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
1015 * Hardware start transmission.
1016 * Send a packet to media from the upper layer.
1019 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
1021 unsigned long flags;
1022 struct board_info *db = netdev_priv(dev);
1024 dm9000_dbg(db, 3, "%s:\n", __func__);
1026 if (db->tx_pkt_cnt > 1)
1027 return NETDEV_TX_BUSY;
1029 spin_lock_irqsave(&db->lock, flags);
1031 /* Move data to DM9000 TX RAM */
1032 writeb(DM9000_MWCMD, db->io_addr);
1034 (db->outblk)(db->io_data, skb->data, skb->len);
1035 dev->stats.tx_bytes += skb->len;
1038 /* TX control: First packet immediately send, second packet queue */
1039 if (db->tx_pkt_cnt == 1) {
1040 dm9000_send_packet(dev, skb->ip_summed, skb->len);
1043 db->queue_pkt_len = skb->len;
1044 db->queue_ip_summed = skb->ip_summed;
1045 netif_stop_queue(dev);
1048 spin_unlock_irqrestore(&db->lock, flags);
1051 dev_consume_skb_any(skb);
1053 return NETDEV_TX_OK;
1057 * DM9000 interrupt handler
1058 * receive the packet to upper layer, free the transmitted packet
1061 static void dm9000_tx_done(struct net_device *dev, struct board_info *db)
1063 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
1065 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
1066 /* One packet sent complete */
1068 dev->stats.tx_packets++;
1070 if (netif_msg_tx_done(db))
1071 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
1073 /* Queue packet check & send */
1074 if (db->tx_pkt_cnt > 0)
1075 dm9000_send_packet(dev, db->queue_ip_summed,
1077 netif_wake_queue(dev);
1081 struct dm9000_rxhdr {
1088 * Received a packet and pass to upper layer
1091 dm9000_rx(struct net_device *dev)
1093 struct board_info *db = netdev_priv(dev);
1094 struct dm9000_rxhdr rxhdr;
1095 struct sk_buff *skb;
1100 /* Check packet ready or not */
1102 ior(db, DM9000_MRCMDX); /* Dummy read */
1104 /* Get most updated data */
1105 rxbyte = readb(db->io_data);
1107 /* Status check: this byte must be 0 or 1 */
1108 if (rxbyte & DM9000_PKT_ERR) {
1109 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1110 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1114 if (!(rxbyte & DM9000_PKT_RDY))
1117 /* A packet ready now & Get status/length */
1119 writeb(DM9000_MRCMD, db->io_addr);
1121 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1123 RxLen = le16_to_cpu(rxhdr.RxLen);
1125 if (netif_msg_rx_status(db))
1126 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
1127 rxhdr.RxStatus, RxLen);
1129 /* Packet Status check */
1132 if (netif_msg_rx_err(db))
1133 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1136 if (RxLen > DM9000_PKT_MAX) {
1137 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1140 /* rxhdr.RxStatus is identical to RSR register. */
1141 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
1142 RSR_PLE | RSR_RWTO |
1143 RSR_LCS | RSR_RF)) {
1145 if (rxhdr.RxStatus & RSR_FOE) {
1146 if (netif_msg_rx_err(db))
1147 dev_dbg(db->dev, "fifo error\n");
1148 dev->stats.rx_fifo_errors++;
1150 if (rxhdr.RxStatus & RSR_CE) {
1151 if (netif_msg_rx_err(db))
1152 dev_dbg(db->dev, "crc error\n");
1153 dev->stats.rx_crc_errors++;
1155 if (rxhdr.RxStatus & RSR_RF) {
1156 if (netif_msg_rx_err(db))
1157 dev_dbg(db->dev, "length error\n");
1158 dev->stats.rx_length_errors++;
1162 /* Move data from DM9000 */
1164 ((skb = netdev_alloc_skb(dev, RxLen + 4)) != NULL)) {
1165 skb_reserve(skb, 2);
1166 rdptr = skb_put(skb, RxLen - 4);
1168 /* Read received packet from RX SRAM */
1170 (db->inblk)(db->io_data, rdptr, RxLen);
1171 dev->stats.rx_bytes += RxLen;
1173 /* Pass to upper layer */
1174 skb->protocol = eth_type_trans(skb, dev);
1175 if (dev->features & NETIF_F_RXCSUM) {
1176 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1177 skb->ip_summed = CHECKSUM_UNNECESSARY;
1179 skb_checksum_none_assert(skb);
1182 dev->stats.rx_packets++;
1185 /* need to dump the packet's data */
1187 (db->dumpblk)(db->io_data, RxLen);
1189 } while (rxbyte & DM9000_PKT_RDY);
1192 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1194 struct net_device *dev = dev_id;
1195 struct board_info *db = netdev_priv(dev);
1197 unsigned long flags;
1200 dm9000_dbg(db, 3, "entering %s\n", __func__);
1202 /* A real interrupt coming */
1204 /* holders of db->lock must always block IRQs */
1205 spin_lock_irqsave(&db->lock, flags);
1207 /* Save previous register address */
1208 reg_save = readb(db->io_addr);
1210 dm9000_mask_interrupts(db);
1211 /* Got DM9000 interrupt status */
1212 int_status = ior(db, DM9000_ISR); /* Got ISR */
1213 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1215 if (netif_msg_intr(db))
1216 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1218 /* Received the coming packet */
1219 if (int_status & ISR_PRS)
1222 /* Transmit Interrupt check */
1223 if (int_status & ISR_PTS)
1224 dm9000_tx_done(dev, db);
1226 if (db->type != TYPE_DM9000E) {
1227 if (int_status & ISR_LNKCHNG) {
1228 /* fire a link-change request */
1229 schedule_delayed_work(&db->phy_poll, 1);
1233 dm9000_unmask_interrupts(db);
1234 /* Restore previous register address */
1235 writeb(reg_save, db->io_addr);
1237 spin_unlock_irqrestore(&db->lock, flags);
1242 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1244 struct net_device *dev = dev_id;
1245 struct board_info *db = netdev_priv(dev);
1246 unsigned long flags;
1249 spin_lock_irqsave(&db->lock, flags);
1251 nsr = ior(db, DM9000_NSR);
1252 wcr = ior(db, DM9000_WCR);
1254 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1256 if (nsr & NSR_WAKEST) {
1257 /* clear, so we can avoid */
1258 iow(db, DM9000_NSR, NSR_WAKEST);
1260 if (wcr & WCR_LINKST)
1261 dev_info(db->dev, "wake by link status change\n");
1262 if (wcr & WCR_SAMPLEST)
1263 dev_info(db->dev, "wake by sample packet\n");
1264 if (wcr & WCR_MAGICST)
1265 dev_info(db->dev, "wake by magic packet\n");
1266 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1267 dev_err(db->dev, "wake signalled with no reason? "
1268 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1271 spin_unlock_irqrestore(&db->lock, flags);
1273 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1276 #ifdef CONFIG_NET_POLL_CONTROLLER
1280 static void dm9000_poll_controller(struct net_device *dev)
1282 disable_irq(dev->irq);
1283 dm9000_interrupt(dev->irq, dev);
1284 enable_irq(dev->irq);
1289 * Open the interface.
1290 * The interface is opened whenever "ifconfig" actives it.
1293 dm9000_open(struct net_device *dev)
1295 struct board_info *db = netdev_priv(dev);
1296 unsigned int irq_flags = irq_get_trigger_type(dev->irq);
1298 if (netif_msg_ifup(db))
1299 dev_dbg(db->dev, "enabling %s\n", dev->name);
1301 /* If there is no IRQ type specified, tell the user that this is a
1304 if (irq_flags == IRQF_TRIGGER_NONE)
1305 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1307 irq_flags |= IRQF_SHARED;
1309 /* GPIO0 on pre-activate PHY, Reg 1F is not set by reset */
1310 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1311 mdelay(1); /* delay needs by DM9000B */
1313 /* Initialize DM9000 board */
1314 dm9000_init_dm9000(dev);
1316 if (request_irq(dev->irq, dm9000_interrupt, irq_flags, dev->name, dev))
1318 /* Now that we have an interrupt handler hooked up we can unmask
1321 dm9000_unmask_interrupts(db);
1323 /* Init driver variable */
1326 mii_check_media(&db->mii, netif_msg_link(db), 1);
1327 netif_start_queue(dev);
1329 /* Poll initial link status */
1330 schedule_delayed_work(&db->phy_poll, 1);
1336 dm9000_shutdown(struct net_device *dev)
1338 struct board_info *db = netdev_priv(dev);
1341 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1342 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1343 dm9000_mask_interrupts(db);
1344 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1348 * Stop the interface.
1349 * The interface is stopped when it is brought.
1352 dm9000_stop(struct net_device *ndev)
1354 struct board_info *db = netdev_priv(ndev);
1356 if (netif_msg_ifdown(db))
1357 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1359 cancel_delayed_work_sync(&db->phy_poll);
1361 netif_stop_queue(ndev);
1362 netif_carrier_off(ndev);
1364 /* free interrupt */
1365 free_irq(ndev->irq, ndev);
1367 dm9000_shutdown(ndev);
1372 static const struct net_device_ops dm9000_netdev_ops = {
1373 .ndo_open = dm9000_open,
1374 .ndo_stop = dm9000_stop,
1375 .ndo_start_xmit = dm9000_start_xmit,
1376 .ndo_tx_timeout = dm9000_timeout,
1377 .ndo_set_rx_mode = dm9000_hash_table,
1378 .ndo_do_ioctl = dm9000_ioctl,
1379 .ndo_set_features = dm9000_set_features,
1380 .ndo_validate_addr = eth_validate_addr,
1381 .ndo_set_mac_address = eth_mac_addr,
1382 #ifdef CONFIG_NET_POLL_CONTROLLER
1383 .ndo_poll_controller = dm9000_poll_controller,
1387 static struct dm9000_plat_data *dm9000_parse_dt(struct device *dev)
1389 struct dm9000_plat_data *pdata;
1390 struct device_node *np = dev->of_node;
1391 const void *mac_addr;
1393 if (!IS_ENABLED(CONFIG_OF) || !np)
1394 return ERR_PTR(-ENXIO);
1396 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1398 return ERR_PTR(-ENOMEM);
1400 if (of_find_property(np, "davicom,ext-phy", NULL))
1401 pdata->flags |= DM9000_PLATF_EXT_PHY;
1402 if (of_find_property(np, "davicom,no-eeprom", NULL))
1403 pdata->flags |= DM9000_PLATF_NO_EEPROM;
1405 mac_addr = of_get_mac_address(np);
1406 if (!IS_ERR(mac_addr))
1407 ether_addr_copy(pdata->dev_addr, mac_addr);
1413 * Search DM9000 board, allocate space and register it
1416 dm9000_probe(struct platform_device *pdev)
1418 struct dm9000_plat_data *pdata = dev_get_platdata(&pdev->dev);
1419 struct board_info *db; /* Point a board information structure */
1420 struct net_device *ndev;
1421 struct device *dev = &pdev->dev;
1422 const unsigned char *mac_src;
1428 enum of_gpio_flags flags;
1429 struct regulator *power;
1430 bool inv_mac_addr = false;
1432 power = devm_regulator_get(dev, "vcc");
1433 if (IS_ERR(power)) {
1434 if (PTR_ERR(power) == -EPROBE_DEFER)
1435 return -EPROBE_DEFER;
1436 dev_dbg(dev, "no regulator provided\n");
1438 ret = regulator_enable(power);
1441 "Failed to enable power regulator: %d\n", ret);
1444 dev_dbg(dev, "regulator enabled\n");
1447 reset_gpios = of_get_named_gpio_flags(dev->of_node, "reset-gpios", 0,
1449 if (gpio_is_valid(reset_gpios)) {
1450 ret = devm_gpio_request_one(dev, reset_gpios, flags,
1453 dev_err(dev, "failed to request reset gpio %d: %d\n",
1458 /* According to manual PWRST# Low Period Min 1ms */
1460 gpio_set_value(reset_gpios, 1);
1461 /* Needs 3ms to read eeprom when PWRST is deasserted */
1466 pdata = dm9000_parse_dt(&pdev->dev);
1468 return PTR_ERR(pdata);
1471 /* Init network device */
1472 ndev = alloc_etherdev(sizeof(struct board_info));
1476 SET_NETDEV_DEV(ndev, &pdev->dev);
1478 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1480 /* setup board info structure */
1481 db = netdev_priv(ndev);
1483 db->dev = &pdev->dev;
1486 spin_lock_init(&db->lock);
1487 mutex_init(&db->addr_lock);
1489 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1491 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1492 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1494 if (!db->addr_res || !db->data_res) {
1495 dev_err(db->dev, "insufficient resources addr=%p data=%p\n",
1496 db->addr_res, db->data_res);
1501 ndev->irq = platform_get_irq(pdev, 0);
1502 if (ndev->irq < 0) {
1503 dev_err(db->dev, "interrupt resource unavailable: %d\n",
1509 db->irq_wake = platform_get_irq(pdev, 1);
1510 if (db->irq_wake >= 0) {
1511 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1513 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1514 IRQF_SHARED, dev_name(db->dev), ndev);
1516 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1519 /* test to see if irq is really wakeup capable */
1520 ret = irq_set_irq_wake(db->irq_wake, 1);
1522 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1526 irq_set_irq_wake(db->irq_wake, 0);
1527 db->wake_supported = 1;
1532 iosize = resource_size(db->addr_res);
1533 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1536 if (db->addr_req == NULL) {
1537 dev_err(db->dev, "cannot claim address reg area\n");
1542 db->io_addr = ioremap(db->addr_res->start, iosize);
1544 if (db->io_addr == NULL) {
1545 dev_err(db->dev, "failed to ioremap address reg\n");
1550 iosize = resource_size(db->data_res);
1551 db->data_req = request_mem_region(db->data_res->start, iosize,
1554 if (db->data_req == NULL) {
1555 dev_err(db->dev, "cannot claim data reg area\n");
1560 db->io_data = ioremap(db->data_res->start, iosize);
1562 if (db->io_data == NULL) {
1563 dev_err(db->dev, "failed to ioremap data reg\n");
1568 /* fill in parameters for net-dev structure */
1569 ndev->base_addr = (unsigned long)db->io_addr;
1571 /* ensure at least we have a default set of IO routines */
1572 dm9000_set_io(db, iosize);
1574 /* check to see if anything is being over-ridden */
1575 if (pdata != NULL) {
1576 /* check to see if the driver wants to over-ride the
1577 * default IO width */
1579 if (pdata->flags & DM9000_PLATF_8BITONLY)
1580 dm9000_set_io(db, 1);
1582 if (pdata->flags & DM9000_PLATF_16BITONLY)
1583 dm9000_set_io(db, 2);
1585 if (pdata->flags & DM9000_PLATF_32BITONLY)
1586 dm9000_set_io(db, 4);
1588 /* check to see if there are any IO routine
1591 if (pdata->inblk != NULL)
1592 db->inblk = pdata->inblk;
1594 if (pdata->outblk != NULL)
1595 db->outblk = pdata->outblk;
1597 if (pdata->dumpblk != NULL)
1598 db->dumpblk = pdata->dumpblk;
1600 db->flags = pdata->flags;
1603 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1604 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1609 /* try multiple times, DM9000 sometimes gets the read wrong */
1610 for (i = 0; i < 8; i++) {
1611 id_val = ior(db, DM9000_VIDL);
1612 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1613 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1614 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1616 if (id_val == DM9000_ID)
1618 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1621 if (id_val != DM9000_ID) {
1622 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1627 /* Identify what type of DM9000 we are working on */
1629 id_val = ior(db, DM9000_CHIPR);
1630 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1634 db->type = TYPE_DM9000A;
1637 db->type = TYPE_DM9000B;
1640 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1641 db->type = TYPE_DM9000E;
1644 /* dm9000a/b are capable of hardware checksum offload */
1645 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1646 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;
1647 ndev->features |= ndev->hw_features;
1650 /* from this point we assume that we have found a DM9000 */
1652 ndev->netdev_ops = &dm9000_netdev_ops;
1653 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1654 ndev->ethtool_ops = &dm9000_ethtool_ops;
1656 db->msg_enable = NETIF_MSG_LINK;
1657 db->mii.phy_id_mask = 0x1f;
1658 db->mii.reg_num_mask = 0x1f;
1659 db->mii.force_media = 0;
1660 db->mii.full_duplex = 0;
1662 db->mii.mdio_read = dm9000_phy_read;
1663 db->mii.mdio_write = dm9000_phy_write;
1667 /* try reading the node address from the attached EEPROM */
1668 for (i = 0; i < 6; i += 2)
1669 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1671 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1672 mac_src = "platform data";
1673 memcpy(ndev->dev_addr, pdata->dev_addr, ETH_ALEN);
1676 if (!is_valid_ether_addr(ndev->dev_addr)) {
1677 /* try reading from mac */
1680 for (i = 0; i < 6; i++)
1681 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1684 if (!is_valid_ether_addr(ndev->dev_addr)) {
1685 inv_mac_addr = true;
1686 eth_hw_addr_random(ndev);
1691 platform_set_drvdata(pdev, ndev);
1692 ret = register_netdev(ndev);
1696 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please set using ip\n",
1698 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1699 ndev->name, dm9000_type_to_char(db->type),
1700 db->io_addr, db->io_data, ndev->irq,
1701 ndev->dev_addr, mac_src);
1706 dev_err(db->dev, "not found (%d).\n", ret);
1708 dm9000_release_board(pdev, db);
1715 dm9000_drv_suspend(struct device *dev)
1717 struct net_device *ndev = dev_get_drvdata(dev);
1718 struct board_info *db;
1721 db = netdev_priv(ndev);
1724 if (!netif_running(ndev))
1727 netif_device_detach(ndev);
1729 /* only shutdown if not using WoL */
1730 if (!db->wake_state)
1731 dm9000_shutdown(ndev);
1737 dm9000_drv_resume(struct device *dev)
1739 struct net_device *ndev = dev_get_drvdata(dev);
1740 struct board_info *db = netdev_priv(ndev);
1743 if (netif_running(ndev)) {
1744 /* reset if we were not in wake mode to ensure if
1745 * the device was powered off it is in a known state */
1746 if (!db->wake_state) {
1747 dm9000_init_dm9000(ndev);
1748 dm9000_unmask_interrupts(db);
1751 netif_device_attach(ndev);
1759 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1760 .suspend = dm9000_drv_suspend,
1761 .resume = dm9000_drv_resume,
1765 dm9000_drv_remove(struct platform_device *pdev)
1767 struct net_device *ndev = platform_get_drvdata(pdev);
1769 unregister_netdev(ndev);
1770 dm9000_release_board(pdev, netdev_priv(ndev));
1771 free_netdev(ndev); /* free device structure */
1773 dev_dbg(&pdev->dev, "released and freed device\n");
1778 static const struct of_device_id dm9000_of_matches[] = {
1779 { .compatible = "davicom,dm9000", },
1782 MODULE_DEVICE_TABLE(of, dm9000_of_matches);
1785 static struct platform_driver dm9000_driver = {
1788 .pm = &dm9000_drv_pm_ops,
1789 .of_match_table = of_match_ptr(dm9000_of_matches),
1791 .probe = dm9000_probe,
1792 .remove = dm9000_drv_remove,
1795 module_platform_driver(dm9000_driver);
1797 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1798 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1799 MODULE_LICENSE("GPL");
1800 MODULE_ALIAS("platform:dm9000");