2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
38 #include <linux/types.h>
41 CPL_PASS_OPEN_REQ = 0x1,
42 CPL_PASS_ACCEPT_RPL = 0x2,
43 CPL_ACT_OPEN_REQ = 0x3,
44 CPL_SET_TCB_FIELD = 0x5,
46 CPL_CLOSE_CON_REQ = 0x8,
47 CPL_CLOSE_LISTSRV_REQ = 0x9,
50 CPL_RX_DATA_ACK = 0xD,
52 CPL_L2T_WRITE_REQ = 0x12,
53 CPL_SMT_WRITE_REQ = 0x14,
54 CPL_TID_RELEASE = 0x1A,
55 CPL_TX_DATA_ISO = 0x1F,
57 CPL_CLOSE_LISTSRV_RPL = 0x20,
58 CPL_L2T_WRITE_RPL = 0x23,
59 CPL_PASS_OPEN_RPL = 0x24,
60 CPL_ACT_OPEN_RPL = 0x25,
61 CPL_PEER_CLOSE = 0x26,
62 CPL_ABORT_REQ_RSS = 0x2B,
63 CPL_ABORT_RPL_RSS = 0x2D,
64 CPL_SMT_WRITE_RPL = 0x2E,
66 CPL_RX_PHYS_ADDR = 0x30,
67 CPL_CLOSE_CON_RPL = 0x32,
70 CPL_RDMA_CQE_READ_RSP = 0x36,
71 CPL_RDMA_CQE_ERR = 0x37,
73 CPL_SET_TCB_RPL = 0x3A,
75 CPL_RX_DDP_COMPLETE = 0x3F,
77 CPL_ACT_ESTABLISH = 0x40,
78 CPL_PASS_ESTABLISH = 0x41,
79 CPL_RX_DATA_DDP = 0x42,
80 CPL_PASS_ACCEPT_REQ = 0x44,
81 CPL_RX_ISCSI_CMP = 0x45,
82 CPL_TRACE_PKT_T5 = 0x48,
83 CPL_RX_ISCSI_DDP = 0x49,
85 CPL_RDMA_READ_REQ = 0x60,
87 CPL_PASS_OPEN_REQ6 = 0x81,
88 CPL_ACT_OPEN_REQ6 = 0x83,
90 CPL_TX_TLS_PDU = 0x88,
91 CPL_TX_SEC_PDU = 0x8A,
92 CPL_TX_TLS_ACK = 0x8B,
94 CPL_RDMA_TERMINATE = 0xA2,
95 CPL_RDMA_WRITE = 0xA4,
96 CPL_SGE_EGR_UPDATE = 0xA5,
97 CPL_RX_MPS_PKT = 0xAF,
100 CPL_ISCSI_DATA = 0xB2,
106 CPL_RX_PHYS_DSGL = 0xD0,
110 CPL_TX_PKT_LSO = 0xED,
111 CPL_TX_PKT_XT = 0xEE,
118 CPL_ERR_TCAM_PARITY = 1,
119 CPL_ERR_TCAM_MISS = 2,
120 CPL_ERR_TCAM_FULL = 3,
121 CPL_ERR_BAD_LENGTH = 15,
122 CPL_ERR_BAD_ROUTE = 18,
123 CPL_ERR_CONN_RESET = 20,
124 CPL_ERR_CONN_EXIST_SYNRECV = 21,
125 CPL_ERR_CONN_EXIST = 22,
126 CPL_ERR_ARP_MISS = 23,
127 CPL_ERR_BAD_SYN = 24,
128 CPL_ERR_CONN_TIMEDOUT = 30,
129 CPL_ERR_XMIT_TIMEDOUT = 31,
130 CPL_ERR_PERSIST_TIMEDOUT = 32,
131 CPL_ERR_FINWAIT2_TIMEDOUT = 33,
132 CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
133 CPL_ERR_RTX_NEG_ADVICE = 35,
134 CPL_ERR_PERSIST_NEG_ADVICE = 36,
135 CPL_ERR_KEEPALV_NEG_ADVICE = 37,
136 CPL_ERR_ABORT_FAILED = 42,
137 CPL_ERR_IWARP_FLM = 50,
141 CPL_CONN_POLICY_AUTO = 0,
142 CPL_CONN_POLICY_ASK = 1,
143 CPL_CONN_POLICY_FILTER = 2,
144 CPL_CONN_POLICY_DENY = 3
156 ULP_CRC_HEADER = 1 << 0,
157 ULP_CRC_DATA = 1 << 1
161 CPL_ABORT_SEND_RST = 0,
165 enum { /* TX_PKT_XT checksum types */
184 #define CPL_OPCODE_S 24
185 #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S)
186 #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF)
187 #define TID_G(x) ((x) & 0xFFFFFF)
189 /* tid is assumed to be 24-bits */
190 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE_V(opcode) | (tid))
192 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
194 /* extract the TID from a CPL command */
195 #define GET_TID(cmd) (TID_G(be32_to_cpu(OPCODE_TID(cmd))))
197 /* partitioning of TID fields that also carry a queue id */
199 #define TID_TID_M 0x3fff
200 #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M)
203 #define TID_QID_M 0x3ff
204 #define TID_QID_V(x) ((x) << TID_QID_S)
205 #define TID_QID_G(x) (((x) >> TID_QID_S) & TID_QID_M)
209 #if defined(__LITTLE_ENDIAN_BITFIELD)
228 struct work_request_hdr {
236 #define WR_OP_V(x) ((__u64)(x) << WR_OP_S)
238 #define WR_HDR struct work_request_hdr wr
240 /* option 0 fields */
242 #define TX_CHAN_V(x) ((x) << TX_CHAN_S)
245 #define ULP_MODE_V(x) ((x) << ULP_MODE_S)
247 #define RCV_BUFSIZ_S 12
248 #define RCV_BUFSIZ_M 0x3FFU
249 #define RCV_BUFSIZ_V(x) ((x) << RCV_BUFSIZ_S)
251 #define SMAC_SEL_S 28
252 #define SMAC_SEL_V(x) ((__u64)(x) << SMAC_SEL_S)
255 #define L2T_IDX_V(x) ((__u64)(x) << L2T_IDX_S)
257 #define WND_SCALE_S 50
258 #define WND_SCALE_V(x) ((__u64)(x) << WND_SCALE_S)
260 #define KEEP_ALIVE_S 54
261 #define KEEP_ALIVE_V(x) ((__u64)(x) << KEEP_ALIVE_S)
262 #define KEEP_ALIVE_F KEEP_ALIVE_V(1ULL)
265 #define MSS_IDX_M 0xF
266 #define MSS_IDX_V(x) ((__u64)(x) << MSS_IDX_S)
267 #define MSS_IDX_G(x) (((x) >> MSS_IDX_S) & MSS_IDX_M)
269 /* option 2 fields */
270 #define RSS_QUEUE_S 0
271 #define RSS_QUEUE_M 0x3FF
272 #define RSS_QUEUE_V(x) ((x) << RSS_QUEUE_S)
273 #define RSS_QUEUE_G(x) (((x) >> RSS_QUEUE_S) & RSS_QUEUE_M)
275 #define RSS_QUEUE_VALID_S 10
276 #define RSS_QUEUE_VALID_V(x) ((x) << RSS_QUEUE_VALID_S)
277 #define RSS_QUEUE_VALID_F RSS_QUEUE_VALID_V(1U)
279 #define RX_FC_DISABLE_S 20
280 #define RX_FC_DISABLE_V(x) ((x) << RX_FC_DISABLE_S)
281 #define RX_FC_DISABLE_F RX_FC_DISABLE_V(1U)
283 #define RX_FC_VALID_S 22
284 #define RX_FC_VALID_V(x) ((x) << RX_FC_VALID_S)
285 #define RX_FC_VALID_F RX_FC_VALID_V(1U)
287 #define RX_CHANNEL_S 26
288 #define RX_CHANNEL_V(x) ((x) << RX_CHANNEL_S)
289 #define RX_CHANNEL_F RX_CHANNEL_V(1U)
291 #define WND_SCALE_EN_S 28
292 #define WND_SCALE_EN_V(x) ((x) << WND_SCALE_EN_S)
293 #define WND_SCALE_EN_F WND_SCALE_EN_V(1U)
295 #define T5_OPT_2_VALID_S 31
296 #define T5_OPT_2_VALID_V(x) ((x) << T5_OPT_2_VALID_S)
297 #define T5_OPT_2_VALID_F T5_OPT_2_VALID_V(1U)
299 struct cpl_pass_open_req {
310 /* option 0 fields */
312 #define NO_CONG_V(x) ((x) << NO_CONG_S)
313 #define NO_CONG_F NO_CONG_V(1U)
316 #define DELACK_V(x) ((x) << DELACK_S)
317 #define DELACK_F DELACK_V(1U)
319 #define NON_OFFLOAD_S 7
320 #define NON_OFFLOAD_V(x) ((x) << NON_OFFLOAD_S)
321 #define NON_OFFLOAD_F NON_OFFLOAD_V(1U)
325 #define DSCP_V(x) ((x) << DSCP_S)
326 #define DSCP_G(x) (((x) >> DSCP_S) & DSCP_M)
328 #define TCAM_BYPASS_S 48
329 #define TCAM_BYPASS_V(x) ((__u64)(x) << TCAM_BYPASS_S)
330 #define TCAM_BYPASS_F TCAM_BYPASS_V(1ULL)
333 #define NAGLE_V(x) ((__u64)(x) << NAGLE_S)
334 #define NAGLE_F NAGLE_V(1ULL)
336 /* option 1 fields */
337 #define SYN_RSS_ENABLE_S 0
338 #define SYN_RSS_ENABLE_V(x) ((x) << SYN_RSS_ENABLE_S)
339 #define SYN_RSS_ENABLE_F SYN_RSS_ENABLE_V(1U)
341 #define SYN_RSS_QUEUE_S 2
342 #define SYN_RSS_QUEUE_V(x) ((x) << SYN_RSS_QUEUE_S)
344 #define CONN_POLICY_S 22
345 #define CONN_POLICY_V(x) ((x) << CONN_POLICY_S)
347 struct cpl_pass_open_req6 {
360 struct cpl_pass_open_rpl {
369 #if defined(__LITTLE_ENDIAN_BITFIELD)
384 struct cpl_pass_accept_req {
392 struct tcp_options tcpopt;
395 /* cpl_pass_accept_req.hdr_len fields */
396 #define SYN_RX_CHAN_S 0
397 #define SYN_RX_CHAN_M 0xF
398 #define SYN_RX_CHAN_V(x) ((x) << SYN_RX_CHAN_S)
399 #define SYN_RX_CHAN_G(x) (((x) >> SYN_RX_CHAN_S) & SYN_RX_CHAN_M)
401 #define TCP_HDR_LEN_S 10
402 #define TCP_HDR_LEN_M 0x3F
403 #define TCP_HDR_LEN_V(x) ((x) << TCP_HDR_LEN_S)
404 #define TCP_HDR_LEN_G(x) (((x) >> TCP_HDR_LEN_S) & TCP_HDR_LEN_M)
406 #define IP_HDR_LEN_S 16
407 #define IP_HDR_LEN_M 0x3FF
408 #define IP_HDR_LEN_V(x) ((x) << IP_HDR_LEN_S)
409 #define IP_HDR_LEN_G(x) (((x) >> IP_HDR_LEN_S) & IP_HDR_LEN_M)
411 #define ETH_HDR_LEN_S 26
412 #define ETH_HDR_LEN_M 0x1F
413 #define ETH_HDR_LEN_V(x) ((x) << ETH_HDR_LEN_S)
414 #define ETH_HDR_LEN_G(x) (((x) >> ETH_HDR_LEN_S) & ETH_HDR_LEN_M)
416 /* cpl_pass_accept_req.l2info fields */
417 #define SYN_MAC_IDX_S 0
418 #define SYN_MAC_IDX_M 0x1FF
419 #define SYN_MAC_IDX_V(x) ((x) << SYN_MAC_IDX_S)
420 #define SYN_MAC_IDX_G(x) (((x) >> SYN_MAC_IDX_S) & SYN_MAC_IDX_M)
422 #define SYN_XACT_MATCH_S 9
423 #define SYN_XACT_MATCH_V(x) ((x) << SYN_XACT_MATCH_S)
424 #define SYN_XACT_MATCH_F SYN_XACT_MATCH_V(1U)
426 #define SYN_INTF_S 12
427 #define SYN_INTF_M 0xF
428 #define SYN_INTF_V(x) ((x) << SYN_INTF_S)
429 #define SYN_INTF_G(x) (((x) >> SYN_INTF_S) & SYN_INTF_M)
431 enum { /* TCP congestion control algorithms */
438 #define CONG_CNTRL_S 14
439 #define CONG_CNTRL_M 0x3
440 #define CONG_CNTRL_V(x) ((x) << CONG_CNTRL_S)
441 #define CONG_CNTRL_G(x) (((x) >> CONG_CNTRL_S) & CONG_CNTRL_M)
444 #define T5_ISS_V(x) ((x) << T5_ISS_S)
445 #define T5_ISS_F T5_ISS_V(1U)
447 struct cpl_pass_accept_rpl {
454 /* option 2 fields */
455 #define RX_COALESCE_VALID_S 11
456 #define RX_COALESCE_VALID_V(x) ((x) << RX_COALESCE_VALID_S)
457 #define RX_COALESCE_VALID_F RX_COALESCE_VALID_V(1U)
459 #define RX_COALESCE_S 12
460 #define RX_COALESCE_V(x) ((x) << RX_COALESCE_S)
463 #define PACE_V(x) ((x) << PACE_S)
465 #define TX_QUEUE_S 23
466 #define TX_QUEUE_M 0x7
467 #define TX_QUEUE_V(x) ((x) << TX_QUEUE_S)
468 #define TX_QUEUE_G(x) (((x) >> TX_QUEUE_S) & TX_QUEUE_M)
470 #define CCTRL_ECN_S 27
471 #define CCTRL_ECN_V(x) ((x) << CCTRL_ECN_S)
472 #define CCTRL_ECN_F CCTRL_ECN_V(1U)
474 #define TSTAMPS_EN_S 29
475 #define TSTAMPS_EN_V(x) ((x) << TSTAMPS_EN_S)
476 #define TSTAMPS_EN_F TSTAMPS_EN_V(1U)
479 #define SACK_EN_V(x) ((x) << SACK_EN_S)
480 #define SACK_EN_F SACK_EN_V(1U)
482 struct cpl_t5_pass_accept_rpl {
491 struct cpl_act_open_req {
503 #define FILTER_TUPLE_S 24
504 #define FILTER_TUPLE_M 0xFFFFFFFFFF
505 #define FILTER_TUPLE_V(x) ((x) << FILTER_TUPLE_S)
506 #define FILTER_TUPLE_G(x) (((x) >> FILTER_TUPLE_S) & FILTER_TUPLE_M)
507 struct cpl_t5_act_open_req {
520 struct cpl_t6_act_open_req {
535 struct cpl_act_open_req6 {
549 struct cpl_t5_act_open_req6 {
564 struct cpl_t6_act_open_req6 {
581 struct cpl_act_open_rpl {
586 /* cpl_act_open_rpl.atid_status fields */
587 #define AOPEN_STATUS_S 0
588 #define AOPEN_STATUS_M 0xFF
589 #define AOPEN_STATUS_G(x) (((x) >> AOPEN_STATUS_S) & AOPEN_STATUS_M)
591 #define AOPEN_ATID_S 8
592 #define AOPEN_ATID_M 0xFFFFFF
593 #define AOPEN_ATID_G(x) (((x) >> AOPEN_ATID_S) & AOPEN_ATID_M)
595 struct cpl_pass_establish {
605 /* cpl_pass_establish.tos_stid fields */
606 #define PASS_OPEN_TID_S 0
607 #define PASS_OPEN_TID_M 0xFFFFFF
608 #define PASS_OPEN_TID_V(x) ((x) << PASS_OPEN_TID_S)
609 #define PASS_OPEN_TID_G(x) (((x) >> PASS_OPEN_TID_S) & PASS_OPEN_TID_M)
611 #define PASS_OPEN_TOS_S 24
612 #define PASS_OPEN_TOS_M 0xFF
613 #define PASS_OPEN_TOS_V(x) ((x) << PASS_OPEN_TOS_S)
614 #define PASS_OPEN_TOS_G(x) (((x) >> PASS_OPEN_TOS_S) & PASS_OPEN_TOS_M)
616 /* cpl_pass_establish.tcp_opt fields (also applies to act_open_establish) */
617 #define TCPOPT_WSCALE_OK_S 5
618 #define TCPOPT_WSCALE_OK_M 0x1
619 #define TCPOPT_WSCALE_OK_G(x) \
620 (((x) >> TCPOPT_WSCALE_OK_S) & TCPOPT_WSCALE_OK_M)
622 #define TCPOPT_SACK_S 6
623 #define TCPOPT_SACK_M 0x1
624 #define TCPOPT_SACK_G(x) (((x) >> TCPOPT_SACK_S) & TCPOPT_SACK_M)
626 #define TCPOPT_TSTAMP_S 7
627 #define TCPOPT_TSTAMP_M 0x1
628 #define TCPOPT_TSTAMP_G(x) (((x) >> TCPOPT_TSTAMP_S) & TCPOPT_TSTAMP_M)
630 #define TCPOPT_SND_WSCALE_S 8
631 #define TCPOPT_SND_WSCALE_M 0xF
632 #define TCPOPT_SND_WSCALE_G(x) \
633 (((x) >> TCPOPT_SND_WSCALE_S) & TCPOPT_SND_WSCALE_M)
635 #define TCPOPT_MSS_S 12
636 #define TCPOPT_MSS_M 0xF
637 #define TCPOPT_MSS_G(x) (((x) >> TCPOPT_MSS_S) & TCPOPT_MSS_M)
639 #define T6_TCP_HDR_LEN_S 8
640 #define T6_TCP_HDR_LEN_V(x) ((x) << T6_TCP_HDR_LEN_S)
641 #define T6_TCP_HDR_LEN_G(x) (((x) >> T6_TCP_HDR_LEN_S) & TCP_HDR_LEN_M)
643 #define T6_IP_HDR_LEN_S 14
644 #define T6_IP_HDR_LEN_V(x) ((x) << T6_IP_HDR_LEN_S)
645 #define T6_IP_HDR_LEN_G(x) (((x) >> T6_IP_HDR_LEN_S) & IP_HDR_LEN_M)
647 #define T6_ETH_HDR_LEN_S 24
648 #define T6_ETH_HDR_LEN_M 0xFF
649 #define T6_ETH_HDR_LEN_V(x) ((x) << T6_ETH_HDR_LEN_S)
650 #define T6_ETH_HDR_LEN_G(x) (((x) >> T6_ETH_HDR_LEN_S) & T6_ETH_HDR_LEN_M)
652 struct cpl_act_establish {
669 /* cpl_get_tcb.reply_ctrl fields */
671 #define QUEUENO_V(x) ((x) << QUEUENO_S)
673 #define REPLY_CHAN_S 14
674 #define REPLY_CHAN_V(x) ((x) << REPLY_CHAN_S)
675 #define REPLY_CHAN_F REPLY_CHAN_V(1U)
677 #define NO_REPLY_S 15
678 #define NO_REPLY_V(x) ((x) << NO_REPLY_S)
679 #define NO_REPLY_F NO_REPLY_V(1U)
681 struct cpl_set_tcb_field {
690 /* cpl_set_tcb_field.word_cookie fields */
692 #define TCB_WORD_V(x) ((x) << TCB_WORD_S)
694 #define TCB_COOKIE_S 5
695 #define TCB_COOKIE_M 0x7
696 #define TCB_COOKIE_V(x) ((x) << TCB_COOKIE_S)
697 #define TCB_COOKIE_G(x) (((x) >> TCB_COOKIE_S) & TCB_COOKIE_M)
699 struct cpl_set_tcb_rpl {
707 struct cpl_close_con_req {
713 struct cpl_close_con_rpl {
721 struct cpl_close_listsvr_req {
728 /* additional cpl_close_listsvr_req.reply_ctrl field */
729 #define LISTSVR_IPV6_S 14
730 #define LISTSVR_IPV6_V(x) ((x) << LISTSVR_IPV6_S)
731 #define LISTSVR_IPV6_F LISTSVR_IPV6_V(1U)
733 struct cpl_close_listsvr_rpl {
739 struct cpl_abort_req_rss {
745 struct cpl_abort_req {
754 struct cpl_abort_rpl_rss {
760 struct cpl_abort_rpl {
769 struct cpl_peer_close {
774 struct cpl_tid_release {
780 struct cpl_tx_pkt_core {
789 struct cpl_tx_pkt_core c;
792 #define cpl_tx_pkt_xt cpl_tx_pkt
794 /* cpl_tx_pkt_core.ctrl0 fields */
796 #define TXPKT_VF_V(x) ((x) << TXPKT_VF_S)
799 #define TXPKT_PF_V(x) ((x) << TXPKT_PF_S)
801 #define TXPKT_VF_VLD_S 11
802 #define TXPKT_VF_VLD_V(x) ((x) << TXPKT_VF_VLD_S)
803 #define TXPKT_VF_VLD_F TXPKT_VF_VLD_V(1U)
805 #define TXPKT_OVLAN_IDX_S 12
806 #define TXPKT_OVLAN_IDX_V(x) ((x) << TXPKT_OVLAN_IDX_S)
808 #define TXPKT_T5_OVLAN_IDX_S 12
809 #define TXPKT_T5_OVLAN_IDX_V(x) ((x) << TXPKT_T5_OVLAN_IDX_S)
811 #define TXPKT_INTF_S 16
812 #define TXPKT_INTF_V(x) ((x) << TXPKT_INTF_S)
814 #define TXPKT_INS_OVLAN_S 21
815 #define TXPKT_INS_OVLAN_V(x) ((x) << TXPKT_INS_OVLAN_S)
816 #define TXPKT_INS_OVLAN_F TXPKT_INS_OVLAN_V(1U)
818 #define TXPKT_TSTAMP_S 23
819 #define TXPKT_TSTAMP_V(x) ((x) << TXPKT_TSTAMP_S)
820 #define TXPKT_TSTAMP_F TXPKT_TSTAMP_V(1ULL)
822 #define TXPKT_OPCODE_S 24
823 #define TXPKT_OPCODE_V(x) ((x) << TXPKT_OPCODE_S)
825 /* cpl_tx_pkt_core.ctrl1 fields */
826 #define TXPKT_CSUM_END_S 12
827 #define TXPKT_CSUM_END_V(x) ((x) << TXPKT_CSUM_END_S)
829 #define TXPKT_CSUM_START_S 20
830 #define TXPKT_CSUM_START_V(x) ((x) << TXPKT_CSUM_START_S)
832 #define TXPKT_IPHDR_LEN_S 20
833 #define TXPKT_IPHDR_LEN_V(x) ((__u64)(x) << TXPKT_IPHDR_LEN_S)
835 #define TXPKT_CSUM_LOC_S 30
836 #define TXPKT_CSUM_LOC_V(x) ((__u64)(x) << TXPKT_CSUM_LOC_S)
838 #define TXPKT_ETHHDR_LEN_S 34
839 #define TXPKT_ETHHDR_LEN_V(x) ((__u64)(x) << TXPKT_ETHHDR_LEN_S)
841 #define T6_TXPKT_ETHHDR_LEN_S 32
842 #define T6_TXPKT_ETHHDR_LEN_V(x) ((__u64)(x) << T6_TXPKT_ETHHDR_LEN_S)
844 #define TXPKT_CSUM_TYPE_S 40
845 #define TXPKT_CSUM_TYPE_V(x) ((__u64)(x) << TXPKT_CSUM_TYPE_S)
847 #define TXPKT_VLAN_S 44
848 #define TXPKT_VLAN_V(x) ((__u64)(x) << TXPKT_VLAN_S)
850 #define TXPKT_VLAN_VLD_S 60
851 #define TXPKT_VLAN_VLD_V(x) ((__u64)(x) << TXPKT_VLAN_VLD_S)
852 #define TXPKT_VLAN_VLD_F TXPKT_VLAN_VLD_V(1ULL)
854 #define TXPKT_IPCSUM_DIS_S 62
855 #define TXPKT_IPCSUM_DIS_V(x) ((__u64)(x) << TXPKT_IPCSUM_DIS_S)
856 #define TXPKT_IPCSUM_DIS_F TXPKT_IPCSUM_DIS_V(1ULL)
858 #define TXPKT_L4CSUM_DIS_S 63
859 #define TXPKT_L4CSUM_DIS_V(x) ((__u64)(x) << TXPKT_L4CSUM_DIS_S)
860 #define TXPKT_L4CSUM_DIS_F TXPKT_L4CSUM_DIS_V(1ULL)
862 struct cpl_tx_pkt_lso_core {
868 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
871 /* cpl_tx_pkt_lso_core.lso_ctrl fields */
872 #define LSO_TCPHDR_LEN_S 0
873 #define LSO_TCPHDR_LEN_V(x) ((x) << LSO_TCPHDR_LEN_S)
875 #define LSO_IPHDR_LEN_S 4
876 #define LSO_IPHDR_LEN_V(x) ((x) << LSO_IPHDR_LEN_S)
878 #define LSO_ETHHDR_LEN_S 16
879 #define LSO_ETHHDR_LEN_V(x) ((x) << LSO_ETHHDR_LEN_S)
881 #define LSO_IPV6_S 20
882 #define LSO_IPV6_V(x) ((x) << LSO_IPV6_S)
883 #define LSO_IPV6_F LSO_IPV6_V(1U)
885 #define LSO_LAST_SLICE_S 22
886 #define LSO_LAST_SLICE_V(x) ((x) << LSO_LAST_SLICE_S)
887 #define LSO_LAST_SLICE_F LSO_LAST_SLICE_V(1U)
889 #define LSO_FIRST_SLICE_S 23
890 #define LSO_FIRST_SLICE_V(x) ((x) << LSO_FIRST_SLICE_S)
891 #define LSO_FIRST_SLICE_F LSO_FIRST_SLICE_V(1U)
893 #define LSO_OPCODE_S 24
894 #define LSO_OPCODE_V(x) ((x) << LSO_OPCODE_S)
896 #define LSO_T5_XFER_SIZE_S 0
897 #define LSO_T5_XFER_SIZE_V(x) ((x) << LSO_T5_XFER_SIZE_S)
899 struct cpl_tx_pkt_lso {
901 struct cpl_tx_pkt_lso_core c;
902 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
905 struct cpl_iscsi_hdr {
915 /* cpl_iscsi_hdr.pdu_len_ddp fields */
916 #define ISCSI_PDU_LEN_S 0
917 #define ISCSI_PDU_LEN_M 0x7FFF
918 #define ISCSI_PDU_LEN_V(x) ((x) << ISCSI_PDU_LEN_S)
919 #define ISCSI_PDU_LEN_G(x) (((x) >> ISCSI_PDU_LEN_S) & ISCSI_PDU_LEN_M)
921 #define ISCSI_DDP_S 15
922 #define ISCSI_DDP_V(x) ((x) << ISCSI_DDP_S)
923 #define ISCSI_DDP_F ISCSI_DDP_V(1U)
925 struct cpl_rx_data_ddp {
938 #define cpl_rx_iscsi_ddp cpl_rx_data_ddp
940 struct cpl_iscsi_data {
950 struct cpl_rx_iscsi_cmp {
962 struct cpl_tx_data_iso {
969 __be32 reserved2_seglen_offset;
970 __be32 datasn_offset;
971 __be32 buffer_offset;
974 /* encapsulated CPL_TX_DATA follows here */
977 /* cpl_tx_data_iso.op_to_scsi fields */
978 #define CPL_TX_DATA_ISO_OP_S 24
979 #define CPL_TX_DATA_ISO_OP_M 0xff
980 #define CPL_TX_DATA_ISO_OP_V(x) ((x) << CPL_TX_DATA_ISO_OP_S)
981 #define CPL_TX_DATA_ISO_OP_G(x) \
982 (((x) >> CPL_TX_DATA_ISO_OP_S) & CPL_TX_DATA_ISO_OP_M)
984 #define CPL_TX_DATA_ISO_FIRST_S 23
985 #define CPL_TX_DATA_ISO_FIRST_M 0x1
986 #define CPL_TX_DATA_ISO_FIRST_V(x) ((x) << CPL_TX_DATA_ISO_FIRST_S)
987 #define CPL_TX_DATA_ISO_FIRST_G(x) \
988 (((x) >> CPL_TX_DATA_ISO_FIRST_S) & CPL_TX_DATA_ISO_FIRST_M)
989 #define CPL_TX_DATA_ISO_FIRST_F CPL_TX_DATA_ISO_FIRST_V(1U)
991 #define CPL_TX_DATA_ISO_LAST_S 22
992 #define CPL_TX_DATA_ISO_LAST_M 0x1
993 #define CPL_TX_DATA_ISO_LAST_V(x) ((x) << CPL_TX_DATA_ISO_LAST_S)
994 #define CPL_TX_DATA_ISO_LAST_G(x) \
995 (((x) >> CPL_TX_DATA_ISO_LAST_S) & CPL_TX_DATA_ISO_LAST_M)
996 #define CPL_TX_DATA_ISO_LAST_F CPL_TX_DATA_ISO_LAST_V(1U)
998 #define CPL_TX_DATA_ISO_CPLHDRLEN_S 21
999 #define CPL_TX_DATA_ISO_CPLHDRLEN_M 0x1
1000 #define CPL_TX_DATA_ISO_CPLHDRLEN_V(x) ((x) << CPL_TX_DATA_ISO_CPLHDRLEN_S)
1001 #define CPL_TX_DATA_ISO_CPLHDRLEN_G(x) \
1002 (((x) >> CPL_TX_DATA_ISO_CPLHDRLEN_S) & CPL_TX_DATA_ISO_CPLHDRLEN_M)
1003 #define CPL_TX_DATA_ISO_CPLHDRLEN_F CPL_TX_DATA_ISO_CPLHDRLEN_V(1U)
1005 #define CPL_TX_DATA_ISO_HDRCRC_S 20
1006 #define CPL_TX_DATA_ISO_HDRCRC_M 0x1
1007 #define CPL_TX_DATA_ISO_HDRCRC_V(x) ((x) << CPL_TX_DATA_ISO_HDRCRC_S)
1008 #define CPL_TX_DATA_ISO_HDRCRC_G(x) \
1009 (((x) >> CPL_TX_DATA_ISO_HDRCRC_S) & CPL_TX_DATA_ISO_HDRCRC_M)
1010 #define CPL_TX_DATA_ISO_HDRCRC_F CPL_TX_DATA_ISO_HDRCRC_V(1U)
1012 #define CPL_TX_DATA_ISO_PLDCRC_S 19
1013 #define CPL_TX_DATA_ISO_PLDCRC_M 0x1
1014 #define CPL_TX_DATA_ISO_PLDCRC_V(x) ((x) << CPL_TX_DATA_ISO_PLDCRC_S)
1015 #define CPL_TX_DATA_ISO_PLDCRC_G(x) \
1016 (((x) >> CPL_TX_DATA_ISO_PLDCRC_S) & CPL_TX_DATA_ISO_PLDCRC_M)
1017 #define CPL_TX_DATA_ISO_PLDCRC_F CPL_TX_DATA_ISO_PLDCRC_V(1U)
1019 #define CPL_TX_DATA_ISO_IMMEDIATE_S 18
1020 #define CPL_TX_DATA_ISO_IMMEDIATE_M 0x1
1021 #define CPL_TX_DATA_ISO_IMMEDIATE_V(x) ((x) << CPL_TX_DATA_ISO_IMMEDIATE_S)
1022 #define CPL_TX_DATA_ISO_IMMEDIATE_G(x) \
1023 (((x) >> CPL_TX_DATA_ISO_IMMEDIATE_S) & CPL_TX_DATA_ISO_IMMEDIATE_M)
1024 #define CPL_TX_DATA_ISO_IMMEDIATE_F CPL_TX_DATA_ISO_IMMEDIATE_V(1U)
1026 #define CPL_TX_DATA_ISO_SCSI_S 16
1027 #define CPL_TX_DATA_ISO_SCSI_M 0x3
1028 #define CPL_TX_DATA_ISO_SCSI_V(x) ((x) << CPL_TX_DATA_ISO_SCSI_S)
1029 #define CPL_TX_DATA_ISO_SCSI_G(x) \
1030 (((x) >> CPL_TX_DATA_ISO_SCSI_S) & CPL_TX_DATA_ISO_SCSI_M)
1032 /* cpl_tx_data_iso.reserved2_seglen_offset fields */
1033 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_S 0
1034 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_M 0xffffff
1035 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_V(x) \
1036 ((x) << CPL_TX_DATA_ISO_SEGLEN_OFFSET_S)
1037 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_G(x) \
1038 (((x) >> CPL_TX_DATA_ISO_SEGLEN_OFFSET_S) & \
1039 CPL_TX_DATA_ISO_SEGLEN_OFFSET_M)
1041 struct cpl_rx_data {
1042 union opcode_tid ot;
1047 #if defined(__LITTLE_ENDIAN_BITFIELD)
1063 struct cpl_rx_data_ack {
1065 union opcode_tid ot;
1069 /* cpl_rx_data_ack.ack_seq fields */
1070 #define RX_CREDITS_S 0
1071 #define RX_CREDITS_V(x) ((x) << RX_CREDITS_S)
1073 #define RX_FORCE_ACK_S 28
1074 #define RX_FORCE_ACK_V(x) ((x) << RX_FORCE_ACK_S)
1075 #define RX_FORCE_ACK_F RX_FORCE_ACK_V(1U)
1077 #define RX_DACK_MODE_S 29
1078 #define RX_DACK_MODE_M 0x3
1079 #define RX_DACK_MODE_V(x) ((x) << RX_DACK_MODE_S)
1080 #define RX_DACK_MODE_G(x) (((x) >> RX_DACK_MODE_S) & RX_DACK_MODE_M)
1082 #define RX_DACK_CHANGE_S 31
1083 #define RX_DACK_CHANGE_V(x) ((x) << RX_DACK_CHANGE_S)
1084 #define RX_DACK_CHANGE_F RX_DACK_CHANGE_V(1U)
1087 struct rss_header rsshdr;
1089 #if defined(__LITTLE_ENDIAN_BITFIELD)
1110 #define RX_T6_ETHHDR_LEN_M 0xFF
1111 #define RX_T6_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_T6_ETHHDR_LEN_M)
1113 #define RXF_PSH_S 20
1114 #define RXF_PSH_V(x) ((x) << RXF_PSH_S)
1115 #define RXF_PSH_F RXF_PSH_V(1U)
1117 #define RXF_SYN_S 21
1118 #define RXF_SYN_V(x) ((x) << RXF_SYN_S)
1119 #define RXF_SYN_F RXF_SYN_V(1U)
1121 #define RXF_UDP_S 22
1122 #define RXF_UDP_V(x) ((x) << RXF_UDP_S)
1123 #define RXF_UDP_F RXF_UDP_V(1U)
1125 #define RXF_TCP_S 23
1126 #define RXF_TCP_V(x) ((x) << RXF_TCP_S)
1127 #define RXF_TCP_F RXF_TCP_V(1U)
1130 #define RXF_IP_V(x) ((x) << RXF_IP_S)
1131 #define RXF_IP_F RXF_IP_V(1U)
1133 #define RXF_IP6_S 25
1134 #define RXF_IP6_V(x) ((x) << RXF_IP6_S)
1135 #define RXF_IP6_F RXF_IP6_V(1U)
1137 #define RXF_SYN_COOKIE_S 26
1138 #define RXF_SYN_COOKIE_V(x) ((x) << RXF_SYN_COOKIE_S)
1139 #define RXF_SYN_COOKIE_F RXF_SYN_COOKIE_V(1U)
1141 #define RXF_FCOE_S 26
1142 #define RXF_FCOE_V(x) ((x) << RXF_FCOE_S)
1143 #define RXF_FCOE_F RXF_FCOE_V(1U)
1145 #define RXF_LRO_S 27
1146 #define RXF_LRO_V(x) ((x) << RXF_LRO_S)
1147 #define RXF_LRO_F RXF_LRO_V(1U)
1149 /* rx_pkt.l2info fields */
1150 #define RX_ETHHDR_LEN_S 0
1151 #define RX_ETHHDR_LEN_M 0x1F
1152 #define RX_ETHHDR_LEN_V(x) ((x) << RX_ETHHDR_LEN_S)
1153 #define RX_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_ETHHDR_LEN_M)
1155 #define RX_T5_ETHHDR_LEN_S 0
1156 #define RX_T5_ETHHDR_LEN_M 0x3F
1157 #define RX_T5_ETHHDR_LEN_V(x) ((x) << RX_T5_ETHHDR_LEN_S)
1158 #define RX_T5_ETHHDR_LEN_G(x) (((x) >> RX_T5_ETHHDR_LEN_S) & RX_T5_ETHHDR_LEN_M)
1160 #define RX_MACIDX_S 8
1161 #define RX_MACIDX_M 0x1FF
1162 #define RX_MACIDX_V(x) ((x) << RX_MACIDX_S)
1163 #define RX_MACIDX_G(x) (((x) >> RX_MACIDX_S) & RX_MACIDX_M)
1165 #define RXF_SYN_S 21
1166 #define RXF_SYN_V(x) ((x) << RXF_SYN_S)
1167 #define RXF_SYN_F RXF_SYN_V(1U)
1169 #define RX_CHAN_S 28
1170 #define RX_CHAN_M 0xF
1171 #define RX_CHAN_V(x) ((x) << RX_CHAN_S)
1172 #define RX_CHAN_G(x) (((x) >> RX_CHAN_S) & RX_CHAN_M)
1174 /* rx_pkt.hdr_len fields */
1175 #define RX_TCPHDR_LEN_S 0
1176 #define RX_TCPHDR_LEN_M 0x3F
1177 #define RX_TCPHDR_LEN_V(x) ((x) << RX_TCPHDR_LEN_S)
1178 #define RX_TCPHDR_LEN_G(x) (((x) >> RX_TCPHDR_LEN_S) & RX_TCPHDR_LEN_M)
1180 #define RX_IPHDR_LEN_S 6
1181 #define RX_IPHDR_LEN_M 0x3FF
1182 #define RX_IPHDR_LEN_V(x) ((x) << RX_IPHDR_LEN_S)
1183 #define RX_IPHDR_LEN_G(x) (((x) >> RX_IPHDR_LEN_S) & RX_IPHDR_LEN_M)
1185 /* rx_pkt.err_vec fields */
1186 #define RXERR_CSUM_S 13
1187 #define RXERR_CSUM_V(x) ((x) << RXERR_CSUM_S)
1188 #define RXERR_CSUM_F RXERR_CSUM_V(1U)
1190 #define T6_COMPR_RXERR_LEN_S 1
1191 #define T6_COMPR_RXERR_LEN_V(x) ((x) << T6_COMPR_RXERR_LEN_S)
1192 #define T6_COMPR_RXERR_LEN_F T6_COMPR_RXERR_LEN_V(1U)
1194 #define T6_COMPR_RXERR_VEC_S 0
1195 #define T6_COMPR_RXERR_VEC_M 0x3F
1196 #define T6_COMPR_RXERR_VEC_V(x) ((x) << T6_COMPR_RXERR_LEN_S)
1197 #define T6_COMPR_RXERR_VEC_G(x) \
1198 (((x) >> T6_COMPR_RXERR_VEC_S) & T6_COMPR_RXERR_VEC_M)
1200 /* Logical OR of RX_ERROR_CSUM, RX_ERROR_CSIP */
1201 #define T6_COMPR_RXERR_SUM_S 4
1202 #define T6_COMPR_RXERR_SUM_V(x) ((x) << T6_COMPR_RXERR_SUM_S)
1203 #define T6_COMPR_RXERR_SUM_F T6_COMPR_RXERR_SUM_V(1U)
1205 struct cpl_trace_pkt {
1208 #if defined(__LITTLE_ENDIAN_BITFIELD)
1226 struct cpl_t5_trace_pkt {
1229 #if defined(__LITTLE_ENDIAN_BITFIELD)
1248 struct cpl_l2t_write_req {
1250 union opcode_tid ot;
1257 /* cpl_l2t_write_req.params fields */
1258 #define L2T_W_INFO_S 2
1259 #define L2T_W_INFO_V(x) ((x) << L2T_W_INFO_S)
1261 #define L2T_W_PORT_S 8
1262 #define L2T_W_PORT_V(x) ((x) << L2T_W_PORT_S)
1264 #define L2T_W_NOREPLY_S 15
1265 #define L2T_W_NOREPLY_V(x) ((x) << L2T_W_NOREPLY_S)
1266 #define L2T_W_NOREPLY_F L2T_W_NOREPLY_V(1U)
1268 #define CPL_L2T_VLAN_NONE 0xfff
1270 struct cpl_l2t_write_rpl {
1271 union opcode_tid ot;
1276 struct cpl_smt_write_req {
1278 union opcode_tid ot;
1286 struct cpl_t6_smt_write_req {
1288 union opcode_tid ot;
1297 struct cpl_smt_write_rpl {
1298 union opcode_tid ot;
1303 /* cpl_smt_{read,write}_req.params fields */
1304 #define SMTW_OVLAN_IDX_S 16
1305 #define SMTW_OVLAN_IDX_V(x) ((x) << SMTW_OVLAN_IDX_S)
1307 #define SMTW_IDX_S 20
1308 #define SMTW_IDX_V(x) ((x) << SMTW_IDX_S)
1310 #define SMTW_NORPL_S 31
1311 #define SMTW_NORPL_V(x) ((x) << SMTW_NORPL_S)
1312 #define SMTW_NORPL_F SMTW_NORPL_V(1U)
1314 struct cpl_rdma_terminate {
1315 union opcode_tid ot;
1320 struct cpl_sge_egr_update {
1326 /* cpl_sge_egr_update.ot fields */
1328 #define EGR_QID_M 0x1FFFF
1329 #define EGR_QID_G(x) (((x) >> EGR_QID_S) & EGR_QID_M)
1331 /* cpl_fw*.type values */
1333 FW_TYPE_CMD_RPL = 0,
1336 FW_TYPE_OFLD_CONNECTION_WR_RPL = 3,
1340 struct cpl_fw4_pld {
1350 struct cpl_fw6_pld {
1357 struct cpl_fw4_msg {
1365 struct cpl_fw4_ack {
1366 union opcode_tid ot;
1376 CPL_FW4_ACK_FLAGS_SEQVAL = 0x1, /* seqn valid */
1377 CPL_FW4_ACK_FLAGS_CH = 0x2, /* channel change complete */
1378 CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */
1381 struct cpl_fw6_msg {
1389 /* cpl_fw6_msg.type values */
1391 FW6_TYPE_CMD_RPL = 0,
1392 FW6_TYPE_WR_RPL = 1,
1394 FW6_TYPE_OFLD_CONNECTION_WR_RPL = 3,
1395 FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL,
1398 struct cpl_fw6_msg_ofld_connection_wr_rpl {
1400 __be32 tid; /* or atid in case of active failure */
1406 struct cpl_tx_data {
1407 union opcode_tid ot;
1413 /* cpl_tx_data.flags field */
1414 #define TX_FORCE_S 13
1415 #define TX_FORCE_V(x) ((x) << TX_FORCE_S)
1417 #define T6_TX_FORCE_S 20
1418 #define T6_TX_FORCE_V(x) ((x) << T6_TX_FORCE_S)
1419 #define T6_TX_FORCE_F T6_TX_FORCE_V(1U)
1422 ULP_TX_MEM_READ = 2,
1423 ULP_TX_MEM_WRITE = 3,
1428 ULP_TX_SC_NOOP = 0x80,
1429 ULP_TX_SC_IMM = 0x81,
1430 ULP_TX_SC_DSGL = 0x82,
1431 ULP_TX_SC_ISGL = 0x83
1434 #define ULPTX_CMD_S 24
1435 #define ULPTX_CMD_V(x) ((x) << ULPTX_CMD_S)
1437 struct ulptx_sge_pair {
1446 struct ulptx_sge_pair sge[0];
1449 struct ulptx_idata {
1459 #define ULPTX_CMD_S 24
1460 #define ULPTX_CMD_M 0xFF
1461 #define ULPTX_CMD_V(x) ((x) << ULPTX_CMD_S)
1463 #define ULPTX_NSGE_S 0
1464 #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S)
1466 #define ULPTX_MORE_S 23
1467 #define ULPTX_MORE_V(x) ((x) << ULPTX_MORE_S)
1468 #define ULPTX_MORE_F ULPTX_MORE_V(1U)
1470 #define ULP_TXPKT_DEST_S 16
1471 #define ULP_TXPKT_DEST_M 0x3
1472 #define ULP_TXPKT_DEST_V(x) ((x) << ULP_TXPKT_DEST_S)
1474 #define ULP_TXPKT_FID_S 4
1475 #define ULP_TXPKT_FID_M 0x7ff
1476 #define ULP_TXPKT_FID_V(x) ((x) << ULP_TXPKT_FID_S)
1478 #define ULP_TXPKT_RO_S 3
1479 #define ULP_TXPKT_RO_V(x) ((x) << ULP_TXPKT_RO_S)
1480 #define ULP_TXPKT_RO_F ULP_TXPKT_RO_V(1U)
1482 #define ULP_TX_SC_MORE_S 23
1483 #define ULP_TX_SC_MORE_V(x) ((x) << ULP_TX_SC_MORE_S)
1484 #define ULP_TX_SC_MORE_F ULP_TX_SC_MORE_V(1U)
1489 __be32 len16; /* command length */
1490 __be32 dlen; /* data length in 32-byte units */
1494 #define ULP_MEMIO_LOCK_S 31
1495 #define ULP_MEMIO_LOCK_V(x) ((x) << ULP_MEMIO_LOCK_S)
1496 #define ULP_MEMIO_LOCK_F ULP_MEMIO_LOCK_V(1U)
1498 /* additional ulp_mem_io.cmd fields */
1499 #define ULP_MEMIO_ORDER_S 23
1500 #define ULP_MEMIO_ORDER_V(x) ((x) << ULP_MEMIO_ORDER_S)
1501 #define ULP_MEMIO_ORDER_F ULP_MEMIO_ORDER_V(1U)
1503 #define T5_ULP_MEMIO_IMM_S 23
1504 #define T5_ULP_MEMIO_IMM_V(x) ((x) << T5_ULP_MEMIO_IMM_S)
1505 #define T5_ULP_MEMIO_IMM_F T5_ULP_MEMIO_IMM_V(1U)
1507 #define T5_ULP_MEMIO_ORDER_S 22
1508 #define T5_ULP_MEMIO_ORDER_V(x) ((x) << T5_ULP_MEMIO_ORDER_S)
1509 #define T5_ULP_MEMIO_ORDER_F T5_ULP_MEMIO_ORDER_V(1U)
1511 #define T5_ULP_MEMIO_FID_S 4
1512 #define T5_ULP_MEMIO_FID_M 0x7ff
1513 #define T5_ULP_MEMIO_FID_V(x) ((x) << T5_ULP_MEMIO_FID_S)
1515 /* ulp_mem_io.lock_addr fields */
1516 #define ULP_MEMIO_ADDR_S 0
1517 #define ULP_MEMIO_ADDR_V(x) ((x) << ULP_MEMIO_ADDR_S)
1519 /* ulp_mem_io.dlen fields */
1520 #define ULP_MEMIO_DATA_LEN_S 0
1521 #define ULP_MEMIO_DATA_LEN_V(x) ((x) << ULP_MEMIO_DATA_LEN_S)
1523 #define ULPTX_NSGE_S 0
1524 #define ULPTX_NSGE_M 0xFFFF
1525 #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S)
1526 #define ULPTX_NSGE_G(x) (((x) >> ULPTX_NSGE_S) & ULPTX_NSGE_M)
1528 struct ulptx_sc_memrd {
1533 #define ULP_TXPKT_DATAMODIFY_S 23
1534 #define ULP_TXPKT_DATAMODIFY_M 0x1
1535 #define ULP_TXPKT_DATAMODIFY_V(x) ((x) << ULP_TXPKT_DATAMODIFY_S)
1536 #define ULP_TXPKT_DATAMODIFY_G(x) \
1537 (((x) >> ULP_TXPKT_DATAMODIFY_S) & ULP_TXPKT_DATAMODIFY__M)
1538 #define ULP_TXPKT_DATAMODIFY_F ULP_TXPKT_DATAMODIFY_V(1U)
1540 #define ULP_TXPKT_CHANNELID_S 22
1541 #define ULP_TXPKT_CHANNELID_M 0x1
1542 #define ULP_TXPKT_CHANNELID_V(x) ((x) << ULP_TXPKT_CHANNELID_S)
1543 #define ULP_TXPKT_CHANNELID_G(x) \
1544 (((x) >> ULP_TXPKT_CHANNELID_S) & ULP_TXPKT_CHANNELID_M)
1545 #define ULP_TXPKT_CHANNELID_F ULP_TXPKT_CHANNELID_V(1U)
1547 #define SCMD_SEQ_NO_CTRL_S 29
1548 #define SCMD_SEQ_NO_CTRL_M 0x3
1549 #define SCMD_SEQ_NO_CTRL_V(x) ((x) << SCMD_SEQ_NO_CTRL_S)
1550 #define SCMD_SEQ_NO_CTRL_G(x) \
1551 (((x) >> SCMD_SEQ_NO_CTRL_S) & SCMD_SEQ_NO_CTRL_M)
1553 /* StsFieldPrsnt- Status field at the end of the TLS PDU */
1554 #define SCMD_STATUS_PRESENT_S 28
1555 #define SCMD_STATUS_PRESENT_M 0x1
1556 #define SCMD_STATUS_PRESENT_V(x) ((x) << SCMD_STATUS_PRESENT_S)
1557 #define SCMD_STATUS_PRESENT_G(x) \
1558 (((x) >> SCMD_STATUS_PRESENT_S) & SCMD_STATUS_PRESENT_M)
1559 #define SCMD_STATUS_PRESENT_F SCMD_STATUS_PRESENT_V(1U)
1561 /* ProtoVersion - Protocol Version 0: 1.2, 1:1.1, 2:DTLS, 3:Generic,
1564 #define SCMD_PROTO_VERSION_S 24
1565 #define SCMD_PROTO_VERSION_M 0xf
1566 #define SCMD_PROTO_VERSION_V(x) ((x) << SCMD_PROTO_VERSION_S)
1567 #define SCMD_PROTO_VERSION_G(x) \
1568 (((x) >> SCMD_PROTO_VERSION_S) & SCMD_PROTO_VERSION_M)
1570 /* EncDecCtrl - Encryption/Decryption Control. 0: Encrypt, 1: Decrypt */
1571 #define SCMD_ENC_DEC_CTRL_S 23
1572 #define SCMD_ENC_DEC_CTRL_M 0x1
1573 #define SCMD_ENC_DEC_CTRL_V(x) ((x) << SCMD_ENC_DEC_CTRL_S)
1574 #define SCMD_ENC_DEC_CTRL_G(x) \
1575 (((x) >> SCMD_ENC_DEC_CTRL_S) & SCMD_ENC_DEC_CTRL_M)
1576 #define SCMD_ENC_DEC_CTRL_F SCMD_ENC_DEC_CTRL_V(1U)
1578 /* CipherAuthSeqCtrl - Cipher Authentication Sequence Control. */
1579 #define SCMD_CIPH_AUTH_SEQ_CTRL_S 22
1580 #define SCMD_CIPH_AUTH_SEQ_CTRL_M 0x1
1581 #define SCMD_CIPH_AUTH_SEQ_CTRL_V(x) \
1582 ((x) << SCMD_CIPH_AUTH_SEQ_CTRL_S)
1583 #define SCMD_CIPH_AUTH_SEQ_CTRL_G(x) \
1584 (((x) >> SCMD_CIPH_AUTH_SEQ_CTRL_S) & SCMD_CIPH_AUTH_SEQ_CTRL_M)
1585 #define SCMD_CIPH_AUTH_SEQ_CTRL_F SCMD_CIPH_AUTH_SEQ_CTRL_V(1U)
1587 /* CiphMode - Cipher Mode. 0: NOP, 1:AES-CBC, 2:AES-GCM, 3:AES-CTR,
1588 * 4:Generic-AES, 5-15: Reserved.
1590 #define SCMD_CIPH_MODE_S 18
1591 #define SCMD_CIPH_MODE_M 0xf
1592 #define SCMD_CIPH_MODE_V(x) ((x) << SCMD_CIPH_MODE_S)
1593 #define SCMD_CIPH_MODE_G(x) \
1594 (((x) >> SCMD_CIPH_MODE_S) & SCMD_CIPH_MODE_M)
1596 /* AuthMode - Auth Mode. 0: NOP, 1:SHA1, 2:SHA2-224, 3:SHA2-256
1599 #define SCMD_AUTH_MODE_S 14
1600 #define SCMD_AUTH_MODE_M 0xf
1601 #define SCMD_AUTH_MODE_V(x) ((x) << SCMD_AUTH_MODE_S)
1602 #define SCMD_AUTH_MODE_G(x) \
1603 (((x) >> SCMD_AUTH_MODE_S) & SCMD_AUTH_MODE_M)
1605 /* HmacCtrl - HMAC Control. 0:NOP, 1:No truncation, 2:Support HMAC Truncation
1606 * per RFC 4366, 3:IPSec 96 bits, 4-7:Reserved
1608 #define SCMD_HMAC_CTRL_S 11
1609 #define SCMD_HMAC_CTRL_M 0x7
1610 #define SCMD_HMAC_CTRL_V(x) ((x) << SCMD_HMAC_CTRL_S)
1611 #define SCMD_HMAC_CTRL_G(x) \
1612 (((x) >> SCMD_HMAC_CTRL_S) & SCMD_HMAC_CTRL_M)
1614 /* IvSize - IV size in units of 2 bytes */
1615 #define SCMD_IV_SIZE_S 7
1616 #define SCMD_IV_SIZE_M 0xf
1617 #define SCMD_IV_SIZE_V(x) ((x) << SCMD_IV_SIZE_S)
1618 #define SCMD_IV_SIZE_G(x) \
1619 (((x) >> SCMD_IV_SIZE_S) & SCMD_IV_SIZE_M)
1621 /* NumIVs - Number of IVs */
1622 #define SCMD_NUM_IVS_S 0
1623 #define SCMD_NUM_IVS_M 0x7f
1624 #define SCMD_NUM_IVS_V(x) ((x) << SCMD_NUM_IVS_S)
1625 #define SCMD_NUM_IVS_G(x) \
1626 (((x) >> SCMD_NUM_IVS_S) & SCMD_NUM_IVS_M)
1628 /* EnbDbgId - If this is enabled upper 20 (63:44) bits if SeqNumber
1629 * (below) are used as Cid (connection id for debug status), these
1630 * bits are padded to zero for forming the 64 bit
1631 * sequence number for TLS
1633 #define SCMD_ENB_DBGID_S 31
1634 #define SCMD_ENB_DBGID_M 0x1
1635 #define SCMD_ENB_DBGID_V(x) ((x) << SCMD_ENB_DBGID_S)
1636 #define SCMD_ENB_DBGID_G(x) \
1637 (((x) >> SCMD_ENB_DBGID_S) & SCMD_ENB_DBGID_M)
1639 /* IV generation in SW. */
1640 #define SCMD_IV_GEN_CTRL_S 30
1641 #define SCMD_IV_GEN_CTRL_M 0x1
1642 #define SCMD_IV_GEN_CTRL_V(x) ((x) << SCMD_IV_GEN_CTRL_S)
1643 #define SCMD_IV_GEN_CTRL_G(x) \
1644 (((x) >> SCMD_IV_GEN_CTRL_S) & SCMD_IV_GEN_CTRL_M)
1645 #define SCMD_IV_GEN_CTRL_F SCMD_IV_GEN_CTRL_V(1U)
1648 #define SCMD_MORE_FRAGS_S 20
1649 #define SCMD_MORE_FRAGS_M 0x1
1650 #define SCMD_MORE_FRAGS_V(x) ((x) << SCMD_MORE_FRAGS_S)
1651 #define SCMD_MORE_FRAGS_G(x) (((x) >> SCMD_MORE_FRAGS_S) & SCMD_MORE_FRAGS_M)
1654 #define SCMD_LAST_FRAG_S 19
1655 #define SCMD_LAST_FRAG_M 0x1
1656 #define SCMD_LAST_FRAG_V(x) ((x) << SCMD_LAST_FRAG_S)
1657 #define SCMD_LAST_FRAG_G(x) (((x) >> SCMD_LAST_FRAG_S) & SCMD_LAST_FRAG_M)
1660 #define SCMD_TLS_COMPPDU_S 18
1661 #define SCMD_TLS_COMPPDU_M 0x1
1662 #define SCMD_TLS_COMPPDU_V(x) ((x) << SCMD_TLS_COMPPDU_S)
1663 #define SCMD_TLS_COMPPDU_G(x) (((x) >> SCMD_TLS_COMPPDU_S) & SCMD_TLS_COMPPDU_M)
1665 /* KeyCntxtInline - Key context inline after the scmd OR PayloadOnly*/
1666 #define SCMD_KEY_CTX_INLINE_S 17
1667 #define SCMD_KEY_CTX_INLINE_M 0x1
1668 #define SCMD_KEY_CTX_INLINE_V(x) ((x) << SCMD_KEY_CTX_INLINE_S)
1669 #define SCMD_KEY_CTX_INLINE_G(x) \
1670 (((x) >> SCMD_KEY_CTX_INLINE_S) & SCMD_KEY_CTX_INLINE_M)
1671 #define SCMD_KEY_CTX_INLINE_F SCMD_KEY_CTX_INLINE_V(1U)
1673 /* TLSFragEnable - 0: Host created TLS PDUs, 1: TLS Framgmentation in ASIC */
1674 #define SCMD_TLS_FRAG_ENABLE_S 16
1675 #define SCMD_TLS_FRAG_ENABLE_M 0x1
1676 #define SCMD_TLS_FRAG_ENABLE_V(x) ((x) << SCMD_TLS_FRAG_ENABLE_S)
1677 #define SCMD_TLS_FRAG_ENABLE_G(x) \
1678 (((x) >> SCMD_TLS_FRAG_ENABLE_S) & SCMD_TLS_FRAG_ENABLE_M)
1679 #define SCMD_TLS_FRAG_ENABLE_F SCMD_TLS_FRAG_ENABLE_V(1U)
1681 /* MacOnly - Only send the MAC and discard PDU. This is valid for hash only
1682 * modes, in this case TLS_TX will drop the PDU and only
1683 * send back the MAC bytes.
1685 #define SCMD_MAC_ONLY_S 15
1686 #define SCMD_MAC_ONLY_M 0x1
1687 #define SCMD_MAC_ONLY_V(x) ((x) << SCMD_MAC_ONLY_S)
1688 #define SCMD_MAC_ONLY_G(x) \
1689 (((x) >> SCMD_MAC_ONLY_S) & SCMD_MAC_ONLY_M)
1690 #define SCMD_MAC_ONLY_F SCMD_MAC_ONLY_V(1U)
1692 /* AadIVDrop - Drop the AAD and IV fields. Useful in protocols
1693 * which have complex AAD and IV formations Eg:AES-CCM
1695 #define SCMD_AADIVDROP_S 14
1696 #define SCMD_AADIVDROP_M 0x1
1697 #define SCMD_AADIVDROP_V(x) ((x) << SCMD_AADIVDROP_S)
1698 #define SCMD_AADIVDROP_G(x) \
1699 (((x) >> SCMD_AADIVDROP_S) & SCMD_AADIVDROP_M)
1700 #define SCMD_AADIVDROP_F SCMD_AADIVDROP_V(1U)
1702 /* HdrLength - Length of all headers excluding TLS header
1703 * present before start of crypto PDU/payload.
1705 #define SCMD_HDR_LEN_S 0
1706 #define SCMD_HDR_LEN_M 0x3fff
1707 #define SCMD_HDR_LEN_V(x) ((x) << SCMD_HDR_LEN_S)
1708 #define SCMD_HDR_LEN_G(x) \
1709 (((x) >> SCMD_HDR_LEN_S) & SCMD_HDR_LEN_M)
1711 struct cpl_tx_sec_pdu {
1712 __be32 op_ivinsrtofst;
1714 __be32 aadstart_cipherstop_hi;
1715 __be32 cipherstop_lo_authinsert;
1716 __be32 seqno_numivs;
1717 __be32 ivgen_hdrlen;
1721 #define CPL_TX_SEC_PDU_OPCODE_S 24
1722 #define CPL_TX_SEC_PDU_OPCODE_M 0xff
1723 #define CPL_TX_SEC_PDU_OPCODE_V(x) ((x) << CPL_TX_SEC_PDU_OPCODE_S)
1724 #define CPL_TX_SEC_PDU_OPCODE_G(x) \
1725 (((x) >> CPL_TX_SEC_PDU_OPCODE_S) & CPL_TX_SEC_PDU_OPCODE_M)
1728 #define CPL_TX_SEC_PDU_RXCHID_S 22
1729 #define CPL_TX_SEC_PDU_RXCHID_M 0x1
1730 #define CPL_TX_SEC_PDU_RXCHID_V(x) ((x) << CPL_TX_SEC_PDU_RXCHID_S)
1731 #define CPL_TX_SEC_PDU_RXCHID_G(x) \
1732 (((x) >> CPL_TX_SEC_PDU_RXCHID_S) & CPL_TX_SEC_PDU_RXCHID_M)
1733 #define CPL_TX_SEC_PDU_RXCHID_F CPL_TX_SEC_PDU_RXCHID_V(1U)
1736 #define CPL_TX_SEC_PDU_ACKFOLLOWS_S 21
1737 #define CPL_TX_SEC_PDU_ACKFOLLOWS_M 0x1
1738 #define CPL_TX_SEC_PDU_ACKFOLLOWS_V(x) ((x) << CPL_TX_SEC_PDU_ACKFOLLOWS_S)
1739 #define CPL_TX_SEC_PDU_ACKFOLLOWS_G(x) \
1740 (((x) >> CPL_TX_SEC_PDU_ACKFOLLOWS_S) & CPL_TX_SEC_PDU_ACKFOLLOWS_M)
1741 #define CPL_TX_SEC_PDU_ACKFOLLOWS_F CPL_TX_SEC_PDU_ACKFOLLOWS_V(1U)
1743 /* Loopback bit in cpl_tx_sec_pdu */
1744 #define CPL_TX_SEC_PDU_ULPTXLPBK_S 20
1745 #define CPL_TX_SEC_PDU_ULPTXLPBK_M 0x1
1746 #define CPL_TX_SEC_PDU_ULPTXLPBK_V(x) ((x) << CPL_TX_SEC_PDU_ULPTXLPBK_S)
1747 #define CPL_TX_SEC_PDU_ULPTXLPBK_G(x) \
1748 (((x) >> CPL_TX_SEC_PDU_ULPTXLPBK_S) & CPL_TX_SEC_PDU_ULPTXLPBK_M)
1749 #define CPL_TX_SEC_PDU_ULPTXLPBK_F CPL_TX_SEC_PDU_ULPTXLPBK_V(1U)
1751 /* Length of cpl header encapsulated */
1752 #define CPL_TX_SEC_PDU_CPLLEN_S 16
1753 #define CPL_TX_SEC_PDU_CPLLEN_M 0xf
1754 #define CPL_TX_SEC_PDU_CPLLEN_V(x) ((x) << CPL_TX_SEC_PDU_CPLLEN_S)
1755 #define CPL_TX_SEC_PDU_CPLLEN_G(x) \
1756 (((x) >> CPL_TX_SEC_PDU_CPLLEN_S) & CPL_TX_SEC_PDU_CPLLEN_M)
1759 #define CPL_TX_SEC_PDU_PLACEHOLDER_S 10
1760 #define CPL_TX_SEC_PDU_PLACEHOLDER_M 0x1
1761 #define CPL_TX_SEC_PDU_PLACEHOLDER_V(x) ((x) << CPL_TX_SEC_PDU_PLACEHOLDER_S)
1762 #define CPL_TX_SEC_PDU_PLACEHOLDER_G(x) \
1763 (((x) >> CPL_TX_SEC_PDU_PLACEHOLDER_S) & \
1764 CPL_TX_SEC_PDU_PLACEHOLDER_M)
1766 /* IvInsrtOffset: Insertion location for IV */
1767 #define CPL_TX_SEC_PDU_IVINSRTOFST_S 0
1768 #define CPL_TX_SEC_PDU_IVINSRTOFST_M 0x3ff
1769 #define CPL_TX_SEC_PDU_IVINSRTOFST_V(x) ((x) << CPL_TX_SEC_PDU_IVINSRTOFST_S)
1770 #define CPL_TX_SEC_PDU_IVINSRTOFST_G(x) \
1771 (((x) >> CPL_TX_SEC_PDU_IVINSRTOFST_S) & \
1772 CPL_TX_SEC_PDU_IVINSRTOFST_M)
1774 /* AadStartOffset: Offset in bytes for AAD start from
1775 * the first byte following the pkt headers (0-255 bytes)
1777 #define CPL_TX_SEC_PDU_AADSTART_S 24
1778 #define CPL_TX_SEC_PDU_AADSTART_M 0xff
1779 #define CPL_TX_SEC_PDU_AADSTART_V(x) ((x) << CPL_TX_SEC_PDU_AADSTART_S)
1780 #define CPL_TX_SEC_PDU_AADSTART_G(x) \
1781 (((x) >> CPL_TX_SEC_PDU_AADSTART_S) & \
1782 CPL_TX_SEC_PDU_AADSTART_M)
1784 /* AadStopOffset: offset in bytes for AAD stop/end from the first byte following
1785 * the pkt headers (0-511 bytes)
1787 #define CPL_TX_SEC_PDU_AADSTOP_S 15
1788 #define CPL_TX_SEC_PDU_AADSTOP_M 0x1ff
1789 #define CPL_TX_SEC_PDU_AADSTOP_V(x) ((x) << CPL_TX_SEC_PDU_AADSTOP_S)
1790 #define CPL_TX_SEC_PDU_AADSTOP_G(x) \
1791 (((x) >> CPL_TX_SEC_PDU_AADSTOP_S) & CPL_TX_SEC_PDU_AADSTOP_M)
1793 /* CipherStartOffset: offset in bytes for encryption/decryption start from the
1794 * first byte following the pkt headers (0-1023 bytes)
1796 #define CPL_TX_SEC_PDU_CIPHERSTART_S 5
1797 #define CPL_TX_SEC_PDU_CIPHERSTART_M 0x3ff
1798 #define CPL_TX_SEC_PDU_CIPHERSTART_V(x) ((x) << CPL_TX_SEC_PDU_CIPHERSTART_S)
1799 #define CPL_TX_SEC_PDU_CIPHERSTART_G(x) \
1800 (((x) >> CPL_TX_SEC_PDU_CIPHERSTART_S) & \
1801 CPL_TX_SEC_PDU_CIPHERSTART_M)
1803 /* CipherStopOffset: offset in bytes for encryption/decryption end
1804 * from end of the payload of this command (0-511 bytes)
1806 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_S 0
1807 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_M 0x1f
1808 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_V(x) \
1809 ((x) << CPL_TX_SEC_PDU_CIPHERSTOP_HI_S)
1810 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_G(x) \
1811 (((x) >> CPL_TX_SEC_PDU_CIPHERSTOP_HI_S) & \
1812 CPL_TX_SEC_PDU_CIPHERSTOP_HI_M)
1814 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_S 28
1815 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_M 0xf
1816 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_V(x) \
1817 ((x) << CPL_TX_SEC_PDU_CIPHERSTOP_LO_S)
1818 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_G(x) \
1819 (((x) >> CPL_TX_SEC_PDU_CIPHERSTOP_LO_S) & \
1820 CPL_TX_SEC_PDU_CIPHERSTOP_LO_M)
1822 /* AuthStartOffset: offset in bytes for authentication start from
1823 * the first byte following the pkt headers (0-1023)
1825 #define CPL_TX_SEC_PDU_AUTHSTART_S 18
1826 #define CPL_TX_SEC_PDU_AUTHSTART_M 0x3ff
1827 #define CPL_TX_SEC_PDU_AUTHSTART_V(x) ((x) << CPL_TX_SEC_PDU_AUTHSTART_S)
1828 #define CPL_TX_SEC_PDU_AUTHSTART_G(x) \
1829 (((x) >> CPL_TX_SEC_PDU_AUTHSTART_S) & \
1830 CPL_TX_SEC_PDU_AUTHSTART_M)
1832 /* AuthStopOffset: offset in bytes for authentication
1833 * end from end of the payload of this command (0-511 Bytes)
1835 #define CPL_TX_SEC_PDU_AUTHSTOP_S 9
1836 #define CPL_TX_SEC_PDU_AUTHSTOP_M 0x1ff
1837 #define CPL_TX_SEC_PDU_AUTHSTOP_V(x) ((x) << CPL_TX_SEC_PDU_AUTHSTOP_S)
1838 #define CPL_TX_SEC_PDU_AUTHSTOP_G(x) \
1839 (((x) >> CPL_TX_SEC_PDU_AUTHSTOP_S) & \
1840 CPL_TX_SEC_PDU_AUTHSTOP_M)
1842 /* AuthInsrtOffset: offset in bytes for authentication insertion
1843 * from end of the payload of this command (0-511 bytes)
1845 #define CPL_TX_SEC_PDU_AUTHINSERT_S 0
1846 #define CPL_TX_SEC_PDU_AUTHINSERT_M 0x1ff
1847 #define CPL_TX_SEC_PDU_AUTHINSERT_V(x) ((x) << CPL_TX_SEC_PDU_AUTHINSERT_S)
1848 #define CPL_TX_SEC_PDU_AUTHINSERT_G(x) \
1849 (((x) >> CPL_TX_SEC_PDU_AUTHINSERT_S) & \
1850 CPL_TX_SEC_PDU_AUTHINSERT_M)
1852 struct cpl_rx_phys_dsgl {
1854 __be32 pcirlxorder_to_noofsgentr;
1855 struct rss_header rss_hdr_int;
1858 #define CPL_RX_PHYS_DSGL_OPCODE_S 24
1859 #define CPL_RX_PHYS_DSGL_OPCODE_M 0xff
1860 #define CPL_RX_PHYS_DSGL_OPCODE_V(x) ((x) << CPL_RX_PHYS_DSGL_OPCODE_S)
1861 #define CPL_RX_PHYS_DSGL_OPCODE_G(x) \
1862 (((x) >> CPL_RX_PHYS_DSGL_OPCODE_S) & CPL_RX_PHYS_DSGL_OPCODE_M)
1864 #define CPL_RX_PHYS_DSGL_ISRDMA_S 23
1865 #define CPL_RX_PHYS_DSGL_ISRDMA_M 0x1
1866 #define CPL_RX_PHYS_DSGL_ISRDMA_V(x) ((x) << CPL_RX_PHYS_DSGL_ISRDMA_S)
1867 #define CPL_RX_PHYS_DSGL_ISRDMA_G(x) \
1868 (((x) >> CPL_RX_PHYS_DSGL_ISRDMA_S) & CPL_RX_PHYS_DSGL_ISRDMA_M)
1869 #define CPL_RX_PHYS_DSGL_ISRDMA_F CPL_RX_PHYS_DSGL_ISRDMA_V(1U)
1871 #define CPL_RX_PHYS_DSGL_RSVD1_S 20
1872 #define CPL_RX_PHYS_DSGL_RSVD1_M 0x7
1873 #define CPL_RX_PHYS_DSGL_RSVD1_V(x) ((x) << CPL_RX_PHYS_DSGL_RSVD1_S)
1874 #define CPL_RX_PHYS_DSGL_RSVD1_G(x) \
1875 (((x) >> CPL_RX_PHYS_DSGL_RSVD1_S) & \
1876 CPL_RX_PHYS_DSGL_RSVD1_M)
1878 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_S 31
1879 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_M 0x1
1880 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_V(x) \
1881 ((x) << CPL_RX_PHYS_DSGL_PCIRLXORDER_S)
1882 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_G(x) \
1883 (((x) >> CPL_RX_PHYS_DSGL_PCIRLXORDER_S) & \
1884 CPL_RX_PHYS_DSGL_PCIRLXORDER_M)
1885 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_F CPL_RX_PHYS_DSGL_PCIRLXORDER_V(1U)
1887 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_S 30
1888 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_M 0x1
1889 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_V(x) \
1890 ((x) << CPL_RX_PHYS_DSGL_PCINOSNOOP_S)
1891 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_G(x) \
1892 (((x) >> CPL_RX_PHYS_DSGL_PCINOSNOOP_S) & \
1893 CPL_RX_PHYS_DSGL_PCINOSNOOP_M)
1895 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_F CPL_RX_PHYS_DSGL_PCINOSNOOP_V(1U)
1897 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_S 29
1898 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_M 0x1
1899 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_V(x) \
1900 ((x) << CPL_RX_PHYS_DSGL_PCITPHNTENB_S)
1901 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_G(x) \
1902 (((x) >> CPL_RX_PHYS_DSGL_PCITPHNTENB_S) & \
1903 CPL_RX_PHYS_DSGL_PCITPHNTENB_M)
1904 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_F CPL_RX_PHYS_DSGL_PCITPHNTENB_V(1U)
1906 #define CPL_RX_PHYS_DSGL_PCITPHNT_S 27
1907 #define CPL_RX_PHYS_DSGL_PCITPHNT_M 0x3
1908 #define CPL_RX_PHYS_DSGL_PCITPHNT_V(x) ((x) << CPL_RX_PHYS_DSGL_PCITPHNT_S)
1909 #define CPL_RX_PHYS_DSGL_PCITPHNT_G(x) \
1910 (((x) >> CPL_RX_PHYS_DSGL_PCITPHNT_S) & \
1911 CPL_RX_PHYS_DSGL_PCITPHNT_M)
1913 #define CPL_RX_PHYS_DSGL_DCAID_S 16
1914 #define CPL_RX_PHYS_DSGL_DCAID_M 0x7ff
1915 #define CPL_RX_PHYS_DSGL_DCAID_V(x) ((x) << CPL_RX_PHYS_DSGL_DCAID_S)
1916 #define CPL_RX_PHYS_DSGL_DCAID_G(x) \
1917 (((x) >> CPL_RX_PHYS_DSGL_DCAID_S) & \
1918 CPL_RX_PHYS_DSGL_DCAID_M)
1920 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_S 0
1921 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_M 0xffff
1922 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_V(x) \
1923 ((x) << CPL_RX_PHYS_DSGL_NOOFSGENTR_S)
1924 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_G(x) \
1925 (((x) >> CPL_RX_PHYS_DSGL_NOOFSGENTR_S) & \
1926 CPL_RX_PHYS_DSGL_NOOFSGENTR_M)
1928 struct cpl_rx_mps_pkt {
1930 __be32 r1_lo_length;
1933 #define CPL_RX_MPS_PKT_OP_S 24
1934 #define CPL_RX_MPS_PKT_OP_M 0xff
1935 #define CPL_RX_MPS_PKT_OP_V(x) ((x) << CPL_RX_MPS_PKT_OP_S)
1936 #define CPL_RX_MPS_PKT_OP_G(x) \
1937 (((x) >> CPL_RX_MPS_PKT_OP_S) & CPL_RX_MPS_PKT_OP_M)
1939 #define CPL_RX_MPS_PKT_TYPE_S 20
1940 #define CPL_RX_MPS_PKT_TYPE_M 0xf
1941 #define CPL_RX_MPS_PKT_TYPE_V(x) ((x) << CPL_RX_MPS_PKT_TYPE_S)
1942 #define CPL_RX_MPS_PKT_TYPE_G(x) \
1943 (((x) >> CPL_RX_MPS_PKT_TYPE_S) & CPL_RX_MPS_PKT_TYPE_M)
1946 X_CPL_RX_MPS_PKT_TYPE_PAUSE = 1 << 0,
1947 X_CPL_RX_MPS_PKT_TYPE_PPP = 1 << 1,
1948 X_CPL_RX_MPS_PKT_TYPE_QFC = 1 << 2,
1949 X_CPL_RX_MPS_PKT_TYPE_PTP = 1 << 3
1951 #endif /* __T4_MSG_H */