drivers/net/ethernet/cavium/liquidio/lio_main.c

   1 /**********************************************************************
   2 * Author: Cavium, Inc.
   3 *
   4 * Contact: support@cavium.com
   5 *          Please include "LiquidIO" in the subject.
   6 *
   7 * Copyright (c) 2003-2015 Cavium, Inc.
   8 *
   9 * This file is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License, Version 2, as
  11 * published by the Free Software Foundation.
  12 *
  13 * This file is distributed in the hope that it will be useful, but
  14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16 * NONINFRINGEMENT.  See the GNU General Public License for more
  17 * details.
  18 *
  19 * This file may also be available under a different license from Cavium.
  20 * Contact Cavium, Inc. for more information
  21 **********************************************************************/
  22 #include <linux/version.h>
  23 #include <linux/pci.h>
  24 #include <linux/firmware.h>
  25 #include <linux/ptp_clock_kernel.h>
  26 #include <net/vxlan.h>
  27 #include "liquidio_common.h"
  28 #include "octeon_droq.h"
  29 #include "octeon_iq.h"
  30 #include "response_manager.h"
  31 #include "octeon_device.h"
  32 #include "octeon_nic.h"
  33 #include "octeon_main.h"
  34 #include "octeon_network.h"
  35 #include "cn66xx_regs.h"
  36 #include "cn66xx_device.h"
  37 #include "cn68xx_device.h"
  38 #include "cn23xx_pf_device.h"
  39 #include "liquidio_image.h"
  40
  41 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>");
  42 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver");
  43 MODULE_LICENSE("GPL");
  44 MODULE_VERSION(LIQUIDIO_VERSION);
  45 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME LIO_FW_NAME_SUFFIX);
  46 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME LIO_FW_NAME_SUFFIX);
  47 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME LIO_FW_NAME_SUFFIX);
  48
  49 static int ddr_timeout = 10000;
  50 module_param(ddr_timeout, int, 0644);
  51 MODULE_PARM_DESC(ddr_timeout,
  52                  "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check");
  53
  54 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
  55
  56 #define INCR_INSTRQUEUE_PKT_COUNT(octeon_dev_ptr, iq_no, field, count)  \
  57         (octeon_dev_ptr->instr_queue[iq_no]->stats.field += count)
  58
  59 static int debug = -1;
  60 module_param(debug, int, 0644);
  61 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits");
  62
  63 static char fw_type[LIO_MAX_FW_TYPE_LEN];
  64 module_param_string(fw_type, fw_type, sizeof(fw_type), 0000);
  65 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded. Default \"nic\"");
  66
  67 static int conf_type;
  68 module_param(conf_type, int, 0);
  69 MODULE_PARM_DESC(conf_type, "select octeon configuration 0 default 1 ovs");
  70
  71 static int ptp_enable = 1;
  72
  73 /* Bit mask values for lio->ifstate */
  74 #define   LIO_IFSTATE_DROQ_OPS             0x01
  75 #define   LIO_IFSTATE_REGISTERED           0x02
  76 #define   LIO_IFSTATE_RUNNING              0x04
  77 #define   LIO_IFSTATE_RX_TIMESTAMP_ENABLED 0x08
  78
  79 /* Polling interval for determining when NIC application is alive */
  80 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100
  81
  82 /* runtime link query interval */
  83 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS         1000
  84
  85 struct liquidio_if_cfg_context {
  86         int octeon_id;
  87
  88         wait_queue_head_t wc;
  89
  90         int cond;
  91 };
  92
  93 struct liquidio_if_cfg_resp {
  94         u64 rh;
  95         struct liquidio_if_cfg_info cfg_info;
  96         u64 status;
  97 };
  98
  99 struct liquidio_rx_ctl_context {
 100         int octeon_id;
 101
 102         wait_queue_head_t wc;
 103
 104         int cond;
 105 };
 106
 107 struct oct_link_status_resp {
 108         u64 rh;
 109         struct oct_link_info link_info;
 110         u64 status;
 111 };
 112
 113 struct oct_timestamp_resp {
 114         u64 rh;
 115         u64 timestamp;
 116         u64 status;
 117 };
 118
 119 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp))
 120
 121 union tx_info {
 122         u64 u64;
 123         struct {
 124 #ifdef __BIG_ENDIAN_BITFIELD
 125                 u16 gso_size;
 126                 u16 gso_segs;
 127                 u32 reserved;
 128 #else
 129                 u32 reserved;
 130                 u16 gso_segs;
 131                 u16 gso_size;
 132 #endif
 133         } s;
 134 };
 135
 136 /** Octeon device properties to be used by the NIC module.
 137  * Each octeon device in the system will be represented
 138  * by this structure in the NIC module.
 139  */
 140
 141 #define OCTNIC_MAX_SG  (MAX_SKB_FRAGS)
 142
 143 #define OCTNIC_GSO_MAX_HEADER_SIZE 128
 144 #define OCTNIC_GSO_MAX_SIZE                                                    \
 145         (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE)
 146
 147 /** Structure of a node in list of gather components maintained by
 148  * NIC driver for each network device.
 149  */
 150 struct octnic_gather {
 151         /** List manipulation. Next and prev pointers. */
 152         struct list_head list;
 153
 154         /** Size of the gather component at sg in bytes. */
 155         int sg_size;
 156
 157         /** Number of bytes that sg was adjusted to make it 8B-aligned. */
 158         int adjust;
 159
 160         /** Gather component that can accommodate max sized fragment list
 161          *  received from the IP layer.
 162          */
 163         struct octeon_sg_entry *sg;
 164
 165         u64 sg_dma_ptr;
 166 };
 167
 168 struct handshake {
 169         struct completion init;
 170         struct completion started;
 171         struct pci_dev *pci_dev;
 172         int init_ok;
 173         int started_ok;
 174 };
 175
 176 struct octeon_device_priv {
 177         /** Tasklet structures for this device. */
 178         struct tasklet_struct droq_tasklet;
 179         unsigned long napi_mask;
 180 };
 181
 182 static int octeon_device_init(struct octeon_device *);
 183 static int liquidio_stop(struct net_device *netdev);
 184 static void liquidio_remove(struct pci_dev *pdev);
 185 static int liquidio_probe(struct pci_dev *pdev,
 186                           const struct pci_device_id *ent);
 187
 188 static struct handshake handshake[MAX_OCTEON_DEVICES];
 189 static struct completion first_stage;
 190
 191 static void octeon_droq_bh(unsigned long pdev)
 192 {
 193         int q_no;
 194         int reschedule = 0;
 195         struct octeon_device *oct = (struct octeon_device *)pdev;
 196         struct octeon_device_priv *oct_priv =
 197                 (struct octeon_device_priv *)oct->priv;
 198
 199         /* for (q_no = 0; q_no < oct->num_oqs; q_no++) { */
 200         for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) {
 201                 if (!(oct->io_qmask.oq & (1ULL << q_no)))
 202                         continue;
 203                 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no],
 204                                                           MAX_PACKET_BUDGET);
 205                 lio_enable_irq(oct->droq[q_no], NULL);
 206
 207                 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
 208                         /* set time and cnt interrupt thresholds for this DROQ
 209                          * for NAPI
 210                          */
 211                         int adjusted_q_no = q_no + oct->sriov_info.pf_srn;
 212
 213                         octeon_write_csr64(
 214                             oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no),
 215                             0x5700000040ULL);
 216                         octeon_write_csr64(
 217                             oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0);
 218                 }
 219         }
 220
 221         if (reschedule)
 222                 tasklet_schedule(&oct_priv->droq_tasklet);
 223 }
 224
 225 static int lio_wait_for_oq_pkts(struct octeon_device *oct)
 226 {
 227         struct octeon_device_priv *oct_priv =
 228                 (struct octeon_device_priv *)oct->priv;
 229         int retry = 100, pkt_cnt = 0, pending_pkts = 0;
 230         int i;
 231
 232         do {
 233                 pending_pkts = 0;
 234
 235                 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
 236                         if (!(oct->io_qmask.oq & (1ULL << i)))
 237                                 continue;
 238                         pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]);
 239                 }
 240                 if (pkt_cnt > 0) {
 241                         pending_pkts += pkt_cnt;
 242                         tasklet_schedule(&oct_priv->droq_tasklet);
 243                 }
 244                 pkt_cnt = 0;
 245                 schedule_timeout_uninterruptible(1);
 246
 247         } while (retry-- && pending_pkts);
 248
 249         return pkt_cnt;
 250 }
 251
 252 /**
 253  * \brief Forces all IO queues off on a given device
 254  * @param oct Pointer to Octeon device
 255  */
 256 static void force_io_queues_off(struct octeon_device *oct)
 257 {
 258         if ((oct->chip_id == OCTEON_CN66XX) ||
 259             (oct->chip_id == OCTEON_CN68XX)) {
 260                 /* Reset the Enable bits for Input Queues. */
 261                 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0);
 262
 263                 /* Reset the Enable bits for Output Queues. */
 264                 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0);
 265         }
 266 }
 267
 268 /**
 269  * \brief wait for all pending requests to complete
 270  * @param oct Pointer to Octeon device
 271  *
 272  * Called during shutdown sequence
 273  */
 274 static int wait_for_pending_requests(struct octeon_device *oct)
 275 {
 276         int i, pcount = 0;
 277
 278         for (i = 0; i < 100; i++) {
 279                 pcount =
 280                         atomic_read(&oct->response_list
 281                                 [OCTEON_ORDERED_SC_LIST].pending_req_count);
 282                 if (pcount)
 283                         schedule_timeout_uninterruptible(HZ / 10);
 284                 else
 285                         break;
 286         }
 287
 288         if (pcount)
 289                 return 1;
 290
 291         return 0;
 292 }
 293
 294 /**
 295  * \brief Cause device to go quiet so it can be safely removed/reset/etc
 296  * @param oct Pointer to Octeon device
 297  */
 298 static inline void pcierror_quiesce_device(struct octeon_device *oct)
 299 {
 300         int i;
 301
 302         /* Disable the input and output queues now. No more packets will
 303          * arrive from Octeon, but we should wait for all packet processing
 304          * to finish.
 305          */
 306         force_io_queues_off(oct);
 307
 308         /* To allow for in-flight requests */
 309         schedule_timeout_uninterruptible(100);
 310
 311         if (wait_for_pending_requests(oct))
 312                 dev_err(&oct->pci_dev->dev, "There were pending requests\n");
 313
 314         /* Force all requests waiting to be fetched by OCTEON to complete. */
 315         for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
 316                 struct octeon_instr_queue *iq;
 317
 318                 if (!(oct->io_qmask.iq & (1ULL << i)))
 319                         continue;
 320                 iq = oct->instr_queue[i];
 321
 322                 if (atomic_read(&iq->instr_pending)) {
 323                         spin_lock_bh(&iq->lock);
 324                         iq->fill_cnt = 0;
 325                         iq->octeon_read_index = iq->host_write_index;
 326                         iq->stats.instr_processed +=
 327                                 atomic_read(&iq->instr_pending);
 328                         lio_process_iq_request_list(oct, iq, 0);
 329                         spin_unlock_bh(&iq->lock);
 330                 }
 331         }
 332
 333         /* Force all pending ordered list requests to time out. */
 334         lio_process_ordered_list(oct, 1);
 335
 336         /* We do not need to wait for output queue packets to be processed. */
 337 }
 338
 339 /**
 340  * \brief Cleanup PCI AER uncorrectable error status
 341  * @param dev Pointer to PCI device
 342  */
 343 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
 344 {
 345         int pos = 0x100;
 346         u32 status, mask;
 347
 348         pr_info("%s :\n", __func__);
 349
 350         pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
 351         pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
 352         if (dev->error_state == pci_channel_io_normal)
 353                 status &= ~mask;        /* Clear corresponding nonfatal bits */
 354         else
 355                 status &= mask;         /* Clear corresponding fatal bits */
 356         pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
 357 }
 358
 359 /**
 360  * \brief Stop all PCI IO to a given device
 361  * @param dev Pointer to Octeon device
 362  */
 363 static void stop_pci_io(struct octeon_device *oct)
 364 {
 365         /* No more instructions will be forwarded. */
 366         atomic_set(&oct->status, OCT_DEV_IN_RESET);
 367
 368         pci_disable_device(oct->pci_dev);
 369
 370         /* Disable interrupts  */
 371         oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
 372
 373         pcierror_quiesce_device(oct);
 374
 375         /* Release the interrupt line */
 376         free_irq(oct->pci_dev->irq, oct);
 377
 378         if (oct->flags & LIO_FLAG_MSI_ENABLED)
 379                 pci_disable_msi(oct->pci_dev);
 380
 381         dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
 382                 lio_get_state_string(&oct->status));
 383
 384         /* cn63xx_cleanup_aer_uncorrect_error_status(oct->pci_dev); */
 385         /* making it a common function for all OCTEON models */
 386         cleanup_aer_uncorrect_error_status(oct->pci_dev);
 387 }
 388
 389 /**
 390  * \brief called when PCI error is detected
 391  * @param pdev Pointer to PCI device
 392  * @param state The current pci connection state
 393  *
 394  * This function is called after a PCI bus error affecting
 395  * this device has been detected.
 396  */
 397 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev,
 398                                                      pci_channel_state_t state)
 399 {
 400         struct octeon_device *oct = pci_get_drvdata(pdev);
 401
 402         /* Non-correctable Non-fatal errors */
 403         if (state == pci_channel_io_normal) {
 404                 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n");
 405                 cleanup_aer_uncorrect_error_status(oct->pci_dev);
 406                 return PCI_ERS_RESULT_CAN_RECOVER;
 407         }
 408
 409         /* Non-correctable Fatal errors */
 410         dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n");
 411         stop_pci_io(oct);
 412
 413         /* Always return a DISCONNECT. There is no support for recovery but only
 414          * for a clean shutdown.
 415          */
 416         return PCI_ERS_RESULT_DISCONNECT;
 417 }
 418
 419 /**
 420  * \brief mmio handler
 421  * @param pdev Pointer to PCI device
 422  */
 423 static pci_ers_result_t liquidio_pcie_mmio_enabled(
 424                                 struct pci_dev *pdev __attribute__((unused)))
 425 {
 426         /* We should never hit this since we never ask for a reset for a Fatal
 427          * Error. We always return DISCONNECT in io_error above.
 428          * But play safe and return RECOVERED for now.
 429          */
 430         return PCI_ERS_RESULT_RECOVERED;
 431 }
 432
 433 /**
 434  * \brief called after the pci bus has been reset.
 435  * @param pdev Pointer to PCI device
 436  *
 437  * Restart the card from scratch, as if from a cold-boot. Implementation
 438  * resembles the first-half of the octeon_resume routine.
 439  */
 440 static pci_ers_result_t liquidio_pcie_slot_reset(
 441                                 struct pci_dev *pdev __attribute__((unused)))
 442 {
 443         /* We should never hit this since we never ask for a reset for a Fatal
 444          * Error. We always return DISCONNECT in io_error above.
 445          * But play safe and return RECOVERED for now.
 446          */
 447         return PCI_ERS_RESULT_RECOVERED;
 448 }
 449
 450 /**
 451  * \brief called when traffic can start flowing again.
 452  * @param pdev Pointer to PCI device
 453  *
 454  * This callback is called when the error recovery driver tells us that
 455  * its OK to resume normal operation. Implementation resembles the
 456  * second-half of the octeon_resume routine.
 457  */
 458 static void liquidio_pcie_resume(struct pci_dev *pdev __attribute__((unused)))
 459 {
 460         /* Nothing to be done here. */
 461 }
 462
 463 #ifdef CONFIG_PM
 464 /**
 465  * \brief called when suspending
 466  * @param pdev Pointer to PCI device
 467  * @param state state to suspend to
 468  */
 469 static int liquidio_suspend(struct pci_dev *pdev __attribute__((unused)),
 470                             pm_message_t state __attribute__((unused)))
 471 {
 472         return 0;
 473 }
 474
 475 /**
 476  * \brief called when resuming
 477  * @param pdev Pointer to PCI device
 478  */
 479 static int liquidio_resume(struct pci_dev *pdev __attribute__((unused)))
 480 {
 481         return 0;
 482 }
 483 #endif
 484
 485 /* For PCI-E Advanced Error Recovery (AER) Interface */
 486 static const struct pci_error_handlers liquidio_err_handler = {
 487         .error_detected = liquidio_pcie_error_detected,
 488         .mmio_enabled   = liquidio_pcie_mmio_enabled,
 489         .slot_reset     = liquidio_pcie_slot_reset,
 490         .resume         = liquidio_pcie_resume,
 491 };
 492
 493 static const struct pci_device_id liquidio_pci_tbl[] = {
 494         {       /* 68xx */
 495                 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
 496         },
 497         {       /* 66xx */
 498                 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
 499         },
 500         {       /* 23xx pf */
 501                 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
 502         },
 503         {
 504                 0, 0, 0, 0, 0, 0, 0
 505         }
 506 };
 507 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl);
 508
 509 static struct pci_driver liquidio_pci_driver = {
 510         .name           = "LiquidIO",
 511         .id_table       = liquidio_pci_tbl,
 512         .probe          = liquidio_probe,
 513         .remove         = liquidio_remove,
 514         .err_handler    = &liquidio_err_handler,    /* For AER */
 515
 516 #ifdef CONFIG_PM
 517         .suspend        = liquidio_suspend,
 518         .resume         = liquidio_resume,
 519 #endif
 520 };
 521
 522 /**
 523  * \brief register PCI driver
 524  */
 525 static int liquidio_init_pci(void)
 526 {
 527         return pci_register_driver(&liquidio_pci_driver);
 528 }
 529
 530 /**
 531  * \brief unregister PCI driver
 532  */
 533 static void liquidio_deinit_pci(void)
 534 {
 535         pci_unregister_driver(&liquidio_pci_driver);
 536 }
 537
 538 /**
 539  * \brief check interface state
 540  * @param lio per-network private data
 541  * @param state_flag flag state to check
 542  */
 543 static inline int ifstate_check(struct lio *lio, int state_flag)
 544 {
 545         return atomic_read(&lio->ifstate) & state_flag;
 546 }
 547
 548 /**
 549  * \brief set interface state
 550  * @param lio per-network private data
 551  * @param state_flag flag state to set
 552  */
 553 static inline void ifstate_set(struct lio *lio, int state_flag)
 554 {
 555         atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) | state_flag));
 556 }
 557
 558 /**
 559  * \brief clear interface state
 560  * @param lio per-network private data
 561  * @param state_flag flag state to clear
 562  */
 563 static inline void ifstate_reset(struct lio *lio, int state_flag)
 564 {
 565         atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) & ~(state_flag)));
 566 }
 567
 568 /**
 569  * \brief Stop Tx queues
 570  * @param netdev network device
 571  */
 572 static inline void txqs_stop(struct net_device *netdev)
 573 {
 574         if (netif_is_multiqueue(netdev)) {
 575                 int i;
 576
 577                 for (i = 0; i < netdev->num_tx_queues; i++)
 578                         netif_stop_subqueue(netdev, i);
 579         } else {
 580                 netif_stop_queue(netdev);
 581         }
 582 }
 583
 584 /**
 585  * \brief Start Tx queues
 586  * @param netdev network device
 587  */
 588 static inline void txqs_start(struct net_device *netdev)
 589 {
 590         if (netif_is_multiqueue(netdev)) {
 591                 int i;
 592
 593                 for (i = 0; i < netdev->num_tx_queues; i++)
 594                         netif_start_subqueue(netdev, i);
 595         } else {
 596                 netif_start_queue(netdev);
 597         }
 598 }
 599
 600 /**
 601  * \brief Wake Tx queues
 602  * @param netdev network device
 603  */
 604 static inline void txqs_wake(struct net_device *netdev)
 605 {
 606         struct lio *lio = GET_LIO(netdev);
 607
 608         if (netif_is_multiqueue(netdev)) {
 609                 int i;
 610
 611                 for (i = 0; i < netdev->num_tx_queues; i++) {
 612                         int qno = lio->linfo.txpciq[i %
 613                                 (lio->linfo.num_txpciq)].s.q_no;
 614
 615                         if (__netif_subqueue_stopped(netdev, i)) {
 616                                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno,
 617                                                           tx_restart, 1);
 618                                 netif_wake_subqueue(netdev, i);
 619                         }
 620                 }
 621         } else {
 622                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
 623                                           tx_restart, 1);
 624                 netif_wake_queue(netdev);
 625         }
 626 }
 627
 628 /**
 629  * \brief Stop Tx queue
 630  * @param netdev network device
 631  */
 632 static void stop_txq(struct net_device *netdev)
 633 {
 634         txqs_stop(netdev);
 635 }
 636
 637 /**
 638  * \brief Start Tx queue
 639  * @param netdev network device
 640  */
 641 static void start_txq(struct net_device *netdev)
 642 {
 643         struct lio *lio = GET_LIO(netdev);
 644
 645         if (lio->linfo.link.s.link_up) {
 646                 txqs_start(netdev);
 647                 return;
 648         }
 649 }
 650
 651 /**
 652  * \brief Wake a queue
 653  * @param netdev network device
 654  * @param q which queue to wake
 655  */
 656 static inline void wake_q(struct net_device *netdev, int q)
 657 {
 658         if (netif_is_multiqueue(netdev))
 659                 netif_wake_subqueue(netdev, q);
 660         else
 661                 netif_wake_queue(netdev);
 662 }
 663
 664 /**
 665  * \brief Stop a queue
 666  * @param netdev network device
 667  * @param q which queue to stop
 668  */
 669 static inline void stop_q(struct net_device *netdev, int q)
 670 {
 671         if (netif_is_multiqueue(netdev))
 672                 netif_stop_subqueue(netdev, q);
 673         else
 674                 netif_stop_queue(netdev);
 675 }
 676
 677 /**
 678  * \brief Check Tx queue status, and take appropriate action
 679  * @param lio per-network private data
 680  * @returns 0 if full, number of queues woken up otherwise
 681  */
 682 static inline int check_txq_status(struct lio *lio)
 683 {
 684         int ret_val = 0;
 685
 686         if (netif_is_multiqueue(lio->netdev)) {
 687                 int numqs = lio->netdev->num_tx_queues;
 688                 int q, iq = 0;
 689
 690                 /* check each sub-queue state */
 691                 for (q = 0; q < numqs; q++) {
 692                         iq = lio->linfo.txpciq[q %
 693                                 (lio->linfo.num_txpciq)].s.q_no;
 694                         if (octnet_iq_is_full(lio->oct_dev, iq))
 695                                 continue;
 696                         if (__netif_subqueue_stopped(lio->netdev, q)) {
 697                                 wake_q(lio->netdev, q);
 698                                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq,
 699                                                           tx_restart, 1);
 700                                 ret_val++;
 701                         }
 702                 }
 703         } else {
 704                 if (octnet_iq_is_full(lio->oct_dev, lio->txq))
 705                         return 0;
 706                 wake_q(lio->netdev, lio->txq);
 707                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
 708                                           tx_restart, 1);
 709                 ret_val = 1;
 710         }
 711         return ret_val;
 712 }
 713
 714 /**
 715  * Remove the node at the head of the list. The list would be empty at
 716  * the end of this call if there are no more nodes in the list.
 717  */
 718 static inline struct list_head *list_delete_head(struct list_head *root)
 719 {
 720         struct list_head *node;
 721
 722         if ((root->prev == root) && (root->next == root))
 723                 node = NULL;
 724         else
 725                 node = root->next;
 726
 727         if (node)
 728                 list_del(node);
 729
 730         return node;
 731 }
 732
 733 /**
 734  * \brief Delete gather lists
 735  * @param lio per-network private data
 736  */
 737 static void delete_glists(struct lio *lio)
 738 {
 739         struct octnic_gather *g;
 740         int i;
 741
 742         if (!lio->glist)
 743                 return;
 744
 745         for (i = 0; i < lio->linfo.num_txpciq; i++) {
 746                 do {
 747                         g = (struct octnic_gather *)
 748                                 list_delete_head(&lio->glist[i]);
 749                         if (g) {
 750                                 if (g->sg) {
 751                                         dma_unmap_single(&lio->oct_dev->
 752                                                          pci_dev->dev,
 753                                                          g->sg_dma_ptr,
 754                                                          g->sg_size,
 755                                                          DMA_TO_DEVICE);
 756                                         kfree((void *)((unsigned long)g->sg -
 757                                                        g->adjust));
 758                                 }
 759                                 kfree(g);
 760                         }
 761                 } while (g);
 762         }
 763
 764         kfree((void *)lio->glist);
 765 }
 766
 767 /**
 768  * \brief Setup gather lists
 769  * @param lio per-network private data
 770  */
 771 static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs)
 772 {
 773         int i, j;
 774         struct octnic_gather *g;
 775
 776         lio->glist_lock = kcalloc(num_iqs, sizeof(*lio->glist_lock),
 777                                   GFP_KERNEL);
 778         if (!lio->glist_lock)
 779                 return 1;
 780
 781         lio->glist = kcalloc(num_iqs, sizeof(*lio->glist),
 782                              GFP_KERNEL);
 783         if (!lio->glist) {
 784                 kfree((void *)lio->glist_lock);
 785                 return 1;
 786         }
 787
 788         for (i = 0; i < num_iqs; i++) {
 789                 int numa_node = cpu_to_node(i % num_online_cpus());
 790
 791                 spin_lock_init(&lio->glist_lock[i]);
 792
 793                 INIT_LIST_HEAD(&lio->glist[i]);
 794
 795                 for (j = 0; j < lio->tx_qsize; j++) {
 796                         g = kzalloc_node(sizeof(*g), GFP_KERNEL,
 797                                          numa_node);
 798                         if (!g)
 799                                 g = kzalloc(sizeof(*g), GFP_KERNEL);
 800                         if (!g)
 801                                 break;
 802
 803                         g->sg_size = ((ROUNDUP4(OCTNIC_MAX_SG) >> 2) *
 804                                       OCT_SG_ENTRY_SIZE);
 805
 806                         g->sg = kmalloc_node(g->sg_size + 8,
 807                                              GFP_KERNEL, numa_node);
 808                         if (!g->sg)
 809                                 g->sg = kmalloc(g->sg_size + 8, GFP_KERNEL);
 810                         if (!g->sg) {
 811                                 kfree(g);
 812                                 break;
 813                         }
 814
 815                         /* The gather component should be aligned on 64-bit
 816                          * boundary
 817                          */
 818                         if (((unsigned long)g->sg) & 7) {
 819                                 g->adjust = 8 - (((unsigned long)g->sg) & 7);
 820                                 g->sg = (struct octeon_sg_entry *)
 821                                         ((unsigned long)g->sg + g->adjust);
 822                         }
 823                         g->sg_dma_ptr = dma_map_single(&oct->pci_dev->dev,
 824                                                        g->sg, g->sg_size,
 825                                                        DMA_TO_DEVICE);
 826                         if (dma_mapping_error(&oct->pci_dev->dev,
 827                                               g->sg_dma_ptr)) {
 828                                 kfree((void *)((unsigned long)g->sg -
 829                                                g->adjust));
 830                                 kfree(g);
 831                                 break;
 832                         }
 833
 834                         list_add_tail(&g->list, &lio->glist[i]);
 835                 }
 836
 837                 if (j != lio->tx_qsize) {
 838                         delete_glists(lio);
 839                         return 1;
 840                 }
 841         }
 842
 843         return 0;
 844 }
 845
 846 /**
 847  * \brief Print link information
 848  * @param netdev network device
 849  */
 850 static void print_link_info(struct net_device *netdev)
 851 {
 852         struct lio *lio = GET_LIO(netdev);
 853
 854         if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) {
 855                 struct oct_link_info *linfo = &lio->linfo;
 856
 857                 if (linfo->link.s.link_up) {
 858                         netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n",
 859                                    linfo->link.s.speed,
 860                                    (linfo->link.s.duplex) ? "Full" : "Half");
 861                 } else {
 862                         netif_info(lio, link, lio->netdev, "Link Down\n");
 863                 }
 864         }
 865 }
 866
 867 /**
 868  * \brief Routine to notify MTU change
 869  * @param work work_struct data structure
 870  */
 871 static void octnet_link_status_change(struct work_struct *work)
 872 {
 873         struct cavium_wk *wk = (struct cavium_wk *)work;
 874         struct lio *lio = (struct lio *)wk->ctxptr;
 875
 876         rtnl_lock();
 877         call_netdevice_notifiers(NETDEV_CHANGEMTU, lio->netdev);
 878         rtnl_unlock();
 879 }
 880
 881 /**
 882  * \brief Sets up the mtu status change work
 883  * @param netdev network device
 884  */
 885 static inline int setup_link_status_change_wq(struct net_device *netdev)
 886 {
 887         struct lio *lio = GET_LIO(netdev);
 888         struct octeon_device *oct = lio->oct_dev;
 889
 890         lio->link_status_wq.wq = alloc_workqueue("link-status",
 891                                                  WQ_MEM_RECLAIM, 0);
 892         if (!lio->link_status_wq.wq) {
 893                 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n");
 894                 return -1;
 895         }
 896         INIT_DELAYED_WORK(&lio->link_status_wq.wk.work,
 897                           octnet_link_status_change);
 898         lio->link_status_wq.wk.ctxptr = lio;
 899
 900         return 0;
 901 }
 902
 903 static inline void cleanup_link_status_change_wq(struct net_device *netdev)
 904 {
 905         struct lio *lio = GET_LIO(netdev);
 906
 907         if (lio->link_status_wq.wq) {
 908                 cancel_delayed_work_sync(&lio->link_status_wq.wk.work);
 909                 destroy_workqueue(lio->link_status_wq.wq);
 910         }
 911 }
 912
 913 /**
 914  * \brief Update link status
 915  * @param netdev network device
 916  * @param ls link status structure
 917  *
 918  * Called on receipt of a link status response from the core application to
 919  * update each interface's link status.
 920  */
 921 static inline void update_link_status(struct net_device *netdev,
 922                                       union oct_link_status *ls)
 923 {
 924         struct lio *lio = GET_LIO(netdev);
 925         int changed = (lio->linfo.link.u64 != ls->u64);
 926
 927         lio->linfo.link.u64 = ls->u64;
 928
 929         if ((lio->intf_open) && (changed)) {
 930                 print_link_info(netdev);
 931                 lio->link_changes++;
 932
 933                 if (lio->linfo.link.s.link_up) {
 934                         netif_carrier_on(netdev);
 935                         /* start_txq(netdev); */
 936                         txqs_wake(netdev);
 937                 } else {
 938                         netif_carrier_off(netdev);
 939                         stop_txq(netdev);
 940                 }
 941         }
 942 }
 943
 944 /* Runs in interrupt context. */
 945 static void update_txq_status(struct octeon_device *oct, int iq_num)
 946 {
 947         struct net_device *netdev;
 948         struct lio *lio;
 949         struct octeon_instr_queue *iq = oct->instr_queue[iq_num];
 950
 951         /*octeon_update_iq_read_idx(oct, iq);*/
 952
 953         netdev = oct->props[iq->ifidx].netdev;
 954
 955         /* This is needed because the first IQ does not have
 956          * a netdev associated with it.
 957          */
 958         if (!netdev)
 959                 return;
 960
 961         lio = GET_LIO(netdev);
 962         if (netif_is_multiqueue(netdev)) {
 963                 if (__netif_subqueue_stopped(netdev, iq->q_index) &&
 964                     lio->linfo.link.s.link_up &&
 965                     (!octnet_iq_is_full(oct, iq_num))) {
 966                         INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq_num,
 967                                                   tx_restart, 1);
 968                         netif_wake_subqueue(netdev, iq->q_index);
 969                 } else {
 970                         if (!octnet_iq_is_full(oct, lio->txq)) {
 971                                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev,
 972                                                           lio->txq,
 973                                                           tx_restart, 1);
 974                                 wake_q(netdev, lio->txq);
 975                         }
 976                 }
 977         }
 978 }
 979
 980 static
 981 int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret)
 982 {
 983         struct octeon_device *oct = droq->oct_dev;
 984         struct octeon_device_priv *oct_priv =
 985             (struct octeon_device_priv *)oct->priv;
 986
 987         if (droq->ops.poll_mode) {
 988                 droq->ops.napi_fn(droq);
 989         } else {
 990                 if (ret & MSIX_PO_INT) {
 991                         tasklet_schedule(&oct_priv->droq_tasklet);
 992                         return 1;
 993                 }
 994                 /* this will be flushed periodically by check iq db */
 995                 if (ret & MSIX_PI_INT)
 996                         return 0;
 997         }
 998         return 0;
 999 }
1000
1001 /**
1002  * \brief Droq packet processor sceduler
1003  * @param oct octeon device
1004  */
1005 static
1006 void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
1007 {
1008         struct octeon_device_priv *oct_priv =
1009                 (struct octeon_device_priv *)oct->priv;
1010         u64 oq_no;
1011         struct octeon_droq *droq;
1012
1013         if (oct->int_status & OCT_DEV_INTR_PKT_DATA) {
1014                 for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct);
1015                      oq_no++) {
1016                         if (!(oct->droq_intr & (1ULL << oq_no)))
1017                                 continue;
1018
1019                         droq = oct->droq[oq_no];
1020
1021                         if (droq->ops.poll_mode) {
1022                                 droq->ops.napi_fn(droq);
1023                                 oct_priv->napi_mask |= (1 << oq_no);
1024                         } else {
1025                                 tasklet_schedule(&oct_priv->droq_tasklet);
1026                         }
1027                 }
1028         }
1029 }
1030
1031 static irqreturn_t
1032 liquidio_msix_intr_handler(int irq __attribute__((unused)), void *dev)
1033 {
1034         u64 ret;
1035         struct octeon_ioq_vector *ioq_vector = (struct octeon_ioq_vector *)dev;
1036         struct octeon_device *oct = ioq_vector->oct_dev;
1037         struct octeon_droq *droq = oct->droq[ioq_vector->droq_index];
1038
1039         ret = oct->fn_list.msix_interrupt_handler(ioq_vector);
1040
1041         if ((ret & MSIX_PO_INT) || (ret & MSIX_PI_INT))
1042                 liquidio_schedule_msix_droq_pkt_handler(droq, ret);
1043
1044         return IRQ_HANDLED;
1045 }
1046
1047 /**
1048  * \brief Interrupt handler for octeon
1049  * @param irq unused
1050  * @param dev octeon device
1051  */
1052 static
1053 irqreturn_t liquidio_legacy_intr_handler(int irq __attribute__((unused)),
1054                                          void *dev)
1055 {
1056         struct octeon_device *oct = (struct octeon_device *)dev;
1057         irqreturn_t ret;
1058
1059         /* Disable our interrupts for the duration of ISR */
1060         oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1061
1062         ret = oct->fn_list.process_interrupt_regs(oct);
1063
1064         if (ret == IRQ_HANDLED)
1065                 liquidio_schedule_droq_pkt_handlers(oct);
1066
1067         /* Re-enable our interrupts  */
1068         if (!(atomic_read(&oct->status) == OCT_DEV_IN_RESET))
1069                 oct->fn_list.enable_interrupt(oct, OCTEON_ALL_INTR);
1070
1071         return ret;
1072 }
1073
1074 /**
1075  * \brief Setup interrupt for octeon device
1076  * @param oct octeon device
1077  *
1078  *  Enable interrupt in Octeon device as given in the PCI interrupt mask.
1079  */
1080 static int octeon_setup_interrupt(struct octeon_device *oct)
1081 {
1082         int irqret, err;
1083         struct msix_entry *msix_entries;
1084         int i;
1085         int num_ioq_vectors;
1086         int num_alloc_ioq_vectors;
1087
1088         if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
1089                 oct->num_msix_irqs = oct->sriov_info.num_pf_rings;
1090                 /* one non ioq interrupt for handling sli_mac_pf_int_sum */
1091                 oct->num_msix_irqs += 1;
1092
1093                 oct->msix_entries = kcalloc(
1094                     oct->num_msix_irqs, sizeof(struct msix_entry), GFP_KERNEL);
1095                 if (!oct->msix_entries)
1096                         return 1;
1097
1098                 msix_entries = (struct msix_entry *)oct->msix_entries;
1099                 /*Assumption is that pf msix vectors start from pf srn to pf to
1100                  * trs and not from 0. if not change this code
1101                  */
1102                 for (i = 0; i < oct->num_msix_irqs - 1; i++)
1103                         msix_entries[i].entry = oct->sriov_info.pf_srn + i;
1104                 msix_entries[oct->num_msix_irqs - 1].entry =
1105                     oct->sriov_info.trs;
1106                 num_alloc_ioq_vectors = pci_enable_msix_range(
1107                                                 oct->pci_dev, msix_entries,
1108                                                 oct->num_msix_irqs,
1109                                                 oct->num_msix_irqs);
1110                 if (num_alloc_ioq_vectors < 0) {
1111                         dev_err(&oct->pci_dev->dev, "unable to Allocate MSI-X interrupts\n");
1112                         kfree(oct->msix_entries);
1113                         oct->msix_entries = NULL;
1114                         return 1;
1115                 }
1116                 dev_dbg(&oct->pci_dev->dev, "OCTEON: Enough MSI-X interrupts are allocated...\n");
1117
1118                 num_ioq_vectors = oct->num_msix_irqs;
1119
1120                 /** For PF, there is one non-ioq interrupt handler */
1121                 num_ioq_vectors -= 1;
1122                 irqret = request_irq(msix_entries[num_ioq_vectors].vector,
1123                                      liquidio_legacy_intr_handler, 0, "octeon",
1124                                      oct);
1125                 if (irqret) {
1126                         dev_err(&oct->pci_dev->dev,
1127                                 "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1128                                 irqret);
1129                         pci_disable_msix(oct->pci_dev);
1130                         kfree(oct->msix_entries);
1131                         oct->msix_entries = NULL;
1132                         return 1;
1133                 }
1134
1135                 for (i = 0; i < num_ioq_vectors; i++) {
1136                         irqret = request_irq(msix_entries[i].vector,
1137                                              liquidio_msix_intr_handler, 0,
1138                                              "octeon", &oct->ioq_vector[i]);
1139                         if (irqret) {
1140                                 dev_err(&oct->pci_dev->dev,
1141                                         "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1142                                         irqret);
1143                                 /** Freeing the non-ioq irq vector here . */
1144                                 free_irq(msix_entries[num_ioq_vectors].vector,
1145                                          oct);
1146
1147                                 while (i) {
1148                                         i--;
1149                                         /** clearing affinity mask. */
1150                                         irq_set_affinity_hint(
1151                                                 msix_entries[i].vector, NULL);
1152                                         free_irq(msix_entries[i].vector,
1153                                                  &oct->ioq_vector[i]);
1154                                 }
1155                                 pci_disable_msix(oct->pci_dev);
1156                                 kfree(oct->msix_entries);
1157                                 oct->msix_entries = NULL;
1158                                 return 1;
1159                         }
1160                         oct->ioq_vector[i].vector = msix_entries[i].vector;
1161                         /* assign the cpu mask for this msix interrupt vector */
1162                         irq_set_affinity_hint(
1163                                         msix_entries[i].vector,
1164                                         (&oct->ioq_vector[i].affinity_mask));
1165                 }
1166                 dev_dbg(&oct->pci_dev->dev, "OCTEON[%d]: MSI-X enabled\n",
1167                         oct->octeon_id);
1168         } else {
1169                 err = pci_enable_msi(oct->pci_dev);
1170                 if (err)
1171                         dev_warn(&oct->pci_dev->dev, "Reverting to legacy interrupts. Error: %d\n",
1172                                  err);
1173                 else
1174                         oct->flags |= LIO_FLAG_MSI_ENABLED;
1175
1176                 irqret = request_irq(oct->pci_dev->irq,
1177                                      liquidio_legacy_intr_handler, IRQF_SHARED,
1178                                      "octeon", oct);
1179                 if (irqret) {
1180                         if (oct->flags & LIO_FLAG_MSI_ENABLED)
1181                                 pci_disable_msi(oct->pci_dev);
1182                         dev_err(&oct->pci_dev->dev, "Request IRQ failed with code: %d\n",
1183                                 irqret);
1184                         return 1;
1185                 }
1186         }
1187         return 0;
1188 }
1189
1190 /**
1191  * \brief PCI probe handler
1192  * @param pdev PCI device structure
1193  * @param ent unused
1194  */
1195 static int
1196 liquidio_probe(struct pci_dev *pdev,
1197                const struct pci_device_id *ent __attribute__((unused)))
1198 {
1199         struct octeon_device *oct_dev = NULL;
1200         struct handshake *hs;
1201
1202         oct_dev = octeon_allocate_device(pdev->device,
1203                                          sizeof(struct octeon_device_priv));
1204         if (!oct_dev) {
1205                 dev_err(&pdev->dev, "Unable to allocate device\n");
1206                 return -ENOMEM;
1207         }
1208
1209         if (pdev->device == OCTEON_CN23XX_PF_VID)
1210                 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED;
1211
1212         dev_info(&pdev->dev, "Initializing device %x:%x.\n",
1213                  (u32)pdev->vendor, (u32)pdev->device);
1214
1215         /* Assign octeon_device for this device to the private data area. */
1216         pci_set_drvdata(pdev, oct_dev);
1217
1218         /* set linux specific device pointer */
1219         oct_dev->pci_dev = (void *)pdev;
1220
1221         hs = &handshake[oct_dev->octeon_id];
1222         init_completion(&hs->init);
1223         init_completion(&hs->started);
1224         hs->pci_dev = pdev;
1225
1226         if (oct_dev->octeon_id == 0)
1227                 /* first LiquidIO NIC is detected */
1228                 complete(&first_stage);
1229
1230         if (octeon_device_init(oct_dev)) {
1231                 liquidio_remove(pdev);
1232                 return -ENOMEM;
1233         }
1234
1235         oct_dev->rx_pause = 1;
1236         oct_dev->tx_pause = 1;
1237
1238         dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n");
1239
1240         return 0;
1241 }
1242
1243 /**
1244  *\brief Destroy resources associated with octeon device
1245  * @param pdev PCI device structure
1246  * @param ent unused
1247  */
1248 static void octeon_destroy_resources(struct octeon_device *oct)
1249 {
1250         int i;
1251         struct msix_entry *msix_entries;
1252         struct octeon_device_priv *oct_priv =
1253                 (struct octeon_device_priv *)oct->priv;
1254
1255         struct handshake *hs;
1256
1257         switch (atomic_read(&oct->status)) {
1258         case OCT_DEV_RUNNING:
1259         case OCT_DEV_CORE_OK:
1260
1261                 /* No more instructions will be forwarded. */
1262                 atomic_set(&oct->status, OCT_DEV_IN_RESET);
1263
1264                 oct->app_mode = CVM_DRV_INVALID_APP;
1265                 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
1266                         lio_get_state_string(&oct->status));
1267
1268                 schedule_timeout_uninterruptible(HZ / 10);
1269
1270                 /* fallthrough */
1271         case OCT_DEV_HOST_OK:
1272
1273                 /* fallthrough */
1274         case OCT_DEV_CONSOLE_INIT_DONE:
1275                 /* Remove any consoles */
1276                 octeon_remove_consoles(oct);
1277
1278                 /* fallthrough */
1279         case OCT_DEV_IO_QUEUES_DONE:
1280                 if (wait_for_pending_requests(oct))
1281                         dev_err(&oct->pci_dev->dev, "There were pending requests\n");
1282
1283                 if (lio_wait_for_instr_fetch(oct))
1284                         dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
1285
1286                 /* Disable the input and output queues now. No more packets will
1287                  * arrive from Octeon, but we should wait for all packet
1288                  * processing to finish.
1289                  */
1290                 oct->fn_list.disable_io_queues(oct);
1291
1292                 if (lio_wait_for_oq_pkts(oct))
1293                         dev_err(&oct->pci_dev->dev, "OQ had pending packets\n");
1294
1295                 /* Disable interrupts  */
1296                 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1297
1298                 if (oct->msix_on) {
1299                         msix_entries = (struct msix_entry *)oct->msix_entries;
1300                         for (i = 0; i < oct->num_msix_irqs - 1; i++) {
1301                                 /* clear the affinity_cpumask */
1302                                 irq_set_affinity_hint(msix_entries[i].vector,
1303                                                       NULL);
1304                                 free_irq(msix_entries[i].vector,
1305                                          &oct->ioq_vector[i]);
1306                         }
1307                         /* non-iov vector's argument is oct struct */
1308                         free_irq(msix_entries[i].vector, oct);
1309
1310                         pci_disable_msix(oct->pci_dev);
1311                         kfree(oct->msix_entries);
1312                         oct->msix_entries = NULL;
1313                 } else {
1314                         /* Release the interrupt line */
1315                         free_irq(oct->pci_dev->irq, oct);
1316
1317                         if (oct->flags & LIO_FLAG_MSI_ENABLED)
1318                                 pci_disable_msi(oct->pci_dev);
1319                 }
1320
1321                 if (OCTEON_CN23XX_PF(oct))
1322                         octeon_free_ioq_vector(oct);
1323         /* fallthrough */
1324         case OCT_DEV_IN_RESET:
1325         case OCT_DEV_DROQ_INIT_DONE:
1326                 /*atomic_set(&oct->status, OCT_DEV_DROQ_INIT_DONE);*/
1327                 mdelay(100);
1328                 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
1329                         if (!(oct->io_qmask.oq & BIT_ULL(i)))
1330                                 continue;
1331                         octeon_delete_droq(oct, i);
1332                 }
1333
1334                 /* Force any pending handshakes to complete */
1335                 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
1336                         hs = &handshake[i];
1337
1338                         if (hs->pci_dev) {
1339                                 handshake[oct->octeon_id].init_ok = 0;
1340                                 complete(&handshake[oct->octeon_id].init);
1341                                 handshake[oct->octeon_id].started_ok = 0;
1342                                 complete(&handshake[oct->octeon_id].started);
1343                         }
1344                 }
1345
1346                 /* fallthrough */
1347         case OCT_DEV_RESP_LIST_INIT_DONE:
1348                 octeon_delete_response_list(oct);
1349
1350                 /* fallthrough */
1351         case OCT_DEV_INSTR_QUEUE_INIT_DONE:
1352                 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
1353                         if (!(oct->io_qmask.iq & BIT_ULL(i)))
1354                                 continue;
1355                         octeon_delete_instr_queue(oct, i);
1356                 }
1357                 /* fallthrough */
1358         case OCT_DEV_SC_BUFF_POOL_INIT_DONE:
1359                 octeon_free_sc_buffer_pool(oct);
1360
1361                 /* fallthrough */
1362         case OCT_DEV_DISPATCH_INIT_DONE:
1363                 octeon_delete_dispatch_list(oct);
1364                 cancel_delayed_work_sync(&oct->nic_poll_work.work);
1365
1366                 /* fallthrough */
1367         case OCT_DEV_PCI_MAP_DONE:
1368                 /* Soft reset the octeon device before exiting */
1369                 if ((!OCTEON_CN23XX_PF(oct)) || !oct->octeon_id)
1370                         oct->fn_list.soft_reset(oct);
1371
1372                 octeon_unmap_pci_barx(oct, 0);
1373                 octeon_unmap_pci_barx(oct, 1);
1374
1375                 /* fallthrough */
1376         case OCT_DEV_BEGIN_STATE:
1377                 /* Disable the device, releasing the PCI INT */
1378                 pci_disable_device(oct->pci_dev);
1379
1380                 /* Nothing to be done here either */
1381                 break;
1382         }                       /* end switch (oct->status) */
1383
1384         tasklet_kill(&oct_priv->droq_tasklet);
1385 }
1386
1387 /**
1388  * \brief Callback for rx ctrl
1389  * @param status status of request
1390  * @param buf pointer to resp structure
1391  */
1392 static void rx_ctl_callback(struct octeon_device *oct,
1393                             u32 status,
1394                             void *buf)
1395 {
1396         struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
1397         struct liquidio_rx_ctl_context *ctx;
1398
1399         ctx  = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1400
1401         oct = lio_get_device(ctx->octeon_id);
1402         if (status)
1403                 dev_err(&oct->pci_dev->dev, "rx ctl instruction failed. Status: %llx\n",
1404                         CVM_CAST64(status));
1405         WRITE_ONCE(ctx->cond, 1);
1406
1407         /* This barrier is required to be sure that the response has been
1408          * written fully before waking up the handler
1409          */
1410         wmb();
1411
1412         wake_up_interruptible(&ctx->wc);
1413 }
1414
1415 /**
1416  * \brief Send Rx control command
1417  * @param lio per-network private data
1418  * @param start_stop whether to start or stop
1419  */
1420 static void send_rx_ctrl_cmd(struct lio *lio, int start_stop)
1421 {
1422         struct octeon_soft_command *sc;
1423         struct liquidio_rx_ctl_context *ctx;
1424         union octnet_cmd *ncmd;
1425         int ctx_size = sizeof(struct liquidio_rx_ctl_context);
1426         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1427         int retval;
1428
1429         if (oct->props[lio->ifidx].rx_on == start_stop)
1430                 return;
1431
1432         sc = (struct octeon_soft_command *)
1433                 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE,
1434                                           16, ctx_size);
1435
1436         ncmd = (union octnet_cmd *)sc->virtdptr;
1437         ctx  = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1438
1439         WRITE_ONCE(ctx->cond, 0);
1440         ctx->octeon_id = lio_get_device_id(oct);
1441         init_waitqueue_head(&ctx->wc);
1442
1443         ncmd->u64 = 0;
1444         ncmd->s.cmd = OCTNET_CMD_RX_CTL;
1445         ncmd->s.param1 = start_stop;
1446
1447         octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3));
1448
1449         sc->iq_no = lio->linfo.txpciq[0].s.q_no;
1450
1451         octeon_prepare_soft_command(oct, sc, OPCODE_NIC,
1452                                     OPCODE_NIC_CMD, 0, 0, 0);
1453
1454         sc->callback = rx_ctl_callback;
1455         sc->callback_arg = sc;
1456         sc->wait_time = 5000;
1457
1458         retval = octeon_send_soft_command(oct, sc);
1459         if (retval == IQ_SEND_FAILED) {
1460                 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n");
1461         } else {
1462                 /* Sleep on a wait queue till the cond flag indicates that the
1463                  * response arrived or timed-out.
1464                  */
1465                 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR)
1466                         return;
1467                 oct->props[lio->ifidx].rx_on = start_stop;
1468         }
1469
1470         octeon_free_soft_command(oct, sc);
1471 }
1472
1473 /**
1474  * \brief Destroy NIC device interface
1475  * @param oct octeon device
1476  * @param ifidx which interface to destroy
1477  *
1478  * Cleanup associated with each interface for an Octeon device  when NIC
1479  * module is being unloaded or if initialization fails during load.
1480  */
1481 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx)
1482 {
1483         struct net_device *netdev = oct->props[ifidx].netdev;
1484         struct lio *lio;
1485         struct napi_struct *napi, *n;
1486
1487         if (!netdev) {
1488                 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n",
1489                         __func__, ifidx);
1490                 return;
1491         }
1492
1493         lio = GET_LIO(netdev);
1494
1495         dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n");
1496
1497         if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING)
1498                 liquidio_stop(netdev);
1499
1500         if (oct->props[lio->ifidx].napi_enabled == 1) {
1501                 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
1502                         napi_disable(napi);
1503
1504                 oct->props[lio->ifidx].napi_enabled = 0;
1505
1506                 if (OCTEON_CN23XX_PF(oct))
1507                         oct->droq[0]->ops.poll_mode = 0;
1508         }
1509
1510         if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED)
1511                 unregister_netdev(netdev);
1512
1513         cleanup_link_status_change_wq(netdev);
1514
1515         delete_glists(lio);
1516
1517         free_netdev(netdev);
1518
1519         oct->props[ifidx].gmxport = -1;
1520
1521         oct->props[ifidx].netdev = NULL;
1522 }
1523
1524 /**
1525  * \brief Stop complete NIC functionality
1526  * @param oct octeon device
1527  */
1528 static int liquidio_stop_nic_module(struct octeon_device *oct)
1529 {
1530         int i, j;
1531         struct lio *lio;
1532
1533         dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n");
1534         if (!oct->ifcount) {
1535                 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n");
1536                 return 1;
1537         }
1538
1539         spin_lock_bh(&oct->cmd_resp_wqlock);
1540         oct->cmd_resp_state = OCT_DRV_OFFLINE;
1541         spin_unlock_bh(&oct->cmd_resp_wqlock);
1542
1543         for (i = 0; i < oct->ifcount; i++) {
1544                 lio = GET_LIO(oct->props[i].netdev);
1545                 for (j = 0; j < lio->linfo.num_rxpciq; j++)
1546                         octeon_unregister_droq_ops(oct,
1547                                                    lio->linfo.rxpciq[j].s.q_no);
1548         }
1549
1550         for (i = 0; i < oct->ifcount; i++)
1551                 liquidio_destroy_nic_device(oct, i);
1552
1553         dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n");
1554         return 0;
1555 }
1556
1557 /**
1558  * \brief Cleans up resources at unload time
1559  * @param pdev PCI device structure
1560  */
1561 static void liquidio_remove(struct pci_dev *pdev)
1562 {
1563         struct octeon_device *oct_dev = pci_get_drvdata(pdev);
1564
1565         dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n");
1566
1567         if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP))
1568                 liquidio_stop_nic_module(oct_dev);
1569
1570         /* Reset the octeon device and cleanup all memory allocated for
1571          * the octeon device by driver.
1572          */
1573         octeon_destroy_resources(oct_dev);
1574
1575         dev_info(&oct_dev->pci_dev->dev, "Device removed\n");
1576
1577         /* This octeon device has been removed. Update the global
1578          * data structure to reflect this. Free the device structure.
1579          */
1580         octeon_free_device_mem(oct_dev);
1581 }
1582
1583 /**
1584  * \brief Identify the Octeon device and to map the BAR address space
1585  * @param oct octeon device
1586  */
1587 static int octeon_chip_specific_setup(struct octeon_device *oct)
1588 {
1589         u32 dev_id, rev_id;
1590         int ret = 1;
1591         char *s;
1592
1593         pci_read_config_dword(oct->pci_dev, 0, &dev_id);
1594         pci_read_config_dword(oct->pci_dev, 8, &rev_id);
1595         oct->rev_id = rev_id & 0xff;
1596
1597         switch (dev_id) {
1598         case OCTEON_CN68XX_PCIID:
1599                 oct->chip_id = OCTEON_CN68XX;
1600                 ret = lio_setup_cn68xx_octeon_device(oct);
1601                 s = "CN68XX";
1602                 break;
1603
1604         case OCTEON_CN66XX_PCIID:
1605                 oct->chip_id = OCTEON_CN66XX;
1606                 ret = lio_setup_cn66xx_octeon_device(oct);
1607                 s = "CN66XX";
1608                 break;
1609
1610         case OCTEON_CN23XX_PCIID_PF:
1611                 oct->chip_id = OCTEON_CN23XX_PF_VID;
1612                 ret = setup_cn23xx_octeon_pf_device(oct);
1613                 s = "CN23XX";
1614                 break;
1615
1616         default:
1617                 s = "?";
1618                 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n",
1619                         dev_id);
1620         }
1621
1622         if (!ret)
1623                 dev_info(&oct->pci_dev->dev, "%s PASS%d.%d %s Version: %s\n", s,
1624                          OCTEON_MAJOR_REV(oct),
1625                          OCTEON_MINOR_REV(oct),
1626                          octeon_get_conf(oct)->card_name,
1627                          LIQUIDIO_VERSION);
1628
1629         return ret;
1630 }
1631
1632 /**
1633  * \brief PCI initialization for each Octeon device.
1634  * @param oct octeon device
1635  */
1636 static int octeon_pci_os_setup(struct octeon_device *oct)
1637 {
1638         /* setup PCI stuff first */
1639         if (pci_enable_device(oct->pci_dev)) {
1640                 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n");
1641                 return 1;
1642         }
1643
1644         if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) {
1645                 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n");
1646                 return 1;
1647         }
1648
1649         /* Enable PCI DMA Master. */
1650         pci_set_master(oct->pci_dev);
1651
1652         return 0;
1653 }
1654
1655 static inline int skb_iq(struct lio *lio, struct sk_buff *skb)
1656 {
1657         int q = 0;
1658
1659         if (netif_is_multiqueue(lio->netdev))
1660                 q = skb->queue_mapping % lio->linfo.num_txpciq;
1661
1662         return q;
1663 }
1664
1665 /**
1666  * \brief Check Tx queue state for a given network buffer
1667  * @param lio per-network private data
1668  * @param skb network buffer
1669  */
1670 static inline int check_txq_state(struct lio *lio, struct sk_buff *skb)
1671 {
1672         int q = 0, iq = 0;
1673
1674         if (netif_is_multiqueue(lio->netdev)) {
1675                 q = skb->queue_mapping;
1676                 iq = lio->linfo.txpciq[(q % (lio->linfo.num_txpciq))].s.q_no;
1677         } else {
1678                 iq = lio->txq;
1679                 q = iq;
1680         }
1681
1682         if (octnet_iq_is_full(lio->oct_dev, iq))
1683                 return 0;
1684
1685         if (__netif_subqueue_stopped(lio->netdev, q)) {
1686                 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, tx_restart, 1);
1687                 wake_q(lio->netdev, q);
1688         }
1689         return 1;
1690 }
1691
1692 /**
1693  * \brief Unmap and free network buffer
1694  * @param buf buffer
1695  */
1696 static void free_netbuf(void *buf)
1697 {
1698         struct sk_buff *skb;
1699         struct octnet_buf_free_info *finfo;
1700         struct lio *lio;
1701
1702         finfo = (struct octnet_buf_free_info *)buf;
1703         skb = finfo->skb;
1704         lio = finfo->lio;
1705
1706         dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len,
1707                          DMA_TO_DEVICE);
1708
1709         check_txq_state(lio, skb);
1710
1711         tx_buffer_free(skb);
1712 }
1713
1714 /**
1715  * \brief Unmap and free gather buffer
1716  * @param buf buffer
1717  */
1718 static void free_netsgbuf(void *buf)
1719 {
1720         struct octnet_buf_free_info *finfo;
1721         struct sk_buff *skb;
1722         struct lio *lio;
1723         struct octnic_gather *g;
1724         int i, frags, iq;
1725
1726         finfo = (struct octnet_buf_free_info *)buf;
1727         skb = finfo->skb;
1728         lio = finfo->lio;
1729         g = finfo->g;
1730         frags = skb_shinfo(skb)->nr_frags;
1731
1732         dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1733                          g->sg[0].ptr[0], (skb->len - skb->data_len),
1734                          DMA_TO_DEVICE);
1735
1736         i = 1;
1737         while (frags--) {
1738                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1739
1740                 pci_unmap_page((lio->oct_dev)->pci_dev,
1741                                g->sg[(i >> 2)].ptr[(i & 3)],
1742                                frag->size, DMA_TO_DEVICE);
1743                 i++;
1744         }
1745
1746         dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev,
1747                                 g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE);
1748
1749         iq = skb_iq(lio, skb);
1750         spin_lock(&lio->glist_lock[iq]);
1751         list_add_tail(&g->list, &lio->glist[iq]);
1752         spin_unlock(&lio->glist_lock[iq]);
1753
1754         check_txq_state(lio, skb);     /* mq support: sub-queue state check */
1755
1756         tx_buffer_free(skb);
1757 }
1758
1759 /**
1760  * \brief Unmap and free gather buffer with response
1761  * @param buf buffer
1762  */
1763 static void free_netsgbuf_with_resp(void *buf)
1764 {
1765         struct octeon_soft_command *sc;
1766         struct octnet_buf_free_info *finfo;
1767         struct sk_buff *skb;
1768         struct lio *lio;
1769         struct octnic_gather *g;
1770         int i, frags, iq;
1771
1772         sc = (struct octeon_soft_command *)buf;
1773         skb = (struct sk_buff *)sc->callback_arg;
1774         finfo = (struct octnet_buf_free_info *)&skb->cb;
1775
1776         lio = finfo->lio;
1777         g = finfo->g;
1778         frags = skb_shinfo(skb)->nr_frags;
1779
1780         dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1781                          g->sg[0].ptr[0], (skb->len - skb->data_len),
1782                          DMA_TO_DEVICE);
1783
1784         i = 1;
1785         while (frags--) {
1786                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1787
1788                 pci_unmap_page((lio->oct_dev)->pci_dev,
1789                                g->sg[(i >> 2)].ptr[(i & 3)],
1790                                frag->size, DMA_TO_DEVICE);
1791                 i++;
1792         }
1793
1794         dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev,
1795                                 g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE);
1796
1797         iq = skb_iq(lio, skb);
1798
1799         spin_lock(&lio->glist_lock[iq]);
1800         list_add_tail(&g->list, &lio->glist[iq]);
1801         spin_unlock(&lio->glist_lock[iq]);
1802
1803         /* Don't free the skb yet */
1804
1805         check_txq_state(lio, skb);
1806 }
1807
1808 /**
1809  * \brief Adjust ptp frequency
1810  * @param ptp PTP clock info
1811  * @param ppb how much to adjust by, in parts-per-billion
1812  */
1813 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1814 {
1815         struct lio *lio = container_of(ptp, struct lio, ptp_info);
1816         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1817         u64 comp, delta;
1818         unsigned long flags;
1819         bool neg_adj = false;
1820
1821         if (ppb < 0) {
1822                 neg_adj = true;
1823                 ppb = -ppb;
1824         }
1825
1826         /* The hardware adds the clock compensation value to the
1827          * PTP clock on every coprocessor clock cycle, so we
1828          * compute the delta in terms of coprocessor clocks.
1829          */
1830         delta = (u64)ppb << 32;
1831         do_div(delta, oct->coproc_clock_rate);
1832
1833         spin_lock_irqsave(&lio->ptp_lock, flags);
1834         comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP);
1835         if (neg_adj)
1836                 comp -= delta;
1837         else
1838                 comp += delta;
1839         lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP);
1840         spin_unlock_irqrestore(&lio->ptp_lock, flags);
1841
1842         return 0;
1843 }
1844
1845 /**
1846  * \brief Adjust ptp time
1847  * @param ptp PTP clock info
1848  * @param delta how much to adjust by, in nanosecs
1849  */
1850 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
1851 {
1852         unsigned long flags;
1853         struct lio *lio = container_of(ptp, struct lio, ptp_info);
1854
1855         spin_lock_irqsave(&lio->ptp_lock, flags);
1856         lio->ptp_adjust += delta;
1857         spin_unlock_irqrestore(&lio->ptp_lock, flags);
1858
1859         return 0;
1860 }
1861
1862 /**
1863  * \brief Get hardware clock time, including any adjustment
1864  * @param ptp PTP clock info
1865  * @param ts timespec
1866  */
1867 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp,
1868                                 struct timespec64 *ts)
1869 {
1870         u64 ns;
1871         unsigned long flags;
1872         struct lio *lio = container_of(ptp, struct lio, ptp_info);
1873         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1874
1875         spin_lock_irqsave(&lio->ptp_lock, flags);
1876         ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI);
1877         ns += lio->ptp_adjust;
1878         spin_unlock_irqrestore(&lio->ptp_lock, flags);
1879
1880         *ts = ns_to_timespec64(ns);
1881
1882         return 0;
1883 }
1884
1885 /**
1886  * \brief Set hardware clock time. Reset adjustment
1887  * @param ptp PTP clock info
1888  * @param ts timespec
1889  */
1890 static int liquidio_ptp_settime(struct ptp_clock_info *ptp,
1891                                 const struct timespec64 *ts)
1892 {
1893         u64 ns;
1894         unsigned long flags;
1895         struct lio *lio = container_of(ptp, struct lio, ptp_info);
1896         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1897
1898         ns = timespec_to_ns(ts);
1899
1900         spin_lock_irqsave(&lio->ptp_lock, flags);
1901         lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI);
1902         lio->ptp_adjust = 0;
1903         spin_unlock_irqrestore(&lio->ptp_lock, flags);
1904
1905         return 0;
1906 }
1907
1908 /**
1909  * \brief Check if PTP is enabled
1910  * @param ptp PTP clock info
1911  * @param rq request
1912  * @param on is it on
1913  */
1914 static int
1915 liquidio_ptp_enable(struct ptp_clock_info *ptp __attribute__((unused)),
1916                     struct ptp_clock_request *rq __attribute__((unused)),
1917                     int on __attribute__((unused)))
1918 {
1919         return -EOPNOTSUPP;
1920 }
1921
1922 /**
1923  * \brief Open PTP clock source
1924  * @param netdev network device
1925  */
1926 static void oct_ptp_open(struct net_device *netdev)
1927 {
1928         struct lio *lio = GET_LIO(netdev);
1929         struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1930
1931         spin_lock_init(&lio->ptp_lock);
1932
1933         snprintf(lio->ptp_info.name, 16, "%s", netdev->name);
1934         lio->ptp_info.owner = THIS_MODULE;
1935         lio->ptp_info.max_adj = 250000000;
1936         lio->ptp_info.n_alarm = 0;
1937         lio->ptp_info.n_ext_ts = 0;
1938         lio->ptp_info.n_per_out = 0;
1939         lio->ptp_info.pps = 0;
1940         lio->ptp_info.adjfreq = liquidio_ptp_adjfreq;
1941         lio->ptp_info.adjtime = liquidio_ptp_adjtime;
1942         lio->ptp_info.gettime64 = liquidio_ptp_gettime;
1943         lio->ptp_info.settime64 = liquidio_ptp_settime;
1944         lio->ptp_info.enable = liquidio_ptp_enable;
1945
1946         lio->ptp_adjust = 0;
1947
1948         lio->ptp_clock = ptp_clock_register(&lio->ptp_info,
1949                                              &oct->pci_dev->dev);
1950
1951         if (IS_ERR(lio->ptp_clock))
1952                 lio->ptp_clock = NULL;
1953 }
1954
1955 /**
1956  * \brief Init PTP clock
1957  * @param oct octeon device
1958  */
1959 static void liquidio_ptp_init(struct octeon_device *oct)
1960 {
1961         u64 clock_comp, cfg;
1962
1963         clock_comp = (u64)NSEC_PER_SEC << 32;
1964         do_div(clock_comp, oct->coproc_clock_rate);
1965         lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP);
1966
1967         /* Enable */
1968         cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG);
1969         lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG);
1970 }
1971
1972 /**
1973  * \brief Load firmware to device
1974  * @param oct octeon device
1975  *
1976  * Maps device to firmware filename, requests firmware, and downloads it
1977  */
1978 static int load_firmware(struct octeon_device *oct)
1979 {
1980         int ret = 0;
1981         const struct firmware *fw;
1982         char fw_name[LIO_MAX_FW_FILENAME_LEN];
1983         char *tmp_fw_type;
1984
1985         if (strncmp(fw_type, LIO_FW_NAME_TYPE_NONE,
1986                     sizeof(LIO_FW_NAME_TYPE_NONE)) == 0) {
1987                 dev_info(&oct->pci_dev->dev, "Skipping firmware load\n");
1988                 return ret;
1989         }
1990
1991         if (fw_type[0] == '\0')
1992                 tmp_fw_type = LIO_FW_NAME_TYPE_NIC;
1993         else
1994                 tmp_fw_type = fw_type;
1995
1996         sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME,
1997                 octeon_get_conf(oct)->card_name, tmp_fw_type,
1998                 LIO_FW_NAME_SUFFIX);
1999
2000         ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev);
2001         if (ret) {
2002                 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n.",
2003                         fw_name);
2004                 release_firmware(fw);
2005                 return ret;
2006         }
2007
2008         ret = octeon_download_firmware(oct, fw->data, fw->size);
2009
2010         release_firmware(fw);
2011
2012         return ret;
2013 }
2014
2015 /**
2016  * \brief Setup output queue
2017  * @param oct octeon device
2018  * @param q_no which queue
2019  * @param num_descs how many descriptors
2020  * @param desc_size size of each descriptor
2021  * @param app_ctx application context
2022  */
2023 static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs,
2024                              int desc_size, void *app_ctx)
2025 {
2026         int ret_val = 0;
2027
2028         dev_dbg(&oct->pci_dev->dev, "Creating Droq: %d\n", q_no);
2029         /* droq creation and local register settings. */
2030         ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx);
2031         if (ret_val < 0)
2032                 return ret_val;
2033
2034         if (ret_val == 1) {
2035                 dev_dbg(&oct->pci_dev->dev, "Using default droq %d\n", q_no);
2036                 return 0;
2037         }
2038         /* tasklet creation for the droq */
2039
2040         /* Enable the droq queues */
2041         octeon_set_droq_pkt_op(oct, q_no, 1);
2042
2043         /* Send Credit for Octeon Output queues. Credits are always
2044          * sent after the output queue is enabled.
2045          */
2046         writel(oct->droq[q_no]->max_count,
2047                oct->droq[q_no]->pkts_credit_reg);
2048
2049         return ret_val;
2050 }
2051
2052 /**
2053  * \brief Callback for getting interface configuration
2054  * @param status status of request
2055  * @param buf pointer to resp structure
2056  */
2057 static void if_cfg_callback(struct octeon_device *oct,
2058                             u32 status __attribute__((unused)),
2059                             void *buf)
2060 {
2061         struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
2062         struct liquidio_if_cfg_resp *resp;
2063         struct liquidio_if_cfg_context *ctx;
2064
2065         resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
2066         ctx  = (struct liquidio_if_cfg_context *)sc->ctxptr;
2067
2068         oct = lio_get_device(ctx->octeon_id);
2069         if (resp->status)
2070                 dev_err(&oct->pci_dev->dev, "nic if cfg instruction failed. Status: %llx\n",
2071                         CVM_CAST64(resp->status));
2072         WRITE_ONCE(ctx->cond, 1);
2073
2074         snprintf(oct->fw_info.liquidio_firmware_version, 32, "%s",
2075                  resp->cfg_info.liquidio_firmware_version);
2076
2077         /* This barrier is required to be sure that the response has been
2078          * written fully before waking up the handler
2079          */
2080         wmb();
2081
2082         wake_up_interruptible(&ctx->wc);
2083 }
2084
2085 /**
2086  * \brief Select queue based on hash
2087  * @param dev Net device
2088  * @param skb sk_buff structure
2089  * @returns selected queue number
2090  */
2091 static u16 select_q(struct net_device *dev, struct sk_buff *skb,
2092                     void *accel_priv __attribute__((unused)),
2093                     select_queue_fallback_t fallback __attribute__((unused)))
2094 {
2095         u32 qindex = 0;
2096         struct lio *lio;
2097
2098         lio = GET_LIO(dev);
2099         qindex = skb_tx_hash(dev, skb);
2100
2101         return (u16)(qindex % (lio->linfo.num_txpciq));
2102 }
2103
2104 /** Routine to push packets arriving on Octeon interface upto network layer.
2105  * @param oct_id   - octeon device id.
2106  * @param skbuff   - skbuff struct to be passed to network layer.
2107  * @param len      - size of total data received.
2108  * @param rh       - Control header associated with the packet
2109  * @param param    - additional control data with the packet
2110  * @param arg      - farg registered in droq_ops
2111  */
2112 static void
2113 liquidio_push_packet(u32 octeon_id __attribute__((unused)),
2114                      void *skbuff,
2115                      u32 len,
2116                      union octeon_rh *rh,
2117                      void *param,
2118                      void *arg)
2119 {
2120         struct napi_struct *napi = param;
2121         struct sk_buff *skb = (struct sk_buff *)skbuff;
2122         struct skb_shared_hwtstamps *shhwtstamps;
2123         u64 ns;
2124         u16 vtag = 0;
2125         struct net_device *netdev = (struct net_device *)arg;
2126         struct octeon_droq *droq = container_of(param, struct octeon_droq,
2127                                                 napi);
2128         if (netdev) {
2129                 int packet_was_received;
2130                 struct lio *lio = GET_LIO(netdev);
2131                 struct octeon_device *oct = lio->oct_dev;
2132
2133                 /* Do not proceed if the interface is not in RUNNING state. */
2134                 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) {
2135                         recv_buffer_free(skb);
2136                         droq->stats.rx_dropped++;
2137                         return;
2138                 }
2139
2140                 skb->dev = netdev;
2141
2142                 skb_record_rx_queue(skb, droq->q_no);
2143                 if (likely(len > MIN_SKB_SIZE)) {
2144                         struct octeon_skb_page_info *pg_info;
2145                         unsigned char *va;
2146
2147                         pg_info = ((struct octeon_skb_page_info *)(skb->cb));
2148                         if (pg_info->page) {
2149                                 /* For Paged allocation use the frags */
2150                                 va = page_address(pg_info->page) +
2151                                         pg_info->page_offset;
2152                                 memcpy(skb->data, va, MIN_SKB_SIZE);
2153                                 skb_put(skb, MIN_SKB_SIZE);
2154                                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
2155                                                 pg_info->page,
2156                                                 pg_info->page_offset +
2157                                                 MIN_SKB_SIZE,
2158                                                 len - MIN_SKB_SIZE,
2159                                                 LIO_RXBUFFER_SZ);
2160                         }
2161                 } else {
2162                         struct octeon_skb_page_info *pg_info =
2163                                 ((struct octeon_skb_page_info *)(skb->cb));
2164                         skb_copy_to_linear_data(skb, page_address(pg_info->page)
2165                                                 + pg_info->page_offset, len);
2166                         skb_put(skb, len);
2167                         put_page(pg_info->page);
2168                 }
2169
2170                 if (((oct->chip_id == OCTEON_CN66XX) ||
2171                      (oct->chip_id == OCTEON_CN68XX)) &&
2172                     ptp_enable) {
2173                         if (rh->r_dh.has_hwtstamp) {
2174                                 /* timestamp is included from the hardware at
2175                                  * the beginning of the packet.
2176                                  */
2177                                 if (ifstate_check
2178                                     (lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED)) {
2179                                         /* Nanoseconds are in the first 64-bits
2180                                          * of the packet.
2181                                          */
2182                                         memcpy(&ns, (skb->data), sizeof(ns));
2183                                         shhwtstamps = skb_hwtstamps(skb);
2184                                         shhwtstamps->hwtstamp =
2185                                                 ns_to_ktime(ns +
2186                                                             lio->ptp_adjust);
2187                                 }
2188                                 skb_pull(skb, sizeof(ns));
2189                         }
2190                 }
2191
2192                 skb->protocol = eth_type_trans(skb, skb->dev);
2193                 if ((netdev->features & NETIF_F_RXCSUM) &&
2194                     (((rh->r_dh.encap_on) &&
2195                       (rh->r_dh.csum_verified & CNNIC_TUN_CSUM_VERIFIED)) ||
2196                      (!(rh->r_dh.encap_on) &&
2197                       (rh->r_dh.csum_verified & CNNIC_CSUM_VERIFIED))))
2198                         /* checksum has already been verified */
2199                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2200                 else
2201                         skb->ip_summed = CHECKSUM_NONE;
2202
2203                 /* Setting Encapsulation field on basis of status received
2204                  * from the firmware
2205                  */
2206                 if (rh->r_dh.encap_on) {
2207                         skb->encapsulation = 1;
2208                         skb->csum_level = 1;
2209                         droq->stats.rx_vxlan++;
2210                 }
2211
2212                 /* inbound VLAN tag */
2213                 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2214                     (rh->r_dh.vlan != 0)) {
2215                         u16 vid = rh->r_dh.vlan;
2216                         u16 priority = rh->r_dh.priority;
2217
2218                         vtag = priority << 13 | vid;
2219                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag);
2220                 }
2221
2222                 packet_was_received = napi_gro_receive(napi, skb) != GRO_DROP;
2223
2224                 if (packet_was_received) {
2225                         droq->stats.rx_bytes_received += len;
2226                         droq->stats.rx_pkts_received++;
2227                         netdev->last_rx = jiffies;
2228                 } else {
2229                         droq->stats.rx_dropped++;
2230                         netif_info(lio, rx_err, lio->netdev,
2231                                    "droq:%d  error rx_dropped:%llu\n",
2232                                    droq->q_no, droq->stats.rx_dropped);
2233                 }
2234
2235         } else {
2236                 recv_buffer_free(skb);
2237         }
2238 }
2239
2240 /**
2241  * \brief wrapper for calling napi_schedule
2242  * @param param parameters to pass to napi_schedule
2243  *
2244  * Used when scheduling on different CPUs
2245  */
2246 static void napi_schedule_wrapper(void *param)
2247 {
2248         struct napi_struct *napi = param;
2249
2250         napi_schedule(napi);
2251 }
2252
2253 /**
2254  * \brief callback when receive interrupt occurs and we are in NAPI mode
2255  * @param arg pointer to octeon output queue
2256  */
2257 static void liquidio_napi_drv_callback(void *arg)
2258 {
2259         struct octeon_droq *droq = arg;
2260         int this_cpu = smp_processor_id();
2261
2262         if (droq->cpu_id == this_cpu) {
2263                 napi_schedule(&droq->napi);
2264         } else {
2265                 struct call_single_data *csd = &droq->csd;
2266
2267                 csd->func = napi_schedule_wrapper;
2268                 csd->info = &droq->napi;
2269                 csd->flags = 0;
2270
2271                 smp_call_function_single_async(droq->cpu_id, csd);
2272         }
2273 }
2274
2275 /**
2276  * \brief Entry point for NAPI polling
2277  * @param napi NAPI structure
2278  * @param budget maximum number of items to process
2279  */
2280 static int liquidio_napi_poll(struct napi_struct *napi, int budget)
2281 {
2282         struct octeon_droq *droq;
2283         int work_done;
2284         int tx_done = 0, iq_no;
2285         struct octeon_instr_queue *iq;
2286         struct octeon_device *oct;
2287
2288         droq = container_of(napi, struct octeon_droq, napi);
2289         oct = droq->oct_dev;
2290         iq_no = droq->q_no;
2291         /* Handle Droq descriptors */
2292         work_done = octeon_process_droq_poll_cmd(oct, droq->q_no,
2293                                                  POLL_EVENT_PROCESS_PKTS,
2294                                                  budget);
2295
2296         /* Flush the instruction queue */
2297         iq = oct->instr_queue[iq_no];
2298         if (iq) {
2299                 /* Process iq buffers with in the budget limits */
2300                 tx_done = octeon_flush_iq(oct, iq, 1, budget);
2301                 /* Update iq read-index rather than waiting for next interrupt.
2302                  * Return back if tx_done is false.
2303                  */
2304                 update_txq_status(oct, iq_no);
2305                 /*tx_done = (iq->flush_index == iq->octeon_read_index);*/
2306         } else {
2307                 dev_err(&oct->pci_dev->dev, "%s:  iq (%d) num invalid\n",
2308                         __func__, iq_no);
2309         }
2310
2311         if ((work_done < budget) && (tx_done)) {
2312                 napi_complete(napi);
2313                 octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no,
2314                                              POLL_EVENT_ENABLE_INTR, 0);
2315                 return 0;
2316         }
2317
2318         return (!tx_done) ? (budget) : (work_done);
2319 }
2320
2321 /**
2322  * \brief Setup input and output queues
2323  * @param octeon_dev octeon device
2324  * @param ifidx  Interface Index
2325  *
2326  * Note: Queues are with respect to the octeon device. Thus
2327  * an input queue is for egress packets, and output queues
2328  * are for ingress packets.
2329  */
2330 static inline int setup_io_queues(struct octeon_device *octeon_dev,
2331                                   int ifidx)
2332 {
2333         struct octeon_droq_ops droq_ops;
2334         struct net_device *netdev;
2335         static int cpu_id;
2336         static int cpu_id_modulus;
2337         struct octeon_droq *droq;
2338         struct napi_struct *napi;
2339         int q, q_no, retval = 0;
2340         struct lio *lio;
2341         int num_tx_descs;
2342
2343         netdev = octeon_dev->props[ifidx].netdev;
2344
2345         lio = GET_LIO(netdev);
2346
2347         memset(&droq_ops, 0, sizeof(struct octeon_droq_ops));
2348
2349         droq_ops.fptr = liquidio_push_packet;
2350         droq_ops.farg = (void *)netdev;
2351
2352         droq_ops.poll_mode = 1;
2353         droq_ops.napi_fn = liquidio_napi_drv_callback;
2354         cpu_id = 0;
2355         cpu_id_modulus = num_present_cpus();
2356
2357         /* set up DROQs. */
2358         for (q = 0; q < lio->linfo.num_rxpciq; q++) {
2359                 q_no = lio->linfo.rxpciq[q].s.q_no;
2360                 dev_dbg(&octeon_dev->pci_dev->dev,
2361                         "setup_io_queues index:%d linfo.rxpciq.s.q_no:%d\n",
2362                         q, q_no);
2363                 retval = octeon_setup_droq(octeon_dev, q_no,
2364                                            CFG_GET_NUM_RX_DESCS_NIC_IF
2365                                                    (octeon_get_conf(octeon_dev),
2366                                                    lio->ifidx),
2367                                            CFG_GET_NUM_RX_BUF_SIZE_NIC_IF
2368                                                    (octeon_get_conf(octeon_dev),
2369                                                    lio->ifidx), NULL);
2370                 if (retval) {
2371                         dev_err(&octeon_dev->pci_dev->dev,
2372                                 "%s : Runtime DROQ(RxQ) creation failed.\n",
2373                                 __func__);
2374                         return 1;
2375                 }
2376
2377                 droq = octeon_dev->droq[q_no];
2378                 napi = &droq->napi;
2379                 dev_dbg(&octeon_dev->pci_dev->dev, "netif_napi_add netdev:%llx oct:%llx pf_num:%d\n",
2380                         (u64)netdev, (u64)octeon_dev, octeon_dev->pf_num);
2381                 netif_napi_add(netdev, napi, liquidio_napi_poll, 64);
2382
2383                 /* designate a CPU for this droq */
2384                 droq->cpu_id = cpu_id;
2385                 cpu_id++;
2386                 if (cpu_id >= cpu_id_modulus)
2387                         cpu_id = 0;
2388
2389                 octeon_register_droq_ops(octeon_dev, q_no, &droq_ops);
2390         }
2391
2392         if (OCTEON_CN23XX_PF(octeon_dev)) {
2393                 /* 23XX PF can receive control messages (via the first PF-owned
2394                  * droq) from the firmware even if the ethX interface is down,
2395                  * so that's why poll_mode must be off for the first droq.
2396                  */
2397                 octeon_dev->droq[0]->ops.poll_mode = 0;
2398         }
2399
2400         /* set up IQs. */
2401         for (q = 0; q < lio->linfo.num_txpciq; q++) {
2402                 num_tx_descs = CFG_GET_NUM_TX_DESCS_NIC_IF(octeon_get_conf
2403                                                            (octeon_dev),
2404                                                            lio->ifidx);
2405                 retval = octeon_setup_iq(octeon_dev, ifidx, q,
2406                                          lio->linfo.txpciq[q], num_tx_descs,
2407                                          netdev_get_tx_queue(netdev, q));
2408                 if (retval) {
2409                         dev_err(&octeon_dev->pci_dev->dev,
2410                                 " %s : Runtime IQ(TxQ) creation failed.\n",
2411                                 __func__);
2412                         return 1;
2413                 }
2414         }
2415
2416         return 0;
2417 }
2418
2419 /**
2420  * \brief Poll routine for checking transmit queue status
2421  * @param work work_struct data structure
2422  */
2423 static void octnet_poll_check_txq_status(struct work_struct *work)
2424 {
2425         struct cavium_wk *wk = (struct cavium_wk *)work;
2426         struct lio *lio = (struct lio *)wk->ctxptr;
2427
2428         if (!ifstate_check(lio, LIO_IFSTATE_RUNNING))
2429                 return;
2430
2431         check_txq_status(lio);
2432         queue_delayed_work(lio->txq_status_wq.wq,
2433                            &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2434 }
2435
2436 /**
2437  * \brief Sets up the txq poll check
2438  * @param netdev network device
2439  */
2440 static inline int setup_tx_poll_fn(struct net_device *netdev)
2441 {
2442         struct lio *lio = GET_LIO(netdev);
2443         struct octeon_device *oct = lio->oct_dev;
2444
2445         lio->txq_status_wq.wq = alloc_workqueue("txq-status",
2446                                                 WQ_MEM_RECLAIM, 0);
2447         if (!lio->txq_status_wq.wq) {
2448                 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n");
2449                 return -1;
2450         }
2451         INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work,
2452                           octnet_poll_check_txq_status);
2453         lio->txq_status_wq.wk.ctxptr = lio;
2454         queue_delayed_work(lio->txq_status_wq.wq,
2455                            &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2456         return 0;
2457 }
2458
2459 static inline void cleanup_tx_poll_fn(struct net_device *netdev)
2460 {
2461         struct lio *lio = GET_LIO(netdev);
2462
2463         if (lio->txq_status_wq.wq) {
2464                 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work);
2465                 destroy_workqueue(lio->txq_status_wq.wq);
2466         }
2467 }
2468
2469 /**
2470  * \brief Net device open for LiquidIO
2471  * @param netdev network device
2472  */
2473 static int liquidio_open(struct net_device *netdev)
2474 {
2475         struct lio *lio = GET_LIO(netdev);
2476         struct octeon_device *oct = lio->oct_dev;
2477         struct napi_struct *napi, *n;
2478
2479         if (oct->props[lio->ifidx].napi_enabled == 0) {
2480                 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
2481                         napi_enable(napi);
2482
2483                 oct->props[lio->ifidx].napi_enabled = 1;
2484
2485                 if (OCTEON_CN23XX_PF(oct))
2486                         oct->droq[0]->ops.poll_mode = 1;
2487         }
2488
2489         oct_ptp_open(netdev);
2490
2491         ifstate_set(lio, LIO_IFSTATE_RUNNING);
2492
2493         /* Ready for link status updates */
2494         lio->intf_open = 1;
2495
2496         netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n");
2497
2498         if (OCTEON_CN23XX_PF(oct)) {
2499                 if (!oct->msix_on)
2500                         if (setup_tx_poll_fn(netdev))
2501                                 return -1;
2502         } else {
2503                 if (setup_tx_poll_fn(netdev))
2504                         return -1;
2505         }
2506
2507         start_txq(netdev);
2508
2509         /* tell Octeon to start forwarding packets to host */
2510         send_rx_ctrl_cmd(lio, 1);
2511
2512         dev_info(&oct->pci_dev->dev, "%s interface is opened\n",
2513                  netdev->name);
2514
2515         return 0;
2516 }
2517
2518 /**
2519  * \brief Net device stop for LiquidIO
2520  * @param netdev network device
2521  */
2522 static int liquidio_stop(struct net_device *netdev)
2523 {
2524         struct lio *lio = GET_LIO(netdev);
2525         struct octeon_device *oct = lio->oct_dev;
2526
2527         ifstate_reset(lio, LIO_IFSTATE_RUNNING);
2528
2529         netif_tx_disable(netdev);
2530
2531         /* Inform that netif carrier is down */
2532         netif_carrier_off(netdev);
2533         lio->intf_open = 0;
2534         lio->linfo.link.s.link_up = 0;
2535         lio->link_changes++;
2536
2537         /* Pause for a moment and wait for Octeon to flush out (to the wire) any
2538          * egress packets that are in-flight.
2539          */
2540         set_current_state(TASK_INTERRUPTIBLE);
2541         schedule_timeout(msecs_to_jiffies(100));
2542
2543         /* Now it should be safe to tell Octeon that nic interface is down. */
2544         send_rx_ctrl_cmd(lio, 0);
2545
2546         if (OCTEON_CN23XX_PF(oct)) {
2547                 if (!oct->msix_on)
2548                         cleanup_tx_poll_fn(netdev);
2549         } else {
2550                 cleanup_tx_poll_fn(netdev);
2551         }
2552
2553         if (lio->ptp_clock) {
2554                 ptp_clock_unregister(lio->ptp_clock);
2555                 lio->ptp_clock = NULL;
2556         }
2557
2558         dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name);
2559
2560         return 0;
2561 }
2562
2563 /**
2564  * \brief Converts a mask based on net device flags
2565  * @param netdev network device
2566  *
2567  * This routine generates a octnet_ifflags mask from the net device flags
2568  * received from the OS.
2569  */
2570 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev)
2571 {
2572         enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST;
2573
2574         if (netdev->flags & IFF_PROMISC)
2575                 f |= OCTNET_IFFLAG_PROMISC;
2576
2577         if (netdev->flags & IFF_ALLMULTI)
2578                 f |= OCTNET_IFFLAG_ALLMULTI;
2579
2580         if (netdev->flags & IFF_MULTICAST) {
2581                 f |= OCTNET_IFFLAG_MULTICAST;
2582
2583                 /* Accept all multicast addresses if there are more than we
2584                  * can handle
2585                  */
2586                 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR)
2587                         f |= OCTNET_IFFLAG_ALLMULTI;
2588         }
2589
2590         if (netdev->flags & IFF_BROADCAST)
2591                 f |= OCTNET_IFFLAG_BROADCAST;
2592
2593         return f;
2594 }
2595
2596 /**
2597  * \brief Net device set_multicast_list
2598  * @param netdev network device
2599  */
2600 static void liquidio_set_mcast_list(struct net_device *netdev)
2601 {
2602         struct lio *lio = GET_LIO(netdev);
2603         struct octeon_device *oct = lio->oct_dev;
2604         struct octnic_ctrl_pkt nctrl;
2605         struct netdev_hw_addr *ha;
2606         u64 *mc;
2607         int ret;
2608         int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR);
2609
2610         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2611
2612         /* Create a ctrl pkt command to be sent to core app. */
2613         nctrl.ncmd.u64 = 0;
2614         nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST;
2615         nctrl.ncmd.s.param1 = get_new_flags(netdev);
2616         nctrl.ncmd.s.param2 = mc_count;
2617         nctrl.ncmd.s.more = mc_count;
2618         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2619         nctrl.netpndev = (u64)netdev;
2620         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2621
2622         /* copy all the addresses into the udd */
2623         mc = &nctrl.udd[0];
2624         netdev_for_each_mc_addr(ha, netdev) {
2625                 *mc = 0;
2626                 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN);
2627                 /* no need to swap bytes */
2628
2629                 if (++mc > &nctrl.udd[mc_count])
2630                         break;
2631         }
2632
2633         /* Apparently, any activity in this call from the kernel has to
2634          * be atomic. So we won't wait for response.
2635          */
2636         nctrl.wait_time = 0;
2637
2638         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2639         if (ret < 0) {
2640                 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n",
2641                         ret);
2642         }
2643 }
2644
2645 /**
2646  * \brief Net device set_mac_address
2647  * @param netdev network device
2648  */
2649 static int liquidio_set_mac(struct net_device *netdev, void *p)
2650 {
2651         int ret = 0;
2652         struct lio *lio = GET_LIO(netdev);
2653         struct octeon_device *oct = lio->oct_dev;
2654         struct sockaddr *addr = (struct sockaddr *)p;
2655         struct octnic_ctrl_pkt nctrl;
2656
2657         if (!is_valid_ether_addr(addr->sa_data))
2658                 return -EADDRNOTAVAIL;
2659
2660         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2661
2662         nctrl.ncmd.u64 = 0;
2663         nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
2664         nctrl.ncmd.s.param1 = 0;
2665         nctrl.ncmd.s.more = 1;
2666         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2667         nctrl.netpndev = (u64)netdev;
2668         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2669         nctrl.wait_time = 100;
2670
2671         nctrl.udd[0] = 0;
2672         /* The MAC Address is presented in network byte order. */
2673         memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN);
2674
2675         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2676         if (ret < 0) {
2677                 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n");
2678                 return -ENOMEM;
2679         }
2680         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2681         memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN);
2682
2683         return 0;
2684 }
2685
2686 /**
2687  * \brief Net device get_stats
2688  * @param netdev network device
2689  */
2690 static struct net_device_stats *liquidio_get_stats(struct net_device *netdev)
2691 {
2692         struct lio *lio = GET_LIO(netdev);
2693         struct net_device_stats *stats = &netdev->stats;
2694         struct octeon_device *oct;
2695         u64 pkts = 0, drop = 0, bytes = 0;
2696         struct oct_droq_stats *oq_stats;
2697         struct oct_iq_stats *iq_stats;
2698         int i, iq_no, oq_no;
2699
2700         oct = lio->oct_dev;
2701
2702         for (i = 0; i < lio->linfo.num_txpciq; i++) {
2703                 iq_no = lio->linfo.txpciq[i].s.q_no;
2704                 iq_stats = &oct->instr_queue[iq_no]->stats;
2705                 pkts += iq_stats->tx_done;
2706                 drop += iq_stats->tx_dropped;
2707                 bytes += iq_stats->tx_tot_bytes;
2708         }
2709
2710         stats->tx_packets = pkts;
2711         stats->tx_bytes = bytes;
2712         stats->tx_dropped = drop;
2713
2714         pkts = 0;
2715         drop = 0;
2716         bytes = 0;
2717
2718         for (i = 0; i < lio->linfo.num_rxpciq; i++) {
2719                 oq_no = lio->linfo.rxpciq[i].s.q_no;
2720                 oq_stats = &oct->droq[oq_no]->stats;
2721                 pkts += oq_stats->rx_pkts_received;
2722                 drop += (oq_stats->rx_dropped +
2723                          oq_stats->dropped_nodispatch +
2724                          oq_stats->dropped_toomany +
2725                          oq_stats->dropped_nomem);
2726                 bytes += oq_stats->rx_bytes_received;
2727         }
2728
2729         stats->rx_bytes = bytes;
2730         stats->rx_packets = pkts;
2731         stats->rx_dropped = drop;
2732
2733         return stats;
2734 }
2735
2736 /**
2737  * \brief Net device change_mtu
2738  * @param netdev network device
2739  */
2740 static int liquidio_change_mtu(struct net_device *netdev, int new_mtu)
2741 {
2742         struct lio *lio = GET_LIO(netdev);
2743         struct octeon_device *oct = lio->oct_dev;
2744         struct octnic_ctrl_pkt nctrl;
2745         int ret = 0;
2746
2747         /* Limit the MTU to make sure the ethernet packets are between 68 bytes
2748          * and 16000 bytes
2749          */
2750         if ((new_mtu < LIO_MIN_MTU_SIZE) ||
2751             (new_mtu > LIO_MAX_MTU_SIZE)) {
2752                 dev_err(&oct->pci_dev->dev, "Invalid MTU: %d\n", new_mtu);
2753                 dev_err(&oct->pci_dev->dev, "Valid range %d and %d\n",
2754                         LIO_MIN_MTU_SIZE, LIO_MAX_MTU_SIZE);
2755                 return -EINVAL;
2756         }
2757
2758         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2759
2760         nctrl.ncmd.u64 = 0;
2761         nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MTU;
2762         nctrl.ncmd.s.param1 = new_mtu;
2763         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2764         nctrl.wait_time = 100;
2765         nctrl.netpndev = (u64)netdev;
2766         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2767
2768         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2769         if (ret < 0) {
2770                 dev_err(&oct->pci_dev->dev, "Failed to set MTU\n");
2771                 return -1;
2772         }
2773
2774         lio->mtu = new_mtu;
2775
2776         return 0;
2777 }
2778
2779 /**
2780  * \brief Handler for SIOCSHWTSTAMP ioctl
2781  * @param netdev network device
2782  * @param ifr interface request
2783  * @param cmd command
2784  */
2785 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
2786 {
2787         struct hwtstamp_config conf;
2788         struct lio *lio = GET_LIO(netdev);
2789
2790         if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf)))
2791                 return -EFAULT;
2792
2793         if (conf.flags)
2794                 return -EINVAL;
2795
2796         switch (conf.tx_type) {
2797         case HWTSTAMP_TX_ON:
2798         case HWTSTAMP_TX_OFF:
2799                 break;
2800         default:
2801                 return -ERANGE;
2802         }
2803
2804         switch (conf.rx_filter) {
2805         case HWTSTAMP_FILTER_NONE:
2806                 break;
2807         case HWTSTAMP_FILTER_ALL:
2808         case HWTSTAMP_FILTER_SOME:
2809         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2810         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2811         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2812         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2813         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2814         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2815         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2816         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2817         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2818         case HWTSTAMP_FILTER_PTP_V2_EVENT:
2819         case HWTSTAMP_FILTER_PTP_V2_SYNC:
2820         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2821                 conf.rx_filter = HWTSTAMP_FILTER_ALL;
2822                 break;
2823         default:
2824                 return -ERANGE;
2825         }
2826
2827         if (conf.rx_filter == HWTSTAMP_FILTER_ALL)
2828                 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2829
2830         else
2831                 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2832
2833         return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0;
2834 }
2835
2836 /**
2837  * \brief ioctl handler
2838  * @param netdev network device
2839  * @param ifr interface request
2840  * @param cmd command
2841  */
2842 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2843 {
2844         switch (cmd) {
2845         case SIOCSHWTSTAMP:
2846                 return hwtstamp_ioctl(netdev, ifr);
2847         default:
2848                 return -EOPNOTSUPP;
2849         }
2850 }
2851
2852 /**
2853  * \brief handle a Tx timestamp response
2854  * @param status response status
2855  * @param buf pointer to skb
2856  */
2857 static void handle_timestamp(struct octeon_device *oct,
2858                              u32 status,
2859                              void *buf)
2860 {
2861         struct octnet_buf_free_info *finfo;
2862         struct octeon_soft_command *sc;
2863         struct oct_timestamp_resp *resp;
2864         struct lio *lio;
2865         struct sk_buff *skb = (struct sk_buff *)buf;
2866
2867         finfo = (struct octnet_buf_free_info *)skb->cb;
2868         lio = finfo->lio;
2869         sc = finfo->sc;
2870         oct = lio->oct_dev;
2871         resp = (struct oct_timestamp_resp *)sc->virtrptr;
2872
2873         if (status != OCTEON_REQUEST_DONE) {
2874                 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n",
2875                         CVM_CAST64(status));
2876                 resp->timestamp = 0;
2877         }
2878
2879         octeon_swap_8B_data(&resp->timestamp, 1);
2880
2881         if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) {
2882                 struct skb_shared_hwtstamps ts;
2883                 u64 ns = resp->timestamp;
2884
2885                 netif_info(lio, tx_done, lio->netdev,
2886                            "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n",
2887                            skb, (unsigned long long)ns);
2888                 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust);
2889                 skb_tstamp_tx(skb, &ts);
2890         }
2891
2892         octeon_free_soft_command(oct, sc);
2893         tx_buffer_free(skb);
2894 }
2895
2896 /* \brief Send a data packet that will be timestamped
2897  * @param oct octeon device
2898  * @param ndata pointer to network data
2899  * @param finfo pointer to private network data
2900  */
2901 static inline int send_nic_timestamp_pkt(struct octeon_device *oct,
2902                                          struct octnic_data_pkt *ndata,
2903                                          struct octnet_buf_free_info *finfo)
2904 {
2905         int retval;
2906         struct octeon_soft_command *sc;
2907         struct lio *lio;
2908         int ring_doorbell;
2909         u32 len;
2910
2911         lio = finfo->lio;
2912
2913         sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd,
2914                                             sizeof(struct oct_timestamp_resp));
2915         finfo->sc = sc;
2916
2917         if (!sc) {
2918                 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n");
2919                 return IQ_SEND_FAILED;
2920         }
2921
2922         if (ndata->reqtype == REQTYPE_NORESP_NET)
2923                 ndata->reqtype = REQTYPE_RESP_NET;
2924         else if (ndata->reqtype == REQTYPE_NORESP_NET_SG)
2925                 ndata->reqtype = REQTYPE_RESP_NET_SG;
2926
2927         sc->callback = handle_timestamp;
2928         sc->callback_arg = finfo->skb;
2929         sc->iq_no = ndata->q_no;
2930
2931         if (OCTEON_CN23XX_PF(oct))
2932                 len = (u32)((struct octeon_instr_ih3 *)
2933                             (&sc->cmd.cmd3.ih3))->dlengsz;
2934         else
2935                 len = (u32)((struct octeon_instr_ih2 *)
2936                             (&sc->cmd.cmd2.ih2))->dlengsz;
2937
2938         ring_doorbell = 1;
2939
2940         retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd,
2941                                      sc, len, ndata->reqtype);
2942
2943         if (retval == IQ_SEND_FAILED) {
2944                 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n",
2945                         retval);
2946                 octeon_free_soft_command(oct, sc);
2947         } else {
2948                 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n");
2949         }
2950
2951         return retval;
2952 }
2953
2954 /** \brief Transmit networks packets to the Octeon interface
2955  * @param skbuff   skbuff struct to be passed to network layer.
2956  * @param netdev    pointer to network device
2957  * @returns whether the packet was transmitted to the device okay or not
2958  *             (NETDEV_TX_OK or NETDEV_TX_BUSY)
2959  */
2960 static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
2961 {
2962         struct lio *lio;
2963         struct octnet_buf_free_info *finfo;
2964         union octnic_cmd_setup cmdsetup;
2965         struct octnic_data_pkt ndata;
2966         struct octeon_device *oct;
2967         struct oct_iq_stats *stats;
2968         struct octeon_instr_irh *irh;
2969         union tx_info *tx_info;
2970         int status = 0;
2971         int q_idx = 0, iq_no = 0;
2972         int j;
2973         u64 dptr = 0;
2974         u32 tag = 0;
2975
2976         lio = GET_LIO(netdev);
2977         oct = lio->oct_dev;
2978
2979         if (netif_is_multiqueue(netdev)) {
2980                 q_idx = skb->queue_mapping;
2981                 q_idx = (q_idx % (lio->linfo.num_txpciq));
2982                 tag = q_idx;
2983                 iq_no = lio->linfo.txpciq[q_idx].s.q_no;
2984         } else {
2985                 iq_no = lio->txq;
2986         }
2987
2988         stats = &oct->instr_queue[iq_no]->stats;
2989
2990         /* Check for all conditions in which the current packet cannot be
2991          * transmitted.
2992          */
2993         if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) ||
2994             (!lio->linfo.link.s.link_up) ||
2995             (skb->len <= 0)) {
2996                 netif_info(lio, tx_err, lio->netdev,
2997                            "Transmit failed link_status : %d\n",
2998                            lio->linfo.link.s.link_up);
2999                 goto lio_xmit_failed;
3000         }
3001
3002         /* Use space in skb->cb to store info used to unmap and
3003          * free the buffers.
3004          */
3005         finfo = (struct octnet_buf_free_info *)skb->cb;
3006         finfo->lio = lio;
3007         finfo->skb = skb;
3008         finfo->sc = NULL;
3009
3010         /* Prepare the attributes for the data to be passed to OSI. */
3011         memset(&ndata, 0, sizeof(struct octnic_data_pkt));
3012
3013         ndata.buf = (void *)finfo;
3014
3015         ndata.q_no = iq_no;
3016
3017         if (netif_is_multiqueue(netdev)) {
3018                 if (octnet_iq_is_full(oct, ndata.q_no)) {
3019                         /* defer sending if queue is full */
3020                         netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3021                                    ndata.q_no);
3022                         stats->tx_iq_busy++;
3023                         return NETDEV_TX_BUSY;
3024                 }
3025         } else {
3026                 if (octnet_iq_is_full(oct, lio->txq)) {
3027                         /* defer sending if queue is full */
3028                         stats->tx_iq_busy++;
3029                         netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3030                                    lio->txq);
3031                         return NETDEV_TX_BUSY;
3032                 }
3033         }
3034         /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu:  %d, q_no:%d\n",
3035          *      lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no);
3036          */
3037
3038         ndata.datasize = skb->len;
3039
3040         cmdsetup.u64 = 0;
3041         cmdsetup.s.iq_no = iq_no;
3042
3043         if (skb->ip_summed == CHECKSUM_PARTIAL) {
3044                 if (skb->encapsulation) {
3045                         cmdsetup.s.tnl_csum = 1;
3046                         stats->tx_vxlan++;
3047                 } else {
3048                         cmdsetup.s.transport_csum = 1;
3049                 }
3050         }
3051         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
3052                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
3053                 cmdsetup.s.timestamp = 1;
3054         }
3055
3056         if (skb_shinfo(skb)->nr_frags == 0) {
3057                 cmdsetup.s.u.datasize = skb->len;
3058                 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3059
3060                 /* Offload checksum calculation for TCP/UDP packets */
3061                 dptr = dma_map_single(&oct->pci_dev->dev,
3062                                       skb->data,
3063                                       skb->len,
3064                                       DMA_TO_DEVICE);
3065                 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) {
3066                         dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n",
3067                                 __func__);
3068                         return NETDEV_TX_BUSY;
3069                 }
3070
3071                 if (OCTEON_CN23XX_PF(oct))
3072                         ndata.cmd.cmd3.dptr = dptr;
3073                 else
3074                         ndata.cmd.cmd2.dptr = dptr;
3075                 finfo->dptr = dptr;
3076                 ndata.reqtype = REQTYPE_NORESP_NET;
3077
3078         } else {
3079                 int i, frags;
3080                 struct skb_frag_struct *frag;
3081                 struct octnic_gather *g;
3082
3083                 spin_lock(&lio->glist_lock[q_idx]);
3084                 g = (struct octnic_gather *)
3085                         list_delete_head(&lio->glist[q_idx]);
3086                 spin_unlock(&lio->glist_lock[q_idx]);
3087
3088                 if (!g) {
3089                         netif_info(lio, tx_err, lio->netdev,
3090                                    "Transmit scatter gather: glist null!\n");
3091                         goto lio_xmit_failed;
3092                 }
3093
3094                 cmdsetup.s.gather = 1;
3095                 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1);
3096                 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3097
3098                 memset(g->sg, 0, g->sg_size);
3099
3100                 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev,
3101                                                  skb->data,
3102                                                  (skb->len - skb->data_len),
3103                                                  DMA_TO_DEVICE);
3104                 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) {
3105                         dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n",
3106                                 __func__);
3107                         return NETDEV_TX_BUSY;
3108                 }
3109                 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0);
3110
3111                 frags = skb_shinfo(skb)->nr_frags;
3112                 i = 1;
3113                 while (frags--) {
3114                         frag = &skb_shinfo(skb)->frags[i - 1];
3115
3116                         g->sg[(i >> 2)].ptr[(i & 3)] =
3117                                 dma_map_page(&oct->pci_dev->dev,
3118                                              frag->page.p,
3119                                              frag->page_offset,
3120                                              frag->size,
3121                                              DMA_TO_DEVICE);
3122
3123                         if (dma_mapping_error(&oct->pci_dev->dev,
3124                                               g->sg[i >> 2].ptr[i & 3])) {
3125                                 dma_unmap_single(&oct->pci_dev->dev,
3126                                                  g->sg[0].ptr[0],
3127                                                  skb->len - skb->data_len,
3128                                                  DMA_TO_DEVICE);
3129                                 for (j = 1; j < i; j++) {
3130                                         frag = &skb_shinfo(skb)->frags[j - 1];
3131                                         dma_unmap_page(&oct->pci_dev->dev,
3132                                                        g->sg[j >> 2].ptr[j & 3],
3133                                                        frag->size,
3134                                                        DMA_TO_DEVICE);
3135                                 }
3136                                 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n",
3137                                         __func__);
3138                                 return NETDEV_TX_BUSY;
3139                         }
3140
3141                         add_sg_size(&g->sg[(i >> 2)], frag->size, (i & 3));
3142                         i++;
3143                 }
3144
3145                 dma_sync_single_for_device(&oct->pci_dev->dev, g->sg_dma_ptr,
3146                                            g->sg_size, DMA_TO_DEVICE);
3147                 dptr = g->sg_dma_ptr;
3148
3149                 if (OCTEON_CN23XX_PF(oct))
3150                         ndata.cmd.cmd3.dptr = dptr;
3151                 else
3152                         ndata.cmd.cmd2.dptr = dptr;
3153                 finfo->dptr = dptr;
3154                 finfo->g = g;
3155
3156                 ndata.reqtype = REQTYPE_NORESP_NET_SG;
3157         }
3158
3159         if (OCTEON_CN23XX_PF(oct)) {
3160                 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh;
3161                 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0];
3162         } else {
3163                 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh;
3164                 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0];
3165         }
3166
3167         if (skb_shinfo(skb)->gso_size) {
3168                 tx_info->s.gso_size = skb_shinfo(skb)->gso_size;
3169                 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs;
3170                 stats->tx_gso++;
3171         }
3172
3173         /* HW insert VLAN tag */
3174         if (skb_vlan_tag_present(skb)) {
3175                 irh->priority = skb_vlan_tag_get(skb) >> 13;
3176                 irh->vlan = skb_vlan_tag_get(skb) & 0xfff;
3177         }
3178
3179         if (unlikely(cmdsetup.s.timestamp))
3180                 status = send_nic_timestamp_pkt(oct, &ndata, finfo);
3181         else
3182                 status = octnet_send_nic_data_pkt(oct, &ndata);
3183         if (status == IQ_SEND_FAILED)
3184                 goto lio_xmit_failed;
3185
3186         netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n");
3187
3188         if (status == IQ_SEND_STOP)
3189                 stop_q(lio->netdev, q_idx);
3190
3191         netif_trans_update(netdev);
3192
3193         if (skb_shinfo(skb)->gso_size)
3194                 stats->tx_done += skb_shinfo(skb)->gso_segs;
3195         else
3196                 stats->tx_done++;
3197         stats->tx_tot_bytes += skb->len;
3198
3199         return NETDEV_TX_OK;
3200
3201 lio_xmit_failed:
3202         stats->tx_dropped++;
3203         netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n",
3204                    iq_no, stats->tx_dropped);
3205         if (dptr)
3206                 dma_unmap_single(&oct->pci_dev->dev, dptr,
3207                                  ndata.datasize, DMA_TO_DEVICE);
3208         tx_buffer_free(skb);
3209         return NETDEV_TX_OK;
3210 }
3211
3212 /** \brief Network device Tx timeout
3213  * @param netdev    pointer to network device
3214  */
3215 static void liquidio_tx_timeout(struct net_device *netdev)
3216 {
3217         struct lio *lio;
3218
3219         lio = GET_LIO(netdev);
3220
3221         netif_info(lio, tx_err, lio->netdev,
3222                    "Transmit timeout tx_dropped:%ld, waking up queues now!!\n",
3223                    netdev->stats.tx_dropped);
3224         netif_trans_update(netdev);
3225         txqs_wake(netdev);
3226 }
3227
3228 static int liquidio_vlan_rx_add_vid(struct net_device *netdev,
3229                                     __be16 proto __attribute__((unused)),
3230                                     u16 vid)
3231 {
3232         struct lio *lio = GET_LIO(netdev);
3233         struct octeon_device *oct = lio->oct_dev;
3234         struct octnic_ctrl_pkt nctrl;
3235         int ret = 0;
3236
3237         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3238
3239         nctrl.ncmd.u64 = 0;
3240         nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER;
3241         nctrl.ncmd.s.param1 = vid;
3242         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3243         nctrl.wait_time = 100;
3244         nctrl.netpndev = (u64)netdev;
3245         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3246
3247         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3248         if (ret < 0) {
3249                 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3250                         ret);
3251         }
3252
3253         return ret;
3254 }
3255
3256 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev,
3257                                      __be16 proto __attribute__((unused)),
3258                                      u16 vid)
3259 {
3260         struct lio *lio = GET_LIO(netdev);
3261         struct octeon_device *oct = lio->oct_dev;
3262         struct octnic_ctrl_pkt nctrl;
3263         int ret = 0;
3264
3265         memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3266
3267         nctrl.ncmd.u64 = 0;
3268         nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER;
3269         nctrl.ncmd.s.param1 = vid;
3270         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3271         nctrl.wait_time = 100;
3272         nctrl.netpndev = (u64)netdev;
3273         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3274
3275         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3276         if (ret < 0) {
3277                 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3278                         ret);
3279         }
3280         return ret;
3281 }
3282
3283 /** Sending command to enable/disable RX checksum offload
3284  * @param netdev                pointer to network device
3285  * @param command               OCTNET_CMD_TNL_RX_CSUM_CTL
3286  * @param rx_cmd_bit            OCTNET_CMD_RXCSUM_ENABLE/
3287  *                              OCTNET_CMD_RXCSUM_DISABLE
3288  * @returns                     SUCCESS or FAILURE
3289  */
3290 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command,
3291                                        u8 rx_cmd)
3292 {
3293         struct lio *lio = GET_LIO(netdev);
3294         struct octeon_device *oct = lio->oct_dev;
3295         struct octnic_ctrl_pkt nctrl;
3296         int ret = 0;
3297
3298         nctrl.ncmd.u64 = 0;
3299         nctrl.ncmd.s.cmd = command;
3300         nctrl.ncmd.s.param1 = rx_cmd;
3301         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3302         nctrl.wait_time = 100;
3303         nctrl.netpndev = (u64)netdev;
3304         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3305
3306         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3307         if (ret < 0) {
3308                 dev_err(&oct->pci_dev->dev,
3309                         "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n",
3310                         ret);
3311         }
3312         return ret;
3313 }
3314
3315 /** Sending command to add/delete VxLAN UDP port to firmware
3316  * @param netdev                pointer to network device
3317  * @param command               OCTNET_CMD_VXLAN_PORT_CONFIG
3318  * @param vxlan_port            VxLAN port to be added or deleted
3319  * @param vxlan_cmd_bit         OCTNET_CMD_VXLAN_PORT_ADD,
3320  *                              OCTNET_CMD_VXLAN_PORT_DEL
3321  * @returns                     SUCCESS or FAILURE
3322  */
3323 static int liquidio_vxlan_port_command(struct net_device *netdev, int command,
3324                                        u16 vxlan_port, u8 vxlan_cmd_bit)
3325 {
3326         struct lio *lio = GET_LIO(netdev);
3327         struct octeon_device *oct = lio->oct_dev;
3328         struct octnic_ctrl_pkt nctrl;
3329         int ret = 0;
3330
3331         nctrl.ncmd.u64 = 0;
3332         nctrl.ncmd.s.cmd = command;
3333         nctrl.ncmd.s.more = vxlan_cmd_bit;
3334         nctrl.ncmd.s.param1 = vxlan_port;
3335         nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3336         nctrl.wait_time = 100;
3337         nctrl.netpndev = (u64)netdev;
3338         nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3339
3340         ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3341         if (ret < 0) {
3342                 dev_err(&oct->pci_dev->dev,
3343                         "VxLAN port add/delete failed in core (ret:0x%x)\n",
3344                         ret);
3345         }
3346         return ret;
3347 }
3348
3349 /** \brief Net device fix features
3350  * @param netdev  pointer to network device
3351  * @param request features requested
3352  * @returns updated features list
3353  */
3354 static netdev_features_t liquidio_fix_features(struct net_device *netdev,
3355                                                netdev_features_t request)
3356 {
3357         struct lio *lio = netdev_priv(netdev);
3358
3359         if ((request & NETIF_F_RXCSUM) &&
3360             !(lio->dev_capability & NETIF_F_RXCSUM))
3361                 request &= ~NETIF_F_RXCSUM;
3362
3363         if ((request & NETIF_F_HW_CSUM) &&
3364             !(lio->dev_capability & NETIF_F_HW_CSUM))
3365                 request &= ~NETIF_F_HW_CSUM;
3366
3367         if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO))
3368                 request &= ~NETIF_F_TSO;
3369
3370         if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6))
3371                 request &= ~NETIF_F_TSO6;
3372
3373         if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO))
3374                 request &= ~NETIF_F_LRO;
3375
3376         /*Disable LRO if RXCSUM is off */
3377         if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) &&
3378             (lio->dev_capability & NETIF_F_LRO))
3379                 request &= ~NETIF_F_LRO;
3380
3381         return request;
3382 }
3383
3384 /** \brief Net device set features
3385  * @param netdev  pointer to network device
3386  * @param features features to enable/disable
3387  */
3388 static int liquidio_set_features(struct net_device *netdev,
3389                                  netdev_features_t features)
3390 {
3391         struct lio *lio = netdev_priv(netdev);
3392
3393         if (!((netdev->features ^ features) & NETIF_F_LRO))
3394                 return 0;
3395
3396         if ((features & NETIF_F_LRO) && (lio->dev_capability & NETIF_F_LRO))
3397                 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
3398                                      OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3399         else if (!(features & NETIF_F_LRO) &&
3400                  (lio->dev_capability & NETIF_F_LRO))
3401                 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE,
3402                                      OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3403
3404         /* Sending command to firmware to enable/disable RX checksum
3405          * offload settings using ethtool
3406          */
3407         if (!(netdev->features & NETIF_F_RXCSUM) &&
3408             (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3409             (features & NETIF_F_RXCSUM))
3410                 liquidio_set_rxcsum_command(netdev,
3411                                             OCTNET_CMD_TNL_RX_CSUM_CTL,
3412                                             OCTNET_CMD_RXCSUM_ENABLE);
3413         else if ((netdev->features & NETIF_F_RXCSUM) &&
3414                  (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3415                  !(features & NETIF_F_RXCSUM))
3416                 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
3417                                             OCTNET_CMD_RXCSUM_DISABLE);
3418
3419         return 0;
3420 }
3421
3422 static void liquidio_add_vxlan_port(struct net_device *netdev,
3423                                     struct udp_tunnel_info *ti)
3424 {
3425         if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3426                 return;
3427
3428         liquidio_vxlan_port_command(netdev,
3429                                     OCTNET_CMD_VXLAN_PORT_CONFIG,
3430                                     htons(ti->port),
3431                                     OCTNET_CMD_VXLAN_PORT_ADD);
3432 }
3433
3434 static void liquidio_del_vxlan_port(struct net_device *netdev,
3435                                     struct udp_tunnel_info *ti)
3436 {
3437         if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3438                 return;
3439
3440         liquidio_vxlan_port_command(netdev,
3441                                     OCTNET_CMD_VXLAN_PORT_CONFIG,
3442                                     htons(ti->port),
3443                                     OCTNET_CMD_VXLAN_PORT_DEL);
3444 }
3445
3446 static struct net_device_ops lionetdevops = {
3447         .ndo_open               = liquidio_open,
3448         .ndo_stop               = liquidio_stop,
3449         .ndo_start_xmit         = liquidio_xmit,
3450         .ndo_get_stats          = liquidio_get_stats,
3451         .ndo_set_mac_address    = liquidio_set_mac,
3452         .ndo_set_rx_mode        = liquidio_set_mcast_list,
3453         .ndo_tx_timeout         = liquidio_tx_timeout,
3454
3455         .ndo_vlan_rx_add_vid    = liquidio_vlan_rx_add_vid,
3456         .ndo_vlan_rx_kill_vid   = liquidio_vlan_rx_kill_vid,
3457         .ndo_change_mtu         = liquidio_change_mtu,
3458         .ndo_do_ioctl           = liquidio_ioctl,
3459         .ndo_fix_features       = liquidio_fix_features,
3460         .ndo_set_features       = liquidio_set_features,
3461         .ndo_udp_tunnel_add     = liquidio_add_vxlan_port,
3462         .ndo_udp_tunnel_del     = liquidio_del_vxlan_port,
3463 };
3464
3465 /** \brief Entry point for the liquidio module
3466  */
3467 static int __init liquidio_init(void)
3468 {
3469         int i;
3470         struct handshake *hs;
3471
3472         init_completion(&first_stage);
3473
3474         octeon_init_device_list(conf_type);
3475
3476         if (liquidio_init_pci())
3477                 return -EINVAL;
3478
3479         wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000));
3480
3481         for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3482                 hs = &handshake[i];
3483                 if (hs->pci_dev) {
3484                         wait_for_completion(&hs->init);
3485                         if (!hs->init_ok) {
3486                                 /* init handshake failed */
3487                                 dev_err(&hs->pci_dev->dev,
3488                                         "Failed to init device\n");
3489                                 liquidio_deinit_pci();
3490                                 return -EIO;
3491                         }
3492                 }
3493         }
3494
3495         for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3496                 hs = &handshake[i];
3497                 if (hs->pci_dev) {
3498                         wait_for_completion_timeout(&hs->started,
3499                                                     msecs_to_jiffies(30000));
3500                         if (!hs->started_ok) {
3501                                 /* starter handshake failed */
3502                                 dev_err(&hs->pci_dev->dev,
3503                                         "Firmware failed to start\n");
3504                                 liquidio_deinit_pci();
3505                                 return -EIO;
3506                         }
3507                 }
3508         }
3509
3510         return 0;
3511 }
3512
3513 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf)
3514 {
3515         struct octeon_device *oct = (struct octeon_device *)buf;
3516         struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
3517         int gmxport = 0;
3518         union oct_link_status *ls;
3519         int i;
3520
3521         if (recv_pkt->buffer_size[0] != sizeof(*ls)) {
3522                 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n",
3523                         recv_pkt->buffer_size[0],
3524                         recv_pkt->rh.r_nic_info.gmxport);
3525                 goto nic_info_err;
3526         }
3527
3528         gmxport = recv_pkt->rh.r_nic_info.gmxport;
3529         ls = (union oct_link_status *)get_rbd(recv_pkt->buffer_ptr[0]);
3530
3531         octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3);
3532         for (i = 0; i < oct->ifcount; i++) {
3533                 if (oct->props[i].gmxport == gmxport) {
3534                         update_link_status(oct->props[i].netdev, ls);
3535                         break;
3536                 }
3537         }
3538
3539 nic_info_err:
3540         for (i = 0; i < recv_pkt->buffer_count; i++)
3541                 recv_buffer_free(recv_pkt->buffer_ptr[i]);
3542         octeon_free_recv_info(recv_info);
3543         return 0;
3544 }
3545
3546 /**
3547  * \brief Setup network interfaces
3548  * @param octeon_dev  octeon device
3549  *
3550  * Called during init time for each device. It assumes the NIC
3551  * is already up and running.  The link information for each
3552  * interface is passed in link_info.
3553  */
3554 static int setup_nic_devices(struct octeon_device *octeon_dev)
3555 {
3556         struct lio *lio = NULL;
3557         struct net_device *netdev;
3558         u8 mac[6], i, j;
3559         struct octeon_soft_command *sc;
3560         struct liquidio_if_cfg_context *ctx;
3561         struct liquidio_if_cfg_resp *resp;
3562         struct octdev_props *props;
3563         int retval, num_iqueues, num_oqueues;
3564         union oct_nic_if_cfg if_cfg;
3565         unsigned int base_queue;
3566         unsigned int gmx_port_id;
3567         u32 resp_size, ctx_size, data_size;
3568         u32 ifidx_or_pfnum;
3569         struct lio_version *vdata;
3570
3571         /* This is to handle link status changes */
3572         octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
3573                                     OPCODE_NIC_INFO,
3574                                     lio_nic_info, octeon_dev);
3575
3576         /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions.
3577          * They are handled directly.
3578          */
3579         octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET,
3580                                         free_netbuf);
3581
3582         octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG,
3583                                         free_netsgbuf);
3584
3585         octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG,
3586                                         free_netsgbuf_with_resp);
3587
3588         for (i = 0; i < octeon_dev->ifcount; i++) {
3589                 resp_size = sizeof(struct liquidio_if_cfg_resp);
3590                 ctx_size = sizeof(struct liquidio_if_cfg_context);
3591                 data_size = sizeof(struct lio_version);
3592                 sc = (struct octeon_soft_command *)
3593                         octeon_alloc_soft_command(octeon_dev, data_size,
3594                                                   resp_size, ctx_size);
3595                 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
3596                 ctx  = (struct liquidio_if_cfg_context *)sc->ctxptr;
3597                 vdata = (struct lio_version *)sc->virtdptr;
3598
3599                 *((u64 *)vdata) = 0;
3600                 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION);
3601                 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION);
3602                 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION);
3603
3604                 if (OCTEON_CN23XX_PF(octeon_dev)) {
3605                         num_iqueues = octeon_dev->sriov_info.num_pf_rings;
3606                         num_oqueues = octeon_dev->sriov_info.num_pf_rings;
3607                         base_queue = octeon_dev->sriov_info.pf_srn;
3608
3609                         gmx_port_id = octeon_dev->pf_num;
3610                         ifidx_or_pfnum = octeon_dev->pf_num;
3611                 } else {
3612                         num_iqueues = CFG_GET_NUM_TXQS_NIC_IF(
3613                                                 octeon_get_conf(octeon_dev), i);
3614                         num_oqueues = CFG_GET_NUM_RXQS_NIC_IF(
3615                                                 octeon_get_conf(octeon_dev), i);
3616                         base_queue = CFG_GET_BASE_QUE_NIC_IF(
3617                                                 octeon_get_conf(octeon_dev), i);
3618                         gmx_port_id = CFG_GET_GMXID_NIC_IF(
3619                                                 octeon_get_conf(octeon_dev), i);
3620                         ifidx_or_pfnum = i;
3621                 }
3622
3623                 dev_dbg(&octeon_dev->pci_dev->dev,
3624                         "requesting config for interface %d, iqs %d, oqs %d\n",
3625                         ifidx_or_pfnum, num_iqueues, num_oqueues);
3626                 WRITE_ONCE(ctx->cond, 0);
3627                 ctx->octeon_id = lio_get_device_id(octeon_dev);
3628                 init_waitqueue_head(&ctx->wc);
3629
3630                 if_cfg.u64 = 0;
3631                 if_cfg.s.num_iqueues = num_iqueues;
3632                 if_cfg.s.num_oqueues = num_oqueues;
3633                 if_cfg.s.base_queue = base_queue;
3634                 if_cfg.s.gmx_port_id = gmx_port_id;
3635
3636                 sc->iq_no = 0;
3637
3638                 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC,
3639                                             OPCODE_NIC_IF_CFG, 0,
3640                                             if_cfg.u64, 0);
3641
3642                 sc->callback = if_cfg_callback;
3643                 sc->callback_arg = sc;
3644                 sc->wait_time = 3000;
3645
3646                 retval = octeon_send_soft_command(octeon_dev, sc);
3647                 if (retval == IQ_SEND_FAILED) {
3648                         dev_err(&octeon_dev->pci_dev->dev,
3649                                 "iq/oq config failed status: %x\n",
3650                                 retval);
3651                         /* Soft instr is freed by driver in case of failure. */
3652                         goto setup_nic_dev_fail;
3653                 }
3654
3655                 /* Sleep on a wait queue till the cond flag indicates that the
3656                  * response arrived or timed-out.
3657                  */
3658                 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) {
3659                         dev_err(&octeon_dev->pci_dev->dev, "Wait interrupted\n");
3660                         goto setup_nic_wait_intr;
3661                 }
3662
3663                 retval = resp->status;
3664                 if (retval) {
3665                         dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n");
3666                         goto setup_nic_dev_fail;
3667                 }
3668
3669                 octeon_swap_8B_data((u64 *)(&resp->cfg_info),
3670                                     (sizeof(struct liquidio_if_cfg_info)) >> 3);
3671
3672                 num_iqueues = hweight64(resp->cfg_info.iqmask);
3673                 num_oqueues = hweight64(resp->cfg_info.oqmask);
3674
3675                 if (!(num_iqueues) || !(num_oqueues)) {
3676                         dev_err(&octeon_dev->pci_dev->dev,
3677                                 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n",
3678                                 resp->cfg_info.iqmask,
3679                                 resp->cfg_info.oqmask);
3680                         goto setup_nic_dev_fail;
3681                 }
3682                 dev_dbg(&octeon_dev->pci_dev->dev,
3683                         "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n",
3684                         i, resp->cfg_info.iqmask, resp->cfg_info.oqmask,
3685                         num_iqueues, num_oqueues);
3686                 netdev = alloc_etherdev_mq(LIO_SIZE, num_iqueues);
3687
3688                 if (!netdev) {
3689                         dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n");
3690                         goto setup_nic_dev_fail;
3691                 }
3692
3693                 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev);
3694
3695                 if (num_iqueues > 1)
3696                         lionetdevops.ndo_select_queue = select_q;
3697
3698                 /* Associate the routines that will handle different
3699                  * netdev tasks.
3700                  */
3701                 netdev->netdev_ops = &lionetdevops;
3702
3703                 lio = GET_LIO(netdev);
3704
3705                 memset(lio, 0, sizeof(struct lio));
3706
3707                 lio->ifidx = ifidx_or_pfnum;
3708
3709                 props = &octeon_dev->props[i];
3710                 props->gmxport = resp->cfg_info.linfo.gmxport;
3711                 props->netdev = netdev;
3712
3713                 lio->linfo.num_rxpciq = num_oqueues;
3714                 lio->linfo.num_txpciq = num_iqueues;
3715                 for (j = 0; j < num_oqueues; j++) {
3716                         lio->linfo.rxpciq[j].u64 =
3717                                 resp->cfg_info.linfo.rxpciq[j].u64;
3718                 }
3719                 for (j = 0; j < num_iqueues; j++) {
3720                         lio->linfo.txpciq[j].u64 =
3721                                 resp->cfg_info.linfo.txpciq[j].u64;
3722                 }
3723                 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr;
3724                 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport;
3725                 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64;
3726
3727                 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3728
3729                 if (OCTEON_CN23XX_PF(octeon_dev) ||
3730                     OCTEON_CN6XXX(octeon_dev)) {
3731                         lio->dev_capability = NETIF_F_HIGHDMA
3732                                               | NETIF_F_IP_CSUM
3733                                               | NETIF_F_IPV6_CSUM
3734                                               | NETIF_F_SG | NETIF_F_RXCSUM
3735                                               | NETIF_F_GRO
3736                                               | NETIF_F_TSO | NETIF_F_TSO6
3737                                               | NETIF_F_LRO;
3738                 }
3739                 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE);
3740
3741                 /*  Copy of transmit encapsulation capabilities:
3742                  *  TSO, TSO6, Checksums for this device
3743                  */
3744                 lio->enc_dev_capability = NETIF_F_IP_CSUM
3745                                           | NETIF_F_IPV6_CSUM
3746                                           | NETIF_F_GSO_UDP_TUNNEL
3747                                           | NETIF_F_HW_CSUM | NETIF_F_SG
3748                                           | NETIF_F_RXCSUM
3749                                           | NETIF_F_TSO | NETIF_F_TSO6
3750                                           | NETIF_F_LRO;
3751
3752                 netdev->hw_enc_features = (lio->enc_dev_capability &
3753                                            ~NETIF_F_LRO);
3754
3755                 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL;
3756
3757                 netdev->vlan_features = lio->dev_capability;
3758                 /* Add any unchangeable hw features */
3759                 lio->dev_capability |=  NETIF_F_HW_VLAN_CTAG_FILTER |
3760                                         NETIF_F_HW_VLAN_CTAG_RX |
3761                                         NETIF_F_HW_VLAN_CTAG_TX;
3762
3763                 netdev->features = (lio->dev_capability & ~NETIF_F_LRO);
3764
3765                 netdev->hw_features = lio->dev_capability;
3766                 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/
3767                 netdev->hw_features = netdev->hw_features &
3768                         ~NETIF_F_HW_VLAN_CTAG_RX;
3769
3770                 /* Point to the  properties for octeon device to which this
3771                  * interface belongs.
3772                  */
3773                 lio->oct_dev = octeon_dev;
3774                 lio->octprops = props;
3775                 lio->netdev = netdev;
3776
3777                 dev_dbg(&octeon_dev->pci_dev->dev,
3778                         "if%d gmx: %d hw_addr: 0x%llx\n", i,
3779                         lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr));
3780
3781                 /* 64-bit swap required on LE machines */
3782                 octeon_swap_8B_data(&lio->linfo.hw_addr, 1);
3783                 for (j = 0; j < 6; j++)
3784                         mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j));
3785
3786                 /* Copy MAC Address to OS network device structure */
3787
3788                 ether_addr_copy(netdev->dev_addr, mac);
3789
3790                 /* By default all interfaces on a single Octeon uses the same
3791                  * tx and rx queues
3792                  */
3793                 lio->txq = lio->linfo.txpciq[0].s.q_no;
3794                 lio->rxq = lio->linfo.rxpciq[0].s.q_no;
3795                 if (setup_io_queues(octeon_dev, i)) {
3796                         dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n");
3797                         goto setup_nic_dev_fail;
3798                 }
3799
3800                 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS);
3801
3802                 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq);
3803                 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq);
3804
3805                 if (setup_glists(octeon_dev, lio, num_iqueues)) {
3806                         dev_err(&octeon_dev->pci_dev->dev,
3807                                 "Gather list allocation failed\n");
3808                         goto setup_nic_dev_fail;
3809                 }
3810
3811                 /* Register ethtool support */
3812                 liquidio_set_ethtool_ops(netdev);
3813                 octeon_dev->priv_flags = 0x0;
3814
3815                 if (netdev->features & NETIF_F_LRO)
3816                         liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
3817                                              OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3818
3819                 liquidio_set_feature(netdev, OCTNET_CMD_ENABLE_VLAN_FILTER, 0);
3820
3821                 if ((debug != -1) && (debug & NETIF_MSG_HW))
3822                         liquidio_set_feature(netdev,
3823                                              OCTNET_CMD_VERBOSE_ENABLE, 0);
3824
3825                 if (setup_link_status_change_wq(netdev))
3826                         goto setup_nic_dev_fail;
3827
3828                 /* Register the network device with the OS */
3829                 if (register_netdev(netdev)) {
3830                         dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n");
3831                         goto setup_nic_dev_fail;
3832                 }
3833
3834                 dev_dbg(&octeon_dev->pci_dev->dev,
3835                         "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n",
3836                         i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
3837                 netif_carrier_off(netdev);
3838                 lio->link_changes++;
3839
3840                 ifstate_set(lio, LIO_IFSTATE_REGISTERED);
3841
3842                 /* Sending command to firmware to enable Rx checksum offload
3843                  * by default at the time of setup of Liquidio driver for
3844                  * this device
3845                  */
3846                 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
3847                                             OCTNET_CMD_RXCSUM_ENABLE);
3848                 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL,
3849                                      OCTNET_CMD_TXCSUM_ENABLE);
3850
3851                 dev_dbg(&octeon_dev->pci_dev->dev,
3852                         "NIC ifidx:%d Setup successful\n", i);
3853
3854                 octeon_free_soft_command(octeon_dev, sc);
3855         }
3856
3857         return 0;
3858
3859 setup_nic_dev_fail:
3860
3861         octeon_free_soft_command(octeon_dev, sc);
3862
3863 setup_nic_wait_intr:
3864
3865         while (i--) {
3866                 dev_err(&octeon_dev->pci_dev->dev,
3867                         "NIC ifidx:%d Setup failed\n", i);
3868                 liquidio_destroy_nic_device(octeon_dev, i);
3869         }
3870         return -ENODEV;
3871 }
3872
3873 /**
3874  * \brief initialize the NIC
3875  * @param oct octeon device
3876  *
3877  * This initialization routine is called once the Octeon device application is
3878  * up and running
3879  */
3880 static int liquidio_init_nic_module(struct octeon_device *oct)
3881 {
3882         struct oct_intrmod_cfg *intrmod_cfg;
3883         int i, retval = 0;
3884         int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct));
3885
3886         dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n");
3887
3888         /* only default iq and oq were initialized
3889          * initialize the rest as well
3890          */
3891         /* run port_config command for each port */
3892         oct->ifcount = num_nic_ports;
3893
3894         memset(oct->props, 0,
3895                sizeof(struct octdev_props) * num_nic_ports);
3896
3897         for (i = 0; i < MAX_OCTEON_LINKS; i++)
3898                 oct->props[i].gmxport = -1;
3899
3900         retval = setup_nic_devices(oct);
3901         if (retval) {
3902                 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n");
3903                 goto octnet_init_failure;
3904         }
3905
3906         liquidio_ptp_init(oct);
3907
3908         /* Initialize interrupt moderation params */
3909         intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
3910         intrmod_cfg->rx_enable = 1;
3911         intrmod_cfg->check_intrvl =   LIO_INTRMOD_CHECK_INTERVAL;
3912         intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
3913         intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
3914         intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
3915         intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
3916         intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
3917         intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
3918         intrmod_cfg->tx_enable = 1;
3919         intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
3920         intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
3921         intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
3922         intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
3923         intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
3924         dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
3925
3926         return retval;
3927
3928 octnet_init_failure:
3929
3930         oct->ifcount = 0;
3931
3932         return retval;
3933 }
3934
3935 /**
3936  * \brief starter callback that invokes the remaining initialization work after
3937  * the NIC is up and running.
3938  * @param octptr  work struct work_struct
3939  */
3940 static void nic_starter(struct work_struct *work)
3941 {
3942         struct octeon_device *oct;
3943         struct cavium_wk *wk = (struct cavium_wk *)work;
3944
3945         oct = (struct octeon_device *)wk->ctxptr;
3946
3947         if (atomic_read(&oct->status) == OCT_DEV_RUNNING)
3948                 return;
3949
3950         /* If the status of the device is CORE_OK, the core
3951          * application has reported its application type. Call
3952          * any registered handlers now and move to the RUNNING
3953          * state.
3954          */
3955         if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) {
3956                 schedule_delayed_work(&oct->nic_poll_work.work,
3957                                       LIQUIDIO_STARTER_POLL_INTERVAL_MS);
3958                 return;
3959         }
3960
3961         atomic_set(&oct->status, OCT_DEV_RUNNING);
3962
3963         if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) {
3964                 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n");
3965
3966                 if (liquidio_init_nic_module(oct))
3967                         dev_err(&oct->pci_dev->dev, "NIC initialization failed\n");
3968                 else
3969                         handshake[oct->octeon_id].started_ok = 1;
3970         } else {
3971                 dev_err(&oct->pci_dev->dev,
3972                         "Unexpected application running on NIC (%d). Check firmware.\n",
3973                         oct->app_mode);
3974         }
3975
3976         complete(&handshake[oct->octeon_id].started);
3977 }
3978
3979 /**
3980  * \brief Device initialization for each Octeon device that is probed
3981  * @param octeon_dev  octeon device
3982  */
3983 static int octeon_device_init(struct octeon_device *octeon_dev)
3984 {
3985         int j, ret;
3986         int fw_loaded = 0;
3987         char bootcmd[] = "\n";
3988         struct octeon_device_priv *oct_priv =
3989                 (struct octeon_device_priv *)octeon_dev->priv;
3990         atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE);
3991
3992         /* Enable access to the octeon device and make its DMA capability
3993          * known to the OS.
3994          */
3995         if (octeon_pci_os_setup(octeon_dev))
3996                 return 1;
3997
3998         /* Identify the Octeon type and map the BAR address space. */
3999         if (octeon_chip_specific_setup(octeon_dev)) {
4000                 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n");
4001                 return 1;
4002         }
4003
4004         atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE);
4005
4006         octeon_dev->app_mode = CVM_DRV_INVALID_APP;
4007
4008         if (OCTEON_CN23XX_PF(octeon_dev)) {
4009                 if (!cn23xx_fw_loaded(octeon_dev)) {
4010                         fw_loaded = 0;
4011                         /* Do a soft reset of the Octeon device. */
4012                         if (octeon_dev->fn_list.soft_reset(octeon_dev))
4013                                 return 1;
4014                         /* things might have changed */
4015                         if (!cn23xx_fw_loaded(octeon_dev))
4016                                 fw_loaded = 0;
4017                         else
4018                                 fw_loaded = 1;
4019                 } else {
4020                         fw_loaded = 1;
4021                 }
4022         } else if (octeon_dev->fn_list.soft_reset(octeon_dev)) {
4023                 return 1;
4024         }
4025
4026         /* Initialize the dispatch mechanism used to push packets arriving on
4027          * Octeon Output queues.
4028          */
4029         if (octeon_init_dispatch_list(octeon_dev))
4030                 return 1;
4031
4032         octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
4033                                     OPCODE_NIC_CORE_DRV_ACTIVE,
4034                                     octeon_core_drv_init,
4035                                     octeon_dev);
4036
4037         INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter);
4038         octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev;
4039         schedule_delayed_work(&octeon_dev->nic_poll_work.work,
4040                               LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4041
4042         atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE);
4043
4044         octeon_set_io_queues_off(octeon_dev);
4045
4046         if (OCTEON_CN23XX_PF(octeon_dev)) {
4047                 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4048                 if (ret) {
4049                         dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n");
4050                         return ret;
4051                 }
4052         }
4053
4054         /* Initialize soft command buffer pool
4055          */
4056         if (octeon_setup_sc_buffer_pool(octeon_dev)) {
4057                 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n");
4058                 return 1;
4059         }
4060         atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE);
4061
4062         /*  Setup the data structures that manage this Octeon's Input queues. */
4063         if (octeon_setup_instr_queues(octeon_dev)) {
4064                 dev_err(&octeon_dev->pci_dev->dev,
4065                         "instruction queue initialization failed\n");
4066                 /* On error, release any previously allocated queues */
4067                 for (j = 0; j < octeon_dev->num_iqs; j++)
4068                         octeon_delete_instr_queue(octeon_dev, j);
4069                 return 1;
4070         }
4071         atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE);
4072
4073         /* Initialize lists to manage the requests of different types that
4074          * arrive from user & kernel applications for this octeon device.
4075          */
4076         if (octeon_setup_response_list(octeon_dev)) {
4077                 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n");
4078                 return 1;
4079         }
4080         atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE);
4081
4082         if (octeon_setup_output_queues(octeon_dev)) {
4083                 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n");
4084                 /* Release any previously allocated queues */
4085                 for (j = 0; j < octeon_dev->num_oqs; j++)
4086                         octeon_delete_droq(octeon_dev, j);
4087                 return 1;
4088         }
4089
4090         atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE);
4091
4092         if (OCTEON_CN23XX_PF(octeon_dev)) {
4093                 if (octeon_allocate_ioq_vector(octeon_dev)) {
4094                         dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n");
4095                         return 1;
4096                 }
4097
4098         } else {
4099                 /* The input and output queue registers were setup earlier (the
4100                  * queues were not enabled). Any additional registers
4101                  * that need to be programmed should be done now.
4102                  */
4103                 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4104                 if (ret) {
4105                         dev_err(&octeon_dev->pci_dev->dev,
4106                                 "Failed to configure device registers\n");
4107                         return ret;
4108                 }
4109         }
4110
4111         /* Initialize the tasklet that handles output queue packet processing.*/
4112         dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n");
4113         tasklet_init(&oct_priv->droq_tasklet, octeon_droq_bh,
4114                      (unsigned long)octeon_dev);
4115
4116         /* Setup the interrupt handler and record the INT SUM register address
4117          */
4118         if (octeon_setup_interrupt(octeon_dev))
4119                 return 1;
4120
4121         /* Enable Octeon device interrupts */
4122         octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR);
4123
4124         /* Enable the input and output queues for this Octeon device */
4125         ret = octeon_dev->fn_list.enable_io_queues(octeon_dev);
4126         if (ret) {
4127                 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues");
4128                 return ret;
4129         }
4130
4131         atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE);
4132
4133         if ((!OCTEON_CN23XX_PF(octeon_dev)) || !fw_loaded) {
4134                 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n");
4135                 if (!ddr_timeout) {
4136                         dev_info(&octeon_dev->pci_dev->dev,
4137                                  "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n");
4138                 }
4139
4140                 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS);
4141
4142                 /* Wait for the octeon to initialize DDR after the soft-reset.*/
4143                 while (!ddr_timeout) {
4144                         set_current_state(TASK_INTERRUPTIBLE);
4145                         if (schedule_timeout(HZ / 10)) {
4146                                 /* user probably pressed Control-C */
4147                                 return 1;
4148                         }
4149                 }
4150                 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout);
4151                 if (ret) {
4152                         dev_err(&octeon_dev->pci_dev->dev,
4153                                 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n",
4154                                 ret);
4155                         return 1;
4156                 }
4157
4158                 if (octeon_wait_for_bootloader(octeon_dev, 1000)) {
4159                         dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n");
4160                         return 1;
4161                 }
4162
4163                 /* Divert uboot to take commands from host instead. */
4164                 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50);
4165
4166                 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n");
4167                 ret = octeon_init_consoles(octeon_dev);
4168                 if (ret) {
4169                         dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n");
4170                         return 1;
4171                 }
4172                 ret = octeon_add_console(octeon_dev, 0);
4173                 if (ret) {
4174                         dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n");
4175                         return 1;
4176                 }
4177
4178                 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE);
4179
4180                 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n");
4181                 ret = load_firmware(octeon_dev);
4182                 if (ret) {
4183                         dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n");
4184                         return 1;
4185                 }
4186                 /* set bit 1 of SLI_SCRATCH_1 to indicate that firmware is
4187                  * loaded
4188                  */
4189                 if (OCTEON_CN23XX_PF(octeon_dev))
4190                         octeon_write_csr64(octeon_dev, CN23XX_SLI_SCRATCH1,
4191                                            2ULL);
4192         }
4193
4194         handshake[octeon_dev->octeon_id].init_ok = 1;
4195         complete(&handshake[octeon_dev->octeon_id].init);
4196
4197         atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK);
4198
4199         /* Send Credit for Octeon Output queues. Credits are always sent after
4200          * the output queue is enabled.
4201          */
4202         for (j = 0; j < octeon_dev->num_oqs; j++)
4203                 writel(octeon_dev->droq[j]->max_count,
4204                        octeon_dev->droq[j]->pkts_credit_reg);
4205
4206         /* Packets can start arriving on the output queues from this point. */
4207         return 0;
4208 }
4209
4210 /**
4211  * \brief Exits the module
4212  */
4213 static void __exit liquidio_exit(void)
4214 {
4215         liquidio_deinit_pci();
4216
4217         pr_info("LiquidIO network module is now unloaded\n");
4218 }
4219
4220 module_init(liquidio_init);
4221 module_exit(liquidio_exit);