1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2015 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * This file may also be available under a different license from Cavium.
20 * Contact Cavium, Inc. for more information
21 **********************************************************************/
22 #include <linux/version.h>
23 #include <linux/pci.h>
24 #include <linux/firmware.h>
25 #include <linux/ptp_clock_kernel.h>
26 #include <net/vxlan.h>
27 #include <linux/kthread.h>
28 #include "liquidio_common.h"
29 #include "octeon_droq.h"
30 #include "octeon_iq.h"
31 #include "response_manager.h"
32 #include "octeon_device.h"
33 #include "octeon_nic.h"
34 #include "octeon_main.h"
35 #include "octeon_network.h"
36 #include "cn66xx_regs.h"
37 #include "cn66xx_device.h"
38 #include "cn68xx_device.h"
39 #include "cn23xx_pf_device.h"
40 #include "liquidio_image.h"
42 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>");
43 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver");
44 MODULE_LICENSE("GPL");
45 MODULE_VERSION(LIQUIDIO_VERSION);
46 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME LIO_FW_NAME_SUFFIX);
47 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME LIO_FW_NAME_SUFFIX);
48 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME LIO_FW_NAME_SUFFIX);
50 static int ddr_timeout = 10000;
51 module_param(ddr_timeout, int, 0644);
52 MODULE_PARM_DESC(ddr_timeout,
53 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check");
55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
57 #define INCR_INSTRQUEUE_PKT_COUNT(octeon_dev_ptr, iq_no, field, count) \
58 (octeon_dev_ptr->instr_queue[iq_no]->stats.field += count)
60 static int debug = -1;
61 module_param(debug, int, 0644);
62 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits");
64 static char fw_type[LIO_MAX_FW_TYPE_LEN];
65 module_param_string(fw_type, fw_type, sizeof(fw_type), 0000);
66 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded. Default \"nic\"");
69 module_param(conf_type, int, 0);
70 MODULE_PARM_DESC(conf_type, "select octeon configuration 0 default 1 ovs");
72 static int ptp_enable = 1;
74 /* Bit mask values for lio->ifstate */
75 #define LIO_IFSTATE_DROQ_OPS 0x01
76 #define LIO_IFSTATE_REGISTERED 0x02
77 #define LIO_IFSTATE_RUNNING 0x04
78 #define LIO_IFSTATE_RX_TIMESTAMP_ENABLED 0x08
80 /* Polling interval for determining when NIC application is alive */
81 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100
83 /* runtime link query interval */
84 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000
86 struct liquidio_if_cfg_context {
94 struct liquidio_if_cfg_resp {
96 struct liquidio_if_cfg_info cfg_info;
100 struct liquidio_rx_ctl_context {
103 wait_queue_head_t wc;
108 struct oct_link_status_resp {
110 struct oct_link_info link_info;
114 struct oct_timestamp_resp {
120 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp))
125 #ifdef __BIG_ENDIAN_BITFIELD
137 /** Octeon device properties to be used by the NIC module.
138 * Each octeon device in the system will be represented
139 * by this structure in the NIC module.
142 #define OCTNIC_MAX_SG (MAX_SKB_FRAGS)
144 #define OCTNIC_GSO_MAX_HEADER_SIZE 128
145 #define OCTNIC_GSO_MAX_SIZE \
146 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE)
148 /** Structure of a node in list of gather components maintained by
149 * NIC driver for each network device.
151 struct octnic_gather {
152 /** List manipulation. Next and prev pointers. */
153 struct list_head list;
155 /** Size of the gather component at sg in bytes. */
158 /** Number of bytes that sg was adjusted to make it 8B-aligned. */
161 /** Gather component that can accommodate max sized fragment list
162 * received from the IP layer.
164 struct octeon_sg_entry *sg;
170 struct completion init;
171 struct completion started;
172 struct pci_dev *pci_dev;
177 struct octeon_device_priv {
178 /** Tasklet structures for this device. */
179 struct tasklet_struct droq_tasklet;
180 unsigned long napi_mask;
183 static int octeon_device_init(struct octeon_device *);
184 static int liquidio_stop(struct net_device *netdev);
185 static void liquidio_remove(struct pci_dev *pdev);
186 static int liquidio_probe(struct pci_dev *pdev,
187 const struct pci_device_id *ent);
189 static struct handshake handshake[MAX_OCTEON_DEVICES];
190 static struct completion first_stage;
192 static void octeon_droq_bh(unsigned long pdev)
196 struct octeon_device *oct = (struct octeon_device *)pdev;
197 struct octeon_device_priv *oct_priv =
198 (struct octeon_device_priv *)oct->priv;
200 /* for (q_no = 0; q_no < oct->num_oqs; q_no++) { */
201 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) {
202 if (!(oct->io_qmask.oq & (1ULL << q_no)))
204 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no],
206 lio_enable_irq(oct->droq[q_no], NULL);
208 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
209 /* set time and cnt interrupt thresholds for this DROQ
212 int adjusted_q_no = q_no + oct->sriov_info.pf_srn;
215 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no),
218 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0);
223 tasklet_schedule(&oct_priv->droq_tasklet);
226 static int lio_wait_for_oq_pkts(struct octeon_device *oct)
228 struct octeon_device_priv *oct_priv =
229 (struct octeon_device_priv *)oct->priv;
230 int retry = 100, pkt_cnt = 0, pending_pkts = 0;
236 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
237 if (!(oct->io_qmask.oq & (1ULL << i)))
239 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]);
242 pending_pkts += pkt_cnt;
243 tasklet_schedule(&oct_priv->droq_tasklet);
246 schedule_timeout_uninterruptible(1);
248 } while (retry-- && pending_pkts);
254 * \brief Forces all IO queues off on a given device
255 * @param oct Pointer to Octeon device
257 static void force_io_queues_off(struct octeon_device *oct)
259 if ((oct->chip_id == OCTEON_CN66XX) ||
260 (oct->chip_id == OCTEON_CN68XX)) {
261 /* Reset the Enable bits for Input Queues. */
262 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0);
264 /* Reset the Enable bits for Output Queues. */
265 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0);
270 * \brief wait for all pending requests to complete
271 * @param oct Pointer to Octeon device
273 * Called during shutdown sequence
275 static int wait_for_pending_requests(struct octeon_device *oct)
279 for (i = 0; i < 100; i++) {
281 atomic_read(&oct->response_list
282 [OCTEON_ORDERED_SC_LIST].pending_req_count);
284 schedule_timeout_uninterruptible(HZ / 10);
296 * \brief Cause device to go quiet so it can be safely removed/reset/etc
297 * @param oct Pointer to Octeon device
299 static inline void pcierror_quiesce_device(struct octeon_device *oct)
303 /* Disable the input and output queues now. No more packets will
304 * arrive from Octeon, but we should wait for all packet processing
307 force_io_queues_off(oct);
309 /* To allow for in-flight requests */
310 schedule_timeout_uninterruptible(100);
312 if (wait_for_pending_requests(oct))
313 dev_err(&oct->pci_dev->dev, "There were pending requests\n");
315 /* Force all requests waiting to be fetched by OCTEON to complete. */
316 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
317 struct octeon_instr_queue *iq;
319 if (!(oct->io_qmask.iq & (1ULL << i)))
321 iq = oct->instr_queue[i];
323 if (atomic_read(&iq->instr_pending)) {
324 spin_lock_bh(&iq->lock);
326 iq->octeon_read_index = iq->host_write_index;
327 iq->stats.instr_processed +=
328 atomic_read(&iq->instr_pending);
329 lio_process_iq_request_list(oct, iq, 0);
330 spin_unlock_bh(&iq->lock);
334 /* Force all pending ordered list requests to time out. */
335 lio_process_ordered_list(oct, 1);
337 /* We do not need to wait for output queue packets to be processed. */
341 * \brief Cleanup PCI AER uncorrectable error status
342 * @param dev Pointer to PCI device
344 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
349 pr_info("%s :\n", __func__);
351 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
352 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
353 if (dev->error_state == pci_channel_io_normal)
354 status &= ~mask; /* Clear corresponding nonfatal bits */
356 status &= mask; /* Clear corresponding fatal bits */
357 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
361 * \brief Stop all PCI IO to a given device
362 * @param dev Pointer to Octeon device
364 static void stop_pci_io(struct octeon_device *oct)
366 /* No more instructions will be forwarded. */
367 atomic_set(&oct->status, OCT_DEV_IN_RESET);
369 pci_disable_device(oct->pci_dev);
371 /* Disable interrupts */
372 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
374 pcierror_quiesce_device(oct);
376 /* Release the interrupt line */
377 free_irq(oct->pci_dev->irq, oct);
379 if (oct->flags & LIO_FLAG_MSI_ENABLED)
380 pci_disable_msi(oct->pci_dev);
382 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
383 lio_get_state_string(&oct->status));
385 /* cn63xx_cleanup_aer_uncorrect_error_status(oct->pci_dev); */
386 /* making it a common function for all OCTEON models */
387 cleanup_aer_uncorrect_error_status(oct->pci_dev);
391 * \brief called when PCI error is detected
392 * @param pdev Pointer to PCI device
393 * @param state The current pci connection state
395 * This function is called after a PCI bus error affecting
396 * this device has been detected.
398 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev,
399 pci_channel_state_t state)
401 struct octeon_device *oct = pci_get_drvdata(pdev);
403 /* Non-correctable Non-fatal errors */
404 if (state == pci_channel_io_normal) {
405 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n");
406 cleanup_aer_uncorrect_error_status(oct->pci_dev);
407 return PCI_ERS_RESULT_CAN_RECOVER;
410 /* Non-correctable Fatal errors */
411 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n");
414 /* Always return a DISCONNECT. There is no support for recovery but only
415 * for a clean shutdown.
417 return PCI_ERS_RESULT_DISCONNECT;
421 * \brief mmio handler
422 * @param pdev Pointer to PCI device
424 static pci_ers_result_t liquidio_pcie_mmio_enabled(
425 struct pci_dev *pdev __attribute__((unused)))
427 /* We should never hit this since we never ask for a reset for a Fatal
428 * Error. We always return DISCONNECT in io_error above.
429 * But play safe and return RECOVERED for now.
431 return PCI_ERS_RESULT_RECOVERED;
435 * \brief called after the pci bus has been reset.
436 * @param pdev Pointer to PCI device
438 * Restart the card from scratch, as if from a cold-boot. Implementation
439 * resembles the first-half of the octeon_resume routine.
441 static pci_ers_result_t liquidio_pcie_slot_reset(
442 struct pci_dev *pdev __attribute__((unused)))
444 /* We should never hit this since we never ask for a reset for a Fatal
445 * Error. We always return DISCONNECT in io_error above.
446 * But play safe and return RECOVERED for now.
448 return PCI_ERS_RESULT_RECOVERED;
452 * \brief called when traffic can start flowing again.
453 * @param pdev Pointer to PCI device
455 * This callback is called when the error recovery driver tells us that
456 * its OK to resume normal operation. Implementation resembles the
457 * second-half of the octeon_resume routine.
459 static void liquidio_pcie_resume(struct pci_dev *pdev __attribute__((unused)))
461 /* Nothing to be done here. */
466 * \brief called when suspending
467 * @param pdev Pointer to PCI device
468 * @param state state to suspend to
470 static int liquidio_suspend(struct pci_dev *pdev __attribute__((unused)),
471 pm_message_t state __attribute__((unused)))
477 * \brief called when resuming
478 * @param pdev Pointer to PCI device
480 static int liquidio_resume(struct pci_dev *pdev __attribute__((unused)))
486 /* For PCI-E Advanced Error Recovery (AER) Interface */
487 static const struct pci_error_handlers liquidio_err_handler = {
488 .error_detected = liquidio_pcie_error_detected,
489 .mmio_enabled = liquidio_pcie_mmio_enabled,
490 .slot_reset = liquidio_pcie_slot_reset,
491 .resume = liquidio_pcie_resume,
494 static const struct pci_device_id liquidio_pci_tbl[] = {
496 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
499 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
502 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0
508 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl);
510 static struct pci_driver liquidio_pci_driver = {
512 .id_table = liquidio_pci_tbl,
513 .probe = liquidio_probe,
514 .remove = liquidio_remove,
515 .err_handler = &liquidio_err_handler, /* For AER */
518 .suspend = liquidio_suspend,
519 .resume = liquidio_resume,
524 * \brief register PCI driver
526 static int liquidio_init_pci(void)
528 return pci_register_driver(&liquidio_pci_driver);
532 * \brief unregister PCI driver
534 static void liquidio_deinit_pci(void)
536 pci_unregister_driver(&liquidio_pci_driver);
540 * \brief check interface state
541 * @param lio per-network private data
542 * @param state_flag flag state to check
544 static inline int ifstate_check(struct lio *lio, int state_flag)
546 return atomic_read(&lio->ifstate) & state_flag;
550 * \brief set interface state
551 * @param lio per-network private data
552 * @param state_flag flag state to set
554 static inline void ifstate_set(struct lio *lio, int state_flag)
556 atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) | state_flag));
560 * \brief clear interface state
561 * @param lio per-network private data
562 * @param state_flag flag state to clear
564 static inline void ifstate_reset(struct lio *lio, int state_flag)
566 atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) & ~(state_flag)));
570 * \brief Stop Tx queues
571 * @param netdev network device
573 static inline void txqs_stop(struct net_device *netdev)
575 if (netif_is_multiqueue(netdev)) {
578 for (i = 0; i < netdev->num_tx_queues; i++)
579 netif_stop_subqueue(netdev, i);
581 netif_stop_queue(netdev);
586 * \brief Start Tx queues
587 * @param netdev network device
589 static inline void txqs_start(struct net_device *netdev)
591 if (netif_is_multiqueue(netdev)) {
594 for (i = 0; i < netdev->num_tx_queues; i++)
595 netif_start_subqueue(netdev, i);
597 netif_start_queue(netdev);
602 * \brief Wake Tx queues
603 * @param netdev network device
605 static inline void txqs_wake(struct net_device *netdev)
607 struct lio *lio = GET_LIO(netdev);
609 if (netif_is_multiqueue(netdev)) {
612 for (i = 0; i < netdev->num_tx_queues; i++) {
613 int qno = lio->linfo.txpciq[i %
614 (lio->linfo.num_txpciq)].s.q_no;
616 if (__netif_subqueue_stopped(netdev, i)) {
617 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno,
619 netif_wake_subqueue(netdev, i);
623 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
625 netif_wake_queue(netdev);
630 * \brief Stop Tx queue
631 * @param netdev network device
633 static void stop_txq(struct net_device *netdev)
639 * \brief Start Tx queue
640 * @param netdev network device
642 static void start_txq(struct net_device *netdev)
644 struct lio *lio = GET_LIO(netdev);
646 if (lio->linfo.link.s.link_up) {
653 * \brief Wake a queue
654 * @param netdev network device
655 * @param q which queue to wake
657 static inline void wake_q(struct net_device *netdev, int q)
659 if (netif_is_multiqueue(netdev))
660 netif_wake_subqueue(netdev, q);
662 netif_wake_queue(netdev);
666 * \brief Stop a queue
667 * @param netdev network device
668 * @param q which queue to stop
670 static inline void stop_q(struct net_device *netdev, int q)
672 if (netif_is_multiqueue(netdev))
673 netif_stop_subqueue(netdev, q);
675 netif_stop_queue(netdev);
679 * \brief Check Tx queue status, and take appropriate action
680 * @param lio per-network private data
681 * @returns 0 if full, number of queues woken up otherwise
683 static inline int check_txq_status(struct lio *lio)
687 if (netif_is_multiqueue(lio->netdev)) {
688 int numqs = lio->netdev->num_tx_queues;
691 /* check each sub-queue state */
692 for (q = 0; q < numqs; q++) {
693 iq = lio->linfo.txpciq[q %
694 (lio->linfo.num_txpciq)].s.q_no;
695 if (octnet_iq_is_full(lio->oct_dev, iq))
697 if (__netif_subqueue_stopped(lio->netdev, q)) {
698 wake_q(lio->netdev, q);
699 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq,
705 if (octnet_iq_is_full(lio->oct_dev, lio->txq))
707 wake_q(lio->netdev, lio->txq);
708 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq,
716 * Remove the node at the head of the list. The list would be empty at
717 * the end of this call if there are no more nodes in the list.
719 static inline struct list_head *list_delete_head(struct list_head *root)
721 struct list_head *node;
723 if ((root->prev == root) && (root->next == root))
735 * \brief Delete gather lists
736 * @param lio per-network private data
738 static void delete_glists(struct lio *lio)
740 struct octnic_gather *g;
746 for (i = 0; i < lio->linfo.num_txpciq; i++) {
748 g = (struct octnic_gather *)
749 list_delete_head(&lio->glist[i]);
752 dma_unmap_single(&lio->oct_dev->
757 kfree((void *)((unsigned long)g->sg -
765 kfree((void *)lio->glist);
769 * \brief Setup gather lists
770 * @param lio per-network private data
772 static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs)
775 struct octnic_gather *g;
777 lio->glist_lock = kcalloc(num_iqs, sizeof(*lio->glist_lock),
779 if (!lio->glist_lock)
782 lio->glist = kcalloc(num_iqs, sizeof(*lio->glist),
785 kfree((void *)lio->glist_lock);
789 for (i = 0; i < num_iqs; i++) {
790 int numa_node = cpu_to_node(i % num_online_cpus());
792 spin_lock_init(&lio->glist_lock[i]);
794 INIT_LIST_HEAD(&lio->glist[i]);
796 for (j = 0; j < lio->tx_qsize; j++) {
797 g = kzalloc_node(sizeof(*g), GFP_KERNEL,
800 g = kzalloc(sizeof(*g), GFP_KERNEL);
804 g->sg_size = ((ROUNDUP4(OCTNIC_MAX_SG) >> 2) *
807 g->sg = kmalloc_node(g->sg_size + 8,
808 GFP_KERNEL, numa_node);
810 g->sg = kmalloc(g->sg_size + 8, GFP_KERNEL);
816 /* The gather component should be aligned on 64-bit
819 if (((unsigned long)g->sg) & 7) {
820 g->adjust = 8 - (((unsigned long)g->sg) & 7);
821 g->sg = (struct octeon_sg_entry *)
822 ((unsigned long)g->sg + g->adjust);
824 g->sg_dma_ptr = dma_map_single(&oct->pci_dev->dev,
827 if (dma_mapping_error(&oct->pci_dev->dev,
829 kfree((void *)((unsigned long)g->sg -
835 list_add_tail(&g->list, &lio->glist[i]);
838 if (j != lio->tx_qsize) {
848 * \brief Print link information
849 * @param netdev network device
851 static void print_link_info(struct net_device *netdev)
853 struct lio *lio = GET_LIO(netdev);
855 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) {
856 struct oct_link_info *linfo = &lio->linfo;
858 if (linfo->link.s.link_up) {
859 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n",
861 (linfo->link.s.duplex) ? "Full" : "Half");
863 netif_info(lio, link, lio->netdev, "Link Down\n");
869 * \brief Routine to notify MTU change
870 * @param work work_struct data structure
872 static void octnet_link_status_change(struct work_struct *work)
874 struct cavium_wk *wk = (struct cavium_wk *)work;
875 struct lio *lio = (struct lio *)wk->ctxptr;
878 call_netdevice_notifiers(NETDEV_CHANGEMTU, lio->netdev);
883 * \brief Sets up the mtu status change work
884 * @param netdev network device
886 static inline int setup_link_status_change_wq(struct net_device *netdev)
888 struct lio *lio = GET_LIO(netdev);
889 struct octeon_device *oct = lio->oct_dev;
891 lio->link_status_wq.wq = alloc_workqueue("link-status",
893 if (!lio->link_status_wq.wq) {
894 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n");
897 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work,
898 octnet_link_status_change);
899 lio->link_status_wq.wk.ctxptr = lio;
904 static inline void cleanup_link_status_change_wq(struct net_device *netdev)
906 struct lio *lio = GET_LIO(netdev);
908 if (lio->link_status_wq.wq) {
909 cancel_delayed_work_sync(&lio->link_status_wq.wk.work);
910 destroy_workqueue(lio->link_status_wq.wq);
915 * \brief Update link status
916 * @param netdev network device
917 * @param ls link status structure
919 * Called on receipt of a link status response from the core application to
920 * update each interface's link status.
922 static inline void update_link_status(struct net_device *netdev,
923 union oct_link_status *ls)
925 struct lio *lio = GET_LIO(netdev);
926 int changed = (lio->linfo.link.u64 != ls->u64);
928 lio->linfo.link.u64 = ls->u64;
930 if ((lio->intf_open) && (changed)) {
931 print_link_info(netdev);
934 if (lio->linfo.link.s.link_up) {
935 netif_carrier_on(netdev);
936 /* start_txq(netdev); */
939 netif_carrier_off(netdev);
945 /* Runs in interrupt context. */
946 static void update_txq_status(struct octeon_device *oct, int iq_num)
948 struct net_device *netdev;
950 struct octeon_instr_queue *iq = oct->instr_queue[iq_num];
952 netdev = oct->props[iq->ifidx].netdev;
954 /* This is needed because the first IQ does not have
955 * a netdev associated with it.
960 lio = GET_LIO(netdev);
961 if (netif_is_multiqueue(netdev)) {
962 if (__netif_subqueue_stopped(netdev, iq->q_index) &&
963 lio->linfo.link.s.link_up &&
964 (!octnet_iq_is_full(oct, iq_num))) {
965 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq_num,
967 netif_wake_subqueue(netdev, iq->q_index);
969 if (!octnet_iq_is_full(oct, lio->txq)) {
970 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev,
973 wake_q(netdev, lio->txq);
980 int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret)
982 struct octeon_device *oct = droq->oct_dev;
983 struct octeon_device_priv *oct_priv =
984 (struct octeon_device_priv *)oct->priv;
986 if (droq->ops.poll_mode) {
987 droq->ops.napi_fn(droq);
989 if (ret & MSIX_PO_INT) {
990 tasklet_schedule(&oct_priv->droq_tasklet);
993 /* this will be flushed periodically by check iq db */
994 if (ret & MSIX_PI_INT)
1001 * \brief Droq packet processor sceduler
1002 * @param oct octeon device
1005 void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
1007 struct octeon_device_priv *oct_priv =
1008 (struct octeon_device_priv *)oct->priv;
1010 struct octeon_droq *droq;
1012 if (oct->int_status & OCT_DEV_INTR_PKT_DATA) {
1013 for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct);
1015 if (!(oct->droq_intr & (1ULL << oq_no)))
1018 droq = oct->droq[oq_no];
1020 if (droq->ops.poll_mode) {
1021 droq->ops.napi_fn(droq);
1022 oct_priv->napi_mask |= (1 << oq_no);
1024 tasklet_schedule(&oct_priv->droq_tasklet);
1031 liquidio_msix_intr_handler(int irq __attribute__((unused)), void *dev)
1034 struct octeon_ioq_vector *ioq_vector = (struct octeon_ioq_vector *)dev;
1035 struct octeon_device *oct = ioq_vector->oct_dev;
1036 struct octeon_droq *droq = oct->droq[ioq_vector->droq_index];
1038 ret = oct->fn_list.msix_interrupt_handler(ioq_vector);
1040 if ((ret & MSIX_PO_INT) || (ret & MSIX_PI_INT))
1041 liquidio_schedule_msix_droq_pkt_handler(droq, ret);
1047 * \brief Interrupt handler for octeon
1049 * @param dev octeon device
1052 irqreturn_t liquidio_legacy_intr_handler(int irq __attribute__((unused)),
1055 struct octeon_device *oct = (struct octeon_device *)dev;
1058 /* Disable our interrupts for the duration of ISR */
1059 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1061 ret = oct->fn_list.process_interrupt_regs(oct);
1063 if (ret == IRQ_HANDLED)
1064 liquidio_schedule_droq_pkt_handlers(oct);
1066 /* Re-enable our interrupts */
1067 if (!(atomic_read(&oct->status) == OCT_DEV_IN_RESET))
1068 oct->fn_list.enable_interrupt(oct, OCTEON_ALL_INTR);
1074 * \brief Setup interrupt for octeon device
1075 * @param oct octeon device
1077 * Enable interrupt in Octeon device as given in the PCI interrupt mask.
1079 static int octeon_setup_interrupt(struct octeon_device *oct)
1082 struct msix_entry *msix_entries;
1084 int num_ioq_vectors;
1085 int num_alloc_ioq_vectors;
1087 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) {
1088 oct->num_msix_irqs = oct->sriov_info.num_pf_rings;
1089 /* one non ioq interrupt for handling sli_mac_pf_int_sum */
1090 oct->num_msix_irqs += 1;
1092 oct->msix_entries = kcalloc(
1093 oct->num_msix_irqs, sizeof(struct msix_entry), GFP_KERNEL);
1094 if (!oct->msix_entries)
1097 msix_entries = (struct msix_entry *)oct->msix_entries;
1098 /*Assumption is that pf msix vectors start from pf srn to pf to
1099 * trs and not from 0. if not change this code
1101 for (i = 0; i < oct->num_msix_irqs - 1; i++)
1102 msix_entries[i].entry = oct->sriov_info.pf_srn + i;
1103 msix_entries[oct->num_msix_irqs - 1].entry =
1104 oct->sriov_info.trs;
1105 num_alloc_ioq_vectors = pci_enable_msix_range(
1106 oct->pci_dev, msix_entries,
1108 oct->num_msix_irqs);
1109 if (num_alloc_ioq_vectors < 0) {
1110 dev_err(&oct->pci_dev->dev, "unable to Allocate MSI-X interrupts\n");
1111 kfree(oct->msix_entries);
1112 oct->msix_entries = NULL;
1115 dev_dbg(&oct->pci_dev->dev, "OCTEON: Enough MSI-X interrupts are allocated...\n");
1117 num_ioq_vectors = oct->num_msix_irqs;
1119 /** For PF, there is one non-ioq interrupt handler */
1120 num_ioq_vectors -= 1;
1121 irqret = request_irq(msix_entries[num_ioq_vectors].vector,
1122 liquidio_legacy_intr_handler, 0, "octeon",
1125 dev_err(&oct->pci_dev->dev,
1126 "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1128 pci_disable_msix(oct->pci_dev);
1129 kfree(oct->msix_entries);
1130 oct->msix_entries = NULL;
1134 for (i = 0; i < num_ioq_vectors; i++) {
1135 irqret = request_irq(msix_entries[i].vector,
1136 liquidio_msix_intr_handler, 0,
1137 "octeon", &oct->ioq_vector[i]);
1139 dev_err(&oct->pci_dev->dev,
1140 "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n",
1142 /** Freeing the non-ioq irq vector here . */
1143 free_irq(msix_entries[num_ioq_vectors].vector,
1148 /** clearing affinity mask. */
1149 irq_set_affinity_hint(
1150 msix_entries[i].vector, NULL);
1151 free_irq(msix_entries[i].vector,
1152 &oct->ioq_vector[i]);
1154 pci_disable_msix(oct->pci_dev);
1155 kfree(oct->msix_entries);
1156 oct->msix_entries = NULL;
1159 oct->ioq_vector[i].vector = msix_entries[i].vector;
1160 /* assign the cpu mask for this msix interrupt vector */
1161 irq_set_affinity_hint(
1162 msix_entries[i].vector,
1163 (&oct->ioq_vector[i].affinity_mask));
1165 dev_dbg(&oct->pci_dev->dev, "OCTEON[%d]: MSI-X enabled\n",
1168 err = pci_enable_msi(oct->pci_dev);
1170 dev_warn(&oct->pci_dev->dev, "Reverting to legacy interrupts. Error: %d\n",
1173 oct->flags |= LIO_FLAG_MSI_ENABLED;
1175 irqret = request_irq(oct->pci_dev->irq,
1176 liquidio_legacy_intr_handler, IRQF_SHARED,
1179 if (oct->flags & LIO_FLAG_MSI_ENABLED)
1180 pci_disable_msi(oct->pci_dev);
1181 dev_err(&oct->pci_dev->dev, "Request IRQ failed with code: %d\n",
1189 static int liquidio_watchdog(void *param)
1192 u16 mask_of_stuck_cores = 0;
1193 u16 mask_of_crashed_cores = 0;
1195 u8 core_is_stuck[LIO_MAX_CORES];
1196 u8 core_crashed[LIO_MAX_CORES];
1197 struct octeon_device *oct = param;
1199 memset(core_is_stuck, 0, sizeof(core_is_stuck));
1200 memset(core_crashed, 0, sizeof(core_crashed));
1202 while (!kthread_should_stop()) {
1203 mask_of_crashed_cores =
1204 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2);
1206 for (core_num = 0; core_num < LIO_MAX_CORES; core_num++) {
1207 if (!core_is_stuck[core_num]) {
1208 wdog = lio_pci_readq(oct, CIU3_WDOG(core_num));
1210 /* look at watchdog state field */
1211 wdog &= CIU3_WDOG_MASK;
1213 /* this watchdog timer has expired */
1214 core_is_stuck[core_num] =
1215 LIO_MONITOR_WDOG_EXPIRE;
1216 mask_of_stuck_cores |= (1 << core_num);
1220 if (!core_crashed[core_num])
1221 core_crashed[core_num] =
1222 (mask_of_crashed_cores >> core_num) & 1;
1225 if (mask_of_stuck_cores) {
1226 for (core_num = 0; core_num < LIO_MAX_CORES;
1228 if (core_is_stuck[core_num] == 1) {
1229 dev_err(&oct->pci_dev->dev,
1230 "ERROR: Octeon core %d is stuck!\n",
1232 /* 2 means we have printk'd an error
1233 * so no need to repeat the same printk
1235 core_is_stuck[core_num] =
1236 LIO_MONITOR_CORE_STUCK_MSGD;
1241 if (mask_of_crashed_cores) {
1242 for (core_num = 0; core_num < LIO_MAX_CORES;
1244 if (core_crashed[core_num] == 1) {
1245 dev_err(&oct->pci_dev->dev,
1246 "ERROR: Octeon core %d crashed! See oct-fwdump for details.\n",
1248 /* 2 means we have printk'd an error
1249 * so no need to repeat the same printk
1251 core_crashed[core_num] =
1252 LIO_MONITOR_CORE_STUCK_MSGD;
1256 #ifdef CONFIG_MODULE_UNLOAD
1257 if (mask_of_stuck_cores || mask_of_crashed_cores) {
1258 /* make module refcount=0 so that rmmod will work */
1261 refcount = module_refcount(THIS_MODULE);
1263 while (refcount > 0) {
1264 module_put(THIS_MODULE);
1265 refcount = module_refcount(THIS_MODULE);
1268 /* compensate for and withstand an unlikely (but still
1269 * possible) race condition
1271 while (refcount < 0) {
1272 try_module_get(THIS_MODULE);
1273 refcount = module_refcount(THIS_MODULE);
1277 /* sleep for two seconds */
1278 set_current_state(TASK_INTERRUPTIBLE);
1279 schedule_timeout(2 * HZ);
1286 * \brief PCI probe handler
1287 * @param pdev PCI device structure
1291 liquidio_probe(struct pci_dev *pdev,
1292 const struct pci_device_id *ent __attribute__((unused)))
1294 struct octeon_device *oct_dev = NULL;
1295 struct handshake *hs;
1297 oct_dev = octeon_allocate_device(pdev->device,
1298 sizeof(struct octeon_device_priv));
1300 dev_err(&pdev->dev, "Unable to allocate device\n");
1304 if (pdev->device == OCTEON_CN23XX_PF_VID)
1305 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED;
1307 dev_info(&pdev->dev, "Initializing device %x:%x.\n",
1308 (u32)pdev->vendor, (u32)pdev->device);
1310 /* Assign octeon_device for this device to the private data area. */
1311 pci_set_drvdata(pdev, oct_dev);
1313 /* set linux specific device pointer */
1314 oct_dev->pci_dev = (void *)pdev;
1316 hs = &handshake[oct_dev->octeon_id];
1317 init_completion(&hs->init);
1318 init_completion(&hs->started);
1321 if (oct_dev->octeon_id == 0)
1322 /* first LiquidIO NIC is detected */
1323 complete(&first_stage);
1325 if (octeon_device_init(oct_dev)) {
1326 liquidio_remove(pdev);
1330 if (OCTEON_CN23XX_PF(oct_dev)) {
1332 u8 bus, device, function;
1334 scratch1 = octeon_read_csr64(oct_dev, CN23XX_SLI_SCRATCH1);
1335 if (!(scratch1 & 4ULL)) {
1336 /* Bit 2 of SLI_SCRATCH_1 is a flag that indicates that
1337 * the lio watchdog kernel thread is running for this
1338 * NIC. Each NIC gets one watchdog kernel thread.
1341 octeon_write_csr64(oct_dev, CN23XX_SLI_SCRATCH1,
1344 bus = pdev->bus->number;
1345 device = PCI_SLOT(pdev->devfn);
1346 function = PCI_FUNC(pdev->devfn);
1347 oct_dev->watchdog_task = kthread_create(
1348 liquidio_watchdog, oct_dev,
1349 "liowd/%02hhx:%02hhx.%hhx", bus, device, function);
1350 wake_up_process(oct_dev->watchdog_task);
1354 oct_dev->rx_pause = 1;
1355 oct_dev->tx_pause = 1;
1357 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n");
1363 *\brief Destroy resources associated with octeon device
1364 * @param pdev PCI device structure
1367 static void octeon_destroy_resources(struct octeon_device *oct)
1370 struct msix_entry *msix_entries;
1371 struct octeon_device_priv *oct_priv =
1372 (struct octeon_device_priv *)oct->priv;
1374 struct handshake *hs;
1376 switch (atomic_read(&oct->status)) {
1377 case OCT_DEV_RUNNING:
1378 case OCT_DEV_CORE_OK:
1380 /* No more instructions will be forwarded. */
1381 atomic_set(&oct->status, OCT_DEV_IN_RESET);
1383 oct->app_mode = CVM_DRV_INVALID_APP;
1384 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
1385 lio_get_state_string(&oct->status));
1387 schedule_timeout_uninterruptible(HZ / 10);
1390 case OCT_DEV_HOST_OK:
1393 case OCT_DEV_CONSOLE_INIT_DONE:
1394 /* Remove any consoles */
1395 octeon_remove_consoles(oct);
1398 case OCT_DEV_IO_QUEUES_DONE:
1399 if (wait_for_pending_requests(oct))
1400 dev_err(&oct->pci_dev->dev, "There were pending requests\n");
1402 if (lio_wait_for_instr_fetch(oct))
1403 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
1405 /* Disable the input and output queues now. No more packets will
1406 * arrive from Octeon, but we should wait for all packet
1407 * processing to finish.
1409 oct->fn_list.disable_io_queues(oct);
1411 if (lio_wait_for_oq_pkts(oct))
1412 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n");
1414 /* Disable interrupts */
1415 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
1418 msix_entries = (struct msix_entry *)oct->msix_entries;
1419 for (i = 0; i < oct->num_msix_irqs - 1; i++) {
1420 /* clear the affinity_cpumask */
1421 irq_set_affinity_hint(msix_entries[i].vector,
1423 free_irq(msix_entries[i].vector,
1424 &oct->ioq_vector[i]);
1426 /* non-iov vector's argument is oct struct */
1427 free_irq(msix_entries[i].vector, oct);
1429 pci_disable_msix(oct->pci_dev);
1430 kfree(oct->msix_entries);
1431 oct->msix_entries = NULL;
1433 /* Release the interrupt line */
1434 free_irq(oct->pci_dev->irq, oct);
1436 if (oct->flags & LIO_FLAG_MSI_ENABLED)
1437 pci_disable_msi(oct->pci_dev);
1440 if (OCTEON_CN23XX_PF(oct))
1441 octeon_free_ioq_vector(oct);
1443 case OCT_DEV_IN_RESET:
1444 case OCT_DEV_DROQ_INIT_DONE:
1445 /*atomic_set(&oct->status, OCT_DEV_DROQ_INIT_DONE);*/
1447 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
1448 if (!(oct->io_qmask.oq & BIT_ULL(i)))
1450 octeon_delete_droq(oct, i);
1453 /* Force any pending handshakes to complete */
1454 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
1458 handshake[oct->octeon_id].init_ok = 0;
1459 complete(&handshake[oct->octeon_id].init);
1460 handshake[oct->octeon_id].started_ok = 0;
1461 complete(&handshake[oct->octeon_id].started);
1466 case OCT_DEV_RESP_LIST_INIT_DONE:
1467 octeon_delete_response_list(oct);
1470 case OCT_DEV_INSTR_QUEUE_INIT_DONE:
1471 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
1472 if (!(oct->io_qmask.iq & BIT_ULL(i)))
1474 octeon_delete_instr_queue(oct, i);
1477 case OCT_DEV_SC_BUFF_POOL_INIT_DONE:
1478 octeon_free_sc_buffer_pool(oct);
1481 case OCT_DEV_DISPATCH_INIT_DONE:
1482 octeon_delete_dispatch_list(oct);
1483 cancel_delayed_work_sync(&oct->nic_poll_work.work);
1486 case OCT_DEV_PCI_MAP_DONE:
1487 /* Soft reset the octeon device before exiting */
1488 if ((!OCTEON_CN23XX_PF(oct)) || !oct->octeon_id)
1489 oct->fn_list.soft_reset(oct);
1491 octeon_unmap_pci_barx(oct, 0);
1492 octeon_unmap_pci_barx(oct, 1);
1495 case OCT_DEV_BEGIN_STATE:
1496 /* Disable the device, releasing the PCI INT */
1497 pci_disable_device(oct->pci_dev);
1499 /* Nothing to be done here either */
1501 } /* end switch (oct->status) */
1503 tasklet_kill(&oct_priv->droq_tasklet);
1507 * \brief Callback for rx ctrl
1508 * @param status status of request
1509 * @param buf pointer to resp structure
1511 static void rx_ctl_callback(struct octeon_device *oct,
1515 struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
1516 struct liquidio_rx_ctl_context *ctx;
1518 ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1520 oct = lio_get_device(ctx->octeon_id);
1522 dev_err(&oct->pci_dev->dev, "rx ctl instruction failed. Status: %llx\n",
1523 CVM_CAST64(status));
1524 WRITE_ONCE(ctx->cond, 1);
1526 /* This barrier is required to be sure that the response has been
1527 * written fully before waking up the handler
1531 wake_up_interruptible(&ctx->wc);
1535 * \brief Send Rx control command
1536 * @param lio per-network private data
1537 * @param start_stop whether to start or stop
1539 static void send_rx_ctrl_cmd(struct lio *lio, int start_stop)
1541 struct octeon_soft_command *sc;
1542 struct liquidio_rx_ctl_context *ctx;
1543 union octnet_cmd *ncmd;
1544 int ctx_size = sizeof(struct liquidio_rx_ctl_context);
1545 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1548 if (oct->props[lio->ifidx].rx_on == start_stop)
1551 sc = (struct octeon_soft_command *)
1552 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE,
1555 ncmd = (union octnet_cmd *)sc->virtdptr;
1556 ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr;
1558 WRITE_ONCE(ctx->cond, 0);
1559 ctx->octeon_id = lio_get_device_id(oct);
1560 init_waitqueue_head(&ctx->wc);
1563 ncmd->s.cmd = OCTNET_CMD_RX_CTL;
1564 ncmd->s.param1 = start_stop;
1566 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3));
1568 sc->iq_no = lio->linfo.txpciq[0].s.q_no;
1570 octeon_prepare_soft_command(oct, sc, OPCODE_NIC,
1571 OPCODE_NIC_CMD, 0, 0, 0);
1573 sc->callback = rx_ctl_callback;
1574 sc->callback_arg = sc;
1575 sc->wait_time = 5000;
1577 retval = octeon_send_soft_command(oct, sc);
1578 if (retval == IQ_SEND_FAILED) {
1579 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n");
1581 /* Sleep on a wait queue till the cond flag indicates that the
1582 * response arrived or timed-out.
1584 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR)
1586 oct->props[lio->ifidx].rx_on = start_stop;
1589 octeon_free_soft_command(oct, sc);
1593 * \brief Destroy NIC device interface
1594 * @param oct octeon device
1595 * @param ifidx which interface to destroy
1597 * Cleanup associated with each interface for an Octeon device when NIC
1598 * module is being unloaded or if initialization fails during load.
1600 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx)
1602 struct net_device *netdev = oct->props[ifidx].netdev;
1604 struct napi_struct *napi, *n;
1607 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n",
1612 lio = GET_LIO(netdev);
1614 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n");
1616 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING)
1617 liquidio_stop(netdev);
1619 if (oct->props[lio->ifidx].napi_enabled == 1) {
1620 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
1623 oct->props[lio->ifidx].napi_enabled = 0;
1625 if (OCTEON_CN23XX_PF(oct))
1626 oct->droq[0]->ops.poll_mode = 0;
1629 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED)
1630 unregister_netdev(netdev);
1632 cleanup_link_status_change_wq(netdev);
1636 free_netdev(netdev);
1638 oct->props[ifidx].gmxport = -1;
1640 oct->props[ifidx].netdev = NULL;
1644 * \brief Stop complete NIC functionality
1645 * @param oct octeon device
1647 static int liquidio_stop_nic_module(struct octeon_device *oct)
1652 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n");
1653 if (!oct->ifcount) {
1654 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n");
1658 spin_lock_bh(&oct->cmd_resp_wqlock);
1659 oct->cmd_resp_state = OCT_DRV_OFFLINE;
1660 spin_unlock_bh(&oct->cmd_resp_wqlock);
1662 for (i = 0; i < oct->ifcount; i++) {
1663 lio = GET_LIO(oct->props[i].netdev);
1664 for (j = 0; j < lio->linfo.num_rxpciq; j++)
1665 octeon_unregister_droq_ops(oct,
1666 lio->linfo.rxpciq[j].s.q_no);
1669 for (i = 0; i < oct->ifcount; i++)
1670 liquidio_destroy_nic_device(oct, i);
1672 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n");
1677 * \brief Cleans up resources at unload time
1678 * @param pdev PCI device structure
1680 static void liquidio_remove(struct pci_dev *pdev)
1682 struct octeon_device *oct_dev = pci_get_drvdata(pdev);
1684 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n");
1686 if (oct_dev->watchdog_task)
1687 kthread_stop(oct_dev->watchdog_task);
1689 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP))
1690 liquidio_stop_nic_module(oct_dev);
1692 /* Reset the octeon device and cleanup all memory allocated for
1693 * the octeon device by driver.
1695 octeon_destroy_resources(oct_dev);
1697 dev_info(&oct_dev->pci_dev->dev, "Device removed\n");
1699 /* This octeon device has been removed. Update the global
1700 * data structure to reflect this. Free the device structure.
1702 octeon_free_device_mem(oct_dev);
1706 * \brief Identify the Octeon device and to map the BAR address space
1707 * @param oct octeon device
1709 static int octeon_chip_specific_setup(struct octeon_device *oct)
1715 pci_read_config_dword(oct->pci_dev, 0, &dev_id);
1716 pci_read_config_dword(oct->pci_dev, 8, &rev_id);
1717 oct->rev_id = rev_id & 0xff;
1720 case OCTEON_CN68XX_PCIID:
1721 oct->chip_id = OCTEON_CN68XX;
1722 ret = lio_setup_cn68xx_octeon_device(oct);
1726 case OCTEON_CN66XX_PCIID:
1727 oct->chip_id = OCTEON_CN66XX;
1728 ret = lio_setup_cn66xx_octeon_device(oct);
1732 case OCTEON_CN23XX_PCIID_PF:
1733 oct->chip_id = OCTEON_CN23XX_PF_VID;
1734 ret = setup_cn23xx_octeon_pf_device(oct);
1740 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n",
1745 dev_info(&oct->pci_dev->dev, "%s PASS%d.%d %s Version: %s\n", s,
1746 OCTEON_MAJOR_REV(oct),
1747 OCTEON_MINOR_REV(oct),
1748 octeon_get_conf(oct)->card_name,
1755 * \brief PCI initialization for each Octeon device.
1756 * @param oct octeon device
1758 static int octeon_pci_os_setup(struct octeon_device *oct)
1760 /* setup PCI stuff first */
1761 if (pci_enable_device(oct->pci_dev)) {
1762 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n");
1766 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) {
1767 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n");
1771 /* Enable PCI DMA Master. */
1772 pci_set_master(oct->pci_dev);
1777 static inline int skb_iq(struct lio *lio, struct sk_buff *skb)
1781 if (netif_is_multiqueue(lio->netdev))
1782 q = skb->queue_mapping % lio->linfo.num_txpciq;
1788 * \brief Check Tx queue state for a given network buffer
1789 * @param lio per-network private data
1790 * @param skb network buffer
1792 static inline int check_txq_state(struct lio *lio, struct sk_buff *skb)
1796 if (netif_is_multiqueue(lio->netdev)) {
1797 q = skb->queue_mapping;
1798 iq = lio->linfo.txpciq[(q % (lio->linfo.num_txpciq))].s.q_no;
1804 if (octnet_iq_is_full(lio->oct_dev, iq))
1807 if (__netif_subqueue_stopped(lio->netdev, q)) {
1808 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, tx_restart, 1);
1809 wake_q(lio->netdev, q);
1815 * \brief Unmap and free network buffer
1818 static void free_netbuf(void *buf)
1820 struct sk_buff *skb;
1821 struct octnet_buf_free_info *finfo;
1824 finfo = (struct octnet_buf_free_info *)buf;
1828 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len,
1831 check_txq_state(lio, skb);
1833 tx_buffer_free(skb);
1837 * \brief Unmap and free gather buffer
1840 static void free_netsgbuf(void *buf)
1842 struct octnet_buf_free_info *finfo;
1843 struct sk_buff *skb;
1845 struct octnic_gather *g;
1848 finfo = (struct octnet_buf_free_info *)buf;
1852 frags = skb_shinfo(skb)->nr_frags;
1854 dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1855 g->sg[0].ptr[0], (skb->len - skb->data_len),
1860 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1862 pci_unmap_page((lio->oct_dev)->pci_dev,
1863 g->sg[(i >> 2)].ptr[(i & 3)],
1864 frag->size, DMA_TO_DEVICE);
1868 dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev,
1869 g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE);
1871 iq = skb_iq(lio, skb);
1872 spin_lock(&lio->glist_lock[iq]);
1873 list_add_tail(&g->list, &lio->glist[iq]);
1874 spin_unlock(&lio->glist_lock[iq]);
1876 check_txq_state(lio, skb); /* mq support: sub-queue state check */
1878 tx_buffer_free(skb);
1882 * \brief Unmap and free gather buffer with response
1885 static void free_netsgbuf_with_resp(void *buf)
1887 struct octeon_soft_command *sc;
1888 struct octnet_buf_free_info *finfo;
1889 struct sk_buff *skb;
1891 struct octnic_gather *g;
1894 sc = (struct octeon_soft_command *)buf;
1895 skb = (struct sk_buff *)sc->callback_arg;
1896 finfo = (struct octnet_buf_free_info *)&skb->cb;
1900 frags = skb_shinfo(skb)->nr_frags;
1902 dma_unmap_single(&lio->oct_dev->pci_dev->dev,
1903 g->sg[0].ptr[0], (skb->len - skb->data_len),
1908 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1];
1910 pci_unmap_page((lio->oct_dev)->pci_dev,
1911 g->sg[(i >> 2)].ptr[(i & 3)],
1912 frag->size, DMA_TO_DEVICE);
1916 dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev,
1917 g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE);
1919 iq = skb_iq(lio, skb);
1921 spin_lock(&lio->glist_lock[iq]);
1922 list_add_tail(&g->list, &lio->glist[iq]);
1923 spin_unlock(&lio->glist_lock[iq]);
1925 /* Don't free the skb yet */
1927 check_txq_state(lio, skb);
1931 * \brief Adjust ptp frequency
1932 * @param ptp PTP clock info
1933 * @param ppb how much to adjust by, in parts-per-billion
1935 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1937 struct lio *lio = container_of(ptp, struct lio, ptp_info);
1938 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1940 unsigned long flags;
1941 bool neg_adj = false;
1948 /* The hardware adds the clock compensation value to the
1949 * PTP clock on every coprocessor clock cycle, so we
1950 * compute the delta in terms of coprocessor clocks.
1952 delta = (u64)ppb << 32;
1953 do_div(delta, oct->coproc_clock_rate);
1955 spin_lock_irqsave(&lio->ptp_lock, flags);
1956 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP);
1961 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP);
1962 spin_unlock_irqrestore(&lio->ptp_lock, flags);
1968 * \brief Adjust ptp time
1969 * @param ptp PTP clock info
1970 * @param delta how much to adjust by, in nanosecs
1972 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
1974 unsigned long flags;
1975 struct lio *lio = container_of(ptp, struct lio, ptp_info);
1977 spin_lock_irqsave(&lio->ptp_lock, flags);
1978 lio->ptp_adjust += delta;
1979 spin_unlock_irqrestore(&lio->ptp_lock, flags);
1985 * \brief Get hardware clock time, including any adjustment
1986 * @param ptp PTP clock info
1987 * @param ts timespec
1989 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp,
1990 struct timespec64 *ts)
1993 unsigned long flags;
1994 struct lio *lio = container_of(ptp, struct lio, ptp_info);
1995 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
1997 spin_lock_irqsave(&lio->ptp_lock, flags);
1998 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI);
1999 ns += lio->ptp_adjust;
2000 spin_unlock_irqrestore(&lio->ptp_lock, flags);
2002 *ts = ns_to_timespec64(ns);
2008 * \brief Set hardware clock time. Reset adjustment
2009 * @param ptp PTP clock info
2010 * @param ts timespec
2012 static int liquidio_ptp_settime(struct ptp_clock_info *ptp,
2013 const struct timespec64 *ts)
2016 unsigned long flags;
2017 struct lio *lio = container_of(ptp, struct lio, ptp_info);
2018 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2020 ns = timespec_to_ns(ts);
2022 spin_lock_irqsave(&lio->ptp_lock, flags);
2023 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI);
2024 lio->ptp_adjust = 0;
2025 spin_unlock_irqrestore(&lio->ptp_lock, flags);
2031 * \brief Check if PTP is enabled
2032 * @param ptp PTP clock info
2034 * @param on is it on
2037 liquidio_ptp_enable(struct ptp_clock_info *ptp __attribute__((unused)),
2038 struct ptp_clock_request *rq __attribute__((unused)),
2039 int on __attribute__((unused)))
2045 * \brief Open PTP clock source
2046 * @param netdev network device
2048 static void oct_ptp_open(struct net_device *netdev)
2050 struct lio *lio = GET_LIO(netdev);
2051 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;
2053 spin_lock_init(&lio->ptp_lock);
2055 snprintf(lio->ptp_info.name, 16, "%s", netdev->name);
2056 lio->ptp_info.owner = THIS_MODULE;
2057 lio->ptp_info.max_adj = 250000000;
2058 lio->ptp_info.n_alarm = 0;
2059 lio->ptp_info.n_ext_ts = 0;
2060 lio->ptp_info.n_per_out = 0;
2061 lio->ptp_info.pps = 0;
2062 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq;
2063 lio->ptp_info.adjtime = liquidio_ptp_adjtime;
2064 lio->ptp_info.gettime64 = liquidio_ptp_gettime;
2065 lio->ptp_info.settime64 = liquidio_ptp_settime;
2066 lio->ptp_info.enable = liquidio_ptp_enable;
2068 lio->ptp_adjust = 0;
2070 lio->ptp_clock = ptp_clock_register(&lio->ptp_info,
2071 &oct->pci_dev->dev);
2073 if (IS_ERR(lio->ptp_clock))
2074 lio->ptp_clock = NULL;
2078 * \brief Init PTP clock
2079 * @param oct octeon device
2081 static void liquidio_ptp_init(struct octeon_device *oct)
2083 u64 clock_comp, cfg;
2085 clock_comp = (u64)NSEC_PER_SEC << 32;
2086 do_div(clock_comp, oct->coproc_clock_rate);
2087 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP);
2090 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG);
2091 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG);
2095 * \brief Load firmware to device
2096 * @param oct octeon device
2098 * Maps device to firmware filename, requests firmware, and downloads it
2100 static int load_firmware(struct octeon_device *oct)
2103 const struct firmware *fw;
2104 char fw_name[LIO_MAX_FW_FILENAME_LEN];
2107 if (strncmp(fw_type, LIO_FW_NAME_TYPE_NONE,
2108 sizeof(LIO_FW_NAME_TYPE_NONE)) == 0) {
2109 dev_info(&oct->pci_dev->dev, "Skipping firmware load\n");
2113 if (fw_type[0] == '\0')
2114 tmp_fw_type = LIO_FW_NAME_TYPE_NIC;
2116 tmp_fw_type = fw_type;
2118 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME,
2119 octeon_get_conf(oct)->card_name, tmp_fw_type,
2120 LIO_FW_NAME_SUFFIX);
2122 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev);
2124 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n.",
2126 release_firmware(fw);
2130 ret = octeon_download_firmware(oct, fw->data, fw->size);
2132 release_firmware(fw);
2138 * \brief Setup output queue
2139 * @param oct octeon device
2140 * @param q_no which queue
2141 * @param num_descs how many descriptors
2142 * @param desc_size size of each descriptor
2143 * @param app_ctx application context
2145 static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs,
2146 int desc_size, void *app_ctx)
2150 dev_dbg(&oct->pci_dev->dev, "Creating Droq: %d\n", q_no);
2151 /* droq creation and local register settings. */
2152 ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx);
2157 dev_dbg(&oct->pci_dev->dev, "Using default droq %d\n", q_no);
2160 /* tasklet creation for the droq */
2162 /* Enable the droq queues */
2163 octeon_set_droq_pkt_op(oct, q_no, 1);
2165 /* Send Credit for Octeon Output queues. Credits are always
2166 * sent after the output queue is enabled.
2168 writel(oct->droq[q_no]->max_count,
2169 oct->droq[q_no]->pkts_credit_reg);
2175 * \brief Callback for getting interface configuration
2176 * @param status status of request
2177 * @param buf pointer to resp structure
2179 static void if_cfg_callback(struct octeon_device *oct,
2180 u32 status __attribute__((unused)),
2183 struct octeon_soft_command *sc = (struct octeon_soft_command *)buf;
2184 struct liquidio_if_cfg_resp *resp;
2185 struct liquidio_if_cfg_context *ctx;
2187 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
2188 ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
2190 oct = lio_get_device(ctx->octeon_id);
2192 dev_err(&oct->pci_dev->dev, "nic if cfg instruction failed. Status: %llx\n",
2193 CVM_CAST64(resp->status));
2194 WRITE_ONCE(ctx->cond, 1);
2196 snprintf(oct->fw_info.liquidio_firmware_version, 32, "%s",
2197 resp->cfg_info.liquidio_firmware_version);
2199 /* This barrier is required to be sure that the response has been
2200 * written fully before waking up the handler
2204 wake_up_interruptible(&ctx->wc);
2208 * \brief Select queue based on hash
2209 * @param dev Net device
2210 * @param skb sk_buff structure
2211 * @returns selected queue number
2213 static u16 select_q(struct net_device *dev, struct sk_buff *skb,
2214 void *accel_priv __attribute__((unused)),
2215 select_queue_fallback_t fallback __attribute__((unused)))
2221 qindex = skb_tx_hash(dev, skb);
2223 return (u16)(qindex % (lio->linfo.num_txpciq));
2226 /** Routine to push packets arriving on Octeon interface upto network layer.
2227 * @param oct_id - octeon device id.
2228 * @param skbuff - skbuff struct to be passed to network layer.
2229 * @param len - size of total data received.
2230 * @param rh - Control header associated with the packet
2231 * @param param - additional control data with the packet
2232 * @param arg - farg registered in droq_ops
2235 liquidio_push_packet(u32 octeon_id __attribute__((unused)),
2238 union octeon_rh *rh,
2242 struct napi_struct *napi = param;
2243 struct sk_buff *skb = (struct sk_buff *)skbuff;
2244 struct skb_shared_hwtstamps *shhwtstamps;
2247 struct net_device *netdev = (struct net_device *)arg;
2248 struct octeon_droq *droq = container_of(param, struct octeon_droq,
2251 int packet_was_received;
2252 struct lio *lio = GET_LIO(netdev);
2253 struct octeon_device *oct = lio->oct_dev;
2255 /* Do not proceed if the interface is not in RUNNING state. */
2256 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) {
2257 recv_buffer_free(skb);
2258 droq->stats.rx_dropped++;
2264 skb_record_rx_queue(skb, droq->q_no);
2265 if (likely(len > MIN_SKB_SIZE)) {
2266 struct octeon_skb_page_info *pg_info;
2269 pg_info = ((struct octeon_skb_page_info *)(skb->cb));
2270 if (pg_info->page) {
2271 /* For Paged allocation use the frags */
2272 va = page_address(pg_info->page) +
2273 pg_info->page_offset;
2274 memcpy(skb->data, va, MIN_SKB_SIZE);
2275 skb_put(skb, MIN_SKB_SIZE);
2276 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
2278 pg_info->page_offset +
2284 struct octeon_skb_page_info *pg_info =
2285 ((struct octeon_skb_page_info *)(skb->cb));
2286 skb_copy_to_linear_data(skb, page_address(pg_info->page)
2287 + pg_info->page_offset, len);
2289 put_page(pg_info->page);
2292 if (((oct->chip_id == OCTEON_CN66XX) ||
2293 (oct->chip_id == OCTEON_CN68XX)) &&
2295 if (rh->r_dh.has_hwtstamp) {
2296 /* timestamp is included from the hardware at
2297 * the beginning of the packet.
2300 (lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED)) {
2301 /* Nanoseconds are in the first 64-bits
2304 memcpy(&ns, (skb->data), sizeof(ns));
2305 shhwtstamps = skb_hwtstamps(skb);
2306 shhwtstamps->hwtstamp =
2310 skb_pull(skb, sizeof(ns));
2314 skb->protocol = eth_type_trans(skb, skb->dev);
2315 if ((netdev->features & NETIF_F_RXCSUM) &&
2316 (((rh->r_dh.encap_on) &&
2317 (rh->r_dh.csum_verified & CNNIC_TUN_CSUM_VERIFIED)) ||
2318 (!(rh->r_dh.encap_on) &&
2319 (rh->r_dh.csum_verified & CNNIC_CSUM_VERIFIED))))
2320 /* checksum has already been verified */
2321 skb->ip_summed = CHECKSUM_UNNECESSARY;
2323 skb->ip_summed = CHECKSUM_NONE;
2325 /* Setting Encapsulation field on basis of status received
2328 if (rh->r_dh.encap_on) {
2329 skb->encapsulation = 1;
2330 skb->csum_level = 1;
2331 droq->stats.rx_vxlan++;
2334 /* inbound VLAN tag */
2335 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2336 (rh->r_dh.vlan != 0)) {
2337 u16 vid = rh->r_dh.vlan;
2338 u16 priority = rh->r_dh.priority;
2340 vtag = priority << 13 | vid;
2341 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag);
2344 packet_was_received = napi_gro_receive(napi, skb) != GRO_DROP;
2346 if (packet_was_received) {
2347 droq->stats.rx_bytes_received += len;
2348 droq->stats.rx_pkts_received++;
2349 netdev->last_rx = jiffies;
2351 droq->stats.rx_dropped++;
2352 netif_info(lio, rx_err, lio->netdev,
2353 "droq:%d error rx_dropped:%llu\n",
2354 droq->q_no, droq->stats.rx_dropped);
2358 recv_buffer_free(skb);
2363 * \brief wrapper for calling napi_schedule
2364 * @param param parameters to pass to napi_schedule
2366 * Used when scheduling on different CPUs
2368 static void napi_schedule_wrapper(void *param)
2370 struct napi_struct *napi = param;
2372 napi_schedule(napi);
2376 * \brief callback when receive interrupt occurs and we are in NAPI mode
2377 * @param arg pointer to octeon output queue
2379 static void liquidio_napi_drv_callback(void *arg)
2381 struct octeon_droq *droq = arg;
2382 int this_cpu = smp_processor_id();
2384 if (droq->cpu_id == this_cpu) {
2385 napi_schedule(&droq->napi);
2387 struct call_single_data *csd = &droq->csd;
2389 csd->func = napi_schedule_wrapper;
2390 csd->info = &droq->napi;
2393 smp_call_function_single_async(droq->cpu_id, csd);
2398 * \brief Entry point for NAPI polling
2399 * @param napi NAPI structure
2400 * @param budget maximum number of items to process
2402 static int liquidio_napi_poll(struct napi_struct *napi, int budget)
2404 struct octeon_droq *droq;
2406 int tx_done = 0, iq_no;
2407 struct octeon_instr_queue *iq;
2408 struct octeon_device *oct;
2410 droq = container_of(napi, struct octeon_droq, napi);
2411 oct = droq->oct_dev;
2413 /* Handle Droq descriptors */
2414 work_done = octeon_process_droq_poll_cmd(oct, droq->q_no,
2415 POLL_EVENT_PROCESS_PKTS,
2418 /* Flush the instruction queue */
2419 iq = oct->instr_queue[iq_no];
2421 /* Process iq buffers with in the budget limits */
2422 tx_done = octeon_flush_iq(oct, iq, 1, budget);
2423 /* Update iq read-index rather than waiting for next interrupt.
2424 * Return back if tx_done is false.
2426 update_txq_status(oct, iq_no);
2427 /*tx_done = (iq->flush_index == iq->octeon_read_index);*/
2429 dev_err(&oct->pci_dev->dev, "%s: iq (%d) num invalid\n",
2433 if ((work_done < budget) && (tx_done)) {
2434 napi_complete(napi);
2435 octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no,
2436 POLL_EVENT_ENABLE_INTR, 0);
2440 return (!tx_done) ? (budget) : (work_done);
2444 * \brief Setup input and output queues
2445 * @param octeon_dev octeon device
2446 * @param ifidx Interface Index
2448 * Note: Queues are with respect to the octeon device. Thus
2449 * an input queue is for egress packets, and output queues
2450 * are for ingress packets.
2452 static inline int setup_io_queues(struct octeon_device *octeon_dev,
2455 struct octeon_droq_ops droq_ops;
2456 struct net_device *netdev;
2458 static int cpu_id_modulus;
2459 struct octeon_droq *droq;
2460 struct napi_struct *napi;
2461 int q, q_no, retval = 0;
2465 netdev = octeon_dev->props[ifidx].netdev;
2467 lio = GET_LIO(netdev);
2469 memset(&droq_ops, 0, sizeof(struct octeon_droq_ops));
2471 droq_ops.fptr = liquidio_push_packet;
2472 droq_ops.farg = (void *)netdev;
2474 droq_ops.poll_mode = 1;
2475 droq_ops.napi_fn = liquidio_napi_drv_callback;
2477 cpu_id_modulus = num_present_cpus();
2480 for (q = 0; q < lio->linfo.num_rxpciq; q++) {
2481 q_no = lio->linfo.rxpciq[q].s.q_no;
2482 dev_dbg(&octeon_dev->pci_dev->dev,
2483 "setup_io_queues index:%d linfo.rxpciq.s.q_no:%d\n",
2485 retval = octeon_setup_droq(octeon_dev, q_no,
2486 CFG_GET_NUM_RX_DESCS_NIC_IF
2487 (octeon_get_conf(octeon_dev),
2489 CFG_GET_NUM_RX_BUF_SIZE_NIC_IF
2490 (octeon_get_conf(octeon_dev),
2493 dev_err(&octeon_dev->pci_dev->dev,
2494 "%s : Runtime DROQ(RxQ) creation failed.\n",
2499 droq = octeon_dev->droq[q_no];
2501 dev_dbg(&octeon_dev->pci_dev->dev, "netif_napi_add netdev:%llx oct:%llx pf_num:%d\n",
2502 (u64)netdev, (u64)octeon_dev, octeon_dev->pf_num);
2503 netif_napi_add(netdev, napi, liquidio_napi_poll, 64);
2505 /* designate a CPU for this droq */
2506 droq->cpu_id = cpu_id;
2508 if (cpu_id >= cpu_id_modulus)
2511 octeon_register_droq_ops(octeon_dev, q_no, &droq_ops);
2514 if (OCTEON_CN23XX_PF(octeon_dev)) {
2515 /* 23XX PF can receive control messages (via the first PF-owned
2516 * droq) from the firmware even if the ethX interface is down,
2517 * so that's why poll_mode must be off for the first droq.
2519 octeon_dev->droq[0]->ops.poll_mode = 0;
2523 for (q = 0; q < lio->linfo.num_txpciq; q++) {
2524 num_tx_descs = CFG_GET_NUM_TX_DESCS_NIC_IF(octeon_get_conf
2527 retval = octeon_setup_iq(octeon_dev, ifidx, q,
2528 lio->linfo.txpciq[q], num_tx_descs,
2529 netdev_get_tx_queue(netdev, q));
2531 dev_err(&octeon_dev->pci_dev->dev,
2532 " %s : Runtime IQ(TxQ) creation failed.\n",
2542 * \brief Poll routine for checking transmit queue status
2543 * @param work work_struct data structure
2545 static void octnet_poll_check_txq_status(struct work_struct *work)
2547 struct cavium_wk *wk = (struct cavium_wk *)work;
2548 struct lio *lio = (struct lio *)wk->ctxptr;
2550 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING))
2553 check_txq_status(lio);
2554 queue_delayed_work(lio->txq_status_wq.wq,
2555 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2559 * \brief Sets up the txq poll check
2560 * @param netdev network device
2562 static inline int setup_tx_poll_fn(struct net_device *netdev)
2564 struct lio *lio = GET_LIO(netdev);
2565 struct octeon_device *oct = lio->oct_dev;
2567 lio->txq_status_wq.wq = alloc_workqueue("txq-status",
2569 if (!lio->txq_status_wq.wq) {
2570 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n");
2573 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work,
2574 octnet_poll_check_txq_status);
2575 lio->txq_status_wq.wk.ctxptr = lio;
2576 queue_delayed_work(lio->txq_status_wq.wq,
2577 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1));
2581 static inline void cleanup_tx_poll_fn(struct net_device *netdev)
2583 struct lio *lio = GET_LIO(netdev);
2585 if (lio->txq_status_wq.wq) {
2586 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work);
2587 destroy_workqueue(lio->txq_status_wq.wq);
2592 * \brief Net device open for LiquidIO
2593 * @param netdev network device
2595 static int liquidio_open(struct net_device *netdev)
2597 struct lio *lio = GET_LIO(netdev);
2598 struct octeon_device *oct = lio->oct_dev;
2599 struct napi_struct *napi, *n;
2601 if (oct->props[lio->ifidx].napi_enabled == 0) {
2602 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list)
2605 oct->props[lio->ifidx].napi_enabled = 1;
2607 if (OCTEON_CN23XX_PF(oct))
2608 oct->droq[0]->ops.poll_mode = 1;
2611 oct_ptp_open(netdev);
2613 ifstate_set(lio, LIO_IFSTATE_RUNNING);
2615 /* Ready for link status updates */
2618 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n");
2620 if (OCTEON_CN23XX_PF(oct)) {
2622 if (setup_tx_poll_fn(netdev))
2625 if (setup_tx_poll_fn(netdev))
2631 /* tell Octeon to start forwarding packets to host */
2632 send_rx_ctrl_cmd(lio, 1);
2634 dev_info(&oct->pci_dev->dev, "%s interface is opened\n",
2641 * \brief Net device stop for LiquidIO
2642 * @param netdev network device
2644 static int liquidio_stop(struct net_device *netdev)
2646 struct lio *lio = GET_LIO(netdev);
2647 struct octeon_device *oct = lio->oct_dev;
2649 ifstate_reset(lio, LIO_IFSTATE_RUNNING);
2651 netif_tx_disable(netdev);
2653 /* Inform that netif carrier is down */
2654 netif_carrier_off(netdev);
2656 lio->linfo.link.s.link_up = 0;
2657 lio->link_changes++;
2659 /* Pause for a moment and wait for Octeon to flush out (to the wire) any
2660 * egress packets that are in-flight.
2662 set_current_state(TASK_INTERRUPTIBLE);
2663 schedule_timeout(msecs_to_jiffies(100));
2665 /* Now it should be safe to tell Octeon that nic interface is down. */
2666 send_rx_ctrl_cmd(lio, 0);
2668 if (OCTEON_CN23XX_PF(oct)) {
2670 cleanup_tx_poll_fn(netdev);
2672 cleanup_tx_poll_fn(netdev);
2675 if (lio->ptp_clock) {
2676 ptp_clock_unregister(lio->ptp_clock);
2677 lio->ptp_clock = NULL;
2680 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name);
2686 * \brief Converts a mask based on net device flags
2687 * @param netdev network device
2689 * This routine generates a octnet_ifflags mask from the net device flags
2690 * received from the OS.
2692 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev)
2694 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST;
2696 if (netdev->flags & IFF_PROMISC)
2697 f |= OCTNET_IFFLAG_PROMISC;
2699 if (netdev->flags & IFF_ALLMULTI)
2700 f |= OCTNET_IFFLAG_ALLMULTI;
2702 if (netdev->flags & IFF_MULTICAST) {
2703 f |= OCTNET_IFFLAG_MULTICAST;
2705 /* Accept all multicast addresses if there are more than we
2708 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR)
2709 f |= OCTNET_IFFLAG_ALLMULTI;
2712 if (netdev->flags & IFF_BROADCAST)
2713 f |= OCTNET_IFFLAG_BROADCAST;
2719 * \brief Net device set_multicast_list
2720 * @param netdev network device
2722 static void liquidio_set_mcast_list(struct net_device *netdev)
2724 struct lio *lio = GET_LIO(netdev);
2725 struct octeon_device *oct = lio->oct_dev;
2726 struct octnic_ctrl_pkt nctrl;
2727 struct netdev_hw_addr *ha;
2730 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR);
2732 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2734 /* Create a ctrl pkt command to be sent to core app. */
2736 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST;
2737 nctrl.ncmd.s.param1 = get_new_flags(netdev);
2738 nctrl.ncmd.s.param2 = mc_count;
2739 nctrl.ncmd.s.more = mc_count;
2740 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2741 nctrl.netpndev = (u64)netdev;
2742 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2744 /* copy all the addresses into the udd */
2746 netdev_for_each_mc_addr(ha, netdev) {
2748 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN);
2749 /* no need to swap bytes */
2751 if (++mc > &nctrl.udd[mc_count])
2755 /* Apparently, any activity in this call from the kernel has to
2756 * be atomic. So we won't wait for response.
2758 nctrl.wait_time = 0;
2760 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2762 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n",
2768 * \brief Net device set_mac_address
2769 * @param netdev network device
2771 static int liquidio_set_mac(struct net_device *netdev, void *p)
2774 struct lio *lio = GET_LIO(netdev);
2775 struct octeon_device *oct = lio->oct_dev;
2776 struct sockaddr *addr = (struct sockaddr *)p;
2777 struct octnic_ctrl_pkt nctrl;
2779 if (!is_valid_ether_addr(addr->sa_data))
2780 return -EADDRNOTAVAIL;
2782 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2785 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR;
2786 nctrl.ncmd.s.param1 = 0;
2787 nctrl.ncmd.s.more = 1;
2788 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2789 nctrl.netpndev = (u64)netdev;
2790 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2791 nctrl.wait_time = 100;
2794 /* The MAC Address is presented in network byte order. */
2795 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN);
2797 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2799 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n");
2802 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2803 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN);
2809 * \brief Net device get_stats
2810 * @param netdev network device
2812 static struct net_device_stats *liquidio_get_stats(struct net_device *netdev)
2814 struct lio *lio = GET_LIO(netdev);
2815 struct net_device_stats *stats = &netdev->stats;
2816 struct octeon_device *oct;
2817 u64 pkts = 0, drop = 0, bytes = 0;
2818 struct oct_droq_stats *oq_stats;
2819 struct oct_iq_stats *iq_stats;
2820 int i, iq_no, oq_no;
2824 for (i = 0; i < lio->linfo.num_txpciq; i++) {
2825 iq_no = lio->linfo.txpciq[i].s.q_no;
2826 iq_stats = &oct->instr_queue[iq_no]->stats;
2827 pkts += iq_stats->tx_done;
2828 drop += iq_stats->tx_dropped;
2829 bytes += iq_stats->tx_tot_bytes;
2832 stats->tx_packets = pkts;
2833 stats->tx_bytes = bytes;
2834 stats->tx_dropped = drop;
2840 for (i = 0; i < lio->linfo.num_rxpciq; i++) {
2841 oq_no = lio->linfo.rxpciq[i].s.q_no;
2842 oq_stats = &oct->droq[oq_no]->stats;
2843 pkts += oq_stats->rx_pkts_received;
2844 drop += (oq_stats->rx_dropped +
2845 oq_stats->dropped_nodispatch +
2846 oq_stats->dropped_toomany +
2847 oq_stats->dropped_nomem);
2848 bytes += oq_stats->rx_bytes_received;
2851 stats->rx_bytes = bytes;
2852 stats->rx_packets = pkts;
2853 stats->rx_dropped = drop;
2859 * \brief Net device change_mtu
2860 * @param netdev network device
2862 static int liquidio_change_mtu(struct net_device *netdev, int new_mtu)
2864 struct lio *lio = GET_LIO(netdev);
2865 struct octeon_device *oct = lio->oct_dev;
2866 struct octnic_ctrl_pkt nctrl;
2869 /* Limit the MTU to make sure the ethernet packets are between 68 bytes
2872 if ((new_mtu < LIO_MIN_MTU_SIZE) ||
2873 (new_mtu > LIO_MAX_MTU_SIZE)) {
2874 dev_err(&oct->pci_dev->dev, "Invalid MTU: %d\n", new_mtu);
2875 dev_err(&oct->pci_dev->dev, "Valid range %d and %d\n",
2876 LIO_MIN_MTU_SIZE, LIO_MAX_MTU_SIZE);
2880 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
2883 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MTU;
2884 nctrl.ncmd.s.param1 = new_mtu;
2885 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
2886 nctrl.wait_time = 100;
2887 nctrl.netpndev = (u64)netdev;
2888 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
2890 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
2892 dev_err(&oct->pci_dev->dev, "Failed to set MTU\n");
2902 * \brief Handler for SIOCSHWTSTAMP ioctl
2903 * @param netdev network device
2904 * @param ifr interface request
2905 * @param cmd command
2907 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
2909 struct hwtstamp_config conf;
2910 struct lio *lio = GET_LIO(netdev);
2912 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf)))
2918 switch (conf.tx_type) {
2919 case HWTSTAMP_TX_ON:
2920 case HWTSTAMP_TX_OFF:
2926 switch (conf.rx_filter) {
2927 case HWTSTAMP_FILTER_NONE:
2929 case HWTSTAMP_FILTER_ALL:
2930 case HWTSTAMP_FILTER_SOME:
2931 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2932 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2933 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2934 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2935 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2936 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2937 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2938 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2939 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2940 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2941 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2942 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2943 conf.rx_filter = HWTSTAMP_FILTER_ALL;
2949 if (conf.rx_filter == HWTSTAMP_FILTER_ALL)
2950 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2953 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);
2955 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0;
2959 * \brief ioctl handler
2960 * @param netdev network device
2961 * @param ifr interface request
2962 * @param cmd command
2964 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2968 return hwtstamp_ioctl(netdev, ifr);
2975 * \brief handle a Tx timestamp response
2976 * @param status response status
2977 * @param buf pointer to skb
2979 static void handle_timestamp(struct octeon_device *oct,
2983 struct octnet_buf_free_info *finfo;
2984 struct octeon_soft_command *sc;
2985 struct oct_timestamp_resp *resp;
2987 struct sk_buff *skb = (struct sk_buff *)buf;
2989 finfo = (struct octnet_buf_free_info *)skb->cb;
2993 resp = (struct oct_timestamp_resp *)sc->virtrptr;
2995 if (status != OCTEON_REQUEST_DONE) {
2996 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n",
2997 CVM_CAST64(status));
2998 resp->timestamp = 0;
3001 octeon_swap_8B_data(&resp->timestamp, 1);
3003 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) {
3004 struct skb_shared_hwtstamps ts;
3005 u64 ns = resp->timestamp;
3007 netif_info(lio, tx_done, lio->netdev,
3008 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n",
3009 skb, (unsigned long long)ns);
3010 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust);
3011 skb_tstamp_tx(skb, &ts);
3014 octeon_free_soft_command(oct, sc);
3015 tx_buffer_free(skb);
3018 /* \brief Send a data packet that will be timestamped
3019 * @param oct octeon device
3020 * @param ndata pointer to network data
3021 * @param finfo pointer to private network data
3023 static inline int send_nic_timestamp_pkt(struct octeon_device *oct,
3024 struct octnic_data_pkt *ndata,
3025 struct octnet_buf_free_info *finfo)
3028 struct octeon_soft_command *sc;
3035 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd,
3036 sizeof(struct oct_timestamp_resp));
3040 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n");
3041 return IQ_SEND_FAILED;
3044 if (ndata->reqtype == REQTYPE_NORESP_NET)
3045 ndata->reqtype = REQTYPE_RESP_NET;
3046 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG)
3047 ndata->reqtype = REQTYPE_RESP_NET_SG;
3049 sc->callback = handle_timestamp;
3050 sc->callback_arg = finfo->skb;
3051 sc->iq_no = ndata->q_no;
3053 if (OCTEON_CN23XX_PF(oct))
3054 len = (u32)((struct octeon_instr_ih3 *)
3055 (&sc->cmd.cmd3.ih3))->dlengsz;
3057 len = (u32)((struct octeon_instr_ih2 *)
3058 (&sc->cmd.cmd2.ih2))->dlengsz;
3062 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd,
3063 sc, len, ndata->reqtype);
3065 if (retval == IQ_SEND_FAILED) {
3066 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n",
3068 octeon_free_soft_command(oct, sc);
3070 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n");
3076 /** \brief Transmit networks packets to the Octeon interface
3077 * @param skbuff skbuff struct to be passed to network layer.
3078 * @param netdev pointer to network device
3079 * @returns whether the packet was transmitted to the device okay or not
3080 * (NETDEV_TX_OK or NETDEV_TX_BUSY)
3082 static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev)
3085 struct octnet_buf_free_info *finfo;
3086 union octnic_cmd_setup cmdsetup;
3087 struct octnic_data_pkt ndata;
3088 struct octeon_device *oct;
3089 struct oct_iq_stats *stats;
3090 struct octeon_instr_irh *irh;
3091 union tx_info *tx_info;
3093 int q_idx = 0, iq_no = 0;
3098 lio = GET_LIO(netdev);
3101 if (netif_is_multiqueue(netdev)) {
3102 q_idx = skb->queue_mapping;
3103 q_idx = (q_idx % (lio->linfo.num_txpciq));
3105 iq_no = lio->linfo.txpciq[q_idx].s.q_no;
3110 stats = &oct->instr_queue[iq_no]->stats;
3112 /* Check for all conditions in which the current packet cannot be
3115 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) ||
3116 (!lio->linfo.link.s.link_up) ||
3118 netif_info(lio, tx_err, lio->netdev,
3119 "Transmit failed link_status : %d\n",
3120 lio->linfo.link.s.link_up);
3121 goto lio_xmit_failed;
3124 /* Use space in skb->cb to store info used to unmap and
3127 finfo = (struct octnet_buf_free_info *)skb->cb;
3132 /* Prepare the attributes for the data to be passed to OSI. */
3133 memset(&ndata, 0, sizeof(struct octnic_data_pkt));
3135 ndata.buf = (void *)finfo;
3139 if (netif_is_multiqueue(netdev)) {
3140 if (octnet_iq_is_full(oct, ndata.q_no)) {
3141 /* defer sending if queue is full */
3142 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3144 stats->tx_iq_busy++;
3145 return NETDEV_TX_BUSY;
3148 if (octnet_iq_is_full(oct, lio->txq)) {
3149 /* defer sending if queue is full */
3150 stats->tx_iq_busy++;
3151 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n",
3153 return NETDEV_TX_BUSY;
3156 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n",
3157 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no);
3160 ndata.datasize = skb->len;
3163 cmdsetup.s.iq_no = iq_no;
3165 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3166 if (skb->encapsulation) {
3167 cmdsetup.s.tnl_csum = 1;
3170 cmdsetup.s.transport_csum = 1;
3173 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
3174 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
3175 cmdsetup.s.timestamp = 1;
3178 if (skb_shinfo(skb)->nr_frags == 0) {
3179 cmdsetup.s.u.datasize = skb->len;
3180 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3182 /* Offload checksum calculation for TCP/UDP packets */
3183 dptr = dma_map_single(&oct->pci_dev->dev,
3187 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) {
3188 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n",
3190 return NETDEV_TX_BUSY;
3193 if (OCTEON_CN23XX_PF(oct))
3194 ndata.cmd.cmd3.dptr = dptr;
3196 ndata.cmd.cmd2.dptr = dptr;
3198 ndata.reqtype = REQTYPE_NORESP_NET;
3202 struct skb_frag_struct *frag;
3203 struct octnic_gather *g;
3205 spin_lock(&lio->glist_lock[q_idx]);
3206 g = (struct octnic_gather *)
3207 list_delete_head(&lio->glist[q_idx]);
3208 spin_unlock(&lio->glist_lock[q_idx]);
3211 netif_info(lio, tx_err, lio->netdev,
3212 "Transmit scatter gather: glist null!\n");
3213 goto lio_xmit_failed;
3216 cmdsetup.s.gather = 1;
3217 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1);
3218 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag);
3220 memset(g->sg, 0, g->sg_size);
3222 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev,
3224 (skb->len - skb->data_len),
3226 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) {
3227 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n",
3229 return NETDEV_TX_BUSY;
3231 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0);
3233 frags = skb_shinfo(skb)->nr_frags;
3236 frag = &skb_shinfo(skb)->frags[i - 1];
3238 g->sg[(i >> 2)].ptr[(i & 3)] =
3239 dma_map_page(&oct->pci_dev->dev,
3245 if (dma_mapping_error(&oct->pci_dev->dev,
3246 g->sg[i >> 2].ptr[i & 3])) {
3247 dma_unmap_single(&oct->pci_dev->dev,
3249 skb->len - skb->data_len,
3251 for (j = 1; j < i; j++) {
3252 frag = &skb_shinfo(skb)->frags[j - 1];
3253 dma_unmap_page(&oct->pci_dev->dev,
3254 g->sg[j >> 2].ptr[j & 3],
3258 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n",
3260 return NETDEV_TX_BUSY;
3263 add_sg_size(&g->sg[(i >> 2)], frag->size, (i & 3));
3267 dma_sync_single_for_device(&oct->pci_dev->dev, g->sg_dma_ptr,
3268 g->sg_size, DMA_TO_DEVICE);
3269 dptr = g->sg_dma_ptr;
3271 if (OCTEON_CN23XX_PF(oct))
3272 ndata.cmd.cmd3.dptr = dptr;
3274 ndata.cmd.cmd2.dptr = dptr;
3278 ndata.reqtype = REQTYPE_NORESP_NET_SG;
3281 if (OCTEON_CN23XX_PF(oct)) {
3282 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh;
3283 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0];
3285 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh;
3286 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0];
3289 if (skb_shinfo(skb)->gso_size) {
3290 tx_info->s.gso_size = skb_shinfo(skb)->gso_size;
3291 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs;
3295 /* HW insert VLAN tag */
3296 if (skb_vlan_tag_present(skb)) {
3297 irh->priority = skb_vlan_tag_get(skb) >> 13;
3298 irh->vlan = skb_vlan_tag_get(skb) & 0xfff;
3301 if (unlikely(cmdsetup.s.timestamp))
3302 status = send_nic_timestamp_pkt(oct, &ndata, finfo);
3304 status = octnet_send_nic_data_pkt(oct, &ndata);
3305 if (status == IQ_SEND_FAILED)
3306 goto lio_xmit_failed;
3308 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n");
3310 if (status == IQ_SEND_STOP)
3311 stop_q(lio->netdev, q_idx);
3313 netif_trans_update(netdev);
3315 if (skb_shinfo(skb)->gso_size)
3316 stats->tx_done += skb_shinfo(skb)->gso_segs;
3319 stats->tx_tot_bytes += skb->len;
3321 return NETDEV_TX_OK;
3324 stats->tx_dropped++;
3325 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n",
3326 iq_no, stats->tx_dropped);
3328 dma_unmap_single(&oct->pci_dev->dev, dptr,
3329 ndata.datasize, DMA_TO_DEVICE);
3330 tx_buffer_free(skb);
3331 return NETDEV_TX_OK;
3334 /** \brief Network device Tx timeout
3335 * @param netdev pointer to network device
3337 static void liquidio_tx_timeout(struct net_device *netdev)
3341 lio = GET_LIO(netdev);
3343 netif_info(lio, tx_err, lio->netdev,
3344 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n",
3345 netdev->stats.tx_dropped);
3346 netif_trans_update(netdev);
3350 static int liquidio_vlan_rx_add_vid(struct net_device *netdev,
3351 __be16 proto __attribute__((unused)),
3354 struct lio *lio = GET_LIO(netdev);
3355 struct octeon_device *oct = lio->oct_dev;
3356 struct octnic_ctrl_pkt nctrl;
3359 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3362 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER;
3363 nctrl.ncmd.s.param1 = vid;
3364 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3365 nctrl.wait_time = 100;
3366 nctrl.netpndev = (u64)netdev;
3367 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3369 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3371 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3378 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev,
3379 __be16 proto __attribute__((unused)),
3382 struct lio *lio = GET_LIO(netdev);
3383 struct octeon_device *oct = lio->oct_dev;
3384 struct octnic_ctrl_pkt nctrl;
3387 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt));
3390 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER;
3391 nctrl.ncmd.s.param1 = vid;
3392 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3393 nctrl.wait_time = 100;
3394 nctrl.netpndev = (u64)netdev;
3395 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3397 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3399 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n",
3405 /** Sending command to enable/disable RX checksum offload
3406 * @param netdev pointer to network device
3407 * @param command OCTNET_CMD_TNL_RX_CSUM_CTL
3408 * @param rx_cmd_bit OCTNET_CMD_RXCSUM_ENABLE/
3409 * OCTNET_CMD_RXCSUM_DISABLE
3410 * @returns SUCCESS or FAILURE
3412 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command,
3415 struct lio *lio = GET_LIO(netdev);
3416 struct octeon_device *oct = lio->oct_dev;
3417 struct octnic_ctrl_pkt nctrl;
3421 nctrl.ncmd.s.cmd = command;
3422 nctrl.ncmd.s.param1 = rx_cmd;
3423 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3424 nctrl.wait_time = 100;
3425 nctrl.netpndev = (u64)netdev;
3426 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3428 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3430 dev_err(&oct->pci_dev->dev,
3431 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n",
3437 /** Sending command to add/delete VxLAN UDP port to firmware
3438 * @param netdev pointer to network device
3439 * @param command OCTNET_CMD_VXLAN_PORT_CONFIG
3440 * @param vxlan_port VxLAN port to be added or deleted
3441 * @param vxlan_cmd_bit OCTNET_CMD_VXLAN_PORT_ADD,
3442 * OCTNET_CMD_VXLAN_PORT_DEL
3443 * @returns SUCCESS or FAILURE
3445 static int liquidio_vxlan_port_command(struct net_device *netdev, int command,
3446 u16 vxlan_port, u8 vxlan_cmd_bit)
3448 struct lio *lio = GET_LIO(netdev);
3449 struct octeon_device *oct = lio->oct_dev;
3450 struct octnic_ctrl_pkt nctrl;
3454 nctrl.ncmd.s.cmd = command;
3455 nctrl.ncmd.s.more = vxlan_cmd_bit;
3456 nctrl.ncmd.s.param1 = vxlan_port;
3457 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
3458 nctrl.wait_time = 100;
3459 nctrl.netpndev = (u64)netdev;
3460 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion;
3462 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl);
3464 dev_err(&oct->pci_dev->dev,
3465 "VxLAN port add/delete failed in core (ret:0x%x)\n",
3471 /** \brief Net device fix features
3472 * @param netdev pointer to network device
3473 * @param request features requested
3474 * @returns updated features list
3476 static netdev_features_t liquidio_fix_features(struct net_device *netdev,
3477 netdev_features_t request)
3479 struct lio *lio = netdev_priv(netdev);
3481 if ((request & NETIF_F_RXCSUM) &&
3482 !(lio->dev_capability & NETIF_F_RXCSUM))
3483 request &= ~NETIF_F_RXCSUM;
3485 if ((request & NETIF_F_HW_CSUM) &&
3486 !(lio->dev_capability & NETIF_F_HW_CSUM))
3487 request &= ~NETIF_F_HW_CSUM;
3489 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO))
3490 request &= ~NETIF_F_TSO;
3492 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6))
3493 request &= ~NETIF_F_TSO6;
3495 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO))
3496 request &= ~NETIF_F_LRO;
3498 /*Disable LRO if RXCSUM is off */
3499 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) &&
3500 (lio->dev_capability & NETIF_F_LRO))
3501 request &= ~NETIF_F_LRO;
3506 /** \brief Net device set features
3507 * @param netdev pointer to network device
3508 * @param features features to enable/disable
3510 static int liquidio_set_features(struct net_device *netdev,
3511 netdev_features_t features)
3513 struct lio *lio = netdev_priv(netdev);
3515 if (!((netdev->features ^ features) & NETIF_F_LRO))
3518 if ((features & NETIF_F_LRO) && (lio->dev_capability & NETIF_F_LRO))
3519 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
3520 OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3521 else if (!(features & NETIF_F_LRO) &&
3522 (lio->dev_capability & NETIF_F_LRO))
3523 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE,
3524 OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3526 /* Sending command to firmware to enable/disable RX checksum
3527 * offload settings using ethtool
3529 if (!(netdev->features & NETIF_F_RXCSUM) &&
3530 (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3531 (features & NETIF_F_RXCSUM))
3532 liquidio_set_rxcsum_command(netdev,
3533 OCTNET_CMD_TNL_RX_CSUM_CTL,
3534 OCTNET_CMD_RXCSUM_ENABLE);
3535 else if ((netdev->features & NETIF_F_RXCSUM) &&
3536 (lio->enc_dev_capability & NETIF_F_RXCSUM) &&
3537 !(features & NETIF_F_RXCSUM))
3538 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
3539 OCTNET_CMD_RXCSUM_DISABLE);
3544 static void liquidio_add_vxlan_port(struct net_device *netdev,
3545 struct udp_tunnel_info *ti)
3547 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3550 liquidio_vxlan_port_command(netdev,
3551 OCTNET_CMD_VXLAN_PORT_CONFIG,
3553 OCTNET_CMD_VXLAN_PORT_ADD);
3556 static void liquidio_del_vxlan_port(struct net_device *netdev,
3557 struct udp_tunnel_info *ti)
3559 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
3562 liquidio_vxlan_port_command(netdev,
3563 OCTNET_CMD_VXLAN_PORT_CONFIG,
3565 OCTNET_CMD_VXLAN_PORT_DEL);
3568 static struct net_device_ops lionetdevops = {
3569 .ndo_open = liquidio_open,
3570 .ndo_stop = liquidio_stop,
3571 .ndo_start_xmit = liquidio_xmit,
3572 .ndo_get_stats = liquidio_get_stats,
3573 .ndo_set_mac_address = liquidio_set_mac,
3574 .ndo_set_rx_mode = liquidio_set_mcast_list,
3575 .ndo_tx_timeout = liquidio_tx_timeout,
3577 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid,
3578 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid,
3579 .ndo_change_mtu = liquidio_change_mtu,
3580 .ndo_do_ioctl = liquidio_ioctl,
3581 .ndo_fix_features = liquidio_fix_features,
3582 .ndo_set_features = liquidio_set_features,
3583 .ndo_udp_tunnel_add = liquidio_add_vxlan_port,
3584 .ndo_udp_tunnel_del = liquidio_del_vxlan_port,
3587 /** \brief Entry point for the liquidio module
3589 static int __init liquidio_init(void)
3592 struct handshake *hs;
3594 init_completion(&first_stage);
3596 octeon_init_device_list(conf_type);
3598 if (liquidio_init_pci())
3601 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000));
3603 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3606 wait_for_completion(&hs->init);
3608 /* init handshake failed */
3609 dev_err(&hs->pci_dev->dev,
3610 "Failed to init device\n");
3611 liquidio_deinit_pci();
3617 for (i = 0; i < MAX_OCTEON_DEVICES; i++) {
3620 wait_for_completion_timeout(&hs->started,
3621 msecs_to_jiffies(30000));
3622 if (!hs->started_ok) {
3623 /* starter handshake failed */
3624 dev_err(&hs->pci_dev->dev,
3625 "Firmware failed to start\n");
3626 liquidio_deinit_pci();
3635 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf)
3637 struct octeon_device *oct = (struct octeon_device *)buf;
3638 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt;
3640 union oct_link_status *ls;
3643 if (recv_pkt->buffer_size[0] != sizeof(*ls)) {
3644 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n",
3645 recv_pkt->buffer_size[0],
3646 recv_pkt->rh.r_nic_info.gmxport);
3650 gmxport = recv_pkt->rh.r_nic_info.gmxport;
3651 ls = (union oct_link_status *)get_rbd(recv_pkt->buffer_ptr[0]);
3653 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3);
3654 for (i = 0; i < oct->ifcount; i++) {
3655 if (oct->props[i].gmxport == gmxport) {
3656 update_link_status(oct->props[i].netdev, ls);
3662 for (i = 0; i < recv_pkt->buffer_count; i++)
3663 recv_buffer_free(recv_pkt->buffer_ptr[i]);
3664 octeon_free_recv_info(recv_info);
3669 * \brief Setup network interfaces
3670 * @param octeon_dev octeon device
3672 * Called during init time for each device. It assumes the NIC
3673 * is already up and running. The link information for each
3674 * interface is passed in link_info.
3676 static int setup_nic_devices(struct octeon_device *octeon_dev)
3678 struct lio *lio = NULL;
3679 struct net_device *netdev;
3681 struct octeon_soft_command *sc;
3682 struct liquidio_if_cfg_context *ctx;
3683 struct liquidio_if_cfg_resp *resp;
3684 struct octdev_props *props;
3685 int retval, num_iqueues, num_oqueues;
3686 union oct_nic_if_cfg if_cfg;
3687 unsigned int base_queue;
3688 unsigned int gmx_port_id;
3689 u32 resp_size, ctx_size, data_size;
3691 struct lio_version *vdata;
3693 /* This is to handle link status changes */
3694 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
3696 lio_nic_info, octeon_dev);
3698 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions.
3699 * They are handled directly.
3701 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET,
3704 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG,
3707 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG,
3708 free_netsgbuf_with_resp);
3710 for (i = 0; i < octeon_dev->ifcount; i++) {
3711 resp_size = sizeof(struct liquidio_if_cfg_resp);
3712 ctx_size = sizeof(struct liquidio_if_cfg_context);
3713 data_size = sizeof(struct lio_version);
3714 sc = (struct octeon_soft_command *)
3715 octeon_alloc_soft_command(octeon_dev, data_size,
3716 resp_size, ctx_size);
3717 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr;
3718 ctx = (struct liquidio_if_cfg_context *)sc->ctxptr;
3719 vdata = (struct lio_version *)sc->virtdptr;
3721 *((u64 *)vdata) = 0;
3722 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION);
3723 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION);
3724 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION);
3726 if (OCTEON_CN23XX_PF(octeon_dev)) {
3727 num_iqueues = octeon_dev->sriov_info.num_pf_rings;
3728 num_oqueues = octeon_dev->sriov_info.num_pf_rings;
3729 base_queue = octeon_dev->sriov_info.pf_srn;
3731 gmx_port_id = octeon_dev->pf_num;
3732 ifidx_or_pfnum = octeon_dev->pf_num;
3734 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF(
3735 octeon_get_conf(octeon_dev), i);
3736 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF(
3737 octeon_get_conf(octeon_dev), i);
3738 base_queue = CFG_GET_BASE_QUE_NIC_IF(
3739 octeon_get_conf(octeon_dev), i);
3740 gmx_port_id = CFG_GET_GMXID_NIC_IF(
3741 octeon_get_conf(octeon_dev), i);
3745 dev_dbg(&octeon_dev->pci_dev->dev,
3746 "requesting config for interface %d, iqs %d, oqs %d\n",
3747 ifidx_or_pfnum, num_iqueues, num_oqueues);
3748 WRITE_ONCE(ctx->cond, 0);
3749 ctx->octeon_id = lio_get_device_id(octeon_dev);
3750 init_waitqueue_head(&ctx->wc);
3753 if_cfg.s.num_iqueues = num_iqueues;
3754 if_cfg.s.num_oqueues = num_oqueues;
3755 if_cfg.s.base_queue = base_queue;
3756 if_cfg.s.gmx_port_id = gmx_port_id;
3760 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC,
3761 OPCODE_NIC_IF_CFG, 0,
3764 sc->callback = if_cfg_callback;
3765 sc->callback_arg = sc;
3766 sc->wait_time = 3000;
3768 retval = octeon_send_soft_command(octeon_dev, sc);
3769 if (retval == IQ_SEND_FAILED) {
3770 dev_err(&octeon_dev->pci_dev->dev,
3771 "iq/oq config failed status: %x\n",
3773 /* Soft instr is freed by driver in case of failure. */
3774 goto setup_nic_dev_fail;
3777 /* Sleep on a wait queue till the cond flag indicates that the
3778 * response arrived or timed-out.
3780 if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) {
3781 dev_err(&octeon_dev->pci_dev->dev, "Wait interrupted\n");
3782 goto setup_nic_wait_intr;
3785 retval = resp->status;
3787 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n");
3788 goto setup_nic_dev_fail;
3791 octeon_swap_8B_data((u64 *)(&resp->cfg_info),
3792 (sizeof(struct liquidio_if_cfg_info)) >> 3);
3794 num_iqueues = hweight64(resp->cfg_info.iqmask);
3795 num_oqueues = hweight64(resp->cfg_info.oqmask);
3797 if (!(num_iqueues) || !(num_oqueues)) {
3798 dev_err(&octeon_dev->pci_dev->dev,
3799 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n",
3800 resp->cfg_info.iqmask,
3801 resp->cfg_info.oqmask);
3802 goto setup_nic_dev_fail;
3804 dev_dbg(&octeon_dev->pci_dev->dev,
3805 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n",
3806 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask,
3807 num_iqueues, num_oqueues);
3808 netdev = alloc_etherdev_mq(LIO_SIZE, num_iqueues);
3811 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n");
3812 goto setup_nic_dev_fail;
3815 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev);
3817 if (num_iqueues > 1)
3818 lionetdevops.ndo_select_queue = select_q;
3820 /* Associate the routines that will handle different
3823 netdev->netdev_ops = &lionetdevops;
3825 lio = GET_LIO(netdev);
3827 memset(lio, 0, sizeof(struct lio));
3829 lio->ifidx = ifidx_or_pfnum;
3831 props = &octeon_dev->props[i];
3832 props->gmxport = resp->cfg_info.linfo.gmxport;
3833 props->netdev = netdev;
3835 lio->linfo.num_rxpciq = num_oqueues;
3836 lio->linfo.num_txpciq = num_iqueues;
3837 for (j = 0; j < num_oqueues; j++) {
3838 lio->linfo.rxpciq[j].u64 =
3839 resp->cfg_info.linfo.rxpciq[j].u64;
3841 for (j = 0; j < num_iqueues; j++) {
3842 lio->linfo.txpciq[j].u64 =
3843 resp->cfg_info.linfo.txpciq[j].u64;
3845 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr;
3846 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport;
3847 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64;
3849 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3851 if (OCTEON_CN23XX_PF(octeon_dev) ||
3852 OCTEON_CN6XXX(octeon_dev)) {
3853 lio->dev_capability = NETIF_F_HIGHDMA
3856 | NETIF_F_SG | NETIF_F_RXCSUM
3858 | NETIF_F_TSO | NETIF_F_TSO6
3861 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE);
3863 /* Copy of transmit encapsulation capabilities:
3864 * TSO, TSO6, Checksums for this device
3866 lio->enc_dev_capability = NETIF_F_IP_CSUM
3868 | NETIF_F_GSO_UDP_TUNNEL
3869 | NETIF_F_HW_CSUM | NETIF_F_SG
3871 | NETIF_F_TSO | NETIF_F_TSO6
3874 netdev->hw_enc_features = (lio->enc_dev_capability &
3877 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL;
3879 netdev->vlan_features = lio->dev_capability;
3880 /* Add any unchangeable hw features */
3881 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER |
3882 NETIF_F_HW_VLAN_CTAG_RX |
3883 NETIF_F_HW_VLAN_CTAG_TX;
3885 netdev->features = (lio->dev_capability & ~NETIF_F_LRO);
3887 netdev->hw_features = lio->dev_capability;
3888 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/
3889 netdev->hw_features = netdev->hw_features &
3890 ~NETIF_F_HW_VLAN_CTAG_RX;
3892 /* Point to the properties for octeon device to which this
3893 * interface belongs.
3895 lio->oct_dev = octeon_dev;
3896 lio->octprops = props;
3897 lio->netdev = netdev;
3899 dev_dbg(&octeon_dev->pci_dev->dev,
3900 "if%d gmx: %d hw_addr: 0x%llx\n", i,
3901 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr));
3903 /* 64-bit swap required on LE machines */
3904 octeon_swap_8B_data(&lio->linfo.hw_addr, 1);
3905 for (j = 0; j < 6; j++)
3906 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j));
3908 /* Copy MAC Address to OS network device structure */
3910 ether_addr_copy(netdev->dev_addr, mac);
3912 /* By default all interfaces on a single Octeon uses the same
3915 lio->txq = lio->linfo.txpciq[0].s.q_no;
3916 lio->rxq = lio->linfo.rxpciq[0].s.q_no;
3917 if (setup_io_queues(octeon_dev, i)) {
3918 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n");
3919 goto setup_nic_dev_fail;
3922 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS);
3924 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq);
3925 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq);
3927 if (setup_glists(octeon_dev, lio, num_iqueues)) {
3928 dev_err(&octeon_dev->pci_dev->dev,
3929 "Gather list allocation failed\n");
3930 goto setup_nic_dev_fail;
3933 /* Register ethtool support */
3934 liquidio_set_ethtool_ops(netdev);
3935 octeon_dev->priv_flags = 0x0;
3937 if (netdev->features & NETIF_F_LRO)
3938 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE,
3939 OCTNIC_LROIPV4 | OCTNIC_LROIPV6);
3941 liquidio_set_feature(netdev, OCTNET_CMD_ENABLE_VLAN_FILTER, 0);
3943 if ((debug != -1) && (debug & NETIF_MSG_HW))
3944 liquidio_set_feature(netdev,
3945 OCTNET_CMD_VERBOSE_ENABLE, 0);
3947 if (setup_link_status_change_wq(netdev))
3948 goto setup_nic_dev_fail;
3950 /* Register the network device with the OS */
3951 if (register_netdev(netdev)) {
3952 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n");
3953 goto setup_nic_dev_fail;
3956 dev_dbg(&octeon_dev->pci_dev->dev,
3957 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n",
3958 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
3959 netif_carrier_off(netdev);
3960 lio->link_changes++;
3962 ifstate_set(lio, LIO_IFSTATE_REGISTERED);
3964 /* Sending command to firmware to enable Rx checksum offload
3965 * by default at the time of setup of Liquidio driver for
3968 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL,
3969 OCTNET_CMD_RXCSUM_ENABLE);
3970 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL,
3971 OCTNET_CMD_TXCSUM_ENABLE);
3973 dev_dbg(&octeon_dev->pci_dev->dev,
3974 "NIC ifidx:%d Setup successful\n", i);
3976 octeon_free_soft_command(octeon_dev, sc);
3983 octeon_free_soft_command(octeon_dev, sc);
3985 setup_nic_wait_intr:
3988 dev_err(&octeon_dev->pci_dev->dev,
3989 "NIC ifidx:%d Setup failed\n", i);
3990 liquidio_destroy_nic_device(octeon_dev, i);
3996 * \brief initialize the NIC
3997 * @param oct octeon device
3999 * This initialization routine is called once the Octeon device application is
4002 static int liquidio_init_nic_module(struct octeon_device *oct)
4004 struct oct_intrmod_cfg *intrmod_cfg;
4006 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct));
4008 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n");
4010 /* only default iq and oq were initialized
4011 * initialize the rest as well
4013 /* run port_config command for each port */
4014 oct->ifcount = num_nic_ports;
4016 memset(oct->props, 0,
4017 sizeof(struct octdev_props) * num_nic_ports);
4019 for (i = 0; i < MAX_OCTEON_LINKS; i++)
4020 oct->props[i].gmxport = -1;
4022 retval = setup_nic_devices(oct);
4024 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n");
4025 goto octnet_init_failure;
4028 liquidio_ptp_init(oct);
4030 /* Initialize interrupt moderation params */
4031 intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
4032 intrmod_cfg->rx_enable = 1;
4033 intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
4034 intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
4035 intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
4036 intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
4037 intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
4038 intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
4039 intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
4040 intrmod_cfg->tx_enable = 1;
4041 intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
4042 intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
4043 intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
4044 intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
4045 intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
4046 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
4050 octnet_init_failure:
4058 * \brief starter callback that invokes the remaining initialization work after
4059 * the NIC is up and running.
4060 * @param octptr work struct work_struct
4062 static void nic_starter(struct work_struct *work)
4064 struct octeon_device *oct;
4065 struct cavium_wk *wk = (struct cavium_wk *)work;
4067 oct = (struct octeon_device *)wk->ctxptr;
4069 if (atomic_read(&oct->status) == OCT_DEV_RUNNING)
4072 /* If the status of the device is CORE_OK, the core
4073 * application has reported its application type. Call
4074 * any registered handlers now and move to the RUNNING
4077 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) {
4078 schedule_delayed_work(&oct->nic_poll_work.work,
4079 LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4083 atomic_set(&oct->status, OCT_DEV_RUNNING);
4085 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) {
4086 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n");
4088 if (liquidio_init_nic_module(oct))
4089 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n");
4091 handshake[oct->octeon_id].started_ok = 1;
4093 dev_err(&oct->pci_dev->dev,
4094 "Unexpected application running on NIC (%d). Check firmware.\n",
4098 complete(&handshake[oct->octeon_id].started);
4102 * \brief Device initialization for each Octeon device that is probed
4103 * @param octeon_dev octeon device
4105 static int octeon_device_init(struct octeon_device *octeon_dev)
4109 char bootcmd[] = "\n";
4110 struct octeon_device_priv *oct_priv =
4111 (struct octeon_device_priv *)octeon_dev->priv;
4112 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE);
4114 /* Enable access to the octeon device and make its DMA capability
4117 if (octeon_pci_os_setup(octeon_dev))
4120 /* Identify the Octeon type and map the BAR address space. */
4121 if (octeon_chip_specific_setup(octeon_dev)) {
4122 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n");
4126 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE);
4128 octeon_dev->app_mode = CVM_DRV_INVALID_APP;
4130 if (OCTEON_CN23XX_PF(octeon_dev)) {
4131 if (!cn23xx_fw_loaded(octeon_dev)) {
4133 /* Do a soft reset of the Octeon device. */
4134 if (octeon_dev->fn_list.soft_reset(octeon_dev))
4136 /* things might have changed */
4137 if (!cn23xx_fw_loaded(octeon_dev))
4144 } else if (octeon_dev->fn_list.soft_reset(octeon_dev)) {
4148 /* Initialize the dispatch mechanism used to push packets arriving on
4149 * Octeon Output queues.
4151 if (octeon_init_dispatch_list(octeon_dev))
4154 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC,
4155 OPCODE_NIC_CORE_DRV_ACTIVE,
4156 octeon_core_drv_init,
4159 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter);
4160 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev;
4161 schedule_delayed_work(&octeon_dev->nic_poll_work.work,
4162 LIQUIDIO_STARTER_POLL_INTERVAL_MS);
4164 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE);
4166 octeon_set_io_queues_off(octeon_dev);
4168 if (OCTEON_CN23XX_PF(octeon_dev)) {
4169 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4171 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n");
4176 /* Initialize soft command buffer pool
4178 if (octeon_setup_sc_buffer_pool(octeon_dev)) {
4179 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n");
4182 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE);
4184 /* Setup the data structures that manage this Octeon's Input queues. */
4185 if (octeon_setup_instr_queues(octeon_dev)) {
4186 dev_err(&octeon_dev->pci_dev->dev,
4187 "instruction queue initialization failed\n");
4188 /* On error, release any previously allocated queues */
4189 for (j = 0; j < octeon_dev->num_iqs; j++)
4190 octeon_delete_instr_queue(octeon_dev, j);
4193 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE);
4195 /* Initialize lists to manage the requests of different types that
4196 * arrive from user & kernel applications for this octeon device.
4198 if (octeon_setup_response_list(octeon_dev)) {
4199 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n");
4202 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE);
4204 if (octeon_setup_output_queues(octeon_dev)) {
4205 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n");
4206 /* Release any previously allocated queues */
4207 for (j = 0; j < octeon_dev->num_oqs; j++)
4208 octeon_delete_droq(octeon_dev, j);
4212 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE);
4214 if (OCTEON_CN23XX_PF(octeon_dev)) {
4215 if (octeon_allocate_ioq_vector(octeon_dev)) {
4216 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n");
4221 /* The input and output queue registers were setup earlier (the
4222 * queues were not enabled). Any additional registers
4223 * that need to be programmed should be done now.
4225 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev);
4227 dev_err(&octeon_dev->pci_dev->dev,
4228 "Failed to configure device registers\n");
4233 /* Initialize the tasklet that handles output queue packet processing.*/
4234 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n");
4235 tasklet_init(&oct_priv->droq_tasklet, octeon_droq_bh,
4236 (unsigned long)octeon_dev);
4238 /* Setup the interrupt handler and record the INT SUM register address
4240 if (octeon_setup_interrupt(octeon_dev))
4243 /* Enable Octeon device interrupts */
4244 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR);
4246 /* Enable the input and output queues for this Octeon device */
4247 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev);
4249 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues");
4253 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE);
4255 if ((!OCTEON_CN23XX_PF(octeon_dev)) || !fw_loaded) {
4256 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n");
4258 dev_info(&octeon_dev->pci_dev->dev,
4259 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n");
4262 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS);
4264 /* Wait for the octeon to initialize DDR after the soft-reset.*/
4265 while (!ddr_timeout) {
4266 set_current_state(TASK_INTERRUPTIBLE);
4267 if (schedule_timeout(HZ / 10)) {
4268 /* user probably pressed Control-C */
4272 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout);
4274 dev_err(&octeon_dev->pci_dev->dev,
4275 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n",
4280 if (octeon_wait_for_bootloader(octeon_dev, 1000)) {
4281 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n");
4285 /* Divert uboot to take commands from host instead. */
4286 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50);
4288 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n");
4289 ret = octeon_init_consoles(octeon_dev);
4291 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n");
4294 ret = octeon_add_console(octeon_dev, 0);
4296 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n");
4300 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE);
4302 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n");
4303 ret = load_firmware(octeon_dev);
4305 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n");
4308 /* set bit 1 of SLI_SCRATCH_1 to indicate that firmware is
4311 if (OCTEON_CN23XX_PF(octeon_dev))
4312 octeon_write_csr64(octeon_dev, CN23XX_SLI_SCRATCH1,
4316 handshake[octeon_dev->octeon_id].init_ok = 1;
4317 complete(&handshake[octeon_dev->octeon_id].init);
4319 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK);
4321 /* Send Credit for Octeon Output queues. Credits are always sent after
4322 * the output queue is enabled.
4324 for (j = 0; j < octeon_dev->num_oqs; j++)
4325 writel(octeon_dev->droq[j]->max_count,
4326 octeon_dev->droq[j]->pkts_credit_reg);
4328 /* Packets can start arriving on the output queues from this point. */
4333 * \brief Exits the module
4335 static void __exit liquidio_exit(void)
4337 liquidio_deinit_pci();
4339 pr_info("LiquidIO network module is now unloaded\n");
4342 module_init(liquidio_init);
4343 module_exit(liquidio_exit);