1 /**********************************************************************
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
7 * Copyright (c) 2003-2015 Cavium, Inc.
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
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14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * This file may also be available under a different license from Cavium.
20 * Contact Cavium, Inc. for more information
21 **********************************************************************/
23 /*! \file cn68xx_regs.h
24 * \brief Host Driver: Register Address and Register Mask values for
25 * Octeon CN68XX devices. The register map for CN66XX is the same
26 * for most registers. This file has the other registers that are
30 #ifndef __CN68XX_REGS_H__
31 #define __CN68XX_REGS_H__
32 #include "cn66xx_regs.h"
34 /*###################### REQUEST QUEUE #########################*/
36 #define CN68XX_SLI_IQ_PORT0_PKIND 0x0800
38 #define CN68XX_SLI_IQ_PORT_PKIND(iq) \
39 (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET))
41 /*############################ OUTPUT QUEUE #########################*/
43 /* Starting pipe number and number of pipes used by the SLI packet output. */
44 #define CN68XX_SLI_TX_PIPE 0x1230
46 /*######################## INTERRUPTS #########################*/
48 /*------------------ Interrupt Masks ----------------*/
49 #define CN68XX_INTR_PIPE_ERR BIT_ULL(61)