drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c

   1 /* Broadcom NetXtreme-C/E network driver.
   2  *
   3  * Copyright (c) 2014-2016 Broadcom Corporation
   4  * Copyright (c) 2016-2017 Broadcom Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation.
   9  */
  10
  11 #include <linux/bitops.h>
  12 #include <linux/ctype.h>
  13 #include <linux/stringify.h>
  14 #include <linux/ethtool.h>
  15 #include <linux/ethtool_netlink.h>
  16 #include <linux/linkmode.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/pci.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/crc32.h>
  21 #include <linux/firmware.h>
  22 #include <linux/utsname.h>
  23 #include <linux/time.h>
  24 #include <linux/ptp_clock_kernel.h>
  25 #include <linux/net_tstamp.h>
  26 #include <linux/timecounter.h>
  27 #include <net/netlink.h>
  28 #include "bnxt_hsi.h"
  29 #include "bnxt.h"
  30 #include "bnxt_hwrm.h"
  31 #include "bnxt_ulp.h"
  32 #include "bnxt_xdp.h"
  33 #include "bnxt_ptp.h"
  34 #include "bnxt_ethtool.h"
  35 #include "bnxt_nvm_defs.h"      /* NVRAM content constant and structure defs */
  36 #include "bnxt_fw_hdr.h"        /* Firmware hdr constant and structure defs */
  37 #include "bnxt_coredump.h"
  38
  39 #define BNXT_NVM_ERR_MSG(dev, extack, msg)                      \
  40         do {                                                    \
  41                 if (extack)                                     \
  42                         NL_SET_ERR_MSG_MOD(extack, msg);        \
  43                 netdev_err(dev, "%s\n", msg);                   \
  44         } while (0)
  45
  46 static u32 bnxt_get_msglevel(struct net_device *dev)
  47 {
  48         struct bnxt *bp = netdev_priv(dev);
  49
  50         return bp->msg_enable;
  51 }
  52
  53 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  54 {
  55         struct bnxt *bp = netdev_priv(dev);
  56
  57         bp->msg_enable = value;
  58 }
  59
  60 static int bnxt_get_coalesce(struct net_device *dev,
  61                              struct ethtool_coalesce *coal,
  62                              struct kernel_ethtool_coalesce *kernel_coal,
  63                              struct netlink_ext_ack *extack)
  64 {
  65         struct bnxt *bp = netdev_priv(dev);
  66         struct bnxt_coal *hw_coal;
  67         u16 mult;
  68
  69         memset(coal, 0, sizeof(*coal));
  70
  71         coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
  72
  73         hw_coal = &bp->rx_coal;
  74         mult = hw_coal->bufs_per_record;
  75         coal->rx_coalesce_usecs = hw_coal->coal_ticks;
  76         coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  77         coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  78         coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  79         if (hw_coal->flags &
  80             RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET)
  81                 kernel_coal->use_cqe_mode_rx = true;
  82
  83         hw_coal = &bp->tx_coal;
  84         mult = hw_coal->bufs_per_record;
  85         coal->tx_coalesce_usecs = hw_coal->coal_ticks;
  86         coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  87         coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  88         coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  89         if (hw_coal->flags &
  90             RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET)
  91                 kernel_coal->use_cqe_mode_tx = true;
  92
  93         coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  94
  95         return 0;
  96 }
  97
  98 static int bnxt_set_coalesce(struct net_device *dev,
  99                              struct ethtool_coalesce *coal,
 100                              struct kernel_ethtool_coalesce *kernel_coal,
 101                              struct netlink_ext_ack *extack)
 102 {
 103         struct bnxt *bp = netdev_priv(dev);
 104         bool update_stats = false;
 105         struct bnxt_coal *hw_coal;
 106         int rc = 0;
 107         u16 mult;
 108
 109         if (coal->use_adaptive_rx_coalesce) {
 110                 bp->flags |= BNXT_FLAG_DIM;
 111         } else {
 112                 if (bp->flags & BNXT_FLAG_DIM) {
 113                         bp->flags &= ~(BNXT_FLAG_DIM);
 114                         goto reset_coalesce;
 115                 }
 116         }
 117
 118         if ((kernel_coal->use_cqe_mode_rx || kernel_coal->use_cqe_mode_tx) &&
 119             !(bp->coal_cap.cmpl_params &
 120               RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET))
 121                 return -EOPNOTSUPP;
 122
 123         hw_coal = &bp->rx_coal;
 124         mult = hw_coal->bufs_per_record;
 125         hw_coal->coal_ticks = coal->rx_coalesce_usecs;
 126         hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
 127         hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
 128         hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
 129         hw_coal->flags &=
 130                 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
 131         if (kernel_coal->use_cqe_mode_rx)
 132                 hw_coal->flags |=
 133                         RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
 134
 135         hw_coal = &bp->tx_coal;
 136         mult = hw_coal->bufs_per_record;
 137         hw_coal->coal_ticks = coal->tx_coalesce_usecs;
 138         hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
 139         hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
 140         hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
 141         hw_coal->flags &=
 142                 ~RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
 143         if (kernel_coal->use_cqe_mode_tx)
 144                 hw_coal->flags |=
 145                         RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET;
 146
 147         if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
 148                 u32 stats_ticks = coal->stats_block_coalesce_usecs;
 149
 150                 /* Allow 0, which means disable. */
 151                 if (stats_ticks)
 152                         stats_ticks = clamp_t(u32, stats_ticks,
 153                                               BNXT_MIN_STATS_COAL_TICKS,
 154                                               BNXT_MAX_STATS_COAL_TICKS);
 155                 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
 156                 bp->stats_coal_ticks = stats_ticks;
 157                 if (bp->stats_coal_ticks)
 158                         bp->current_interval =
 159                                 bp->stats_coal_ticks * HZ / 1000000;
 160                 else
 161                         bp->current_interval = BNXT_TIMER_INTERVAL;
 162                 update_stats = true;
 163         }
 164
 165 reset_coalesce:
 166         if (test_bit(BNXT_STATE_OPEN, &bp->state)) {
 167                 if (update_stats) {
 168                         bnxt_close_nic(bp, true, false);
 169                         rc = bnxt_open_nic(bp, true, false);
 170                 } else {
 171                         rc = bnxt_hwrm_set_coal(bp);
 172                 }
 173         }
 174
 175         return rc;
 176 }
 177
 178 static const char * const bnxt_ring_rx_stats_str[] = {
 179         "rx_ucast_packets",
 180         "rx_mcast_packets",
 181         "rx_bcast_packets",
 182         "rx_discards",
 183         "rx_errors",
 184         "rx_ucast_bytes",
 185         "rx_mcast_bytes",
 186         "rx_bcast_bytes",
 187 };
 188
 189 static const char * const bnxt_ring_tx_stats_str[] = {
 190         "tx_ucast_packets",
 191         "tx_mcast_packets",
 192         "tx_bcast_packets",
 193         "tx_errors",
 194         "tx_discards",
 195         "tx_ucast_bytes",
 196         "tx_mcast_bytes",
 197         "tx_bcast_bytes",
 198 };
 199
 200 static const char * const bnxt_ring_tpa_stats_str[] = {
 201         "tpa_packets",
 202         "tpa_bytes",
 203         "tpa_events",
 204         "tpa_aborts",
 205 };
 206
 207 static const char * const bnxt_ring_tpa2_stats_str[] = {
 208         "rx_tpa_eligible_pkt",
 209         "rx_tpa_eligible_bytes",
 210         "rx_tpa_pkt",
 211         "rx_tpa_bytes",
 212         "rx_tpa_errors",
 213         "rx_tpa_events",
 214 };
 215
 216 static const char * const bnxt_rx_sw_stats_str[] = {
 217         "rx_l4_csum_errors",
 218         "rx_resets",
 219         "rx_buf_errors",
 220 };
 221
 222 static const char * const bnxt_cmn_sw_stats_str[] = {
 223         "missed_irqs",
 224 };
 225
 226 #define BNXT_RX_STATS_ENTRY(counter)    \
 227         { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
 228
 229 #define BNXT_TX_STATS_ENTRY(counter)    \
 230         { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
 231
 232 #define BNXT_RX_STATS_EXT_ENTRY(counter)        \
 233         { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 234
 235 #define BNXT_TX_STATS_EXT_ENTRY(counter)        \
 236         { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 237
 238 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n)                          \
 239         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us),   \
 240         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
 241
 242 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n)                          \
 243         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us),   \
 244         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
 245
 246 #define BNXT_RX_STATS_EXT_PFC_ENTRIES                           \
 247         BNXT_RX_STATS_EXT_PFC_ENTRY(0),                         \
 248         BNXT_RX_STATS_EXT_PFC_ENTRY(1),                         \
 249         BNXT_RX_STATS_EXT_PFC_ENTRY(2),                         \
 250         BNXT_RX_STATS_EXT_PFC_ENTRY(3),                         \
 251         BNXT_RX_STATS_EXT_PFC_ENTRY(4),                         \
 252         BNXT_RX_STATS_EXT_PFC_ENTRY(5),                         \
 253         BNXT_RX_STATS_EXT_PFC_ENTRY(6),                         \
 254         BNXT_RX_STATS_EXT_PFC_ENTRY(7)
 255
 256 #define BNXT_TX_STATS_EXT_PFC_ENTRIES                           \
 257         BNXT_TX_STATS_EXT_PFC_ENTRY(0),                         \
 258         BNXT_TX_STATS_EXT_PFC_ENTRY(1),                         \
 259         BNXT_TX_STATS_EXT_PFC_ENTRY(2),                         \
 260         BNXT_TX_STATS_EXT_PFC_ENTRY(3),                         \
 261         BNXT_TX_STATS_EXT_PFC_ENTRY(4),                         \
 262         BNXT_TX_STATS_EXT_PFC_ENTRY(5),                         \
 263         BNXT_TX_STATS_EXT_PFC_ENTRY(6),                         \
 264         BNXT_TX_STATS_EXT_PFC_ENTRY(7)
 265
 266 #define BNXT_RX_STATS_EXT_COS_ENTRY(n)                          \
 267         BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n),               \
 268         BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
 269
 270 #define BNXT_TX_STATS_EXT_COS_ENTRY(n)                          \
 271         BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n),               \
 272         BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
 273
 274 #define BNXT_RX_STATS_EXT_COS_ENTRIES                           \
 275         BNXT_RX_STATS_EXT_COS_ENTRY(0),                         \
 276         BNXT_RX_STATS_EXT_COS_ENTRY(1),                         \
 277         BNXT_RX_STATS_EXT_COS_ENTRY(2),                         \
 278         BNXT_RX_STATS_EXT_COS_ENTRY(3),                         \
 279         BNXT_RX_STATS_EXT_COS_ENTRY(4),                         \
 280         BNXT_RX_STATS_EXT_COS_ENTRY(5),                         \
 281         BNXT_RX_STATS_EXT_COS_ENTRY(6),                         \
 282         BNXT_RX_STATS_EXT_COS_ENTRY(7)                          \
 283
 284 #define BNXT_TX_STATS_EXT_COS_ENTRIES                           \
 285         BNXT_TX_STATS_EXT_COS_ENTRY(0),                         \
 286         BNXT_TX_STATS_EXT_COS_ENTRY(1),                         \
 287         BNXT_TX_STATS_EXT_COS_ENTRY(2),                         \
 288         BNXT_TX_STATS_EXT_COS_ENTRY(3),                         \
 289         BNXT_TX_STATS_EXT_COS_ENTRY(4),                         \
 290         BNXT_TX_STATS_EXT_COS_ENTRY(5),                         \
 291         BNXT_TX_STATS_EXT_COS_ENTRY(6),                         \
 292         BNXT_TX_STATS_EXT_COS_ENTRY(7)                          \
 293
 294 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n)                  \
 295         BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n),       \
 296         BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
 297
 298 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES                           \
 299         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0),                         \
 300         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1),                         \
 301         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2),                         \
 302         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3),                         \
 303         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4),                         \
 304         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5),                         \
 305         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6),                         \
 306         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
 307
 308 #define BNXT_RX_STATS_PRI_ENTRY(counter, n)             \
 309         { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0),     \
 310           __stringify(counter##_pri##n) }
 311
 312 #define BNXT_TX_STATS_PRI_ENTRY(counter, n)             \
 313         { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0),     \
 314           __stringify(counter##_pri##n) }
 315
 316 #define BNXT_RX_STATS_PRI_ENTRIES(counter)              \
 317         BNXT_RX_STATS_PRI_ENTRY(counter, 0),            \
 318         BNXT_RX_STATS_PRI_ENTRY(counter, 1),            \
 319         BNXT_RX_STATS_PRI_ENTRY(counter, 2),            \
 320         BNXT_RX_STATS_PRI_ENTRY(counter, 3),            \
 321         BNXT_RX_STATS_PRI_ENTRY(counter, 4),            \
 322         BNXT_RX_STATS_PRI_ENTRY(counter, 5),            \
 323         BNXT_RX_STATS_PRI_ENTRY(counter, 6),            \
 324         BNXT_RX_STATS_PRI_ENTRY(counter, 7)
 325
 326 #define BNXT_TX_STATS_PRI_ENTRIES(counter)              \
 327         BNXT_TX_STATS_PRI_ENTRY(counter, 0),            \
 328         BNXT_TX_STATS_PRI_ENTRY(counter, 1),            \
 329         BNXT_TX_STATS_PRI_ENTRY(counter, 2),            \
 330         BNXT_TX_STATS_PRI_ENTRY(counter, 3),            \
 331         BNXT_TX_STATS_PRI_ENTRY(counter, 4),            \
 332         BNXT_TX_STATS_PRI_ENTRY(counter, 5),            \
 333         BNXT_TX_STATS_PRI_ENTRY(counter, 6),            \
 334         BNXT_TX_STATS_PRI_ENTRY(counter, 7)
 335
 336 enum {
 337         RX_TOTAL_DISCARDS,
 338         TX_TOTAL_DISCARDS,
 339         RX_NETPOLL_DISCARDS,
 340 };
 341
 342 static const char *const bnxt_ring_err_stats_arr[] = {
 343         "rx_total_l4_csum_errors",
 344         "rx_total_resets",
 345         "rx_total_buf_errors",
 346         "rx_total_oom_discards",
 347         "rx_total_netpoll_discards",
 348         "rx_total_ring_discards",
 349         "tx_total_resets",
 350         "tx_total_ring_discards",
 351         "total_missed_irqs",
 352 };
 353
 354 #define NUM_RING_RX_SW_STATS            ARRAY_SIZE(bnxt_rx_sw_stats_str)
 355 #define NUM_RING_CMN_SW_STATS           ARRAY_SIZE(bnxt_cmn_sw_stats_str)
 356 #define NUM_RING_RX_HW_STATS            ARRAY_SIZE(bnxt_ring_rx_stats_str)
 357 #define NUM_RING_TX_HW_STATS            ARRAY_SIZE(bnxt_ring_tx_stats_str)
 358
 359 static const struct {
 360         long offset;
 361         char string[ETH_GSTRING_LEN];
 362 } bnxt_port_stats_arr[] = {
 363         BNXT_RX_STATS_ENTRY(rx_64b_frames),
 364         BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
 365         BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
 366         BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
 367         BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
 368         BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
 369         BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
 370         BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
 371         BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
 372         BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
 373         BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
 374         BNXT_RX_STATS_ENTRY(rx_total_frames),
 375         BNXT_RX_STATS_ENTRY(rx_ucast_frames),
 376         BNXT_RX_STATS_ENTRY(rx_mcast_frames),
 377         BNXT_RX_STATS_ENTRY(rx_bcast_frames),
 378         BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
 379         BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
 380         BNXT_RX_STATS_ENTRY(rx_pause_frames),
 381         BNXT_RX_STATS_ENTRY(rx_pfc_frames),
 382         BNXT_RX_STATS_ENTRY(rx_align_err_frames),
 383         BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
 384         BNXT_RX_STATS_ENTRY(rx_jbr_frames),
 385         BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
 386         BNXT_RX_STATS_ENTRY(rx_tagged_frames),
 387         BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
 388         BNXT_RX_STATS_ENTRY(rx_good_frames),
 389         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
 390         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
 391         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
 392         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
 393         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
 394         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
 395         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
 396         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
 397         BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
 398         BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
 399         BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
 400         BNXT_RX_STATS_ENTRY(rx_bytes),
 401         BNXT_RX_STATS_ENTRY(rx_runt_bytes),
 402         BNXT_RX_STATS_ENTRY(rx_runt_frames),
 403         BNXT_RX_STATS_ENTRY(rx_stat_discard),
 404         BNXT_RX_STATS_ENTRY(rx_stat_err),
 405
 406         BNXT_TX_STATS_ENTRY(tx_64b_frames),
 407         BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
 408         BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
 409         BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
 410         BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
 411         BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
 412         BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
 413         BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
 414         BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
 415         BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
 416         BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
 417         BNXT_TX_STATS_ENTRY(tx_good_frames),
 418         BNXT_TX_STATS_ENTRY(tx_total_frames),
 419         BNXT_TX_STATS_ENTRY(tx_ucast_frames),
 420         BNXT_TX_STATS_ENTRY(tx_mcast_frames),
 421         BNXT_TX_STATS_ENTRY(tx_bcast_frames),
 422         BNXT_TX_STATS_ENTRY(tx_pause_frames),
 423         BNXT_TX_STATS_ENTRY(tx_pfc_frames),
 424         BNXT_TX_STATS_ENTRY(tx_jabber_frames),
 425         BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
 426         BNXT_TX_STATS_ENTRY(tx_err),
 427         BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
 428         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
 429         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
 430         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
 431         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
 432         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
 433         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
 434         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
 435         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
 436         BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
 437         BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
 438         BNXT_TX_STATS_ENTRY(tx_total_collisions),
 439         BNXT_TX_STATS_ENTRY(tx_bytes),
 440         BNXT_TX_STATS_ENTRY(tx_xthol_frames),
 441         BNXT_TX_STATS_ENTRY(tx_stat_discard),
 442         BNXT_TX_STATS_ENTRY(tx_stat_error),
 443 };
 444
 445 static const struct {
 446         long offset;
 447         char string[ETH_GSTRING_LEN];
 448 } bnxt_port_stats_ext_arr[] = {
 449         BNXT_RX_STATS_EXT_ENTRY(link_down_events),
 450         BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
 451         BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
 452         BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
 453         BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
 454         BNXT_RX_STATS_EXT_COS_ENTRIES,
 455         BNXT_RX_STATS_EXT_PFC_ENTRIES,
 456         BNXT_RX_STATS_EXT_ENTRY(rx_bits),
 457         BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
 458         BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
 459         BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
 460         BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
 461         BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks),
 462         BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks),
 463         BNXT_RX_STATS_EXT_ENTRY(rx_filter_miss),
 464 };
 465
 466 static const struct {
 467         long offset;
 468         char string[ETH_GSTRING_LEN];
 469 } bnxt_tx_port_stats_ext_arr[] = {
 470         BNXT_TX_STATS_EXT_COS_ENTRIES,
 471         BNXT_TX_STATS_EXT_PFC_ENTRIES,
 472 };
 473
 474 static const struct {
 475         long base_off;
 476         char string[ETH_GSTRING_LEN];
 477 } bnxt_rx_bytes_pri_arr[] = {
 478         BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
 479 };
 480
 481 static const struct {
 482         long base_off;
 483         char string[ETH_GSTRING_LEN];
 484 } bnxt_rx_pkts_pri_arr[] = {
 485         BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
 486 };
 487
 488 static const struct {
 489         long base_off;
 490         char string[ETH_GSTRING_LEN];
 491 } bnxt_tx_bytes_pri_arr[] = {
 492         BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
 493 };
 494
 495 static const struct {
 496         long base_off;
 497         char string[ETH_GSTRING_LEN];
 498 } bnxt_tx_pkts_pri_arr[] = {
 499         BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
 500 };
 501
 502 #define BNXT_NUM_RING_ERR_STATS ARRAY_SIZE(bnxt_ring_err_stats_arr)
 503 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
 504 #define BNXT_NUM_STATS_PRI                      \
 505         (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) +    \
 506          ARRAY_SIZE(bnxt_rx_pkts_pri_arr) +     \
 507          ARRAY_SIZE(bnxt_tx_bytes_pri_arr) +    \
 508          ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
 509
 510 static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp)
 511 {
 512         if (BNXT_SUPPORTS_TPA(bp)) {
 513                 if (bp->max_tpa_v2) {
 514                         if (BNXT_CHIP_P5(bp))
 515                                 return BNXT_NUM_TPA_RING_STATS_P5;
 516                         return BNXT_NUM_TPA_RING_STATS_P7;
 517                 }
 518                 return BNXT_NUM_TPA_RING_STATS;
 519         }
 520         return 0;
 521 }
 522
 523 static int bnxt_get_num_ring_stats(struct bnxt *bp)
 524 {
 525         int rx, tx, cmn;
 526
 527         rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
 528              bnxt_get_num_tpa_ring_stats(bp);
 529         tx = NUM_RING_TX_HW_STATS;
 530         cmn = NUM_RING_CMN_SW_STATS;
 531         return rx * bp->rx_nr_rings +
 532                tx * (bp->tx_nr_rings_xdp + bp->tx_nr_rings_per_tc) +
 533                cmn * bp->cp_nr_rings;
 534 }
 535
 536 static int bnxt_get_num_stats(struct bnxt *bp)
 537 {
 538         int num_stats = bnxt_get_num_ring_stats(bp);
 539         int len;
 540
 541         num_stats += BNXT_NUM_RING_ERR_STATS;
 542
 543         if (bp->flags & BNXT_FLAG_PORT_STATS)
 544                 num_stats += BNXT_NUM_PORT_STATS;
 545
 546         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 547                 len = min_t(int, bp->fw_rx_stats_ext_size,
 548                             ARRAY_SIZE(bnxt_port_stats_ext_arr));
 549                 num_stats += len;
 550                 len = min_t(int, bp->fw_tx_stats_ext_size,
 551                             ARRAY_SIZE(bnxt_tx_port_stats_ext_arr));
 552                 num_stats += len;
 553                 if (bp->pri2cos_valid)
 554                         num_stats += BNXT_NUM_STATS_PRI;
 555         }
 556
 557         return num_stats;
 558 }
 559
 560 static int bnxt_get_sset_count(struct net_device *dev, int sset)
 561 {
 562         struct bnxt *bp = netdev_priv(dev);
 563
 564         switch (sset) {
 565         case ETH_SS_STATS:
 566                 return bnxt_get_num_stats(bp);
 567         case ETH_SS_TEST:
 568                 if (!bp->num_tests)
 569                         return -EOPNOTSUPP;
 570                 return bp->num_tests;
 571         default:
 572                 return -EOPNOTSUPP;
 573         }
 574 }
 575
 576 static bool is_rx_ring(struct bnxt *bp, int ring_num)
 577 {
 578         return ring_num < bp->rx_nr_rings;
 579 }
 580
 581 static bool is_tx_ring(struct bnxt *bp, int ring_num)
 582 {
 583         int tx_base = 0;
 584
 585         if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))
 586                 tx_base = bp->rx_nr_rings;
 587
 588         if (ring_num >= tx_base && ring_num < (tx_base + bp->tx_nr_rings))
 589                 return true;
 590         return false;
 591 }
 592
 593 static void bnxt_get_ethtool_stats(struct net_device *dev,
 594                                    struct ethtool_stats *stats, u64 *buf)
 595 {
 596         struct bnxt_total_ring_err_stats ring_err_stats = {0};
 597         struct bnxt *bp = netdev_priv(dev);
 598         u64 *curr, *prev;
 599         u32 tpa_stats;
 600         u32 i, j = 0;
 601
 602         if (!bp->bnapi) {
 603                 j += bnxt_get_num_ring_stats(bp);
 604                 goto skip_ring_stats;
 605         }
 606
 607         tpa_stats = bnxt_get_num_tpa_ring_stats(bp);
 608         for (i = 0; i < bp->cp_nr_rings; i++) {
 609                 struct bnxt_napi *bnapi = bp->bnapi[i];
 610                 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
 611                 u64 *sw_stats = cpr->stats.sw_stats;
 612                 u64 *sw;
 613                 int k;
 614
 615                 if (is_rx_ring(bp, i)) {
 616                         for (k = 0; k < NUM_RING_RX_HW_STATS; j++, k++)
 617                                 buf[j] = sw_stats[k];
 618                 }
 619                 if (is_tx_ring(bp, i)) {
 620                         k = NUM_RING_RX_HW_STATS;
 621                         for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
 622                                j++, k++)
 623                                 buf[j] = sw_stats[k];
 624                 }
 625                 if (!tpa_stats || !is_rx_ring(bp, i))
 626                         goto skip_tpa_ring_stats;
 627
 628                 k = NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS;
 629                 for (; k < NUM_RING_RX_HW_STATS + NUM_RING_TX_HW_STATS +
 630                            tpa_stats; j++, k++)
 631                         buf[j] = sw_stats[k];
 632
 633 skip_tpa_ring_stats:
 634                 sw = (u64 *)&cpr->sw_stats.rx;
 635                 if (is_rx_ring(bp, i)) {
 636                         for (k = 0; k < NUM_RING_RX_SW_STATS; j++, k++)
 637                                 buf[j] = sw[k];
 638                 }
 639
 640                 sw = (u64 *)&cpr->sw_stats.cmn;
 641                 for (k = 0; k < NUM_RING_CMN_SW_STATS; j++, k++)
 642                         buf[j] = sw[k];
 643         }
 644
 645         bnxt_get_ring_err_stats(bp, &ring_err_stats);
 646
 647 skip_ring_stats:
 648         curr = &ring_err_stats.rx_total_l4_csum_errors;
 649         prev = &bp->ring_err_stats_prev.rx_total_l4_csum_errors;
 650         for (i = 0; i < BNXT_NUM_RING_ERR_STATS; i++, j++, curr++, prev++)
 651                 buf[j] = *curr + *prev;
 652
 653         if (bp->flags & BNXT_FLAG_PORT_STATS) {
 654                 u64 *port_stats = bp->port_stats.sw_stats;
 655
 656                 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++)
 657                         buf[j] = *(port_stats + bnxt_port_stats_arr[i].offset);
 658         }
 659         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 660                 u64 *rx_port_stats_ext = bp->rx_port_stats_ext.sw_stats;
 661                 u64 *tx_port_stats_ext = bp->tx_port_stats_ext.sw_stats;
 662                 u32 len;
 663
 664                 len = min_t(u32, bp->fw_rx_stats_ext_size,
 665                             ARRAY_SIZE(bnxt_port_stats_ext_arr));
 666                 for (i = 0; i < len; i++, j++) {
 667                         buf[j] = *(rx_port_stats_ext +
 668                                    bnxt_port_stats_ext_arr[i].offset);
 669                 }
 670                 len = min_t(u32, bp->fw_tx_stats_ext_size,
 671                             ARRAY_SIZE(bnxt_tx_port_stats_ext_arr));
 672                 for (i = 0; i < len; i++, j++) {
 673                         buf[j] = *(tx_port_stats_ext +
 674                                    bnxt_tx_port_stats_ext_arr[i].offset);
 675                 }
 676                 if (bp->pri2cos_valid) {
 677                         for (i = 0; i < 8; i++, j++) {
 678                                 long n = bnxt_rx_bytes_pri_arr[i].base_off +
 679                                          bp->pri2cos_idx[i];
 680
 681                                 buf[j] = *(rx_port_stats_ext + n);
 682                         }
 683                         for (i = 0; i < 8; i++, j++) {
 684                                 long n = bnxt_rx_pkts_pri_arr[i].base_off +
 685                                          bp->pri2cos_idx[i];
 686
 687                                 buf[j] = *(rx_port_stats_ext + n);
 688                         }
 689                         for (i = 0; i < 8; i++, j++) {
 690                                 long n = bnxt_tx_bytes_pri_arr[i].base_off +
 691                                          bp->pri2cos_idx[i];
 692
 693                                 buf[j] = *(tx_port_stats_ext + n);
 694                         }
 695                         for (i = 0; i < 8; i++, j++) {
 696                                 long n = bnxt_tx_pkts_pri_arr[i].base_off +
 697                                          bp->pri2cos_idx[i];
 698
 699                                 buf[j] = *(tx_port_stats_ext + n);
 700                         }
 701                 }
 702         }
 703 }
 704
 705 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
 706 {
 707         struct bnxt *bp = netdev_priv(dev);
 708         static const char * const *str;
 709         u32 i, j, num_str;
 710
 711         switch (stringset) {
 712         case ETH_SS_STATS:
 713                 for (i = 0; i < bp->cp_nr_rings; i++) {
 714                         if (is_rx_ring(bp, i)) {
 715                                 num_str = NUM_RING_RX_HW_STATS;
 716                                 for (j = 0; j < num_str; j++) {
 717                                         sprintf(buf, "[%d]: %s", i,
 718                                                 bnxt_ring_rx_stats_str[j]);
 719                                         buf += ETH_GSTRING_LEN;
 720                                 }
 721                         }
 722                         if (is_tx_ring(bp, i)) {
 723                                 num_str = NUM_RING_TX_HW_STATS;
 724                                 for (j = 0; j < num_str; j++) {
 725                                         sprintf(buf, "[%d]: %s", i,
 726                                                 bnxt_ring_tx_stats_str[j]);
 727                                         buf += ETH_GSTRING_LEN;
 728                                 }
 729                         }
 730                         num_str = bnxt_get_num_tpa_ring_stats(bp);
 731                         if (!num_str || !is_rx_ring(bp, i))
 732                                 goto skip_tpa_stats;
 733
 734                         if (bp->max_tpa_v2)
 735                                 str = bnxt_ring_tpa2_stats_str;
 736                         else
 737                                 str = bnxt_ring_tpa_stats_str;
 738
 739                         for (j = 0; j < num_str; j++) {
 740                                 sprintf(buf, "[%d]: %s", i, str[j]);
 741                                 buf += ETH_GSTRING_LEN;
 742                         }
 743 skip_tpa_stats:
 744                         if (is_rx_ring(bp, i)) {
 745                                 num_str = NUM_RING_RX_SW_STATS;
 746                                 for (j = 0; j < num_str; j++) {
 747                                         sprintf(buf, "[%d]: %s", i,
 748                                                 bnxt_rx_sw_stats_str[j]);
 749                                         buf += ETH_GSTRING_LEN;
 750                                 }
 751                         }
 752                         num_str = NUM_RING_CMN_SW_STATS;
 753                         for (j = 0; j < num_str; j++) {
 754                                 sprintf(buf, "[%d]: %s", i,
 755                                         bnxt_cmn_sw_stats_str[j]);
 756                                 buf += ETH_GSTRING_LEN;
 757                         }
 758                 }
 759                 for (i = 0; i < BNXT_NUM_RING_ERR_STATS; i++) {
 760                         strscpy(buf, bnxt_ring_err_stats_arr[i], ETH_GSTRING_LEN);
 761                         buf += ETH_GSTRING_LEN;
 762                 }
 763
 764                 if (bp->flags & BNXT_FLAG_PORT_STATS) {
 765                         for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
 766                                 strcpy(buf, bnxt_port_stats_arr[i].string);
 767                                 buf += ETH_GSTRING_LEN;
 768                         }
 769                 }
 770                 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 771                         u32 len;
 772
 773                         len = min_t(u32, bp->fw_rx_stats_ext_size,
 774                                     ARRAY_SIZE(bnxt_port_stats_ext_arr));
 775                         for (i = 0; i < len; i++) {
 776                                 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
 777                                 buf += ETH_GSTRING_LEN;
 778                         }
 779                         len = min_t(u32, bp->fw_tx_stats_ext_size,
 780                                     ARRAY_SIZE(bnxt_tx_port_stats_ext_arr));
 781                         for (i = 0; i < len; i++) {
 782                                 strcpy(buf,
 783                                        bnxt_tx_port_stats_ext_arr[i].string);
 784                                 buf += ETH_GSTRING_LEN;
 785                         }
 786                         if (bp->pri2cos_valid) {
 787                                 for (i = 0; i < 8; i++) {
 788                                         strcpy(buf,
 789                                                bnxt_rx_bytes_pri_arr[i].string);
 790                                         buf += ETH_GSTRING_LEN;
 791                                 }
 792                                 for (i = 0; i < 8; i++) {
 793                                         strcpy(buf,
 794                                                bnxt_rx_pkts_pri_arr[i].string);
 795                                         buf += ETH_GSTRING_LEN;
 796                                 }
 797                                 for (i = 0; i < 8; i++) {
 798                                         strcpy(buf,
 799                                                bnxt_tx_bytes_pri_arr[i].string);
 800                                         buf += ETH_GSTRING_LEN;
 801                                 }
 802                                 for (i = 0; i < 8; i++) {
 803                                         strcpy(buf,
 804                                                bnxt_tx_pkts_pri_arr[i].string);
 805                                         buf += ETH_GSTRING_LEN;
 806                                 }
 807                         }
 808                 }
 809                 break;
 810         case ETH_SS_TEST:
 811                 if (bp->num_tests)
 812                         memcpy(buf, bp->test_info->string,
 813                                bp->num_tests * ETH_GSTRING_LEN);
 814                 break;
 815         default:
 816                 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
 817                            stringset);
 818                 break;
 819         }
 820 }
 821
 822 static void bnxt_get_ringparam(struct net_device *dev,
 823                                struct ethtool_ringparam *ering,
 824                                struct kernel_ethtool_ringparam *kernel_ering,
 825                                struct netlink_ext_ack *extack)
 826 {
 827         struct bnxt *bp = netdev_priv(dev);
 828
 829         if (bp->flags & BNXT_FLAG_AGG_RINGS) {
 830                 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT_JUM_ENA;
 831                 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
 832                 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED;
 833         } else {
 834                 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
 835                 ering->rx_jumbo_max_pending = 0;
 836                 kernel_ering->tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_DISABLED;
 837         }
 838         ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
 839
 840         ering->rx_pending = bp->rx_ring_size;
 841         ering->rx_jumbo_pending = bp->rx_agg_ring_size;
 842         ering->tx_pending = bp->tx_ring_size;
 843 }
 844
 845 static int bnxt_set_ringparam(struct net_device *dev,
 846                               struct ethtool_ringparam *ering,
 847                               struct kernel_ethtool_ringparam *kernel_ering,
 848                               struct netlink_ext_ack *extack)
 849 {
 850         struct bnxt *bp = netdev_priv(dev);
 851
 852         if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
 853             (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
 854             (ering->tx_pending < BNXT_MIN_TX_DESC_CNT))
 855                 return -EINVAL;
 856
 857         if (netif_running(dev))
 858                 bnxt_close_nic(bp, false, false);
 859
 860         bp->rx_ring_size = ering->rx_pending;
 861         bp->tx_ring_size = ering->tx_pending;
 862         bnxt_set_ring_params(bp);
 863
 864         if (netif_running(dev))
 865                 return bnxt_open_nic(bp, false, false);
 866
 867         return 0;
 868 }
 869
 870 static void bnxt_get_channels(struct net_device *dev,
 871                               struct ethtool_channels *channel)
 872 {
 873         struct bnxt *bp = netdev_priv(dev);
 874         struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
 875         int max_rx_rings, max_tx_rings, tcs;
 876         int max_tx_sch_inputs, tx_grps;
 877
 878         /* Get the most up-to-date max_tx_sch_inputs. */
 879         if (netif_running(dev) && BNXT_NEW_RM(bp))
 880                 bnxt_hwrm_func_resc_qcaps(bp, false);
 881         max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
 882
 883         bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
 884         if (max_tx_sch_inputs)
 885                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 886
 887         tcs = netdev_get_num_tc(dev);
 888         tx_grps = max(tcs, 1);
 889         if (bp->tx_nr_rings_xdp)
 890                 tx_grps++;
 891         max_tx_rings /= tx_grps;
 892         channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
 893
 894         if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
 895                 max_rx_rings = 0;
 896                 max_tx_rings = 0;
 897         }
 898         if (max_tx_sch_inputs)
 899                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 900
 901         if (tcs > 1)
 902                 max_tx_rings /= tcs;
 903
 904         channel->max_rx = max_rx_rings;
 905         channel->max_tx = max_tx_rings;
 906         channel->max_other = 0;
 907         if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
 908                 channel->combined_count = bp->rx_nr_rings;
 909                 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
 910                         channel->combined_count--;
 911         } else {
 912                 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
 913                         channel->rx_count = bp->rx_nr_rings;
 914                         channel->tx_count = bp->tx_nr_rings_per_tc;
 915                 }
 916         }
 917 }
 918
 919 static int bnxt_set_channels(struct net_device *dev,
 920                              struct ethtool_channels *channel)
 921 {
 922         struct bnxt *bp = netdev_priv(dev);
 923         int req_tx_rings, req_rx_rings, tcs;
 924         bool sh = false;
 925         int tx_xdp = 0;
 926         int rc = 0;
 927         int tx_cp;
 928
 929         if (channel->other_count)
 930                 return -EINVAL;
 931
 932         if (!channel->combined_count &&
 933             (!channel->rx_count || !channel->tx_count))
 934                 return -EINVAL;
 935
 936         if (channel->combined_count &&
 937             (channel->rx_count || channel->tx_count))
 938                 return -EINVAL;
 939
 940         if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
 941                                             channel->tx_count))
 942                 return -EINVAL;
 943
 944         if (channel->combined_count)
 945                 sh = true;
 946
 947         tcs = netdev_get_num_tc(dev);
 948
 949         req_tx_rings = sh ? channel->combined_count : channel->tx_count;
 950         req_rx_rings = sh ? channel->combined_count : channel->rx_count;
 951         if (bp->tx_nr_rings_xdp) {
 952                 if (!sh) {
 953                         netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
 954                         return -EINVAL;
 955                 }
 956                 tx_xdp = req_rx_rings;
 957         }
 958         rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
 959         if (rc) {
 960                 netdev_warn(dev, "Unable to allocate the requested rings\n");
 961                 return rc;
 962         }
 963
 964         if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
 965             bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
 966             netif_is_rxfh_configured(dev)) {
 967                 netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");
 968                 return -EINVAL;
 969         }
 970
 971         if (netif_running(dev)) {
 972                 if (BNXT_PF(bp)) {
 973                         /* TODO CHIMP_FW: Send message to all VF's
 974                          * before PF unload
 975                          */
 976                 }
 977                 bnxt_close_nic(bp, true, false);
 978         }
 979
 980         if (sh) {
 981                 bp->flags |= BNXT_FLAG_SHARED_RINGS;
 982                 bp->rx_nr_rings = channel->combined_count;
 983                 bp->tx_nr_rings_per_tc = channel->combined_count;
 984         } else {
 985                 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
 986                 bp->rx_nr_rings = channel->rx_count;
 987                 bp->tx_nr_rings_per_tc = channel->tx_count;
 988         }
 989         bp->tx_nr_rings_xdp = tx_xdp;
 990         bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
 991         if (tcs > 1)
 992                 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
 993
 994         tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings);
 995         bp->cp_nr_rings = sh ? max_t(int, tx_cp, bp->rx_nr_rings) :
 996                                tx_cp + bp->rx_nr_rings;
 997
 998         /* After changing number of rx channels, update NTUPLE feature. */
 999         netdev_update_features(dev);
1000         if (netif_running(dev)) {
1001                 rc = bnxt_open_nic(bp, true, false);
1002                 if ((!rc) && BNXT_PF(bp)) {
1003                         /* TODO CHIMP_FW: Send message to all VF's
1004                          * to renable
1005                          */
1006                 }
1007         } else {
1008                 rc = bnxt_reserve_rings(bp, true);
1009         }
1010
1011         return rc;
1012 }
1013
1014 #ifdef CONFIG_RFS_ACCEL
1015 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
1016                             u32 *rule_locs)
1017 {
1018         int i, j = 0;
1019
1020         cmd->data = bp->ntp_fltr_count;
1021         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
1022                 struct hlist_head *head;
1023                 struct bnxt_ntuple_filter *fltr;
1024
1025                 head = &bp->ntp_fltr_hash_tbl[i];
1026                 rcu_read_lock();
1027                 hlist_for_each_entry_rcu(fltr, head, base.hash) {
1028                         if (j == cmd->rule_cnt)
1029                                 break;
1030                         rule_locs[j++] = fltr->base.sw_id;
1031                 }
1032                 rcu_read_unlock();
1033                 if (j == cmd->rule_cnt)
1034                         break;
1035         }
1036         cmd->rule_cnt = j;
1037         return 0;
1038 }
1039
1040 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1041 {
1042         struct ethtool_rx_flow_spec *fs =
1043                 (struct ethtool_rx_flow_spec *)&cmd->fs;
1044         struct bnxt_ntuple_filter *fltr;
1045         struct flow_keys *fkeys;
1046         int i, rc = -EINVAL;
1047
1048         if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
1049                 return rc;
1050
1051         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
1052                 struct hlist_head *head;
1053
1054                 head = &bp->ntp_fltr_hash_tbl[i];
1055                 rcu_read_lock();
1056                 hlist_for_each_entry_rcu(fltr, head, base.hash) {
1057                         if (fltr->base.sw_id == fs->location)
1058                                 goto fltr_found;
1059                 }
1060                 rcu_read_unlock();
1061         }
1062         return rc;
1063
1064 fltr_found:
1065         fkeys = &fltr->fkeys;
1066         if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
1067                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1068                         fs->flow_type = TCP_V4_FLOW;
1069                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1070                         fs->flow_type = UDP_V4_FLOW;
1071                 else
1072                         goto fltr_err;
1073
1074                 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
1075                 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
1076
1077                 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
1078                 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
1079
1080                 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
1081                 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
1082
1083                 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
1084                 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
1085         } else {
1086                 int i;
1087
1088                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
1089                         fs->flow_type = TCP_V6_FLOW;
1090                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
1091                         fs->flow_type = UDP_V6_FLOW;
1092                 else
1093                         goto fltr_err;
1094
1095                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
1096                         fkeys->addrs.v6addrs.src;
1097                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
1098                         fkeys->addrs.v6addrs.dst;
1099                 for (i = 0; i < 4; i++) {
1100                         fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
1101                         fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
1102                 }
1103                 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
1104                 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
1105
1106                 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
1107                 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
1108         }
1109
1110         fs->ring_cookie = fltr->base.rxq;
1111         rc = 0;
1112
1113 fltr_err:
1114         rcu_read_unlock();
1115
1116         return rc;
1117 }
1118 #endif
1119
1120 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
1121 {
1122         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
1123                 return RXH_IP_SRC | RXH_IP_DST;
1124         return 0;
1125 }
1126
1127 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
1128 {
1129         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
1130                 return RXH_IP_SRC | RXH_IP_DST;
1131         return 0;
1132 }
1133
1134 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1135 {
1136         cmd->data = 0;
1137         switch (cmd->flow_type) {
1138         case TCP_V4_FLOW:
1139                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
1140                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1141                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1142                 cmd->data |= get_ethtool_ipv4_rss(bp);
1143                 break;
1144         case UDP_V4_FLOW:
1145                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1146                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1147                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1148                 fallthrough;
1149         case SCTP_V4_FLOW:
1150         case AH_ESP_V4_FLOW:
1151         case AH_V4_FLOW:
1152         case ESP_V4_FLOW:
1153         case IPV4_FLOW:
1154                 cmd->data |= get_ethtool_ipv4_rss(bp);
1155                 break;
1156
1157         case TCP_V6_FLOW:
1158                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
1159                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1160                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1161                 cmd->data |= get_ethtool_ipv6_rss(bp);
1162                 break;
1163         case UDP_V6_FLOW:
1164                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1165                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
1166                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
1167                 fallthrough;
1168         case SCTP_V6_FLOW:
1169         case AH_ESP_V6_FLOW:
1170         case AH_V6_FLOW:
1171         case ESP_V6_FLOW:
1172         case IPV6_FLOW:
1173                 cmd->data |= get_ethtool_ipv6_rss(bp);
1174                 break;
1175         }
1176         return 0;
1177 }
1178
1179 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1180 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1181
1182 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1183 {
1184         u32 rss_hash_cfg = bp->rss_hash_cfg;
1185         int tuple, rc = 0;
1186
1187         if (cmd->data == RXH_4TUPLE)
1188                 tuple = 4;
1189         else if (cmd->data == RXH_2TUPLE)
1190                 tuple = 2;
1191         else if (!cmd->data)
1192                 tuple = 0;
1193         else
1194                 return -EINVAL;
1195
1196         if (cmd->flow_type == TCP_V4_FLOW) {
1197                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1198                 if (tuple == 4)
1199                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1200         } else if (cmd->flow_type == UDP_V4_FLOW) {
1201                 if (tuple == 4 && !(bp->rss_cap & BNXT_RSS_CAP_UDP_RSS_CAP))
1202                         return -EINVAL;
1203                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1204                 if (tuple == 4)
1205                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1206         } else if (cmd->flow_type == TCP_V6_FLOW) {
1207                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1208                 if (tuple == 4)
1209                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1210         } else if (cmd->flow_type == UDP_V6_FLOW) {
1211                 if (tuple == 4 && !(bp->rss_cap & BNXT_RSS_CAP_UDP_RSS_CAP))
1212                         return -EINVAL;
1213                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1214                 if (tuple == 4)
1215                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1216         } else if (tuple == 4) {
1217                 return -EINVAL;
1218         }
1219
1220         switch (cmd->flow_type) {
1221         case TCP_V4_FLOW:
1222         case UDP_V4_FLOW:
1223         case SCTP_V4_FLOW:
1224         case AH_ESP_V4_FLOW:
1225         case AH_V4_FLOW:
1226         case ESP_V4_FLOW:
1227         case IPV4_FLOW:
1228                 if (tuple == 2)
1229                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1230                 else if (!tuple)
1231                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1232                 break;
1233
1234         case TCP_V6_FLOW:
1235         case UDP_V6_FLOW:
1236         case SCTP_V6_FLOW:
1237         case AH_ESP_V6_FLOW:
1238         case AH_V6_FLOW:
1239         case ESP_V6_FLOW:
1240         case IPV6_FLOW:
1241                 if (tuple == 2)
1242                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1243                 else if (!tuple)
1244                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1245                 break;
1246         }
1247
1248         if (bp->rss_hash_cfg == rss_hash_cfg)
1249                 return 0;
1250
1251         if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA)
1252                 bp->rss_hash_delta = bp->rss_hash_cfg ^ rss_hash_cfg;
1253         bp->rss_hash_cfg = rss_hash_cfg;
1254         if (netif_running(bp->dev)) {
1255                 bnxt_close_nic(bp, false, false);
1256                 rc = bnxt_open_nic(bp, false, false);
1257         }
1258         return rc;
1259 }
1260
1261 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1262                           u32 *rule_locs)
1263 {
1264         struct bnxt *bp = netdev_priv(dev);
1265         int rc = 0;
1266
1267         switch (cmd->cmd) {
1268 #ifdef CONFIG_RFS_ACCEL
1269         case ETHTOOL_GRXRINGS:
1270                 cmd->data = bp->rx_nr_rings;
1271                 break;
1272
1273         case ETHTOOL_GRXCLSRLCNT:
1274                 cmd->rule_cnt = bp->ntp_fltr_count;
1275                 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1276                 break;
1277
1278         case ETHTOOL_GRXCLSRLALL:
1279                 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1280                 break;
1281
1282         case ETHTOOL_GRXCLSRULE:
1283                 rc = bnxt_grxclsrule(bp, cmd);
1284                 break;
1285 #endif
1286
1287         case ETHTOOL_GRXFH:
1288                 rc = bnxt_grxfh(bp, cmd);
1289                 break;
1290
1291         default:
1292                 rc = -EOPNOTSUPP;
1293                 break;
1294         }
1295
1296         return rc;
1297 }
1298
1299 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1300 {
1301         struct bnxt *bp = netdev_priv(dev);
1302         int rc;
1303
1304         switch (cmd->cmd) {
1305         case ETHTOOL_SRXFH:
1306                 rc = bnxt_srxfh(bp, cmd);
1307                 break;
1308
1309         default:
1310                 rc = -EOPNOTSUPP;
1311                 break;
1312         }
1313         return rc;
1314 }
1315
1316 u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1317 {
1318         struct bnxt *bp = netdev_priv(dev);
1319
1320         if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
1321                 return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
1322         return HW_HASH_INDEX_SIZE;
1323 }
1324
1325 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1326 {
1327         return HW_HASH_KEY_SIZE;
1328 }
1329
1330 static int bnxt_get_rxfh(struct net_device *dev,
1331                          struct ethtool_rxfh_param *rxfh)
1332 {
1333         struct bnxt *bp = netdev_priv(dev);
1334         struct bnxt_vnic_info *vnic;
1335         u32 i, tbl_size;
1336
1337         rxfh->hfunc = ETH_RSS_HASH_TOP;
1338
1339         if (!bp->vnic_info)
1340                 return 0;
1341
1342         vnic = &bp->vnic_info[0];
1343         if (rxfh->indir && bp->rss_indir_tbl) {
1344                 tbl_size = bnxt_get_rxfh_indir_size(dev);
1345                 for (i = 0; i < tbl_size; i++)
1346                         rxfh->indir[i] = bp->rss_indir_tbl[i];
1347         }
1348
1349         if (rxfh->key && vnic->rss_hash_key)
1350                 memcpy(rxfh->key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1351
1352         return 0;
1353 }
1354
1355 static int bnxt_set_rxfh(struct net_device *dev,
1356                          struct ethtool_rxfh_param *rxfh,
1357                          struct netlink_ext_ack *extack)
1358 {
1359         struct bnxt *bp = netdev_priv(dev);
1360         int rc = 0;
1361
1362         if (rxfh->hfunc && rxfh->hfunc != ETH_RSS_HASH_TOP)
1363                 return -EOPNOTSUPP;
1364
1365         if (rxfh->key)
1366                 return -EOPNOTSUPP;
1367
1368         if (rxfh->indir) {
1369                 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(dev);
1370
1371                 for (i = 0; i < tbl_size; i++)
1372                         bp->rss_indir_tbl[i] = rxfh->indir[i];
1373                 pad = bp->rss_indir_tbl_entries - tbl_size;
1374                 if (pad)
1375                         memset(&bp->rss_indir_tbl[i], 0, pad * sizeof(u16));
1376         }
1377
1378         if (netif_running(bp->dev)) {
1379                 bnxt_close_nic(bp, false, false);
1380                 rc = bnxt_open_nic(bp, false, false);
1381         }
1382         return rc;
1383 }
1384
1385 static void bnxt_get_drvinfo(struct net_device *dev,
1386                              struct ethtool_drvinfo *info)
1387 {
1388         struct bnxt *bp = netdev_priv(dev);
1389
1390         strscpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1391         strscpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1392         strscpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1393         info->n_stats = bnxt_get_num_stats(bp);
1394         info->testinfo_len = bp->num_tests;
1395         /* TODO CHIMP_FW: eeprom dump details */
1396         info->eedump_len = 0;
1397         /* TODO CHIMP FW: reg dump details */
1398         info->regdump_len = 0;
1399 }
1400
1401 static int bnxt_get_regs_len(struct net_device *dev)
1402 {
1403         struct bnxt *bp = netdev_priv(dev);
1404         int reg_len;
1405
1406         if (!BNXT_PF(bp))
1407                 return -EOPNOTSUPP;
1408
1409         reg_len = BNXT_PXP_REG_LEN;
1410
1411         if (bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED)
1412                 reg_len += sizeof(struct pcie_ctx_hw_stats);
1413
1414         return reg_len;
1415 }
1416
1417 static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1418                           void *_p)
1419 {
1420         struct pcie_ctx_hw_stats *hw_pcie_stats;
1421         struct hwrm_pcie_qstats_input *req;
1422         struct bnxt *bp = netdev_priv(dev);
1423         dma_addr_t hw_pcie_stats_addr;
1424         int rc;
1425
1426         regs->version = 0;
1427         bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);
1428
1429         if (!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
1430                 return;
1431
1432         if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS))
1433                 return;
1434
1435         hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats),
1436                                            &hw_pcie_stats_addr);
1437         if (!hw_pcie_stats) {
1438                 hwrm_req_drop(bp, req);
1439                 return;
1440         }
1441
1442         regs->version = 1;
1443         hwrm_req_hold(bp, req); /* hold on to slice */
1444         req->pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));
1445         req->pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);
1446         rc = hwrm_req_send(bp, req);
1447         if (!rc) {
1448                 __le64 *src = (__le64 *)hw_pcie_stats;
1449                 u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);
1450                 int i;
1451
1452                 for (i = 0; i < sizeof(*hw_pcie_stats) / sizeof(__le64); i++)
1453                         dst[i] = le64_to_cpu(src[i]);
1454         }
1455         hwrm_req_drop(bp, req);
1456 }
1457
1458 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1459 {
1460         struct bnxt *bp = netdev_priv(dev);
1461
1462         wol->supported = 0;
1463         wol->wolopts = 0;
1464         memset(&wol->sopass, 0, sizeof(wol->sopass));
1465         if (bp->flags & BNXT_FLAG_WOL_CAP) {
1466                 wol->supported = WAKE_MAGIC;
1467                 if (bp->wol)
1468                         wol->wolopts = WAKE_MAGIC;
1469         }
1470 }
1471
1472 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1473 {
1474         struct bnxt *bp = netdev_priv(dev);
1475
1476         if (wol->wolopts & ~WAKE_MAGIC)
1477                 return -EINVAL;
1478
1479         if (wol->wolopts & WAKE_MAGIC) {
1480                 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1481                         return -EINVAL;
1482                 if (!bp->wol) {
1483                         if (bnxt_hwrm_alloc_wol_fltr(bp))
1484                                 return -EBUSY;
1485                         bp->wol = 1;
1486                 }
1487         } else {
1488                 if (bp->wol) {
1489                         if (bnxt_hwrm_free_wol_fltr(bp))
1490                                 return -EBUSY;
1491                         bp->wol = 0;
1492                 }
1493         }
1494         return 0;
1495 }
1496
1497 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1498 {
1499         u32 speed_mask = 0;
1500
1501         /* TODO: support 25GB, 40GB, 50GB with different cable type */
1502         /* set the advertised speeds */
1503         if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1504                 speed_mask |= ADVERTISED_100baseT_Full;
1505         if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1506                 speed_mask |= ADVERTISED_1000baseT_Full;
1507         if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1508                 speed_mask |= ADVERTISED_2500baseX_Full;
1509         if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1510                 speed_mask |= ADVERTISED_10000baseT_Full;
1511         if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1512                 speed_mask |= ADVERTISED_40000baseCR4_Full;
1513
1514         if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1515                 speed_mask |= ADVERTISED_Pause;
1516         else if (fw_pause & BNXT_LINK_PAUSE_TX)
1517                 speed_mask |= ADVERTISED_Asym_Pause;
1518         else if (fw_pause & BNXT_LINK_PAUSE_RX)
1519                 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1520
1521         return speed_mask;
1522 }
1523
1524 enum bnxt_media_type {
1525         BNXT_MEDIA_UNKNOWN = 0,
1526         BNXT_MEDIA_TP,
1527         BNXT_MEDIA_CR,
1528         BNXT_MEDIA_SR,
1529         BNXT_MEDIA_LR_ER_FR,
1530         BNXT_MEDIA_KR,
1531         BNXT_MEDIA_KX,
1532         BNXT_MEDIA_X,
1533         __BNXT_MEDIA_END,
1534 };
1535
1536 static const enum bnxt_media_type bnxt_phy_types[] = {
1537         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASECR] = BNXT_MEDIA_CR,
1538         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR4] =  BNXT_MEDIA_KR,
1539         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASELR] = BNXT_MEDIA_LR_ER_FR,
1540         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASESR] = BNXT_MEDIA_SR,
1541         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR2] = BNXT_MEDIA_KR,
1542         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKX] = BNXT_MEDIA_KX,
1543         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR] = BNXT_MEDIA_KR,
1544         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASET] = BNXT_MEDIA_TP,
1545         [PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE] = BNXT_MEDIA_TP,
1546         [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_L] = BNXT_MEDIA_CR,
1547         [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_S] = BNXT_MEDIA_CR,
1548         [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_N] = BNXT_MEDIA_CR,
1549         [PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASESR] = BNXT_MEDIA_SR,
1550         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR4] = BNXT_MEDIA_CR,
1551         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR4] = BNXT_MEDIA_SR,
1552         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
1553         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
1554         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR10] = BNXT_MEDIA_SR,
1555         [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASECR4] = BNXT_MEDIA_CR,
1556         [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASESR4] = BNXT_MEDIA_SR,
1557         [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
1558         [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
1559         [PORT_PHY_QCFG_RESP_PHY_TYPE_40G_ACTIVE_CABLE] = BNXT_MEDIA_SR,
1560         [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASET] = BNXT_MEDIA_TP,
1561         [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASESX] = BNXT_MEDIA_X,
1562         [PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASECX] = BNXT_MEDIA_X,
1563         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR4] = BNXT_MEDIA_CR,
1564         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4] = BNXT_MEDIA_SR,
1565         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
1566         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
1567         [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR] = BNXT_MEDIA_CR,
1568         [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR] = BNXT_MEDIA_SR,
1569         [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR] = BNXT_MEDIA_LR_ER_FR,
1570         [PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER] = BNXT_MEDIA_LR_ER_FR,
1571         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2] = BNXT_MEDIA_CR,
1572         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2] = BNXT_MEDIA_SR,
1573         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2] = BNXT_MEDIA_LR_ER_FR,
1574         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2] = BNXT_MEDIA_LR_ER_FR,
1575         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR] = BNXT_MEDIA_CR,
1576         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR] = BNXT_MEDIA_SR,
1577         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR] = BNXT_MEDIA_LR_ER_FR,
1578         [PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER] = BNXT_MEDIA_LR_ER_FR,
1579         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR2] = BNXT_MEDIA_CR,
1580         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR2] = BNXT_MEDIA_SR,
1581         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR2] = BNXT_MEDIA_LR_ER_FR,
1582         [PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER2] = BNXT_MEDIA_LR_ER_FR,
1583         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR8] = BNXT_MEDIA_CR,
1584         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR8] = BNXT_MEDIA_SR,
1585         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR8] = BNXT_MEDIA_LR_ER_FR,
1586         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER8] = BNXT_MEDIA_LR_ER_FR,
1587         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR4] = BNXT_MEDIA_CR,
1588         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR4] = BNXT_MEDIA_SR,
1589         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR4] = BNXT_MEDIA_LR_ER_FR,
1590         [PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER4] = BNXT_MEDIA_LR_ER_FR,
1591 };
1592
1593 static enum bnxt_media_type
1594 bnxt_get_media(struct bnxt_link_info *link_info)
1595 {
1596         switch (link_info->media_type) {
1597         case PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP:
1598                 return BNXT_MEDIA_TP;
1599         case PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC:
1600                 return BNXT_MEDIA_CR;
1601         default:
1602                 if (link_info->phy_type < ARRAY_SIZE(bnxt_phy_types))
1603                         return bnxt_phy_types[link_info->phy_type];
1604                 return BNXT_MEDIA_UNKNOWN;
1605         }
1606 }
1607
1608 enum bnxt_link_speed_indices {
1609         BNXT_LINK_SPEED_UNKNOWN = 0,
1610         BNXT_LINK_SPEED_100MB_IDX,
1611         BNXT_LINK_SPEED_1GB_IDX,
1612         BNXT_LINK_SPEED_10GB_IDX,
1613         BNXT_LINK_SPEED_25GB_IDX,
1614         BNXT_LINK_SPEED_40GB_IDX,
1615         BNXT_LINK_SPEED_50GB_IDX,
1616         BNXT_LINK_SPEED_100GB_IDX,
1617         BNXT_LINK_SPEED_200GB_IDX,
1618         BNXT_LINK_SPEED_400GB_IDX,
1619         __BNXT_LINK_SPEED_END
1620 };
1621
1622 static enum bnxt_link_speed_indices bnxt_fw_speed_idx(u16 speed)
1623 {
1624         switch (speed) {
1625         case BNXT_LINK_SPEED_100MB: return BNXT_LINK_SPEED_100MB_IDX;
1626         case BNXT_LINK_SPEED_1GB: return BNXT_LINK_SPEED_1GB_IDX;
1627         case BNXT_LINK_SPEED_10GB: return BNXT_LINK_SPEED_10GB_IDX;
1628         case BNXT_LINK_SPEED_25GB: return BNXT_LINK_SPEED_25GB_IDX;
1629         case BNXT_LINK_SPEED_40GB: return BNXT_LINK_SPEED_40GB_IDX;
1630         case BNXT_LINK_SPEED_50GB:
1631         case BNXT_LINK_SPEED_50GB_PAM4:
1632                 return BNXT_LINK_SPEED_50GB_IDX;
1633         case BNXT_LINK_SPEED_100GB:
1634         case BNXT_LINK_SPEED_100GB_PAM4:
1635         case BNXT_LINK_SPEED_100GB_PAM4_112:
1636                 return BNXT_LINK_SPEED_100GB_IDX;
1637         case BNXT_LINK_SPEED_200GB:
1638         case BNXT_LINK_SPEED_200GB_PAM4:
1639         case BNXT_LINK_SPEED_200GB_PAM4_112:
1640                 return BNXT_LINK_SPEED_200GB_IDX;
1641         case BNXT_LINK_SPEED_400GB:
1642         case BNXT_LINK_SPEED_400GB_PAM4:
1643         case BNXT_LINK_SPEED_400GB_PAM4_112:
1644                 return BNXT_LINK_SPEED_400GB_IDX;
1645         default: return BNXT_LINK_SPEED_UNKNOWN;
1646         }
1647 }
1648
1649 static const enum ethtool_link_mode_bit_indices
1650 bnxt_link_modes[__BNXT_LINK_SPEED_END][BNXT_SIG_MODE_MAX][__BNXT_MEDIA_END] = {
1651         [BNXT_LINK_SPEED_100MB_IDX] = {
1652                 {
1653                         [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1654                 },
1655         },
1656         [BNXT_LINK_SPEED_1GB_IDX] = {
1657                 {
1658                         [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1659                         /* historically baseT, but DAC is more correctly baseX */
1660                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
1661                         [BNXT_MEDIA_KX] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1662                         [BNXT_MEDIA_X] = ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
1663                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1664                 },
1665         },
1666         [BNXT_LINK_SPEED_10GB_IDX] = {
1667                 {
1668                         [BNXT_MEDIA_TP] = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1669                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
1670                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
1671                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
1672                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1673                         [BNXT_MEDIA_KX] = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1674                 },
1675         },
1676         [BNXT_LINK_SPEED_25GB_IDX] = {
1677                 {
1678                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1679                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1680                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1681                 },
1682         },
1683         [BNXT_LINK_SPEED_40GB_IDX] = {
1684                 {
1685                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1686                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1687                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1688                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1689                 },
1690         },
1691         [BNXT_LINK_SPEED_50GB_IDX] = {
1692                 [BNXT_SIG_MODE_NRZ] = {
1693                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1694                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1695                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1696                 },
1697                 [BNXT_SIG_MODE_PAM4] = {
1698                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
1699                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
1700                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
1701                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
1702                 },
1703         },
1704         [BNXT_LINK_SPEED_100GB_IDX] = {
1705                 [BNXT_SIG_MODE_NRZ] = {
1706                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1707                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1708                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1709                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1710                 },
1711                 [BNXT_SIG_MODE_PAM4] = {
1712                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
1713                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
1714                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
1715                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
1716                 },
1717                 [BNXT_SIG_MODE_PAM4_112] = {
1718                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_100000baseCR_Full_BIT,
1719                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
1720                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
1721                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
1722                 },
1723         },
1724         [BNXT_LINK_SPEED_200GB_IDX] = {
1725                 [BNXT_SIG_MODE_PAM4] = {
1726                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT,
1727                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
1728                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
1729                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
1730                 },
1731                 [BNXT_SIG_MODE_PAM4_112] = {
1732                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT,
1733                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
1734                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
1735                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
1736                 },
1737         },
1738         [BNXT_LINK_SPEED_400GB_IDX] = {
1739                 [BNXT_SIG_MODE_PAM4] = {
1740                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT,
1741                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT,
1742                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT,
1743                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
1744                 },
1745                 [BNXT_SIG_MODE_PAM4_112] = {
1746                         [BNXT_MEDIA_CR] = ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT,
1747                         [BNXT_MEDIA_KR] = ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
1748                         [BNXT_MEDIA_SR] = ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
1749                         [BNXT_MEDIA_LR_ER_FR] = ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
1750                 },
1751         },
1752 };
1753
1754 #define BNXT_LINK_MODE_UNKNOWN -1
1755
1756 static enum ethtool_link_mode_bit_indices
1757 bnxt_get_link_mode(struct bnxt_link_info *link_info)
1758 {
1759         enum ethtool_link_mode_bit_indices link_mode;
1760         enum bnxt_link_speed_indices speed;
1761         enum bnxt_media_type media;
1762         u8 sig_mode;
1763
1764         if (link_info->phy_link_status != BNXT_LINK_LINK)
1765                 return BNXT_LINK_MODE_UNKNOWN;
1766
1767         media = bnxt_get_media(link_info);
1768         if (BNXT_AUTO_MODE(link_info->auto_mode)) {
1769                 speed = bnxt_fw_speed_idx(link_info->link_speed);
1770                 sig_mode = link_info->active_fec_sig_mode &
1771                         PORT_PHY_QCFG_RESP_SIGNAL_MODE_MASK;
1772         } else {
1773                 speed = bnxt_fw_speed_idx(link_info->req_link_speed);
1774                 sig_mode = link_info->req_signal_mode;
1775         }
1776         if (sig_mode >= BNXT_SIG_MODE_MAX)
1777                 return BNXT_LINK_MODE_UNKNOWN;
1778
1779         /* Note ETHTOOL_LINK_MODE_10baseT_Half_BIT == 0 is a legal Linux
1780          * link mode, but since no such devices exist, the zeroes in the
1781          * map can be conveniently used to represent unknown link modes.
1782          */
1783         link_mode = bnxt_link_modes[speed][sig_mode][media];
1784         if (!link_mode)
1785                 return BNXT_LINK_MODE_UNKNOWN;
1786
1787         switch (link_mode) {
1788         case ETHTOOL_LINK_MODE_100baseT_Full_BIT:
1789                 if (~link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1790                         link_mode = ETHTOOL_LINK_MODE_100baseT_Half_BIT;
1791                 break;
1792         case ETHTOOL_LINK_MODE_1000baseT_Full_BIT:
1793                 if (~link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1794                         link_mode = ETHTOOL_LINK_MODE_1000baseT_Half_BIT;
1795                 break;
1796         default:
1797                 break;
1798         }
1799
1800         return link_mode;
1801 }
1802
1803 static void bnxt_get_ethtool_modes(struct bnxt_link_info *link_info,
1804                                    struct ethtool_link_ksettings *lk_ksettings)
1805 {
1806         struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
1807
1808         if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE)) {
1809                 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
1810                                  lk_ksettings->link_modes.supported);
1811                 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
1812                                  lk_ksettings->link_modes.supported);
1813         }
1814
1815         if (link_info->support_auto_speeds || link_info->support_auto_speeds2 ||
1816             link_info->support_pam4_auto_speeds)
1817                 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1818                                  lk_ksettings->link_modes.supported);
1819
1820         if (~link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1821                 return;
1822
1823         if (link_info->auto_pause_setting & BNXT_LINK_PAUSE_RX)
1824                 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
1825                                  lk_ksettings->link_modes.advertising);
1826         if (hweight8(link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH) == 1)
1827                 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
1828                                  lk_ksettings->link_modes.advertising);
1829         if (link_info->lp_pause & BNXT_LINK_PAUSE_RX)
1830                 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
1831                                  lk_ksettings->link_modes.lp_advertising);
1832         if (hweight8(link_info->lp_pause & BNXT_LINK_PAUSE_BOTH) == 1)
1833                 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
1834                                  lk_ksettings->link_modes.lp_advertising);
1835 }
1836
1837 static const u16 bnxt_nrz_speed_masks[] = {
1838         [BNXT_LINK_SPEED_100MB_IDX] = BNXT_LINK_SPEED_MSK_100MB,
1839         [BNXT_LINK_SPEED_1GB_IDX] = BNXT_LINK_SPEED_MSK_1GB,
1840         [BNXT_LINK_SPEED_10GB_IDX] = BNXT_LINK_SPEED_MSK_10GB,
1841         [BNXT_LINK_SPEED_25GB_IDX] = BNXT_LINK_SPEED_MSK_25GB,
1842         [BNXT_LINK_SPEED_40GB_IDX] = BNXT_LINK_SPEED_MSK_40GB,
1843         [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEED_MSK_50GB,
1844         [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEED_MSK_100GB,
1845         [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */
1846 };
1847
1848 static const u16 bnxt_pam4_speed_masks[] = {
1849         [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_50GB,
1850         [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_100GB,
1851         [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_PAM4_SPEED_MSK_200GB,
1852         [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */
1853 };
1854
1855 static const u16 bnxt_nrz_speeds2_masks[] = {
1856         [BNXT_LINK_SPEED_1GB_IDX] = BNXT_LINK_SPEEDS2_MSK_1GB,
1857         [BNXT_LINK_SPEED_10GB_IDX] = BNXT_LINK_SPEEDS2_MSK_10GB,
1858         [BNXT_LINK_SPEED_25GB_IDX] = BNXT_LINK_SPEEDS2_MSK_25GB,
1859         [BNXT_LINK_SPEED_40GB_IDX] = BNXT_LINK_SPEEDS2_MSK_40GB,
1860         [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEEDS2_MSK_50GB,
1861         [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB,
1862         [__BNXT_LINK_SPEED_END - 1] = 0 /* make any legal speed a valid index */
1863 };
1864
1865 static const u16 bnxt_pam4_speeds2_masks[] = {
1866         [BNXT_LINK_SPEED_50GB_IDX] = BNXT_LINK_SPEEDS2_MSK_50GB_PAM4,
1867         [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB_PAM4,
1868         [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_SPEEDS2_MSK_200GB_PAM4,
1869         [BNXT_LINK_SPEED_400GB_IDX] = BNXT_LINK_SPEEDS2_MSK_400GB_PAM4,
1870 };
1871
1872 static const u16 bnxt_pam4_112_speeds2_masks[] = {
1873         [BNXT_LINK_SPEED_100GB_IDX] = BNXT_LINK_SPEEDS2_MSK_100GB_PAM4_112,
1874         [BNXT_LINK_SPEED_200GB_IDX] = BNXT_LINK_SPEEDS2_MSK_200GB_PAM4_112,
1875         [BNXT_LINK_SPEED_400GB_IDX] = BNXT_LINK_SPEEDS2_MSK_400GB_PAM4_112,
1876 };
1877
1878 static enum bnxt_link_speed_indices
1879 bnxt_encoding_speed_idx(u8 sig_mode, u16 phy_flags, u16 speed_msk)
1880 {
1881         const u16 *speeds;
1882         int idx, len;
1883
1884         switch (sig_mode) {
1885         case BNXT_SIG_MODE_NRZ:
1886                 if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
1887                         speeds = bnxt_nrz_speeds2_masks;
1888                         len = ARRAY_SIZE(bnxt_nrz_speeds2_masks);
1889                 } else {
1890                         speeds = bnxt_nrz_speed_masks;
1891                         len = ARRAY_SIZE(bnxt_nrz_speed_masks);
1892                 }
1893                 break;
1894         case BNXT_SIG_MODE_PAM4:
1895                 if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
1896                         speeds = bnxt_pam4_speeds2_masks;
1897                         len = ARRAY_SIZE(bnxt_pam4_speeds2_masks);
1898                 } else {
1899                         speeds = bnxt_pam4_speed_masks;
1900                         len = ARRAY_SIZE(bnxt_pam4_speed_masks);
1901                 }
1902                 break;
1903         case BNXT_SIG_MODE_PAM4_112:
1904                 speeds = bnxt_pam4_112_speeds2_masks;
1905                 len = ARRAY_SIZE(bnxt_pam4_112_speeds2_masks);
1906                 break;
1907         default:
1908                 return BNXT_LINK_SPEED_UNKNOWN;
1909         }
1910
1911         for (idx = 0; idx < len; idx++) {
1912                 if (speeds[idx] == speed_msk)
1913                         return idx;
1914         }
1915
1916         return BNXT_LINK_SPEED_UNKNOWN;
1917 }
1918
1919 #define BNXT_FW_SPEED_MSK_BITS 16
1920
1921 static void
1922 __bnxt_get_ethtool_speeds(unsigned long fw_mask, enum bnxt_media_type media,
1923                           u8 sig_mode, u16 phy_flags, unsigned long *et_mask)
1924 {
1925         enum ethtool_link_mode_bit_indices link_mode;
1926         enum bnxt_link_speed_indices speed;
1927         u8 bit;
1928
1929         for_each_set_bit(bit, &fw_mask, BNXT_FW_SPEED_MSK_BITS) {
1930                 speed = bnxt_encoding_speed_idx(sig_mode, phy_flags, 1 << bit);
1931                 if (!speed)
1932                         continue;
1933
1934                 link_mode = bnxt_link_modes[speed][sig_mode][media];
1935                 if (!link_mode)
1936                         continue;
1937
1938                 linkmode_set_bit(link_mode, et_mask);
1939         }
1940 }
1941
1942 static void
1943 bnxt_get_ethtool_speeds(unsigned long fw_mask, enum bnxt_media_type media,
1944                         u8 sig_mode, u16 phy_flags, unsigned long *et_mask)
1945 {
1946         if (media) {
1947                 __bnxt_get_ethtool_speeds(fw_mask, media, sig_mode, phy_flags,
1948                                           et_mask);
1949                 return;
1950         }
1951
1952         /* list speeds for all media if unknown */
1953         for (media = 1; media < __BNXT_MEDIA_END; media++)
1954                 __bnxt_get_ethtool_speeds(fw_mask, media, sig_mode, phy_flags,
1955                                           et_mask);
1956 }
1957
1958 static void
1959 bnxt_get_all_ethtool_support_speeds(struct bnxt_link_info *link_info,
1960                                     enum bnxt_media_type media,
1961                                     struct ethtool_link_ksettings *lk_ksettings)
1962 {
1963         struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
1964         u16 sp_nrz, sp_pam4, sp_pam4_112 = 0;
1965         u16 phy_flags = bp->phy_flags;
1966
1967         if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
1968                 sp_nrz = link_info->support_speeds2;
1969                 sp_pam4 = link_info->support_speeds2;
1970                 sp_pam4_112 = link_info->support_speeds2;
1971         } else {
1972                 sp_nrz = link_info->support_speeds;
1973                 sp_pam4 = link_info->support_pam4_speeds;
1974         }
1975         bnxt_get_ethtool_speeds(sp_nrz, media, BNXT_SIG_MODE_NRZ, phy_flags,
1976                                 lk_ksettings->link_modes.supported);
1977         bnxt_get_ethtool_speeds(sp_pam4, media, BNXT_SIG_MODE_PAM4, phy_flags,
1978                                 lk_ksettings->link_modes.supported);
1979         bnxt_get_ethtool_speeds(sp_pam4_112, media, BNXT_SIG_MODE_PAM4_112,
1980                                 phy_flags, lk_ksettings->link_modes.supported);
1981 }
1982
1983 static void
1984 bnxt_get_all_ethtool_adv_speeds(struct bnxt_link_info *link_info,
1985                                 enum bnxt_media_type media,
1986                                 struct ethtool_link_ksettings *lk_ksettings)
1987 {
1988         struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
1989         u16 sp_nrz, sp_pam4, sp_pam4_112 = 0;
1990         u16 phy_flags = bp->phy_flags;
1991
1992         sp_nrz = link_info->advertising;
1993         if (phy_flags & BNXT_PHY_FL_SPEEDS2) {
1994                 sp_pam4 = link_info->advertising;
1995                 sp_pam4_112 = link_info->advertising;
1996         } else {
1997                 sp_pam4 = link_info->advertising_pam4;
1998         }
1999         bnxt_get_ethtool_speeds(sp_nrz, media, BNXT_SIG_MODE_NRZ, phy_flags,
2000                                 lk_ksettings->link_modes.advertising);
2001         bnxt_get_ethtool_speeds(sp_pam4, media, BNXT_SIG_MODE_PAM4, phy_flags,
2002                                 lk_ksettings->link_modes.advertising);
2003         bnxt_get_ethtool_speeds(sp_pam4_112, media, BNXT_SIG_MODE_PAM4_112,
2004                                 phy_flags, lk_ksettings->link_modes.advertising);
2005 }
2006
2007 static void
2008 bnxt_get_all_ethtool_lp_speeds(struct bnxt_link_info *link_info,
2009                                enum bnxt_media_type media,
2010                                struct ethtool_link_ksettings *lk_ksettings)
2011 {
2012         struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2013         u16 phy_flags = bp->phy_flags;
2014
2015         bnxt_get_ethtool_speeds(link_info->lp_auto_link_speeds, media,
2016                                 BNXT_SIG_MODE_NRZ, phy_flags,
2017                                 lk_ksettings->link_modes.lp_advertising);
2018         bnxt_get_ethtool_speeds(link_info->lp_auto_pam4_link_speeds, media,
2019                                 BNXT_SIG_MODE_PAM4, phy_flags,
2020                                 lk_ksettings->link_modes.lp_advertising);
2021 }
2022
2023 static void bnxt_update_speed(u32 *delta, bool installed_media, u16 *speeds,
2024                               u16 speed_msk, const unsigned long *et_mask,
2025                               enum ethtool_link_mode_bit_indices mode)
2026 {
2027         bool mode_desired = linkmode_test_bit(mode, et_mask);
2028
2029         if (!mode)
2030                 return;
2031
2032         /* enabled speeds for installed media should override */
2033         if (installed_media && mode_desired) {
2034                 *speeds |= speed_msk;
2035                 *delta |= speed_msk;
2036                 return;
2037         }
2038
2039         /* many to one mapping, only allow one change per fw_speed bit */
2040         if (!(*delta & speed_msk) && (mode_desired == !(*speeds & speed_msk))) {
2041                 *speeds ^= speed_msk;
2042                 *delta |= speed_msk;
2043         }
2044 }
2045
2046 static void bnxt_set_ethtool_speeds(struct bnxt_link_info *link_info,
2047                                     const unsigned long *et_mask)
2048 {
2049         struct bnxt *bp = container_of(link_info, struct bnxt, link_info);
2050         u16 const *sp_msks, *sp_pam4_msks, *sp_pam4_112_msks;
2051         enum bnxt_media_type media = bnxt_get_media(link_info);
2052         u16 *adv, *adv_pam4, *adv_pam4_112 = NULL;
2053         u32 delta_pam4_112 = 0;
2054         u32 delta_pam4 = 0;
2055         u32 delta_nrz = 0;
2056         int i, m;
2057
2058         adv = &link_info->advertising;
2059         if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {
2060                 adv_pam4 = &link_info->advertising;
2061                 adv_pam4_112 = &link_info->advertising;
2062                 sp_msks = bnxt_nrz_speeds2_masks;
2063                 sp_pam4_msks = bnxt_pam4_speeds2_masks;
2064                 sp_pam4_112_msks = bnxt_pam4_112_speeds2_masks;
2065         } else {
2066                 adv_pam4 = &link_info->advertising_pam4;
2067                 sp_msks = bnxt_nrz_speed_masks;
2068                 sp_pam4_msks = bnxt_pam4_speed_masks;
2069         }
2070         for (i = 1; i < __BNXT_LINK_SPEED_END; i++) {
2071                 /* accept any legal media from user */
2072                 for (m = 1; m < __BNXT_MEDIA_END; m++) {
2073                         bnxt_update_speed(&delta_nrz, m == media,
2074                                           adv, sp_msks[i], et_mask,
2075                                           bnxt_link_modes[i][BNXT_SIG_MODE_NRZ][m]);
2076                         bnxt_update_speed(&delta_pam4, m == media,
2077                                           adv_pam4, sp_pam4_msks[i], et_mask,
2078                                           bnxt_link_modes[i][BNXT_SIG_MODE_PAM4][m]);
2079                         if (!adv_pam4_112)
2080                                 continue;
2081
2082                         bnxt_update_speed(&delta_pam4_112, m == media,
2083                                           adv_pam4_112, sp_pam4_112_msks[i], et_mask,
2084                                           bnxt_link_modes[i][BNXT_SIG_MODE_PAM4_112][m]);
2085                 }
2086         }
2087 }
2088
2089 static void bnxt_fw_to_ethtool_advertised_fec(struct bnxt_link_info *link_info,
2090                                 struct ethtool_link_ksettings *lk_ksettings)
2091 {
2092         u16 fec_cfg = link_info->fec_cfg;
2093
2094         if ((fec_cfg & BNXT_FEC_NONE) || !(fec_cfg & BNXT_FEC_AUTONEG)) {
2095                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
2096                                  lk_ksettings->link_modes.advertising);
2097                 return;
2098         }
2099         if (fec_cfg & BNXT_FEC_ENC_BASE_R)
2100                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
2101                                  lk_ksettings->link_modes.advertising);
2102         if (fec_cfg & BNXT_FEC_ENC_RS)
2103                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
2104                                  lk_ksettings->link_modes.advertising);
2105         if (fec_cfg & BNXT_FEC_ENC_LLRS)
2106                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
2107                                  lk_ksettings->link_modes.advertising);
2108 }
2109
2110 static void bnxt_fw_to_ethtool_support_fec(struct bnxt_link_info *link_info,
2111                                 struct ethtool_link_ksettings *lk_ksettings)
2112 {
2113         u16 fec_cfg = link_info->fec_cfg;
2114
2115         if (fec_cfg & BNXT_FEC_NONE) {
2116                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
2117                                  lk_ksettings->link_modes.supported);
2118                 return;
2119         }
2120         if (fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)
2121                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
2122                                  lk_ksettings->link_modes.supported);
2123         if (fec_cfg & BNXT_FEC_ENC_RS_CAP)
2124                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
2125                                  lk_ksettings->link_modes.supported);
2126         if (fec_cfg & BNXT_FEC_ENC_LLRS_CAP)
2127                 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
2128                                  lk_ksettings->link_modes.supported);
2129 }
2130
2131 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
2132 {
2133         switch (fw_link_speed) {
2134         case BNXT_LINK_SPEED_100MB:
2135                 return SPEED_100;
2136         case BNXT_LINK_SPEED_1GB:
2137                 return SPEED_1000;
2138         case BNXT_LINK_SPEED_2_5GB:
2139                 return SPEED_2500;
2140         case BNXT_LINK_SPEED_10GB:
2141                 return SPEED_10000;
2142         case BNXT_LINK_SPEED_20GB:
2143                 return SPEED_20000;
2144         case BNXT_LINK_SPEED_25GB:
2145                 return SPEED_25000;
2146         case BNXT_LINK_SPEED_40GB:
2147                 return SPEED_40000;
2148         case BNXT_LINK_SPEED_50GB:
2149         case BNXT_LINK_SPEED_50GB_PAM4:
2150                 return SPEED_50000;
2151         case BNXT_LINK_SPEED_100GB:
2152         case BNXT_LINK_SPEED_100GB_PAM4:
2153         case BNXT_LINK_SPEED_100GB_PAM4_112:
2154                 return SPEED_100000;
2155         case BNXT_LINK_SPEED_200GB:
2156         case BNXT_LINK_SPEED_200GB_PAM4:
2157         case BNXT_LINK_SPEED_200GB_PAM4_112:
2158                 return SPEED_200000;
2159         case BNXT_LINK_SPEED_400GB:
2160         case BNXT_LINK_SPEED_400GB_PAM4:
2161         case BNXT_LINK_SPEED_400GB_PAM4_112:
2162                 return SPEED_400000;
2163         default:
2164                 return SPEED_UNKNOWN;
2165         }
2166 }
2167
2168 static void bnxt_get_default_speeds(struct ethtool_link_ksettings *lk_ksettings,
2169                                     struct bnxt_link_info *link_info)
2170 {
2171         struct ethtool_link_settings *base = &lk_ksettings->base;
2172
2173         if (link_info->link_state == BNXT_LINK_STATE_UP) {
2174                 base->speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
2175                 base->duplex = DUPLEX_HALF;
2176                 if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
2177                         base->duplex = DUPLEX_FULL;
2178                 lk_ksettings->lanes = link_info->active_lanes;
2179         } else if (!link_info->autoneg) {
2180                 base->speed = bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
2181                 base->duplex = DUPLEX_HALF;
2182                 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
2183                         base->duplex = DUPLEX_FULL;
2184         }
2185 }
2186
2187 static int bnxt_get_link_ksettings(struct net_device *dev,
2188                                    struct ethtool_link_ksettings *lk_ksettings)
2189 {
2190         struct ethtool_link_settings *base = &lk_ksettings->base;
2191         enum ethtool_link_mode_bit_indices link_mode;
2192         struct bnxt *bp = netdev_priv(dev);
2193         struct bnxt_link_info *link_info;
2194         enum bnxt_media_type media;
2195
2196         ethtool_link_ksettings_zero_link_mode(lk_ksettings, lp_advertising);
2197         ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
2198         ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
2199         base->duplex = DUPLEX_UNKNOWN;
2200         base->speed = SPEED_UNKNOWN;
2201         link_info = &bp->link_info;
2202
2203         mutex_lock(&bp->link_lock);
2204         bnxt_get_ethtool_modes(link_info, lk_ksettings);
2205         media = bnxt_get_media(link_info);
2206         bnxt_get_all_ethtool_support_speeds(link_info, media, lk_ksettings);
2207         bnxt_fw_to_ethtool_support_fec(link_info, lk_ksettings);
2208         link_mode = bnxt_get_link_mode(link_info);
2209         if (link_mode != BNXT_LINK_MODE_UNKNOWN)
2210                 ethtool_params_from_link_mode(lk_ksettings, link_mode);
2211         else
2212                 bnxt_get_default_speeds(lk_ksettings, link_info);
2213
2214         if (link_info->autoneg) {
2215                 bnxt_fw_to_ethtool_advertised_fec(link_info, lk_ksettings);
2216                 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2217                                  lk_ksettings->link_modes.advertising);
2218                 base->autoneg = AUTONEG_ENABLE;
2219                 bnxt_get_all_ethtool_adv_speeds(link_info, media, lk_ksettings);
2220                 if (link_info->phy_link_status == BNXT_LINK_LINK)
2221                         bnxt_get_all_ethtool_lp_speeds(link_info, media,
2222                                                        lk_ksettings);
2223         } else {
2224                 base->autoneg = AUTONEG_DISABLE;
2225         }
2226
2227         base->port = PORT_NONE;
2228         if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
2229                 base->port = PORT_TP;
2230                 linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
2231                                  lk_ksettings->link_modes.supported);
2232                 linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
2233                                  lk_ksettings->link_modes.advertising);
2234         } else {
2235                 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2236                                  lk_ksettings->link_modes.supported);
2237                 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
2238                                  lk_ksettings->link_modes.advertising);
2239
2240                 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
2241                         base->port = PORT_DA;
2242                 else
2243                         base->port = PORT_FIBRE;
2244         }
2245         base->phy_address = link_info->phy_addr;
2246         mutex_unlock(&bp->link_lock);
2247
2248         return 0;
2249 }
2250
2251 static int
2252 bnxt_force_link_speed(struct net_device *dev, u32 ethtool_speed, u32 lanes)
2253 {
2254         struct bnxt *bp = netdev_priv(dev);
2255         struct bnxt_link_info *link_info = &bp->link_info;
2256         u16 support_pam4_spds = link_info->support_pam4_speeds;
2257         u16 support_spds2 = link_info->support_speeds2;
2258         u16 support_spds = link_info->support_speeds;
2259         u8 sig_mode = BNXT_SIG_MODE_NRZ;
2260         u32 lanes_needed = 1;
2261         u16 fw_speed = 0;
2262
2263         switch (ethtool_speed) {
2264         case SPEED_100:
2265                 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
2266                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB;
2267                 break;
2268         case SPEED_1000:
2269                 if ((support_spds & BNXT_LINK_SPEED_MSK_1GB) ||
2270                     (support_spds2 & BNXT_LINK_SPEEDS2_MSK_1GB))
2271                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2272                 break;
2273         case SPEED_2500:
2274                 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
2275                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB;
2276                 break;
2277         case SPEED_10000:
2278                 if ((support_spds & BNXT_LINK_SPEED_MSK_10GB) ||
2279                     (support_spds2 & BNXT_LINK_SPEEDS2_MSK_10GB))
2280                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2281                 break;
2282         case SPEED_20000:
2283                 if (support_spds & BNXT_LINK_SPEED_MSK_20GB) {
2284                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB;
2285                         lanes_needed = 2;
2286                 }
2287                 break;
2288         case SPEED_25000:
2289                 if ((support_spds & BNXT_LINK_SPEED_MSK_25GB) ||
2290                     (support_spds2 & BNXT_LINK_SPEEDS2_MSK_25GB))
2291                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2292                 break;
2293         case SPEED_40000:
2294                 if ((support_spds & BNXT_LINK_SPEED_MSK_40GB) ||
2295                     (support_spds2 & BNXT_LINK_SPEEDS2_MSK_40GB)) {
2296                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2297                         lanes_needed = 4;
2298                 }
2299                 break;
2300         case SPEED_50000:
2301                 if (((support_spds & BNXT_LINK_SPEED_MSK_50GB) ||
2302                      (support_spds2 & BNXT_LINK_SPEEDS2_MSK_50GB)) &&
2303                     lanes != 1) {
2304                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2305                         lanes_needed = 2;
2306                 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_50GB) {
2307                         fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB;
2308                         sig_mode = BNXT_SIG_MODE_PAM4;
2309                 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_50GB_PAM4) {
2310                         fw_speed = BNXT_LINK_SPEED_50GB_PAM4;
2311                         sig_mode = BNXT_SIG_MODE_PAM4;
2312                 }
2313                 break;
2314         case SPEED_100000:
2315                 if (((support_spds & BNXT_LINK_SPEED_MSK_100GB) ||
2316                      (support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB)) &&
2317                     lanes != 2 && lanes != 1) {
2318                         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB;
2319                         lanes_needed = 4;
2320                 } else if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_100GB) {
2321                         fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB;
2322                         sig_mode = BNXT_SIG_MODE_PAM4;
2323                         lanes_needed = 2;
2324                 } else if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB_PAM4) &&
2325                            lanes != 1) {
2326                         fw_speed = BNXT_LINK_SPEED_100GB_PAM4;
2327                         sig_mode = BNXT_SIG_MODE_PAM4;
2328                         lanes_needed = 2;
2329                 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_100GB_PAM4_112) {
2330                         fw_speed = BNXT_LINK_SPEED_100GB_PAM4_112;
2331                         sig_mode = BNXT_SIG_MODE_PAM4_112;
2332                 }
2333                 break;
2334         case SPEED_200000:
2335                 if (support_pam4_spds & BNXT_LINK_PAM4_SPEED_MSK_200GB) {
2336                         fw_speed = PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB;
2337                         sig_mode = BNXT_SIG_MODE_PAM4;
2338                         lanes_needed = 4;
2339                 } else if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_200GB_PAM4) &&
2340                            lanes != 2) {
2341                         fw_speed = BNXT_LINK_SPEED_200GB_PAM4;
2342                         sig_mode = BNXT_SIG_MODE_PAM4;
2343                         lanes_needed = 4;
2344                 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_200GB_PAM4_112) {
2345                         fw_speed = BNXT_LINK_SPEED_200GB_PAM4_112;
2346                         sig_mode = BNXT_SIG_MODE_PAM4_112;
2347                         lanes_needed = 2;
2348                 }
2349                 break;
2350         case SPEED_400000:
2351                 if ((support_spds2 & BNXT_LINK_SPEEDS2_MSK_400GB_PAM4) &&
2352                     lanes != 4) {
2353                         fw_speed = BNXT_LINK_SPEED_400GB_PAM4;
2354                         sig_mode = BNXT_SIG_MODE_PAM4;
2355                         lanes_needed = 8;
2356                 } else if (support_spds2 & BNXT_LINK_SPEEDS2_MSK_400GB_PAM4_112) {
2357                         fw_speed = BNXT_LINK_SPEED_400GB_PAM4_112;
2358                         sig_mode = BNXT_SIG_MODE_PAM4_112;
2359                         lanes_needed = 4;
2360                 }
2361                 break;
2362         }
2363
2364         if (!fw_speed) {
2365                 netdev_err(dev, "unsupported speed!\n");
2366                 return -EINVAL;
2367         }
2368
2369         if (lanes && lanes != lanes_needed) {
2370                 netdev_err(dev, "unsupported number of lanes for speed\n");
2371                 return -EINVAL;
2372         }
2373
2374         if (link_info->req_link_speed == fw_speed &&
2375             link_info->req_signal_mode == sig_mode &&
2376             link_info->autoneg == 0)
2377                 return -EALREADY;
2378
2379         link_info->req_link_speed = fw_speed;
2380         link_info->req_signal_mode = sig_mode;
2381         link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
2382         link_info->autoneg = 0;
2383         link_info->advertising = 0;
2384         link_info->advertising_pam4 = 0;
2385
2386         return 0;
2387 }
2388
2389 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
2390 {
2391         u16 fw_speed_mask = 0;
2392
2393         /* only support autoneg at speed 100, 1000, and 10000 */
2394         if (advertising & (ADVERTISED_100baseT_Full |
2395                            ADVERTISED_100baseT_Half)) {
2396                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
2397         }
2398         if (advertising & (ADVERTISED_1000baseT_Full |
2399                            ADVERTISED_1000baseT_Half)) {
2400                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
2401         }
2402         if (advertising & ADVERTISED_10000baseT_Full)
2403                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
2404
2405         if (advertising & ADVERTISED_40000baseCR4_Full)
2406                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
2407
2408         return fw_speed_mask;
2409 }
2410
2411 static int bnxt_set_link_ksettings(struct net_device *dev,
2412                            const struct ethtool_link_ksettings *lk_ksettings)
2413 {
2414         struct bnxt *bp = netdev_priv(dev);
2415         struct bnxt_link_info *link_info = &bp->link_info;
2416         const struct ethtool_link_settings *base = &lk_ksettings->base;
2417         bool set_pause = false;
2418         u32 speed, lanes = 0;
2419         int rc = 0;
2420
2421         if (!BNXT_PHY_CFG_ABLE(bp))
2422                 return -EOPNOTSUPP;
2423
2424         mutex_lock(&bp->link_lock);
2425         if (base->autoneg == AUTONEG_ENABLE) {
2426                 bnxt_set_ethtool_speeds(link_info,
2427                                         lk_ksettings->link_modes.advertising);
2428                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
2429                 if (!link_info->advertising && !link_info->advertising_pam4) {
2430                         link_info->advertising = link_info->support_auto_speeds;
2431                         link_info->advertising_pam4 =
2432                                 link_info->support_pam4_auto_speeds;
2433                 }
2434                 /* any change to autoneg will cause link change, therefore the
2435                  * driver should put back the original pause setting in autoneg
2436                  */
2437                 if (!(bp->phy_flags & BNXT_PHY_FL_NO_PAUSE))
2438                         set_pause = true;
2439         } else {
2440                 u8 phy_type = link_info->phy_type;
2441
2442                 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
2443                     phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
2444                     link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
2445                         netdev_err(dev, "10GBase-T devices must autoneg\n");
2446                         rc = -EINVAL;
2447                         goto set_setting_exit;
2448                 }
2449                 if (base->duplex == DUPLEX_HALF) {
2450                         netdev_err(dev, "HALF DUPLEX is not supported!\n");
2451                         rc = -EINVAL;
2452                         goto set_setting_exit;
2453                 }
2454                 speed = base->speed;
2455                 lanes = lk_ksettings->lanes;
2456                 rc = bnxt_force_link_speed(dev, speed, lanes);
2457                 if (rc) {
2458                         if (rc == -EALREADY)
2459                                 rc = 0;
2460                         goto set_setting_exit;
2461                 }
2462         }
2463
2464         if (netif_running(dev))
2465                 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
2466
2467 set_setting_exit:
2468         mutex_unlock(&bp->link_lock);
2469         return rc;
2470 }
2471
2472 static int bnxt_get_fecparam(struct net_device *dev,
2473                              struct ethtool_fecparam *fec)
2474 {
2475         struct bnxt *bp = netdev_priv(dev);
2476         struct bnxt_link_info *link_info;
2477         u8 active_fec;
2478         u16 fec_cfg;
2479
2480         link_info = &bp->link_info;
2481         fec_cfg = link_info->fec_cfg;
2482         active_fec = link_info->active_fec_sig_mode &
2483                      PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK;
2484         if (fec_cfg & BNXT_FEC_NONE) {
2485                 fec->fec = ETHTOOL_FEC_NONE;
2486                 fec->active_fec = ETHTOOL_FEC_NONE;
2487                 return 0;
2488         }
2489         if (fec_cfg & BNXT_FEC_AUTONEG)
2490                 fec->fec |= ETHTOOL_FEC_AUTO;
2491         if (fec_cfg & BNXT_FEC_ENC_BASE_R)
2492                 fec->fec |= ETHTOOL_FEC_BASER;
2493         if (fec_cfg & BNXT_FEC_ENC_RS)
2494                 fec->fec |= ETHTOOL_FEC_RS;
2495         if (fec_cfg & BNXT_FEC_ENC_LLRS)
2496                 fec->fec |= ETHTOOL_FEC_LLRS;
2497
2498         switch (active_fec) {
2499         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE:
2500                 fec->active_fec |= ETHTOOL_FEC_BASER;
2501                 break;
2502         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE:
2503         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE:
2504         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE:
2505                 fec->active_fec |= ETHTOOL_FEC_RS;
2506                 break;
2507         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE:
2508         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE:
2509                 fec->active_fec |= ETHTOOL_FEC_LLRS;
2510                 break;
2511         case PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE:
2512                 fec->active_fec |= ETHTOOL_FEC_OFF;
2513                 break;
2514         }
2515         return 0;
2516 }
2517
2518 static void bnxt_get_fec_stats(struct net_device *dev,
2519                                struct ethtool_fec_stats *fec_stats)
2520 {
2521         struct bnxt *bp = netdev_priv(dev);
2522         u64 *rx;
2523
2524         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
2525                 return;
2526
2527         rx = bp->rx_port_stats_ext.sw_stats;
2528         fec_stats->corrected_bits.total =
2529                 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_corrected_bits));
2530
2531         if (bp->fw_rx_stats_ext_size <= BNXT_RX_STATS_EXT_NUM_LEGACY)
2532                 return;
2533
2534         fec_stats->corrected_blocks.total =
2535                 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_corrected_blocks));
2536         fec_stats->uncorrectable_blocks.total =
2537                 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_fec_uncorrectable_blocks));
2538 }
2539
2540 static u32 bnxt_ethtool_forced_fec_to_fw(struct bnxt_link_info *link_info,
2541                                          u32 fec)
2542 {
2543         u32 fw_fec = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE;
2544
2545         if (fec & ETHTOOL_FEC_BASER)
2546                 fw_fec |= BNXT_FEC_BASE_R_ON(link_info);
2547         else if (fec & ETHTOOL_FEC_RS)
2548                 fw_fec |= BNXT_FEC_RS_ON(link_info);
2549         else if (fec & ETHTOOL_FEC_LLRS)
2550                 fw_fec |= BNXT_FEC_LLRS_ON;
2551         return fw_fec;
2552 }
2553
2554 static int bnxt_set_fecparam(struct net_device *dev,
2555                              struct ethtool_fecparam *fecparam)
2556 {
2557         struct hwrm_port_phy_cfg_input *req;
2558         struct bnxt *bp = netdev_priv(dev);
2559         struct bnxt_link_info *link_info;
2560         u32 new_cfg, fec = fecparam->fec;
2561         u16 fec_cfg;
2562         int rc;
2563
2564         link_info = &bp->link_info;
2565         fec_cfg = link_info->fec_cfg;
2566         if (fec_cfg & BNXT_FEC_NONE)
2567                 return -EOPNOTSUPP;
2568
2569         if (fec & ETHTOOL_FEC_OFF) {
2570                 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE |
2571                           BNXT_FEC_ALL_OFF(link_info);
2572                 goto apply_fec;
2573         }
2574         if (((fec & ETHTOOL_FEC_AUTO) && !(fec_cfg & BNXT_FEC_AUTONEG_CAP)) ||
2575             ((fec & ETHTOOL_FEC_RS) && !(fec_cfg & BNXT_FEC_ENC_RS_CAP)) ||
2576             ((fec & ETHTOOL_FEC_LLRS) && !(fec_cfg & BNXT_FEC_ENC_LLRS_CAP)) ||
2577             ((fec & ETHTOOL_FEC_BASER) && !(fec_cfg & BNXT_FEC_ENC_BASE_R_CAP)))
2578                 return -EINVAL;
2579
2580         if (fec & ETHTOOL_FEC_AUTO) {
2581                 if (!link_info->autoneg)
2582                         return -EINVAL;
2583                 new_cfg = PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE;
2584         } else {
2585                 new_cfg = bnxt_ethtool_forced_fec_to_fw(link_info, fec);
2586         }
2587
2588 apply_fec:
2589         rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
2590         if (rc)
2591                 return rc;
2592         req->flags = cpu_to_le32(new_cfg | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2593         rc = hwrm_req_send(bp, req);
2594         /* update current settings */
2595         if (!rc) {
2596                 mutex_lock(&bp->link_lock);
2597                 bnxt_update_link(bp, false);
2598                 mutex_unlock(&bp->link_lock);
2599         }
2600         return rc;
2601 }
2602
2603 static void bnxt_get_pauseparam(struct net_device *dev,
2604                                 struct ethtool_pauseparam *epause)
2605 {
2606         struct bnxt *bp = netdev_priv(dev);
2607         struct bnxt_link_info *link_info = &bp->link_info;
2608
2609         if (BNXT_VF(bp))
2610                 return;
2611         epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
2612         epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
2613         epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
2614 }
2615
2616 static void bnxt_get_pause_stats(struct net_device *dev,
2617                                  struct ethtool_pause_stats *epstat)
2618 {
2619         struct bnxt *bp = netdev_priv(dev);
2620         u64 *rx, *tx;
2621
2622         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
2623                 return;
2624
2625         rx = bp->port_stats.sw_stats;
2626         tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
2627
2628         epstat->rx_pause_frames = BNXT_GET_RX_PORT_STATS64(rx, rx_pause_frames);
2629         epstat->tx_pause_frames = BNXT_GET_TX_PORT_STATS64(tx, tx_pause_frames);
2630 }
2631
2632 static int bnxt_set_pauseparam(struct net_device *dev,
2633                                struct ethtool_pauseparam *epause)
2634 {
2635         int rc = 0;
2636         struct bnxt *bp = netdev_priv(dev);
2637         struct bnxt_link_info *link_info = &bp->link_info;
2638
2639         if (!BNXT_PHY_CFG_ABLE(bp) || (bp->phy_flags & BNXT_PHY_FL_NO_PAUSE))
2640                 return -EOPNOTSUPP;
2641
2642         mutex_lock(&bp->link_lock);
2643         if (epause->autoneg) {
2644                 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2645                         rc = -EINVAL;
2646                         goto pause_exit;
2647                 }
2648
2649                 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
2650                 link_info->req_flow_ctrl = 0;
2651         } else {
2652                 /* when transition from auto pause to force pause,
2653                  * force a link change
2654                  */
2655                 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
2656                         link_info->force_link_chng = true;
2657                 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
2658                 link_info->req_flow_ctrl = 0;
2659         }
2660         if (epause->rx_pause)
2661                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
2662
2663         if (epause->tx_pause)
2664                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
2665
2666         if (netif_running(dev))
2667                 rc = bnxt_hwrm_set_pause(bp);
2668
2669 pause_exit:
2670         mutex_unlock(&bp->link_lock);
2671         return rc;
2672 }
2673
2674 static u32 bnxt_get_link(struct net_device *dev)
2675 {
2676         struct bnxt *bp = netdev_priv(dev);
2677
2678         /* TODO: handle MF, VF, driver close case */
2679         return BNXT_LINK_IS_UP(bp);
2680 }
2681
2682 int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp,
2683                                struct hwrm_nvm_get_dev_info_output *nvm_dev_info)
2684 {
2685         struct hwrm_nvm_get_dev_info_output *resp;
2686         struct hwrm_nvm_get_dev_info_input *req;
2687         int rc;
2688
2689         if (BNXT_VF(bp))
2690                 return -EOPNOTSUPP;
2691
2692         rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DEV_INFO);
2693         if (rc)
2694                 return rc;
2695
2696         resp = hwrm_req_hold(bp, req);
2697         rc = hwrm_req_send(bp, req);
2698         if (!rc)
2699                 memcpy(nvm_dev_info, resp, sizeof(*resp));
2700         hwrm_req_drop(bp, req);
2701         return rc;
2702 }
2703
2704 static void bnxt_print_admin_err(struct bnxt *bp)
2705 {
2706         netdev_info(bp->dev, "PF does not have admin privileges to flash or reset the device\n");
2707 }
2708
2709 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2710                          u16 ext, u16 *index, u32 *item_length,
2711                          u32 *data_length);
2712
2713 int bnxt_flash_nvram(struct net_device *dev, u16 dir_type,
2714                      u16 dir_ordinal, u16 dir_ext, u16 dir_attr,
2715                      u32 dir_item_len, const u8 *data,
2716                      size_t data_len)
2717 {
2718         struct bnxt *bp = netdev_priv(dev);
2719         struct hwrm_nvm_write_input *req;
2720         int rc;
2721
2722         rc = hwrm_req_init(bp, req, HWRM_NVM_WRITE);
2723         if (rc)
2724                 return rc;
2725
2726         if (data_len && data) {
2727                 dma_addr_t dma_handle;
2728                 u8 *kmem;
2729
2730                 kmem = hwrm_req_dma_slice(bp, req, data_len, &dma_handle);
2731                 if (!kmem) {
2732                         hwrm_req_drop(bp, req);
2733                         return -ENOMEM;
2734                 }
2735
2736                 req->dir_data_length = cpu_to_le32(data_len);
2737
2738                 memcpy(kmem, data, data_len);
2739                 req->host_src_addr = cpu_to_le64(dma_handle);
2740         }
2741
2742         hwrm_req_timeout(bp, req, bp->hwrm_cmd_max_timeout);
2743         req->dir_type = cpu_to_le16(dir_type);
2744         req->dir_ordinal = cpu_to_le16(dir_ordinal);
2745         req->dir_ext = cpu_to_le16(dir_ext);
2746         req->dir_attr = cpu_to_le16(dir_attr);
2747         req->dir_item_length = cpu_to_le32(dir_item_len);
2748         rc = hwrm_req_send(bp, req);
2749
2750         if (rc == -EACCES)
2751                 bnxt_print_admin_err(bp);
2752         return rc;
2753 }
2754
2755 int bnxt_hwrm_firmware_reset(struct net_device *dev, u8 proc_type,
2756                              u8 self_reset, u8 flags)
2757 {
2758         struct bnxt *bp = netdev_priv(dev);
2759         struct hwrm_fw_reset_input *req;
2760         int rc;
2761
2762         if (!bnxt_hwrm_reset_permitted(bp)) {
2763                 netdev_warn(bp->dev, "Reset denied by firmware, it may be inhibited by remote driver");
2764                 return -EPERM;
2765         }
2766
2767         rc = hwrm_req_init(bp, req, HWRM_FW_RESET);
2768         if (rc)
2769                 return rc;
2770
2771         req->embedded_proc_type = proc_type;
2772         req->selfrst_status = self_reset;
2773         req->flags = flags;
2774
2775         if (proc_type == FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP) {
2776                 rc = hwrm_req_send_silent(bp, req);
2777         } else {
2778                 rc = hwrm_req_send(bp, req);
2779                 if (rc == -EACCES)
2780                         bnxt_print_admin_err(bp);
2781         }
2782         return rc;
2783 }
2784
2785 static int bnxt_firmware_reset(struct net_device *dev,
2786                                enum bnxt_nvm_directory_type dir_type)
2787 {
2788         u8 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE;
2789         u8 proc_type, flags = 0;
2790
2791         /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
2792         /*       (e.g. when firmware isn't already running) */
2793         switch (dir_type) {
2794         case BNX_DIR_TYPE_CHIMP_PATCH:
2795         case BNX_DIR_TYPE_BOOTCODE:
2796         case BNX_DIR_TYPE_BOOTCODE_2:
2797                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
2798                 /* Self-reset ChiMP upon next PCIe reset: */
2799                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
2800                 break;
2801         case BNX_DIR_TYPE_APE_FW:
2802         case BNX_DIR_TYPE_APE_PATCH:
2803                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
2804                 /* Self-reset APE upon next PCIe reset: */
2805                 self_reset = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
2806                 break;
2807         case BNX_DIR_TYPE_KONG_FW:
2808         case BNX_DIR_TYPE_KONG_PATCH:
2809                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
2810                 break;
2811         case BNX_DIR_TYPE_BONO_FW:
2812         case BNX_DIR_TYPE_BONO_PATCH:
2813                 proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
2814                 break;
2815         default:
2816                 return -EINVAL;
2817         }
2818
2819         return bnxt_hwrm_firmware_reset(dev, proc_type, self_reset, flags);
2820 }
2821
2822 static int bnxt_firmware_reset_chip(struct net_device *dev)
2823 {
2824         struct bnxt *bp = netdev_priv(dev);
2825         u8 flags = 0;
2826
2827         if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)
2828                 flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;
2829
2830         return bnxt_hwrm_firmware_reset(dev,
2831                                         FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP,
2832                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP,
2833                                         flags);
2834 }
2835
2836 static int bnxt_firmware_reset_ap(struct net_device *dev)
2837 {
2838         return bnxt_hwrm_firmware_reset(dev, FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP,
2839                                         FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE,
2840                                         0);
2841 }
2842
2843 static int bnxt_flash_firmware(struct net_device *dev,
2844                                u16 dir_type,
2845                                const u8 *fw_data,
2846                                size_t fw_size)
2847 {
2848         int     rc = 0;
2849         u16     code_type;
2850         u32     stored_crc;
2851         u32     calculated_crc;
2852         struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
2853
2854         switch (dir_type) {
2855         case BNX_DIR_TYPE_BOOTCODE:
2856         case BNX_DIR_TYPE_BOOTCODE_2:
2857                 code_type = CODE_BOOT;
2858                 break;
2859         case BNX_DIR_TYPE_CHIMP_PATCH:
2860                 code_type = CODE_CHIMP_PATCH;
2861                 break;
2862         case BNX_DIR_TYPE_APE_FW:
2863                 code_type = CODE_MCTP_PASSTHRU;
2864                 break;
2865         case BNX_DIR_TYPE_APE_PATCH:
2866                 code_type = CODE_APE_PATCH;
2867                 break;
2868         case BNX_DIR_TYPE_KONG_FW:
2869                 code_type = CODE_KONG_FW;
2870                 break;
2871         case BNX_DIR_TYPE_KONG_PATCH:
2872                 code_type = CODE_KONG_PATCH;
2873                 break;
2874         case BNX_DIR_TYPE_BONO_FW:
2875                 code_type = CODE_BONO_FW;
2876                 break;
2877         case BNX_DIR_TYPE_BONO_PATCH:
2878                 code_type = CODE_BONO_PATCH;
2879                 break;
2880         default:
2881                 netdev_err(dev, "Unsupported directory entry type: %u\n",
2882                            dir_type);
2883                 return -EINVAL;
2884         }
2885         if (fw_size < sizeof(struct bnxt_fw_header)) {
2886                 netdev_err(dev, "Invalid firmware file size: %u\n",
2887                            (unsigned int)fw_size);
2888                 return -EINVAL;
2889         }
2890         if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
2891                 netdev_err(dev, "Invalid firmware signature: %08X\n",
2892                            le32_to_cpu(header->signature));
2893                 return -EINVAL;
2894         }
2895         if (header->code_type != code_type) {
2896                 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
2897                            code_type, header->code_type);
2898                 return -EINVAL;
2899         }
2900         if (header->device != DEVICE_CUMULUS_FAMILY) {
2901                 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
2902                            DEVICE_CUMULUS_FAMILY, header->device);
2903                 return -EINVAL;
2904         }
2905         /* Confirm the CRC32 checksum of the file: */
2906         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2907                                              sizeof(stored_crc)));
2908         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2909         if (calculated_crc != stored_crc) {
2910                 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
2911                            (unsigned long)stored_crc,
2912                            (unsigned long)calculated_crc);
2913                 return -EINVAL;
2914         }
2915         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2916                               0, 0, 0, fw_data, fw_size);
2917         if (rc == 0)    /* Firmware update successful */
2918                 rc = bnxt_firmware_reset(dev, dir_type);
2919
2920         return rc;
2921 }
2922
2923 static int bnxt_flash_microcode(struct net_device *dev,
2924                                 u16 dir_type,
2925                                 const u8 *fw_data,
2926                                 size_t fw_size)
2927 {
2928         struct bnxt_ucode_trailer *trailer;
2929         u32 calculated_crc;
2930         u32 stored_crc;
2931         int rc = 0;
2932
2933         if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
2934                 netdev_err(dev, "Invalid microcode file size: %u\n",
2935                            (unsigned int)fw_size);
2936                 return -EINVAL;
2937         }
2938         trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
2939                                                 sizeof(*trailer)));
2940         if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
2941                 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
2942                            le32_to_cpu(trailer->sig));
2943                 return -EINVAL;
2944         }
2945         if (le16_to_cpu(trailer->dir_type) != dir_type) {
2946                 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
2947                            dir_type, le16_to_cpu(trailer->dir_type));
2948                 return -EINVAL;
2949         }
2950         if (le16_to_cpu(trailer->trailer_length) <
2951                 sizeof(struct bnxt_ucode_trailer)) {
2952                 netdev_err(dev, "Invalid microcode trailer length: %d\n",
2953                            le16_to_cpu(trailer->trailer_length));
2954                 return -EINVAL;
2955         }
2956
2957         /* Confirm the CRC32 checksum of the file: */
2958         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
2959                                              sizeof(stored_crc)));
2960         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
2961         if (calculated_crc != stored_crc) {
2962                 netdev_err(dev,
2963                            "CRC32 (%08lX) does not match calculated: %08lX\n",
2964                            (unsigned long)stored_crc,
2965                            (unsigned long)calculated_crc);
2966                 return -EINVAL;
2967         }
2968         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
2969                               0, 0, 0, fw_data, fw_size);
2970
2971         return rc;
2972 }
2973
2974 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
2975 {
2976         switch (dir_type) {
2977         case BNX_DIR_TYPE_CHIMP_PATCH:
2978         case BNX_DIR_TYPE_BOOTCODE:
2979         case BNX_DIR_TYPE_BOOTCODE_2:
2980         case BNX_DIR_TYPE_APE_FW:
2981         case BNX_DIR_TYPE_APE_PATCH:
2982         case BNX_DIR_TYPE_KONG_FW:
2983         case BNX_DIR_TYPE_KONG_PATCH:
2984         case BNX_DIR_TYPE_BONO_FW:
2985         case BNX_DIR_TYPE_BONO_PATCH:
2986                 return true;
2987         }
2988
2989         return false;
2990 }
2991
2992 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
2993 {
2994         switch (dir_type) {
2995         case BNX_DIR_TYPE_AVS:
2996         case BNX_DIR_TYPE_EXP_ROM_MBA:
2997         case BNX_DIR_TYPE_PCIE:
2998         case BNX_DIR_TYPE_TSCF_UCODE:
2999         case BNX_DIR_TYPE_EXT_PHY:
3000         case BNX_DIR_TYPE_CCM:
3001         case BNX_DIR_TYPE_ISCSI_BOOT:
3002         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
3003         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
3004                 return true;
3005         }
3006
3007         return false;
3008 }
3009
3010 static bool bnxt_dir_type_is_executable(u16 dir_type)
3011 {
3012         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
3013                 bnxt_dir_type_is_other_exec_format(dir_type);
3014 }
3015
3016 static int bnxt_flash_firmware_from_file(struct net_device *dev,
3017                                          u16 dir_type,
3018                                          const char *filename)
3019 {
3020         const struct firmware  *fw;
3021         int                     rc;
3022
3023         rc = request_firmware(&fw, filename, &dev->dev);
3024         if (rc != 0) {
3025                 netdev_err(dev, "Error %d requesting firmware file: %s\n",
3026                            rc, filename);
3027                 return rc;
3028         }
3029         if (bnxt_dir_type_is_ape_bin_format(dir_type))
3030                 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
3031         else if (bnxt_dir_type_is_other_exec_format(dir_type))
3032                 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
3033         else
3034                 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
3035                                       0, 0, 0, fw->data, fw->size);
3036         release_firmware(fw);
3037         return rc;
3038 }
3039
3040 #define MSG_INTEGRITY_ERR "PKG install error : Data integrity on NVM"
3041 #define MSG_INVALID_PKG "PKG install error : Invalid package"
3042 #define MSG_AUTHENTICATION_ERR "PKG install error : Authentication error"
3043 #define MSG_INVALID_DEV "PKG install error : Invalid device"
3044 #define MSG_INTERNAL_ERR "PKG install error : Internal error"
3045 #define MSG_NO_PKG_UPDATE_AREA_ERR "PKG update area not created in nvram"
3046 #define MSG_NO_SPACE_ERR "PKG insufficient update area in nvram"
3047 #define MSG_RESIZE_UPDATE_ERR "Resize UPDATE entry error"
3048 #define MSG_ANTI_ROLLBACK_ERR "HWRM_NVM_INSTALL_UPDATE failure due to Anti-rollback detected"
3049 #define MSG_GENERIC_FAILURE_ERR "HWRM_NVM_INSTALL_UPDATE failure"
3050
3051 static int nvm_update_err_to_stderr(struct net_device *dev, u8 result,
3052                                     struct netlink_ext_ack *extack)
3053 {
3054         switch (result) {
3055         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TYPE_PARAMETER:
3056         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_INDEX_PARAMETER:
3057         case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_DATA_ERROR:
3058         case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_CHECKSUM_ERROR:
3059         case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_NOT_FOUND:
3060         case NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_LOCKED:
3061                 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTEGRITY_ERR);
3062                 return -EINVAL;
3063         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PREREQUISITE:
3064         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_FILE_HEADER:
3065         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_SIGNATURE:
3066         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_STREAM:
3067         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_LENGTH:
3068         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_MANIFEST:
3069         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TRAILER:
3070         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_CHECKSUM:
3071         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_ITEM_CHECKSUM:
3072         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DATA_LENGTH:
3073         case NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DIRECTIVE:
3074         case NVM_INSTALL_UPDATE_RESP_RESULT_DUPLICATE_ITEM:
3075         case NVM_INSTALL_UPDATE_RESP_RESULT_ZERO_LENGTH_ITEM:
3076                 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_PKG);
3077                 return -ENOPKG;
3078         case NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_AUTHENTICATION_ERROR:
3079                 BNXT_NVM_ERR_MSG(dev, extack, MSG_AUTHENTICATION_ERR);
3080                 return -EPERM;
3081         case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_CHIP_REV:
3082         case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_DEVICE_ID:
3083         case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_VENDOR:
3084         case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_ID:
3085         case NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_PLATFORM:
3086                 BNXT_NVM_ERR_MSG(dev, extack, MSG_INVALID_DEV);
3087                 return -EOPNOTSUPP;
3088         default:
3089                 BNXT_NVM_ERR_MSG(dev, extack, MSG_INTERNAL_ERR);
3090                 return -EIO;
3091         }
3092 }
3093
3094 #define BNXT_PKG_DMA_SIZE       0x40000
3095 #define BNXT_NVM_MORE_FLAG      (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_MODE))
3096 #define BNXT_NVM_LAST_FLAG      (cpu_to_le16(NVM_MODIFY_REQ_FLAGS_BATCH_LAST))
3097
3098 static int bnxt_resize_update_entry(struct net_device *dev, size_t fw_size,
3099                                     struct netlink_ext_ack *extack)
3100 {
3101         u32 item_len;
3102         int rc;
3103
3104         rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
3105                                   BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, NULL,
3106                                   &item_len, NULL);
3107         if (rc) {
3108                 BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR);
3109                 return rc;
3110         }
3111
3112         if (fw_size > item_len) {
3113                 rc = bnxt_flash_nvram(dev, BNX_DIR_TYPE_UPDATE,
3114                                       BNX_DIR_ORDINAL_FIRST, 0, 1,
3115                                       round_up(fw_size, 4096), NULL, 0);
3116                 if (rc) {
3117                         BNXT_NVM_ERR_MSG(dev, extack, MSG_RESIZE_UPDATE_ERR);
3118                         return rc;
3119                 }
3120         }
3121         return 0;
3122 }
3123
3124 int bnxt_flash_package_from_fw_obj(struct net_device *dev, const struct firmware *fw,
3125                                    u32 install_type, struct netlink_ext_ack *extack)
3126 {
3127         struct hwrm_nvm_install_update_input *install;
3128         struct hwrm_nvm_install_update_output *resp;
3129         struct hwrm_nvm_modify_input *modify;
3130         struct bnxt *bp = netdev_priv(dev);
3131         bool defrag_attempted = false;
3132         dma_addr_t dma_handle;
3133         u8 *kmem = NULL;
3134         u32 modify_len;
3135         u32 item_len;
3136         u8 cmd_err;
3137         u16 index;
3138         int rc;
3139
3140         /* resize before flashing larger image than available space */
3141         rc = bnxt_resize_update_entry(dev, fw->size, extack);
3142         if (rc)
3143                 return rc;
3144
3145         bnxt_hwrm_fw_set_time(bp);
3146
3147         rc = hwrm_req_init(bp, modify, HWRM_NVM_MODIFY);
3148         if (rc)
3149                 return rc;
3150
3151         /* Try allocating a large DMA buffer first.  Older fw will
3152          * cause excessive NVRAM erases when using small blocks.
3153          */
3154         modify_len = roundup_pow_of_two(fw->size);
3155         modify_len = min_t(u32, modify_len, BNXT_PKG_DMA_SIZE);
3156         while (1) {
3157                 kmem = hwrm_req_dma_slice(bp, modify, modify_len, &dma_handle);
3158                 if (!kmem && modify_len > PAGE_SIZE)
3159                         modify_len /= 2;
3160                 else
3161                         break;
3162         }
3163         if (!kmem) {
3164                 hwrm_req_drop(bp, modify);
3165                 return -ENOMEM;
3166         }
3167
3168         rc = hwrm_req_init(bp, install, HWRM_NVM_INSTALL_UPDATE);
3169         if (rc) {
3170                 hwrm_req_drop(bp, modify);
3171                 return rc;
3172         }
3173
3174         hwrm_req_timeout(bp, modify, bp->hwrm_cmd_max_timeout);
3175         hwrm_req_timeout(bp, install, bp->hwrm_cmd_max_timeout);
3176
3177         hwrm_req_hold(bp, modify);
3178         modify->host_src_addr = cpu_to_le64(dma_handle);
3179
3180         resp = hwrm_req_hold(bp, install);
3181         if ((install_type & 0xffff) == 0)
3182                 install_type >>= 16;
3183         install->install_type = cpu_to_le32(install_type);
3184
3185         do {
3186                 u32 copied = 0, len = modify_len;
3187
3188                 rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
3189                                           BNX_DIR_ORDINAL_FIRST,
3190                                           BNX_DIR_EXT_NONE,
3191                                           &index, &item_len, NULL);
3192                 if (rc) {
3193                         BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_PKG_UPDATE_AREA_ERR);
3194                         break;
3195                 }
3196                 if (fw->size > item_len) {
3197                         BNXT_NVM_ERR_MSG(dev, extack, MSG_NO_SPACE_ERR);
3198                         rc = -EFBIG;
3199                         break;
3200                 }
3201
3202                 modify->dir_idx = cpu_to_le16(index);
3203
3204                 if (fw->size > modify_len)
3205                         modify->flags = BNXT_NVM_MORE_FLAG;
3206                 while (copied < fw->size) {
3207                         u32 balance = fw->size - copied;
3208
3209                         if (balance <= modify_len) {
3210                                 len = balance;
3211                                 if (copied)
3212                                         modify->flags |= BNXT_NVM_LAST_FLAG;
3213                         }
3214                         memcpy(kmem, fw->data + copied, len);
3215                         modify->len = cpu_to_le32(len);
3216                         modify->offset = cpu_to_le32(copied);
3217                         rc = hwrm_req_send(bp, modify);
3218                         if (rc)
3219                                 goto pkg_abort;
3220                         copied += len;
3221                 }
3222
3223                 rc = hwrm_req_send_silent(bp, install);
3224                 if (!rc)
3225                         break;
3226
3227                 if (defrag_attempted) {
3228                         /* We have tried to defragment already in the previous
3229                          * iteration. Return with the result for INSTALL_UPDATE
3230                          */
3231                         break;
3232                 }
3233
3234                 cmd_err = ((struct hwrm_err_output *)resp)->cmd_err;
3235
3236                 switch (cmd_err) {
3237                 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_ANTI_ROLLBACK:
3238                         BNXT_NVM_ERR_MSG(dev, extack, MSG_ANTI_ROLLBACK_ERR);
3239                         rc = -EALREADY;
3240                         break;
3241                 case NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR:
3242                         install->flags =
3243                                 cpu_to_le16(NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
3244
3245                         rc = hwrm_req_send_silent(bp, install);
3246                         if (!rc)
3247                                 break;
3248
3249                         cmd_err = ((struct hwrm_err_output *)resp)->cmd_err;
3250
3251                         if (cmd_err == NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE) {
3252                                 /* FW has cleared NVM area, driver will create
3253                                  * UPDATE directory and try the flash again
3254                                  */
3255                                 defrag_attempted = true;
3256                                 install->flags = 0;
3257                                 rc = bnxt_flash_nvram(bp->dev,
3258                                                       BNX_DIR_TYPE_UPDATE,
3259                                                       BNX_DIR_ORDINAL_FIRST,
3260                                                       0, 0, item_len, NULL, 0);
3261                                 if (!rc)
3262                                         break;
3263                         }
3264                         fallthrough;
3265                 default:
3266                         BNXT_NVM_ERR_MSG(dev, extack, MSG_GENERIC_FAILURE_ERR);
3267                 }
3268         } while (defrag_attempted && !rc);
3269
3270 pkg_abort:
3271         hwrm_req_drop(bp, modify);
3272         hwrm_req_drop(bp, install);
3273
3274         if (resp->result) {
3275                 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
3276                            (s8)resp->result, (int)resp->problem_item);
3277                 rc = nvm_update_err_to_stderr(dev, resp->result, extack);
3278         }
3279         if (rc == -EACCES)
3280                 bnxt_print_admin_err(bp);
3281         return rc;
3282 }
3283
3284 static int bnxt_flash_package_from_file(struct net_device *dev, const char *filename,
3285                                         u32 install_type, struct netlink_ext_ack *extack)
3286 {
3287         const struct firmware *fw;
3288         int rc;
3289
3290         rc = request_firmware(&fw, filename, &dev->dev);
3291         if (rc != 0) {
3292                 netdev_err(dev, "PKG error %d requesting file: %s\n",
3293                            rc, filename);
3294                 return rc;
3295         }
3296
3297         rc = bnxt_flash_package_from_fw_obj(dev, fw, install_type, extack);
3298
3299         release_firmware(fw);
3300
3301         return rc;
3302 }
3303
3304 static int bnxt_flash_device(struct net_device *dev,
3305                              struct ethtool_flash *flash)
3306 {
3307         if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
3308                 netdev_err(dev, "flashdev not supported from a virtual function\n");
3309                 return -EINVAL;
3310         }
3311
3312         if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
3313             flash->region > 0xffff)
3314                 return bnxt_flash_package_from_file(dev, flash->data,
3315                                                     flash->region, NULL);
3316
3317         return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
3318 }
3319
3320 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
3321 {
3322         struct hwrm_nvm_get_dir_info_output *output;
3323         struct hwrm_nvm_get_dir_info_input *req;
3324         struct bnxt *bp = netdev_priv(dev);
3325         int rc;
3326
3327         rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_INFO);
3328         if (rc)
3329                 return rc;
3330
3331         output = hwrm_req_hold(bp, req);
3332         rc = hwrm_req_send(bp, req);
3333         if (!rc) {
3334                 *entries = le32_to_cpu(output->entries);
3335                 *length = le32_to_cpu(output->entry_length);
3336         }
3337         hwrm_req_drop(bp, req);
3338         return rc;
3339 }
3340
3341 static int bnxt_get_eeprom_len(struct net_device *dev)
3342 {
3343         struct bnxt *bp = netdev_priv(dev);
3344
3345         if (BNXT_VF(bp))
3346                 return 0;
3347
3348         /* The -1 return value allows the entire 32-bit range of offsets to be
3349          * passed via the ethtool command-line utility.
3350          */
3351         return -1;
3352 }
3353
3354 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
3355 {
3356         struct bnxt *bp = netdev_priv(dev);
3357         int rc;
3358         u32 dir_entries;
3359         u32 entry_length;
3360         u8 *buf;
3361         size_t buflen;
3362         dma_addr_t dma_handle;
3363         struct hwrm_nvm_get_dir_entries_input *req;
3364
3365         rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
3366         if (rc != 0)
3367                 return rc;
3368
3369         if (!dir_entries || !entry_length)
3370                 return -EIO;
3371
3372         /* Insert 2 bytes of directory info (count and size of entries) */
3373         if (len < 2)
3374                 return -EINVAL;
3375
3376         *data++ = dir_entries;
3377         *data++ = entry_length;
3378         len -= 2;
3379         memset(data, 0xff, len);
3380
3381         rc = hwrm_req_init(bp, req, HWRM_NVM_GET_DIR_ENTRIES);
3382         if (rc)
3383                 return rc;
3384
3385         buflen = mul_u32_u32(dir_entries, entry_length);
3386         buf = hwrm_req_dma_slice(bp, req, buflen, &dma_handle);
3387         if (!buf) {
3388                 hwrm_req_drop(bp, req);
3389                 return -ENOMEM;
3390         }
3391         req->host_dest_addr = cpu_to_le64(dma_handle);
3392
3393         hwrm_req_hold(bp, req); /* hold the slice */
3394         rc = hwrm_req_send(bp, req);
3395         if (rc == 0)
3396                 memcpy(data, buf, len > buflen ? buflen : len);
3397         hwrm_req_drop(bp, req);
3398         return rc;
3399 }
3400
3401 int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
3402                         u32 length, u8 *data)
3403 {
3404         struct bnxt *bp = netdev_priv(dev);
3405         int rc;
3406         u8 *buf;
3407         dma_addr_t dma_handle;
3408         struct hwrm_nvm_read_input *req;
3409
3410         if (!length)
3411                 return -EINVAL;
3412
3413         rc = hwrm_req_init(bp, req, HWRM_NVM_READ);
3414         if (rc)
3415                 return rc;
3416
3417         buf = hwrm_req_dma_slice(bp, req, length, &dma_handle);
3418         if (!buf) {
3419                 hwrm_req_drop(bp, req);
3420                 return -ENOMEM;
3421         }
3422
3423         req->host_dest_addr = cpu_to_le64(dma_handle);
3424         req->dir_idx = cpu_to_le16(index);
3425         req->offset = cpu_to_le32(offset);
3426         req->len = cpu_to_le32(length);
3427
3428         hwrm_req_hold(bp, req); /* hold the slice */
3429         rc = hwrm_req_send(bp, req);
3430         if (rc == 0)
3431                 memcpy(data, buf, length);
3432         hwrm_req_drop(bp, req);
3433         return rc;
3434 }
3435
3436 int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
3437                          u16 ext, u16 *index, u32 *item_length,
3438                          u32 *data_length)
3439 {
3440         struct hwrm_nvm_find_dir_entry_output *output;
3441         struct hwrm_nvm_find_dir_entry_input *req;
3442         struct bnxt *bp = netdev_priv(dev);
3443         int rc;
3444
3445         rc = hwrm_req_init(bp, req, HWRM_NVM_FIND_DIR_ENTRY);
3446         if (rc)
3447                 return rc;
3448
3449         req->enables = 0;
3450         req->dir_idx = 0;
3451         req->dir_type = cpu_to_le16(type);
3452         req->dir_ordinal = cpu_to_le16(ordinal);
3453         req->dir_ext = cpu_to_le16(ext);
3454         req->opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
3455         output = hwrm_req_hold(bp, req);
3456         rc = hwrm_req_send_silent(bp, req);
3457         if (rc == 0) {
3458                 if (index)
3459                         *index = le16_to_cpu(output->dir_idx);
3460                 if (item_length)
3461                         *item_length = le32_to_cpu(output->dir_item_length);
3462                 if (data_length)
3463                         *data_length = le32_to_cpu(output->dir_data_length);
3464         }
3465         hwrm_req_drop(bp, req);
3466         return rc;
3467 }
3468
3469 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
3470 {
3471         char    *retval = NULL;
3472         char    *p;
3473         char    *value;
3474         int     field = 0;
3475
3476         if (datalen < 1)
3477                 return NULL;
3478         /* null-terminate the log data (removing last '\n'): */
3479         data[datalen - 1] = 0;
3480         for (p = data; *p != 0; p++) {
3481                 field = 0;
3482                 retval = NULL;
3483                 while (*p != 0 && *p != '\n') {
3484                         value = p;
3485                         while (*p != 0 && *p != '\t' && *p != '\n')
3486                                 p++;
3487                         if (field == desired_field)
3488                                 retval = value;
3489                         if (*p != '\t')
3490                                 break;
3491                         *p = 0;
3492                         field++;
3493                         p++;
3494                 }
3495                 if (*p == 0)
3496                         break;
3497                 *p = 0;
3498         }
3499         return retval;
3500 }
3501
3502 int bnxt_get_pkginfo(struct net_device *dev, char *ver, int size)
3503 {
3504         struct bnxt *bp = netdev_priv(dev);
3505         u16 index = 0;
3506         char *pkgver;
3507         u32 pkglen;
3508         u8 *pkgbuf;
3509         int rc;
3510
3511         rc = bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
3512                                   BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
3513                                   &index, NULL, &pkglen);
3514         if (rc)
3515                 return rc;
3516
3517         pkgbuf = kzalloc(pkglen, GFP_KERNEL);
3518         if (!pkgbuf) {
3519                 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
3520                         pkglen);
3521                 return -ENOMEM;
3522         }
3523
3524         rc = bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf);
3525         if (rc)
3526                 goto err;
3527
3528         pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
3529                                    pkglen);
3530         if (pkgver && *pkgver != 0 && isdigit(*pkgver))
3531                 strscpy(ver, pkgver, size);
3532         else
3533                 rc = -ENOENT;
3534
3535 err:
3536         kfree(pkgbuf);
3537
3538         return rc;
3539 }
3540
3541 static void bnxt_get_pkgver(struct net_device *dev)
3542 {
3543         struct bnxt *bp = netdev_priv(dev);
3544         char buf[FW_VER_STR_LEN];
3545         int len;
3546
3547         if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) {
3548                 len = strlen(bp->fw_ver_str);
3549                 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
3550                          "/pkg %s", buf);
3551         }
3552 }
3553
3554 static int bnxt_get_eeprom(struct net_device *dev,
3555                            struct ethtool_eeprom *eeprom,
3556                            u8 *data)
3557 {
3558         u32 index;
3559         u32 offset;
3560
3561         if (eeprom->offset == 0) /* special offset value to get directory */
3562                 return bnxt_get_nvram_directory(dev, eeprom->len, data);
3563
3564         index = eeprom->offset >> 24;
3565         offset = eeprom->offset & 0xffffff;
3566
3567         if (index == 0) {
3568                 netdev_err(dev, "unsupported index value: %d\n", index);
3569                 return -EINVAL;
3570         }
3571
3572         return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
3573 }
3574
3575 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
3576 {
3577         struct hwrm_nvm_erase_dir_entry_input *req;
3578         struct bnxt *bp = netdev_priv(dev);
3579         int rc;
3580
3581         rc = hwrm_req_init(bp, req, HWRM_NVM_ERASE_DIR_ENTRY);
3582         if (rc)
3583                 return rc;
3584
3585         req->dir_idx = cpu_to_le16(index);
3586         return hwrm_req_send(bp, req);
3587 }
3588
3589 static int bnxt_set_eeprom(struct net_device *dev,
3590                            struct ethtool_eeprom *eeprom,
3591                            u8 *data)
3592 {
3593         struct bnxt *bp = netdev_priv(dev);
3594         u8 index, dir_op;
3595         u16 type, ext, ordinal, attr;
3596
3597         if (!BNXT_PF(bp)) {
3598                 netdev_err(dev, "NVM write not supported from a virtual function\n");
3599                 return -EINVAL;
3600         }
3601
3602         type = eeprom->magic >> 16;
3603
3604         if (type == 0xffff) { /* special value for directory operations */
3605                 index = eeprom->magic & 0xff;
3606                 dir_op = eeprom->magic >> 8;
3607                 if (index == 0)
3608                         return -EINVAL;
3609                 switch (dir_op) {
3610                 case 0x0e: /* erase */
3611                         if (eeprom->offset != ~eeprom->magic)
3612                                 return -EINVAL;
3613                         return bnxt_erase_nvram_directory(dev, index - 1);
3614                 default:
3615                         return -EINVAL;
3616                 }
3617         }
3618
3619         /* Create or re-write an NVM item: */
3620         if (bnxt_dir_type_is_executable(type))
3621                 return -EOPNOTSUPP;
3622         ext = eeprom->magic & 0xffff;
3623         ordinal = eeprom->offset >> 16;
3624         attr = eeprom->offset & 0xffff;
3625
3626         return bnxt_flash_nvram(dev, type, ordinal, ext, attr, 0, data,
3627                                 eeprom->len);
3628 }
3629
3630 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
3631 {
3632         struct bnxt *bp = netdev_priv(dev);
3633         struct ethtool_eee *eee = &bp->eee;
3634         struct bnxt_link_info *link_info = &bp->link_info;
3635         u32 advertising;
3636         int rc = 0;
3637
3638         if (!BNXT_PHY_CFG_ABLE(bp))
3639                 return -EOPNOTSUPP;
3640
3641         if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))
3642                 return -EOPNOTSUPP;
3643
3644         mutex_lock(&bp->link_lock);
3645         advertising = _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
3646         if (!edata->eee_enabled)
3647                 goto eee_ok;
3648
3649         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
3650                 netdev_warn(dev, "EEE requires autoneg\n");
3651                 rc = -EINVAL;
3652                 goto eee_exit;
3653         }
3654         if (edata->tx_lpi_enabled) {
3655                 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
3656                                        edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
3657                         netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
3658                                     bp->lpi_tmr_lo, bp->lpi_tmr_hi);
3659                         rc = -EINVAL;
3660                         goto eee_exit;
3661                 } else if (!bp->lpi_tmr_hi) {
3662                         edata->tx_lpi_timer = eee->tx_lpi_timer;
3663                 }
3664         }
3665         if (!edata->advertised) {
3666                 edata->advertised = advertising & eee->supported;
3667         } else if (edata->advertised & ~advertising) {
3668                 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
3669                             edata->advertised, advertising);
3670                 rc = -EINVAL;
3671                 goto eee_exit;
3672         }
3673
3674         eee->advertised = edata->advertised;
3675         eee->tx_lpi_enabled = edata->tx_lpi_enabled;
3676         eee->tx_lpi_timer = edata->tx_lpi_timer;
3677 eee_ok:
3678         eee->eee_enabled = edata->eee_enabled;
3679
3680         if (netif_running(dev))
3681                 rc = bnxt_hwrm_set_link_setting(bp, false, true);
3682
3683 eee_exit:
3684         mutex_unlock(&bp->link_lock);
3685         return rc;
3686 }
3687
3688 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
3689 {
3690         struct bnxt *bp = netdev_priv(dev);
3691
3692         if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))
3693                 return -EOPNOTSUPP;
3694
3695         *edata = bp->eee;
3696         if (!bp->eee.eee_enabled) {
3697                 /* Preserve tx_lpi_timer so that the last value will be used
3698                  * by default when it is re-enabled.
3699                  */
3700                 edata->advertised = 0;
3701                 edata->tx_lpi_enabled = 0;
3702         }
3703
3704         if (!bp->eee.eee_active)
3705                 edata->lp_advertised = 0;
3706
3707         return 0;
3708 }
3709
3710 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
3711                                             u16 page_number, u8 bank,
3712                                             u16 start_addr, u16 data_length,
3713                                             u8 *buf)
3714 {
3715         struct hwrm_port_phy_i2c_read_output *output;
3716         struct hwrm_port_phy_i2c_read_input *req;
3717         int rc, byte_offset = 0;
3718
3719         rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_READ);
3720         if (rc)
3721                 return rc;
3722
3723         output = hwrm_req_hold(bp, req);
3724         req->i2c_slave_addr = i2c_addr;
3725         req->page_number = cpu_to_le16(page_number);
3726         req->port_id = cpu_to_le16(bp->pf.port_id);
3727         do {
3728                 u16 xfer_size;
3729
3730                 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
3731                 data_length -= xfer_size;
3732                 req->page_offset = cpu_to_le16(start_addr + byte_offset);
3733                 req->data_length = xfer_size;
3734                 req->enables =
3735                         cpu_to_le32((start_addr + byte_offset ?
3736                                      PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET :
3737                                      0) |
3738                                     (bank ?
3739                                      PORT_PHY_I2C_READ_REQ_ENABLES_BANK_NUMBER :
3740                                      0));
3741                 rc = hwrm_req_send(bp, req);
3742                 if (!rc)
3743                         memcpy(buf + byte_offset, output->data, xfer_size);
3744                 byte_offset += xfer_size;
3745         } while (!rc && data_length > 0);
3746         hwrm_req_drop(bp, req);
3747
3748         return rc;
3749 }
3750
3751 static int bnxt_get_module_info(struct net_device *dev,
3752                                 struct ethtool_modinfo *modinfo)
3753 {
3754         u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
3755         struct bnxt *bp = netdev_priv(dev);
3756         int rc;
3757
3758         /* No point in going further if phy status indicates
3759          * module is not inserted or if it is powered down or
3760          * if it is of type 10GBase-T
3761          */
3762         if (bp->link_info.module_status >
3763                 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
3764                 return -EOPNOTSUPP;
3765
3766         /* This feature is not supported in older firmware versions */
3767         if (bp->hwrm_spec_code < 0x10202)
3768                 return -EOPNOTSUPP;
3769
3770         rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0, 0,
3771                                               SFF_DIAG_SUPPORT_OFFSET + 1,
3772                                               data);
3773         if (!rc) {
3774                 u8 module_id = data[0];
3775                 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
3776
3777                 switch (module_id) {
3778                 case SFF_MODULE_ID_SFP:
3779                         modinfo->type = ETH_MODULE_SFF_8472;
3780                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3781                         if (!diag_supported)
3782                                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
3783                         break;
3784                 case SFF_MODULE_ID_QSFP:
3785                 case SFF_MODULE_ID_QSFP_PLUS:
3786                         modinfo->type = ETH_MODULE_SFF_8436;
3787                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
3788                         break;
3789                 case SFF_MODULE_ID_QSFP28:
3790                         modinfo->type = ETH_MODULE_SFF_8636;
3791                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
3792                         break;
3793                 default:
3794                         rc = -EOPNOTSUPP;
3795                         break;
3796                 }
3797         }
3798         return rc;
3799 }
3800
3801 static int bnxt_get_module_eeprom(struct net_device *dev,
3802                                   struct ethtool_eeprom *eeprom,
3803                                   u8 *data)
3804 {
3805         struct bnxt *bp = netdev_priv(dev);
3806         u16  start = eeprom->offset, length = eeprom->len;
3807         int rc = 0;
3808
3809         memset(data, 0, eeprom->len);
3810
3811         /* Read A0 portion of the EEPROM */
3812         if (start < ETH_MODULE_SFF_8436_LEN) {
3813                 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
3814                         length = ETH_MODULE_SFF_8436_LEN - start;
3815                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
3816                                                       start, length, data);
3817                 if (rc)
3818                         return rc;
3819                 start += length;
3820                 data += length;
3821                 length = eeprom->len - length;
3822         }
3823
3824         /* Read A2 portion of the EEPROM */
3825         if (length) {
3826                 start -= ETH_MODULE_SFF_8436_LEN;
3827                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 0,
3828                                                       start, length, data);
3829         }
3830         return rc;
3831 }
3832
3833 static int bnxt_get_module_status(struct bnxt *bp, struct netlink_ext_ack *extack)
3834 {
3835         if (bp->link_info.module_status <=
3836             PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
3837                 return 0;
3838
3839         switch (bp->link_info.module_status) {
3840         case PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN:
3841                 NL_SET_ERR_MSG_MOD(extack, "Transceiver module is powering down");
3842                 break;
3843         case PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTINSERTED:
3844                 NL_SET_ERR_MSG_MOD(extack, "Transceiver module not inserted");
3845                 break;
3846         case PORT_PHY_QCFG_RESP_MODULE_STATUS_CURRENTFAULT:
3847                 NL_SET_ERR_MSG_MOD(extack, "Transceiver module disabled due to current fault");
3848                 break;
3849         default:
3850                 NL_SET_ERR_MSG_MOD(extack, "Unknown error");
3851                 break;
3852         }
3853         return -EINVAL;
3854 }
3855
3856 static int bnxt_get_module_eeprom_by_page(struct net_device *dev,
3857                                           const struct ethtool_module_eeprom *page_data,
3858                                           struct netlink_ext_ack *extack)
3859 {
3860         struct bnxt *bp = netdev_priv(dev);
3861         int rc;
3862
3863         rc = bnxt_get_module_status(bp, extack);
3864         if (rc)
3865                 return rc;
3866
3867         if (bp->hwrm_spec_code < 0x10202) {
3868                 NL_SET_ERR_MSG_MOD(extack, "Firmware version too old");
3869                 return -EINVAL;
3870         }
3871
3872         if (page_data->bank && !(bp->phy_flags & BNXT_PHY_FL_BANK_SEL)) {
3873                 NL_SET_ERR_MSG_MOD(extack, "Firmware not capable for bank selection");
3874                 return -EINVAL;
3875         }
3876
3877         rc = bnxt_read_sfp_module_eeprom_info(bp, page_data->i2c_address << 1,
3878                                               page_data->page, page_data->bank,
3879                                               page_data->offset,
3880                                               page_data->length,
3881                                               page_data->data);
3882         if (rc) {
3883                 NL_SET_ERR_MSG_MOD(extack, "Module`s eeprom read failed");
3884                 return rc;
3885         }
3886         return page_data->length;
3887 }
3888
3889 static int bnxt_nway_reset(struct net_device *dev)
3890 {
3891         int rc = 0;
3892
3893         struct bnxt *bp = netdev_priv(dev);
3894         struct bnxt_link_info *link_info = &bp->link_info;
3895
3896         if (!BNXT_PHY_CFG_ABLE(bp))
3897                 return -EOPNOTSUPP;
3898
3899         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
3900                 return -EINVAL;
3901
3902         if (netif_running(dev))
3903                 rc = bnxt_hwrm_set_link_setting(bp, true, false);
3904
3905         return rc;
3906 }
3907
3908 static int bnxt_set_phys_id(struct net_device *dev,
3909                             enum ethtool_phys_id_state state)
3910 {
3911         struct hwrm_port_led_cfg_input *req;
3912         struct bnxt *bp = netdev_priv(dev);
3913         struct bnxt_pf_info *pf = &bp->pf;
3914         struct bnxt_led_cfg *led_cfg;
3915         u8 led_state;
3916         __le16 duration;
3917         int rc, i;
3918
3919         if (!bp->num_leds || BNXT_VF(bp))
3920                 return -EOPNOTSUPP;
3921
3922         if (state == ETHTOOL_ID_ACTIVE) {
3923                 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
3924                 duration = cpu_to_le16(500);
3925         } else if (state == ETHTOOL_ID_INACTIVE) {
3926                 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
3927                 duration = cpu_to_le16(0);
3928         } else {
3929                 return -EINVAL;
3930         }
3931         rc = hwrm_req_init(bp, req, HWRM_PORT_LED_CFG);
3932         if (rc)
3933                 return rc;
3934
3935         req->port_id = cpu_to_le16(pf->port_id);
3936         req->num_leds = bp->num_leds;
3937         led_cfg = (struct bnxt_led_cfg *)&req->led0_id;
3938         for (i = 0; i < bp->num_leds; i++, led_cfg++) {
3939                 req->enables |= BNXT_LED_DFLT_ENABLES(i);
3940                 led_cfg->led_id = bp->leds[i].led_id;
3941                 led_cfg->led_state = led_state;
3942                 led_cfg->led_blink_on = duration;
3943                 led_cfg->led_blink_off = duration;
3944                 led_cfg->led_group_id = bp->leds[i].led_group_id;
3945         }
3946         return hwrm_req_send(bp, req);
3947 }
3948
3949 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
3950 {
3951         struct hwrm_selftest_irq_input *req;
3952         int rc;
3953
3954         rc = hwrm_req_init(bp, req, HWRM_SELFTEST_IRQ);
3955         if (rc)
3956                 return rc;
3957
3958         req->cmpl_ring = cpu_to_le16(cmpl_ring);
3959         return hwrm_req_send(bp, req);
3960 }
3961
3962 static int bnxt_test_irq(struct bnxt *bp)
3963 {
3964         int i;
3965
3966         for (i = 0; i < bp->cp_nr_rings; i++) {
3967                 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
3968                 int rc;
3969
3970                 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
3971                 if (rc)
3972                         return rc;
3973         }
3974         return 0;
3975 }
3976
3977 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
3978 {
3979         struct hwrm_port_mac_cfg_input *req;
3980         int rc;
3981
3982         rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
3983         if (rc)
3984                 return rc;
3985
3986         req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
3987         if (enable)
3988                 req->lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
3989         else
3990                 req->lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
3991         return hwrm_req_send(bp, req);
3992 }
3993
3994 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
3995 {
3996         struct hwrm_port_phy_qcaps_output *resp;
3997         struct hwrm_port_phy_qcaps_input *req;
3998         int rc;
3999
4000         rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_QCAPS);
4001         if (rc)
4002                 return rc;
4003
4004         resp = hwrm_req_hold(bp, req);
4005         rc = hwrm_req_send(bp, req);
4006         if (!rc)
4007                 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
4008
4009         hwrm_req_drop(bp, req);
4010         return rc;
4011 }
4012
4013 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
4014                                     struct hwrm_port_phy_cfg_input *req)
4015 {
4016         struct bnxt_link_info *link_info = &bp->link_info;
4017         u16 fw_advertising;
4018         u16 fw_speed;
4019         int rc;
4020
4021         if (!link_info->autoneg ||
4022             (bp->phy_flags & BNXT_PHY_FL_AN_PHY_LPBK))
4023                 return 0;
4024
4025         rc = bnxt_query_force_speeds(bp, &fw_advertising);
4026         if (rc)
4027                 return rc;
4028
4029         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
4030         if (BNXT_LINK_IS_UP(bp))
4031                 fw_speed = bp->link_info.link_speed;
4032         else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
4033                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
4034         else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
4035                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
4036         else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
4037                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
4038         else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
4039                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
4040
4041         req->force_link_speed = cpu_to_le16(fw_speed);
4042         req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
4043                                   PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
4044         rc = hwrm_req_send(bp, req);
4045         req->flags = 0;
4046         req->force_link_speed = cpu_to_le16(0);
4047         return rc;
4048 }
4049
4050 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
4051 {
4052         struct hwrm_port_phy_cfg_input *req;
4053         int rc;
4054
4055         rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_CFG);
4056         if (rc)
4057                 return rc;
4058
4059         /* prevent bnxt_disable_an_for_lpbk() from consuming the request */
4060         hwrm_req_hold(bp, req);
4061
4062         if (enable) {
4063                 bnxt_disable_an_for_lpbk(bp, req);
4064                 if (ext)
4065                         req->lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
4066                 else
4067                         req->lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
4068         } else {
4069                 req->lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
4070         }
4071         req->enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
4072         rc = hwrm_req_send(bp, req);
4073         hwrm_req_drop(bp, req);
4074         return rc;
4075 }
4076
4077 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
4078                             u32 raw_cons, int pkt_size)
4079 {
4080         struct bnxt_napi *bnapi = cpr->bnapi;
4081         struct bnxt_rx_ring_info *rxr;
4082         struct bnxt_sw_rx_bd *rx_buf;
4083         struct rx_cmp *rxcmp;
4084         u16 cp_cons, cons;
4085         u8 *data;
4086         u32 len;
4087         int i;
4088
4089         rxr = bnapi->rx_ring;
4090         cp_cons = RING_CMP(raw_cons);
4091         rxcmp = (struct rx_cmp *)
4092                 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
4093         cons = rxcmp->rx_cmp_opaque;
4094         rx_buf = &rxr->rx_buf_ring[cons];
4095         data = rx_buf->data_ptr;
4096         len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
4097         if (len != pkt_size)
4098                 return -EIO;
4099         i = ETH_ALEN;
4100         if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
4101                 return -EIO;
4102         i += ETH_ALEN;
4103         for (  ; i < pkt_size; i++) {
4104                 if (data[i] != (u8)(i & 0xff))
4105                         return -EIO;
4106         }
4107         return 0;
4108 }
4109
4110 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
4111                               int pkt_size)
4112 {
4113         struct tx_cmp *txcmp;
4114         int rc = -EIO;
4115         u32 raw_cons;
4116         u32 cons;
4117         int i;
4118
4119         raw_cons = cpr->cp_raw_cons;
4120         for (i = 0; i < 200; i++) {
4121                 cons = RING_CMP(raw_cons);
4122                 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
4123
4124                 if (!TX_CMP_VALID(txcmp, raw_cons)) {
4125                         udelay(5);
4126                         continue;
4127                 }
4128
4129                 /* The valid test of the entry must be done first before
4130                  * reading any further.
4131                  */
4132                 dma_rmb();
4133                 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP ||
4134                     TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_V3_CMP) {
4135                         rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
4136                         raw_cons = NEXT_RAW_CMP(raw_cons);
4137                         raw_cons = NEXT_RAW_CMP(raw_cons);
4138                         break;
4139                 }
4140                 raw_cons = NEXT_RAW_CMP(raw_cons);
4141         }
4142         cpr->cp_raw_cons = raw_cons;
4143         return rc;
4144 }
4145
4146 static int bnxt_run_loopback(struct bnxt *bp)
4147 {
4148         struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
4149         struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
4150         struct bnxt_cp_ring_info *cpr;
4151         int pkt_size, i = 0;
4152         struct sk_buff *skb;
4153         dma_addr_t map;
4154         u8 *data;
4155         int rc;
4156
4157         cpr = &rxr->bnapi->cp_ring;
4158         if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
4159                 cpr = rxr->rx_cpr;
4160         pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
4161         skb = netdev_alloc_skb(bp->dev, pkt_size);
4162         if (!skb)
4163                 return -ENOMEM;
4164         data = skb_put(skb, pkt_size);
4165         ether_addr_copy(&data[i], bp->dev->dev_addr);
4166         i += ETH_ALEN;
4167         ether_addr_copy(&data[i], bp->dev->dev_addr);
4168         i += ETH_ALEN;
4169         for ( ; i < pkt_size; i++)
4170                 data[i] = (u8)(i & 0xff);
4171
4172         map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
4173                              DMA_TO_DEVICE);
4174         if (dma_mapping_error(&bp->pdev->dev, map)) {
4175                 dev_kfree_skb(skb);
4176                 return -EIO;
4177         }
4178         bnxt_xmit_bd(bp, txr, map, pkt_size, NULL);
4179
4180         /* Sync BD data before updating doorbell */
4181         wmb();
4182
4183         bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
4184         rc = bnxt_poll_loopback(bp, cpr, pkt_size);
4185
4186         dma_unmap_single(&bp->pdev->dev, map, pkt_size, DMA_TO_DEVICE);
4187         dev_kfree_skb(skb);
4188         return rc;
4189 }
4190
4191 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
4192 {
4193         struct hwrm_selftest_exec_output *resp;
4194         struct hwrm_selftest_exec_input *req;
4195         int rc;
4196
4197         rc = hwrm_req_init(bp, req, HWRM_SELFTEST_EXEC);
4198         if (rc)
4199                 return rc;
4200
4201         hwrm_req_timeout(bp, req, bp->test_info->timeout);
4202         req->flags = test_mask;
4203
4204         resp = hwrm_req_hold(bp, req);
4205         rc = hwrm_req_send(bp, req);
4206         *test_results = resp->test_success;
4207         hwrm_req_drop(bp, req);
4208         return rc;
4209 }
4210
4211 #define BNXT_DRV_TESTS                  4
4212 #define BNXT_MACLPBK_TEST_IDX           (bp->num_tests - BNXT_DRV_TESTS)
4213 #define BNXT_PHYLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 1)
4214 #define BNXT_EXTLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 2)
4215 #define BNXT_IRQ_TEST_IDX               (BNXT_MACLPBK_TEST_IDX + 3)
4216
4217 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
4218                            u64 *buf)
4219 {
4220         struct bnxt *bp = netdev_priv(dev);
4221         bool do_ext_lpbk = false;
4222         bool offline = false;
4223         u8 test_results = 0;
4224         u8 test_mask = 0;
4225         int rc = 0, i;
4226
4227         if (!bp->num_tests || !BNXT_PF(bp))
4228                 return;
4229         memset(buf, 0, sizeof(u64) * bp->num_tests);
4230         if (!netif_running(dev)) {
4231                 etest->flags |= ETH_TEST_FL_FAILED;
4232                 return;
4233         }
4234
4235         if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
4236             (bp->phy_flags & BNXT_PHY_FL_EXT_LPBK))
4237                 do_ext_lpbk = true;
4238
4239         if (etest->flags & ETH_TEST_FL_OFFLINE) {
4240                 if (bp->pf.active_vfs || !BNXT_SINGLE_PF(bp)) {
4241                         etest->flags |= ETH_TEST_FL_FAILED;
4242                         netdev_warn(dev, "Offline tests cannot be run with active VFs or on shared PF\n");
4243                         return;
4244                 }
4245                 offline = true;
4246         }
4247
4248         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
4249                 u8 bit_val = 1 << i;
4250
4251                 if (!(bp->test_info->offline_mask & bit_val))
4252                         test_mask |= bit_val;
4253                 else if (offline)
4254                         test_mask |= bit_val;
4255         }
4256         if (!offline) {
4257                 bnxt_run_fw_tests(bp, test_mask, &test_results);
4258         } else {
4259                 bnxt_ulp_stop(bp);
4260                 bnxt_close_nic(bp, true, false);
4261                 bnxt_run_fw_tests(bp, test_mask, &test_results);
4262
4263                 buf[BNXT_MACLPBK_TEST_IDX] = 1;
4264                 bnxt_hwrm_mac_loopback(bp, true);
4265                 msleep(250);
4266                 rc = bnxt_half_open_nic(bp);
4267                 if (rc) {
4268                         bnxt_hwrm_mac_loopback(bp, false);
4269                         etest->flags |= ETH_TEST_FL_FAILED;
4270                         bnxt_ulp_start(bp, rc);
4271                         return;
4272                 }
4273                 if (bnxt_run_loopback(bp))
4274                         etest->flags |= ETH_TEST_FL_FAILED;
4275                 else
4276                         buf[BNXT_MACLPBK_TEST_IDX] = 0;
4277
4278                 bnxt_hwrm_mac_loopback(bp, false);
4279                 bnxt_hwrm_phy_loopback(bp, true, false);
4280                 msleep(1000);
4281                 if (bnxt_run_loopback(bp)) {
4282                         buf[BNXT_PHYLPBK_TEST_IDX] = 1;
4283                         etest->flags |= ETH_TEST_FL_FAILED;
4284                 }
4285                 if (do_ext_lpbk) {
4286                         etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
4287                         bnxt_hwrm_phy_loopback(bp, true, true);
4288                         msleep(1000);
4289                         if (bnxt_run_loopback(bp)) {
4290                                 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
4291                                 etest->flags |= ETH_TEST_FL_FAILED;
4292                         }
4293                 }
4294                 bnxt_hwrm_phy_loopback(bp, false, false);
4295                 bnxt_half_close_nic(bp);
4296                 rc = bnxt_open_nic(bp, true, true);
4297                 bnxt_ulp_start(bp, rc);
4298         }
4299         if (rc || bnxt_test_irq(bp)) {
4300                 buf[BNXT_IRQ_TEST_IDX] = 1;
4301                 etest->flags |= ETH_TEST_FL_FAILED;
4302         }
4303         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
4304                 u8 bit_val = 1 << i;
4305
4306                 if ((test_mask & bit_val) && !(test_results & bit_val)) {
4307                         buf[i] = 1;
4308                         etest->flags |= ETH_TEST_FL_FAILED;
4309                 }
4310         }
4311 }
4312
4313 static int bnxt_reset(struct net_device *dev, u32 *flags)
4314 {
4315         struct bnxt *bp = netdev_priv(dev);
4316         bool reload = false;
4317         u32 req = *flags;
4318
4319         if (!req)
4320                 return -EINVAL;
4321
4322         if (!BNXT_PF(bp)) {
4323                 netdev_err(dev, "Reset is not supported from a VF\n");
4324                 return -EOPNOTSUPP;
4325         }
4326
4327         if (pci_vfs_assigned(bp->pdev) &&
4328             !(bp->fw_cap & BNXT_FW_CAP_HOT_RESET)) {
4329                 netdev_err(dev,
4330                            "Reset not allowed when VFs are assigned to VMs\n");
4331                 return -EBUSY;
4332         }
4333
4334         if ((req & BNXT_FW_RESET_CHIP) == BNXT_FW_RESET_CHIP) {
4335                 /* This feature is not supported in older firmware versions */
4336                 if (bp->hwrm_spec_code >= 0x10803) {
4337                         if (!bnxt_firmware_reset_chip(dev)) {
4338                                 netdev_info(dev, "Firmware reset request successful.\n");
4339                                 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET))
4340                                         reload = true;
4341                                 *flags &= ~BNXT_FW_RESET_CHIP;
4342                         }
4343                 } else if (req == BNXT_FW_RESET_CHIP) {
4344                         return -EOPNOTSUPP; /* only request, fail hard */
4345                 }
4346         }
4347
4348         if (!BNXT_CHIP_P4_PLUS(bp) && (req & BNXT_FW_RESET_AP)) {
4349                 /* This feature is not supported in older firmware versions */
4350                 if (bp->hwrm_spec_code >= 0x10803) {
4351                         if (!bnxt_firmware_reset_ap(dev)) {
4352                                 netdev_info(dev, "Reset application processor successful.\n");
4353                                 reload = true;
4354                                 *flags &= ~BNXT_FW_RESET_AP;
4355                         }
4356                 } else if (req == BNXT_FW_RESET_AP) {
4357                         return -EOPNOTSUPP; /* only request, fail hard */
4358                 }
4359         }
4360
4361         if (reload)
4362                 netdev_info(dev, "Reload driver to complete reset\n");
4363
4364         return 0;
4365 }
4366
4367 static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)
4368 {
4369         struct bnxt *bp = netdev_priv(dev);
4370
4371         if (dump->flag > BNXT_DUMP_CRASH) {
4372                 netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");
4373                 return -EINVAL;
4374         }
4375
4376         if (!IS_ENABLED(CONFIG_TEE_BNXT_FW) && dump->flag == BNXT_DUMP_CRASH) {
4377                 netdev_info(dev, "Cannot collect crash dump as TEE_BNXT_FW config option is not enabled.\n");
4378                 return -EOPNOTSUPP;
4379         }
4380
4381         bp->dump_flag = dump->flag;
4382         return 0;
4383 }
4384
4385 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
4386 {
4387         struct bnxt *bp = netdev_priv(dev);
4388
4389         if (bp->hwrm_spec_code < 0x10801)
4390                 return -EOPNOTSUPP;
4391
4392         dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
4393                         bp->ver_resp.hwrm_fw_min_8b << 16 |
4394                         bp->ver_resp.hwrm_fw_bld_8b << 8 |
4395                         bp->ver_resp.hwrm_fw_rsvd_8b;
4396
4397         dump->flag = bp->dump_flag;
4398         dump->len = bnxt_get_coredump_length(bp, bp->dump_flag);
4399         return 0;
4400 }
4401
4402 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
4403                               void *buf)
4404 {
4405         struct bnxt *bp = netdev_priv(dev);
4406
4407         if (bp->hwrm_spec_code < 0x10801)
4408                 return -EOPNOTSUPP;
4409
4410         memset(buf, 0, dump->len);
4411
4412         dump->flag = bp->dump_flag;
4413         return bnxt_get_coredump(bp, dump->flag, buf, &dump->len);
4414 }
4415
4416 static int bnxt_get_ts_info(struct net_device *dev,
4417                             struct ethtool_ts_info *info)
4418 {
4419         struct bnxt *bp = netdev_priv(dev);
4420         struct bnxt_ptp_cfg *ptp;
4421
4422         ptp = bp->ptp_cfg;
4423         info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
4424                                 SOF_TIMESTAMPING_RX_SOFTWARE |
4425                                 SOF_TIMESTAMPING_SOFTWARE;
4426
4427         info->phc_index = -1;
4428         if (!ptp)
4429                 return 0;
4430
4431         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
4432                                  SOF_TIMESTAMPING_RX_HARDWARE |
4433                                  SOF_TIMESTAMPING_RAW_HARDWARE;
4434         if (ptp->ptp_clock)
4435                 info->phc_index = ptp_clock_index(ptp->ptp_clock);
4436
4437         info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
4438
4439         info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
4440                            (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
4441                            (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
4442
4443         if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS)
4444                 info->rx_filters |= (1 << HWTSTAMP_FILTER_ALL);
4445         return 0;
4446 }
4447
4448 void bnxt_ethtool_init(struct bnxt *bp)
4449 {
4450         struct hwrm_selftest_qlist_output *resp;
4451         struct hwrm_selftest_qlist_input *req;
4452         struct bnxt_test_info *test_info;
4453         struct net_device *dev = bp->dev;
4454         int i, rc;
4455
4456         if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
4457                 bnxt_get_pkgver(dev);
4458
4459         bp->num_tests = 0;
4460         if (bp->hwrm_spec_code < 0x10704 || !BNXT_PF(bp))
4461                 return;
4462
4463         test_info = bp->test_info;
4464         if (!test_info) {
4465                 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
4466                 if (!test_info)
4467                         return;
4468                 bp->test_info = test_info;
4469         }
4470
4471         if (hwrm_req_init(bp, req, HWRM_SELFTEST_QLIST))
4472                 return;
4473
4474         resp = hwrm_req_hold(bp, req);
4475         rc = hwrm_req_send_silent(bp, req);
4476         if (rc)
4477                 goto ethtool_init_exit;
4478
4479         bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
4480         if (bp->num_tests > BNXT_MAX_TEST)
4481                 bp->num_tests = BNXT_MAX_TEST;
4482
4483         test_info->offline_mask = resp->offline_tests;
4484         test_info->timeout = le16_to_cpu(resp->test_timeout);
4485         if (!test_info->timeout)
4486                 test_info->timeout = HWRM_CMD_TIMEOUT;
4487         for (i = 0; i < bp->num_tests; i++) {
4488                 char *str = test_info->string[i];
4489                 char *fw_str = resp->test_name[i];
4490
4491                 if (i == BNXT_MACLPBK_TEST_IDX) {
4492                         strcpy(str, "Mac loopback test (offline)");
4493                 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
4494                         strcpy(str, "Phy loopback test (offline)");
4495                 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
4496                         strcpy(str, "Ext loopback test (offline)");
4497                 } else if (i == BNXT_IRQ_TEST_IDX) {
4498                         strcpy(str, "Interrupt_test (offline)");
4499                 } else {
4500                         snprintf(str, ETH_GSTRING_LEN, "%s test (%s)",
4501                                  fw_str, test_info->offline_mask & (1 << i) ?
4502                                         "offline" : "online");
4503                 }
4504         }
4505
4506 ethtool_init_exit:
4507         hwrm_req_drop(bp, req);
4508 }
4509
4510 static void bnxt_get_eth_phy_stats(struct net_device *dev,
4511                                    struct ethtool_eth_phy_stats *phy_stats)
4512 {
4513         struct bnxt *bp = netdev_priv(dev);
4514         u64 *rx;
4515
4516         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
4517                 return;
4518
4519         rx = bp->rx_port_stats_ext.sw_stats;
4520         phy_stats->SymbolErrorDuringCarrier =
4521                 *(rx + BNXT_RX_STATS_EXT_OFFSET(rx_pcs_symbol_err));
4522 }
4523
4524 static void bnxt_get_eth_mac_stats(struct net_device *dev,
4525                                    struct ethtool_eth_mac_stats *mac_stats)
4526 {
4527         struct bnxt *bp = netdev_priv(dev);
4528         u64 *rx, *tx;
4529
4530         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
4531                 return;
4532
4533         rx = bp->port_stats.sw_stats;
4534         tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
4535
4536         mac_stats->FramesReceivedOK =
4537                 BNXT_GET_RX_PORT_STATS64(rx, rx_good_frames);
4538         mac_stats->FramesTransmittedOK =
4539                 BNXT_GET_TX_PORT_STATS64(tx, tx_good_frames);
4540         mac_stats->FrameCheckSequenceErrors =
4541                 BNXT_GET_RX_PORT_STATS64(rx, rx_fcs_err_frames);
4542         mac_stats->AlignmentErrors =
4543                 BNXT_GET_RX_PORT_STATS64(rx, rx_align_err_frames);
4544         mac_stats->OutOfRangeLengthField =
4545                 BNXT_GET_RX_PORT_STATS64(rx, rx_oor_len_frames);
4546 }
4547
4548 static void bnxt_get_eth_ctrl_stats(struct net_device *dev,
4549                                     struct ethtool_eth_ctrl_stats *ctrl_stats)
4550 {
4551         struct bnxt *bp = netdev_priv(dev);
4552         u64 *rx;
4553
4554         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
4555                 return;
4556
4557         rx = bp->port_stats.sw_stats;
4558         ctrl_stats->MACControlFramesReceived =
4559                 BNXT_GET_RX_PORT_STATS64(rx, rx_ctrl_frames);
4560 }
4561
4562 static const struct ethtool_rmon_hist_range bnxt_rmon_ranges[] = {
4563         {    0,    64 },
4564         {   65,   127 },
4565         {  128,   255 },
4566         {  256,   511 },
4567         {  512,  1023 },
4568         { 1024,  1518 },
4569         { 1519,  2047 },
4570         { 2048,  4095 },
4571         { 4096,  9216 },
4572         { 9217, 16383 },
4573         {}
4574 };
4575
4576 static void bnxt_get_rmon_stats(struct net_device *dev,
4577                                 struct ethtool_rmon_stats *rmon_stats,
4578                                 const struct ethtool_rmon_hist_range **ranges)
4579 {
4580         struct bnxt *bp = netdev_priv(dev);
4581         u64 *rx, *tx;
4582
4583         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS))
4584                 return;
4585
4586         rx = bp->port_stats.sw_stats;
4587         tx = bp->port_stats.sw_stats + BNXT_TX_PORT_STATS_BYTE_OFFSET / 8;
4588
4589         rmon_stats->jabbers =
4590                 BNXT_GET_RX_PORT_STATS64(rx, rx_jbr_frames);
4591         rmon_stats->oversize_pkts =
4592                 BNXT_GET_RX_PORT_STATS64(rx, rx_ovrsz_frames);
4593         rmon_stats->undersize_pkts =
4594                 BNXT_GET_RX_PORT_STATS64(rx, rx_undrsz_frames);
4595
4596         rmon_stats->hist[0] = BNXT_GET_RX_PORT_STATS64(rx, rx_64b_frames);
4597         rmon_stats->hist[1] = BNXT_GET_RX_PORT_STATS64(rx, rx_65b_127b_frames);
4598         rmon_stats->hist[2] = BNXT_GET_RX_PORT_STATS64(rx, rx_128b_255b_frames);
4599         rmon_stats->hist[3] = BNXT_GET_RX_PORT_STATS64(rx, rx_256b_511b_frames);
4600         rmon_stats->hist[4] =
4601                 BNXT_GET_RX_PORT_STATS64(rx, rx_512b_1023b_frames);
4602         rmon_stats->hist[5] =
4603                 BNXT_GET_RX_PORT_STATS64(rx, rx_1024b_1518b_frames);
4604         rmon_stats->hist[6] =
4605                 BNXT_GET_RX_PORT_STATS64(rx, rx_1519b_2047b_frames);
4606         rmon_stats->hist[7] =
4607                 BNXT_GET_RX_PORT_STATS64(rx, rx_2048b_4095b_frames);
4608         rmon_stats->hist[8] =
4609                 BNXT_GET_RX_PORT_STATS64(rx, rx_4096b_9216b_frames);
4610         rmon_stats->hist[9] =
4611                 BNXT_GET_RX_PORT_STATS64(rx, rx_9217b_16383b_frames);
4612
4613         rmon_stats->hist_tx[0] =
4614                 BNXT_GET_TX_PORT_STATS64(tx, tx_64b_frames);
4615         rmon_stats->hist_tx[1] =
4616                 BNXT_GET_TX_PORT_STATS64(tx, tx_65b_127b_frames);
4617         rmon_stats->hist_tx[2] =
4618                 BNXT_GET_TX_PORT_STATS64(tx, tx_128b_255b_frames);
4619         rmon_stats->hist_tx[3] =
4620                 BNXT_GET_TX_PORT_STATS64(tx, tx_256b_511b_frames);
4621         rmon_stats->hist_tx[4] =
4622                 BNXT_GET_TX_PORT_STATS64(tx, tx_512b_1023b_frames);
4623         rmon_stats->hist_tx[5] =
4624                 BNXT_GET_TX_PORT_STATS64(tx, tx_1024b_1518b_frames);
4625         rmon_stats->hist_tx[6] =
4626                 BNXT_GET_TX_PORT_STATS64(tx, tx_1519b_2047b_frames);
4627         rmon_stats->hist_tx[7] =
4628                 BNXT_GET_TX_PORT_STATS64(tx, tx_2048b_4095b_frames);
4629         rmon_stats->hist_tx[8] =
4630                 BNXT_GET_TX_PORT_STATS64(tx, tx_4096b_9216b_frames);
4631         rmon_stats->hist_tx[9] =
4632                 BNXT_GET_TX_PORT_STATS64(tx, tx_9217b_16383b_frames);
4633
4634         *ranges = bnxt_rmon_ranges;
4635 }
4636
4637 static void bnxt_get_link_ext_stats(struct net_device *dev,
4638                                     struct ethtool_link_ext_stats *stats)
4639 {
4640         struct bnxt *bp = netdev_priv(dev);
4641         u64 *rx;
4642
4643         if (BNXT_VF(bp) || !(bp->flags & BNXT_FLAG_PORT_STATS_EXT))
4644                 return;
4645
4646         rx = bp->rx_port_stats_ext.sw_stats;
4647         stats->link_down_events =
4648                 *(rx + BNXT_RX_STATS_EXT_OFFSET(link_down_events));
4649 }
4650
4651 void bnxt_ethtool_free(struct bnxt *bp)
4652 {
4653         kfree(bp->test_info);
4654         bp->test_info = NULL;
4655 }
4656
4657 const struct ethtool_ops bnxt_ethtool_ops = {
4658         .cap_link_lanes_supported       = 1,
4659         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
4660                                      ETHTOOL_COALESCE_MAX_FRAMES |
4661                                      ETHTOOL_COALESCE_USECS_IRQ |
4662                                      ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
4663                                      ETHTOOL_COALESCE_STATS_BLOCK_USECS |
4664                                      ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
4665                                      ETHTOOL_COALESCE_USE_CQE,
4666         .get_link_ksettings     = bnxt_get_link_ksettings,
4667         .set_link_ksettings     = bnxt_set_link_ksettings,
4668         .get_fec_stats          = bnxt_get_fec_stats,
4669         .get_fecparam           = bnxt_get_fecparam,
4670         .set_fecparam           = bnxt_set_fecparam,
4671         .get_pause_stats        = bnxt_get_pause_stats,
4672         .get_pauseparam         = bnxt_get_pauseparam,
4673         .set_pauseparam         = bnxt_set_pauseparam,
4674         .get_drvinfo            = bnxt_get_drvinfo,
4675         .get_regs_len           = bnxt_get_regs_len,
4676         .get_regs               = bnxt_get_regs,
4677         .get_wol                = bnxt_get_wol,
4678         .set_wol                = bnxt_set_wol,
4679         .get_coalesce           = bnxt_get_coalesce,
4680         .set_coalesce           = bnxt_set_coalesce,
4681         .get_msglevel           = bnxt_get_msglevel,
4682         .set_msglevel           = bnxt_set_msglevel,
4683         .get_sset_count         = bnxt_get_sset_count,
4684         .get_strings            = bnxt_get_strings,
4685         .get_ethtool_stats      = bnxt_get_ethtool_stats,
4686         .set_ringparam          = bnxt_set_ringparam,
4687         .get_ringparam          = bnxt_get_ringparam,
4688         .get_channels           = bnxt_get_channels,
4689         .set_channels           = bnxt_set_channels,
4690         .get_rxnfc              = bnxt_get_rxnfc,
4691         .set_rxnfc              = bnxt_set_rxnfc,
4692         .get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
4693         .get_rxfh_key_size      = bnxt_get_rxfh_key_size,
4694         .get_rxfh               = bnxt_get_rxfh,
4695         .set_rxfh               = bnxt_set_rxfh,
4696         .flash_device           = bnxt_flash_device,
4697         .get_eeprom_len         = bnxt_get_eeprom_len,
4698         .get_eeprom             = bnxt_get_eeprom,
4699         .set_eeprom             = bnxt_set_eeprom,
4700         .get_link               = bnxt_get_link,
4701         .get_link_ext_stats     = bnxt_get_link_ext_stats,
4702         .get_eee                = bnxt_get_eee,
4703         .set_eee                = bnxt_set_eee,
4704         .get_module_info        = bnxt_get_module_info,
4705         .get_module_eeprom      = bnxt_get_module_eeprom,
4706         .get_module_eeprom_by_page = bnxt_get_module_eeprom_by_page,
4707         .nway_reset             = bnxt_nway_reset,
4708         .set_phys_id            = bnxt_set_phys_id,
4709         .self_test              = bnxt_self_test,
4710         .get_ts_info            = bnxt_get_ts_info,
4711         .reset                  = bnxt_reset,
4712         .set_dump               = bnxt_set_dump,
4713         .get_dump_flag          = bnxt_get_dump_flag,
4714         .get_dump_data          = bnxt_get_dump_data,
4715         .get_eth_phy_stats      = bnxt_get_eth_phy_stats,
4716         .get_eth_mac_stats      = bnxt_get_eth_mac_stats,
4717         .get_eth_ctrl_stats     = bnxt_get_eth_ctrl_stats,
4718         .get_rmon_stats         = bnxt_get_rmon_stats,
4719 };