1 /* bnx2x_sp.h: Broadcom Everest network driver.
3 * Copyright (c) 2011-2013 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Vladislav Zolotarov
19 #ifndef BNX2X_SP_VERBS
20 #define BNX2X_SP_VERBS
25 /* Bits representing general command's configuration */
29 /* Wait until all pending commands complete */
31 /* Don't send a ramrod, only update a registry */
33 /* Configure HW according to the current object state */
35 /* Execute the next command now */
37 /* Don't add a new command and continue execution of postponed
38 * commands. If not set a new command will be added to the
39 * pending commands list.
42 /* If there is another pending ramrod, wait until it finishes and
43 * re-try to submit this one. This flag can be set only in sleepable
44 * context, and should not be set from the context that completes the
45 * ramrods as deadlock will occur.
56 /* Public slow path states */
58 BNX2X_FILTER_MAC_PENDING,
59 BNX2X_FILTER_VLAN_PENDING,
60 BNX2X_FILTER_VLAN_MAC_PENDING,
61 BNX2X_FILTER_RX_MODE_PENDING,
62 BNX2X_FILTER_RX_MODE_SCHED,
63 BNX2X_FILTER_ISCSI_ETH_START_SCHED,
64 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
65 BNX2X_FILTER_FCOE_ETH_START_SCHED,
66 BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
67 BNX2X_FILTER_MCAST_PENDING,
68 BNX2X_FILTER_MCAST_SCHED,
69 BNX2X_FILTER_RSS_CONF_PENDING,
70 BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
71 BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
74 struct bnx2x_raw_obj {
81 /* Ramrod data buffer params */
83 dma_addr_t rdata_mapping;
85 /* Ramrod state params */
86 int state; /* "ramrod is pending" state bit */
87 unsigned long *pstate; /* pointer to state buffer */
89 bnx2x_obj_type obj_type;
91 int (*wait_comp)(struct bnx2x *bp,
92 struct bnx2x_raw_obj *o);
94 bool (*check_pending)(struct bnx2x_raw_obj *o);
95 void (*clear_pending)(struct bnx2x_raw_obj *o);
96 void (*set_pending)(struct bnx2x_raw_obj *o);
99 /************************* VLAN-MAC commands related parameters ***************/
100 struct bnx2x_mac_ramrod_data {
105 struct bnx2x_vlan_ramrod_data {
109 struct bnx2x_vlan_mac_ramrod_data {
115 union bnx2x_classification_ramrod_data {
116 struct bnx2x_mac_ramrod_data mac;
117 struct bnx2x_vlan_ramrod_data vlan;
118 struct bnx2x_vlan_mac_ramrod_data vlan_mac;
121 /* VLAN_MAC commands */
122 enum bnx2x_vlan_mac_cmd {
128 struct bnx2x_vlan_mac_data {
129 /* Requested command: BNX2X_VLAN_MAC_XX */
130 enum bnx2x_vlan_mac_cmd cmd;
131 /* used to contain the data related vlan_mac_flags bits from
134 unsigned long vlan_mac_flags;
136 /* Needed for MOVE command */
137 struct bnx2x_vlan_mac_obj *target_obj;
139 union bnx2x_classification_ramrod_data u;
142 /*************************** Exe Queue obj ************************************/
143 union bnx2x_exe_queue_cmd_data {
144 struct bnx2x_vlan_mac_data vlan_mac;
151 struct bnx2x_exeq_elem {
152 struct list_head link;
154 /* Length of this element in the exe_chunk. */
157 union bnx2x_exe_queue_cmd_data cmd_data;
160 union bnx2x_qable_obj;
162 union bnx2x_exeq_comp_elem {
163 union event_ring_elem *elem;
166 struct bnx2x_exe_queue_obj;
168 typedef int (*exe_q_validate)(struct bnx2x *bp,
169 union bnx2x_qable_obj *o,
170 struct bnx2x_exeq_elem *elem);
172 typedef int (*exe_q_remove)(struct bnx2x *bp,
173 union bnx2x_qable_obj *o,
174 struct bnx2x_exeq_elem *elem);
176 /* Return positive if entry was optimized, 0 - if not, negative
177 * in case of an error.
179 typedef int (*exe_q_optimize)(struct bnx2x *bp,
180 union bnx2x_qable_obj *o,
181 struct bnx2x_exeq_elem *elem);
182 typedef int (*exe_q_execute)(struct bnx2x *bp,
183 union bnx2x_qable_obj *o,
184 struct list_head *exe_chunk,
185 unsigned long *ramrod_flags);
186 typedef struct bnx2x_exeq_elem *
187 (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
188 struct bnx2x_exeq_elem *elem);
190 struct bnx2x_exe_queue_obj {
191 /* Commands pending for an execution. */
192 struct list_head exe_queue;
194 /* Commands pending for an completion. */
195 struct list_head pending_comp;
199 /* Maximum length of commands' list for one execution */
202 union bnx2x_qable_obj *owner;
204 /****** Virtual functions ******/
206 * Called before commands execution for commands that are really
207 * going to be executed (after 'optimize').
209 * Must run under exe_queue->lock
211 exe_q_validate validate;
214 * Called before removing pending commands, cleaning allocated
215 * resources (e.g., credits from validate)
220 * This will try to cancel the current pending commands list
221 * considering the new command.
223 * Returns the number of optimized commands or a negative error code
225 * Must run under exe_queue->lock
227 exe_q_optimize optimize;
230 * Run the next commands chunk (owner specific).
232 exe_q_execute execute;
235 * Return the exe_queue element containing the specific command
236 * if any. Otherwise return NULL.
240 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
242 * Element in the VLAN_MAC registry list having all currently configured
245 struct bnx2x_vlan_mac_registry_elem {
246 struct list_head link;
248 /* Used to store the cam offset used for the mac/vlan/vlan-mac.
249 * Relevant for 57710 and 57711 only. VLANs and MACs share the
250 * same CAM for these chips.
254 /* Needed for DEL and RESTORE flows */
255 unsigned long vlan_mac_flags;
257 union bnx2x_classification_ramrod_data u;
260 /* Bits representing VLAN_MAC commands specific flags */
266 BNX2X_DONT_CONSUME_CAM_CREDIT,
267 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
269 /* When looking for matching filters, some flags are not interesting */
270 #define BNX2X_VLAN_MAC_CMP_MASK (1 << BNX2X_UC_LIST_MAC | \
271 1 << BNX2X_ETH_MAC | \
272 1 << BNX2X_ISCSI_ETH_MAC | \
273 1 << BNX2X_NETQ_ETH_MAC)
274 #define BNX2X_VLAN_MAC_CMP_FLAGS(flags) \
275 ((flags) & BNX2X_VLAN_MAC_CMP_MASK)
277 struct bnx2x_vlan_mac_ramrod_params {
278 /* Object to run the command from */
279 struct bnx2x_vlan_mac_obj *vlan_mac_obj;
281 /* General command flags: COMP_WAIT, etc. */
282 unsigned long ramrod_flags;
284 /* Command specific configuration request */
285 struct bnx2x_vlan_mac_data user_req;
288 struct bnx2x_vlan_mac_obj {
289 struct bnx2x_raw_obj raw;
291 /* Bookkeeping list: will prevent the addition of already existing
294 struct list_head head;
295 /* Implement a simple reader/writer lock on the head list.
296 * all these fields should only be accessed under the exe_queue lock
298 u8 head_reader; /* Num. of readers accessing head list */
299 bool head_exe_request; /* Pending execution request. */
300 unsigned long saved_ramrod_flags; /* Ramrods of pending execution */
302 /* TODO: Add it's initialization in the init functions */
303 struct bnx2x_exe_queue_obj exe_queue;
305 /* MACs credit pool */
306 struct bnx2x_credit_pool_obj *macs_pool;
308 /* VLANs credit pool */
309 struct bnx2x_credit_pool_obj *vlans_pool;
311 /* RAMROD command to be used */
314 /* copy first n elements onto preallocated buffer
316 * @param n number of elements to get
317 * @param buf buffer preallocated by caller into which elements
318 * will be copied. Note elements are 4-byte aligned
319 * so buffer size must be able to accommodate the
322 * @return number of copied bytes
324 int (*get_n_elements)(struct bnx2x *bp,
325 struct bnx2x_vlan_mac_obj *o, int n, u8 *base,
329 * Checks if ADD-ramrod with the given params may be performed.
331 * @return zero if the element may be added
334 int (*check_add)(struct bnx2x *bp,
335 struct bnx2x_vlan_mac_obj *o,
336 union bnx2x_classification_ramrod_data *data);
339 * Checks if DEL-ramrod with the given params may be performed.
341 * @return true if the element may be deleted
343 struct bnx2x_vlan_mac_registry_elem *
344 (*check_del)(struct bnx2x *bp,
345 struct bnx2x_vlan_mac_obj *o,
346 union bnx2x_classification_ramrod_data *data);
349 * Checks if DEL-ramrod with the given params may be performed.
351 * @return true if the element may be deleted
353 bool (*check_move)(struct bnx2x *bp,
354 struct bnx2x_vlan_mac_obj *src_o,
355 struct bnx2x_vlan_mac_obj *dst_o,
356 union bnx2x_classification_ramrod_data *data);
359 * Update the relevant credit object(s) (consume/return
362 bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
363 bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
364 bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
365 bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
368 * Configures one rule in the ramrod data buffer.
370 void (*set_one_rule)(struct bnx2x *bp,
371 struct bnx2x_vlan_mac_obj *o,
372 struct bnx2x_exeq_elem *elem, int rule_idx,
376 * Delete all configured elements having the given
377 * vlan_mac_flags specification. Assumes no pending for
378 * execution commands. Will schedule all all currently
379 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
380 * specification for deletion and will use the given
381 * ramrod_flags for the last DEL operation.
385 * @param ramrod_flags RAMROD_XX flags
387 * @return 0 if the last operation has completed successfully
388 * and there are no more elements left, positive value
389 * if there are pending for completion commands,
390 * negative value in case of failure.
392 int (*delete_all)(struct bnx2x *bp,
393 struct bnx2x_vlan_mac_obj *o,
394 unsigned long *vlan_mac_flags,
395 unsigned long *ramrod_flags);
398 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
399 * configured elements list.
402 * @param p Command parameters (RAMROD_COMP_WAIT bit in
403 * ramrod_flags is only taken into an account)
404 * @param ppos a pointer to the cookie that should be given back in the
405 * next call to make function handle the next element. If
406 * *ppos is set to NULL it will restart the iterator.
407 * If returned *ppos == NULL this means that the last
408 * element has been handled.
412 int (*restore)(struct bnx2x *bp,
413 struct bnx2x_vlan_mac_ramrod_params *p,
414 struct bnx2x_vlan_mac_registry_elem **ppos);
417 * Should be called on a completion arrival.
421 * @param cqe Completion element we are handling
422 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
423 * pending commands will be executed.
424 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
425 * may also be set if needed.
427 * @return 0 if there are neither pending nor waiting for
428 * completion commands. Positive value if there are
429 * pending for execution or for completion commands.
430 * Negative value in case of an error (including an
433 int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
434 union event_ring_elem *cqe,
435 unsigned long *ramrod_flags);
438 * Wait for completion of all commands. Don't schedule new ones,
439 * just wait. It assumes that the completion code will schedule
442 int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
446 BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
447 BNX2X_LLH_CAM_ETH_LINE,
448 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
451 void bnx2x_set_mac_in_nig(struct bnx2x *bp,
452 bool add, unsigned char *dev_addr, int index);
454 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
456 /* RX_MODE ramrod special flags: set in rx_mode_flags field in
457 * a bnx2x_rx_mode_ramrod_params.
460 BNX2X_RX_MODE_FCOE_ETH,
461 BNX2X_RX_MODE_ISCSI_ETH,
465 BNX2X_ACCEPT_UNICAST,
466 BNX2X_ACCEPT_MULTICAST,
467 BNX2X_ACCEPT_ALL_UNICAST,
468 BNX2X_ACCEPT_ALL_MULTICAST,
469 BNX2X_ACCEPT_BROADCAST,
470 BNX2X_ACCEPT_UNMATCHED,
471 BNX2X_ACCEPT_ANY_VLAN
474 struct bnx2x_rx_mode_ramrod_params {
475 struct bnx2x_rx_mode_obj *rx_mode_obj;
476 unsigned long *pstate;
481 unsigned long ramrod_flags;
482 unsigned long rx_mode_flags;
484 /* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
485 * a tstorm_eth_mac_filter_config (e1x).
488 dma_addr_t rdata_mapping;
490 /* Rx mode settings */
491 unsigned long rx_accept_flags;
493 /* internal switching settings */
494 unsigned long tx_accept_flags;
497 struct bnx2x_rx_mode_obj {
498 int (*config_rx_mode)(struct bnx2x *bp,
499 struct bnx2x_rx_mode_ramrod_params *p);
501 int (*wait_comp)(struct bnx2x *bp,
502 struct bnx2x_rx_mode_ramrod_params *p);
505 /********************** Set multicast group ***********************************/
507 struct bnx2x_mcast_list_elem {
508 struct list_head link;
512 union bnx2x_mcast_config_data {
514 u8 bin; /* used in a RESTORE flow */
517 struct bnx2x_mcast_ramrod_params {
518 struct bnx2x_mcast_obj *mcast_obj;
520 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
521 unsigned long ramrod_flags;
523 struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
525 * - rename it to macs_num.
526 * - Add a new command type for handling pending commands
527 * (remove "zero semantics").
529 * Length of mcast_list. If zero and ADD_CONT command - post
535 enum bnx2x_mcast_cmd {
537 BNX2X_MCAST_CMD_CONT,
539 BNX2X_MCAST_CMD_RESTORE,
542 struct bnx2x_mcast_obj {
543 struct bnx2x_raw_obj raw;
547 #define BNX2X_MCAST_BINS_NUM 256
548 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
549 u64 vec[BNX2X_MCAST_VEC_SZ];
551 /** Number of BINs to clear. Should be updated
552 * immediately when a command arrives in order to
553 * properly create DEL commands.
559 struct list_head macs;
564 /* Pending commands */
565 struct list_head pending_cmds_head;
567 /* A state that is set in raw.pstate, when there are pending commands */
570 /* Maximal number of mcast MACs configured in one command */
573 /* Total number of currently pending MACs to configure: both
574 * in the pending commands list and in the current command.
576 int total_pending_num;
581 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
583 int (*config_mcast)(struct bnx2x *bp,
584 struct bnx2x_mcast_ramrod_params *p,
585 enum bnx2x_mcast_cmd cmd);
588 * Fills the ramrod data during the RESTORE flow.
592 * @param start_idx Registry index to start from
593 * @param rdata_idx Index in the ramrod data to start from
595 * @return -1 if we handled the whole registry or index of the last
596 * handled registry element.
598 int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
599 int start_bin, int *rdata_idx);
601 int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
602 struct bnx2x_mcast_ramrod_params *p,
603 enum bnx2x_mcast_cmd cmd);
605 void (*set_one_rule)(struct bnx2x *bp,
606 struct bnx2x_mcast_obj *o, int idx,
607 union bnx2x_mcast_config_data *cfg_data,
608 enum bnx2x_mcast_cmd cmd);
610 /** Checks if there are more mcast MACs to be set or a previous
611 * command is still pending.
613 bool (*check_pending)(struct bnx2x_mcast_obj *o);
616 * Set/Clear/Check SCHEDULED state of the object
618 void (*set_sched)(struct bnx2x_mcast_obj *o);
619 void (*clear_sched)(struct bnx2x_mcast_obj *o);
620 bool (*check_sched)(struct bnx2x_mcast_obj *o);
622 /* Wait until all pending commands complete */
623 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
626 * Handle the internal object counters needed for proper
627 * commands handling. Checks that the provided parameters are
630 int (*validate)(struct bnx2x *bp,
631 struct bnx2x_mcast_ramrod_params *p,
632 enum bnx2x_mcast_cmd cmd);
635 * Restore the values of internal counters in case of a failure.
637 void (*revert)(struct bnx2x *bp,
638 struct bnx2x_mcast_ramrod_params *p,
641 int (*get_registry_size)(struct bnx2x_mcast_obj *o);
642 void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
645 /*************************** Credit handling **********************************/
646 struct bnx2x_credit_pool_obj {
648 /* Current amount of credit in the pool */
651 /* Maximum allowed credit. put() will check against it. */
654 /* Allocate a pool table statically.
656 * Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272)
658 * The set bit in the table will mean that the entry is available.
660 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
661 u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
663 /* Base pool offset (initialized differently */
664 int base_pool_offset;
667 * Get the next free pool entry.
669 * @return true if there was a free entry in the pool
671 bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
674 * Return the entry back to the pool.
676 * @return true if entry is legal and has been successfully
677 * returned to the pool.
679 bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
682 * Get the requested amount of credit from the pool.
684 * @param cnt Amount of requested credit
685 * @return true if the operation is successful
687 bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
690 * Returns the credit to the pool.
692 * @param cnt Amount of credit to return
693 * @return true if the operation is successful
695 bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
698 * Reads the current amount of credit.
700 int (*check)(struct bnx2x_credit_pool_obj *o);
703 /*************************** RSS configuration ********************************/
705 /* RSS_MODE bits are mutually exclusive */
706 BNX2X_RSS_MODE_DISABLED,
707 BNX2X_RSS_MODE_REGULAR,
709 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
719 struct bnx2x_config_rss_params {
720 struct bnx2x_rss_config_obj *rss_obj;
722 /* may have RAMROD_COMP_WAIT set only */
723 unsigned long ramrod_flags;
725 /* BNX2X_RSS_X bits */
726 unsigned long rss_flags;
728 /* Number hash bits to take into an account */
731 /* Indirection table */
732 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
734 /* RSS hash values */
737 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
741 struct bnx2x_rss_config_obj {
742 struct bnx2x_raw_obj raw;
744 /* RSS engine to use */
747 /* Last configured indirection table */
748 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
750 /* flags for enabling 4-tupple hash on UDP */
754 int (*config_rss)(struct bnx2x *bp,
755 struct bnx2x_config_rss_params *p);
758 /*********************** Queue state update ***********************************/
760 /* UPDATE command options */
762 BNX2X_Q_UPDATE_IN_VLAN_REM,
763 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
764 BNX2X_Q_UPDATE_OUT_VLAN_REM,
765 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
766 BNX2X_Q_UPDATE_ANTI_SPOOF,
767 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
768 BNX2X_Q_UPDATE_ACTIVATE,
769 BNX2X_Q_UPDATE_ACTIVATE_CHNG,
770 BNX2X_Q_UPDATE_DEF_VLAN_EN,
771 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
772 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
773 BNX2X_Q_UPDATE_SILENT_VLAN_REM
776 /* Allowed Queue states */
779 BNX2X_Q_STATE_INITIALIZED,
780 BNX2X_Q_STATE_ACTIVE,
781 BNX2X_Q_STATE_MULTI_COS,
782 BNX2X_Q_STATE_MCOS_TERMINATED,
783 BNX2X_Q_STATE_INACTIVE,
784 BNX2X_Q_STATE_STOPPED,
785 BNX2X_Q_STATE_TERMINATED,
790 /* Allowed Queue states */
791 enum bnx2x_q_logical_state {
792 BNX2X_Q_LOGICAL_STATE_ACTIVE,
793 BNX2X_Q_LOGICAL_STATE_STOPPED,
796 /* Allowed commands */
797 enum bnx2x_queue_cmd {
800 BNX2X_Q_CMD_SETUP_TX_ONLY,
801 BNX2X_Q_CMD_DEACTIVATE,
802 BNX2X_Q_CMD_ACTIVATE,
804 BNX2X_Q_CMD_UPDATE_TPA,
807 BNX2X_Q_CMD_TERMINATE,
812 /* queue SETUP + INIT flags */
815 BNX2X_Q_FLG_TPA_IPV6,
818 BNX2X_Q_FLG_ZERO_STATS,
827 BNX2X_Q_FLG_LEADING_RSS,
829 BNX2X_Q_FLG_DEF_VLAN,
830 BNX2X_Q_FLG_TX_SWITCH,
832 BNX2X_Q_FLG_ANTI_SPOOF,
833 BNX2X_Q_FLG_SILENT_VLAN_REM,
834 BNX2X_Q_FLG_FORCE_DEFAULT_PRI,
835 BNX2X_Q_FLG_PCSUM_ON_PKT,
836 BNX2X_Q_FLG_TUN_INC_INNER_IP_ID
839 /* Queue type options: queue type may be a combination of below. */
841 /** TODO: Consider moving both these flags into the init()
848 #define BNX2X_PRIMARY_CID_INDEX 0
849 #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
850 #define BNX2X_MULTI_TX_COS_E2_E3A0 2
851 #define BNX2X_MULTI_TX_COS_E3B0 3
852 #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
854 #define MAC_PAD (ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)
856 struct bnx2x_queue_init_params {
871 /* CID context in the host memory */
872 struct eth_context *cxts[BNX2X_MULTI_TX_COS];
874 /* maximum number of cos supported by hardware */
878 struct bnx2x_queue_terminate_params {
879 /* index within the tx_only cids of this queue object */
883 struct bnx2x_queue_cfc_del_params {
884 /* index within the tx_only cids of this queue object */
888 struct bnx2x_queue_update_params {
889 unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
891 u16 silent_removal_value;
892 u16 silent_removal_mask;
893 /* index within the tx_only cids of this queue object */
897 struct rxq_pause_params {
902 u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
903 u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
908 struct bnx2x_general_setup_params {
909 /* valid iff BNX2X_Q_FLG_STATS */
917 struct bnx2x_rxq_setup_params {
922 dma_addr_t rcq_np_map;
929 /* valid iff BNX2X_Q_FLG_TPA */
936 /* valid iff BNX2X_Q_FLG_MCAST */
943 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
944 u16 silent_removal_value;
945 u16 silent_removal_mask;
948 struct bnx2x_txq_setup_params {
954 u8 cos; /* valid iff BNX2X_Q_FLG_COS */
956 /* equals to the leading rss client id, used for TX classification*/
957 u8 tss_leading_cl_id;
959 /* valid iff BNX2X_Q_FLG_DEF_VLAN */
963 struct bnx2x_queue_setup_params {
964 struct bnx2x_general_setup_params gen_params;
965 struct bnx2x_txq_setup_params txq_params;
966 struct bnx2x_rxq_setup_params rxq_params;
967 struct rxq_pause_params pause_params;
971 struct bnx2x_queue_setup_tx_only_params {
972 struct bnx2x_general_setup_params gen_params;
973 struct bnx2x_txq_setup_params txq_params;
975 /* index within the tx_only cids of this queue object */
979 struct bnx2x_queue_state_params {
980 struct bnx2x_queue_sp_obj *q_obj;
982 /* Current command */
983 enum bnx2x_queue_cmd cmd;
985 /* may have RAMROD_COMP_WAIT set only */
986 unsigned long ramrod_flags;
988 /* Params according to the current command */
990 struct bnx2x_queue_update_params update;
991 struct bnx2x_queue_setup_params setup;
992 struct bnx2x_queue_init_params init;
993 struct bnx2x_queue_setup_tx_only_params tx_only;
994 struct bnx2x_queue_terminate_params terminate;
995 struct bnx2x_queue_cfc_del_params cfc_del;
999 struct bnx2x_viflist_params {
1001 u8 func_bit_map_res;
1004 struct bnx2x_queue_sp_obj {
1005 u32 cids[BNX2X_MULTI_TX_COS];
1009 /* number of traffic classes supported by queue.
1010 * The primary connection of the queue supports the first traffic
1011 * class. Any further traffic class is supported by a tx-only
1014 * Therefore max_cos is also a number of valid entries in the cids
1018 u8 num_tx_only, next_tx_only;
1020 enum bnx2x_q_state state, next_state;
1022 /* bits from enum bnx2x_q_type */
1025 /* BNX2X_Q_CMD_XX bits. This object implements "one
1026 * pending" paradigm but for debug and tracing purposes it's
1027 * more convenient to have different bits for different
1030 unsigned long pending;
1032 /* Buffer to use as a ramrod data and its mapping */
1034 dma_addr_t rdata_mapping;
1037 * Performs one state change according to the given parameters.
1039 * @return 0 in case of success and negative value otherwise.
1041 int (*send_cmd)(struct bnx2x *bp,
1042 struct bnx2x_queue_state_params *params);
1045 * Sets the pending bit according to the requested transition.
1047 int (*set_pending)(struct bnx2x_queue_sp_obj *o,
1048 struct bnx2x_queue_state_params *params);
1051 * Checks that the requested state transition is legal.
1053 int (*check_transition)(struct bnx2x *bp,
1054 struct bnx2x_queue_sp_obj *o,
1055 struct bnx2x_queue_state_params *params);
1058 * Completes the pending command.
1060 int (*complete_cmd)(struct bnx2x *bp,
1061 struct bnx2x_queue_sp_obj *o,
1062 enum bnx2x_queue_cmd);
1064 int (*wait_comp)(struct bnx2x *bp,
1065 struct bnx2x_queue_sp_obj *o,
1066 enum bnx2x_queue_cmd cmd);
1069 /********************** Function state update *********************************/
1070 /* Allowed Function states */
1071 enum bnx2x_func_state {
1072 BNX2X_F_STATE_RESET,
1073 BNX2X_F_STATE_INITIALIZED,
1074 BNX2X_F_STATE_STARTED,
1075 BNX2X_F_STATE_TX_STOPPED,
1079 /* Allowed Function commands */
1080 enum bnx2x_func_cmd {
1081 BNX2X_F_CMD_HW_INIT,
1084 BNX2X_F_CMD_HW_RESET,
1085 BNX2X_F_CMD_AFEX_UPDATE,
1086 BNX2X_F_CMD_AFEX_VIFLISTS,
1087 BNX2X_F_CMD_TX_STOP,
1088 BNX2X_F_CMD_TX_START,
1089 BNX2X_F_CMD_SWITCH_UPDATE,
1093 struct bnx2x_func_hw_init_params {
1094 /* A load phase returned by MCP.
1097 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1098 * FW_MSG_CODE_DRV_LOAD_COMMON
1099 * FW_MSG_CODE_DRV_LOAD_PORT
1100 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1105 struct bnx2x_func_hw_reset_params {
1106 /* A load phase returned by MCP.
1109 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1110 * FW_MSG_CODE_DRV_LOAD_COMMON
1111 * FW_MSG_CODE_DRV_LOAD_PORT
1112 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1117 struct bnx2x_func_start_params {
1118 /* Multi Function mode:
1120 * - Switch Dependent
1121 * - Switch Independent
1125 /* Switch Dependent mode outer VLAN tag */
1128 /* Function cos mode */
1129 u8 network_cos_mode;
1131 /* NVGRE classification enablement */
1134 /* NO_GRE_TUNNEL/NVGRE_TUNNEL/L2GRE_TUNNEL/IPGRE_TUNNEL */
1137 /* GRE_OUTER_HEADERS_RSS/GRE_INNER_HEADERS_RSS/NVGRE_KEY_ENTROPY_RSS */
1141 struct bnx2x_func_switch_update_params {
1145 struct bnx2x_func_afex_update_params {
1147 u16 afex_default_vlan;
1148 u8 allowed_priorities;
1151 struct bnx2x_func_afex_viflists_params {
1154 u8 afex_vif_list_command;
1157 struct bnx2x_func_tx_start_params {
1158 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1161 u8 dont_add_pri_0_en;
1164 struct bnx2x_func_state_params {
1165 struct bnx2x_func_sp_obj *f_obj;
1167 /* Current command */
1168 enum bnx2x_func_cmd cmd;
1170 /* may have RAMROD_COMP_WAIT set only */
1171 unsigned long ramrod_flags;
1173 /* Params according to the current command */
1175 struct bnx2x_func_hw_init_params hw_init;
1176 struct bnx2x_func_hw_reset_params hw_reset;
1177 struct bnx2x_func_start_params start;
1178 struct bnx2x_func_switch_update_params switch_update;
1179 struct bnx2x_func_afex_update_params afex_update;
1180 struct bnx2x_func_afex_viflists_params afex_viflists;
1181 struct bnx2x_func_tx_start_params tx_start;
1185 struct bnx2x_func_sp_drv_ops {
1186 /* Init tool + runtime initialization:
1188 * - Common (per Path)
1192 int (*init_hw_cmn_chip)(struct bnx2x *bp);
1193 int (*init_hw_cmn)(struct bnx2x *bp);
1194 int (*init_hw_port)(struct bnx2x *bp);
1195 int (*init_hw_func)(struct bnx2x *bp);
1197 /* Reset Function HW: Common, Port, Function phases. */
1198 void (*reset_hw_cmn)(struct bnx2x *bp);
1199 void (*reset_hw_port)(struct bnx2x *bp);
1200 void (*reset_hw_func)(struct bnx2x *bp);
1202 /* Init/Free GUNZIP resources */
1203 int (*gunzip_init)(struct bnx2x *bp);
1204 void (*gunzip_end)(struct bnx2x *bp);
1206 /* Prepare/Release FW resources */
1207 int (*init_fw)(struct bnx2x *bp);
1208 void (*release_fw)(struct bnx2x *bp);
1211 struct bnx2x_func_sp_obj {
1212 enum bnx2x_func_state state, next_state;
1214 /* BNX2X_FUNC_CMD_XX bits. This object implements "one
1215 * pending" paradigm but for debug and tracing purposes it's
1216 * more convenient to have different bits for different
1219 unsigned long pending;
1221 /* Buffer to use as a ramrod data and its mapping */
1223 dma_addr_t rdata_mapping;
1225 /* Buffer to use as a afex ramrod data and its mapping.
1226 * This can't be same rdata as above because afex ramrod requests
1227 * can arrive to the object in parallel to other ramrod requests.
1230 dma_addr_t afex_rdata_mapping;
1232 /* this mutex validates that when pending flag is taken, the next
1233 * ramrod to be sent will be the one set the pending bit
1235 struct mutex one_pending_mutex;
1237 /* Driver interface */
1238 struct bnx2x_func_sp_drv_ops *drv;
1241 * Performs one state change according to the given parameters.
1243 * @return 0 in case of success and negative value otherwise.
1245 int (*send_cmd)(struct bnx2x *bp,
1246 struct bnx2x_func_state_params *params);
1249 * Checks that the requested state transition is legal.
1251 int (*check_transition)(struct bnx2x *bp,
1252 struct bnx2x_func_sp_obj *o,
1253 struct bnx2x_func_state_params *params);
1256 * Completes the pending command.
1258 int (*complete_cmd)(struct bnx2x *bp,
1259 struct bnx2x_func_sp_obj *o,
1260 enum bnx2x_func_cmd cmd);
1262 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
1263 enum bnx2x_func_cmd cmd);
1266 /********************** Interfaces ********************************************/
1267 /* Queueable objects set */
1268 union bnx2x_qable_obj {
1269 struct bnx2x_vlan_mac_obj vlan_mac;
1271 /************** Function state update *********/
1272 void bnx2x_init_func_obj(struct bnx2x *bp,
1273 struct bnx2x_func_sp_obj *obj,
1274 void *rdata, dma_addr_t rdata_mapping,
1275 void *afex_rdata, dma_addr_t afex_rdata_mapping,
1276 struct bnx2x_func_sp_drv_ops *drv_iface);
1278 int bnx2x_func_state_change(struct bnx2x *bp,
1279 struct bnx2x_func_state_params *params);
1281 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
1282 struct bnx2x_func_sp_obj *o);
1283 /******************* Queue State **************/
1284 void bnx2x_init_queue_obj(struct bnx2x *bp,
1285 struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1286 u8 cid_cnt, u8 func_id, void *rdata,
1287 dma_addr_t rdata_mapping, unsigned long type);
1289 int bnx2x_queue_state_change(struct bnx2x *bp,
1290 struct bnx2x_queue_state_params *params);
1292 int bnx2x_get_q_logical_state(struct bnx2x *bp,
1293 struct bnx2x_queue_sp_obj *obj);
1295 /********************* VLAN-MAC ****************/
1296 void bnx2x_init_mac_obj(struct bnx2x *bp,
1297 struct bnx2x_vlan_mac_obj *mac_obj,
1298 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1299 dma_addr_t rdata_mapping, int state,
1300 unsigned long *pstate, bnx2x_obj_type type,
1301 struct bnx2x_credit_pool_obj *macs_pool);
1303 void bnx2x_init_vlan_obj(struct bnx2x *bp,
1304 struct bnx2x_vlan_mac_obj *vlan_obj,
1305 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1306 dma_addr_t rdata_mapping, int state,
1307 unsigned long *pstate, bnx2x_obj_type type,
1308 struct bnx2x_credit_pool_obj *vlans_pool);
1310 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
1311 struct bnx2x_vlan_mac_obj *vlan_mac_obj,
1312 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1313 dma_addr_t rdata_mapping, int state,
1314 unsigned long *pstate, bnx2x_obj_type type,
1315 struct bnx2x_credit_pool_obj *macs_pool,
1316 struct bnx2x_credit_pool_obj *vlans_pool);
1318 int bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
1319 struct bnx2x_vlan_mac_obj *o);
1320 void bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
1321 struct bnx2x_vlan_mac_obj *o);
1322 int bnx2x_vlan_mac_h_write_lock(struct bnx2x *bp,
1323 struct bnx2x_vlan_mac_obj *o);
1324 void bnx2x_vlan_mac_h_write_unlock(struct bnx2x *bp,
1325 struct bnx2x_vlan_mac_obj *o);
1326 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1327 struct bnx2x_vlan_mac_ramrod_params *p);
1329 int bnx2x_vlan_mac_move(struct bnx2x *bp,
1330 struct bnx2x_vlan_mac_ramrod_params *p,
1331 struct bnx2x_vlan_mac_obj *dest_o);
1333 /********************* RX MODE ****************/
1335 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
1336 struct bnx2x_rx_mode_obj *o);
1339 * bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1341 * @p: Command parameters
1343 * Return: 0 - if operation was successful and there is no pending completions,
1344 * positive number - if there are pending completions,
1345 * negative - if there were errors
1347 int bnx2x_config_rx_mode(struct bnx2x *bp,
1348 struct bnx2x_rx_mode_ramrod_params *p);
1350 /****************** MULTICASTS ****************/
1352 void bnx2x_init_mcast_obj(struct bnx2x *bp,
1353 struct bnx2x_mcast_obj *mcast_obj,
1354 u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
1355 u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
1356 int state, unsigned long *pstate,
1357 bnx2x_obj_type type);
1360 * bnx2x_config_mcast - Configure multicast MACs list.
1362 * @cmd: command to execute: BNX2X_MCAST_CMD_X
1364 * May configure a new list
1365 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
1366 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
1367 * configuration, continue to execute the pending commands
1368 * (BNX2X_MCAST_CMD_CONT).
1370 * If previous command is still pending or if number of MACs to
1371 * configure is more that maximum number of MACs in one command,
1372 * the current command will be enqueued to the tail of the
1373 * pending commands list.
1375 * Return: 0 is operation was successful and there are no pending completions,
1376 * negative if there were errors, positive if there are pending
1379 int bnx2x_config_mcast(struct bnx2x *bp,
1380 struct bnx2x_mcast_ramrod_params *p,
1381 enum bnx2x_mcast_cmd cmd);
1383 /****************** CREDIT POOL ****************/
1384 void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
1385 struct bnx2x_credit_pool_obj *p, u8 func_id,
1387 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
1388 struct bnx2x_credit_pool_obj *p, u8 func_id,
1391 /****************** RSS CONFIGURATION ****************/
1392 void bnx2x_init_rss_config_obj(struct bnx2x *bp,
1393 struct bnx2x_rss_config_obj *rss_obj,
1394 u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
1395 void *rdata, dma_addr_t rdata_mapping,
1396 int state, unsigned long *pstate,
1397 bnx2x_obj_type type);
1400 * bnx2x_config_rss - Updates RSS configuration according to provided parameters
1402 * Return: 0 in case of success
1404 int bnx2x_config_rss(struct bnx2x *bp,
1405 struct bnx2x_config_rss_params *p);
1408 * bnx2x_get_rss_ind_table - Return the current ind_table configuration.
1410 * @ind_table: buffer to fill with the current indirection
1411 * table content. Should be at least
1412 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1414 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
1417 int validate_vlan_mac(struct bnx2x *bp,
1418 struct bnx2x_vlan_mac_obj *vlan_mac);
1419 #endif /* BNX2X_SP_VERBS */