drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         if (priv->rx_chk_en)
 130                 reg |= RXCHK_EN;
 131         else
 132                 reg &= ~RXCHK_EN;
 133
 134         /* If UniMAC forwards CRC, we need to skip over it to get
 135          * a valid CHK bit to be set in the per-packet status word
 136          */
 137         if (priv->rx_chk_en && priv->crc_fwd)
 138                 reg |= RXCHK_SKIP_FCS;
 139         else
 140                 reg &= ~RXCHK_SKIP_FCS;
 141
 142         /* If Broadcom tags are enabled (e.g: using a switch), make
 143          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 144          * tag after the Ethernet MAC Source Address.
 145          */
 146         if (netdev_uses_dsa(dev))
 147                 reg |= RXCHK_BRCM_TAG_EN;
 148         else
 149                 reg &= ~RXCHK_BRCM_TAG_EN;
 150
 151         rxchk_writel(priv, reg, RXCHK_CONTROL);
 152
 153         return 0;
 154 }
 155
 156 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 157                                    netdev_features_t wanted)
 158 {
 159         struct bcm_sysport_priv *priv = netdev_priv(dev);
 160         u32 reg;
 161
 162         /* Hardware transmit checksum requires us to enable the Transmit status
 163          * block prepended to the packet contents
 164          */
 165         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 166         reg = tdma_readl(priv, TDMA_CONTROL);
 167         if (priv->tsb_en)
 168                 reg |= TSB_EN;
 169         else
 170                 reg &= ~TSB_EN;
 171         tdma_writel(priv, reg, TDMA_CONTROL);
 172
 173         return 0;
 174 }
 175
 176 static int bcm_sysport_set_features(struct net_device *dev,
 177                                     netdev_features_t features)
 178 {
 179         netdev_features_t changed = features ^ dev->features;
 180         netdev_features_t wanted = dev->wanted_features;
 181         int ret = 0;
 182
 183         if (changed & NETIF_F_RXCSUM)
 184                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 185         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 186                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 187
 188         return ret;
 189 }
 190
 191 /* Hardware counters must be kept in sync because the order/offset
 192  * is important here (order in structure declaration = order in hardware)
 193  */
 194 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 195         /* general stats */
 196         STAT_NETDEV(rx_packets),
 197         STAT_NETDEV(tx_packets),
 198         STAT_NETDEV(rx_bytes),
 199         STAT_NETDEV(tx_bytes),
 200         STAT_NETDEV(rx_errors),
 201         STAT_NETDEV(tx_errors),
 202         STAT_NETDEV(rx_dropped),
 203         STAT_NETDEV(tx_dropped),
 204         STAT_NETDEV(multicast),
 205         /* UniMAC RSV counters */
 206         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 207         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 208         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 209         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 210         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 211         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 212         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 213         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 214         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 215         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 216         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 217         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 218         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 219         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 220         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 221         STAT_MIB_RX("rx_control", mib.rx.cf),
 222         STAT_MIB_RX("rx_pause", mib.rx.pf),
 223         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 224         STAT_MIB_RX("rx_align", mib.rx.aln),
 225         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 226         STAT_MIB_RX("rx_code", mib.rx.cde),
 227         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 228         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 229         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 230         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 231         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 232         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 233         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 234         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 235         /* UniMAC TSV counters */
 236         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 237         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 238         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 239         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 240         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 241         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 242         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 243         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 244         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 245         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 246         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 247         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 248         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 249         STAT_MIB_TX("tx_pause", mib.tx.pf),
 250         STAT_MIB_TX("tx_control", mib.tx.cf),
 251         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 252         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 253         STAT_MIB_TX("tx_defer", mib.tx.drf),
 254         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 255         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 256         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 257         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 258         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 259         STAT_MIB_TX("tx_frags", mib.tx.frg),
 260         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 261         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 262         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 263         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 264         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 265         /* UniMAC RUNT counters */
 266         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 267         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 268         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 269         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 270         /* RXCHK misc statistics */
 271         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 272         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 273                    RXCHK_OTHER_DISC_CNTR),
 274         /* RBUF misc statistics */
 275         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 276         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 277 };
 278
 279 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 280
 281 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 282                                     struct ethtool_drvinfo *info)
 283 {
 284         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 285         strlcpy(info->version, "0.1", sizeof(info->version));
 286         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 287         info->n_stats = BCM_SYSPORT_STATS_LEN;
 288 }
 289
 290 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 291 {
 292         struct bcm_sysport_priv *priv = netdev_priv(dev);
 293
 294         return priv->msg_enable;
 295 }
 296
 297 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 298 {
 299         struct bcm_sysport_priv *priv = netdev_priv(dev);
 300
 301         priv->msg_enable = enable;
 302 }
 303
 304 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 305 {
 306         switch (string_set) {
 307         case ETH_SS_STATS:
 308                 return BCM_SYSPORT_STATS_LEN;
 309         default:
 310                 return -EOPNOTSUPP;
 311         }
 312 }
 313
 314 static void bcm_sysport_get_strings(struct net_device *dev,
 315                                     u32 stringset, u8 *data)
 316 {
 317         int i;
 318
 319         switch (stringset) {
 320         case ETH_SS_STATS:
 321                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 322                         memcpy(data + i * ETH_GSTRING_LEN,
 323                                bcm_sysport_gstrings_stats[i].stat_string,
 324                                ETH_GSTRING_LEN);
 325                 }
 326                 break;
 327         default:
 328                 break;
 329         }
 330 }
 331
 332 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 333 {
 334         int i, j = 0;
 335
 336         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 337                 const struct bcm_sysport_stats *s;
 338                 u8 offset = 0;
 339                 u32 val = 0;
 340                 char *p;
 341
 342                 s = &bcm_sysport_gstrings_stats[i];
 343                 switch (s->type) {
 344                 case BCM_SYSPORT_STAT_NETDEV:
 345                         continue;
 346                 case BCM_SYSPORT_STAT_MIB_RX:
 347                 case BCM_SYSPORT_STAT_MIB_TX:
 348                 case BCM_SYSPORT_STAT_RUNT:
 349                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 350                                 offset = UMAC_MIB_STAT_OFFSET;
 351                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 352                         break;
 353                 case BCM_SYSPORT_STAT_RXCHK:
 354                         val = rxchk_readl(priv, s->reg_offset);
 355                         if (val == ~0)
 356                                 rxchk_writel(priv, 0, s->reg_offset);
 357                         break;
 358                 case BCM_SYSPORT_STAT_RBUF:
 359                         val = rbuf_readl(priv, s->reg_offset);
 360                         if (val == ~0)
 361                                 rbuf_writel(priv, 0, s->reg_offset);
 362                         break;
 363                 }
 364
 365                 j += s->stat_sizeof;
 366                 p = (char *)priv + s->stat_offset;
 367                 *(u32 *)p = val;
 368         }
 369
 370         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 371 }
 372
 373 static void bcm_sysport_get_stats(struct net_device *dev,
 374                                   struct ethtool_stats *stats, u64 *data)
 375 {
 376         struct bcm_sysport_priv *priv = netdev_priv(dev);
 377         int i;
 378
 379         if (netif_running(dev))
 380                 bcm_sysport_update_mib_counters(priv);
 381
 382         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 383                 const struct bcm_sysport_stats *s;
 384                 char *p;
 385
 386                 s = &bcm_sysport_gstrings_stats[i];
 387                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 388                         p = (char *)&dev->stats;
 389                 else
 390                         p = (char *)priv;
 391                 p += s->stat_offset;
 392                 data[i] = *(u32 *)p;
 393         }
 394 }
 395
 396 static void bcm_sysport_get_wol(struct net_device *dev,
 397                                 struct ethtool_wolinfo *wol)
 398 {
 399         struct bcm_sysport_priv *priv = netdev_priv(dev);
 400         u32 reg;
 401
 402         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 403         wol->wolopts = priv->wolopts;
 404
 405         if (!(priv->wolopts & WAKE_MAGICSECURE))
 406                 return;
 407
 408         /* Return the programmed SecureOn password */
 409         reg = umac_readl(priv, UMAC_PSW_MS);
 410         put_unaligned_be16(reg, &wol->sopass[0]);
 411         reg = umac_readl(priv, UMAC_PSW_LS);
 412         put_unaligned_be32(reg, &wol->sopass[2]);
 413 }
 414
 415 static int bcm_sysport_set_wol(struct net_device *dev,
 416                                struct ethtool_wolinfo *wol)
 417 {
 418         struct bcm_sysport_priv *priv = netdev_priv(dev);
 419         struct device *kdev = &priv->pdev->dev;
 420         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 421
 422         if (!device_can_wakeup(kdev))
 423                 return -ENOTSUPP;
 424
 425         if (wol->wolopts & ~supported)
 426                 return -EINVAL;
 427
 428         /* Program the SecureOn password */
 429         if (wol->wolopts & WAKE_MAGICSECURE) {
 430                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 431                             UMAC_PSW_MS);
 432                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 433                             UMAC_PSW_LS);
 434         }
 435
 436         /* Flag the device and relevant IRQ as wakeup capable */
 437         if (wol->wolopts) {
 438                 device_set_wakeup_enable(kdev, 1);
 439                 enable_irq_wake(priv->wol_irq);
 440                 priv->wol_irq_disabled = 0;
 441         } else {
 442                 device_set_wakeup_enable(kdev, 0);
 443                 /* Avoid unbalanced disable_irq_wake calls */
 444                 if (!priv->wol_irq_disabled)
 445                         disable_irq_wake(priv->wol_irq);
 446                 priv->wol_irq_disabled = 1;
 447         }
 448
 449         priv->wolopts = wol->wolopts;
 450
 451         return 0;
 452 }
 453
 454 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 455 {
 456         dev_kfree_skb_any(cb->skb);
 457         cb->skb = NULL;
 458         dma_unmap_addr_set(cb, dma_addr, 0);
 459 }
 460
 461 static int bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 462                                  struct bcm_sysport_cb *cb)
 463 {
 464         struct device *kdev = &priv->pdev->dev;
 465         struct net_device *ndev = priv->netdev;
 466         dma_addr_t mapping;
 467         int ret;
 468
 469         cb->skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 470         if (!cb->skb) {
 471                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 472                 return -ENOMEM;
 473         }
 474
 475         mapping = dma_map_single(kdev, cb->skb->data,
 476                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 477         ret = dma_mapping_error(kdev, mapping);
 478         if (ret) {
 479                 bcm_sysport_free_cb(cb);
 480                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 481                 return ret;
 482         }
 483
 484         dma_unmap_addr_set(cb, dma_addr, mapping);
 485         dma_desc_set_addr(priv, priv->rx_bd_assign_ptr, mapping);
 486
 487         priv->rx_bd_assign_index++;
 488         priv->rx_bd_assign_index &= (priv->num_rx_bds - 1);
 489         priv->rx_bd_assign_ptr = priv->rx_bds +
 490                 (priv->rx_bd_assign_index * DESC_SIZE);
 491
 492         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 493
 494         return 0;
 495 }
 496
 497 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 498 {
 499         struct bcm_sysport_cb *cb;
 500         int ret = 0;
 501         unsigned int i;
 502
 503         for (i = 0; i < priv->num_rx_bds; i++) {
 504                 cb = &priv->rx_cbs[priv->rx_bd_assign_index];
 505                 if (cb->skb)
 506                         continue;
 507
 508                 ret = bcm_sysport_rx_refill(priv, cb);
 509                 if (ret)
 510                         break;
 511         }
 512
 513         return ret;
 514 }
 515
 516 /* Poll the hardware for up to budget packets to process */
 517 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 518                                         unsigned int budget)
 519 {
 520         struct device *kdev = &priv->pdev->dev;
 521         struct net_device *ndev = priv->netdev;
 522         unsigned int processed = 0, to_process;
 523         struct bcm_sysport_cb *cb;
 524         struct sk_buff *skb;
 525         unsigned int p_index;
 526         u16 len, status;
 527         struct bcm_rsb *rsb;
 528
 529         /* Determine how much we should process since last call */
 530         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 531         p_index &= RDMA_PROD_INDEX_MASK;
 532
 533         if (p_index < priv->rx_c_index)
 534                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 535                         priv->rx_c_index + p_index;
 536         else
 537                 to_process = p_index - priv->rx_c_index;
 538
 539         netif_dbg(priv, rx_status, ndev,
 540                   "p_index=%d rx_c_index=%d to_process=%d\n",
 541                   p_index, priv->rx_c_index, to_process);
 542
 543         while ((processed < to_process) && (processed < budget)) {
 544                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 545                 skb = cb->skb;
 546
 547                 processed++;
 548                 priv->rx_read_ptr++;
 549
 550                 if (priv->rx_read_ptr == priv->num_rx_bds)
 551                         priv->rx_read_ptr = 0;
 552
 553                 /* We do not have a backing SKB, so we do not a corresponding
 554                  * DMA mapping for this incoming packet since
 555                  * bcm_sysport_rx_refill always either has both skb and mapping
 556                  * or none.
 557                  */
 558                 if (unlikely(!skb)) {
 559                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 560                         ndev->stats.rx_dropped++;
 561                         ndev->stats.rx_errors++;
 562                         goto refill;
 563                 }
 564
 565                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 566                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 567
 568                 /* Extract the Receive Status Block prepended */
 569                 rsb = (struct bcm_rsb *)skb->data;
 570                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 571                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 572                           DESC_STATUS_MASK;
 573
 574                 netif_dbg(priv, rx_status, ndev,
 575                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 576                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 577                           len, status);
 578
 579                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 580                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 581                         ndev->stats.rx_dropped++;
 582                         ndev->stats.rx_errors++;
 583                         bcm_sysport_free_cb(cb);
 584                         goto refill;
 585                 }
 586
 587                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 588                         netif_err(priv, rx_err, ndev, "error packet\n");
 589                         if (status & RX_STATUS_OVFLOW)
 590                                 ndev->stats.rx_over_errors++;
 591                         ndev->stats.rx_dropped++;
 592                         ndev->stats.rx_errors++;
 593                         bcm_sysport_free_cb(cb);
 594                         goto refill;
 595                 }
 596
 597                 skb_put(skb, len);
 598
 599                 /* Hardware validated our checksum */
 600                 if (likely(status & DESC_L4_CSUM))
 601                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 602
 603                 /* Hardware pre-pends packets with 2bytes before Ethernet
 604                  * header plus we have the Receive Status Block, strip off all
 605                  * of this from the SKB.
 606                  */
 607                 skb_pull(skb, sizeof(*rsb) + 2);
 608                 len -= (sizeof(*rsb) + 2);
 609
 610                 /* UniMAC may forward CRC */
 611                 if (priv->crc_fwd) {
 612                         skb_trim(skb, len - ETH_FCS_LEN);
 613                         len -= ETH_FCS_LEN;
 614                 }
 615
 616                 skb->protocol = eth_type_trans(skb, ndev);
 617                 ndev->stats.rx_packets++;
 618                 ndev->stats.rx_bytes += len;
 619
 620                 napi_gro_receive(&priv->napi, skb);
 621 refill:
 622                 bcm_sysport_rx_refill(priv, cb);
 623         }
 624
 625         return processed;
 626 }
 627
 628 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 629                                        struct bcm_sysport_cb *cb,
 630                                        unsigned int *bytes_compl,
 631                                        unsigned int *pkts_compl)
 632 {
 633         struct device *kdev = &priv->pdev->dev;
 634         struct net_device *ndev = priv->netdev;
 635
 636         if (cb->skb) {
 637                 ndev->stats.tx_bytes += cb->skb->len;
 638                 *bytes_compl += cb->skb->len;
 639                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 640                                  dma_unmap_len(cb, dma_len),
 641                                  DMA_TO_DEVICE);
 642                 ndev->stats.tx_packets++;
 643                 (*pkts_compl)++;
 644                 bcm_sysport_free_cb(cb);
 645         /* SKB fragment */
 646         } else if (dma_unmap_addr(cb, dma_addr)) {
 647                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 648                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 649                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 650                 dma_unmap_addr_set(cb, dma_addr, 0);
 651         }
 652 }
 653
 654 /* Reclaim queued SKBs for transmission completion, lockless version */
 655 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 656                                              struct bcm_sysport_tx_ring *ring)
 657 {
 658         struct net_device *ndev = priv->netdev;
 659         unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
 660         unsigned int pkts_compl = 0, bytes_compl = 0;
 661         struct bcm_sysport_cb *cb;
 662         struct netdev_queue *txq;
 663         u32 hw_ind;
 664
 665         txq = netdev_get_tx_queue(ndev, ring->index);
 666
 667         /* Compute how many descriptors have been processed since last call */
 668         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 669         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 670         ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
 671
 672         last_c_index = ring->c_index;
 673         num_tx_cbs = ring->size;
 674
 675         c_index &= (num_tx_cbs - 1);
 676
 677         if (c_index >= last_c_index)
 678                 last_tx_cn = c_index - last_c_index;
 679         else
 680                 last_tx_cn = num_tx_cbs - last_c_index + c_index;
 681
 682         netif_dbg(priv, tx_done, ndev,
 683                   "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
 684                   ring->index, c_index, last_tx_cn, last_c_index);
 685
 686         while (last_tx_cn-- > 0) {
 687                 cb = ring->cbs + last_c_index;
 688                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 689
 690                 ring->desc_count++;
 691                 last_c_index++;
 692                 last_c_index &= (num_tx_cbs - 1);
 693         }
 694
 695         ring->c_index = c_index;
 696
 697         if (netif_tx_queue_stopped(txq) && pkts_compl)
 698                 netif_tx_wake_queue(txq);
 699
 700         netif_dbg(priv, tx_done, ndev,
 701                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 702                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 703
 704         return pkts_compl;
 705 }
 706
 707 /* Locked version of the per-ring TX reclaim routine */
 708 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 709                                            struct bcm_sysport_tx_ring *ring)
 710 {
 711         unsigned int released;
 712         unsigned long flags;
 713
 714         spin_lock_irqsave(&ring->lock, flags);
 715         released = __bcm_sysport_tx_reclaim(priv, ring);
 716         spin_unlock_irqrestore(&ring->lock, flags);
 717
 718         return released;
 719 }
 720
 721 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 722 {
 723         struct bcm_sysport_tx_ring *ring =
 724                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 725         unsigned int work_done = 0;
 726
 727         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 728
 729         if (work_done == 0) {
 730                 napi_complete(napi);
 731                 /* re-enable TX interrupt */
 732                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 733         }
 734
 735         return 0;
 736 }
 737
 738 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 739 {
 740         unsigned int q;
 741
 742         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 743                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 744 }
 745
 746 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 747 {
 748         struct bcm_sysport_priv *priv =
 749                 container_of(napi, struct bcm_sysport_priv, napi);
 750         unsigned int work_done = 0;
 751
 752         work_done = bcm_sysport_desc_rx(priv, budget);
 753
 754         priv->rx_c_index += work_done;
 755         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 756         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 757
 758         if (work_done < budget) {
 759                 napi_complete(napi);
 760                 /* re-enable RX interrupts */
 761                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 762         }
 763
 764         return work_done;
 765 }
 766
 767 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 768 {
 769         u32 reg;
 770
 771         /* Stop monitoring MPD interrupt */
 772         intrl2_0_mask_set(priv, INTRL2_0_MPD);
 773
 774         /* Clear the MagicPacket detection logic */
 775         reg = umac_readl(priv, UMAC_MPD_CTRL);
 776         reg &= ~MPD_EN;
 777         umac_writel(priv, reg, UMAC_MPD_CTRL);
 778
 779         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 780 }
 781
 782 /* RX and misc interrupt routine */
 783 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 784 {
 785         struct net_device *dev = dev_id;
 786         struct bcm_sysport_priv *priv = netdev_priv(dev);
 787
 788         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 789                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 790         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 791
 792         if (unlikely(priv->irq0_stat == 0)) {
 793                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 794                 return IRQ_NONE;
 795         }
 796
 797         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 798                 if (likely(napi_schedule_prep(&priv->napi))) {
 799                         /* disable RX interrupts */
 800                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 801                         __napi_schedule(&priv->napi);
 802                 }
 803         }
 804
 805         /* TX ring is full, perform a full reclaim since we do not know
 806          * which one would trigger this interrupt
 807          */
 808         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 809                 bcm_sysport_tx_reclaim_all(priv);
 810
 811         if (priv->irq0_stat & INTRL2_0_MPD) {
 812                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
 813                 bcm_sysport_resume_from_wol(priv);
 814         }
 815
 816         return IRQ_HANDLED;
 817 }
 818
 819 /* TX interrupt service routine */
 820 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 821 {
 822         struct net_device *dev = dev_id;
 823         struct bcm_sysport_priv *priv = netdev_priv(dev);
 824         struct bcm_sysport_tx_ring *txr;
 825         unsigned int ring;
 826
 827         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 828                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 829         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 830
 831         if (unlikely(priv->irq1_stat == 0)) {
 832                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 833                 return IRQ_NONE;
 834         }
 835
 836         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 837                 if (!(priv->irq1_stat & BIT(ring)))
 838                         continue;
 839
 840                 txr = &priv->tx_rings[ring];
 841
 842                 if (likely(napi_schedule_prep(&txr->napi))) {
 843                         intrl2_1_mask_set(priv, BIT(ring));
 844                         __napi_schedule(&txr->napi);
 845                 }
 846         }
 847
 848         return IRQ_HANDLED;
 849 }
 850
 851 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 852 {
 853         struct bcm_sysport_priv *priv = dev_id;
 854
 855         pm_wakeup_event(&priv->pdev->dev, 0);
 856
 857         return IRQ_HANDLED;
 858 }
 859
 860 static int bcm_sysport_insert_tsb(struct sk_buff *skb, struct net_device *dev)
 861 {
 862         struct sk_buff *nskb;
 863         struct bcm_tsb *tsb;
 864         u32 csum_info;
 865         u8 ip_proto;
 866         u16 csum_start;
 867         u16 ip_ver;
 868
 869         /* Re-allocate SKB if needed */
 870         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 871                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 872                 dev_kfree_skb(skb);
 873                 if (!nskb) {
 874                         dev->stats.tx_errors++;
 875                         dev->stats.tx_dropped++;
 876                         return -ENOMEM;
 877                 }
 878                 skb = nskb;
 879         }
 880
 881         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 882         /* Zero-out TSB by default */
 883         memset(tsb, 0, sizeof(*tsb));
 884
 885         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 886                 ip_ver = htons(skb->protocol);
 887                 switch (ip_ver) {
 888                 case ETH_P_IP:
 889                         ip_proto = ip_hdr(skb)->protocol;
 890                         break;
 891                 case ETH_P_IPV6:
 892                         ip_proto = ipv6_hdr(skb)->nexthdr;
 893                         break;
 894                 default:
 895                         return 0;
 896                 }
 897
 898                 /* Get the checksum offset and the L4 (transport) offset */
 899                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 900                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 901                 csum_info |= (csum_start << L4_PTR_SHIFT);
 902
 903                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
 904                         csum_info |= L4_LENGTH_VALID;
 905                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
 906                                 csum_info |= L4_UDP;
 907                 } else {
 908                         csum_info = 0;
 909                 }
 910
 911                 tsb->l4_ptr_dest_map = csum_info;
 912         }
 913
 914         return 0;
 915 }
 916
 917 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
 918                                     struct net_device *dev)
 919 {
 920         struct bcm_sysport_priv *priv = netdev_priv(dev);
 921         struct device *kdev = &priv->pdev->dev;
 922         struct bcm_sysport_tx_ring *ring;
 923         struct bcm_sysport_cb *cb;
 924         struct netdev_queue *txq;
 925         struct dma_desc *desc;
 926         unsigned int skb_len;
 927         unsigned long flags;
 928         dma_addr_t mapping;
 929         u32 len_status;
 930         u16 queue;
 931         int ret;
 932
 933         queue = skb_get_queue_mapping(skb);
 934         txq = netdev_get_tx_queue(dev, queue);
 935         ring = &priv->tx_rings[queue];
 936
 937         /* lock against tx reclaim in BH context and TX ring full interrupt */
 938         spin_lock_irqsave(&ring->lock, flags);
 939         if (unlikely(ring->desc_count == 0)) {
 940                 netif_tx_stop_queue(txq);
 941                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
 942                 ret = NETDEV_TX_BUSY;
 943                 goto out;
 944         }
 945
 946         /* Insert TSB and checksum infos */
 947         if (priv->tsb_en) {
 948                 ret = bcm_sysport_insert_tsb(skb, dev);
 949                 if (ret) {
 950                         ret = NETDEV_TX_OK;
 951                         goto out;
 952                 }
 953         }
 954
 955         /* The Ethernet switch we are interfaced with needs packets to be at
 956          * least 64 bytes (including FCS) otherwise they will be discarded when
 957          * they enter the switch port logic. When Broadcom tags are enabled, we
 958          * need to make sure that packets are at least 68 bytes
 959          * (including FCS and tag) because the length verification is done after
 960          * the Broadcom tag is stripped off the ingress packet.
 961          */
 962         if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
 963                 ret = NETDEV_TX_OK;
 964                 goto out;
 965         }
 966
 967         skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
 968                         ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
 969
 970         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
 971         if (dma_mapping_error(kdev, mapping)) {
 972                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
 973                           skb->data, skb_len);
 974                 ret = NETDEV_TX_OK;
 975                 goto out;
 976         }
 977
 978         /* Remember the SKB for future freeing */
 979         cb = &ring->cbs[ring->curr_desc];
 980         cb->skb = skb;
 981         dma_unmap_addr_set(cb, dma_addr, mapping);
 982         dma_unmap_len_set(cb, dma_len, skb_len);
 983
 984         /* Fetch a descriptor entry from our pool */
 985         desc = ring->desc_cpu;
 986
 987         desc->addr_lo = lower_32_bits(mapping);
 988         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
 989         len_status |= (skb_len << DESC_LEN_SHIFT);
 990         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
 991                        DESC_STATUS_SHIFT;
 992         if (skb->ip_summed == CHECKSUM_PARTIAL)
 993                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
 994
 995         ring->curr_desc++;
 996         if (ring->curr_desc == ring->size)
 997                 ring->curr_desc = 0;
 998         ring->desc_count--;
 999
1000         /* Ensure write completion of the descriptor status/length
1001          * in DRAM before the System Port WRITE_PORT register latches
1002          * the value
1003          */
1004         wmb();
1005         desc->addr_status_len = len_status;
1006         wmb();
1007
1008         /* Write this descriptor address to the RING write port */
1009         tdma_port_write_desc_addr(priv, desc, ring->index);
1010
1011         /* Check ring space and update SW control flow */
1012         if (ring->desc_count == 0)
1013                 netif_tx_stop_queue(txq);
1014
1015         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1016                   ring->index, ring->desc_count, ring->curr_desc);
1017
1018         ret = NETDEV_TX_OK;
1019 out:
1020         spin_unlock_irqrestore(&ring->lock, flags);
1021         return ret;
1022 }
1023
1024 static void bcm_sysport_tx_timeout(struct net_device *dev)
1025 {
1026         netdev_warn(dev, "transmit timeout!\n");
1027
1028         dev->trans_start = jiffies;
1029         dev->stats.tx_errors++;
1030
1031         netif_tx_wake_all_queues(dev);
1032 }
1033
1034 /* phylib adjust link callback */
1035 static void bcm_sysport_adj_link(struct net_device *dev)
1036 {
1037         struct bcm_sysport_priv *priv = netdev_priv(dev);
1038         struct phy_device *phydev = priv->phydev;
1039         unsigned int changed = 0;
1040         u32 cmd_bits = 0, reg;
1041
1042         if (priv->old_link != phydev->link) {
1043                 changed = 1;
1044                 priv->old_link = phydev->link;
1045         }
1046
1047         if (priv->old_duplex != phydev->duplex) {
1048                 changed = 1;
1049                 priv->old_duplex = phydev->duplex;
1050         }
1051
1052         switch (phydev->speed) {
1053         case SPEED_2500:
1054                 cmd_bits = CMD_SPEED_2500;
1055                 break;
1056         case SPEED_1000:
1057                 cmd_bits = CMD_SPEED_1000;
1058                 break;
1059         case SPEED_100:
1060                 cmd_bits = CMD_SPEED_100;
1061                 break;
1062         case SPEED_10:
1063                 cmd_bits = CMD_SPEED_10;
1064                 break;
1065         default:
1066                 break;
1067         }
1068         cmd_bits <<= CMD_SPEED_SHIFT;
1069
1070         if (phydev->duplex == DUPLEX_HALF)
1071                 cmd_bits |= CMD_HD_EN;
1072
1073         if (priv->old_pause != phydev->pause) {
1074                 changed = 1;
1075                 priv->old_pause = phydev->pause;
1076         }
1077
1078         if (!phydev->pause)
1079                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1080
1081         if (!changed)
1082                 return;
1083
1084         if (phydev->link) {
1085                 reg = umac_readl(priv, UMAC_CMD);
1086                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1087                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1088                         CMD_TX_PAUSE_IGNORE);
1089                 reg |= cmd_bits;
1090                 umac_writel(priv, reg, UMAC_CMD);
1091         }
1092
1093         phy_print_status(priv->phydev);
1094 }
1095
1096 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1097                                     unsigned int index)
1098 {
1099         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1100         struct device *kdev = &priv->pdev->dev;
1101         size_t size;
1102         void *p;
1103         u32 reg;
1104
1105         /* Simple descriptors partitioning for now */
1106         size = 256;
1107
1108         /* We just need one DMA descriptor which is DMA-able, since writing to
1109          * the port will allocate a new descriptor in its internal linked-list
1110          */
1111         p = dma_zalloc_coherent(kdev, 1, &ring->desc_dma, GFP_KERNEL);
1112         if (!p) {
1113                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1114                 return -ENOMEM;
1115         }
1116
1117         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1118         if (!ring->cbs) {
1119                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1120                 return -ENOMEM;
1121         }
1122
1123         /* Initialize SW view of the ring */
1124         spin_lock_init(&ring->lock);
1125         ring->priv = priv;
1126         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1127         ring->index = index;
1128         ring->size = size;
1129         ring->alloc_size = ring->size;
1130         ring->desc_cpu = p;
1131         ring->desc_count = ring->size;
1132         ring->curr_desc = 0;
1133
1134         /* Initialize HW ring */
1135         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1136         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1137         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1138         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1139         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1140         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1141
1142         /* Program the number of descriptors as MAX_THRESHOLD and half of
1143          * its size for the hysteresis trigger
1144          */
1145         tdma_writel(priv, ring->size |
1146                         1 << RING_HYST_THRESH_SHIFT,
1147                         TDMA_DESC_RING_MAX_HYST(index));
1148
1149         /* Enable the ring queue in the arbiter */
1150         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1151         reg |= (1 << index);
1152         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1153
1154         napi_enable(&ring->napi);
1155
1156         netif_dbg(priv, hw, priv->netdev,
1157                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1158                   ring->size, ring->desc_cpu);
1159
1160         return 0;
1161 }
1162
1163 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1164                                      unsigned int index)
1165 {
1166         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1167         struct device *kdev = &priv->pdev->dev;
1168         u32 reg;
1169
1170         /* Caller should stop the TDMA engine */
1171         reg = tdma_readl(priv, TDMA_STATUS);
1172         if (!(reg & TDMA_DISABLED))
1173                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1174
1175         napi_disable(&ring->napi);
1176         netif_napi_del(&ring->napi);
1177
1178         bcm_sysport_tx_reclaim(priv, ring);
1179
1180         kfree(ring->cbs);
1181         ring->cbs = NULL;
1182
1183         if (ring->desc_dma) {
1184                 dma_free_coherent(kdev, 1, ring->desc_cpu, ring->desc_dma);
1185                 ring->desc_dma = 0;
1186         }
1187         ring->size = 0;
1188         ring->alloc_size = 0;
1189
1190         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1191 }
1192
1193 /* RDMA helper */
1194 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1195                                   unsigned int enable)
1196 {
1197         unsigned int timeout = 1000;
1198         u32 reg;
1199
1200         reg = rdma_readl(priv, RDMA_CONTROL);
1201         if (enable)
1202                 reg |= RDMA_EN;
1203         else
1204                 reg &= ~RDMA_EN;
1205         rdma_writel(priv, reg, RDMA_CONTROL);
1206
1207         /* Poll for RMDA disabling completion */
1208         do {
1209                 reg = rdma_readl(priv, RDMA_STATUS);
1210                 if (!!(reg & RDMA_DISABLED) == !enable)
1211                         return 0;
1212                 usleep_range(1000, 2000);
1213         } while (timeout-- > 0);
1214
1215         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1216
1217         return -ETIMEDOUT;
1218 }
1219
1220 /* TDMA helper */
1221 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1222                                   unsigned int enable)
1223 {
1224         unsigned int timeout = 1000;
1225         u32 reg;
1226
1227         reg = tdma_readl(priv, TDMA_CONTROL);
1228         if (enable)
1229                 reg |= TDMA_EN;
1230         else
1231                 reg &= ~TDMA_EN;
1232         tdma_writel(priv, reg, TDMA_CONTROL);
1233
1234         /* Poll for TMDA disabling completion */
1235         do {
1236                 reg = tdma_readl(priv, TDMA_STATUS);
1237                 if (!!(reg & TDMA_DISABLED) == !enable)
1238                         return 0;
1239
1240                 usleep_range(1000, 2000);
1241         } while (timeout-- > 0);
1242
1243         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1244
1245         return -ETIMEDOUT;
1246 }
1247
1248 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1249 {
1250         u32 reg;
1251         int ret;
1252
1253         /* Initialize SW view of the RX ring */
1254         priv->num_rx_bds = NUM_RX_DESC;
1255         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1256         priv->rx_bd_assign_ptr = priv->rx_bds;
1257         priv->rx_bd_assign_index = 0;
1258         priv->rx_c_index = 0;
1259         priv->rx_read_ptr = 0;
1260         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1261                                 GFP_KERNEL);
1262         if (!priv->rx_cbs) {
1263                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1264                 return -ENOMEM;
1265         }
1266
1267         ret = bcm_sysport_alloc_rx_bufs(priv);
1268         if (ret) {
1269                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1270                 return ret;
1271         }
1272
1273         /* Initialize HW, ensure RDMA is disabled */
1274         reg = rdma_readl(priv, RDMA_STATUS);
1275         if (!(reg & RDMA_DISABLED))
1276                 rdma_enable_set(priv, 0);
1277
1278         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1279         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1280         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1281         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1282         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1283                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1284         /* Operate the queue in ring mode */
1285         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1286         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1287         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1288         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1289
1290         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1291
1292         netif_dbg(priv, hw, priv->netdev,
1293                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1294                   priv->num_rx_bds, priv->rx_bds);
1295
1296         return 0;
1297 }
1298
1299 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1300 {
1301         struct bcm_sysport_cb *cb;
1302         unsigned int i;
1303         u32 reg;
1304
1305         /* Caller should ensure RDMA is disabled */
1306         reg = rdma_readl(priv, RDMA_STATUS);
1307         if (!(reg & RDMA_DISABLED))
1308                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1309
1310         for (i = 0; i < priv->num_rx_bds; i++) {
1311                 cb = &priv->rx_cbs[i];
1312                 if (dma_unmap_addr(cb, dma_addr))
1313                         dma_unmap_single(&priv->pdev->dev,
1314                                          dma_unmap_addr(cb, dma_addr),
1315                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1316                 bcm_sysport_free_cb(cb);
1317         }
1318
1319         kfree(priv->rx_cbs);
1320         priv->rx_cbs = NULL;
1321
1322         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1323 }
1324
1325 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1326 {
1327         struct bcm_sysport_priv *priv = netdev_priv(dev);
1328         u32 reg;
1329
1330         reg = umac_readl(priv, UMAC_CMD);
1331         if (dev->flags & IFF_PROMISC)
1332                 reg |= CMD_PROMISC;
1333         else
1334                 reg &= ~CMD_PROMISC;
1335         umac_writel(priv, reg, UMAC_CMD);
1336
1337         /* No support for ALLMULTI */
1338         if (dev->flags & IFF_ALLMULTI)
1339                 return;
1340 }
1341
1342 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1343                                    u32 mask, unsigned int enable)
1344 {
1345         u32 reg;
1346
1347         reg = umac_readl(priv, UMAC_CMD);
1348         if (enable)
1349                 reg |= mask;
1350         else
1351                 reg &= ~mask;
1352         umac_writel(priv, reg, UMAC_CMD);
1353
1354         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1355          * to be processed (1 msec).
1356          */
1357         if (enable == 0)
1358                 usleep_range(1000, 2000);
1359 }
1360
1361 static inline void umac_reset(struct bcm_sysport_priv *priv)
1362 {
1363         u32 reg;
1364
1365         reg = umac_readl(priv, UMAC_CMD);
1366         reg |= CMD_SW_RESET;
1367         umac_writel(priv, reg, UMAC_CMD);
1368         udelay(10);
1369         reg = umac_readl(priv, UMAC_CMD);
1370         reg &= ~CMD_SW_RESET;
1371         umac_writel(priv, reg, UMAC_CMD);
1372 }
1373
1374 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1375                              unsigned char *addr)
1376 {
1377         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1378                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1379         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1380 }
1381
1382 static void topctrl_flush(struct bcm_sysport_priv *priv)
1383 {
1384         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1385         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1386         mdelay(1);
1387         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1388         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1389 }
1390
1391 static void bcm_sysport_netif_start(struct net_device *dev)
1392 {
1393         struct bcm_sysport_priv *priv = netdev_priv(dev);
1394
1395         /* Enable NAPI */
1396         napi_enable(&priv->napi);
1397
1398         phy_start(priv->phydev);
1399
1400         /* Enable TX interrupts for the 32 TXQs */
1401         intrl2_1_mask_clear(priv, 0xffffffff);
1402
1403         /* Last call before we start the real business */
1404         netif_tx_start_all_queues(dev);
1405 }
1406
1407 static void rbuf_init(struct bcm_sysport_priv *priv)
1408 {
1409         u32 reg;
1410
1411         reg = rbuf_readl(priv, RBUF_CONTROL);
1412         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1413         rbuf_writel(priv, reg, RBUF_CONTROL);
1414 }
1415
1416 static int bcm_sysport_open(struct net_device *dev)
1417 {
1418         struct bcm_sysport_priv *priv = netdev_priv(dev);
1419         unsigned int i;
1420         int ret;
1421
1422         /* Reset UniMAC */
1423         umac_reset(priv);
1424
1425         /* Flush TX and RX FIFOs at TOPCTRL level */
1426         topctrl_flush(priv);
1427
1428         /* Disable the UniMAC RX/TX */
1429         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1430
1431         /* Enable RBUF 2bytes alignment and Receive Status Block */
1432         rbuf_init(priv);
1433
1434         /* Set maximum frame length */
1435         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1436
1437         /* Set MAC address */
1438         umac_set_hw_addr(priv, dev->dev_addr);
1439
1440         /* Read CRC forward */
1441         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1442
1443         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1444                                         0, priv->phy_interface);
1445         if (!priv->phydev) {
1446                 netdev_err(dev, "could not attach to PHY\n");
1447                 return -ENODEV;
1448         }
1449
1450         /* Reset house keeping link status */
1451         priv->old_duplex = -1;
1452         priv->old_link = -1;
1453         priv->old_pause = -1;
1454
1455         /* mask all interrupts and request them */
1456         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1457         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1458         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1459         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1460         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1461         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1462
1463         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1464         if (ret) {
1465                 netdev_err(dev, "failed to request RX interrupt\n");
1466                 goto out_phy_disconnect;
1467         }
1468
1469         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1470         if (ret) {
1471                 netdev_err(dev, "failed to request TX interrupt\n");
1472                 goto out_free_irq0;
1473         }
1474
1475         /* Initialize both hardware and software ring */
1476         for (i = 0; i < dev->num_tx_queues; i++) {
1477                 ret = bcm_sysport_init_tx_ring(priv, i);
1478                 if (ret) {
1479                         netdev_err(dev, "failed to initialize TX ring %d\n",
1480                                    i);
1481                         goto out_free_tx_ring;
1482                 }
1483         }
1484
1485         /* Initialize linked-list */
1486         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1487
1488         /* Initialize RX ring */
1489         ret = bcm_sysport_init_rx_ring(priv);
1490         if (ret) {
1491                 netdev_err(dev, "failed to initialize RX ring\n");
1492                 goto out_free_rx_ring;
1493         }
1494
1495         /* Turn on RDMA */
1496         ret = rdma_enable_set(priv, 1);
1497         if (ret)
1498                 goto out_free_rx_ring;
1499
1500         /* Enable RX interrupt and TX ring full interrupt */
1501         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1502
1503         /* Turn on TDMA */
1504         ret = tdma_enable_set(priv, 1);
1505         if (ret)
1506                 goto out_clear_rx_int;
1507
1508         /* Turn on UniMAC TX/RX */
1509         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1510
1511         bcm_sysport_netif_start(dev);
1512
1513         return 0;
1514
1515 out_clear_rx_int:
1516         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1517 out_free_rx_ring:
1518         bcm_sysport_fini_rx_ring(priv);
1519 out_free_tx_ring:
1520         for (i = 0; i < dev->num_tx_queues; i++)
1521                 bcm_sysport_fini_tx_ring(priv, i);
1522         free_irq(priv->irq1, dev);
1523 out_free_irq0:
1524         free_irq(priv->irq0, dev);
1525 out_phy_disconnect:
1526         phy_disconnect(priv->phydev);
1527         return ret;
1528 }
1529
1530 static void bcm_sysport_netif_stop(struct net_device *dev)
1531 {
1532         struct bcm_sysport_priv *priv = netdev_priv(dev);
1533
1534         /* stop all software from updating hardware */
1535         netif_tx_stop_all_queues(dev);
1536         napi_disable(&priv->napi);
1537         phy_stop(priv->phydev);
1538
1539         /* mask all interrupts */
1540         intrl2_0_mask_set(priv, 0xffffffff);
1541         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1542         intrl2_1_mask_set(priv, 0xffffffff);
1543         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1544 }
1545
1546 static int bcm_sysport_stop(struct net_device *dev)
1547 {
1548         struct bcm_sysport_priv *priv = netdev_priv(dev);
1549         unsigned int i;
1550         int ret;
1551
1552         bcm_sysport_netif_stop(dev);
1553
1554         /* Disable UniMAC RX */
1555         umac_enable_set(priv, CMD_RX_EN, 0);
1556
1557         ret = tdma_enable_set(priv, 0);
1558         if (ret) {
1559                 netdev_err(dev, "timeout disabling RDMA\n");
1560                 return ret;
1561         }
1562
1563         /* Wait for a maximum packet size to be drained */
1564         usleep_range(2000, 3000);
1565
1566         ret = rdma_enable_set(priv, 0);
1567         if (ret) {
1568                 netdev_err(dev, "timeout disabling TDMA\n");
1569                 return ret;
1570         }
1571
1572         /* Disable UniMAC TX */
1573         umac_enable_set(priv, CMD_TX_EN, 0);
1574
1575         /* Free RX/TX rings SW structures */
1576         for (i = 0; i < dev->num_tx_queues; i++)
1577                 bcm_sysport_fini_tx_ring(priv, i);
1578         bcm_sysport_fini_rx_ring(priv);
1579
1580         free_irq(priv->irq0, dev);
1581         free_irq(priv->irq1, dev);
1582
1583         /* Disconnect from PHY */
1584         phy_disconnect(priv->phydev);
1585
1586         return 0;
1587 }
1588
1589 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1590         .get_settings           = bcm_sysport_get_settings,
1591         .set_settings           = bcm_sysport_set_settings,
1592         .get_drvinfo            = bcm_sysport_get_drvinfo,
1593         .get_msglevel           = bcm_sysport_get_msglvl,
1594         .set_msglevel           = bcm_sysport_set_msglvl,
1595         .get_link               = ethtool_op_get_link,
1596         .get_strings            = bcm_sysport_get_strings,
1597         .get_ethtool_stats      = bcm_sysport_get_stats,
1598         .get_sset_count         = bcm_sysport_get_sset_count,
1599         .get_wol                = bcm_sysport_get_wol,
1600         .set_wol                = bcm_sysport_set_wol,
1601 };
1602
1603 static const struct net_device_ops bcm_sysport_netdev_ops = {
1604         .ndo_start_xmit         = bcm_sysport_xmit,
1605         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1606         .ndo_open               = bcm_sysport_open,
1607         .ndo_stop               = bcm_sysport_stop,
1608         .ndo_set_features       = bcm_sysport_set_features,
1609         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1610 };
1611
1612 #define REV_FMT "v%2x.%02x"
1613
1614 static int bcm_sysport_probe(struct platform_device *pdev)
1615 {
1616         struct bcm_sysport_priv *priv;
1617         struct device_node *dn;
1618         struct net_device *dev;
1619         const void *macaddr;
1620         struct resource *r;
1621         u32 txq, rxq;
1622         int ret;
1623
1624         dn = pdev->dev.of_node;
1625         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1626
1627         /* Read the Transmit/Receive Queue properties */
1628         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1629                 txq = TDMA_NUM_RINGS;
1630         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1631                 rxq = 1;
1632
1633         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1634         if (!dev)
1635                 return -ENOMEM;
1636
1637         /* Initialize private members */
1638         priv = netdev_priv(dev);
1639
1640         priv->irq0 = platform_get_irq(pdev, 0);
1641         priv->irq1 = platform_get_irq(pdev, 1);
1642         priv->wol_irq = platform_get_irq(pdev, 2);
1643         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1644                 dev_err(&pdev->dev, "invalid interrupts\n");
1645                 ret = -EINVAL;
1646                 goto err;
1647         }
1648
1649         priv->base = devm_ioremap_resource(&pdev->dev, r);
1650         if (IS_ERR(priv->base)) {
1651                 ret = PTR_ERR(priv->base);
1652                 goto err;
1653         }
1654
1655         priv->netdev = dev;
1656         priv->pdev = pdev;
1657
1658         priv->phy_interface = of_get_phy_mode(dn);
1659         /* Default to GMII interface mode */
1660         if (priv->phy_interface < 0)
1661                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1662
1663         /* In the case of a fixed PHY, the DT node associated
1664          * to the PHY is the Ethernet MAC DT node.
1665          */
1666         if (of_phy_is_fixed_link(dn)) {
1667                 ret = of_phy_register_fixed_link(dn);
1668                 if (ret) {
1669                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1670                         goto err;
1671                 }
1672
1673                 priv->phy_dn = dn;
1674         }
1675
1676         /* Initialize netdevice members */
1677         macaddr = of_get_mac_address(dn);
1678         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1679                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1680                 random_ether_addr(dev->dev_addr);
1681         } else {
1682                 ether_addr_copy(dev->dev_addr, macaddr);
1683         }
1684
1685         SET_NETDEV_DEV(dev, &pdev->dev);
1686         dev_set_drvdata(&pdev->dev, dev);
1687         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1688         dev->netdev_ops = &bcm_sysport_netdev_ops;
1689         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1690
1691         /* HW supported features, none enabled by default */
1692         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1693                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1694
1695         /* Request the WOL interrupt and advertise suspend if available */
1696         priv->wol_irq_disabled = 1;
1697         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1698                                bcm_sysport_wol_isr, 0, dev->name, priv);
1699         if (!ret)
1700                 device_set_wakeup_capable(&pdev->dev, 1);
1701
1702         /* Set the needed headroom once and for all */
1703         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1704         dev->needed_headroom += sizeof(struct bcm_tsb);
1705
1706         /* libphy will adjust the link state accordingly */
1707         netif_carrier_off(dev);
1708
1709         ret = register_netdev(dev);
1710         if (ret) {
1711                 dev_err(&pdev->dev, "failed to register net_device\n");
1712                 goto err;
1713         }
1714
1715         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1716         dev_info(&pdev->dev,
1717                  "Broadcom SYSTEMPORT" REV_FMT
1718                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1719                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1720                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1721
1722         return 0;
1723 err:
1724         free_netdev(dev);
1725         return ret;
1726 }
1727
1728 static int bcm_sysport_remove(struct platform_device *pdev)
1729 {
1730         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1731
1732         /* Not much to do, ndo_close has been called
1733          * and we use managed allocations
1734          */
1735         unregister_netdev(dev);
1736         free_netdev(dev);
1737         dev_set_drvdata(&pdev->dev, NULL);
1738
1739         return 0;
1740 }
1741
1742 #ifdef CONFIG_PM_SLEEP
1743 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1744 {
1745         struct net_device *ndev = priv->netdev;
1746         unsigned int timeout = 1000;
1747         u32 reg;
1748
1749         /* Password has already been programmed */
1750         reg = umac_readl(priv, UMAC_MPD_CTRL);
1751         reg |= MPD_EN;
1752         reg &= ~PSW_EN;
1753         if (priv->wolopts & WAKE_MAGICSECURE)
1754                 reg |= PSW_EN;
1755         umac_writel(priv, reg, UMAC_MPD_CTRL);
1756
1757         /* Make sure RBUF entered WoL mode as result */
1758         do {
1759                 reg = rbuf_readl(priv, RBUF_STATUS);
1760                 if (reg & RBUF_WOL_MODE)
1761                         break;
1762
1763                 udelay(10);
1764         } while (timeout-- > 0);
1765
1766         /* Do not leave the UniMAC RBUF matching only MPD packets */
1767         if (!timeout) {
1768                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1769                 reg &= ~MPD_EN;
1770                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1771                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1772                 return -ETIMEDOUT;
1773         }
1774
1775         /* UniMAC receive needs to be turned on */
1776         umac_enable_set(priv, CMD_RX_EN, 1);
1777
1778         /* Enable the interrupt wake-up source */
1779         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1780
1781         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1782
1783         return 0;
1784 }
1785
1786 static int bcm_sysport_suspend(struct device *d)
1787 {
1788         struct net_device *dev = dev_get_drvdata(d);
1789         struct bcm_sysport_priv *priv = netdev_priv(dev);
1790         unsigned int i;
1791         int ret = 0;
1792         u32 reg;
1793
1794         if (!netif_running(dev))
1795                 return 0;
1796
1797         bcm_sysport_netif_stop(dev);
1798
1799         phy_suspend(priv->phydev);
1800
1801         netif_device_detach(dev);
1802
1803         /* Disable UniMAC RX */
1804         umac_enable_set(priv, CMD_RX_EN, 0);
1805
1806         ret = rdma_enable_set(priv, 0);
1807         if (ret) {
1808                 netdev_err(dev, "RDMA timeout!\n");
1809                 return ret;
1810         }
1811
1812         /* Disable RXCHK if enabled */
1813         if (priv->rx_chk_en) {
1814                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1815                 reg &= ~RXCHK_EN;
1816                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1817         }
1818
1819         /* Flush RX pipe */
1820         if (!priv->wolopts)
1821                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1822
1823         ret = tdma_enable_set(priv, 0);
1824         if (ret) {
1825                 netdev_err(dev, "TDMA timeout!\n");
1826                 return ret;
1827         }
1828
1829         /* Wait for a packet boundary */
1830         usleep_range(2000, 3000);
1831
1832         umac_enable_set(priv, CMD_TX_EN, 0);
1833
1834         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1835
1836         /* Free RX/TX rings SW structures */
1837         for (i = 0; i < dev->num_tx_queues; i++)
1838                 bcm_sysport_fini_tx_ring(priv, i);
1839         bcm_sysport_fini_rx_ring(priv);
1840
1841         /* Get prepared for Wake-on-LAN */
1842         if (device_may_wakeup(d) && priv->wolopts)
1843                 ret = bcm_sysport_suspend_to_wol(priv);
1844
1845         return ret;
1846 }
1847
1848 static int bcm_sysport_resume(struct device *d)
1849 {
1850         struct net_device *dev = dev_get_drvdata(d);
1851         struct bcm_sysport_priv *priv = netdev_priv(dev);
1852         unsigned int i;
1853         u32 reg;
1854         int ret;
1855
1856         if (!netif_running(dev))
1857                 return 0;
1858
1859         /* We may have been suspended and never received a WOL event that
1860          * would turn off MPD detection, take care of that now
1861          */
1862         bcm_sysport_resume_from_wol(priv);
1863
1864         /* Initialize both hardware and software ring */
1865         for (i = 0; i < dev->num_tx_queues; i++) {
1866                 ret = bcm_sysport_init_tx_ring(priv, i);
1867                 if (ret) {
1868                         netdev_err(dev, "failed to initialize TX ring %d\n",
1869                                    i);
1870                         goto out_free_tx_rings;
1871                 }
1872         }
1873
1874         /* Initialize linked-list */
1875         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1876
1877         /* Initialize RX ring */
1878         ret = bcm_sysport_init_rx_ring(priv);
1879         if (ret) {
1880                 netdev_err(dev, "failed to initialize RX ring\n");
1881                 goto out_free_rx_ring;
1882         }
1883
1884         netif_device_attach(dev);
1885
1886         /* Enable RX interrupt and TX ring full interrupt */
1887         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1888
1889         /* RX pipe enable */
1890         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1891
1892         ret = rdma_enable_set(priv, 1);
1893         if (ret) {
1894                 netdev_err(dev, "failed to enable RDMA\n");
1895                 goto out_free_rx_ring;
1896         }
1897
1898         /* Enable rxhck */
1899         if (priv->rx_chk_en) {
1900                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1901                 reg |= RXCHK_EN;
1902                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1903         }
1904
1905         rbuf_init(priv);
1906
1907         /* Set maximum frame length */
1908         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1909
1910         /* Set MAC address */
1911         umac_set_hw_addr(priv, dev->dev_addr);
1912
1913         umac_enable_set(priv, CMD_RX_EN, 1);
1914
1915         /* TX pipe enable */
1916         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1917
1918         umac_enable_set(priv, CMD_TX_EN, 1);
1919
1920         ret = tdma_enable_set(priv, 1);
1921         if (ret) {
1922                 netdev_err(dev, "TDMA timeout!\n");
1923                 goto out_free_rx_ring;
1924         }
1925
1926         phy_resume(priv->phydev);
1927
1928         bcm_sysport_netif_start(dev);
1929
1930         return 0;
1931
1932 out_free_rx_ring:
1933         bcm_sysport_fini_rx_ring(priv);
1934 out_free_tx_rings:
1935         for (i = 0; i < dev->num_tx_queues; i++)
1936                 bcm_sysport_fini_tx_ring(priv, i);
1937         return ret;
1938 }
1939 #endif
1940
1941 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
1942                 bcm_sysport_suspend, bcm_sysport_resume);
1943
1944 static const struct of_device_id bcm_sysport_of_match[] = {
1945         { .compatible = "brcm,systemport-v1.00" },
1946         { .compatible = "brcm,systemport" },
1947         { /* sentinel */ }
1948 };
1949
1950 static struct platform_driver bcm_sysport_driver = {
1951         .probe  = bcm_sysport_probe,
1952         .remove = bcm_sysport_remove,
1953         .driver =  {
1954                 .name = "brcm-systemport",
1955                 .owner = THIS_MODULE,
1956                 .of_match_table = bcm_sysport_of_match,
1957                 .pm = &bcm_sysport_pm_ops,
1958         },
1959 };
1960 module_platform_driver(bcm_sysport_driver);
1961
1962 MODULE_AUTHOR("Broadcom Corporation");
1963 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1964 MODULE_ALIAS("platform:brcm-systemport");
1965 MODULE_LICENSE("GPL");