1 /* Applied Micro X-Gene SoC Ethernet Driver
3 * Copyright (c) 2014, Applied Micro Circuits Corporation
4 * Authors: Iyappan Subramanian <isubramanian@apm.com>
5 * Ravi Patel <rapatel@apm.com>
6 * Keyur Chudgar <kchudgar@apm.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef __XGENE_ENET_MAIN_H__
23 #define __XGENE_ENET_MAIN_H__
25 #include <linux/acpi.h>
26 #include <linux/clk.h>
27 #include <linux/efi.h>
28 #include <linux/irq.h>
30 #include <linux/of_platform.h>
31 #include <linux/of_net.h>
32 #include <linux/of_mdio.h>
33 #include <linux/module.h>
35 #include <linux/prefetch.h>
36 #include <linux/if_vlan.h>
37 #include <linux/phy.h>
38 #include "xgene_enet_hw.h"
39 #include "xgene_enet_ring2.h"
41 #define XGENE_DRV_VERSION "v1.0"
42 #define XGENE_ENET_MAX_MTU 1536
43 #define SKB_BUFFER_SIZE (XGENE_ENET_MAX_MTU - NET_IP_ALIGN)
44 #define BUFLEN_16K (16 * 1024)
45 #define NUM_PKT_BUF 64
46 #define NUM_BUFPOOL 32
47 #define MAX_EXP_BUFFS 256
48 #define XGENE_ENET_MSS 1448
49 #define XGENE_MIN_ENET_FRAME_SIZE 60
51 #define START_CPU_BUFNUM_0 0
52 #define START_ETH_BUFNUM_0 2
53 #define START_BP_BUFNUM_0 0x22
54 #define START_RING_NUM_0 8
55 #define START_CPU_BUFNUM_1 12
56 #define START_ETH_BUFNUM_1 10
57 #define START_BP_BUFNUM_1 0x2A
58 #define START_RING_NUM_1 264
60 #define XG_START_CPU_BUFNUM_1 12
61 #define XG_START_ETH_BUFNUM_1 2
62 #define XG_START_BP_BUFNUM_1 0x22
63 #define XG_START_RING_NUM_1 264
65 #define X2_START_CPU_BUFNUM_0 0
66 #define X2_START_ETH_BUFNUM_0 0
67 #define X2_START_BP_BUFNUM_0 0x20
68 #define X2_START_RING_NUM_0 0
69 #define X2_START_CPU_BUFNUM_1 0xc
70 #define X2_START_ETH_BUFNUM_1 0
71 #define X2_START_BP_BUFNUM_1 0x20
72 #define X2_START_RING_NUM_1 256
74 #define IRQ_ID_SIZE 16
75 #define XGENE_MAX_TXC_RINGS 1
77 #define PHY_POLL_LINK_ON (10 * HZ)
78 #define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5)
85 /* software context of a descriptor ring */
86 struct xgene_enet_desc_ring {
87 struct net_device *ndev;
95 char irq_name[IRQ_ID_SIZE];
97 u32 state[X2_NUM_RING_CONFIG];
98 void __iomem *cmd_base;
101 dma_addr_t irq_mbox_dma;
105 struct sk_buff *(*rx_skb);
106 struct sk_buff *(*cp_skb);
107 dma_addr_t *frag_dma_addr;
108 enum xgene_enet_ring_cfgsize cfgsize;
109 struct xgene_enet_desc_ring *cp_ring;
110 struct xgene_enet_desc_ring *buf_pool;
111 struct napi_struct napi;
114 struct xgene_enet_raw_desc *raw_desc;
115 struct xgene_enet_raw_desc16 *raw_desc16;
120 struct xgene_mac_ops {
121 void (*init)(struct xgene_enet_pdata *pdata);
122 void (*reset)(struct xgene_enet_pdata *pdata);
123 void (*tx_enable)(struct xgene_enet_pdata *pdata);
124 void (*rx_enable)(struct xgene_enet_pdata *pdata);
125 void (*tx_disable)(struct xgene_enet_pdata *pdata);
126 void (*rx_disable)(struct xgene_enet_pdata *pdata);
127 void (*set_mac_addr)(struct xgene_enet_pdata *pdata);
128 void (*set_mss)(struct xgene_enet_pdata *pdata);
129 void (*link_state)(struct work_struct *work);
132 struct xgene_port_ops {
133 int (*reset)(struct xgene_enet_pdata *pdata);
134 void (*cle_bypass)(struct xgene_enet_pdata *pdata,
135 u32 dst_ring_num, u16 bufpool_id);
136 void (*shutdown)(struct xgene_enet_pdata *pdata);
139 struct xgene_ring_ops {
141 u8 num_ring_id_shift;
142 struct xgene_enet_desc_ring * (*setup)(struct xgene_enet_desc_ring *);
143 void (*clear)(struct xgene_enet_desc_ring *);
144 void (*wr_cmd)(struct xgene_enet_desc_ring *, int);
145 u32 (*len)(struct xgene_enet_desc_ring *);
148 /* ethernet private data */
149 struct xgene_enet_pdata {
150 struct net_device *ndev;
151 struct mii_bus *mdio_bus;
152 struct phy_device *phy_dev;
155 struct platform_device *pdev;
156 enum xgene_enet_id enet_id;
157 struct xgene_enet_desc_ring *tx_ring;
158 struct xgene_enet_desc_ring *rx_ring;
167 void __iomem *eth_csr_addr;
168 void __iomem *eth_ring_if_addr;
169 void __iomem *eth_diag_csr_addr;
170 void __iomem *mcx_mac_addr;
171 void __iomem *mcx_mac_csr_addr;
172 void __iomem *base_addr;
173 void __iomem *ring_csr_addr;
174 void __iomem *ring_cmd_addr;
176 enum xgene_enet_rm rm;
177 struct rtnl_link_stats64 stats;
178 const struct xgene_mac_ops *mac_ops;
179 const struct xgene_port_ops *port_ops;
180 struct xgene_ring_ops *ring_ops;
181 struct delayed_work link_work;
192 struct xgene_indirect_ctl {
196 void __iomem *cmd_done;
199 /* Set the specified value into a bit-field defined by its starting position
200 * and length within a single u64.
202 static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val)
204 return (val & ((1ULL << len) - 1)) << pos;
207 #define SET_VAL(field, val) \
208 xgene_enet_set_field_value(field ## _POS, field ## _LEN, val)
210 #define SET_BIT(field) \
211 xgene_enet_set_field_value(field ## _POS, 1, 1)
213 /* Get the value from a bit-field defined by its starting position
214 * and length within the specified u64.
216 static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src)
218 return (src >> pos) & ((1ULL << len) - 1);
221 #define GET_VAL(field, src) \
222 xgene_enet_get_field_value(field ## _POS, field ## _LEN, src)
224 #define GET_BIT(field, src) \
225 xgene_enet_get_field_value(field ## _POS, 1, src)
227 static inline struct device *ndev_to_dev(struct net_device *ndev)
229 return ndev->dev.parent;
232 void xgene_enet_set_ethtool_ops(struct net_device *netdev);
234 #endif /* __XGENE_ENET_MAIN_H__ */