1 /* Applied Micro X-Gene SoC Ethernet Driver
3 * Copyright (c) 2014, Applied Micro Circuits Corporation
4 * Authors: Iyappan Subramanian <isubramanian@apm.com>
5 * Ravi Patel <rapatel@apm.com>
6 * Keyur Chudgar <kchudgar@apm.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "xgene_enet_main.h"
23 #include "xgene_enet_hw.h"
24 #include "xgene_enet_sgmac.h"
25 #include "xgene_enet_xgmac.h"
27 #define RES_ENET_CSR 0
28 #define RES_RING_CSR 1
29 #define RES_RING_CMD 2
31 static const struct of_device_id xgene_enet_of_match[];
33 static void xgene_enet_init_bufpool(struct xgene_enet_desc_ring *buf_pool)
35 struct xgene_enet_raw_desc16 *raw_desc;
38 for (i = 0; i < buf_pool->slots; i++) {
39 raw_desc = &buf_pool->raw_desc16[i];
41 /* Hardware expects descriptor in little endian format */
42 raw_desc->m0 = cpu_to_le64(i |
43 SET_VAL(FPQNUM, buf_pool->dst_ring_num) |
48 static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
52 struct xgene_enet_raw_desc16 *raw_desc;
53 struct xgene_enet_pdata *pdata;
54 struct net_device *ndev;
57 u32 tail = buf_pool->tail;
58 u32 slots = buf_pool->slots - 1;
62 ndev = buf_pool->ndev;
63 dev = ndev_to_dev(buf_pool->ndev);
64 pdata = netdev_priv(ndev);
65 bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE & GENMASK(11, 0));
66 len = XGENE_ENET_MAX_MTU;
68 for (i = 0; i < nbuf; i++) {
69 raw_desc = &buf_pool->raw_desc16[tail];
71 skb = netdev_alloc_skb_ip_align(ndev, len);
74 buf_pool->rx_skb[tail] = skb;
76 dma_addr = dma_map_single(dev, skb->data, len, DMA_FROM_DEVICE);
77 if (dma_mapping_error(dev, dma_addr)) {
78 netdev_err(ndev, "DMA mapping error\n");
79 dev_kfree_skb_any(skb);
83 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
84 SET_VAL(BUFDATALEN, bufdatalen) |
86 tail = (tail + 1) & slots;
89 pdata->ring_ops->wr_cmd(buf_pool, nbuf);
90 buf_pool->tail = tail;
95 static u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)
97 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
99 return ((u16)pdata->rm << 10) | ring->num;
102 static u8 xgene_enet_hdr_len(const void *data)
104 const struct ethhdr *eth = data;
106 return (eth->h_proto == htons(ETH_P_8021Q)) ? VLAN_ETH_HLEN : ETH_HLEN;
109 static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
111 struct xgene_enet_pdata *pdata = netdev_priv(buf_pool->ndev);
112 struct xgene_enet_raw_desc16 *raw_desc;
113 u32 slots = buf_pool->slots - 1;
114 u32 tail = buf_pool->tail;
118 len = pdata->ring_ops->len(buf_pool);
119 for (i = 0; i < len; i++) {
120 tail = (tail - 1) & slots;
121 raw_desc = &buf_pool->raw_desc16[tail];
123 /* Hardware stores descriptor in little endian format */
124 userinfo = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
125 dev_kfree_skb_any(buf_pool->rx_skb[userinfo]);
128 pdata->ring_ops->wr_cmd(buf_pool, -len);
129 buf_pool->tail = tail;
132 static irqreturn_t xgene_enet_rx_irq(const int irq, void *data)
134 struct xgene_enet_desc_ring *rx_ring = data;
136 if (napi_schedule_prep(&rx_ring->napi)) {
137 disable_irq_nosync(irq);
138 __napi_schedule(&rx_ring->napi);
144 static int xgene_enet_tx_completion(struct xgene_enet_desc_ring *cp_ring,
145 struct xgene_enet_raw_desc *raw_desc)
153 skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
154 skb = cp_ring->cp_skb[skb_index];
156 dev = ndev_to_dev(cp_ring->ndev);
157 dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
158 GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1)),
161 /* Checking for error */
162 status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
163 if (unlikely(status > 2)) {
164 xgene_enet_parse_error(cp_ring, netdev_priv(cp_ring->ndev),
170 dev_kfree_skb_any(skb);
172 netdev_err(cp_ring->ndev, "completion skb is NULL\n");
179 static u64 xgene_enet_work_msg(struct sk_buff *skb)
182 u8 l3hlen, l4hlen = 0;
188 if (unlikely(skb->protocol != htons(ETH_P_IP)) &&
189 unlikely(skb->protocol != htons(ETH_P_8021Q)))
192 if (unlikely(!(skb->dev->features & NETIF_F_IP_CSUM)))
196 if (unlikely(ip_is_fragment(iph)))
199 if (likely(iph->protocol == IPPROTO_TCP)) {
200 l4hlen = tcp_hdrlen(skb) >> 2;
202 proto = TSO_IPPROTO_TCP;
203 } else if (iph->protocol == IPPROTO_UDP) {
204 l4hlen = UDP_HDR_SIZE;
208 l3hlen = ip_hdrlen(skb) >> 2;
209 ethhdr = xgene_enet_hdr_len(skb->data);
210 hopinfo = SET_VAL(TCPHDR, l4hlen) |
211 SET_VAL(IPHDR, l3hlen) |
212 SET_VAL(ETHHDR, ethhdr) |
213 SET_VAL(EC, csum_enable) |
216 SET_BIT(TYPE_ETH_WORK_MESSAGE);
221 static int xgene_enet_setup_tx_desc(struct xgene_enet_desc_ring *tx_ring,
224 struct device *dev = ndev_to_dev(tx_ring->ndev);
225 struct xgene_enet_raw_desc *raw_desc;
227 u16 tail = tx_ring->tail;
230 raw_desc = &tx_ring->raw_desc[tail];
231 memset(raw_desc, 0, sizeof(struct xgene_enet_raw_desc));
233 dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
234 if (dma_mapping_error(dev, dma_addr)) {
235 netdev_err(tx_ring->ndev, "DMA mapping error\n");
239 /* Hardware expects descriptor in little endian format */
240 raw_desc->m0 = cpu_to_le64(tail);
241 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
242 SET_VAL(BUFDATALEN, skb->len) |
244 hopinfo = xgene_enet_work_msg(skb);
245 raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) |
247 tx_ring->cp_ring->cp_skb[tail] = skb;
252 static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
253 struct net_device *ndev)
255 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
256 struct xgene_enet_desc_ring *tx_ring = pdata->tx_ring;
257 struct xgene_enet_desc_ring *cp_ring = tx_ring->cp_ring;
258 u32 tx_level, cq_level;
260 tx_level = pdata->ring_ops->len(tx_ring);
261 cq_level = pdata->ring_ops->len(cp_ring);
262 if (unlikely(tx_level > pdata->tx_qcnt_hi ||
263 cq_level > pdata->cp_qcnt_hi)) {
264 netif_stop_queue(ndev);
265 return NETDEV_TX_BUSY;
268 if (xgene_enet_setup_tx_desc(tx_ring, skb)) {
269 dev_kfree_skb_any(skb);
273 pdata->ring_ops->wr_cmd(tx_ring, 1);
274 skb_tx_timestamp(skb);
275 tx_ring->tail = (tx_ring->tail + 1) & (tx_ring->slots - 1);
277 pdata->stats.tx_packets++;
278 pdata->stats.tx_bytes += skb->len;
283 static void xgene_enet_skip_csum(struct sk_buff *skb)
285 struct iphdr *iph = ip_hdr(skb);
287 if (!ip_is_fragment(iph) ||
288 (iph->protocol != IPPROTO_TCP && iph->protocol != IPPROTO_UDP)) {
289 skb->ip_summed = CHECKSUM_UNNECESSARY;
293 static int xgene_enet_rx_frame(struct xgene_enet_desc_ring *rx_ring,
294 struct xgene_enet_raw_desc *raw_desc)
296 struct net_device *ndev;
297 struct xgene_enet_pdata *pdata;
299 struct xgene_enet_desc_ring *buf_pool;
300 u32 datalen, skb_index;
305 ndev = rx_ring->ndev;
306 pdata = netdev_priv(ndev);
307 dev = ndev_to_dev(rx_ring->ndev);
308 buf_pool = rx_ring->buf_pool;
310 dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
311 XGENE_ENET_MAX_MTU, DMA_FROM_DEVICE);
312 skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
313 skb = buf_pool->rx_skb[skb_index];
315 /* checking for error */
316 status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
317 if (unlikely(status > 2)) {
318 dev_kfree_skb_any(skb);
319 xgene_enet_parse_error(rx_ring, netdev_priv(rx_ring->ndev),
321 pdata->stats.rx_dropped++;
326 /* strip off CRC as HW isn't doing this */
327 datalen = GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1));
329 prefetch(skb->data - NET_IP_ALIGN);
330 skb_put(skb, datalen);
332 skb_checksum_none_assert(skb);
333 skb->protocol = eth_type_trans(skb, ndev);
334 if (likely((ndev->features & NETIF_F_IP_CSUM) &&
335 skb->protocol == htons(ETH_P_IP))) {
336 xgene_enet_skip_csum(skb);
339 pdata->stats.rx_packets++;
340 pdata->stats.rx_bytes += datalen;
341 napi_gro_receive(&rx_ring->napi, skb);
343 if (--rx_ring->nbufpool == 0) {
344 ret = xgene_enet_refill_bufpool(buf_pool, NUM_BUFPOOL);
345 rx_ring->nbufpool = NUM_BUFPOOL;
351 static bool is_rx_desc(struct xgene_enet_raw_desc *raw_desc)
353 return GET_VAL(FPQNUM, le64_to_cpu(raw_desc->m0)) ? true : false;
356 static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,
359 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
360 struct xgene_enet_raw_desc *raw_desc;
361 u16 head = ring->head;
362 u16 slots = ring->slots - 1;
366 raw_desc = &ring->raw_desc[head];
367 if (unlikely(xgene_enet_is_desc_slot_empty(raw_desc)))
370 /* read fpqnum field after dataaddr field */
372 if (is_rx_desc(raw_desc))
373 ret = xgene_enet_rx_frame(ring, raw_desc);
375 ret = xgene_enet_tx_completion(ring, raw_desc);
376 xgene_enet_mark_desc_slot_empty(raw_desc);
378 head = (head + 1) & slots;
386 pdata->ring_ops->wr_cmd(ring, -count);
389 if (netif_queue_stopped(ring->ndev)) {
390 if (pdata->ring_ops->len(ring) < pdata->cp_qcnt_low)
391 netif_wake_queue(ring->ndev);
398 static int xgene_enet_napi(struct napi_struct *napi, const int budget)
400 struct xgene_enet_desc_ring *ring;
403 ring = container_of(napi, struct xgene_enet_desc_ring, napi);
404 processed = xgene_enet_process_ring(ring, budget);
406 if (processed != budget) {
408 enable_irq(ring->irq);
414 static void xgene_enet_timeout(struct net_device *ndev)
416 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
418 pdata->mac_ops->reset(pdata);
421 static int xgene_enet_register_irq(struct net_device *ndev)
423 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
424 struct device *dev = ndev_to_dev(ndev);
425 struct xgene_enet_desc_ring *ring;
428 ring = pdata->rx_ring;
429 ret = devm_request_irq(dev, ring->irq, xgene_enet_rx_irq,
430 IRQF_SHARED, ring->irq_name, ring);
432 netdev_err(ndev, "Failed to request irq %s\n", ring->irq_name);
435 ring = pdata->tx_ring->cp_ring;
436 ret = devm_request_irq(dev, ring->irq, xgene_enet_rx_irq,
437 IRQF_SHARED, ring->irq_name, ring);
439 netdev_err(ndev, "Failed to request irq %s\n",
447 static void xgene_enet_free_irq(struct net_device *ndev)
449 struct xgene_enet_pdata *pdata;
452 pdata = netdev_priv(ndev);
453 dev = ndev_to_dev(ndev);
454 devm_free_irq(dev, pdata->rx_ring->irq, pdata->rx_ring);
457 devm_free_irq(dev, pdata->tx_ring->cp_ring->irq,
458 pdata->tx_ring->cp_ring);
462 static void xgene_enet_napi_enable(struct xgene_enet_pdata *pdata)
464 struct napi_struct *napi;
466 napi = &pdata->rx_ring->napi;
470 napi = &pdata->tx_ring->cp_ring->napi;
475 static void xgene_enet_napi_disable(struct xgene_enet_pdata *pdata)
477 struct napi_struct *napi;
479 napi = &pdata->rx_ring->napi;
483 napi = &pdata->tx_ring->cp_ring->napi;
488 static int xgene_enet_open(struct net_device *ndev)
490 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
491 struct xgene_mac_ops *mac_ops = pdata->mac_ops;
494 mac_ops->tx_enable(pdata);
495 mac_ops->rx_enable(pdata);
497 ret = xgene_enet_register_irq(ndev);
500 xgene_enet_napi_enable(pdata);
502 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
503 phy_start(pdata->phy_dev);
505 schedule_delayed_work(&pdata->link_work, PHY_POLL_LINK_OFF);
507 netif_carrier_off(ndev);
508 netif_start_queue(ndev);
513 static int xgene_enet_close(struct net_device *ndev)
515 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
516 struct xgene_mac_ops *mac_ops = pdata->mac_ops;
518 netif_stop_queue(ndev);
520 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
521 phy_stop(pdata->phy_dev);
523 cancel_delayed_work_sync(&pdata->link_work);
525 xgene_enet_napi_disable(pdata);
526 xgene_enet_free_irq(ndev);
527 xgene_enet_process_ring(pdata->rx_ring, -1);
529 mac_ops->tx_disable(pdata);
530 mac_ops->rx_disable(pdata);
535 static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)
537 struct xgene_enet_pdata *pdata;
540 pdata = netdev_priv(ring->ndev);
541 dev = ndev_to_dev(ring->ndev);
543 pdata->ring_ops->clear(ring);
544 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
547 static void xgene_enet_delete_desc_rings(struct xgene_enet_pdata *pdata)
549 struct xgene_enet_desc_ring *buf_pool;
551 if (pdata->tx_ring) {
552 xgene_enet_delete_ring(pdata->tx_ring);
553 pdata->tx_ring = NULL;
556 if (pdata->rx_ring) {
557 buf_pool = pdata->rx_ring->buf_pool;
558 xgene_enet_delete_bufpool(buf_pool);
559 xgene_enet_delete_ring(buf_pool);
560 xgene_enet_delete_ring(pdata->rx_ring);
561 pdata->rx_ring = NULL;
565 static int xgene_enet_get_ring_size(struct device *dev,
566 enum xgene_enet_ring_cfgsize cfgsize)
571 case RING_CFGSIZE_512B:
574 case RING_CFGSIZE_2KB:
577 case RING_CFGSIZE_16KB:
580 case RING_CFGSIZE_64KB:
583 case RING_CFGSIZE_512KB:
587 dev_err(dev, "Unsupported cfg ring size %d\n", cfgsize);
594 static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)
596 struct xgene_enet_pdata *pdata;
602 dev = ndev_to_dev(ring->ndev);
603 pdata = netdev_priv(ring->ndev);
605 if (ring->desc_addr) {
606 pdata->ring_ops->clear(ring);
607 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
609 devm_kfree(dev, ring);
612 static void xgene_enet_free_desc_rings(struct xgene_enet_pdata *pdata)
614 struct device *dev = &pdata->pdev->dev;
615 struct xgene_enet_desc_ring *ring;
617 ring = pdata->tx_ring;
619 if (ring->cp_ring && ring->cp_ring->cp_skb)
620 devm_kfree(dev, ring->cp_ring->cp_skb);
621 if (ring->cp_ring && pdata->cq_cnt)
622 xgene_enet_free_desc_ring(ring->cp_ring);
623 xgene_enet_free_desc_ring(ring);
626 ring = pdata->rx_ring;
628 if (ring->buf_pool) {
629 if (ring->buf_pool->rx_skb)
630 devm_kfree(dev, ring->buf_pool->rx_skb);
631 xgene_enet_free_desc_ring(ring->buf_pool);
633 xgene_enet_free_desc_ring(ring);
637 static bool is_irq_mbox_required(struct xgene_enet_pdata *pdata,
638 struct xgene_enet_desc_ring *ring)
640 if ((pdata->enet_id == XGENE_ENET2) &&
641 (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU)) {
648 static void __iomem *xgene_enet_ring_cmd_base(struct xgene_enet_pdata *pdata,
649 struct xgene_enet_desc_ring *ring)
651 u8 num_ring_id_shift = pdata->ring_ops->num_ring_id_shift;
653 return pdata->ring_cmd_addr + (ring->num << num_ring_id_shift);
656 static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(
657 struct net_device *ndev, u32 ring_num,
658 enum xgene_enet_ring_cfgsize cfgsize, u32 ring_id)
660 struct xgene_enet_desc_ring *ring;
661 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
662 struct device *dev = ndev_to_dev(ndev);
665 size = xgene_enet_get_ring_size(dev, cfgsize);
669 ring = devm_kzalloc(dev, sizeof(struct xgene_enet_desc_ring),
675 ring->num = ring_num;
676 ring->cfgsize = cfgsize;
679 ring->desc_addr = dma_zalloc_coherent(dev, size, &ring->dma,
681 if (!ring->desc_addr) {
682 devm_kfree(dev, ring);
687 if (is_irq_mbox_required(pdata, ring)) {
688 ring->irq_mbox_addr = dma_zalloc_coherent(dev, INTR_MBOX_SIZE,
689 &ring->irq_mbox_dma, GFP_KERNEL);
690 if (!ring->irq_mbox_addr) {
691 dma_free_coherent(dev, size, ring->desc_addr,
693 devm_kfree(dev, ring);
698 ring->cmd_base = xgene_enet_ring_cmd_base(pdata, ring);
699 ring->cmd = ring->cmd_base + INC_DEC_CMD_ADDR;
700 ring = pdata->ring_ops->setup(ring);
701 netdev_dbg(ndev, "ring info: num=%d size=%d id=%d slots=%d\n",
702 ring->num, ring->size, ring->id, ring->slots);
707 static u16 xgene_enet_get_ring_id(enum xgene_ring_owner owner, u8 bufnum)
709 return (owner << 6) | (bufnum & GENMASK(5, 0));
712 static enum xgene_ring_owner xgene_derive_ring_owner(struct xgene_enet_pdata *p)
714 enum xgene_ring_owner owner;
716 if (p->enet_id == XGENE_ENET1) {
717 switch (p->phy_mode) {
718 case PHY_INTERFACE_MODE_SGMII:
719 owner = RING_OWNER_ETH0;
722 owner = (!p->port_id) ? RING_OWNER_ETH0 :
727 owner = (!p->port_id) ? RING_OWNER_ETH0 : RING_OWNER_ETH1;
733 static int xgene_enet_create_desc_rings(struct net_device *ndev)
735 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
736 struct device *dev = ndev_to_dev(ndev);
737 struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;
738 struct xgene_enet_desc_ring *buf_pool = NULL;
739 enum xgene_ring_owner owner;
740 u8 cpu_bufnum = pdata->cpu_bufnum;
741 u8 eth_bufnum = pdata->eth_bufnum;
742 u8 bp_bufnum = pdata->bp_bufnum;
743 u16 ring_num = pdata->ring_num;
747 /* allocate rx descriptor ring */
748 owner = xgene_derive_ring_owner(pdata);
749 ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
750 rx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
751 RING_CFGSIZE_16KB, ring_id);
757 /* allocate buffer pool for receiving packets */
758 owner = xgene_derive_ring_owner(pdata);
759 ring_id = xgene_enet_get_ring_id(owner, bp_bufnum++);
760 buf_pool = xgene_enet_create_desc_ring(ndev, ring_num++,
761 RING_CFGSIZE_2KB, ring_id);
767 rx_ring->nbufpool = NUM_BUFPOOL;
768 rx_ring->buf_pool = buf_pool;
769 rx_ring->irq = pdata->rx_irq;
770 if (!pdata->cq_cnt) {
771 snprintf(rx_ring->irq_name, IRQ_ID_SIZE, "%s-rx-txc",
774 snprintf(rx_ring->irq_name, IRQ_ID_SIZE, "%s-rx", ndev->name);
776 buf_pool->rx_skb = devm_kcalloc(dev, buf_pool->slots,
777 sizeof(struct sk_buff *), GFP_KERNEL);
778 if (!buf_pool->rx_skb) {
783 buf_pool->dst_ring_num = xgene_enet_dst_ring_num(buf_pool);
784 rx_ring->buf_pool = buf_pool;
785 pdata->rx_ring = rx_ring;
787 /* allocate tx descriptor ring */
788 owner = xgene_derive_ring_owner(pdata);
789 ring_id = xgene_enet_get_ring_id(owner, eth_bufnum++);
790 tx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
791 RING_CFGSIZE_16KB, ring_id);
796 pdata->tx_ring = tx_ring;
798 if (!pdata->cq_cnt) {
799 cp_ring = pdata->rx_ring;
801 /* allocate tx completion descriptor ring */
802 ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
803 cp_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
810 cp_ring->irq = pdata->txc_irq;
811 snprintf(cp_ring->irq_name, IRQ_ID_SIZE, "%s-txc", ndev->name);
814 cp_ring->cp_skb = devm_kcalloc(dev, tx_ring->slots,
815 sizeof(struct sk_buff *), GFP_KERNEL);
816 if (!cp_ring->cp_skb) {
820 pdata->tx_ring->cp_ring = cp_ring;
821 pdata->tx_ring->dst_ring_num = xgene_enet_dst_ring_num(cp_ring);
823 pdata->tx_qcnt_hi = pdata->tx_ring->slots / 2;
824 pdata->cp_qcnt_hi = pdata->rx_ring->slots / 2;
825 pdata->cp_qcnt_low = pdata->cp_qcnt_hi / 2;
830 xgene_enet_free_desc_rings(pdata);
834 static struct rtnl_link_stats64 *xgene_enet_get_stats64(
835 struct net_device *ndev,
836 struct rtnl_link_stats64 *storage)
838 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
839 struct rtnl_link_stats64 *stats = &pdata->stats;
841 stats->rx_errors += stats->rx_length_errors +
842 stats->rx_crc_errors +
843 stats->rx_frame_errors +
844 stats->rx_fifo_errors;
845 memcpy(storage, &pdata->stats, sizeof(struct rtnl_link_stats64));
850 static int xgene_enet_set_mac_address(struct net_device *ndev, void *addr)
852 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
855 ret = eth_mac_addr(ndev, addr);
858 pdata->mac_ops->set_mac_addr(pdata);
863 static const struct net_device_ops xgene_ndev_ops = {
864 .ndo_open = xgene_enet_open,
865 .ndo_stop = xgene_enet_close,
866 .ndo_start_xmit = xgene_enet_start_xmit,
867 .ndo_tx_timeout = xgene_enet_timeout,
868 .ndo_get_stats64 = xgene_enet_get_stats64,
869 .ndo_change_mtu = eth_change_mtu,
870 .ndo_set_mac_address = xgene_enet_set_mac_address,
873 static int xgene_get_port_id(struct device *dev, struct xgene_enet_pdata *pdata)
878 ret = device_property_read_u32(dev, "port-id", &id);
886 pdata->port_id = id & BIT(0);
889 dev_err(dev, "Incorrect port-id specified: errno: %d\n", ret);
896 static int xgene_get_mac_address(struct device *dev,
901 ret = device_property_read_u8_array(dev, "local-mac-address", addr, 6);
903 ret = device_property_read_u8_array(dev, "mac-address",
911 static int xgene_get_phy_mode(struct device *dev)
916 ret = device_property_read_string(dev, "phy-connection-type",
917 (const char **)&modestr);
919 ret = device_property_read_string(dev, "phy-mode",
920 (const char **)&modestr);
924 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
925 if (!strcasecmp(modestr, phy_modes(i)))
931 static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
933 struct platform_device *pdev;
934 struct net_device *ndev;
936 struct resource *res;
937 void __iomem *base_addr;
945 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_ENET_CSR);
947 dev_err(dev, "Resource enet_csr not defined\n");
950 pdata->base_addr = devm_ioremap(dev, res->start, resource_size(res));
951 if (!pdata->base_addr) {
952 dev_err(dev, "Unable to retrieve ENET Port CSR region\n");
956 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_RING_CSR);
958 dev_err(dev, "Resource ring_csr not defined\n");
961 pdata->ring_csr_addr = devm_ioremap(dev, res->start,
963 if (!pdata->ring_csr_addr) {
964 dev_err(dev, "Unable to retrieve ENET Ring CSR region\n");
968 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_RING_CMD);
970 dev_err(dev, "Resource ring_cmd not defined\n");
973 pdata->ring_cmd_addr = devm_ioremap(dev, res->start,
975 if (!pdata->ring_cmd_addr) {
976 dev_err(dev, "Unable to retrieve ENET Ring command region\n");
980 ret = xgene_get_port_id(dev, pdata);
984 if (xgene_get_mac_address(dev, ndev->dev_addr) != ETH_ALEN)
985 eth_hw_addr_random(ndev);
987 memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
989 pdata->phy_mode = xgene_get_phy_mode(dev);
990 if (pdata->phy_mode < 0) {
991 dev_err(dev, "Unable to get phy-connection-type\n");
992 return pdata->phy_mode;
994 if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII &&
995 pdata->phy_mode != PHY_INTERFACE_MODE_SGMII &&
996 pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
997 dev_err(dev, "Incorrect phy-connection-type specified\n");
1001 ret = platform_get_irq(pdev, 0);
1003 dev_err(dev, "Unable to get ENET Rx IRQ\n");
1004 ret = ret ? : -ENXIO;
1007 pdata->rx_irq = ret;
1009 if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII) {
1010 ret = platform_get_irq(pdev, 1);
1012 dev_err(dev, "Unable to get ENET Tx completion IRQ\n");
1013 ret = ret ? : -ENXIO;
1016 pdata->txc_irq = ret;
1019 pdata->clk = devm_clk_get(&pdev->dev, NULL);
1020 if (IS_ERR(pdata->clk)) {
1021 /* Firmware may have set up the clock already. */
1025 if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII)
1026 base_addr = pdata->base_addr - (pdata->port_id * MAC_OFFSET);
1028 base_addr = pdata->base_addr;
1029 pdata->eth_csr_addr = base_addr + BLOCK_ETH_CSR_OFFSET;
1030 pdata->eth_ring_if_addr = base_addr + BLOCK_ETH_RING_IF_OFFSET;
1031 pdata->eth_diag_csr_addr = base_addr + BLOCK_ETH_DIAG_CSR_OFFSET;
1032 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII ||
1033 pdata->phy_mode == PHY_INTERFACE_MODE_SGMII) {
1034 pdata->mcx_mac_addr = pdata->base_addr + BLOCK_ETH_MAC_OFFSET;
1035 offset = (pdata->enet_id == XGENE_ENET1) ?
1036 BLOCK_ETH_MAC_CSR_OFFSET :
1037 X2_BLOCK_ETH_MAC_CSR_OFFSET;
1038 pdata->mcx_mac_csr_addr = base_addr + offset;
1040 pdata->mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;
1041 pdata->mcx_mac_csr_addr = base_addr + BLOCK_AXG_MAC_CSR_OFFSET;
1043 pdata->rx_buff_cnt = NUM_PKT_BUF;
1048 static int xgene_enet_init_hw(struct xgene_enet_pdata *pdata)
1050 struct net_device *ndev = pdata->ndev;
1051 struct xgene_enet_desc_ring *buf_pool;
1055 ret = pdata->port_ops->reset(pdata);
1059 ret = xgene_enet_create_desc_rings(ndev);
1061 netdev_err(ndev, "Error in ring configuration\n");
1065 /* setup buffer pool */
1066 buf_pool = pdata->rx_ring->buf_pool;
1067 xgene_enet_init_bufpool(buf_pool);
1068 ret = xgene_enet_refill_bufpool(buf_pool, pdata->rx_buff_cnt);
1070 xgene_enet_delete_desc_rings(pdata);
1074 dst_ring_num = xgene_enet_dst_ring_num(pdata->rx_ring);
1075 pdata->port_ops->cle_bypass(pdata, dst_ring_num, buf_pool->id);
1076 pdata->mac_ops->init(pdata);
1081 static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
1083 switch (pdata->phy_mode) {
1084 case PHY_INTERFACE_MODE_RGMII:
1085 pdata->mac_ops = &xgene_gmac_ops;
1086 pdata->port_ops = &xgene_gport_ops;
1089 case PHY_INTERFACE_MODE_SGMII:
1090 pdata->mac_ops = &xgene_sgmac_ops;
1091 pdata->port_ops = &xgene_sgport_ops;
1093 pdata->cq_cnt = XGENE_MAX_TXC_RINGS;
1096 pdata->mac_ops = &xgene_xgmac_ops;
1097 pdata->port_ops = &xgene_xgport_ops;
1099 pdata->cq_cnt = XGENE_MAX_TXC_RINGS;
1103 if (pdata->enet_id == XGENE_ENET1) {
1104 switch (pdata->port_id) {
1106 pdata->cpu_bufnum = START_CPU_BUFNUM_0;
1107 pdata->eth_bufnum = START_ETH_BUFNUM_0;
1108 pdata->bp_bufnum = START_BP_BUFNUM_0;
1109 pdata->ring_num = START_RING_NUM_0;
1112 pdata->cpu_bufnum = START_CPU_BUFNUM_1;
1113 pdata->eth_bufnum = START_ETH_BUFNUM_1;
1114 pdata->bp_bufnum = START_BP_BUFNUM_1;
1115 pdata->ring_num = START_RING_NUM_1;
1120 pdata->ring_ops = &xgene_ring1_ops;
1122 switch (pdata->port_id) {
1124 pdata->cpu_bufnum = X2_START_CPU_BUFNUM_0;
1125 pdata->eth_bufnum = X2_START_ETH_BUFNUM_0;
1126 pdata->bp_bufnum = X2_START_BP_BUFNUM_0;
1127 pdata->ring_num = X2_START_RING_NUM_0;
1130 pdata->cpu_bufnum = X2_START_CPU_BUFNUM_1;
1131 pdata->eth_bufnum = X2_START_ETH_BUFNUM_1;
1132 pdata->bp_bufnum = X2_START_BP_BUFNUM_1;
1133 pdata->ring_num = X2_START_RING_NUM_1;
1139 pdata->ring_ops = &xgene_ring2_ops;
1143 static void xgene_enet_napi_add(struct xgene_enet_pdata *pdata)
1145 struct napi_struct *napi;
1147 napi = &pdata->rx_ring->napi;
1148 netif_napi_add(pdata->ndev, napi, xgene_enet_napi, NAPI_POLL_WEIGHT);
1150 if (pdata->cq_cnt) {
1151 napi = &pdata->tx_ring->cp_ring->napi;
1152 netif_napi_add(pdata->ndev, napi, xgene_enet_napi,
1157 static void xgene_enet_napi_del(struct xgene_enet_pdata *pdata)
1159 struct napi_struct *napi;
1161 napi = &pdata->rx_ring->napi;
1162 netif_napi_del(napi);
1164 if (pdata->cq_cnt) {
1165 napi = &pdata->tx_ring->cp_ring->napi;
1166 netif_napi_del(napi);
1170 static int xgene_enet_probe(struct platform_device *pdev)
1172 struct net_device *ndev;
1173 struct xgene_enet_pdata *pdata;
1174 struct device *dev = &pdev->dev;
1175 struct xgene_mac_ops *mac_ops;
1177 const struct of_device_id *of_id;
1181 ndev = alloc_etherdev(sizeof(struct xgene_enet_pdata));
1185 pdata = netdev_priv(ndev);
1189 SET_NETDEV_DEV(ndev, dev);
1190 platform_set_drvdata(pdev, pdata);
1191 ndev->netdev_ops = &xgene_ndev_ops;
1192 xgene_enet_set_ethtool_ops(ndev);
1193 ndev->features |= NETIF_F_IP_CSUM |
1198 of_id = of_match_device(xgene_enet_of_match, &pdev->dev);
1200 pdata->enet_id = (enum xgene_enet_id)of_id->data;
1201 if (!pdata->enet_id) {
1208 ret = xgene_enet_get_resources(pdata);
1212 xgene_enet_setup_ops(pdata);
1214 ret = register_netdev(ndev);
1216 netdev_err(ndev, "Failed to register netdev\n");
1220 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
1222 netdev_err(ndev, "No usable DMA configuration\n");
1226 ret = xgene_enet_init_hw(pdata);
1230 xgene_enet_napi_add(pdata);
1231 mac_ops = pdata->mac_ops;
1232 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
1233 ret = xgene_enet_mdio_config(pdata);
1235 INIT_DELAYED_WORK(&pdata->link_work, mac_ops->link_state);
1239 unregister_netdev(ndev);
1244 static int xgene_enet_remove(struct platform_device *pdev)
1246 struct xgene_enet_pdata *pdata;
1247 struct xgene_mac_ops *mac_ops;
1248 struct net_device *ndev;
1250 pdata = platform_get_drvdata(pdev);
1251 mac_ops = pdata->mac_ops;
1254 mac_ops->rx_disable(pdata);
1255 mac_ops->tx_disable(pdata);
1257 xgene_enet_napi_del(pdata);
1258 xgene_enet_mdio_remove(pdata);
1259 xgene_enet_delete_desc_rings(pdata);
1260 unregister_netdev(ndev);
1261 pdata->port_ops->shutdown(pdata);
1268 static const struct acpi_device_id xgene_enet_acpi_match[] = {
1274 MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
1278 static const struct of_device_id xgene_enet_of_match[] = {
1279 {.compatible = "apm,xgene-enet", .data = (void *)XGENE_ENET1},
1280 {.compatible = "apm,xgene1-sgenet", .data = (void *)XGENE_ENET1},
1281 {.compatible = "apm,xgene1-xgenet", .data = (void *)XGENE_ENET1},
1282 {.compatible = "apm,xgene2-sgenet", .data = (void *)XGENE_ENET2},
1283 {.compatible = "apm,xgene2-xgenet", .data = (void *)XGENE_ENET2},
1287 MODULE_DEVICE_TABLE(of, xgene_enet_of_match);
1290 static struct platform_driver xgene_enet_driver = {
1292 .name = "xgene-enet",
1293 .of_match_table = of_match_ptr(xgene_enet_of_match),
1294 .acpi_match_table = ACPI_PTR(xgene_enet_acpi_match),
1296 .probe = xgene_enet_probe,
1297 .remove = xgene_enet_remove,
1300 module_platform_driver(xgene_enet_driver);
1302 MODULE_DESCRIPTION("APM X-Gene SoC Ethernet driver");
1303 MODULE_VERSION(XGENE_DRV_VERSION);
1304 MODULE_AUTHOR("Iyappan Subramanian <isubramanian@apm.com>");
1305 MODULE_AUTHOR("Keyur Chudgar <kchudgar@apm.com>");
1306 MODULE_LICENSE("GPL");