1 /* Applied Micro X-Gene SoC Ethernet Driver
3 * Copyright (c) 2014, Applied Micro Circuits Corporation
4 * Authors: Iyappan Subramanian <isubramanian@apm.com>
5 * Ravi Patel <rapatel@apm.com>
6 * Keyur Chudgar <kchudgar@apm.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "xgene_enet_main.h"
23 #include "xgene_enet_hw.h"
24 #include "xgene_enet_sgmac.h"
25 #include "xgene_enet_xgmac.h"
27 #define RES_ENET_CSR 0
28 #define RES_RING_CSR 1
29 #define RES_RING_CMD 2
31 static void xgene_enet_init_bufpool(struct xgene_enet_desc_ring *buf_pool)
33 struct xgene_enet_raw_desc16 *raw_desc;
36 for (i = 0; i < buf_pool->slots; i++) {
37 raw_desc = &buf_pool->raw_desc16[i];
39 /* Hardware expects descriptor in little endian format */
40 raw_desc->m0 = cpu_to_le64(i |
41 SET_VAL(FPQNUM, buf_pool->dst_ring_num) |
46 static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
50 struct xgene_enet_raw_desc16 *raw_desc;
51 struct net_device *ndev;
54 u32 tail = buf_pool->tail;
55 u32 slots = buf_pool->slots - 1;
59 ndev = buf_pool->ndev;
60 dev = ndev_to_dev(buf_pool->ndev);
61 bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE & GENMASK(11, 0));
62 len = XGENE_ENET_MAX_MTU;
64 for (i = 0; i < nbuf; i++) {
65 raw_desc = &buf_pool->raw_desc16[tail];
67 skb = netdev_alloc_skb_ip_align(ndev, len);
70 buf_pool->rx_skb[tail] = skb;
72 dma_addr = dma_map_single(dev, skb->data, len, DMA_FROM_DEVICE);
73 if (dma_mapping_error(dev, dma_addr)) {
74 netdev_err(ndev, "DMA mapping error\n");
75 dev_kfree_skb_any(skb);
79 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
80 SET_VAL(BUFDATALEN, bufdatalen) |
82 tail = (tail + 1) & slots;
85 iowrite32(nbuf, buf_pool->cmd);
86 buf_pool->tail = tail;
91 static u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)
93 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
95 return ((u16)pdata->rm << 10) | ring->num;
98 static u8 xgene_enet_hdr_len(const void *data)
100 const struct ethhdr *eth = data;
102 return (eth->h_proto == htons(ETH_P_8021Q)) ? VLAN_ETH_HLEN : ETH_HLEN;
105 static u32 xgene_enet_ring_len(struct xgene_enet_desc_ring *ring)
107 u32 __iomem *cmd_base = ring->cmd_base;
108 u32 ring_state, num_msgs;
110 ring_state = ioread32(&cmd_base[1]);
111 num_msgs = ring_state & CREATE_MASK(NUMMSGSINQ_POS, NUMMSGSINQ_LEN);
113 return num_msgs >> NUMMSGSINQ_POS;
116 static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
118 struct xgene_enet_raw_desc16 *raw_desc;
119 u32 slots = buf_pool->slots - 1;
120 u32 tail = buf_pool->tail;
124 len = xgene_enet_ring_len(buf_pool);
125 for (i = 0; i < len; i++) {
126 tail = (tail - 1) & slots;
127 raw_desc = &buf_pool->raw_desc16[tail];
129 /* Hardware stores descriptor in little endian format */
130 userinfo = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
131 dev_kfree_skb_any(buf_pool->rx_skb[userinfo]);
134 iowrite32(-len, buf_pool->cmd);
135 buf_pool->tail = tail;
138 static irqreturn_t xgene_enet_rx_irq(const int irq, void *data)
140 struct xgene_enet_desc_ring *rx_ring = data;
142 if (napi_schedule_prep(&rx_ring->napi)) {
143 disable_irq_nosync(irq);
144 __napi_schedule(&rx_ring->napi);
150 static int xgene_enet_tx_completion(struct xgene_enet_desc_ring *cp_ring,
151 struct xgene_enet_raw_desc *raw_desc)
159 skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
160 skb = cp_ring->cp_skb[skb_index];
162 dev = ndev_to_dev(cp_ring->ndev);
163 dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
164 GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1)),
167 /* Checking for error */
168 status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
169 if (unlikely(status > 2)) {
170 xgene_enet_parse_error(cp_ring, netdev_priv(cp_ring->ndev),
176 dev_kfree_skb_any(skb);
178 netdev_err(cp_ring->ndev, "completion skb is NULL\n");
185 static u64 xgene_enet_work_msg(struct sk_buff *skb)
188 u8 l3hlen, l4hlen = 0;
194 if (unlikely(skb->protocol != htons(ETH_P_IP)) &&
195 unlikely(skb->protocol != htons(ETH_P_8021Q)))
198 if (unlikely(!(skb->dev->features & NETIF_F_IP_CSUM)))
202 if (unlikely(ip_is_fragment(iph)))
205 if (likely(iph->protocol == IPPROTO_TCP)) {
206 l4hlen = tcp_hdrlen(skb) >> 2;
208 proto = TSO_IPPROTO_TCP;
209 } else if (iph->protocol == IPPROTO_UDP) {
210 l4hlen = UDP_HDR_SIZE;
214 l3hlen = ip_hdrlen(skb) >> 2;
215 ethhdr = xgene_enet_hdr_len(skb->data);
216 hopinfo = SET_VAL(TCPHDR, l4hlen) |
217 SET_VAL(IPHDR, l3hlen) |
218 SET_VAL(ETHHDR, ethhdr) |
219 SET_VAL(EC, csum_enable) |
222 SET_BIT(TYPE_ETH_WORK_MESSAGE);
227 static int xgene_enet_setup_tx_desc(struct xgene_enet_desc_ring *tx_ring,
230 struct device *dev = ndev_to_dev(tx_ring->ndev);
231 struct xgene_enet_raw_desc *raw_desc;
233 u16 tail = tx_ring->tail;
236 raw_desc = &tx_ring->raw_desc[tail];
237 memset(raw_desc, 0, sizeof(struct xgene_enet_raw_desc));
239 dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
240 if (dma_mapping_error(dev, dma_addr)) {
241 netdev_err(tx_ring->ndev, "DMA mapping error\n");
245 /* Hardware expects descriptor in little endian format */
246 raw_desc->m0 = cpu_to_le64(tail);
247 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
248 SET_VAL(BUFDATALEN, skb->len) |
250 hopinfo = xgene_enet_work_msg(skb);
251 raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) |
253 tx_ring->cp_ring->cp_skb[tail] = skb;
258 static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
259 struct net_device *ndev)
261 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
262 struct xgene_enet_desc_ring *tx_ring = pdata->tx_ring;
263 struct xgene_enet_desc_ring *cp_ring = tx_ring->cp_ring;
264 u32 tx_level, cq_level;
266 tx_level = xgene_enet_ring_len(tx_ring);
267 cq_level = xgene_enet_ring_len(cp_ring);
268 if (unlikely(tx_level > pdata->tx_qcnt_hi ||
269 cq_level > pdata->cp_qcnt_hi)) {
270 netif_stop_queue(ndev);
271 return NETDEV_TX_BUSY;
274 if (xgene_enet_setup_tx_desc(tx_ring, skb)) {
275 dev_kfree_skb_any(skb);
279 iowrite32(1, tx_ring->cmd);
280 skb_tx_timestamp(skb);
281 tx_ring->tail = (tx_ring->tail + 1) & (tx_ring->slots - 1);
283 pdata->stats.tx_packets++;
284 pdata->stats.tx_bytes += skb->len;
289 static void xgene_enet_skip_csum(struct sk_buff *skb)
291 struct iphdr *iph = ip_hdr(skb);
293 if (!ip_is_fragment(iph) ||
294 (iph->protocol != IPPROTO_TCP && iph->protocol != IPPROTO_UDP)) {
295 skb->ip_summed = CHECKSUM_UNNECESSARY;
299 static int xgene_enet_rx_frame(struct xgene_enet_desc_ring *rx_ring,
300 struct xgene_enet_raw_desc *raw_desc)
302 struct net_device *ndev;
303 struct xgene_enet_pdata *pdata;
305 struct xgene_enet_desc_ring *buf_pool;
306 u32 datalen, skb_index;
311 ndev = rx_ring->ndev;
312 pdata = netdev_priv(ndev);
313 dev = ndev_to_dev(rx_ring->ndev);
314 buf_pool = rx_ring->buf_pool;
316 dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
317 XGENE_ENET_MAX_MTU, DMA_FROM_DEVICE);
318 skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
319 skb = buf_pool->rx_skb[skb_index];
321 /* checking for error */
322 status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
323 if (unlikely(status > 2)) {
324 dev_kfree_skb_any(skb);
325 xgene_enet_parse_error(rx_ring, netdev_priv(rx_ring->ndev),
327 pdata->stats.rx_dropped++;
332 /* strip off CRC as HW isn't doing this */
333 datalen = GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1));
335 prefetch(skb->data - NET_IP_ALIGN);
336 skb_put(skb, datalen);
338 skb_checksum_none_assert(skb);
339 skb->protocol = eth_type_trans(skb, ndev);
340 if (likely((ndev->features & NETIF_F_IP_CSUM) &&
341 skb->protocol == htons(ETH_P_IP))) {
342 xgene_enet_skip_csum(skb);
345 pdata->stats.rx_packets++;
346 pdata->stats.rx_bytes += datalen;
347 napi_gro_receive(&rx_ring->napi, skb);
349 if (--rx_ring->nbufpool == 0) {
350 ret = xgene_enet_refill_bufpool(buf_pool, NUM_BUFPOOL);
351 rx_ring->nbufpool = NUM_BUFPOOL;
357 static bool is_rx_desc(struct xgene_enet_raw_desc *raw_desc)
359 return GET_VAL(FPQNUM, le64_to_cpu(raw_desc->m0)) ? true : false;
362 static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,
365 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
366 struct xgene_enet_raw_desc *raw_desc;
367 u16 head = ring->head;
368 u16 slots = ring->slots - 1;
372 raw_desc = &ring->raw_desc[head];
373 if (unlikely(xgene_enet_is_desc_slot_empty(raw_desc)))
376 /* read fpqnum field after dataaddr field */
378 if (is_rx_desc(raw_desc))
379 ret = xgene_enet_rx_frame(ring, raw_desc);
381 ret = xgene_enet_tx_completion(ring, raw_desc);
382 xgene_enet_mark_desc_slot_empty(raw_desc);
384 head = (head + 1) & slots;
392 iowrite32(-count, ring->cmd);
395 if (netif_queue_stopped(ring->ndev)) {
396 if (xgene_enet_ring_len(ring) < pdata->cp_qcnt_low)
397 netif_wake_queue(ring->ndev);
404 static int xgene_enet_napi(struct napi_struct *napi, const int budget)
406 struct xgene_enet_desc_ring *ring;
409 ring = container_of(napi, struct xgene_enet_desc_ring, napi);
410 processed = xgene_enet_process_ring(ring, budget);
412 if (processed != budget) {
414 enable_irq(ring->irq);
420 static void xgene_enet_timeout(struct net_device *ndev)
422 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
424 pdata->mac_ops->reset(pdata);
427 static int xgene_enet_register_irq(struct net_device *ndev)
429 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
430 struct device *dev = ndev_to_dev(ndev);
431 struct xgene_enet_desc_ring *ring;
434 ring = pdata->rx_ring;
435 ret = devm_request_irq(dev, ring->irq, xgene_enet_rx_irq,
436 IRQF_SHARED, ring->irq_name, ring);
438 netdev_err(ndev, "Failed to request irq %s\n", ring->irq_name);
441 ring = pdata->tx_ring->cp_ring;
442 ret = devm_request_irq(dev, ring->irq, xgene_enet_rx_irq,
443 IRQF_SHARED, ring->irq_name, ring);
445 netdev_err(ndev, "Failed to request irq %s\n",
453 static void xgene_enet_free_irq(struct net_device *ndev)
455 struct xgene_enet_pdata *pdata;
458 pdata = netdev_priv(ndev);
459 dev = ndev_to_dev(ndev);
460 devm_free_irq(dev, pdata->rx_ring->irq, pdata->rx_ring);
463 devm_free_irq(dev, pdata->tx_ring->cp_ring->irq,
464 pdata->tx_ring->cp_ring);
468 static void xgene_enet_napi_enable(struct xgene_enet_pdata *pdata)
470 struct napi_struct *napi;
472 napi = &pdata->rx_ring->napi;
476 napi = &pdata->tx_ring->cp_ring->napi;
481 static void xgene_enet_napi_disable(struct xgene_enet_pdata *pdata)
483 struct napi_struct *napi;
485 napi = &pdata->rx_ring->napi;
489 napi = &pdata->tx_ring->cp_ring->napi;
494 static int xgene_enet_open(struct net_device *ndev)
496 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
497 struct xgene_mac_ops *mac_ops = pdata->mac_ops;
500 mac_ops->tx_enable(pdata);
501 mac_ops->rx_enable(pdata);
503 ret = xgene_enet_register_irq(ndev);
506 xgene_enet_napi_enable(pdata);
508 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
509 phy_start(pdata->phy_dev);
511 schedule_delayed_work(&pdata->link_work, PHY_POLL_LINK_OFF);
513 netif_start_queue(ndev);
518 static int xgene_enet_close(struct net_device *ndev)
520 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
521 struct xgene_mac_ops *mac_ops = pdata->mac_ops;
523 netif_stop_queue(ndev);
525 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
526 phy_stop(pdata->phy_dev);
528 cancel_delayed_work_sync(&pdata->link_work);
530 xgene_enet_napi_disable(pdata);
531 xgene_enet_free_irq(ndev);
532 xgene_enet_process_ring(pdata->rx_ring, -1);
534 mac_ops->tx_disable(pdata);
535 mac_ops->rx_disable(pdata);
540 static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)
542 struct xgene_enet_pdata *pdata;
545 pdata = netdev_priv(ring->ndev);
546 dev = ndev_to_dev(ring->ndev);
548 xgene_enet_clear_ring(ring);
549 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
552 static void xgene_enet_delete_desc_rings(struct xgene_enet_pdata *pdata)
554 struct xgene_enet_desc_ring *buf_pool;
556 if (pdata->tx_ring) {
557 xgene_enet_delete_ring(pdata->tx_ring);
558 pdata->tx_ring = NULL;
561 if (pdata->rx_ring) {
562 buf_pool = pdata->rx_ring->buf_pool;
563 xgene_enet_delete_bufpool(buf_pool);
564 xgene_enet_delete_ring(buf_pool);
565 xgene_enet_delete_ring(pdata->rx_ring);
566 pdata->rx_ring = NULL;
570 static int xgene_enet_get_ring_size(struct device *dev,
571 enum xgene_enet_ring_cfgsize cfgsize)
576 case RING_CFGSIZE_512B:
579 case RING_CFGSIZE_2KB:
582 case RING_CFGSIZE_16KB:
585 case RING_CFGSIZE_64KB:
588 case RING_CFGSIZE_512KB:
592 dev_err(dev, "Unsupported cfg ring size %d\n", cfgsize);
599 static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)
606 dev = ndev_to_dev(ring->ndev);
608 if (ring->desc_addr) {
609 xgene_enet_clear_ring(ring);
610 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
612 devm_kfree(dev, ring);
615 static void xgene_enet_free_desc_rings(struct xgene_enet_pdata *pdata)
617 struct device *dev = &pdata->pdev->dev;
618 struct xgene_enet_desc_ring *ring;
620 ring = pdata->tx_ring;
622 if (ring->cp_ring && ring->cp_ring->cp_skb)
623 devm_kfree(dev, ring->cp_ring->cp_skb);
624 if (ring->cp_ring && pdata->cq_cnt)
625 xgene_enet_free_desc_ring(ring->cp_ring);
626 xgene_enet_free_desc_ring(ring);
629 ring = pdata->rx_ring;
631 if (ring->buf_pool) {
632 if (ring->buf_pool->rx_skb)
633 devm_kfree(dev, ring->buf_pool->rx_skb);
634 xgene_enet_free_desc_ring(ring->buf_pool);
636 xgene_enet_free_desc_ring(ring);
640 static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(
641 struct net_device *ndev, u32 ring_num,
642 enum xgene_enet_ring_cfgsize cfgsize, u32 ring_id)
644 struct xgene_enet_desc_ring *ring;
645 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
646 struct device *dev = ndev_to_dev(ndev);
649 size = xgene_enet_get_ring_size(dev, cfgsize);
653 ring = devm_kzalloc(dev, sizeof(struct xgene_enet_desc_ring),
659 ring->num = ring_num;
660 ring->cfgsize = cfgsize;
663 ring->desc_addr = dma_zalloc_coherent(dev, size, &ring->dma,
665 if (!ring->desc_addr) {
666 devm_kfree(dev, ring);
671 ring->cmd_base = pdata->ring_cmd_addr + (ring->num << 6);
672 ring->cmd = ring->cmd_base + INC_DEC_CMD_ADDR;
673 ring = xgene_enet_setup_ring(ring);
674 netdev_dbg(ndev, "ring info: num=%d size=%d id=%d slots=%d\n",
675 ring->num, ring->size, ring->id, ring->slots);
680 static u16 xgene_enet_get_ring_id(enum xgene_ring_owner owner, u8 bufnum)
682 return (owner << 6) | (bufnum & GENMASK(5, 0));
685 static int xgene_enet_create_desc_rings(struct net_device *ndev)
687 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
688 struct device *dev = ndev_to_dev(ndev);
689 struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;
690 struct xgene_enet_desc_ring *buf_pool = NULL;
691 u8 cpu_bufnum = pdata->cpu_bufnum;
692 u8 eth_bufnum = pdata->eth_bufnum;
693 u8 bp_bufnum = pdata->bp_bufnum;
694 u16 ring_num = pdata->ring_num;
698 /* allocate rx descriptor ring */
699 ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
700 rx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
701 RING_CFGSIZE_16KB, ring_id);
707 /* allocate buffer pool for receiving packets */
708 ring_id = xgene_enet_get_ring_id(RING_OWNER_ETH0, bp_bufnum++);
709 buf_pool = xgene_enet_create_desc_ring(ndev, ring_num++,
710 RING_CFGSIZE_2KB, ring_id);
716 rx_ring->nbufpool = NUM_BUFPOOL;
717 rx_ring->buf_pool = buf_pool;
718 rx_ring->irq = pdata->rx_irq;
719 if (!pdata->cq_cnt) {
720 snprintf(rx_ring->irq_name, IRQ_ID_SIZE, "%s-rx-txc",
723 snprintf(rx_ring->irq_name, IRQ_ID_SIZE, "%s-rx", ndev->name);
725 buf_pool->rx_skb = devm_kcalloc(dev, buf_pool->slots,
726 sizeof(struct sk_buff *), GFP_KERNEL);
727 if (!buf_pool->rx_skb) {
732 buf_pool->dst_ring_num = xgene_enet_dst_ring_num(buf_pool);
733 rx_ring->buf_pool = buf_pool;
734 pdata->rx_ring = rx_ring;
736 /* allocate tx descriptor ring */
737 ring_id = xgene_enet_get_ring_id(RING_OWNER_ETH0, eth_bufnum++);
738 tx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
739 RING_CFGSIZE_16KB, ring_id);
744 pdata->tx_ring = tx_ring;
746 if (!pdata->cq_cnt) {
747 cp_ring = pdata->rx_ring;
749 /* allocate tx completion descriptor ring */
750 ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
751 cp_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
758 cp_ring->irq = pdata->txc_irq;
759 snprintf(cp_ring->irq_name, IRQ_ID_SIZE, "%s-txc", ndev->name);
762 cp_ring->cp_skb = devm_kcalloc(dev, tx_ring->slots,
763 sizeof(struct sk_buff *), GFP_KERNEL);
764 if (!cp_ring->cp_skb) {
768 pdata->tx_ring->cp_ring = cp_ring;
769 pdata->tx_ring->dst_ring_num = xgene_enet_dst_ring_num(cp_ring);
771 pdata->tx_qcnt_hi = pdata->tx_ring->slots / 2;
772 pdata->cp_qcnt_hi = pdata->rx_ring->slots / 2;
773 pdata->cp_qcnt_low = pdata->cp_qcnt_hi / 2;
778 xgene_enet_free_desc_rings(pdata);
782 static struct rtnl_link_stats64 *xgene_enet_get_stats64(
783 struct net_device *ndev,
784 struct rtnl_link_stats64 *storage)
786 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
787 struct rtnl_link_stats64 *stats = &pdata->stats;
789 stats->rx_errors += stats->rx_length_errors +
790 stats->rx_crc_errors +
791 stats->rx_frame_errors +
792 stats->rx_fifo_errors;
793 memcpy(storage, &pdata->stats, sizeof(struct rtnl_link_stats64));
798 static int xgene_enet_set_mac_address(struct net_device *ndev, void *addr)
800 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
803 ret = eth_mac_addr(ndev, addr);
806 pdata->mac_ops->set_mac_addr(pdata);
811 static const struct net_device_ops xgene_ndev_ops = {
812 .ndo_open = xgene_enet_open,
813 .ndo_stop = xgene_enet_close,
814 .ndo_start_xmit = xgene_enet_start_xmit,
815 .ndo_tx_timeout = xgene_enet_timeout,
816 .ndo_get_stats64 = xgene_enet_get_stats64,
817 .ndo_change_mtu = eth_change_mtu,
818 .ndo_set_mac_address = xgene_enet_set_mac_address,
821 static int xgene_get_port_id(struct device *dev, struct xgene_enet_pdata *pdata)
826 ret = device_property_read_u32(dev, "port-id", &id);
827 if (!ret && id > 1) {
828 dev_err(dev, "Incorrect port-id specified\n");
837 static int xgene_get_mac_address(struct device *dev,
842 ret = device_property_read_u8_array(dev, "local-mac-address", addr, 6);
844 ret = device_property_read_u8_array(dev, "mac-address",
852 static int xgene_get_phy_mode(struct device *dev)
857 ret = device_property_read_string(dev, "phy-connection-type",
858 (const char **)&modestr);
860 ret = device_property_read_string(dev, "phy-mode",
861 (const char **)&modestr);
865 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
866 if (!strcasecmp(modestr, phy_modes(i)))
872 static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
874 struct platform_device *pdev;
875 struct net_device *ndev;
877 struct resource *res;
878 void __iomem *base_addr;
885 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_ENET_CSR);
887 dev_err(dev, "Resource enet_csr not defined\n");
890 pdata->base_addr = devm_ioremap(dev, res->start, resource_size(res));
891 if (!pdata->base_addr) {
892 dev_err(dev, "Unable to retrieve ENET Port CSR region\n");
896 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_RING_CSR);
898 dev_err(dev, "Resource ring_csr not defined\n");
901 pdata->ring_csr_addr = devm_ioremap(dev, res->start,
903 if (!pdata->ring_csr_addr) {
904 dev_err(dev, "Unable to retrieve ENET Ring CSR region\n");
908 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_RING_CMD);
910 dev_err(dev, "Resource ring_cmd not defined\n");
913 pdata->ring_cmd_addr = devm_ioremap(dev, res->start,
915 if (!pdata->ring_cmd_addr) {
916 dev_err(dev, "Unable to retrieve ENET Ring command region\n");
920 ret = xgene_get_port_id(dev, pdata);
924 if (xgene_get_mac_address(dev, ndev->dev_addr) != ETH_ALEN)
925 eth_hw_addr_random(ndev);
927 memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
929 pdata->phy_mode = xgene_get_phy_mode(dev);
930 if (pdata->phy_mode < 0) {
931 dev_err(dev, "Unable to get phy-connection-type\n");
932 return pdata->phy_mode;
934 if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII &&
935 pdata->phy_mode != PHY_INTERFACE_MODE_SGMII &&
936 pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
937 dev_err(dev, "Incorrect phy-connection-type specified\n");
941 ret = platform_get_irq(pdev, 0);
943 dev_err(dev, "Unable to get ENET Rx IRQ\n");
944 ret = ret ? : -ENXIO;
949 if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII) {
950 ret = platform_get_irq(pdev, 1);
952 dev_err(dev, "Unable to get ENET Tx completion IRQ\n");
953 ret = ret ? : -ENXIO;
956 pdata->txc_irq = ret;
959 pdata->clk = devm_clk_get(&pdev->dev, NULL);
960 if (IS_ERR(pdata->clk)) {
961 /* Firmware may have set up the clock already. */
965 base_addr = pdata->base_addr - (pdata->port_id * MAC_OFFSET);
966 pdata->eth_csr_addr = base_addr + BLOCK_ETH_CSR_OFFSET;
967 pdata->eth_ring_if_addr = base_addr + BLOCK_ETH_RING_IF_OFFSET;
968 pdata->eth_diag_csr_addr = base_addr + BLOCK_ETH_DIAG_CSR_OFFSET;
969 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII ||
970 pdata->phy_mode == PHY_INTERFACE_MODE_SGMII) {
971 pdata->mcx_mac_addr = pdata->base_addr + BLOCK_ETH_MAC_OFFSET;
972 pdata->mcx_mac_csr_addr = base_addr + BLOCK_ETH_MAC_CSR_OFFSET;
974 pdata->mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;
975 pdata->mcx_mac_csr_addr = base_addr + BLOCK_AXG_MAC_CSR_OFFSET;
977 pdata->rx_buff_cnt = NUM_PKT_BUF;
982 static int xgene_enet_init_hw(struct xgene_enet_pdata *pdata)
984 struct net_device *ndev = pdata->ndev;
985 struct xgene_enet_desc_ring *buf_pool;
989 ret = pdata->port_ops->reset(pdata);
993 ret = xgene_enet_create_desc_rings(ndev);
995 netdev_err(ndev, "Error in ring configuration\n");
999 /* setup buffer pool */
1000 buf_pool = pdata->rx_ring->buf_pool;
1001 xgene_enet_init_bufpool(buf_pool);
1002 ret = xgene_enet_refill_bufpool(buf_pool, pdata->rx_buff_cnt);
1004 xgene_enet_delete_desc_rings(pdata);
1008 dst_ring_num = xgene_enet_dst_ring_num(pdata->rx_ring);
1009 pdata->port_ops->cle_bypass(pdata, dst_ring_num, buf_pool->id);
1010 pdata->mac_ops->init(pdata);
1015 static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
1017 switch (pdata->phy_mode) {
1018 case PHY_INTERFACE_MODE_RGMII:
1019 pdata->mac_ops = &xgene_gmac_ops;
1020 pdata->port_ops = &xgene_gport_ops;
1023 case PHY_INTERFACE_MODE_SGMII:
1024 pdata->mac_ops = &xgene_sgmac_ops;
1025 pdata->port_ops = &xgene_sgport_ops;
1027 pdata->cq_cnt = XGENE_MAX_TXC_RINGS;
1030 pdata->mac_ops = &xgene_xgmac_ops;
1031 pdata->port_ops = &xgene_xgport_ops;
1033 pdata->cq_cnt = XGENE_MAX_TXC_RINGS;
1037 switch (pdata->port_id) {
1039 pdata->cpu_bufnum = START_CPU_BUFNUM_0;
1040 pdata->eth_bufnum = START_ETH_BUFNUM_0;
1041 pdata->bp_bufnum = START_BP_BUFNUM_0;
1042 pdata->ring_num = START_RING_NUM_0;
1045 pdata->cpu_bufnum = START_CPU_BUFNUM_1;
1046 pdata->eth_bufnum = START_ETH_BUFNUM_1;
1047 pdata->bp_bufnum = START_BP_BUFNUM_1;
1048 pdata->ring_num = START_RING_NUM_1;
1056 static void xgene_enet_napi_add(struct xgene_enet_pdata *pdata)
1058 struct napi_struct *napi;
1060 napi = &pdata->rx_ring->napi;
1061 netif_napi_add(pdata->ndev, napi, xgene_enet_napi, NAPI_POLL_WEIGHT);
1063 if (pdata->cq_cnt) {
1064 napi = &pdata->tx_ring->cp_ring->napi;
1065 netif_napi_add(pdata->ndev, napi, xgene_enet_napi,
1070 static void xgene_enet_napi_del(struct xgene_enet_pdata *pdata)
1072 struct napi_struct *napi;
1074 napi = &pdata->rx_ring->napi;
1075 netif_napi_del(napi);
1077 if (pdata->cq_cnt) {
1078 napi = &pdata->tx_ring->cp_ring->napi;
1079 netif_napi_del(napi);
1083 static int xgene_enet_probe(struct platform_device *pdev)
1085 struct net_device *ndev;
1086 struct xgene_enet_pdata *pdata;
1087 struct device *dev = &pdev->dev;
1088 struct xgene_mac_ops *mac_ops;
1091 ndev = alloc_etherdev(sizeof(struct xgene_enet_pdata));
1095 pdata = netdev_priv(ndev);
1099 SET_NETDEV_DEV(ndev, dev);
1100 platform_set_drvdata(pdev, pdata);
1101 ndev->netdev_ops = &xgene_ndev_ops;
1102 xgene_enet_set_ethtool_ops(ndev);
1103 ndev->features |= NETIF_F_IP_CSUM |
1107 ret = xgene_enet_get_resources(pdata);
1111 xgene_enet_setup_ops(pdata);
1113 ret = register_netdev(ndev);
1115 netdev_err(ndev, "Failed to register netdev\n");
1119 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
1121 netdev_err(ndev, "No usable DMA configuration\n");
1125 ret = xgene_enet_init_hw(pdata);
1129 xgene_enet_napi_add(pdata);
1130 mac_ops = pdata->mac_ops;
1131 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
1132 ret = xgene_enet_mdio_config(pdata);
1134 INIT_DELAYED_WORK(&pdata->link_work, mac_ops->link_state);
1138 unregister_netdev(ndev);
1143 static int xgene_enet_remove(struct platform_device *pdev)
1145 struct xgene_enet_pdata *pdata;
1146 struct xgene_mac_ops *mac_ops;
1147 struct net_device *ndev;
1149 pdata = platform_get_drvdata(pdev);
1150 mac_ops = pdata->mac_ops;
1153 mac_ops->rx_disable(pdata);
1154 mac_ops->tx_disable(pdata);
1156 xgene_enet_napi_del(pdata);
1157 xgene_enet_mdio_remove(pdata);
1158 xgene_enet_delete_desc_rings(pdata);
1159 unregister_netdev(ndev);
1160 pdata->port_ops->shutdown(pdata);
1167 static const struct acpi_device_id xgene_enet_acpi_match[] = {
1173 MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
1177 static const struct of_device_id xgene_enet_of_match[] = {
1178 {.compatible = "apm,xgene-enet",},
1179 {.compatible = "apm,xgene1-sgenet",},
1180 {.compatible = "apm,xgene1-xgenet",},
1184 MODULE_DEVICE_TABLE(of, xgene_enet_of_match);
1187 static struct platform_driver xgene_enet_driver = {
1189 .name = "xgene-enet",
1190 .of_match_table = of_match_ptr(xgene_enet_of_match),
1191 .acpi_match_table = ACPI_PTR(xgene_enet_acpi_match),
1193 .probe = xgene_enet_probe,
1194 .remove = xgene_enet_remove,
1197 module_platform_driver(xgene_enet_driver);
1199 MODULE_DESCRIPTION("APM X-Gene SoC Ethernet driver");
1200 MODULE_VERSION(XGENE_DRV_VERSION);
1201 MODULE_AUTHOR("Iyappan Subramanian <isubramanian@apm.com>");
1202 MODULE_AUTHOR("Keyur Chudgar <kchudgar@apm.com>");
1203 MODULE_LICENSE("GPL");