2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
4 * This software is available to you under a choice of one of two
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6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/compiler.h>
37 #include <linux/delay.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/gfp.h>
41 #include <linux/sched.h>
42 #include <linux/sizes.h>
43 #include <linux/spinlock.h>
44 #include <linux/types.h>
45 #include <linux/wait.h>
47 #include "ena_common_defs.h"
48 #include "ena_admin_defs.h"
49 #include "ena_eth_io_defs.h"
50 #include "ena_regs_defs.h"
53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
55 #define ENA_MAX_NUM_IO_QUEUES 128U
56 /* We need to queues for each IO (on for Tx and one for Rx) */
57 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
59 #define ENA_MAX_HANDLERS 256
61 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
64 #define ENA_REG_READ_TIMEOUT 200000
66 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
67 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
68 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
70 /*****************************************************************************/
71 /*****************************************************************************/
72 /* ENA adaptive interrupt moderation settings */
74 #define ENA_INTR_LOWEST_USECS (0)
75 #define ENA_INTR_LOWEST_PKTS (3)
76 #define ENA_INTR_LOWEST_BYTES (2 * 1524)
78 #define ENA_INTR_LOW_USECS (32)
79 #define ENA_INTR_LOW_PKTS (12)
80 #define ENA_INTR_LOW_BYTES (16 * 1024)
82 #define ENA_INTR_MID_USECS (80)
83 #define ENA_INTR_MID_PKTS (48)
84 #define ENA_INTR_MID_BYTES (64 * 1024)
86 #define ENA_INTR_HIGH_USECS (128)
87 #define ENA_INTR_HIGH_PKTS (96)
88 #define ENA_INTR_HIGH_BYTES (128 * 1024)
90 #define ENA_INTR_HIGHEST_USECS (192)
91 #define ENA_INTR_HIGHEST_PKTS (128)
92 #define ENA_INTR_HIGHEST_BYTES (192 * 1024)
94 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
95 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
96 #define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
97 #define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
98 #define ENA_INTR_MODER_LEVEL_STRIDE 2
99 #define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
101 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
103 enum ena_intr_moder_level {
104 ENA_INTR_MODER_LOWEST = 0,
108 ENA_INTR_MODER_HIGHEST,
109 ENA_INTR_MAX_NUM_OF_LEVELS,
112 struct ena_llq_configurations {
113 enum ena_admin_llq_header_location llq_header_location;
114 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
115 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
116 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
117 u16 llq_ring_entry_size_value;
120 struct ena_intr_moder_entry {
121 unsigned int intr_moder_interval;
122 unsigned int pkts_per_interval;
123 unsigned int bytes_per_interval;
126 enum queue_direction {
127 ENA_COM_IO_QUEUE_DIRECTION_TX,
128 ENA_COM_IO_QUEUE_DIRECTION_RX
132 dma_addr_t paddr; /**< Buffer physical address */
133 u16 len; /**< Buffer length in bytes */
136 struct ena_com_rx_buf_info {
141 struct ena_com_io_desc_addr {
142 u8 __iomem *pbuf_dev_addr; /* LLQ address */
144 dma_addr_t phys_addr;
147 struct ena_com_tx_meta {
151 u16 l4_hdr_len; /* In words */
154 struct ena_com_llq_info {
155 u16 header_location_ctrl;
156 u16 desc_stride_ctrl;
157 u16 desc_list_entry_size_ctrl;
158 u16 desc_list_entry_size;
159 u16 descs_num_before_header;
163 struct ena_com_io_cq {
164 struct ena_com_io_desc_addr cdesc_addr;
166 /* Interrupt unmask register */
167 u32 __iomem *unmask_reg;
169 /* The completion queue head doorbell register */
170 u32 __iomem *cq_head_db_reg;
172 /* numa configuration register (for TPH) */
173 u32 __iomem *numa_node_cfg_reg;
175 /* The value to write to the above register to unmask
176 * the interrupt of this queue
180 enum queue_direction direction;
182 /* holds the number of cdesc of the current packet */
183 u16 cur_rx_pkt_cdesc_count;
184 /* save the firt cdesc idx of the current packet */
185 u16 cur_rx_pkt_cdesc_start_idx;
191 /* Device queue index */
194 u16 last_head_update;
196 u8 cdesc_entry_size_in_bytes;
198 } ____cacheline_aligned;
200 struct ena_com_io_bounce_buffer_control {
204 u16 buffers_num; /* Must be a power of 2 */
207 /* This struct is to keep tracking the current location of the next llq entry */
208 struct ena_com_llq_pkt_ctrl {
211 u16 descs_left_in_line;
214 struct ena_com_io_sq {
215 struct ena_com_io_desc_addr desc_addr;
217 u32 __iomem *db_addr;
218 u8 __iomem *header_addr;
220 enum queue_direction direction;
221 enum ena_admin_placement_policy_type mem_queue_type;
224 struct ena_com_tx_meta cached_tx_meta;
225 struct ena_com_llq_info llq_info;
226 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
227 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
235 u16 llq_last_copy_tail;
236 u32 tx_max_header_size;
240 } ____cacheline_aligned;
242 struct ena_com_admin_cq {
243 struct ena_admin_acq_entry *entries;
250 struct ena_com_admin_sq {
251 struct ena_admin_aq_entry *entries;
254 u32 __iomem *db_addr;
262 struct ena_com_stats_admin {
270 struct ena_com_admin_queue {
272 spinlock_t q_lock; /* spinlock for the admin queue */
274 struct ena_comp_ctx *comp_ctx;
275 u32 completion_timeout;
277 struct ena_com_admin_cq cq;
278 struct ena_com_admin_sq sq;
280 /* Indicate if the admin queue should poll for completion */
285 /* Indicate that the ena was initialized and can
286 * process new admin commands
290 /* Count the number of outstanding admin commands */
291 atomic_t outstanding_cmds;
293 struct ena_com_stats_admin stats;
296 struct ena_aenq_handlers;
298 struct ena_com_aenq {
301 struct ena_admin_aenq_entry *entries;
304 struct ena_aenq_handlers *aenq_handlers;
307 struct ena_com_mmio_read {
308 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
309 dma_addr_t read_resp_dma_addr;
310 u32 reg_read_to; /* in us */
312 bool readless_supported;
313 /* spin lock to ensure a single outstanding read */
319 u16 *host_rss_ind_tbl;
320 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
321 dma_addr_t rss_ind_tbl_dma_addr;
325 enum ena_admin_hash_functions hash_func;
326 struct ena_admin_feature_rss_flow_hash_control *hash_key;
327 dma_addr_t hash_key_dma_addr;
331 struct ena_admin_feature_rss_hash_control *hash_ctrl;
332 dma_addr_t hash_ctrl_dma_addr;
336 struct ena_host_attribute {
338 u8 *debug_area_virt_addr;
339 dma_addr_t debug_area_dma_addr;
342 /* Host information */
343 struct ena_admin_host_info *host_info;
344 dma_addr_t host_info_dma_addr;
347 /* Each ena_dev is a PCI function. */
349 struct ena_com_admin_queue admin_queue;
350 struct ena_com_aenq aenq;
351 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
352 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
354 void __iomem *mem_bar;
357 enum ena_admin_placement_policy_type tx_mem_queue_type;
358 u32 tx_max_header_size;
359 u16 stats_func; /* Selected function for extended statistic dump */
360 u16 stats_queue; /* Selected queue for extended statistic dump */
362 struct ena_com_mmio_read mmio_read;
365 u32 supported_features;
368 struct ena_host_attribute host_attr;
369 bool adaptive_coalescing;
370 u16 intr_delay_resolution;
371 u32 intr_moder_tx_interval;
372 struct ena_intr_moder_entry *intr_moder_tbl;
374 struct ena_com_llq_info llq_info;
377 struct ena_com_dev_get_features_ctx {
378 struct ena_admin_queue_feature_desc max_queues;
379 struct ena_admin_device_attr_feature_desc dev_attr;
380 struct ena_admin_feature_aenq_desc aenq;
381 struct ena_admin_feature_offload_desc offload;
382 struct ena_admin_ena_hw_hints hw_hints;
383 struct ena_admin_feature_llq_desc llq;
386 struct ena_com_create_io_ctx {
387 enum ena_admin_placement_policy_type mem_queue_type;
388 enum queue_direction direction;
395 typedef void (*ena_aenq_handler)(void *data,
396 struct ena_admin_aenq_entry *aenq_e);
398 /* Holds aenq handlers. Indexed by AENQ event group */
399 struct ena_aenq_handlers {
400 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
401 ena_aenq_handler unimplemented_handler;
404 /*****************************************************************************/
405 /*****************************************************************************/
407 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
408 * @ena_dev: ENA communication layer struct
410 * Initialize the register read mechanism.
412 * @note: This method must be the first stage in the initialization sequence.
414 * @return - 0 on success, negative value on failure.
416 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
418 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
419 * @ena_dev: ENA communication layer struct
420 * @readless_supported: readless mode (enable/disable)
422 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
423 bool readless_supported);
425 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
426 * value physical address.
427 * @ena_dev: ENA communication layer struct
429 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
431 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
432 * @ena_dev: ENA communication layer struct
434 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
436 /* ena_com_admin_init - Init the admin and the async queues
437 * @ena_dev: ENA communication layer struct
438 * @aenq_handlers: Those handlers to be called upon event.
439 * @init_spinlock: Indicate if this method should init the admin spinlock or
440 * the spinlock was init before (for example, in a case of FLR).
442 * Initialize the admin submission and completion queues.
443 * Initialize the asynchronous events notification queues.
445 * @return - 0 on success, negative value on failure.
447 int ena_com_admin_init(struct ena_com_dev *ena_dev,
448 struct ena_aenq_handlers *aenq_handlers,
451 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
452 * @ena_dev: ENA communication layer struct
454 * @note: Before calling this method, the caller must validate that the device
455 * won't send any additional admin completions/aenq.
456 * To achieve that, a FLR is recommended.
458 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
460 /* ena_com_dev_reset - Perform device FLR to the device.
461 * @ena_dev: ENA communication layer struct
462 * @reset_reason: Specify what is the trigger for the reset in case of an error.
464 * @return - 0 on success, negative value on failure.
466 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
467 enum ena_regs_reset_reason_types reset_reason);
469 /* ena_com_create_io_queue - Create io queue.
470 * @ena_dev: ENA communication layer struct
471 * @ctx - create context structure
473 * Create the submission and the completion queues.
475 * @return - 0 on success, negative value on failure.
477 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
478 struct ena_com_create_io_ctx *ctx);
480 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
481 * @ena_dev: ENA communication layer struct
482 * @qid - the caller virtual queue id.
484 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
486 /* ena_com_get_io_handlers - Return the io queue handlers
487 * @ena_dev: ENA communication layer struct
488 * @qid - the caller virtual queue id.
489 * @io_sq - IO submission queue handler
490 * @io_cq - IO completion queue handler.
492 * @return - 0 on success, negative value on failure.
494 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
495 struct ena_com_io_sq **io_sq,
496 struct ena_com_io_cq **io_cq);
498 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
499 * @ena_dev: ENA communication layer struct
501 * After this method, aenq event can be received via AENQ.
503 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
505 /* ena_com_set_admin_running_state - Set the state of the admin queue
506 * @ena_dev: ENA communication layer struct
508 * Change the state of the admin queue (enable/disable)
510 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
512 /* ena_com_get_admin_running_state - Get the admin queue state
513 * @ena_dev: ENA communication layer struct
515 * Retrieve the state of the admin queue (enable/disable)
517 * @return - current polling mode (enable/disable)
519 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
521 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
522 * @ena_dev: ENA communication layer struct
523 * @polling: ENAble/Disable polling mode
525 * Set the admin completion mode.
527 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
529 /* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode
530 * @ena_dev: ENA communication layer struct
532 * Get the admin completion mode.
533 * If polling mode is on, ena_com_execute_admin_command will perform a
534 * polling on the admin completion queue for the commands completion,
535 * otherwise it will wait on wait event.
539 bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev);
541 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
542 * @ena_dev: ENA communication layer struct
544 * This method go over the admin completion queue and wake up all the pending
545 * threads that wait on the commands wait event.
547 * @note: Should be called after MSI-X interrupt.
549 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
551 /* ena_com_aenq_intr_handler - AENQ interrupt handler
552 * @ena_dev: ENA communication layer struct
554 * This method go over the async event notification queue and call the proper
557 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
559 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
560 * @ena_dev: ENA communication layer struct
562 * This method aborts all the outstanding admin commands.
563 * The caller should then call ena_com_wait_for_abort_completion to make sure
564 * all the commands were completed.
566 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
568 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
569 * @ena_dev: ENA communication layer struct
571 * This method wait until all the outstanding admin commands will be completed.
573 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
575 /* ena_com_validate_version - Validate the device parameters
576 * @ena_dev: ENA communication layer struct
578 * This method validate the device parameters are the same as the saved
579 * parameters in ena_dev.
580 * This method is useful after device reset, to validate the device mac address
581 * and the device offloads are the same as before the reset.
583 * @return - 0 on success negative value otherwise.
585 int ena_com_validate_version(struct ena_com_dev *ena_dev);
587 /* ena_com_get_link_params - Retrieve physical link parameters.
588 * @ena_dev: ENA communication layer struct
589 * @resp: Link parameters
591 * Retrieve the physical link parameters,
592 * like speed, auto-negotiation and full duplex support.
594 * @return - 0 on Success negative value otherwise.
596 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
597 struct ena_admin_get_feat_resp *resp);
599 /* ena_com_get_dma_width - Retrieve physical dma address width the device
601 * @ena_dev: ENA communication layer struct
603 * Retrieve the maximum physical address bits the device can handle.
605 * @return: > 0 on Success and negative value otherwise.
607 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
609 /* ena_com_set_aenq_config - Set aenq groups configurations
610 * @ena_dev: ENA communication layer struct
611 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
613 * Configure which aenq event group the driver would like to receive.
615 * @return: 0 on Success and negative value otherwise.
617 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
619 /* ena_com_get_dev_attr_feat - Get device features
620 * @ena_dev: ENA communication layer struct
621 * @get_feat_ctx: returned context that contain the get features.
623 * @return: 0 on Success and negative value otherwise.
625 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
626 struct ena_com_dev_get_features_ctx *get_feat_ctx);
628 /* ena_com_get_dev_basic_stats - Get device basic statistics
629 * @ena_dev: ENA communication layer struct
630 * @stats: stats return value
632 * @return: 0 on Success and negative value otherwise.
634 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
635 struct ena_admin_basic_stats *stats);
637 /* ena_com_set_dev_mtu - Configure the device mtu.
638 * @ena_dev: ENA communication layer struct
641 * @return: 0 on Success and negative value otherwise.
643 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
645 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
646 * @ena_dev: ENA communication layer struct
647 * @offlad: offload return value
649 * @return: 0 on Success and negative value otherwise.
651 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
652 struct ena_admin_feature_offload_desc *offload);
654 /* ena_com_rss_init - Init RSS
655 * @ena_dev: ENA communication layer struct
656 * @log_size: indirection log size
658 * Allocate RSS/RFS resources.
659 * The caller then can configure rss using ena_com_set_hash_function,
660 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
662 * @return: 0 on Success and negative value otherwise.
664 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
666 /* ena_com_rss_destroy - Destroy rss
667 * @ena_dev: ENA communication layer struct
669 * Free all the RSS/RFS resources.
671 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
673 /* ena_com_fill_hash_function - Fill RSS hash function
674 * @ena_dev: ENA communication layer struct
675 * @func: The hash function (Toeplitz or crc)
676 * @key: Hash key (for toeplitz hash)
677 * @key_len: key length (max length 10 DW)
678 * @init_val: initial value for the hash function
680 * Fill the ena_dev resources with the desire hash function, hash key, key_len
681 * and key initial value (if needed by the hash function).
682 * To flush the key into the device the caller should call
683 * ena_com_set_hash_function.
685 * @return: 0 on Success and negative value otherwise.
687 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
688 enum ena_admin_hash_functions func,
689 const u8 *key, u16 key_len, u32 init_val);
691 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
693 * @ena_dev: ENA communication layer struct
695 * Flush the hash function and it dependencies (key, key length and
696 * initial value) if needed.
698 * @note: Prior to this method the caller should call ena_com_fill_hash_function
700 * @return: 0 on Success and negative value otherwise.
702 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
704 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
706 * @ena_dev: ENA communication layer struct
707 * @func: hash function
710 * Retrieve the hash function and the hash key from the device.
712 * @note: If the caller called ena_com_fill_hash_function but didn't flash
713 * it to the device, the new configuration will be lost.
715 * @return: 0 on Success and negative value otherwise.
717 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
718 enum ena_admin_hash_functions *func,
721 /* ena_com_fill_hash_ctrl - Fill RSS hash control
722 * @ena_dev: ENA communication layer struct.
723 * @proto: The protocol to configure.
724 * @hash_fields: bit mask of ena_admin_flow_hash_fields
726 * Fill the ena_dev resources with the desire hash control (the ethernet
727 * fields that take part of the hash) for a specific protocol.
728 * To flush the hash control to the device, the caller should call
729 * ena_com_set_hash_ctrl.
731 * @return: 0 on Success and negative value otherwise.
733 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
734 enum ena_admin_flow_hash_proto proto,
737 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
738 * @ena_dev: ENA communication layer struct
740 * Flush the hash control (the ethernet fields that take part of the hash)
742 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
744 * @return: 0 on Success and negative value otherwise.
746 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
748 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
749 * @ena_dev: ENA communication layer struct
750 * @proto: The protocol to retrieve.
751 * @fields: bit mask of ena_admin_flow_hash_fields.
753 * Retrieve the hash control from the device.
755 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
756 * it to the device, the new configuration will be lost.
758 * @return: 0 on Success and negative value otherwise.
760 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
761 enum ena_admin_flow_hash_proto proto,
764 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
766 * @ena_dev: ENA communication layer struct
768 * Fill the ena_dev resources with the default hash control configuration.
769 * To flush the hash control to the device, the caller should call
770 * ena_com_set_hash_ctrl.
772 * @return: 0 on Success and negative value otherwise.
774 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
776 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
778 * @ena_dev: ENA communication layer struct.
779 * @entry_idx - indirection table entry.
780 * @entry_value - redirection value
782 * Fill a single entry of the RSS indirection table in the ena_dev resources.
783 * To flush the indirection table to the device, the called should call
784 * ena_com_indirect_table_set.
786 * @return: 0 on Success and negative value otherwise.
788 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
789 u16 entry_idx, u16 entry_value);
791 /* ena_com_indirect_table_set - Flush the indirection table to the device.
792 * @ena_dev: ENA communication layer struct
794 * Flush the indirection hash control to the device.
795 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
797 * @return: 0 on Success and negative value otherwise.
799 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
801 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
802 * @ena_dev: ENA communication layer struct
803 * @ind_tbl: indirection table
805 * Retrieve the RSS indirection table from the device.
807 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
808 * it to the device, the new configuration will be lost.
810 * @return: 0 on Success and negative value otherwise.
812 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
814 /* ena_com_allocate_host_info - Allocate host info resources.
815 * @ena_dev: ENA communication layer struct
817 * @return: 0 on Success and negative value otherwise.
819 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
821 /* ena_com_allocate_debug_area - Allocate debug area.
822 * @ena_dev: ENA communication layer struct
823 * @debug_area_size - debug area size.
825 * @return: 0 on Success and negative value otherwise.
827 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
828 u32 debug_area_size);
830 /* ena_com_delete_debug_area - Free the debug area resources.
831 * @ena_dev: ENA communication layer struct
833 * Free the allocate debug area.
835 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
837 /* ena_com_delete_host_info - Free the host info resources.
838 * @ena_dev: ENA communication layer struct
840 * Free the allocate host info.
842 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
844 /* ena_com_set_host_attributes - Update the device with the host
845 * attributes (debug area and host info) base address.
846 * @ena_dev: ENA communication layer struct
848 * @return: 0 on Success and negative value otherwise.
850 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
852 /* ena_com_create_io_cq - Create io completion queue.
853 * @ena_dev: ENA communication layer struct
854 * @io_cq - io completion queue handler
856 * Create IO completion queue.
858 * @return - 0 on success, negative value on failure.
860 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
861 struct ena_com_io_cq *io_cq);
863 /* ena_com_destroy_io_cq - Destroy io completion queue.
864 * @ena_dev: ENA communication layer struct
865 * @io_cq - io completion queue handler
867 * Destroy IO completion queue.
869 * @return - 0 on success, negative value on failure.
871 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
872 struct ena_com_io_cq *io_cq);
874 /* ena_com_execute_admin_command - Execute admin command
875 * @admin_queue: admin queue.
876 * @cmd: the admin command to execute.
877 * @cmd_size: the command size.
878 * @cmd_completion: command completion return value.
879 * @cmd_comp_size: command completion size.
881 * Submit an admin command and then wait until the device will return a
883 * The completion will be copyed into cmd_comp.
885 * @return - 0 on success, negative value on failure.
887 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
888 struct ena_admin_aq_entry *cmd,
890 struct ena_admin_acq_entry *cmd_comp,
891 size_t cmd_comp_size);
893 /* ena_com_init_interrupt_moderation - Init interrupt moderation
894 * @ena_dev: ENA communication layer struct
896 * @return - 0 on success, negative value on failure.
898 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
900 /* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
901 * @ena_dev: ENA communication layer struct
903 void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
905 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
906 * capability is supported by the device.
908 * @return - supported or not.
910 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
912 /* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
913 * moderation table back to the default parameters.
914 * @ena_dev: ENA communication layer struct
916 void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
918 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
919 * non-adaptive interval in Tx direction.
920 * @ena_dev: ENA communication layer struct
921 * @tx_coalesce_usecs: Interval in usec.
923 * @return - 0 on success, negative value on failure.
925 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
926 u32 tx_coalesce_usecs);
928 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
929 * non-adaptive interval in Rx direction.
930 * @ena_dev: ENA communication layer struct
931 * @rx_coalesce_usecs: Interval in usec.
933 * @return - 0 on success, negative value on failure.
935 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
936 u32 rx_coalesce_usecs);
938 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
939 * non-adaptive interval in Tx direction.
940 * @ena_dev: ENA communication layer struct
942 * @return - interval in usec
944 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
946 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
947 * non-adaptive interval in Rx direction.
948 * @ena_dev: ENA communication layer struct
950 * @return - interval in usec
952 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
954 /* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
956 * @ena_dev: ENA communication layer struct
957 * @level: Interrupt moderation table level
958 * @entry: Entry value
960 * Update a single entry in the interrupt moderation table.
962 void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
963 enum ena_intr_moder_level level,
964 struct ena_intr_moder_entry *entry);
966 /* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
967 * @ena_dev: ENA communication layer struct
968 * @level: Interrupt moderation table level
969 * @entry: Entry to fill.
971 * Initialize the entry according to the adaptive interrupt moderation table.
973 void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
974 enum ena_intr_moder_level level,
975 struct ena_intr_moder_entry *entry);
977 /* ena_com_config_dev_mode - Configure the placement policy of the device.
978 * @ena_dev: ENA communication layer struct
979 * @llq_features: LLQ feature descriptor, retrieve via
980 * ena_com_get_dev_attr_feat.
981 * @ena_llq_config: The default driver LLQ parameters configurations
983 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
984 struct ena_admin_feature_llq_desc *llq_features,
985 struct ena_llq_configurations *llq_default_config);
987 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
989 return ena_dev->adaptive_coalescing;
992 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
994 ena_dev->adaptive_coalescing = true;
997 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
999 ena_dev->adaptive_coalescing = false;
1002 /* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
1003 * @ena_dev: ENA communication layer struct
1004 * @pkts: Number of packets since the last update
1005 * @bytes: Number of bytes received since the last update.
1006 * @smoothed_interval: Returned interval
1007 * @moder_tbl_idx: Current table level as input update new level as return
1010 static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
1013 unsigned int *smoothed_interval,
1014 unsigned int *moder_tbl_idx)
1016 enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
1017 struct ena_intr_moder_entry *curr_moder_entry;
1018 struct ena_intr_moder_entry *pred_moder_entry;
1019 struct ena_intr_moder_entry *new_moder_entry;
1020 struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
1021 unsigned int interval;
1023 /* We apply adaptive moderation on Rx path only.
1024 * Tx uses static interrupt moderation.
1026 if (!pkts || !bytes)
1027 /* Tx interrupt, or spurious interrupt,
1028 * in both cases we just use same delay values
1032 curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
1033 if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
1034 pr_err("Wrong moderation index %u\n", curr_moder_idx);
1038 curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
1039 new_moder_idx = curr_moder_idx;
1041 if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
1042 if ((pkts > curr_moder_entry->pkts_per_interval) ||
1043 (bytes > curr_moder_entry->bytes_per_interval))
1045 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1047 pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
1049 if ((pkts <= pred_moder_entry->pkts_per_interval) ||
1050 (bytes <= pred_moder_entry->bytes_per_interval))
1052 (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
1053 else if ((pkts > curr_moder_entry->pkts_per_interval) ||
1054 (bytes > curr_moder_entry->bytes_per_interval)) {
1055 if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
1057 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1060 new_moder_entry = &intr_moder_tbl[new_moder_idx];
1062 interval = new_moder_entry->intr_moder_interval;
1063 *smoothed_interval = (
1064 (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
1065 ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
1068 *moder_tbl_idx = new_moder_idx;
1071 /* ena_com_update_intr_reg - Prepare interrupt register
1072 * @intr_reg: interrupt register to update.
1073 * @rx_delay_interval: Rx interval in usecs
1074 * @tx_delay_interval: Tx interval in usecs
1075 * @unmask: unask enable/disable
1077 * Prepare interrupt update register with the supplied parameters.
1079 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1080 u32 rx_delay_interval,
1081 u32 tx_delay_interval,
1084 intr_reg->intr_control = 0;
1085 intr_reg->intr_control |= rx_delay_interval &
1086 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1088 intr_reg->intr_control |=
1089 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
1090 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
1093 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1096 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
1098 u16 size, buffers_num;
1101 size = bounce_buf_ctrl->buffer_size;
1102 buffers_num = bounce_buf_ctrl->buffers_num;
1104 buf = bounce_buf_ctrl->base_buffer +
1105 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
1107 prefetchw(bounce_buf_ctrl->base_buffer +
1108 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
1113 #endif /* !(ENA_COM) */